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428 lines
16 KiB
C++
428 lines
16 KiB
C++
// -*- Mode: C++; c-basic-offset: 2; indent-tabs-mode: nil -*-
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/* Copyright (c) 2006, Google Inc.
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* All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions are
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* met:
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*
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* * Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* * Redistributions in binary form must reproduce the above
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* copyright notice, this list of conditions and the following disclaimer
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* in the documentation and/or other materials provided with the
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* distribution.
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* * Neither the name of Google Inc. nor the names of its
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* contributors may be used to endorse or promote products derived from
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* this software without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
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* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
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* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
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* A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
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* OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
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* SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
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* LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
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* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
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* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
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* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
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* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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*
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* ---
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* Author: Sanjay Ghemawat
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*/
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// Implementation of atomic operations using Windows API
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// functions. This file should not be included directly. Clients
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// should instead include "base/atomicops.h".
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#ifndef BASE_ATOMICOPS_INTERNALS_WINDOWS_H_
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#define BASE_ATOMICOPS_INTERNALS_WINDOWS_H_
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#include <stdio.h>
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#include <stdlib.h>
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#include "base/basictypes.h" // For COMPILE_ASSERT
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typedef int32 Atomic32;
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#if defined(_WIN64)
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#define BASE_HAS_ATOMIC64 1 // Use only in tests and base/atomic*
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#endif
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namespace base {
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namespace subtle {
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typedef int64 Atomic64;
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// 32-bit low-level operations on any platform
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extern "C" {
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// We use windows intrinsics when we can (they seem to be supported
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// well on MSVC 8.0 and above). Unfortunately, in some
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// environments, <windows.h> and <intrin.h> have conflicting
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// declarations of some other intrinsics, breaking compilation:
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// http://connect.microsoft.com/VisualStudio/feedback/details/262047
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// Therefore, we simply declare the relevant intrinsics ourself.
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// MinGW has a bug in the header files where it doesn't indicate the
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// first argument is volatile -- they're not up to date. See
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// http://readlist.com/lists/lists.sourceforge.net/mingw-users/0/3861.html
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// We have to const_cast away the volatile to avoid compiler warnings.
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// TODO(csilvers): remove this once MinGW has updated MinGW/include/winbase.h
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#if defined(__MINGW32__)
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inline LONG FastInterlockedCompareExchange(volatile LONG* ptr,
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LONG newval, LONG oldval) {
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return ::InterlockedCompareExchange(const_cast<LONG*>(ptr), newval, oldval);
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}
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inline LONG FastInterlockedExchange(volatile LONG* ptr, LONG newval) {
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return ::InterlockedExchange(const_cast<LONG*>(ptr), newval);
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}
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inline LONG FastInterlockedExchangeAdd(volatile LONG* ptr, LONG increment) {
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return ::InterlockedExchangeAdd(const_cast<LONG*>(ptr), increment);
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}
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#elif _MSC_VER >= 1400 // intrinsics didn't work so well before MSVC 8.0
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// Unfortunately, in some environments, <windows.h> and <intrin.h>
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// have conflicting declarations of some intrinsics, breaking
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// compilation. So we declare the intrinsics we need ourselves. See
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// http://connect.microsoft.com/VisualStudio/feedback/details/262047
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LONG _InterlockedCompareExchange(volatile LONG* ptr, LONG newval, LONG oldval);
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#pragma intrinsic(_InterlockedCompareExchange)
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inline LONG FastInterlockedCompareExchange(volatile LONG* ptr,
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LONG newval, LONG oldval) {
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return _InterlockedCompareExchange(ptr, newval, oldval);
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}
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LONG _InterlockedExchange(volatile LONG* ptr, LONG newval);
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#pragma intrinsic(_InterlockedExchange)
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inline LONG FastInterlockedExchange(volatile LONG* ptr, LONG newval) {
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return _InterlockedExchange(ptr, newval);
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}
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LONG _InterlockedExchangeAdd(volatile LONG* ptr, LONG increment);
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#pragma intrinsic(_InterlockedExchangeAdd)
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inline LONG FastInterlockedExchangeAdd(volatile LONG* ptr, LONG increment) {
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return _InterlockedExchangeAdd(ptr, increment);
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}
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#else
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inline LONG FastInterlockedCompareExchange(volatile LONG* ptr,
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LONG newval, LONG oldval) {
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return ::InterlockedCompareExchange(ptr, newval, oldval);
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}
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inline LONG FastInterlockedExchange(volatile LONG* ptr, LONG newval) {
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return ::InterlockedExchange(ptr, newval);
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}
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inline LONG FastInterlockedExchangeAdd(volatile LONG* ptr, LONG increment) {
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return ::InterlockedExchangeAdd(ptr, increment);
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}
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#endif // ifdef __MINGW32__
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} // extern "C"
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inline Atomic32 NoBarrier_CompareAndSwap(volatile Atomic32* ptr,
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Atomic32 old_value,
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Atomic32 new_value) {
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LONG result = FastInterlockedCompareExchange(
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reinterpret_cast<volatile LONG*>(ptr),
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static_cast<LONG>(new_value),
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static_cast<LONG>(old_value));
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return static_cast<Atomic32>(result);
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}
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inline Atomic32 NoBarrier_AtomicExchange(volatile Atomic32* ptr,
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Atomic32 new_value) {
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LONG result = FastInterlockedExchange(
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reinterpret_cast<volatile LONG*>(ptr),
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static_cast<LONG>(new_value));
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return static_cast<Atomic32>(result);
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}
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inline Atomic32 Acquire_AtomicExchange(volatile Atomic32* ptr,
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Atomic32 new_value) {
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// FastInterlockedExchange has both acquire and release memory barriers.
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return NoBarrier_AtomicExchange(ptr, new_value);
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}
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inline Atomic32 Release_AtomicExchange(volatile Atomic32* ptr,
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Atomic32 new_value) {
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// FastInterlockedExchange has both acquire and release memory barriers.
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return NoBarrier_AtomicExchange(ptr, new_value);
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}
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} // namespace base::subtle
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} // namespace base
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// In msvc8/vs2005, winnt.h already contains a definition for
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// MemoryBarrier in the global namespace. Add it there for earlier
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// versions and forward to it from within the namespace.
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#if !(defined(_MSC_VER) && _MSC_VER >= 1400)
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inline void MemoryBarrier() {
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Atomic32 value = 0;
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base::subtle::NoBarrier_AtomicExchange(&value, 0);
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// actually acts as a barrier in thisd implementation
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}
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#endif
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namespace base {
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namespace subtle {
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inline void MemoryBarrier() {
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::MemoryBarrier();
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}
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inline Atomic32 Acquire_CompareAndSwap(volatile Atomic32* ptr,
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Atomic32 old_value,
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Atomic32 new_value) {
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return NoBarrier_CompareAndSwap(ptr, old_value, new_value);
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}
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inline Atomic32 Release_CompareAndSwap(volatile Atomic32* ptr,
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Atomic32 old_value,
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Atomic32 new_value) {
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return NoBarrier_CompareAndSwap(ptr, old_value, new_value);
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}
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inline void NoBarrier_Store(volatile Atomic32* ptr, Atomic32 value) {
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*ptr = value;
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}
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inline void Release_Store(volatile Atomic32* ptr, Atomic32 value) {
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*ptr = value; // works w/o barrier for current Intel chips as of June 2005
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// See comments in Atomic64 version of Release_Store() below.
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}
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inline Atomic32 NoBarrier_Load(volatile const Atomic32* ptr) {
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return *ptr;
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}
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inline Atomic32 Acquire_Load(volatile const Atomic32* ptr) {
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Atomic32 value = *ptr;
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return value;
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}
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// 64-bit operations
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#if defined(_WIN64) || defined(__MINGW64__)
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// 64-bit low-level operations on 64-bit platform.
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COMPILE_ASSERT(sizeof(Atomic64) == sizeof(PVOID), atomic_word_is_atomic);
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// These are the intrinsics needed for 64-bit operations. Similar to the
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// 32-bit case above.
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extern "C" {
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#if defined(__MINGW64__)
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inline PVOID FastInterlockedCompareExchangePointer(volatile PVOID* ptr,
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PVOID newval, PVOID oldval) {
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return ::InterlockedCompareExchangePointer(const_cast<PVOID*>(ptr),
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newval, oldval);
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}
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inline PVOID FastInterlockedExchangePointer(volatile PVOID* ptr, PVOID newval) {
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return ::InterlockedExchangePointer(const_cast<PVOID*>(ptr), newval);
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}
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inline LONGLONG FastInterlockedExchangeAdd64(volatile LONGLONG* ptr,
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LONGLONG increment) {
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return ::InterlockedExchangeAdd64(const_cast<LONGLONG*>(ptr), increment);
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}
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#elif _MSC_VER >= 1400 // intrinsics didn't work so well before MSVC 8.0
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// Like above, we need to declare the intrinsics ourselves.
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PVOID _InterlockedCompareExchangePointer(volatile PVOID* ptr,
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PVOID newval, PVOID oldval);
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#pragma intrinsic(_InterlockedCompareExchangePointer)
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inline PVOID FastInterlockedCompareExchangePointer(volatile PVOID* ptr,
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PVOID newval, PVOID oldval) {
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return _InterlockedCompareExchangePointer(const_cast<PVOID*>(ptr),
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newval, oldval);
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}
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PVOID _InterlockedExchangePointer(volatile PVOID* ptr, PVOID newval);
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#pragma intrinsic(_InterlockedExchangePointer)
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inline PVOID FastInterlockedExchangePointer(volatile PVOID* ptr, PVOID newval) {
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return _InterlockedExchangePointer(const_cast<PVOID*>(ptr), newval);
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}
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LONGLONG _InterlockedExchangeAdd64(volatile LONGLONG* ptr, LONGLONG increment);
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#pragma intrinsic(_InterlockedExchangeAdd64)
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inline LONGLONG FastInterlockedExchangeAdd64(volatile LONGLONG* ptr,
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LONGLONG increment) {
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return _InterlockedExchangeAdd64(const_cast<LONGLONG*>(ptr), increment);
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}
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#else
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inline PVOID FastInterlockedCompareExchangePointer(volatile PVOID* ptr,
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PVOID newval, PVOID oldval) {
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return ::InterlockedCompareExchangePointer(ptr, newval, oldval);
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}
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inline PVOID FastInterlockedExchangePointer(volatile PVOID* ptr, PVOID newval) {
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return ::InterlockedExchangePointer(ptr, newval);
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}
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inline LONGLONG FastInterlockedExchangeAdd64(volatile LONGLONG* ptr,
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LONGLONG increment) {
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return ::InterlockedExchangeAdd64(ptr, increment);
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}
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#endif // ifdef __MINGW64__
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} // extern "C"
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inline Atomic64 NoBarrier_CompareAndSwap(volatile Atomic64* ptr,
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Atomic64 old_value,
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Atomic64 new_value) {
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PVOID result = FastInterlockedCompareExchangePointer(
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reinterpret_cast<volatile PVOID*>(ptr),
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reinterpret_cast<PVOID>(new_value), reinterpret_cast<PVOID>(old_value));
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return reinterpret_cast<Atomic64>(result);
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}
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inline Atomic64 NoBarrier_AtomicExchange(volatile Atomic64* ptr,
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Atomic64 new_value) {
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PVOID result = FastInterlockedExchangePointer(
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reinterpret_cast<volatile PVOID*>(ptr),
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reinterpret_cast<PVOID>(new_value));
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return reinterpret_cast<Atomic64>(result);
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}
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inline void NoBarrier_Store(volatile Atomic64* ptr, Atomic64 value) {
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*ptr = value;
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}
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inline void Release_Store(volatile Atomic64* ptr, Atomic64 value) {
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*ptr = value; // works w/o barrier for current Intel chips as of June 2005
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// When new chips come out, check:
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// IA-32 Intel Architecture Software Developer's Manual, Volume 3:
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// System Programming Guide, Chatper 7: Multiple-processor management,
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// Section 7.2, Memory Ordering.
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// Last seen at:
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// http://developer.intel.com/design/pentium4/manuals/index_new.htm
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}
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inline Atomic64 NoBarrier_Load(volatile const Atomic64* ptr) {
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return *ptr;
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}
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inline Atomic64 Acquire_Load(volatile const Atomic64* ptr) {
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Atomic64 value = *ptr;
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return value;
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}
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#else // defined(_WIN64) || defined(__MINGW64__)
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// 64-bit low-level operations on 32-bit platform
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// TODO(vchen): The GNU assembly below must be converted to MSVC inline
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// assembly. Then the file should be renamed to ...-x86-msvc.h, probably.
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inline void NotImplementedFatalError(const char *function_name) {
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fprintf(stderr, "64-bit %s() not implemented on this platform\n",
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function_name);
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abort();
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}
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inline Atomic64 NoBarrier_CompareAndSwap(volatile Atomic64* ptr,
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Atomic64 old_value,
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Atomic64 new_value) {
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#if 0 // Not implemented
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Atomic64 prev;
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__asm__ __volatile__("movl (%3), %%ebx\n\t" // Move 64-bit new_value into
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"movl 4(%3), %%ecx\n\t" // ecx:ebx
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"lock; cmpxchg8b %1\n\t" // If edx:eax (old_value) same
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: "=A" (prev) // as contents of ptr:
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: "m" (*ptr), // ecx:ebx => ptr
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"0" (old_value), // else:
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"r" (&new_value) // old *ptr => edx:eax
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: "memory", "%ebx", "%ecx");
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return prev;
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#else
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NotImplementedFatalError("NoBarrier_CompareAndSwap");
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return 0;
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#endif
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}
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inline Atomic64 NoBarrier_AtomicExchange(volatile Atomic64* ptr,
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Atomic64 new_value) {
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#if 0 // Not implemented
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__asm__ __volatile__(
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"movl (%2), %%ebx\n\t" // Move 64-bit new_value into
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"movl 4(%2), %%ecx\n\t" // ecx:ebx
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"0:\n\t"
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"movl %1, %%eax\n\t" // Read contents of ptr into
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"movl 4%1, %%edx\n\t" // edx:eax
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"lock; cmpxchg8b %1\n\t" // Attempt cmpxchg; if *ptr
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"jnz 0b\n\t" // is no longer edx:eax, loop
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: "=A" (new_value)
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: "m" (*ptr),
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"r" (&new_value)
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: "memory", "%ebx", "%ecx");
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return new_value; // Now it's the previous value.
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#else
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NotImplementedFatalError("NoBarrier_AtomicExchange");
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return 0;
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#endif
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}
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inline void NoBarrier_Store(volatile Atomic64* ptrValue, Atomic64 value)
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{
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__asm {
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movq mm0, value; // Use mmx reg for 64-bit atomic moves
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mov eax, ptrValue;
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movq [eax], mm0;
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emms; // Empty mmx state to enable FP registers
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}
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}
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inline void Release_Store(volatile Atomic64* ptr, Atomic64 value) {
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NoBarrier_Store(ptr, value);
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}
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inline Atomic64 NoBarrier_Load(volatile const Atomic64* ptrValue)
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{
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Atomic64 value;
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__asm {
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mov eax, ptrValue;
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movq mm0, [eax]; // Use mmx reg for 64-bit atomic moves
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movq value, mm0;
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emms; // Empty mmx state to enable FP registers
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}
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return value;
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}
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inline Atomic64 Acquire_Load(volatile const Atomic64* ptr) {
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Atomic64 value = NoBarrier_Load(ptr);
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return value;
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}
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#endif // defined(_WIN64) || defined(__MINGW64__)
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inline Atomic64 Acquire_AtomicExchange(volatile Atomic64* ptr,
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Atomic64 new_value) {
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// FastInterlockedExchange has both acquire and release memory barriers.
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return NoBarrier_AtomicExchange(ptr, new_value);
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}
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inline Atomic64 Release_AtomicExchange(volatile Atomic64* ptr,
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Atomic64 new_value) {
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// FastInterlockedExchange has both acquire and release memory barriers.
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return NoBarrier_AtomicExchange(ptr, new_value);
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}
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inline Atomic64 Acquire_CompareAndSwap(volatile Atomic64* ptr,
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Atomic64 old_value,
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Atomic64 new_value) {
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return NoBarrier_CompareAndSwap(ptr, old_value, new_value);
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}
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inline Atomic64 Release_CompareAndSwap(volatile Atomic64* ptr,
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Atomic64 old_value,
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Atomic64 new_value) {
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return NoBarrier_CompareAndSwap(ptr, old_value, new_value);
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}
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} // namespace base::subtle
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} // namespace base
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#endif // BASE_ATOMICOPS_INTERNALS_WINDOWS_H_
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