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			433 lines
		
	
	
	
		
			9.3 KiB
		
	
	
	
		
			Raku
		
	
	
	
	
	
			
		
		
	
	
			433 lines
		
	
	
	
		
			9.3 KiB
		
	
	
	
		
			Raku
		
	
	
	
	
	
#! /usr/bin/env perl
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# Copyright 2010-2020 The OpenSSL Project Authors. All Rights Reserved.
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#
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# Licensed under the OpenSSL license (the "License").  You may not use
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# this file except in compliance with the License.  You can obtain a copy
 | 
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# in the file LICENSE in the source distribution or at
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						||
# https://www.openssl.org/source/license.html
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#
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# ====================================================================
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# Written by Andy Polyakov <appro@openssl.org> for the OpenSSL
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# project. The module is, however, dual licensed under OpenSSL and
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# CRYPTOGAMS licenses depending on where you obtain it. For further
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# details see http://www.openssl.org/~appro/cryptogams/.
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# ====================================================================
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# This module doesn't present direct interest for OpenSSL, because it
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# doesn't provide better performance for longer keys, at least not on
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# in-order-execution cores. While 512-bit RSA sign operations can be
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# 65% faster in 64-bit mode, 1024-bit ones are only 15% faster, and
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# 4096-bit ones are up to 15% slower. In 32-bit mode it varies from
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# 16% improvement for 512-bit RSA sign to -33% for 4096-bit RSA
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# verify:-( All comparisons are against bn_mul_mont-free assembler.
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# The module might be of interest to embedded system developers, as
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# the code is smaller than 1KB, yet offers >3x improvement on MIPS64
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# and 75-30% [less for longer keys] on MIPS32 over compiler-generated
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# code.
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######################################################################
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# There is a number of MIPS ABI in use, O32 and N32/64 are most
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# widely used. Then there is a new contender: NUBI. It appears that if
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# one picks the latter, it's possible to arrange code in ABI neutral
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# manner. Therefore let's stick to NUBI register layout:
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#
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($zero,$at,$t0,$t1,$t2)=map("\$$_",(0..2,24,25));
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($a0,$a1,$a2,$a3,$a4,$a5,$a6,$a7)=map("\$$_",(4..11));
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($s0,$s1,$s2,$s3,$s4,$s5,$s6,$s7,$s8,$s9,$s10,$s11)=map("\$$_",(12..23));
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($gp,$tp,$sp,$fp,$ra)=map("\$$_",(3,28..31));
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#
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						||
# The return value is placed in $a0. Following coding rules facilitate
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# interoperability:
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#
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						||
# - never ever touch $tp, "thread pointer", former $gp;
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						||
# - copy return value to $t0, former $v0 [or to $a0 if you're adapting
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#   old code];
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# - on O32 populate $a4-$a7 with 'lw $aN,4*N($sp)' if necessary;
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#
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# For reference here is register layout for N32/64 MIPS ABIs:
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#
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# ($zero,$at,$v0,$v1)=map("\$$_",(0..3));
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# ($a0,$a1,$a2,$a3,$a4,$a5,$a6,$a7)=map("\$$_",(4..11));
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# ($t0,$t1,$t2,$t3,$t8,$t9)=map("\$$_",(12..15,24,25));
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# ($s0,$s1,$s2,$s3,$s4,$s5,$s6,$s7)=map("\$$_",(16..23));
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# ($gp,$sp,$fp,$ra)=map("\$$_",(28..31));
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#
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$flavour = shift || "o32"; # supported flavours are o32,n32,64,nubi32,nubi64
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if ($flavour =~ /64|n32/i) {
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	$PTR_ADD="daddu";	# incidentally works even on n32
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	$PTR_SUB="dsubu";	# incidentally works even on n32
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	$REG_S="sd";
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	$REG_L="ld";
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	$SZREG=8;
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} else {
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	$PTR_ADD="addu";
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	$PTR_SUB="subu";
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	$REG_S="sw";
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	$REG_L="lw";
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	$SZREG=4;
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}
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$SAVED_REGS_MASK = ($flavour =~ /nubi/i) ? 0x00fff000 : 0x00ff0000;
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#
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# <appro@openssl.org>
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#
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######################################################################
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while (($output=shift) && ($output!~/\w[\w\-]*\.\w+$/)) {}
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open STDOUT,">$output";
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if ($flavour =~ /64|n32/i) {
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	$LD="ld";
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	$ST="sd";
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	$MULTU="dmultu";
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	$ADDU="daddu";
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	$SUBU="dsubu";
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	$BNSZ=8;
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} else {
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	$LD="lw";
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	$ST="sw";
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	$MULTU="multu";
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	$ADDU="addu";
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	$SUBU="subu";
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	$BNSZ=4;
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}
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# int bn_mul_mont(
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$rp=$a0;	# BN_ULONG *rp,
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$ap=$a1;	# const BN_ULONG *ap,
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$bp=$a2;	# const BN_ULONG *bp,
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$np=$a3;	# const BN_ULONG *np,
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$n0=$a4;	# const BN_ULONG *n0,
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$num=$a5;	# int num);
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$lo0=$a6;
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$hi0=$a7;
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$lo1=$t1;
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$hi1=$t2;
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$aj=$s0;
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$bi=$s1;
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$nj=$s2;
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$tp=$s3;
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$alo=$s4;
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$ahi=$s5;
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$nlo=$s6;
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$nhi=$s7;
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$tj=$s8;
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$i=$s9;
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$j=$s10;
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$m1=$s11;
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$FRAMESIZE=14;
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$code=<<___;
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#include "mips_arch.h"
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.text
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.set	noat
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.set	noreorder
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.align	5
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.globl	bn_mul_mont
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.ent	bn_mul_mont
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bn_mul_mont:
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___
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$code.=<<___ if ($flavour =~ /o32/i);
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	lw	$n0,16($sp)
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	lw	$num,20($sp)
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___
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$code.=<<___;
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	slt	$at,$num,4
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	bnez	$at,1f
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	li	$t0,0
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	slt	$at,$num,17	# on in-order CPU
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	bnez	$at,bn_mul_mont_internal
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	nop
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1:	jr	$ra
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	li	$a0,0
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.end	bn_mul_mont
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.align	5
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.ent	bn_mul_mont_internal
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bn_mul_mont_internal:
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	.frame	$fp,$FRAMESIZE*$SZREG,$ra
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	.mask	0x40000000|$SAVED_REGS_MASK,-$SZREG
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	$PTR_SUB $sp,$FRAMESIZE*$SZREG
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	$REG_S	$fp,($FRAMESIZE-1)*$SZREG($sp)
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	$REG_S	$s11,($FRAMESIZE-2)*$SZREG($sp)
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	$REG_S	$s10,($FRAMESIZE-3)*$SZREG($sp)
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	$REG_S	$s9,($FRAMESIZE-4)*$SZREG($sp)
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	$REG_S	$s8,($FRAMESIZE-5)*$SZREG($sp)
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	$REG_S	$s7,($FRAMESIZE-6)*$SZREG($sp)
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	$REG_S	$s6,($FRAMESIZE-7)*$SZREG($sp)
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	$REG_S	$s5,($FRAMESIZE-8)*$SZREG($sp)
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	$REG_S	$s4,($FRAMESIZE-9)*$SZREG($sp)
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___
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$code.=<<___ if ($flavour =~ /nubi/i);
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	$REG_S	$s3,($FRAMESIZE-10)*$SZREG($sp)
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	$REG_S	$s2,($FRAMESIZE-11)*$SZREG($sp)
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	$REG_S	$s1,($FRAMESIZE-12)*$SZREG($sp)
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	$REG_S	$s0,($FRAMESIZE-13)*$SZREG($sp)
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___
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$code.=<<___;
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	move	$fp,$sp
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	.set	reorder
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	$LD	$n0,0($n0)
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	$LD	$bi,0($bp)	# bp[0]
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	$LD	$aj,0($ap)	# ap[0]
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	$LD	$nj,0($np)	# np[0]
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	$PTR_SUB $sp,2*$BNSZ	# place for two extra words
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	sll	$num,`log($BNSZ)/log(2)`
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	li	$at,-4096
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	$PTR_SUB $sp,$num
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	and	$sp,$at
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	$MULTU	($aj,$bi)
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	$LD	$ahi,$BNSZ($ap)
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	$LD	$nhi,$BNSZ($np)
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	mflo	($lo0,$aj,$bi)
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	mfhi	($hi0,$aj,$bi)
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	$MULTU	($lo0,$n0)
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	mflo	($m1,$lo0,$n0)
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	$MULTU	($ahi,$bi)
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	mflo	($alo,$ahi,$bi)
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	mfhi	($ahi,$ahi,$bi)
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	$MULTU	($nj,$m1)
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	mflo	($lo1,$nj,$m1)
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	mfhi	($hi1,$nj,$m1)
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	$MULTU	($nhi,$m1)
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	$ADDU	$lo1,$lo0
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	sltu	$at,$lo1,$lo0
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	$ADDU	$hi1,$at
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	mflo	($nlo,$nhi,$m1)
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	mfhi	($nhi,$nhi,$m1)
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	move	$tp,$sp
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	li	$j,2*$BNSZ
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.align	4
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.L1st:
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	.set	noreorder
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	$PTR_ADD $aj,$ap,$j
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	$PTR_ADD $nj,$np,$j
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	$LD	$aj,($aj)
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	$LD	$nj,($nj)
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	$MULTU	($aj,$bi)
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	$ADDU	$lo0,$alo,$hi0
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	$ADDU	$lo1,$nlo,$hi1
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	sltu	$at,$lo0,$hi0
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	sltu	$t0,$lo1,$hi1
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	$ADDU	$hi0,$ahi,$at
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	$ADDU	$hi1,$nhi,$t0
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	mflo	($alo,$aj,$bi)
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	mfhi	($ahi,$aj,$bi)
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	$ADDU	$lo1,$lo0
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	sltu	$at,$lo1,$lo0
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	$MULTU	($nj,$m1)
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	$ADDU	$hi1,$at
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	addu	$j,$BNSZ
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	$ST	$lo1,($tp)
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	sltu	$t0,$j,$num
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	mflo	($nlo,$nj,$m1)
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	mfhi	($nhi,$nj,$m1)
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	bnez	$t0,.L1st
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	$PTR_ADD $tp,$BNSZ
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	.set	reorder
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	$ADDU	$lo0,$alo,$hi0
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	sltu	$at,$lo0,$hi0
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	$ADDU	$hi0,$ahi,$at
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						||
 | 
						||
	$ADDU	$lo1,$nlo,$hi1
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						||
	sltu	$t0,$lo1,$hi1
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	$ADDU	$hi1,$nhi,$t0
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						||
	$ADDU	$lo1,$lo0
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	sltu	$at,$lo1,$lo0
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	$ADDU	$hi1,$at
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						||
 | 
						||
	$ST	$lo1,($tp)
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 | 
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	$ADDU	$hi1,$hi0
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	sltu	$at,$hi1,$hi0
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	$ST	$hi1,$BNSZ($tp)
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	$ST	$at,2*$BNSZ($tp)
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						||
 | 
						||
	li	$i,$BNSZ
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						||
.align	4
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.Louter:
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	$PTR_ADD $bi,$bp,$i
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	$LD	$bi,($bi)
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						||
	$LD	$aj,($ap)
 | 
						||
	$LD	$ahi,$BNSZ($ap)
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						||
	$LD	$tj,($sp)
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						||
 | 
						||
	$MULTU	($aj,$bi)
 | 
						||
	$LD	$nj,($np)
 | 
						||
	$LD	$nhi,$BNSZ($np)
 | 
						||
	mflo	($lo0,$aj,$bi)
 | 
						||
	mfhi	($hi0,$aj,$bi)
 | 
						||
	$ADDU	$lo0,$tj
 | 
						||
	$MULTU	($lo0,$n0)
 | 
						||
	sltu	$at,$lo0,$tj
 | 
						||
	$ADDU	$hi0,$at
 | 
						||
	mflo	($m1,$lo0,$n0)
 | 
						||
 | 
						||
	$MULTU	($ahi,$bi)
 | 
						||
	mflo	($alo,$ahi,$bi)
 | 
						||
	mfhi	($ahi,$ahi,$bi)
 | 
						||
 | 
						||
	$MULTU	($nj,$m1)
 | 
						||
	mflo	($lo1,$nj,$m1)
 | 
						||
	mfhi	($hi1,$nj,$m1)
 | 
						||
 | 
						||
	$MULTU	($nhi,$m1)
 | 
						||
	$ADDU	$lo1,$lo0
 | 
						||
	sltu	$at,$lo1,$lo0
 | 
						||
	$ADDU	$hi1,$at
 | 
						||
	mflo	($nlo,$nhi,$m1)
 | 
						||
	mfhi	($nhi,$nhi,$m1)
 | 
						||
 | 
						||
	move	$tp,$sp
 | 
						||
	li	$j,2*$BNSZ
 | 
						||
	$LD	$tj,$BNSZ($tp)
 | 
						||
.align	4
 | 
						||
.Linner:
 | 
						||
	.set	noreorder
 | 
						||
	$PTR_ADD $aj,$ap,$j
 | 
						||
	$PTR_ADD $nj,$np,$j
 | 
						||
	$LD	$aj,($aj)
 | 
						||
	$LD	$nj,($nj)
 | 
						||
 | 
						||
	$MULTU	($aj,$bi)
 | 
						||
	$ADDU	$lo0,$alo,$hi0
 | 
						||
	$ADDU	$lo1,$nlo,$hi1
 | 
						||
	sltu	$at,$lo0,$hi0
 | 
						||
	sltu	$t0,$lo1,$hi1
 | 
						||
	$ADDU	$hi0,$ahi,$at
 | 
						||
	$ADDU	$hi1,$nhi,$t0
 | 
						||
	mflo	($alo,$aj,$bi)
 | 
						||
	mfhi	($ahi,$aj,$bi)
 | 
						||
 | 
						||
	$ADDU	$lo0,$tj
 | 
						||
	addu	$j,$BNSZ
 | 
						||
	$MULTU	($nj,$m1)
 | 
						||
	sltu	$at,$lo0,$tj
 | 
						||
	$ADDU	$lo1,$lo0
 | 
						||
	$ADDU	$hi0,$at
 | 
						||
	sltu	$t0,$lo1,$lo0
 | 
						||
	$LD	$tj,2*$BNSZ($tp)
 | 
						||
	$ADDU	$hi1,$t0
 | 
						||
	sltu	$at,$j,$num
 | 
						||
	mflo	($nlo,$nj,$m1)
 | 
						||
	mfhi	($nhi,$nj,$m1)
 | 
						||
	$ST	$lo1,($tp)
 | 
						||
	bnez	$at,.Linner
 | 
						||
	$PTR_ADD $tp,$BNSZ
 | 
						||
	.set	reorder
 | 
						||
 | 
						||
	$ADDU	$lo0,$alo,$hi0
 | 
						||
	sltu	$at,$lo0,$hi0
 | 
						||
	$ADDU	$hi0,$ahi,$at
 | 
						||
	$ADDU	$lo0,$tj
 | 
						||
	sltu	$t0,$lo0,$tj
 | 
						||
	$ADDU	$hi0,$t0
 | 
						||
 | 
						||
	$LD	$tj,2*$BNSZ($tp)
 | 
						||
	$ADDU	$lo1,$nlo,$hi1
 | 
						||
	sltu	$at,$lo1,$hi1
 | 
						||
	$ADDU	$hi1,$nhi,$at
 | 
						||
	$ADDU	$lo1,$lo0
 | 
						||
	sltu	$t0,$lo1,$lo0
 | 
						||
	$ADDU	$hi1,$t0
 | 
						||
	$ST	$lo1,($tp)
 | 
						||
 | 
						||
	$ADDU	$lo1,$hi1,$hi0
 | 
						||
	sltu	$hi1,$lo1,$hi0
 | 
						||
	$ADDU	$lo1,$tj
 | 
						||
	sltu	$at,$lo1,$tj
 | 
						||
	$ADDU	$hi1,$at
 | 
						||
	$ST	$lo1,$BNSZ($tp)
 | 
						||
	$ST	$hi1,2*$BNSZ($tp)
 | 
						||
 | 
						||
	addu	$i,$BNSZ
 | 
						||
	sltu	$t0,$i,$num
 | 
						||
	bnez	$t0,.Louter
 | 
						||
 | 
						||
	.set	noreorder
 | 
						||
	$PTR_ADD $tj,$sp,$num	# &tp[num]
 | 
						||
	move	$tp,$sp
 | 
						||
	move	$ap,$sp
 | 
						||
	li	$hi0,0		# clear borrow bit
 | 
						||
 | 
						||
.align	4
 | 
						||
.Lsub:	$LD	$lo0,($tp)
 | 
						||
	$LD	$lo1,($np)
 | 
						||
	$PTR_ADD $tp,$BNSZ
 | 
						||
	$PTR_ADD $np,$BNSZ
 | 
						||
	$SUBU	$lo1,$lo0,$lo1	# tp[i]-np[i]
 | 
						||
	sgtu	$at,$lo1,$lo0
 | 
						||
	$SUBU	$lo0,$lo1,$hi0
 | 
						||
	sgtu	$hi0,$lo0,$lo1
 | 
						||
	$ST	$lo0,($rp)
 | 
						||
	or	$hi0,$at
 | 
						||
	sltu	$at,$tp,$tj
 | 
						||
	bnez	$at,.Lsub
 | 
						||
	$PTR_ADD $rp,$BNSZ
 | 
						||
 | 
						||
	$SUBU	$hi0,$hi1,$hi0	# handle upmost overflow bit
 | 
						||
	move	$tp,$sp
 | 
						||
	$PTR_SUB $rp,$num	# restore rp
 | 
						||
	not	$hi1,$hi0
 | 
						||
 | 
						||
.Lcopy:	$LD	$nj,($tp)	# conditional move
 | 
						||
	$LD	$aj,($rp)
 | 
						||
	$ST	$zero,($tp)
 | 
						||
	$PTR_ADD $tp,$BNSZ
 | 
						||
	and	$nj,$hi0
 | 
						||
	and	$aj,$hi1
 | 
						||
	or	$aj,$nj
 | 
						||
	sltu	$at,$tp,$tj
 | 
						||
	$ST	$aj,($rp)
 | 
						||
	bnez	$at,.Lcopy
 | 
						||
	$PTR_ADD $rp,$BNSZ
 | 
						||
 | 
						||
	li	$a0,1
 | 
						||
	li	$t0,1
 | 
						||
 | 
						||
	.set	noreorder
 | 
						||
	move	$sp,$fp
 | 
						||
	$REG_L	$fp,($FRAMESIZE-1)*$SZREG($sp)
 | 
						||
	$REG_L	$s11,($FRAMESIZE-2)*$SZREG($sp)
 | 
						||
	$REG_L	$s10,($FRAMESIZE-3)*$SZREG($sp)
 | 
						||
	$REG_L	$s9,($FRAMESIZE-4)*$SZREG($sp)
 | 
						||
	$REG_L	$s8,($FRAMESIZE-5)*$SZREG($sp)
 | 
						||
	$REG_L	$s7,($FRAMESIZE-6)*$SZREG($sp)
 | 
						||
	$REG_L	$s6,($FRAMESIZE-7)*$SZREG($sp)
 | 
						||
	$REG_L	$s5,($FRAMESIZE-8)*$SZREG($sp)
 | 
						||
	$REG_L	$s4,($FRAMESIZE-9)*$SZREG($sp)
 | 
						||
___
 | 
						||
$code.=<<___ if ($flavour =~ /nubi/i);
 | 
						||
	$REG_L	$s3,($FRAMESIZE-10)*$SZREG($sp)
 | 
						||
	$REG_L	$s2,($FRAMESIZE-11)*$SZREG($sp)
 | 
						||
	$REG_L	$s1,($FRAMESIZE-12)*$SZREG($sp)
 | 
						||
	$REG_L	$s0,($FRAMESIZE-13)*$SZREG($sp)
 | 
						||
___
 | 
						||
$code.=<<___;
 | 
						||
	jr	$ra
 | 
						||
	$PTR_ADD $sp,$FRAMESIZE*$SZREG
 | 
						||
.end	bn_mul_mont_internal
 | 
						||
.rdata
 | 
						||
.asciiz	"Montgomery Multiplication for MIPS, CRYPTOGAMS by <appro\@openssl.org>"
 | 
						||
___
 | 
						||
 | 
						||
$code =~ s/\`([^\`]*)\`/eval $1/gem;
 | 
						||
 | 
						||
print $code;
 | 
						||
close STDOUT or die "error closing STDOUT: $!";
 |