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Revert "add qca"

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This reverts commit 8f8028cb7f.
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suyuan 2022-09-13 13:54:06 +08:00
parent 8f8028cb7f
commit a48d42f304
86 changed files with 0 additions and 50519 deletions
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26
qca/aq-fw-download/Makefile
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include $(TOPDIR)/rules.mk
PKG_NAME:=aq-fw-download
PKG_RELEASE:=$(AUTORELEASE)
PKG_FLAGS:=nonshared
include $(INCLUDE_DIR)/package.mk
define Package/aq-fw-download
SECTION:=firmware
CATEGORY:=Firmware
DEPENDS:=@TARGET_ipq807x
TITLE:=Aquantia FW downloader utitlity
endef
define Package/aq-fw-download/description
Aquantia FW downloader utitlity
endef
define Package/aq-fw-download/install
$(INSTALL_DIR) $(1)/sbin
$(INSTALL_BIN) $(PKG_BUILD_DIR)/aq-fw-download $(1)/sbin/aq-fw-download
endef
$(eval $(call BuildPackage,aq-fw-download))

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qca/aq-fw-download/src/Makefile
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ifndef CFLAGS
CFLAGS = -O2 -g
endif
INCLUDES=-Iinclude -Iinclude/registerMap \
-Iinclude/registerMap/APPIA \
-Iinclude/registerMap/HHD
all: aq-fw-download
%.o: %.c
$(CC) $(INCLUDES) $(CFLAGS) -c -o $@ $^
aq-fw-download: mdioBootLoadCLD.o src/AQ_PhyInterface.o src/AQ_API.o
$(CC) $(LDFLAGS) -o $@ $^ $(LIBS)

246
qca/aq-fw-download/src/include/AQ_API.h
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/*
* Copyright (c) 2015, Aquantia
*
* Permission to use, copy, modify, and/or distribute this software for any
* purpose with or without fee is hereby granted, provided that the above
* copyright notice and this permission notice appear in all copies.
*
* THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
* WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
* MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
* ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
* WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
* ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
* OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
*/
/*! \file
This file contains the AQ_API function and datatype declarations. */
#ifndef AQ_API_TOKEN
#define AQ_API_TOKEN
#include <stdint.h>
#include "AQ_User.h"
#include "AQ_ReturnCodes.h"
/*******************************************************************
General
*******************************************************************/
#ifdef __cplusplus
extern "C" {
#endif
/*! This typedef defines the bool datatype which takes the values
true and false.*/
typedef enum {False = 0, True = 1} AQ_boolean;
/*@}*/
/*******************************************************************
Device Identity
*******************************************************************/
/*! \defgroup deviceIdentity Device Identity
All AQ_API functions accept a parameter identifying the target PHY that
should be acted upon. */
/*@{*/
/*! This enumeration is used to describe the different types of
Aquantia PHY.*/
typedef enum
{
/*! 1/2/4-port package, 40nm architechture.*/
AQ_DEVICE_APPIA,
/*! 1/2/4-port package, 28nm architechture.*/
AQ_DEVICE_HHD
} AQ_API_Device;
/*! This structure is used to specify a particular Aquantia PHY port
within the system.*/
typedef struct
{
/*! The type of Aquantia PHY*/
AQ_API_Device device;
/*! Uniquely identifies the port within the system. AQ_Port must be
defined to whatever data type is suitable for the platform.
AQ_API functions will never do anything with PHY_ID other than
pass it down to the platform's PHY register read/write
functions.*/
AQ_Port PHY_ID;
} AQ_API_Port;
/*@}*/
/*! This function boot-loads the instruction and data memory (IRAM and
DRAM) of a set of Aquantia PHYs from a .cld format image file (the
same image file used to burn the FLASH). During boot-load of each
Aquantia PHY, the processor is halted, and after programming is
complete the processor is released. Note that calling this
function leaves the daisy-chain disabled to prevent RAM over-
write. To exit MDIO boot-load mode, use the function
AQ_API_EnableDaisyChain.
Unlike most of the other functions in this API, this function can
operate on a group of PHYs simultaneously. This is referred to as
gang-loading. To facilitate this, this function takes as
parameters 3 parallel arrays: PHY_IDs, provisioningAddresses, and
resultCodes. The length of these arrays must be identical, and is
specified by the num_PHY_IDs parameter.
In order to check the integrity of the boot-load operation, a
CRC-16 value is calculated over the IRAM and DRAM. After the image
has been loaded, this value is directly compared against each
PHY's Mailbox CRC-16 in 1E.0201.
The value of register 1E.C441 must be the same for all the boot-
loaded PHYs. This will be checked before the boot-load is
performed, and if a non-uniform value is read from any of the
PHYs, the function will fail before any writes are performed.
A separate result code is returned for each of the boot-loaded
PHYs, in the OUT parameter, resultCodes.
Individual Port Return codes:
AQ_RET_BOOTLOAD_PROVADDR_OOR: The specified provisioning address
was outside of the permitted range.
AQ_RET_BOOTLOAD_NONUNIFORM_REGVALS: The values of the register(s)
that must be uniform across the ports being bootloaded were not
uniform.
AQ_RET_BOOTLOAD_CRC_MISMATCH: The image was completely loaded into
memory, but the after the port exited bootload the running
checksum that was read from the uP memory mailbox was not the
expected value. This indicates that the memory has potentially
been corrupted, and the PHY should be reset before trying the
bootload again.
Overall Return codes (the return value from the function call):
AQ_RET_OK: all ports were successfully bootloaded.
AQ_RET_ERROR: One or more ports were not successfully bootloaded.
*/
AQ_Retcode AQ_API_WriteBootLoadImage
(
/*! An array identifying the target PHY ports.*/
AQ_API_Port** ports,
/*! The length of the arrays ports, provisioningAddresses, and
resultCodes. These are parallel arrays, and must all be of the
same length.*/
unsigned int numPorts,
/*! The provisioning addresses of each of the PHYs specified in
ports. This can range from 0 through 47, and is also known as
the daisy-chain address or the hop-count. If the PHYs are
connected to a FLASH using the daisy-chain, this is the distance
from the PHY to the FLASH, and is used to identify customized
provisioning for each PHY from the provisioning data within the
image. Otherwise, it is an arbitrary number. The length of this
array must match the length of ports.*/
unsigned int* provisioningAddresses,
/*! OUT: The result code indicating success or failure of boot-
loading each of the PHYs specified in ports.*/
AQ_Retcode* resultCodes,
/*! A pointer to the size of the image (in bytes) that is being
loaded into the Aquantia PHY.*/
uint32_t* imageSizePointer,
/*! The image being loaded into the Aquantia PHY. This is the same
regardless of whether the target is internal RAM or FLASH.*/
uint8_t* image,
/*! The 5-bit address to be used during the gang-loading operation.
During the boot-loading process, each of the PHYs specified in
ports will be changed such that they are addressed on the MDIO
bus at gangloadAddress. This allows all the PHYs to be loaded
simultaneously. Before returning, each PHY will be moved back to
its original MDIO address. If ports contains only a single
element, callers will probably want to use the PHY's original
MDIO address for this parameter.*/
uint8_t gangload_MDIO_address,
/*! The address of the PHYs while in gangload mode. This is
ultimately some combination of the system address and the
gangload MDIO address, specified by gangload_MDIO_address. For
most platforms, gangload_MDIO_address and gangload_PHY_ID should
have the same value.*/
AQ_API_Port* gangloadPort
);
/*! This function boot-loads the instruction and data memory (IRAM and
DRAM) of a set of Aquantia PHYs from a .cld format image file (the
same image file used to burn the FLASH), as well as a separately
provided provisioning table image file.The provisioning table
image allows additional provisioning to be provided, beyond what
is built in to the .cld image. If provTableSizePointer or
provTableImage are NULL, this function behaves like
AQ_API_WriteBootLoadImage.
Aside from the additional provisioing table, this function behaves
exactly the same as AQ_API_WriteBootLoadImage. For additional
documentation and information on return codes, refer to
AQ_API_WriteBootLoadImage.
Individual Port Return codes (same as AQ_API_WriteBootLoadImage,
plus):
AQ_RET_BOOTLOAD_PROVTABLE_TOO_LARGE: The supplied provisioning
table image does not fit within the alloted space.*/
AQ_Retcode AQ_API_WriteBootLoadImageWithProvTable
(
/*! An array identifying the target PHY ports.*/
AQ_API_Port** ports,
/*! The length of the arrays ports, provisioningAddresses, and
resultCodes. These are parallel arrays, and must all be of the
same length.*/
unsigned int numPorts,
/*! The provisioning addresses of each of the PHYs specified in
ports. This can range from 0 through 47, and is also known as
the daisy-chain address or the hop-count. If the PHYs are
connected to a FLASH using the daisy-chain, this is the distance
from the PHY to the FLASH, and is used to identify customized
provisioning for each PHY from the provisioning data within the
image. Otherwise, it is an arbitrary number. The length of this
array must match the length of ports.*/
unsigned int* provisioningAddresses,
/*! OUT: The result code indicating success or failure of boot-
loading each of the PHYs specified in ports.*/
AQ_Retcode* resultCodes,
/*! A pointer to the size of the image (in bytes) that is being
loaded into the Aquantia PHY.*/
uint32_t* imageSizePointer,
/*! The image being loaded into the Aquantia PHY. This is the same
regardless of whether the target is internal RAM or FLASH.*/
uint8_t* image,
/*! The 5-bit address to be used during the gang-loading operation.
During the boot-loading process, each of the PHYs specified in
ports will be changed such that they are addressed on the MDIO
bus at gangloadAddress. This allows all the PHYs to be loaded
simultaneously. Before returning, each PHY will be moved back to
its original MDIO address. If ports contains only a single
element, callers will probably want to use the PHY's original
MDIO address for this parameter.*/
uint8_t gangload_MDIO_address,
/*! The address of the PHYs while in gangload mode. This is
ultimately some combination of the system address and the
gangload MDIO address, specified by gangload_MDIO_address. For
most platforms, gangload_MDIO_address and gangload_PHY_ID should
have the same value.*/
AQ_API_Port* gangloadPort,
/*! A pointer to the size of the provTableImage (in bytes) that is
being loaded into the Aquantia PHY.*/
uint32_t* provTableSizePointer,
/*! The additional provisioning table image being loaded into the
Aquantia PHY.*/
uint8_t* provTableImage
);
/*! Calling this function disables boot-loading and enables the daisy-
chain. This would typically be called after using MDIO boot-
loading on a daisy-chain enabled PHY. Re-enabling the daisy-chain
after performing an MDIO bootload will cause the PHY to reboot
from FLASH.*/
AQ_Retcode AQ_API_EnableDaisyChain
(
/*! The target PHY port.*/
AQ_API_Port* port
);
#ifdef __cplusplus
}
#endif
#endif

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qca/aq-fw-download/src/include/AQ_PhyInterface.h
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/* AQ_PhyInterface.h */
/***********************************************************************
* Copyright (c) 2015, Aquantia
*
* Permission to use, copy, modify, and/or distribute this software for any
* purpose with or without fee is hereby granted, provided that the above
* copyright notice and this permission notice appear in all copies.
*
* THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
* WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
* MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
* ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
* WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
* ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
* OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
*
* Description:
*
* Declares the base PHY register read and write functions that are
* called by the API functions. The platform integrator must provide
* the implementation of these routines.
*
***********************************************************************/
/*! \file
* Declares the base PHY register read and write functions that are
* called by the API functions. The platform integrator must provide
* the implementation of these routines. */
#ifndef AQ_PHY_INTERFACE_TOKEN
#define AQ_PHY_INTERFACE_TOKEN
#include "AQ_API.h"
#include "AQ_User.h"
#ifdef __cplusplus
extern "C" {
#endif
/*******************************************************************
MDIO Access Functions
*******************************************************************/
/*! \defgroup mdioAccessFunctions MDIO Access Functions
The MDIO access functions are required by the API to access the register space
of each Aquantia PHY deployed in a system. The body of these functions needs to
be written by the system designer, as the method of accessing the PHY will
be unique to the target system. They are designed to be generic read and
write access functions, as the MDIO addressing scheme relies on each
MMD to maintain a 16 bit address pointer that determines the register where
the next read or write is coming from. Consequently, various levels of
optimization of the MDIO interface are possible: from re-writing the MMD
address pointer on every transaction, to storing shadow copies of the MMD
address pointers and only updating the MMD address pointer as necessary.
Thus these functions leave the MDIO optimization to the system engineer.
*/
/*@{*/
/*! Provides generic synchronous PHY register write functionality. It is the
* responsibility of the system designer to provide the specific MDIO address
* pointer updates, etc. in order to accomplish this write operation.
* It will be assumed that the write has been completed by the time this
* function returns.*/
void AQ_API_MDIO_Write
(
/*! Uniquely identifies the port within the system. AQ_Port must be
* defined to a whatever data type is suitable for the platform.*/
AQ_Port PHY_ID,
/*! The address of the MMD within the target PHY. */
unsigned int MMD,
/*! The 16-bit address of the PHY register being written. */
unsigned int address,
/*! The 16-bits of data to write to the specified PHY register. */
unsigned int data
);
/*! Provides generic synchronous PHY register read functionality. It is the
* responsibility of the system designer to provide the specific MDIO address
* pointer updates, etc. in order to accomplish this read operation.*/
unsigned int AQ_API_MDIO_Read
(
/*! Uniquely identifies the port within the system. AQ_Port must be
* defined to a whatever data type is suitable for the platform.*/
AQ_Port PHY_ID,
/*! The address of the MMD within the target PHY. */
unsigned int MMD,
/*! The 16-bit address of the PHY register being read. */
unsigned int address
);
#ifdef AQ_PHY_SUPPORTS_BLOCK_READ_WRITE
/*! Provides generic asynchronous/buffered PHY register write functionality.
* It is the responsibility of the system designer to provide the specific
* MDIO address pointer updates, etc. in order to accomplish this write
* operation. The write need not necessarily have been completed by the time
* this function returns. All register reads and writes to a particular PHY_ID
* that are requested by calling AQ_API_MDIO_BlockWrite or AQ_API_MDIO_BlockRead
* MUST be performed in the order that the calls are made. */
void AQ_API_MDIO_BlockWrite
(
/*! Uniquely identifies the port within the system. AQ_Port must be
* defined to a whatever data type is suitable for the platform.*/
AQ_Port PHY_ID,
/*! The address of the MMD within the target PHY. */
unsigned int MMD,
/*! The 16-bit address of the PHY register being written. */
unsigned int address,
/*! The 16-bits of data to write to the specified PHY register. */
unsigned int data
);
/*! Provides generic asynchronous/buffered PHY register read functionality.
* It is the responsibility of the system designer to provide the specific
* MDIO address pointer updates, etc. in order to accomplish this read
* operation. All register reads and writes to a particular PHY_ID that
* are requested by calling AQ_API_MDIO_BlockWrite or AQ_API_MDIO_BlockRead
* MUST be performed in the order that the calls are made. The register value
* may subsequently be fetched by calling AQ_API_MDIO_BlockOperationExecute.*/
void AQ_API_MDIO_BlockRead
(
/*! Uniquely identifies the port within the system. AQ_Port must be
* defined to a whatever data type is suitable for the platform.*/
AQ_Port PHY_ID,
/*! The address of the MMD within the target PHY. */
unsigned int MMD,
/*! The 16-bit address of the PHY register being read. */
unsigned int address
);
/* Retrieve the results of all PHY register reads to PHY_ID previously
* requested via calls to AQ_API_MDIO_BlockRead. The read and write
* operations previously performed by calls to AQ_API_MDIO_BlockRead and
* AQ_API_MDIO_BlockRead must have all been completed by the time this
* function returns, in the order that the calls were performed. The
* return value is an array representing the fetched results of all
* pending calls to AQ_API_MDIO_BlockRead, in the order that the calls
* were performed. Callers should track the number of pending block
* reads to determine the size of the returned array. */
unsigned int * AQ_API_MDIO_BlockOperationExecute
(
/*! Uniquely identifies the port within the system. AQ_Port must be
* defined to a whatever data type is suitable for the platform.*/
AQ_Port PHY_ID
);
/* Returns the maximum number of asynchronous/buffered PHY register
* read/write operations. Callers will call AQ_API_MDIO_BlockOperationExecute
* before issuing additional calls to AQ_API_MDIO_BlockWrite or
* AQ_API_MDIO_BlockRead to avoid a buffer overflow. */
unsigned int AQ_API_MDIO_MaxBlockOperations
(
);
#endif
/*@}*/
#ifdef __cplusplus
}
#endif
#endif

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qca/aq-fw-download/src/include/AQ_PlatformRoutines.h
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/*AQ_PlatformRoutines.h*/
/************************************************************************************
* Copyright (c) 2015, Aquantia
*
* Permission to use, copy, modify, and/or distribute this software for any
* purpose with or without fee is hereby granted, provided that the above
* copyright notice and this permission notice appear in all copies.
*
* THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
* WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
* MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
* ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
* WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
* ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
* OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
*
* Description:
*
* Declares the platform interface functions that will be called by AQ_API
* functions. The platform integrator must provide the implementation of
* these functions.
*
************************************************************************************/
/*! \file
* Declares the platform interface functions that will be called by AQ_API
* functions. The platform integrator must provide the implementation of
* these functions. */
#ifndef AQ_PHY_PLATFORMROUTINES_TOKEN
#define AQ_PHY_PLATFORMROUTINES_TOKEN
#include <stdint.h>
#include "AQ_API.h"
#include "AQ_User.h"
#include "AQ_ReturnCodes.h"
#ifdef __cplusplus
extern "C" {
#endif
/*******************************************************************
Time Delay
*******************************************************************/
/*! \defgroup delay Time Delay
@{
*/
/*! Returns after at least milliseconds have elapsed. This must be implemented
* in a platform-approriate way. AQ_API functions will call this function to
* block for the specified period of time. If necessary, PHY register reads
* may be performed on port to busy-wait. */
void AQ_API_Wait
(
uint32_t milliseconds, /*!< The delay in milliseconds */
AQ_API_Port* port /*!< The PHY to use if delay reads are necessary*/
);
/*@}*/
#ifdef __cplusplus
}
#endif
#endif

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qca/aq-fw-download/src/include/AQ_RegMacro.h
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/* Copyright (c) 2015, Aquantia
*
* Permission to use, copy, modify, and/or distribute this software for any
* purpose with or without fee is hereby granted, provided that the above
* copyright notice and this permission notice appear in all copies.
*
* THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
* WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
* MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
* ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
* WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
* ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
* OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
*/
/*! \file
This file contains macros for accessing the AQ PHYs' registers
using the device-specific register map data structures and definitions.
*/
#ifndef AQ_REG_MACRO_TOKEN
#define AQ_REG_MACRO_TOKEN
#include "AQ_PhyInterface.h"
#define AQ_API_ReadRegister(id,reg,wd) AQ_API_ReadRegister_DeviceRestricted(APPIA_HHD,id,reg,wd)
#define AQ_API_ReadRegister_DeviceRestricted(devices,id,reg,wd) AQ_API_ReadRegister_Devs_ ## devices(id,reg,wd)
#define AQ_API_ReadRegister_Devs_APPIA(id,reg,wd) \
((port->device == AQ_DEVICE_APPIA) ? AQ_API_MDIO_Read (id,reg ## _APPIA_mmdAddress,(reg ## _APPIA_baseRegisterAddress + wd)) : \
(0))
#define AQ_API_ReadRegister_Devs_HHD(id,reg,wd) \
((port->device == AQ_DEVICE_HHD) ? AQ_API_MDIO_Read (id,reg ## _HHD_mmdAddress,(reg ## _HHD_baseRegisterAddress + wd)) : \
(0))
#define AQ_API_ReadRegister_Devs_APPIA_HHD(id,reg,wd) \
((port->device == AQ_DEVICE_HHD) ? AQ_API_MDIO_Read (id,reg ## _HHD_mmdAddress,(reg ## _HHD_baseRegisterAddress + wd)) : \
((port->device == AQ_DEVICE_APPIA) ? AQ_API_MDIO_Read (id,reg ## _APPIA_mmdAddress,(reg ## _APPIA_baseRegisterAddress + wd)) : \
(0)))
#define AQ_API_ReadRegister_Devs_HHD_APPIA(id,reg,wd) AQ_API_ReadRegister_Devs_APPIA_HHD(id,reg,wd)
#define AQ_API_WriteRegister(id,reg,wd,value) AQ_API_WriteRegister_DeviceRestricted(APPIA_HHD,id,reg,wd,value)
#define AQ_API_WriteRegister_DeviceRestricted(devices,id,reg,wd,value) AQ_API_WriteRegister_Devs_ ## devices(id,reg,wd,value)
#define AQ_API_WriteRegister_Devs_APPIA(id,reg,wd,value) \
((port->device == AQ_DEVICE_APPIA) ? AQ_API_MDIO_Write (id,reg ## _APPIA_mmdAddress,(reg ## _APPIA_baseRegisterAddress + wd),value) : \
((void)0))
#define AQ_API_WriteRegister_Devs_HHD(id,reg,wd,value) \
((port->device == AQ_DEVICE_HHD) ? AQ_API_MDIO_Write (id,reg ## _HHD_mmdAddress,(reg ## _HHD_baseRegisterAddress + wd),value) : \
((void)0))
#define AQ_API_WriteRegister_Devs_APPIA_HHD(id,reg,wd,value) \
((port->device == AQ_DEVICE_HHD) ? AQ_API_MDIO_Write (id,reg ## _HHD_mmdAddress,(reg ## _HHD_baseRegisterAddress + wd),value) : \
((port->device == AQ_DEVICE_APPIA) ? AQ_API_MDIO_Write (id,reg ## _APPIA_mmdAddress,(reg ## _APPIA_baseRegisterAddress + wd),value) : \
((void)0)))
#define AQ_API_WriteRegister_Devs_HHD_APPIA(id,reg,wd,value) AQ_API_WriteRegister_Devs_APPIA_HHD(id,reg,wd,value)
#ifdef AQ_PHY_SUPPORTS_BLOCK_READ_WRITE
#define AQ_API_BlockReadRegister(id,reg,wd) AQ_API_BlockReadRegister_DeviceRestricted(APPIA_HHD,id,reg,wd)
#define AQ_API_BlockReadRegister_DeviceRestricted(devices,id,reg,wd) AQ_API_BlockReadRegister_Devs_ ## devices(id,reg,wd)
#define AQ_API_BlockReadRegister_Devs_APPIA(id,reg,wd) \
((port->device == AQ_DEVICE_APPIA) ? AQ_API_MDIO_BlockRead (id,reg ## _APPIA_mmdAddress,(reg ## _APPIA_baseRegisterAddress + wd)) : \
((void)0))
#define AQ_API_BlockReadRegister_Devs_HHD(id,reg,wd) \
((port->device == AQ_DEVICE_HHD) ? AQ_API_MDIO_BlockRead (id,reg ## _HHD_mmdAddress,(reg ## _HHD_baseRegisterAddress + wd)) : \
((void)0))
#define AQ_API_BlockReadRegister_Devs_APPIA_HHD(id,reg,wd) \
((port->device == AQ_DEVICE_HHD) ? AQ_API_MDIO_BlockRead (id,reg ## _HHD_mmdAddress,(reg ## _HHD_baseRegisterAddress + wd)) : \
((port->device == AQ_DEVICE_APPIA) ? AQ_API_MDIO_BlockRead (id,reg ## _APPIA_mmdAddress,(reg ## _APPIA_baseRegisterAddress + wd)) : \
((void)0)))
#define AQ_API_BlockReadRegister_Devs_HHD_APPIA(id,reg,wd) AQ_API_BlockReadRegister_Devs_APPIA_HHD(id,reg,wd)
#define AQ_API_BlockWriteRegister(id,reg,wd,value) AQ_API_BlockWriteRegister_DeviceRestricted(APPIA_HHD,id,reg,wd,value)
#define AQ_API_BlockWriteRegister_DeviceRestricted(devices,id,reg,wd,value) AQ_API_BlockWriteRegister_Devs_ ## devices(id,reg,wd,value)
#define AQ_API_BlockWriteRegister_Devs_APPIA(id,reg,wd,value) \
((port->device == AQ_DEVICE_APPIA) ? AQ_API_MDIO_BlockWrite (id,reg ## _APPIA_mmdAddress,(reg ## _APPIA_baseRegisterAddress + wd),value) : \
((void)0))
#define AQ_API_BlockWriteRegister_Devs_HHD(id,reg,wd,value) \
((port->device == AQ_DEVICE_HHD) ? AQ_API_MDIO_BlockWrite (id,reg ## _HHD_mmdAddress,(reg ## _HHD_baseRegisterAddress + wd),value) : \
((void)0))
#define AQ_API_BlockWriteRegister_Devs_APPIA_HHD(id,reg,wd,value) \
((port->device == AQ_DEVICE_HHD) ? AQ_API_MDIO_BlockWrite (id,reg ## _HHD_mmdAddress,(reg ## _HHD_baseRegisterAddress + wd),value) : \
((port->device == AQ_DEVICE_APPIA) ? AQ_API_MDIO_BlockWrite (id,reg ## _APPIA_mmdAddress,(reg ## _APPIA_baseRegisterAddress + wd),value) : \
((void)0)))
#define AQ_API_BlockWriteRegister_Devs_HHD_APPIA(id,reg,wd,value) AQ_API_BlockWriteRegister_Devs_APPIA_HHD(id,reg,wd,value)
#endif
#define AQ_API_Variable(reg) AQ_API_Variable_DeviceRestricted(APPIA_HHD,reg)
#define AQ_API_Variable_DeviceRestricted(devices,reg) AQ_API_Variable_Devs_ ## devices(reg)
#define AQ_API_Variable_Devs_APPIA(reg) uint8_t _local ## reg ## _space[ sizeof(reg ## _BiggestVersion) ];\
reg ## _APPIA* _local ## reg ## _APPIA = (reg ## _APPIA*) _local ## reg ## _space; \
#define AQ_API_Variable_Devs_HHD(reg) uint8_t _local ## reg ## _space[ sizeof(reg ## _BiggestVersion) ];\
reg ## _HHD* _local ## reg ## _HHD = (reg ## _HHD*) _local ## reg ## _space; \
#define AQ_API_Variable_Devs_APPIA_HHD(reg) uint8_t _local ## reg ## _space[ sizeof(reg ## _BiggestVersion) ];\
reg ## _APPIA* _local ## reg ## _APPIA = (reg ## _APPIA*) _local ## reg ## _space; \
reg ## _HHD* _local ## reg ## _HHD = (reg ## _HHD*) _local ## reg ## _space; \
#define AQ_API_Variable_Devs_HHD_APPIA(reg) AQ_API_Variable_Devs_APPIA_HHD(reg)
#define AQ_API_DeclareLocalStruct(reg,localvar) AQ_API_DeclareLocalStruct_DeviceRestricted(APPIA_HHD,reg,localvar)
#define AQ_API_DeclareLocalStruct_DeviceRestricted(devices,reg,localvar) AQ_API_DeclareLocalStruct_Devs_ ## devices(reg,localvar)
#define AQ_API_DeclareLocalStruct_Devs_APPIA(reg,localvar) uint8_t localvar ## _space[ sizeof(reg ## _BiggestVersion) ];\
reg ## _APPIA* localvar ## _APPIA = (reg ## _APPIA*) localvar ## _space; \
#define AQ_API_DeclareLocalStruct_Devs_HHD(reg,localvar) uint8_t localvar ## _space[ sizeof(reg ## _BiggestVersion) ];\
reg ## _HHD* localvar ## _HHD = (reg ## _HHD*) localvar ## _space; \
#define AQ_API_DeclareLocalStruct_Devs_APPIA_HHD(reg,localvar) uint8_t localvar ## _space[ sizeof(reg ## _BiggestVersion) ];\
reg ## _APPIA* localvar ## _APPIA = (reg ## _APPIA*) localvar ## _space; \
reg ## _HHD* localvar ## _HHD = (reg ## _HHD*) localvar ## _space; \
#define AQ_API_DeclareLocalStruct_Devs_HHD_APPIA(reg,localvar) AQ_API_DeclareLocalStruct_Devs_APPIA_HHD(reg,localvar)
#define AQ_API_Set(id,reg,field,value) AQ_API_Set_DeviceRestricted(APPIA_HHD,id,reg,field,value)
#define AQ_API_Set_DeviceRestricted(devices,id,reg,field,value) AQ_API_Set_Devs_ ## devices(id,reg,field,value)
#define AQ_API_Set_Devs_APPIA(id,reg,field,value) { \
switch (port->device) { \
case AQ_DEVICE_APPIA: \
_local ## reg ## _APPIA->word_ ## reg ## _APPIA_ ## field = AQ_API_ReadRegister_Devs_APPIA(id,reg,reg ## _APPIA_ ## field); \
if (_local ## reg ## _APPIA->bits_ ## reg ## _APPIA_ ## field.field != value) \
{ \
_local ## reg ## _APPIA->bits_ ## reg ## _APPIA_ ## field.field = value; \
AQ_API_WriteRegister_Devs_APPIA(id,reg,reg ## _APPIA_ ## field,_local ## reg ## _APPIA->word_ ## reg ## _APPIA_ ## field); \
} \
break; \
default: break; \
} \
}
#define AQ_API_Set_Devs_HHD(id,reg,field,value) { \
switch (port->device) { \
case AQ_DEVICE_HHD: \
_local ## reg ## _HHD->word_ ## reg ## _HHD_ ## field = AQ_API_ReadRegister_Devs_HHD(id,reg,reg ## _HHD_ ## field); \
if (_local ## reg ## _HHD->bits_ ## reg ## _HHD_ ## field.field != value) \
{ \
_local ## reg ## _HHD->bits_ ## reg ## _HHD_ ## field.field = value; \
AQ_API_WriteRegister_Devs_HHD(id,reg,reg ## _HHD_ ## field,_local ## reg ## _HHD->word_ ## reg ## _HHD_ ## field); \
} \
break; \
default: break; \
} \
}
#define AQ_API_Set_Devs_APPIA_HHD(id,reg,field,value) { \
switch (port->device) { \
case AQ_DEVICE_APPIA: \
_local ## reg ## _APPIA->word_ ## reg ## _APPIA_ ## field = AQ_API_ReadRegister_Devs_APPIA_HHD(id,reg,reg ## _APPIA_ ## field); \
if (_local ## reg ## _APPIA->bits_ ## reg ## _APPIA_ ## field.field != value) \
{ \
_local ## reg ## _APPIA->bits_ ## reg ## _APPIA_ ## field.field = value; \
AQ_API_WriteRegister_Devs_APPIA_HHD(id,reg,reg ## _APPIA_ ## field,_local ## reg ## _APPIA->word_ ## reg ## _APPIA_ ## field); \
} \
break; \
case AQ_DEVICE_HHD: \
_local ## reg ## _HHD->word_ ## reg ## _HHD_ ## field = AQ_API_ReadRegister_Devs_APPIA_HHD(id,reg,reg ## _HHD_ ## field); \
if (_local ## reg ## _HHD->bits_ ## reg ## _HHD_ ## field.field != value) \
{ \
_local ## reg ## _HHD->bits_ ## reg ## _HHD_ ## field.field = value; \
AQ_API_WriteRegister_Devs_APPIA_HHD(id,reg,reg ## _HHD_ ## field,_local ## reg ## _HHD->word_ ## reg ## _HHD_ ## field); \
} \
break; \
default: break; \
} \
}
#define AQ_API_Set_Devs_HHD_APPIA(id,reg,field,value) AQ_API_Set_Devs_APPIA_HHD(id,reg,field,value)
#define AQ_API_Get(id,reg,field,value) AQ_API_Get_DeviceRestricted(APPIA_HHD,id,reg,field,value)
#define AQ_API_Get_DeviceRestricted(devices,id,reg,field,value) AQ_API_Get_Devs_ ## devices(id,reg,field,value)
#define AQ_API_Get_Devs_APPIA(id,reg,field,value) { \
switch (port->device) { \
case AQ_DEVICE_APPIA: \
_local ## reg ## _APPIA->word_ ## reg ## _APPIA_ ## field = AQ_API_ReadRegister_Devs_APPIA(id,reg,reg ## _APPIA_ ## field); \
value = _local ## reg ## _APPIA->bits_ ## reg ## _APPIA_ ## field.field; \
break; \
default: value = 0; break; \
} \
}
#define AQ_API_Get_Devs_HHD(id,reg,field,value) { \
switch (port->device) { \
case AQ_DEVICE_HHD: \
_local ## reg ## _HHD->word_ ## reg ## _HHD_ ## field = AQ_API_ReadRegister_Devs_HHD(id,reg,reg ## _HHD_ ## field); \
value = _local ## reg ## _HHD->bits_ ## reg ## _HHD_ ## field.field; \
break; \
default: value = 0; break; \
} \
}
#define AQ_API_Get_Devs_APPIA_HHD(id,reg,field,value) { \
switch (port->device) { \
case AQ_DEVICE_APPIA: \
_local ## reg ## _APPIA->word_ ## reg ## _APPIA_ ## field = AQ_API_ReadRegister_Devs_APPIA_HHD(id,reg,reg ## _APPIA_ ## field); \
value = _local ## reg ## _APPIA->bits_ ## reg ## _APPIA_ ## field.field; \
break; \
case AQ_DEVICE_HHD: \
_local ## reg ## _HHD->word_ ## reg ## _HHD_ ## field = AQ_API_ReadRegister_Devs_APPIA_HHD(id,reg,reg ## _HHD_ ## field); \
value = _local ## reg ## _HHD->bits_ ## reg ## _HHD_ ## field.field; \
break; \
default: value = 0; break; \
} \
}
#define AQ_API_Get_Devs_HHD_APPIA(id,reg,field,value) AQ_API_Get_Devs_APPIA_HHD(id,reg,field,value)
#define AQ_API_BitfieldOfLocalStruct(reg,localvar,field) AQ_API_BitfieldOfLocalStruct_DeviceRestricted(APPIA_HHD,reg,localvar,field)
#define AQ_API_BitfieldOfLocalStruct_DeviceRestricted(devices,reg,localvar,field) AQ_API_BitfieldOfLocalStruct_Devs_ ## devices(reg,localvar,field)
#define AQ_API_BitfieldOfLocalStruct_Devs_APPIA(reg,localvar,field) \
((port->device == AQ_DEVICE_APPIA) ? ((localvar ## _APPIA)->bits_ ## reg ## _APPIA ## _ ## field.field) : \
(0))
#define AQ_API_BitfieldOfLocalStruct_Devs_HHD(reg,localvar,field) \
((port->device == AQ_DEVICE_HHD) ? ((localvar ## _HHD)->bits_ ## reg ## _HHD ## _ ## field.field) : \
(0))
#define AQ_API_BitfieldOfLocalStruct_Devs_APPIA_HHD(reg,localvar,field) \
((port->device == AQ_DEVICE_HHD) ? ((localvar ## _HHD)->bits_ ## reg ## _HHD ## _ ## field.field) : \
((port->device == AQ_DEVICE_APPIA) ? ((localvar ## _APPIA)->bits_ ## reg ## _APPIA ## _ ## field.field) : \
(0)))
#define AQ_API_BitfieldOfLocalStruct_Devs_HHD_APPIA(reg,localvar,field) AQ_API_BitfieldOfLocalStruct_Devs_APPIA_HHD(reg,localvar,field)
#define AQ_API_AssignBitfieldOfLocalStruct(reg,localvar,field,value) AQ_API_AssignBitfieldOfLocalStruct_DeviceRestricted(APPIA_HHD,reg,localvar,field,value)
#define AQ_API_AssignBitfieldOfLocalStruct_DeviceRestricted(devices,reg,localvar,field,value) AQ_API_AssignBitfieldOfLocalStruct_Devs_ ## devices(reg,localvar,field,value)
#define AQ_API_AssignBitfieldOfLocalStruct_Devs_APPIA(reg,localvar,field,value) \
((port->device == AQ_DEVICE_APPIA) ? ((localvar ## _APPIA)->bits_ ## reg ## _APPIA ## _ ## field.field = value) : \
(0))
#define AQ_API_AssignBitfieldOfLocalStruct_Devs_HHD(reg,localvar,field,value) \
((port->device == AQ_DEVICE_HHD) ? ((localvar ## _HHD)->bits_ ## reg ## _HHD ## _ ## field.field = value) : \
(0))
#define AQ_API_AssignBitfieldOfLocalStruct_Devs_APPIA_HHD(reg,localvar,field,value) \
((port->device == AQ_DEVICE_HHD) ? ((localvar ## _HHD)->bits_ ## reg ## _HHD ## _ ## field.field = value) : \
((port->device == AQ_DEVICE_APPIA) ? ((localvar ## _APPIA)->bits_ ## reg ## _APPIA ## _ ## field.field = value) : \
(0)))
#define AQ_API_AssignBitfieldOfLocalStruct_Devs_HHD_APPIA(reg,localvar,field,value) AQ_API_AssignBitfieldOfLocalStruct_Devs_APPIA_HHD(reg,localvar,field,value)
#define AQ_API_WordOfLocalStruct(localvar,wd) AQ_API_WordOfLocalStruct_DeviceRestricted(APPIA_HHD,localvar,wd)
#define AQ_API_WordOfLocalStruct_DeviceRestricted(devices,localvar,wd) AQ_API_WordOfLocalStruct_Devs_ ## devices(localvar,wd)
#define AQ_API_WordOfLocalStruct_Devs_APPIA(localvar,wd) \
((port->device == AQ_DEVICE_APPIA) ? ((localvar ## _APPIA)->u ## wd.word_ ## wd) : \
(0))
#define AQ_API_WordOfLocalStruct_Devs_HHD(localvar,wd) \
((port->device == AQ_DEVICE_HHD) ? ((localvar ## _HHD)->u ## wd.word_ ## wd) : \
(0))
#define AQ_API_WordOfLocalStruct_Devs_APPIA_HHD(localvar,wd) \
((port->device == AQ_DEVICE_HHD) ? ((localvar ## _HHD)->u ## wd.word_ ## wd) : \
((port->device == AQ_DEVICE_APPIA) ? ((localvar ## _APPIA)->u ## wd.word_ ## wd) : \
(0)))
#define AQ_API_WordOfLocalStruct_Devs_HHD_APPIA(localvar,wd) AQ_API_WordOfLocalStruct_Devs_APPIA_HHD(localvar,wd)
#define AQ_API_AssignWordOfLocalStruct(localvar,wd,value) AQ_API_AssignWordOfLocalStruct_DeviceRestricted(APPIA_HHD,localvar,wd,value)
#define AQ_API_AssignWordOfLocalStruct_DeviceRestricted(devices,localvar,wd,value) AQ_API_AssignWordOfLocalStruct_Devs_ ## devices(localvar,wd,value)
#define AQ_API_AssignWordOfLocalStruct_Devs_APPIA(localvar,wd,value) \
((port->device == AQ_DEVICE_APPIA) ? ((localvar ## _APPIA)->u ## wd.word_ ## wd = value) : \
(0))
#define AQ_API_AssignWordOfLocalStruct_Devs_HHD(localvar,wd,value) \
((port->device == AQ_DEVICE_HHD) ? ((localvar ## _HHD)->u ## wd.word_ ## wd = value) : \
(0))
#define AQ_API_AssignWordOfLocalStruct_Devs_APPIA_HHD(localvar,wd,value) \
((port->device == AQ_DEVICE_HHD) ? ((localvar ## _HHD)->u ## wd.word_ ## wd = value) : \
((port->device == AQ_DEVICE_APPIA) ? ((localvar ## _APPIA)->u ## wd.word_ ## wd = value) : \
(0)))
#define AQ_API_AssignWordOfLocalStruct_Devs_HHD_APPIA(localvar,wd,value) AQ_API_AssignWordOfLocalStruct_Devs_APPIA_HHD(localvar,wd,value)
#endif

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/* AQ_ReturnCodes.h */
/************************************************************************************
* Copyright (c) 2015, Aquantia
*
* Permission to use, copy, modify, and/or distribute this software for any
* purpose with or without fee is hereby granted, provided that the above
* copyright notice and this permission notice appear in all copies.
*
* THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
* WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
* MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
* ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
* WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
* ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
* OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
*
* Description:
*
* This file defines the AQ_API functions' integral return codes.
*
*
************************************************************************************/
/*! \file
This file defines the AQ_API functions' integral return codes.
*/
#ifndef AQ_RETURNCODES_TOKEN
#define AQ_RETURNCODES_TOKEN
/*! \defgroup ReturnCodes
@{
*/
/*! Most AQ_API functions return AQ_Retcode to report success or failure.
* The values used are defined as preprocessor symbols in AQ_ReturnCodes.h.
* Callers should prefer to test the return values by equivalence to these
* symbols, rather than using the integer values directly, as these may
* not be stable across releases. The set of possible return codes that may
* be returned by a particular API function can be found in the function's
* documentation, as well as information on how to interpret each of the
* possible return codes. */
typedef unsigned int AQ_Retcode;
/*! \defgroup Success
@{ */
#define AQ_RET_OK 0
/*@}*/
/*! \defgroup GeneralErrors
@{ */
#define AQ_RET_ERROR 100
#define AQ_RET_UP_BUSY_TIMEOUT 101
/*@}*/
/*! \defgroup FunctionSpecificResults
@{ */
#define AQ_RET_FLASH_READY 200
#define AQ_RET_FLASH_READINESS_TIMEOUT 204
#define AQ_RET_FLASHINTF_READY 201
#define AQ_RET_FLASHINTF_NOTREADY 202
#define AQ_RET_FLASHINTF_READINESS_TIMEOUT 203
#define AQ_RET_FLASH_TYPE_UNKNOWN 205
#define AQ_RET_FLASH_TYPE_BAD 206
#define AQ_RET_FLASH_IMAGE_CORRUPT 207
#define AQ_RET_FLASH_IMAGE_TOO_LARGE 208
#define AQ_RET_FLASH_IMAGE_MISMATCH 209
#define AQ_RET_FLASH_PAGE_SIZE_CHANGED 210
#define AQ_RET_BOOTLOAD_PROVADDR_OOR 211
#define AQ_RET_BOOTLOAD_NONUNIFORM_REGVALS 212
#define AQ_RET_BOOTLOAD_CRC_MISMATCH 213
#define AQ_RET_BOOTLOAD_PROVTABLE_TOO_LARGE 228
#define AQ_RET_LOOPBACK_BAD_ENTRY_STATE 214
#define AQ_RET_DEBUGTRACE_FREEZE_TIMEOUT 215
#define AQ_RET_DEBUGTRACE_UNFREEZE_TIMEOUT 216
#define AQ_RET_CABLEDIAG_ALREADY_RUNNING 217
#define AQ_RET_CABLEDIAG_STILL_RUNNING 218
#define AQ_RET_CABLEDIAG_BAD_PAIRSTATUS 219
#define AQ_RET_CABLEDIAG_RESULTS_ALREDY_COLLECTED 220
#define AQ_RET_CABLEDIAG_BAD_NUM_SAMPLES 221
#define AQ_RET_CABLEDIAG_REPORTEDPAIR_MISMATCH 222
#define AQ_RET_CABLEDIAG_REPORTEDPAIR_OOR 223
#define AQ_RET_CABLEDIAG_STARTED_PAIR_B 224
#define AQ_RET_CABLEDIAG_STARTED_PAIR_C 225
#define AQ_RET_CABLEDIAG_STARTED_PAIR_D 226
#define AQ_RET_CABLEDIAG_TXENABLE_MISMATCH 227
#define AQ_RET_SERDESEYE_BAD_SERDES_MODE 229
#define AQ_RET_SERDESEYE_BAD_MEAS_COUNT 230
#define AQ_RET_SERDESEYE_MEAS_TIMEOUT 231
#define AQ_RET_SERDESEYE_LANE_OOR 232
#define AQ_RET_SERDESEYE_COORD_OOR 233
#define AQ_RET_PIFMAILBOX_ERROR 234
#define AQ_RET_PIFMAILBOX_TIMEOUT 235
#define AQ_RET_SEC_TABLE_INDEX_OOR 236
/*@}*/
/*@}*/
#endif

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/*AQ_User.h*/
/************************************************************************************
* Copyright (c) 2015, Aquantia
*
* Permission to use, copy, modify, and/or distribute this software for any
* purpose with or without fee is hereby granted, provided that the above
* copyright notice and this permission notice appear in all copies.
*
* THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
* WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
* MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
* ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
* WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
* ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
* OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
*
* Description:
*
* This file contains preprocessor symbol definitions and type definitions
* for the platform-integrator controlled compile-time AQ_API options.
*
************************************************************************************/
/*! \file
This file contains preprocessor symbol definitions and type definitions
for the platform-integrator controlled compile-time AQ_API options.
*/
#ifndef AQ_USER_TOKEN
#define AQ_USER_TOKEN
/*! \defgroup User User Definitions
This module contains the definitions used to configure AQ_API behavior as desired. */
/*@{*/
/*! Specify the proper data type for AQ_Port. This will depend on the
* platform-specific implementation of the PHY register read/write functions.*/
typedef unsigned int AQ_Port;
/*! If defined, AQ_API functions will print various error and info messages
* to stdout. If not, nothing will be printed and AQ_API.c will NOT include
* stdio.h. */
#define AQ_VERBOSE
/*! If defined, the PHY interface supports block (asynchronous) read/write
* operation. If AQ_PHY_SUPPORTS_BLOCK_READ_WRITE is defined, then
* the API will call the block-operation functions and so implementations
* for each must be provided. If AQ_PHY_SUPPORTS_BLOCK_READ_WRITE is not
* defined, they will not be called, and need not be implemented. */
#undef AQ_PHY_SUPPORTS_BLOCK_READ_WRITE
/*! If defined, time.h exists, and so the associated functions wil be used to
* compute the elapsed time spent in a polling loop, to ensure that the
* maximum time-out period will not be exceeded. If not defined, then
* AQ_MDIO_READS_PER_SECOND will be used to calculate the minimum possible
* elapsed time. */
#define AQ_TIME_T_EXISTS
/*! The maximum number of synchronous PHY register reads that can be performed
* per second. A worst case number can be derived as follows:
*
* AQ_MDIO_READS_PER_SECOND = MDIO Clock Frequency / 64
*
* If using MDIO preamble suppression, multiply this number by 2
*
* For instance, if a 5MHz MDIO clock is being used without preamble supression
* AQ_MDIO_READS_PER_SECOND = 78125
*
* If AQ_TIME_T_EXISTS is defined, this will be ignored and need not be
* defined. If AQ_TIME_T_EXISTS is not defined, this must be defined. */
#define AQ_MDIO_READS_PER_SECOND 78125
/*! If defined, after writing to one of the registers that can trigger a
* processor-intensive MDIO operation, AQ_API functions will poll the
* the "processor intensive MDIO operation in progress" bit and wait for it
* to be zero before proceeding. */
#define AQ_ENABLE_UP_BUSY_CHECKS
/*! If defined, the register map header files containing reverse-packed
* structs will be included. If not, the register map header files containing
* non-reverse-packed structs will be included. The proper choice is typically
* a function of the endianness of the platform; on big-endian systems the
* reverse-packed structs should be used, and on little-endian systems the
* non-reverse-packed structs should be used. */
/*#define AQ_REVERSED_BITFIELD_ORDERING*/
/*@}*/
#endif

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/* Copyright (c) 2015, Aquantia
*
* Permission to use, copy, modify, and/or distribute this software for any
* purpose with or without fee is hereby granted, provided that the above
* copyright notice and this permission notice appear in all copies.
*
* THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
* WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
* MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
* ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
* WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
* ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
* OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
*/
#ifndef AQ_REG_GROUP_MAX_SIZES
#define AQ_REG_GROUP_MAX_SIZES
#define AQ_Autonegotiation10GBaseT_ControlRegister_BiggestVersion AQ_Autonegotiation10GBaseT_ControlRegister_HHD
#define AQ_Autonegotiation10GBaseT_StatusRegister_BiggestVersion AQ_Autonegotiation10GBaseT_StatusRegister_HHD
#define AQ_AutonegotiationAdvertisementRegister_BiggestVersion AQ_AutonegotiationAdvertisementRegister_HHD
#define AQ_AutonegotiationEeeAdvertisementRegister_BiggestVersion AQ_AutonegotiationEeeAdvertisementRegister_HHD
#define AQ_AutonegotiationEeeLinkPartnerAbilityRegister_BiggestVersion AQ_AutonegotiationEeeLinkPartnerAbilityRegister_HHD
#define AQ_AutonegotiationExtendedNextPageTransmitRegister_BiggestVersion AQ_AutonegotiationExtendedNextPageTransmitRegister_HHD
#define AQ_AutonegotiationExtendedNextPageUnformattedCodeRegister_BiggestVersion AQ_AutonegotiationExtendedNextPageUnformattedCodeRegister_HHD
#define AQ_AutonegotiationLinkPartnerBasePageAbilityRegister_BiggestVersion AQ_AutonegotiationLinkPartnerBasePageAbilityRegister_HHD
#define AQ_AutonegotiationLinkPartnerExtendedNextPageAbilityRegister_BiggestVersion AQ_AutonegotiationLinkPartnerExtendedNextPageAbilityRegister_HHD
#define AQ_AutonegotiationLinkPartnerExtendedNextPageUnformattedCodeRegister_BiggestVersion AQ_AutonegotiationLinkPartnerExtendedNextPageUnformattedCodeRegister_HHD
#define AQ_AutonegotiationReceiveLinkPartnerStatus_BiggestVersion AQ_AutonegotiationReceiveLinkPartnerStatus_HHD
#define AQ_AutonegotiationReceiveReservedVendorProvisioning_BiggestVersion AQ_AutonegotiationReceiveReservedVendorProvisioning_APPIA
#define AQ_AutonegotiationReceiveReservedVendorStatus_BiggestVersion AQ_AutonegotiationReceiveReservedVendorStatus_HHD
#define AQ_AutonegotiationReceiveVendorAlarms_BiggestVersion AQ_AutonegotiationReceiveVendorAlarms_HHD
#define AQ_AutonegotiationReceiveVendorInterruptMask_BiggestVersion AQ_AutonegotiationReceiveVendorInterruptMask_HHD
#define AQ_AutonegotiationReservedVendorProvisioning_BiggestVersion AQ_AutonegotiationReservedVendorProvisioning_HHD
#define AQ_AutonegotiationReservedVendorStatus_BiggestVersion AQ_AutonegotiationReservedVendorStatus_HHD
#define AQ_AutonegotiationStandardControl_1_BiggestVersion AQ_AutonegotiationStandardControl_1_HHD
#define AQ_AutonegotiationStandardDeviceIdentifier_BiggestVersion AQ_AutonegotiationStandardDeviceIdentifier_HHD
#define AQ_AutonegotiationStandardDevicesInPackage_BiggestVersion AQ_AutonegotiationStandardDevicesInPackage_HHD
#define AQ_AutonegotiationStandardInterruptMask_BiggestVersion AQ_AutonegotiationStandardInterruptMask_HHD
#define AQ_AutonegotiationStandardPackageIdentifier_BiggestVersion AQ_AutonegotiationStandardPackageIdentifier_HHD
#define AQ_AutonegotiationStandardStatus_1_BiggestVersion AQ_AutonegotiationStandardStatus_1_HHD
#define AQ_AutonegotiationStandardStatus_2_BiggestVersion AQ_AutonegotiationStandardStatus_2_HHD
#define AQ_AutonegotiationTransmitVendorAlarms_BiggestVersion AQ_AutonegotiationTransmitVendorAlarms_APPIA
#define AQ_AutonegotiationTransmitVendorInterruptMask_BiggestVersion AQ_AutonegotiationTransmitVendorInterruptMask_HHD
#define AQ_AutonegotiationVendorGlobalInterruptFlags_BiggestVersion AQ_AutonegotiationVendorGlobalInterruptFlags_HHD
#define AQ_AutonegotiationVendorProvisioning_BiggestVersion AQ_AutonegotiationVendorProvisioning_HHD
#define AQ_AutonegotiationVendorStatus_BiggestVersion AQ_AutonegotiationVendorStatus_HHD
#define AQ_GbePhyExtendedWolControl_BiggestVersion AQ_GbePhyExtendedWolControl_HHD
#define AQ_GbePhySgmii0RxStatus_BiggestVersion AQ_GbePhySgmii0RxStatus_HHD
#define AQ_GbePhySgmii0TxStatus_BiggestVersion AQ_GbePhySgmii0TxStatus_HHD
#define AQ_GbePhySgmii1RxStatus_BiggestVersion AQ_GbePhySgmii1RxStatus_HHD
#define AQ_GbePhySgmii1TxStatus_BiggestVersion AQ_GbePhySgmii1TxStatus_HHD
#define AQ_GbePhySgmii1WolStatus_BiggestVersion AQ_GbePhySgmii1WolStatus_HHD
#define AQ_GbePhySgmiiRxAlarms_BiggestVersion AQ_GbePhySgmiiRxAlarms_HHD
#define AQ_GbePhySgmiiRxInterruptMask_BiggestVersion AQ_GbePhySgmiiRxInterruptMask_HHD
#define AQ_GbePhySgmiiTestControl_BiggestVersion AQ_GbePhySgmiiTestControl_HHD
#define AQ_GbePhySgmiiTxAlarms_BiggestVersion AQ_GbePhySgmiiTxAlarms_HHD
#define AQ_GbePhySgmiiTxInterruptMask_BiggestVersion AQ_GbePhySgmiiTxInterruptMask_HHD
#define AQ_GbePhySgmiiWolStatus_BiggestVersion AQ_GbePhySgmiiWolStatus_HHD
#define AQ_GbePhyVendorGlobalInterruptFlags_BiggestVersion AQ_GbePhyVendorGlobalInterruptFlags_HHD
#define AQ_GbePhyWolControl_BiggestVersion AQ_GbePhyWolControl_HHD
#define AQ_GbePhysgmii1WolStatus_BiggestVersion AQ_GbePhysgmii1WolStatus_APPIA
#define AQ_GbeReservedProvisioning_BiggestVersion AQ_GbeReservedProvisioning_HHD
#define AQ_GbeStandardDeviceIdentifier_BiggestVersion AQ_GbeStandardDeviceIdentifier_HHD
#define AQ_GbeStandardDevicesInPackage_BiggestVersion AQ_GbeStandardDevicesInPackage_HHD
#define AQ_GbeStandardPackageIdentifier_BiggestVersion AQ_GbeStandardPackageIdentifier_HHD
#define AQ_GbeStandardStatus_2_BiggestVersion AQ_GbeStandardStatus_2_HHD
#define AQ_GbeStandardVendorDevicesInPackage_BiggestVersion AQ_GbeStandardVendorDevicesInPackage_HHD
#define AQ_GlobalAlarms_BiggestVersion AQ_GlobalAlarms_HHD
#define AQ_GlobalCableDiagnosticImpedance_BiggestVersion AQ_GlobalCableDiagnosticImpedance_HHD
#define AQ_GlobalCableDiagnosticStatus_BiggestVersion AQ_GlobalCableDiagnosticStatus_APPIA
#define AQ_GlobalChipIdentification_BiggestVersion AQ_GlobalChipIdentification_APPIA
#define AQ_GlobalChipRevision_BiggestVersion AQ_GlobalChipRevision_APPIA
#define AQ_GlobalChip_wideStandardInterruptFlags_BiggestVersion AQ_GlobalChip_wideStandardInterruptFlags_HHD
#define AQ_GlobalChip_wideVendorInterruptFlags_BiggestVersion AQ_GlobalChip_wideVendorInterruptFlags_HHD
#define AQ_GlobalControl_BiggestVersion AQ_GlobalControl_HHD
#define AQ_GlobalDaisyChainStatus_BiggestVersion AQ_GlobalDaisyChainStatus_HHD
#define AQ_GlobalDiagnosticProvisioning_BiggestVersion AQ_GlobalDiagnosticProvisioning_HHD
#define AQ_GlobalEeeProvisioning_BiggestVersion AQ_GlobalEeeProvisioning_HHD
#define AQ_GlobalFaultMessage_BiggestVersion AQ_GlobalFaultMessage_HHD
#define AQ_GlobalFirmwareID_BiggestVersion AQ_GlobalFirmwareID_HHD
#define AQ_GlobalGeneralProvisioning_BiggestVersion AQ_GlobalGeneralProvisioning_HHD
#define AQ_GlobalGeneralStatus_BiggestVersion AQ_GlobalGeneralStatus_HHD
#define AQ_GlobalInterruptChip_wideStandardMask_BiggestVersion AQ_GlobalInterruptChip_wideStandardMask_HHD
#define AQ_GlobalInterruptChip_wideVendorMask_BiggestVersion AQ_GlobalInterruptChip_wideVendorMask_HHD
#define AQ_GlobalInterruptMask_BiggestVersion AQ_GlobalInterruptMask_HHD
#define AQ_GlobalLedProvisioning_BiggestVersion AQ_GlobalLedProvisioning_HHD
#define AQ_GlobalMailboxInterface_BiggestVersion AQ_GlobalMailboxInterface_HHD
#define AQ_GlobalMicroprocessorScratchPad_BiggestVersion AQ_GlobalMicroprocessorScratchPad_HHD
#define AQ_GlobalNvrInterface_BiggestVersion AQ_GlobalNvrInterface_HHD
#define AQ_GlobalNvrProvisioning_BiggestVersion AQ_GlobalNvrProvisioning_HHD
#define AQ_GlobalPinStatus_BiggestVersion AQ_GlobalPinStatus_HHD
#define AQ_GlobalPrimaryStatus_BiggestVersion AQ_GlobalPrimaryStatus_APPIA
#define AQ_GlobalReservedProvisioning_BiggestVersion AQ_GlobalReservedProvisioning_HHD
#define AQ_GlobalReservedStatus_BiggestVersion AQ_GlobalReservedStatus_HHD
#define AQ_GlobalResetControl_BiggestVersion AQ_GlobalResetControl_HHD
#define AQ_GlobalSmbus_0Provisioning_BiggestVersion AQ_GlobalSmbus_0Provisioning_HHD
#define AQ_GlobalSmbus_1Provisioning_BiggestVersion AQ_GlobalSmbus_1Provisioning_HHD
#define AQ_GlobalStandardControl_1_BiggestVersion AQ_GlobalStandardControl_1_HHD
#define AQ_GlobalStandardDeviceIdentifier_BiggestVersion AQ_GlobalStandardDeviceIdentifier_HHD
#define AQ_GlobalStandardDevicesInPackage_BiggestVersion AQ_GlobalStandardDevicesInPackage_HHD
#define AQ_GlobalStandardPackageIdentifier_BiggestVersion AQ_GlobalStandardPackageIdentifier_HHD
#define AQ_GlobalStandardStatus_2_BiggestVersion AQ_GlobalStandardStatus_2_HHD
#define AQ_GlobalStandardVendorDevicesInPackage_BiggestVersion AQ_GlobalStandardVendorDevicesInPackage_HHD
#define AQ_GlobalStatus_BiggestVersion AQ_GlobalStatus_HHD
#define AQ_GlobalThermalProvisioning_BiggestVersion AQ_GlobalThermalProvisioning_HHD
#define AQ_GlobalThermalStatus_BiggestVersion AQ_GlobalThermalStatus_HHD
#define AQ_Kr0AutonegotiationAdvertisementWord_BiggestVersion AQ_Kr0AutonegotiationAdvertisementWord_HHD
#define AQ_Kr0AutonegotiationControl_BiggestVersion AQ_Kr0AutonegotiationControl_HHD
#define AQ_Kr0AutonegotiationExtendedNextPageAdvertisementWord_BiggestVersion AQ_Kr0AutonegotiationExtendedNextPageAdvertisementWord_HHD
#define AQ_Kr0AutonegotiationStatus_BiggestVersion AQ_Kr0AutonegotiationStatus_HHD
#define AQ_Kr0LinkPartnerAutonegotiationAdvertisementWord_BiggestVersion AQ_Kr0LinkPartnerAutonegotiationAdvertisementWord_HHD
#define AQ_Kr0LinkPartnerAutonegotiationExtendedNextPageAdvertisementWord_BiggestVersion AQ_Kr0LinkPartnerAutonegotiationExtendedNextPageAdvertisementWord_HHD
#define AQ_Kr1AutonegotiationAdvertisementWord_BiggestVersion AQ_Kr1AutonegotiationAdvertisementWord_HHD
#define AQ_Kr1AutonegotiationControl_BiggestVersion AQ_Kr1AutonegotiationControl_HHD
#define AQ_Kr1AutonegotiationExtendedNextPageAdvertisementWord_BiggestVersion AQ_Kr1AutonegotiationExtendedNextPageAdvertisementWord_HHD
#define AQ_Kr1AutonegotiationStatus_BiggestVersion AQ_Kr1AutonegotiationStatus_HHD
#define AQ_Kr1LinkPartnerAutonegotiationAdvertisementWord_BiggestVersion AQ_Kr1LinkPartnerAutonegotiationAdvertisementWord_HHD
#define AQ_Kr1LinkPartnerAutonegotiationExtendedNextPageAdvertisementWord_BiggestVersion AQ_Kr1LinkPartnerAutonegotiationExtendedNextPageAdvertisementWord_HHD
#define AQ_MsmLineFifoControlRegister_BiggestVersion AQ_MsmLineFifoControlRegister_HHD
#define AQ_MsmLineGeneralControlRegister_BiggestVersion AQ_MsmLineGeneralControlRegister_HHD
#define AQ_MsmLineGeneralStatusRegister_BiggestVersion AQ_MsmLineGeneralStatusRegister_HHD
#define AQ_MsmLineRxAlignmentErrorsCounterRegister_BiggestVersion AQ_MsmLineRxAlignmentErrorsCounterRegister_HHD
#define AQ_MsmLineRxBroadcastFramesCounterRegister_BiggestVersion AQ_MsmLineRxBroadcastFramesCounterRegister_HHD
#define AQ_MsmLineRxErrorsCounterRegister_BiggestVersion AQ_MsmLineRxErrorsCounterRegister_HHD
#define AQ_MsmLineRxFcsErrorsCounterRegister_BiggestVersion AQ_MsmLineRxFcsErrorsCounterRegister_HHD
#define AQ_MsmLineRxGoodFramesCounterRegister_BiggestVersion AQ_MsmLineRxGoodFramesCounterRegister_HHD
#define AQ_MsmLineRxInRangeLengthErrorsCounterRegister_BiggestVersion AQ_MsmLineRxInRangeLengthErrorsCounterRegister_HHD
#define AQ_MsmLineRxMulticastFramesCounterRegister_BiggestVersion AQ_MsmLineRxMulticastFramesCounterRegister_HHD
#define AQ_MsmLineRxOctetsCounterRegister_BiggestVersion AQ_MsmLineRxOctetsCounterRegister_HHD
#define AQ_MsmLineRxPauseFramesCounterRegister_BiggestVersion AQ_MsmLineRxPauseFramesCounterRegister_HHD
#define AQ_MsmLineRxTooLongErrorsCounterRegister_BiggestVersion AQ_MsmLineRxTooLongErrorsCounterRegister_HHD
#define AQ_MsmLineRxUnicastFramesCounterRegister_BiggestVersion AQ_MsmLineRxUnicastFramesCounterRegister_HHD
#define AQ_MsmLineRxVlanFramesCounterRegister_BiggestVersion AQ_MsmLineRxVlanFramesCounterRegister_HHD
#define AQ_MsmLineTxBroadcastFramesCounterRegister_BiggestVersion AQ_MsmLineTxBroadcastFramesCounterRegister_HHD
#define AQ_MsmLineTxErrorsCounterRegister_BiggestVersion AQ_MsmLineTxErrorsCounterRegister_HHD
#define AQ_MsmLineTxGoodFramesCounterRegister_BiggestVersion AQ_MsmLineTxGoodFramesCounterRegister_HHD
#define AQ_MsmLineTxIpgControlRegister_BiggestVersion AQ_MsmLineTxIpgControlRegister_HHD
#define AQ_MsmLineTxMulticastFramesCounterRegister_BiggestVersion AQ_MsmLineTxMulticastFramesCounterRegister_HHD
#define AQ_MsmLineTxOctetsCounterRegister_BiggestVersion AQ_MsmLineTxOctetsCounterRegister_HHD
#define AQ_MsmLineTxPauseFramesCounterRegister_BiggestVersion AQ_MsmLineTxPauseFramesCounterRegister_HHD
#define AQ_MsmLineTxUnicastFramesCounterRegister_BiggestVersion AQ_MsmLineTxUnicastFramesCounterRegister_HHD
#define AQ_MsmLineTxVlanFramesCounterRegister_BiggestVersion AQ_MsmLineTxVlanFramesCounterRegister_HHD
#define AQ_MsmSystemFifoControlRegister_BiggestVersion AQ_MsmSystemFifoControlRegister_HHD
#define AQ_MsmSystemGeneralControlRegister_BiggestVersion AQ_MsmSystemGeneralControlRegister_HHD
#define AQ_MsmSystemGeneralStatusRegister_BiggestVersion AQ_MsmSystemGeneralStatusRegister_HHD
#define AQ_MsmSystemRxAlignmentErrorsCounterRegister_BiggestVersion AQ_MsmSystemRxAlignmentErrorsCounterRegister_HHD
#define AQ_MsmSystemRxBroadcastFramesCounterRegister_BiggestVersion AQ_MsmSystemRxBroadcastFramesCounterRegister_HHD
#define AQ_MsmSystemRxErrorsCounterRegister_BiggestVersion AQ_MsmSystemRxErrorsCounterRegister_HHD
#define AQ_MsmSystemRxFcsErrorsCounterRegister_BiggestVersion AQ_MsmSystemRxFcsErrorsCounterRegister_HHD
#define AQ_MsmSystemRxGoodFramesCounterRegister_BiggestVersion AQ_MsmSystemRxGoodFramesCounterRegister_HHD
#define AQ_MsmSystemRxInRangeLengthErrorsCounterRegister_BiggestVersion AQ_MsmSystemRxInRangeLengthErrorsCounterRegister_HHD
#define AQ_MsmSystemRxMulticastFramesCounterRegister_BiggestVersion AQ_MsmSystemRxMulticastFramesCounterRegister_HHD
#define AQ_MsmSystemRxOctetsCounterRegister_BiggestVersion AQ_MsmSystemRxOctetsCounterRegister_HHD
#define AQ_MsmSystemRxPauseFramesCounterRegister_BiggestVersion AQ_MsmSystemRxPauseFramesCounterRegister_HHD
#define AQ_MsmSystemRxTooLongErrorsCounterRegister_BiggestVersion AQ_MsmSystemRxTooLongErrorsCounterRegister_HHD
#define AQ_MsmSystemRxUnicastFramesCounterRegister_BiggestVersion AQ_MsmSystemRxUnicastFramesCounterRegister_HHD
#define AQ_MsmSystemRxVlanFramesCounterRegister_BiggestVersion AQ_MsmSystemRxVlanFramesCounterRegister_HHD
#define AQ_MsmSystemTxBroadcastFramesCounterRegister_BiggestVersion AQ_MsmSystemTxBroadcastFramesCounterRegister_HHD
#define AQ_MsmSystemTxErrorsCounterRegister_BiggestVersion AQ_MsmSystemTxErrorsCounterRegister_HHD
#define AQ_MsmSystemTxGoodFramesCounterRegister_BiggestVersion AQ_MsmSystemTxGoodFramesCounterRegister_HHD
#define AQ_MsmSystemTxIpgControlRegister_BiggestVersion AQ_MsmSystemTxIpgControlRegister_HHD
#define AQ_MsmSystemTxMulticastFramesCounterRegister_BiggestVersion AQ_MsmSystemTxMulticastFramesCounterRegister_HHD
#define AQ_MsmSystemTxOctetsCounterRegister_BiggestVersion AQ_MsmSystemTxOctetsCounterRegister_HHD
#define AQ_MsmSystemTxPauseFramesCounterRegister_BiggestVersion AQ_MsmSystemTxPauseFramesCounterRegister_HHD
#define AQ_MsmSystemTxUnicastFramesCounterRegister_BiggestVersion AQ_MsmSystemTxUnicastFramesCounterRegister_HHD
#define AQ_MsmSystemTxVlanFramesCounterRegister_BiggestVersion AQ_MsmSystemTxVlanFramesCounterRegister_HHD
#define AQ_MssEgressControlRegister_BiggestVersion AQ_MssEgressControlRegister_HHD
#define AQ_MssEgressEccInterruptStatusRegister_BiggestVersion AQ_MssEgressEccInterruptStatusRegister_HHD
#define AQ_MssEgressInterruptMaskRegister_BiggestVersion AQ_MssEgressInterruptMaskRegister_HHD
#define AQ_MssEgressInterruptStatusRegister_BiggestVersion AQ_MssEgressInterruptStatusRegister_HHD
#define AQ_MssEgressLutAddressControlRegister_BiggestVersion AQ_MssEgressLutAddressControlRegister_HHD
#define AQ_MssEgressLutControlRegister_BiggestVersion AQ_MssEgressLutControlRegister_HHD
#define AQ_MssEgressLutDataControlRegister_BiggestVersion AQ_MssEgressLutDataControlRegister_HHD
#define AQ_MssEgressMtuSizeControlRegister_BiggestVersion AQ_MssEgressMtuSizeControlRegister_HHD
#define AQ_MssEgressPnControlRegister_BiggestVersion AQ_MssEgressPnControlRegister_HHD
#define AQ_MssEgressSaExpiredStatusRegister_BiggestVersion AQ_MssEgressSaExpiredStatusRegister_HHD
#define AQ_MssEgressSaThresholdExpiredStatusRegister_BiggestVersion AQ_MssEgressSaThresholdExpiredStatusRegister_HHD
#define AQ_MssEgressVlanControlRegister_BiggestVersion AQ_MssEgressVlanControlRegister_HHD
#define AQ_MssEgressVlanTpid_0Register_BiggestVersion AQ_MssEgressVlanTpid_0Register_HHD
#define AQ_MssEgressVlanTpid_1Register_BiggestVersion AQ_MssEgressVlanTpid_1Register_HHD
#define AQ_MssIngressControlRegister_BiggestVersion AQ_MssIngressControlRegister_HHD
#define AQ_MssIngressEccInterruptStatusRegister_BiggestVersion AQ_MssIngressEccInterruptStatusRegister_HHD
#define AQ_MssIngressInterruptMaskRegister_BiggestVersion AQ_MssIngressInterruptMaskRegister_HHD
#define AQ_MssIngressInterruptStatusRegister_BiggestVersion AQ_MssIngressInterruptStatusRegister_HHD
#define AQ_MssIngressLutAddressControlRegister_BiggestVersion AQ_MssIngressLutAddressControlRegister_HHD
#define AQ_MssIngressLutControlRegister_BiggestVersion AQ_MssIngressLutControlRegister_HHD
#define AQ_MssIngressLutDataControlRegister_BiggestVersion AQ_MssIngressLutDataControlRegister_HHD
#define AQ_MssIngressMtuSizeControlRegister_BiggestVersion AQ_MssIngressMtuSizeControlRegister_HHD
#define AQ_MssIngressSaControlRegister_BiggestVersion AQ_MssIngressSaControlRegister_HHD
#define AQ_MssIngressSaExpiredStatusRegister_BiggestVersion AQ_MssIngressSaExpiredStatusRegister_HHD
#define AQ_MssIngressSaIcvErrorStatusRegister_BiggestVersion AQ_MssIngressSaIcvErrorStatusRegister_HHD
#define AQ_MssIngressSaReplayErrorStatusRegister_BiggestVersion AQ_MssIngressSaReplayErrorStatusRegister_HHD
#define AQ_MssIngressSaThresholdExpiredStatusRegister_BiggestVersion AQ_MssIngressSaThresholdExpiredStatusRegister_HHD
#define AQ_MssIngressVlanControlRegister_BiggestVersion AQ_MssIngressVlanControlRegister_HHD
#define AQ_MssIngressVlanTpid_0Register_BiggestVersion AQ_MssIngressVlanTpid_0Register_HHD
#define AQ_MssIngressVlanTpid_1Register_BiggestVersion AQ_MssIngressVlanTpid_1Register_HHD
#define AQ_Pcs10GBaseT_Status_BiggestVersion AQ_Pcs10GBaseT_Status_APPIA
#define AQ_Pcs10G_Status_BiggestVersion AQ_Pcs10G_Status_HHD
#define AQ_Pcs10G_base_rPcsTest_patternControl_BiggestVersion AQ_Pcs10G_base_rPcsTest_patternControl_HHD
#define AQ_Pcs10G_base_rPcsTest_patternErrorCounter_BiggestVersion AQ_Pcs10G_base_rPcsTest_patternErrorCounter_HHD
#define AQ_Pcs10G_base_rTestPatternSeedA_BiggestVersion AQ_Pcs10G_base_rTestPatternSeedA_HHD
#define AQ_Pcs10G_base_rTestPatternSeedB_BiggestVersion AQ_Pcs10G_base_rTestPatternSeedB_HHD
#define AQ_PcsEeeCapabilityRegister_BiggestVersion AQ_PcsEeeCapabilityRegister_HHD
#define AQ_PcsEeeWakeErrorCounter_BiggestVersion AQ_PcsEeeWakeErrorCounter_HHD
#define AQ_PcsReceiveStandardInterruptMask_BiggestVersion AQ_PcsReceiveStandardInterruptMask_APPIA
#define AQ_PcsReceiveVendorAlarms_BiggestVersion AQ_PcsReceiveVendorAlarms_HHD
#define AQ_PcsReceiveVendorCorrectedFrame_1IterationCounter_BiggestVersion AQ_PcsReceiveVendorCorrectedFrame_1IterationCounter_HHD
#define AQ_PcsReceiveVendorCorrectedFrame_2IterationCounter_BiggestVersion AQ_PcsReceiveVendorCorrectedFrame_2IterationCounter_HHD
#define AQ_PcsReceiveVendorCorrectedFrame_3IterationCounter_BiggestVersion AQ_PcsReceiveVendorCorrectedFrame_3IterationCounter_HHD
#define AQ_PcsReceiveVendorCorrectedFrame_4IterationCounter_BiggestVersion AQ_PcsReceiveVendorCorrectedFrame_4IterationCounter_HHD
#define AQ_PcsReceiveVendorCorrectedFrame_5IterationCounter_BiggestVersion AQ_PcsReceiveVendorCorrectedFrame_5IterationCounter_HHD
#define AQ_PcsReceiveVendorCorrectedFrame_6IterationCounter_BiggestVersion AQ_PcsReceiveVendorCorrectedFrame_6IterationCounter_HHD
#define AQ_PcsReceiveVendorCorrectedFrame_7IterationCounter_BiggestVersion AQ_PcsReceiveVendorCorrectedFrame_7IterationCounter_HHD
#define AQ_PcsReceiveVendorCorrectedFrame_8IterationCounter_BiggestVersion AQ_PcsReceiveVendorCorrectedFrame_8IterationCounter_HHD
#define AQ_PcsReceiveVendorCrc_8ErrorCounter_BiggestVersion AQ_PcsReceiveVendorCrc_8ErrorCounter_HHD
#define AQ_PcsReceiveVendorDebug_BiggestVersion AQ_PcsReceiveVendorDebug_HHD
#define AQ_PcsReceiveVendorFcsErrorFrameCounter_BiggestVersion AQ_PcsReceiveVendorFcsErrorFrameCounter_HHD
#define AQ_PcsReceiveVendorFcsNoErrorFrameCounter_BiggestVersion AQ_PcsReceiveVendorFcsNoErrorFrameCounter_HHD
#define AQ_PcsReceiveVendorInterruptMask_BiggestVersion AQ_PcsReceiveVendorInterruptMask_HHD
#define AQ_PcsReceiveVendorProvisioning_BiggestVersion AQ_PcsReceiveVendorProvisioning_HHD
#define AQ_PcsReceiveVendorState_BiggestVersion AQ_PcsReceiveVendorState_HHD
#define AQ_PcsReceiveVendorUncorrectedFrameCounter_BiggestVersion AQ_PcsReceiveVendorUncorrectedFrameCounter_HHD
#define AQ_PcsReceiveXfi0Provisioning_BiggestVersion AQ_PcsReceiveXfi0Provisioning_HHD
#define AQ_PcsReceiveXfi0VendorState_BiggestVersion AQ_PcsReceiveXfi0VendorState_HHD
#define AQ_PcsReceiveXfi1Provisioning_BiggestVersion AQ_PcsReceiveXfi1Provisioning_HHD
#define AQ_PcsReceiveXfi1VendorState_BiggestVersion AQ_PcsReceiveXfi1VendorState_HHD
#define AQ_PcsSerdesMuxSwapTxrxRegister_BiggestVersion AQ_PcsSerdesMuxSwapTxrxRegister_HHD
#define AQ_PcsStandardControl_1_BiggestVersion AQ_PcsStandardControl_1_HHD
#define AQ_PcsStandardControl_2_BiggestVersion AQ_PcsStandardControl_2_HHD
#define AQ_PcsStandardDeviceIdentifier_BiggestVersion AQ_PcsStandardDeviceIdentifier_HHD
#define AQ_PcsStandardDevicesInPackage_BiggestVersion AQ_PcsStandardDevicesInPackage_HHD
#define AQ_PcsStandardInterruptMask_BiggestVersion AQ_PcsStandardInterruptMask_HHD
#define AQ_PcsStandardPackageIdentifier_BiggestVersion AQ_PcsStandardPackageIdentifier_HHD
#define AQ_PcsStandardSpeedAbility_BiggestVersion AQ_PcsStandardSpeedAbility_HHD
#define AQ_PcsStandardStatus_1_BiggestVersion AQ_PcsStandardStatus_1_HHD
#define AQ_PcsStandardStatus_2_BiggestVersion AQ_PcsStandardStatus_2_HHD
#define AQ_PcsTransmitReservedVendorProvisioning_BiggestVersion AQ_PcsTransmitReservedVendorProvisioning_HHD
#define AQ_PcsTransmitVendorAlarms_BiggestVersion AQ_PcsTransmitVendorAlarms_APPIA
#define AQ_PcsTransmitVendorDebug_BiggestVersion AQ_PcsTransmitVendorDebug_HHD
#define AQ_PcsTransmitVendorFcsErrorFrameCounter_BiggestVersion AQ_PcsTransmitVendorFcsErrorFrameCounter_HHD
#define AQ_PcsTransmitVendorFcsNoErrorFrameCounter_BiggestVersion AQ_PcsTransmitVendorFcsNoErrorFrameCounter_HHD
#define AQ_PcsTransmitVendorInterruptMask_BiggestVersion AQ_PcsTransmitVendorInterruptMask_APPIA
#define AQ_PcsTransmitVendorProvisioning_BiggestVersion AQ_PcsTransmitVendorProvisioning_HHD
#define AQ_PcsTransmitXfi0VendorProvisioning_BiggestVersion AQ_PcsTransmitXfi0VendorProvisioning_HHD
#define AQ_PcsTransmitXfi0VendorState_BiggestVersion AQ_PcsTransmitXfi0VendorState_HHD
#define AQ_PcsTransmitXfi1VendorProvisioning_BiggestVersion AQ_PcsTransmitXfi1VendorProvisioning_HHD
#define AQ_PcsTransmitXfi1VendorState_BiggestVersion AQ_PcsTransmitXfi1VendorState_HHD
#define AQ_PcsTransmitXfiVendorProvisioning_BiggestVersion AQ_PcsTransmitXfiVendorProvisioning_HHD
#define AQ_PcsTransmitXgsVendorState_BiggestVersion AQ_PcsTransmitXgsVendorState_HHD
#define AQ_PcsVendorGlobalInterruptFlags_BiggestVersion AQ_PcsVendorGlobalInterruptFlags_HHD
#define AQ_PhyXS_EeeCapabilityRegister_BiggestVersion AQ_PhyXS_EeeCapabilityRegister_HHD
#define AQ_PhyXS_EeeWakeErrorCounter_BiggestVersion AQ_PhyXS_EeeWakeErrorCounter_HHD
#define AQ_PhyXS_Receive_xauiTx_PcsStatus_BiggestVersion AQ_PhyXS_Receive_xauiTx_PcsStatus_HHD
#define AQ_PhyXS_Receive_xauiTx_ReservedVendorProvisioning_BiggestVersion AQ_PhyXS_Receive_xauiTx_ReservedVendorProvisioning_HHD
#define AQ_PhyXS_Receive_xauiTx_VendorAlarms_BiggestVersion AQ_PhyXS_Receive_xauiTx_VendorAlarms_HHD
#define AQ_PhyXS_Receive_xauiTx_VendorDebug_BiggestVersion AQ_PhyXS_Receive_xauiTx_VendorDebug_HHD
#define AQ_PhyXS_Receive_xauiTx_VendorInterruptMask_BiggestVersion AQ_PhyXS_Receive_xauiTx_VendorInterruptMask_HHD
#define AQ_PhyXS_SerdesConfiguration_BiggestVersion AQ_PhyXS_SerdesConfiguration_HHD
#define AQ_PhyXS_SerdesLane_0Configuration_BiggestVersion AQ_PhyXS_SerdesLane_0Configuration_HHD
#define AQ_PhyXS_SerdesLane_1Configuration_BiggestVersion AQ_PhyXS_SerdesLane_1Configuration_HHD
#define AQ_PhyXS_SerdesLane_2Configuration_BiggestVersion AQ_PhyXS_SerdesLane_2Configuration_HHD
#define AQ_PhyXS_SerdesLane_3Configuration_BiggestVersion AQ_PhyXS_SerdesLane_3Configuration_HHD
#define AQ_PhyXS_SerdesLut_BiggestVersion AQ_PhyXS_SerdesLut_HHD
#define AQ_PhyXS_StandardControl_1_BiggestVersion AQ_PhyXS_StandardControl_1_HHD
#define AQ_PhyXS_StandardDeviceIdentifier_BiggestVersion AQ_PhyXS_StandardDeviceIdentifier_HHD
#define AQ_PhyXS_StandardDevicesInPackage_BiggestVersion AQ_PhyXS_StandardDevicesInPackage_HHD
#define AQ_PhyXS_StandardPackageIdentifier_BiggestVersion AQ_PhyXS_StandardPackageIdentifier_HHD
#define AQ_PhyXS_StandardSpeedAbility_BiggestVersion AQ_PhyXS_StandardSpeedAbility_HHD
#define AQ_PhyXS_StandardStatus_1_BiggestVersion AQ_PhyXS_StandardStatus_1_HHD
#define AQ_PhyXS_StandardStatus_2_BiggestVersion AQ_PhyXS_StandardStatus_2_HHD
#define AQ_PhyXS_StandardXGXS_LaneStatus_BiggestVersion AQ_PhyXS_StandardXGXS_LaneStatus_HHD
#define AQ_PhyXS_StandardXGXS_TestControl_BiggestVersion AQ_PhyXS_StandardXGXS_TestControl_HHD
#define AQ_PhyXS_SystemInterfaceConnectionStatus_BiggestVersion AQ_PhyXS_SystemInterfaceConnectionStatus_HHD
#define AQ_PhyXS_Transmit_xauiRx_PcsStatus_BiggestVersion AQ_PhyXS_Transmit_xauiRx_PcsStatus_HHD
#define AQ_PhyXS_Transmit_xauiRx_ReservedVendorProvisioning_BiggestVersion AQ_PhyXS_Transmit_xauiRx_ReservedVendorProvisioning_HHD
#define AQ_PhyXS_Transmit_xauiRx_ReservedVendorState_BiggestVersion AQ_PhyXS_Transmit_xauiRx_ReservedVendorState_HHD
#define AQ_PhyXS_Transmit_xauiRx_StandardInterruptMask_BiggestVersion AQ_PhyXS_Transmit_xauiRx_StandardInterruptMask_HHD
#define AQ_PhyXS_Transmit_xauiRx_TestPatternErrorCounter_BiggestVersion AQ_PhyXS_Transmit_xauiRx_TestPatternErrorCounter_HHD
#define AQ_PhyXS_Transmit_xauiRx_VendorAlarms_BiggestVersion AQ_PhyXS_Transmit_xauiRx_VendorAlarms_HHD
#define AQ_PhyXS_Transmit_xauiRx_VendorDebug_BiggestVersion AQ_PhyXS_Transmit_xauiRx_VendorDebug_HHD
#define AQ_PhyXS_Transmit_xauiRx_VendorInterruptMask_BiggestVersion AQ_PhyXS_Transmit_xauiRx_VendorInterruptMask_HHD
#define AQ_PhyXS_VendorGlobalInterruptFlags_BiggestVersion AQ_PhyXS_VendorGlobalInterruptFlags_HHD
#define AQ_PifMailboxControl_BiggestVersion AQ_PifMailboxControl_HHD
#define AQ_Pma10GBaseT_FastRetrainStatusAndControl_BiggestVersion AQ_Pma10GBaseT_FastRetrainStatusAndControl_HHD
#define AQ_Pma10GBaseT_PairSwapAndPolarityStatus_BiggestVersion AQ_Pma10GBaseT_PairSwapAndPolarityStatus_HHD
#define AQ_Pma10GBaseT_ReceiveSignalPowerChannelA_BiggestVersion AQ_Pma10GBaseT_ReceiveSignalPowerChannelA_HHD
#define AQ_Pma10GBaseT_ReceiveSignalPowerChannelB_BiggestVersion AQ_Pma10GBaseT_ReceiveSignalPowerChannelB_HHD
#define AQ_Pma10GBaseT_ReceiveSignalPowerChannelC_BiggestVersion AQ_Pma10GBaseT_ReceiveSignalPowerChannelC_HHD
#define AQ_Pma10GBaseT_ReceiveSignalPowerChannelD_BiggestVersion AQ_Pma10GBaseT_ReceiveSignalPowerChannelD_HHD
#define AQ_Pma10GBaseT_SNR_MinimumOperatingMarginChannelA_BiggestVersion AQ_Pma10GBaseT_SNR_MinimumOperatingMarginChannelA_HHD
#define AQ_Pma10GBaseT_SNR_MinimumOperatingMarginChannelB_BiggestVersion AQ_Pma10GBaseT_SNR_MinimumOperatingMarginChannelB_HHD
#define AQ_Pma10GBaseT_SNR_MinimumOperatingMarginChannelC_BiggestVersion AQ_Pma10GBaseT_SNR_MinimumOperatingMarginChannelC_HHD
#define AQ_Pma10GBaseT_SNR_MinimumOperatingMarginChannelD_BiggestVersion AQ_Pma10GBaseT_SNR_MinimumOperatingMarginChannelD_HHD
#define AQ_Pma10GBaseT_SNR_OperatingMarginChannelA_BiggestVersion AQ_Pma10GBaseT_SNR_OperatingMarginChannelA_HHD
#define AQ_Pma10GBaseT_SNR_OperatingMarginChannelB_BiggestVersion AQ_Pma10GBaseT_SNR_OperatingMarginChannelB_HHD
#define AQ_Pma10GBaseT_SNR_OperatingMarginChannelC_BiggestVersion AQ_Pma10GBaseT_SNR_OperatingMarginChannelC_HHD
#define AQ_Pma10GBaseT_SNR_OperatingMarginChannelD_BiggestVersion AQ_Pma10GBaseT_SNR_OperatingMarginChannelD_HHD
#define AQ_Pma10GBaseT_SkewDelay_BiggestVersion AQ_Pma10GBaseT_SkewDelay_HHD
#define AQ_Pma10GBaseT_Status_BiggestVersion AQ_Pma10GBaseT_Status_HHD
#define AQ_Pma10GBaseT_TestModes_BiggestVersion AQ_Pma10GBaseT_TestModes_HHD
#define AQ_Pma10GBaseT_TxPowerBackoffAndShortReachSetting_BiggestVersion AQ_Pma10GBaseT_TxPowerBackoffAndShortReachSetting_HHD
#define AQ_PmaReceiveReservedVendorProvisioning_BiggestVersion AQ_PmaReceiveReservedVendorProvisioning_HHD
#define AQ_PmaReceiveReservedVendorState_BiggestVersion AQ_PmaReceiveReservedVendorState_HHD
#define AQ_PmaReceiveVendorState_BiggestVersion AQ_PmaReceiveVendorState_HHD
#define AQ_PmaStandardControl_1_BiggestVersion AQ_PmaStandardControl_1_HHD
#define AQ_PmaStandardControl_2_BiggestVersion AQ_PmaStandardControl_2_HHD
#define AQ_PmaStandardDeviceIdentifier_BiggestVersion AQ_PmaStandardDeviceIdentifier_HHD
#define AQ_PmaStandardDevicesInPackage_BiggestVersion AQ_PmaStandardDevicesInPackage_HHD
#define AQ_PmaStandardPackageIdentifier_BiggestVersion AQ_PmaStandardPackageIdentifier_HHD
#define AQ_PmaStandardSpeedAbility_BiggestVersion AQ_PmaStandardSpeedAbility_HHD
#define AQ_PmaStandardStatus_1_BiggestVersion AQ_PmaStandardStatus_1_HHD
#define AQ_PmaStandardStatus_2_BiggestVersion AQ_PmaStandardStatus_2_HHD
#define AQ_PmaTransmitReservedVendorProvisioning_BiggestVersion AQ_PmaTransmitReservedVendorProvisioning_HHD
#define AQ_PmaTransmitStandardInterruptMask_BiggestVersion AQ_PmaTransmitStandardInterruptMask_HHD
#define AQ_PmaTransmitVendorAlarms_BiggestVersion AQ_PmaTransmitVendorAlarms_HHD
#define AQ_PmaTransmitVendorDebug_BiggestVersion AQ_PmaTransmitVendorDebug_HHD
#define AQ_PmaTransmitVendorLASI_InterruptMask_BiggestVersion AQ_PmaTransmitVendorLASI_InterruptMask_HHD
#define AQ_PmaVendorGlobalInterruptFlags_BiggestVersion AQ_PmaVendorGlobalInterruptFlags_HHD
#define AQ_PmdStandard10G_ExtendedAbilityRegister_BiggestVersion AQ_PmdStandard10G_ExtendedAbilityRegister_HHD
#define AQ_PmdStandardSignalDetect_BiggestVersion AQ_PmdStandardSignalDetect_HHD
#define AQ_PmdStandardTransmitDisableControl_BiggestVersion AQ_PmdStandardTransmitDisableControl_HHD
#define AQ_Sgmii0WolStatus_BiggestVersion AQ_Sgmii0WolStatus_HHD
#define AQ_TimesyncPcsCapability_BiggestVersion AQ_TimesyncPcsCapability_HHD
#define AQ_TimesyncPcsReceivePathDataDelay_BiggestVersion AQ_TimesyncPcsReceivePathDataDelay_HHD
#define AQ_TimesyncPcsTransmitPathDataDelay_BiggestVersion AQ_TimesyncPcsTransmitPathDataDelay_HHD
#define AQ_TimesyncPhyXsCapability_BiggestVersion AQ_TimesyncPhyXsCapability_HHD
#define AQ_TimesyncPhyXsReceivePathDataDelay_BiggestVersion AQ_TimesyncPhyXsReceivePathDataDelay_HHD
#define AQ_TimesyncPhyXsTransmitPathDataDelay_BiggestVersion AQ_TimesyncPhyXsTransmitPathDataDelay_HHD
#define AQ_TimesyncPmaCapability_BiggestVersion AQ_TimesyncPmaCapability_HHD
#define AQ_TimesyncPmaReceivePathDataDelay_BiggestVersion AQ_TimesyncPmaReceivePathDataDelay_HHD
#define AQ_TimesyncPmaTransmitPathDataDelay_BiggestVersion AQ_TimesyncPmaTransmitPathDataDelay_HHD
#define AQ_XenpakBasic_ApsLoading_BiggestVersion AQ_XenpakBasic_ApsLoading_HHD
#define AQ_XenpakBasic_ApsVoltage_BiggestVersion AQ_XenpakBasic_ApsVoltage_HHD
#define AQ_XenpakBasic_BitRate_BiggestVersion AQ_XenpakBasic_BitRate_HHD
#define AQ_XenpakBasic_Checksum_BiggestVersion AQ_XenpakBasic_Checksum_HHD
#define AQ_XenpakBasic_ConnectorType_BiggestVersion AQ_XenpakBasic_ConnectorType_HHD
#define AQ_XenpakBasic_DomCapability_BiggestVersion AQ_XenpakBasic_DomCapability_HHD
#define AQ_XenpakBasic_Encoding_BiggestVersion AQ_XenpakBasic_Encoding_HHD
#define AQ_XenpakBasic_Low_powerStartupCapability_BiggestVersion AQ_XenpakBasic_Low_powerStartupCapability_HHD
#define AQ_XenpakBasic_PackageIdentifier_BiggestVersion AQ_XenpakBasic_PackageIdentifier_HHD
#define AQ_XenpakBasic_Protocol_BiggestVersion AQ_XenpakBasic_Protocol_HHD
#define AQ_XenpakBasic_Reserved_0x11_BiggestVersion AQ_XenpakBasic_Reserved_0x11_HHD
#define AQ_XenpakBasic_Reserved_0x19_BiggestVersion AQ_XenpakBasic_Reserved_0x19_HHD
#define AQ_XenpakBasic_Reserved_0x7c_BiggestVersion AQ_XenpakBasic_Reserved_0x7c_HHD
#define AQ_XenpakBasic_StandardsComplianceCodes_BiggestVersion AQ_XenpakBasic_StandardsComplianceCodes_HHD
#define AQ_XenpakBasic_TransceiverType_BiggestVersion AQ_XenpakBasic_TransceiverType_HHD
#define AQ_XenpakBasic_VendorDateCode_BiggestVersion AQ_XenpakBasic_VendorDateCode_HHD
#define AQ_XenpakBasic_VendorIdentifier_BiggestVersion AQ_XenpakBasic_VendorIdentifier_HHD
#define AQ_XenpakBasic_VendorName_BiggestVersion AQ_XenpakBasic_VendorName_HHD
#define AQ_XenpakBasic_VendorPartNumber_BiggestVersion AQ_XenpakBasic_VendorPartNumber_HHD
#define AQ_XenpakBasic_VendorPartRevisionNumber_BiggestVersion AQ_XenpakBasic_VendorPartRevisionNumber_HHD
#define AQ_XenpakBasic_VendorSerialNumber_BiggestVersion AQ_XenpakBasic_VendorSerialNumber_HHD
#define AQ_XenpakBasic__3_3vLoading_BiggestVersion AQ_XenpakBasic__3_3vLoading_HHD
#define AQ_XenpakBasic__5vLoading_BiggestVersion AQ_XenpakBasic__5vLoading_HHD
#define AQ_XenpakControl_BiggestVersion AQ_XenpakControl_HHD
#define AQ_XenpakCustomer_Reserved_0x7e_BiggestVersion AQ_XenpakCustomer_Reserved_0x7e_HHD
#define AQ_XenpakDom_Alarms_BiggestVersion AQ_XenpakDom_Alarms_HHD
#define AQ_XenpakDom_Capability_BiggestVersion AQ_XenpakDom_Capability_HHD
#define AQ_XenpakDom_ControlAndStatus_BiggestVersion AQ_XenpakDom_ControlAndStatus_HHD
#define AQ_XenpakDom_HighTemperatureAlarmThresholdLSW_BiggestVersion AQ_XenpakDom_HighTemperatureAlarmThresholdLSW_HHD
#define AQ_XenpakDom_HighTemperatureAlarmThresholdMSW_BiggestVersion AQ_XenpakDom_HighTemperatureAlarmThresholdMSW_HHD
#define AQ_XenpakDom_HighTemperatureWarningThresholdLSW_BiggestVersion AQ_XenpakDom_HighTemperatureWarningThresholdLSW_HHD
#define AQ_XenpakDom_HighTemperatureWarningThresholdMSW_BiggestVersion AQ_XenpakDom_HighTemperatureWarningThresholdMSW_HHD
#define AQ_XenpakDom_LowTemperatureAlarmThresholdLSW_BiggestVersion AQ_XenpakDom_LowTemperatureAlarmThresholdLSW_HHD
#define AQ_XenpakDom_LowTemperatureAlarmThresholdMSW_BiggestVersion AQ_XenpakDom_LowTemperatureAlarmThresholdMSW_HHD
#define AQ_XenpakDom_LowTemperatureWarningThresholdLSW_BiggestVersion AQ_XenpakDom_LowTemperatureWarningThresholdLSW_HHD
#define AQ_XenpakDom_LowTemperatureWarningThresholdMSW_BiggestVersion AQ_XenpakDom_LowTemperatureWarningThresholdMSW_HHD
#define AQ_XenpakDom_Status_BiggestVersion AQ_XenpakDom_Status_HHD
#define AQ_XenpakDom_TemperatureLSW_BiggestVersion AQ_XenpakDom_TemperatureLSW_HHD
#define AQ_XenpakDom_TemperatureMSW_BiggestVersion AQ_XenpakDom_TemperatureMSW_HHD
#define AQ_XenpakDom_TxControl_BiggestVersion AQ_XenpakDom_TxControl_HHD
#define AQ_XenpakHeader_BasicMemoryStartAddress_BiggestVersion AQ_XenpakHeader_BasicMemoryStartAddress_HHD
#define AQ_XenpakHeader_CustomerMemoryOffset_BiggestVersion AQ_XenpakHeader_CustomerMemoryOffset_HHD
#define AQ_XenpakHeader_ExtendedVendorMemoryOffset_BiggestVersion AQ_XenpakHeader_ExtendedVendorMemoryOffset_HHD
#define AQ_XenpakHeader_MemoryUsed_BiggestVersion AQ_XenpakHeader_MemoryUsed_HHD
#define AQ_XenpakHeader_NvrSize_BiggestVersion AQ_XenpakHeader_NvrSize_HHD
#define AQ_XenpakHeader_VendorMemoryStartAddress_BiggestVersion AQ_XenpakHeader_VendorMemoryStartAddress_HHD
#define AQ_XenpakHeader_XenpakMsaVersionSupported_BiggestVersion AQ_XenpakHeader_XenpakMsaVersionSupported_HHD
#define AQ_XenpakLASI__Control_BiggestVersion AQ_XenpakLASI__Control_HHD
#define AQ_XenpakLASI__Status_BiggestVersion AQ_XenpakLASI__Status_HHD
#define AQ_XenpakRxAlarm_Control_BiggestVersion AQ_XenpakRxAlarm_Control_HHD
#define AQ_XenpakRxAlarm_Status_BiggestVersion AQ_XenpakRxAlarm_Status_HHD
#define AQ_XenpakTxAlarm_Control_BiggestVersion AQ_XenpakTxAlarm_Control_HHD
#define AQ_XenpakTxAlarm_Status_BiggestVersion AQ_XenpakTxAlarm_Status_HHD
#define AQ_XenpakVendor_Reserved_0xae_BiggestVersion AQ_XenpakVendor_Reserved_0xae_HHD
#endif

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qca/aq-fw-download/src/include/registerMap/AQ_RegMaps.h
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/*AQ_RegMaps.h*/
/************************************************************************************
* Copyright (c) 2015, Aquantia
*
* Permission to use, copy, modify, and/or distribute this software for any
* purpose with or without fee is hereby granted, provided that the above
* copyright notice and this permission notice appear in all copies.
*
* THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
* WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
* MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
* ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
* WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
* ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
* OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
*
* Description:
*
* This file contains includes all appropriate Aquantia PHY device-specific
* register map headers.
*
************************************************************************************/
/*! \file
* This file contains includes all appropriate Aquantia PHY device-specific
* register map headers.
*/
#ifndef AQ_REGISTERMAPS_HEADER
#define AQ_REGISTERMAPS_HEADER
#include "AQ_User.h"
#include "AQ_RegGroupMaxSizes.h"
#ifndef AQ_REVERSED_BITFIELD_ORDERING
/*
* Include non-reversed header files (bitfields ordered from LSbit to MSbit)
*/
/* APPIA */
#include "AQ_APPIA_Global_registers.h"
#include "AQ_APPIA_Global_registers_Defines.h"
/* HHD */
#include "AQ_HHD_Global_registers.h"
#include "AQ_HHD_Global_registers_Defines.h"
#else
/*
* Include reversed header files (bitfields ordered from MSbit to LSbit)
*/
/* APPIA */
#include "AQ_APPIA_Global_registers_reversed.h"
#include "AQ_APPIA_Global_registers_Defines.h"
/* HHD */
#include "AQ_HHD_Global_registers_reversed.h"
#include "AQ_HHD_Global_registers_Defines.h"
#endif
#endif

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qca/aq-fw-download/src/mdioBootLoadCLD.c
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/* mdioBootLoadCLD.c */
/************************************************************************************
* Copyright (c) 2015 Aquantia
*
* Permission to use, copy, modify, and/or distribute this software for any
* purpose with or without fee is hereby granted, provided that the above
* copyright notice and this permission notice appear in all copies.
*
* THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
* WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
* MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
* ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
* WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
* ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
* OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
*
* $File: //depot/icm/proj/Dena/rev1.0/c/Systems/tools/windows/flashUtilities/src/mdioBootLoadCLD.c $
*
* $Revision: #12 $
*
* $DateTime: 2014/05/19 15:34:49 $
*
* $Author: joshd $
*
* $Label: $
*
************************************************************************************/
/*! \file
This file contains the main (int, char**) file for the mdioBootLoadCLD program, which burns a flash image into a target
Aquantia PHY using the AQ_API. This program calls the API function: <BR><BR>
uint8_t AQ_API_WriteBootLoadImage (uint8_t PHY_ID, uint8_t *image, uint16_t *crc16) <BR><BR>
to boot load a cld flash image into an Aquantia PHY */
/*! \addtogroup mdioBootLoad
@{
*/
/*! \def DEBUG
Uncomment this to compile in debug mode. This sets the source to an arbitrary file, defined by DEBUG_FILENAME,
and an arbitrary PHY_ID, defined by DEBUG_PHY_ID. */
/* #define DEBUG */
/*! The debug source file name */
#define DEBUG_FILENAME "HelloWorld.cld"
/*! The debug PHY ID */
#define DEBUG_PHY_ID 0
#include <stdlib.h>
#include <stdio.h>
#include <string.h>
#include <stdarg.h>
#include <errno.h>
#include <sys/socket.h>
#include <sys/types.h>
#include <unistd.h>
#include "AQ_API.h"
#include "AQ_PhyInterface.h"
int sock;
char devname[7];
int sock_init()
{
if ((sock = socket(AF_INET, SOCK_DGRAM, 0)) < 0) {
fprintf(stderr, "Error creating socket: %s\n", strerror(errno));
return -1;
}
return 0;
}
int main ( int argc, char **argp)
{
/* declare local variables */
FILE *pFile;
uint8_t* image;
uint8_t byte;
unsigned int PHY_ID;
AQ_Retcode resultCode;
AQ_Retcode resultCodes[4];
uint32_t i;
uint32_t imageSize;
char sourceFileName[1000];
AQ_API_Port targetPort0;
AQ_API_Port* targetPorts[1];
AQ_API_Port broadcastPort;
unsigned int provisioningAddresses[1] = {0};
uint32_t reg1, reg2;
targetPorts[0] = &targetPort0;
if(argc < 4) {
fprintf (stderr, "enter file name/netdev name/phy address\n");
return (101);
}
/*Copy the file name from command line arg*/
if (strlcpy (sourceFileName, argp[1], sizeof(sourceFileName)) >= sizeof(sourceFileName)) {
fprintf (stderr, "Filename: %s too long \n", argp[1]);
return (101);
}
/*Copy the interface name from command line arg*/
strlcpy (devname, argp[2], sizeof(devname));
/*Get PHY Address from command line arg*/
PHY_ID = (unsigned int)strtoul(argp[3], NULL, 0);
/* FIXME: set port and device type */
targetPort0.device = AQ_DEVICE_HHD;
targetPort0.PHY_ID = PHY_ID;
broadcastPort.device = AQ_DEVICE_HHD;
broadcastPort.PHY_ID = PHY_ID;
/* open the source in binary read mode */
pFile = fopen(sourceFileName, "rb");
if (pFile == NULL)
{
fprintf (stderr, "Unable to open source file %s\n", sourceFileName);
return (101);
}
fseek (pFile, 0, SEEK_END);
imageSize = ftell (pFile);
image = (uint8_t*) malloc (imageSize * sizeof(uint8_t));
fseek (pFile, 0, SEEK_SET);
/* load the file */
for (i = 0; i < imageSize; i++)
{
byte = (uint8_t) fgetc (pFile);
image[i] = byte;
}
fclose(pFile);
if (sock_init() < 0)
{
fprintf (stderr, "Unable to initialize interface\n");
return (200);
}
/* Write in the Auantia phy scratch pad register,
* read back the same reg and match the values written.
*/
AQ_API_MDIO_Write(PHY_ID, 0x1e, 0x300, 0xdead);
AQ_API_MDIO_Write(PHY_ID, 0x1e, 0x301, 0xbeaf);
reg1 = AQ_API_MDIO_Read(PHY_ID, 0x1e, 0x300);
reg2 = AQ_API_MDIO_Read(PHY_ID, 0x1e, 0x301);
if(reg1 != 0xdead && reg2 != 0xbeaf) {
fprintf (stderr, "Scratchpad Read/Write test fail\n");
return (101);
}
/* call the boot-load function */
resultCode = AQ_API_WriteBootLoadImage(targetPorts, 1, provisioningAddresses, resultCodes, &imageSize, image, PHY_ID, &broadcastPort);
switch (resultCode)
{
case 0:
printf("Image load good - mailbox CRC-16 matches\n");
free (image);
close(sock);
return 0;
case 1:
fprintf (stderr, "CRC-16 on file is bad\n");
free (image);
close(sock);
return 1;
case 2:
fprintf (stderr, "CRC-16 check on image load failed (mailbox CRC-16 check)\n");
free (image);
close(sock);
return 2;
default:
fprintf (stderr, "Invalid return code\n");
free (image);
close(sock);
}
return 12;
}
/*@}*/

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qca/aq-fw-download/src/src/AQ_API.c
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qca/aq-fw-download/src/src/AQ_PhyInterface.c
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/* AQ_PhyInterface.c */
/************************************************************************************
* Copyright (c) 2015, Aquantia
*
* Permission to use, copy, modify, and/or distribute this software for any
* purpose with or without fee is hereby granted, provided that the above
* copyright notice and this permission notice appear in all copies.
*
* THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
* WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
* MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
* ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
* WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
* ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
* OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
*
* $Revision: #12 $
*
* $DateTime: 2015/02/25 15:34:49 $
*
* $Label: $
*
************************************************************************************/
#include <stdio.h>
#include <stdlib.h>
#include <stdint.h>
#include <sys/ioctl.h>
#include <string.h>
#include <unistd.h>
#include <time.h>
#include <errno.h>
#include <sys/socket.h>
#include <sys/types.h>
#include <net/if.h>
#include <linux/sockios.h>
#include <linux/mii.h>
#include <linux/ethtool.h>
#include "AQ_PhyInterface.h"
#include "AQ_PlatformRoutines.h"
#define MII_ADDR_C45 (0x8000)
extern int sock;
extern char devname[7];
static struct ifreq ifr;
/*! Provides generic synchronous PHY register write functionality. It is the
* responsibility of the system designer to provide the specific MDIO address
* pointer updates, etc. in order to accomplish this write operation.
* It will be assumed that the write has been completed by the time this
* function returns.*/
void AQ_API_MDIO_Write(
/*! Uniquely identifies the port within the system. AQ_Port must be
* defined to a whatever data type is suitable for the platform.*/
AQ_Port PHY_ID,
/*! The address of the MMD within the target PHY. */
unsigned int MMD,
/*! The 16-bit address of the PHY register being written. */
unsigned int address,
/*! The 16-bits of data to write to the specified PHY register. */
unsigned int data)
{
struct mii_ioctl_data mii;
/*
* Frame the control structures
* and send the ioctl to kernel.
*/
memset(&ifr, 0, sizeof(ifr));
strlcpy(ifr.ifr_name, devname, sizeof(ifr.ifr_name));
memset(&mii, 0, sizeof(mii));
memcpy(&mii, &ifr.ifr_data, sizeof(mii));
mii.phy_id = MII_ADDR_C45 | PHY_ID << 5 | MMD;
mii.reg_num = address;
mii.val_in = data;
memcpy(&ifr.ifr_data, &mii, sizeof(mii));
if (ioctl(sock, SIOCSMIIREG, &ifr) < 0) {
fprintf(stderr, "SIOCSMIIREG on %s failed: %s\n", ifr.ifr_name,
strerror(errno));
}
return;
}
/*! Provides generic synchronous PHY register read functionality. It is the
* responsibility of the system designer to provide the specific MDIO address
* pointer updates, etc. in order to accomplish this read operation.*/
unsigned int AQ_API_MDIO_Read
(
/*! Uniquely identifies the port within the system. AQ_Port must be
* defined to a whatever data type is suitable for the platform.*/
AQ_Port PHY_ID,
/*! The address of the MMD within the target PHY. */
unsigned int MMD,
/*! The 16-bit address of the PHY register being read. */
unsigned int address)
{
struct mii_ioctl_data mii;
/*
* Frame the control structures
* and send the ioctl to kernel.
*/
memset(&ifr, 0, sizeof(ifr));
strlcpy(ifr.ifr_name, devname, sizeof(ifr.ifr_name));
memset(&mii, 0, sizeof(mii));
memcpy(&mii, &ifr.ifr_data, sizeof(mii));
mii.phy_id = MII_ADDR_C45 | PHY_ID << 5 | MMD;
mii.reg_num = address;
memcpy(&ifr.ifr_data, &mii, sizeof(mii));
if (ioctl(sock, SIOCGMIIREG, &ifr) < 0) {
fprintf(stderr, "SIOCGMIIREG on %s failed: %s\n", ifr.ifr_name,
strerror(errno));
return -1;
} else {
memcpy(&mii, &ifr.ifr_data, sizeof(mii));
}
return mii.val_out;
}
/*! Returns after at least milliseconds have elapsed. This must be implemented
* * in a platform-approriate way. AQ_API functions will call this function to
* * block for the specified period of time. If necessary, PHY register reads
* * may be performed on port to busy-wait. */
void AQ_API_Wait(
uint32_t milliseconds, /*!< The delay in milliseconds */
AQ_API_Port* port /*!< The PHY to use if delay reads are necessary*/ )
{
unsigned long long mirco = milliseconds *1000;
usleep(mirco);
}

34
qca/nss-eip-firmware/Makefile
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@ -1,34 +0,0 @@
include $(TOPDIR)/rules.mk
PKG_NAME:=nss-eip-firmware
PKG_VERSION=2.5.7
PKG_RELEASE:=$(AUTORELEASE)
PKG_MAINTAINER:=Robert Marko <robimarko@gmail.com>
include $(INCLUDE_DIR)/package.mk
define Package/nss-eip-firmware
SECTION:=firmware
CATEGORY:=Firmware
TITLE:=NSS EIP-197 firmware
DEPENDS:=@(TARGET_ipq807x||TARGET_ipq60xx)
endef
define Build/Compile
endef
define Package/nss-eip-firmware/install
$(INSTALL_DIR) $(1)/lib/firmware/
$(INSTALL_DATA) \
$(PKG_BUILD_DIR)/ifpp.bin $(1)/lib/firmware/ifpp.bin
$(INSTALL_DATA) \
$(PKG_BUILD_DIR)/ipue.bin $(1)/lib/firmware/ipue.bin
$(INSTALL_DATA) \
$(PKG_BUILD_DIR)/ofpp.bin $(1)/lib/firmware/ofpp.bin
$(INSTALL_DATA) \
$(PKG_BUILD_DIR)/opue.bin $(1)/lib/firmware/opue.bin
endef
$(eval $(call BuildPackage,nss-eip-firmware))

0
qca/nss-eip-firmware/src/.gitkeep
View file

72
qca/nss-firmware/Makefile
View file

@ -1,72 +0,0 @@
#
# Copyright (C) 2021 OpenWrt.org
#
# This is free software, licensed under the GNU General Public License v2.
# See /LICENSE for more information.
#
include $(TOPDIR)/rules.mk
PKG_NAME:=nss-firmware
PKG_SOURCE_DATE:=2022-05-16
PKG_SOURCE_VERSION:=20c9a9b7e0ea2935b0a54f112104e433009312ca
PKG_MIRROR_HASH:=376b3605776f75bccb1da2b30dd522cc22d3f6b17dff6c954dd9b7222418d6c6
PKG_RELEASE:=$(AUTORELEASE)
PKG_SOURCE_PROTO:=git
PKG_SOURCE_URL:=https://github.com/quic/qca-sdk-nss-fw.git
PKG_LICENSE_FILES:=LICENSE.md
PKG_MAINTAINER:=Robert Marko <robimarko@gmail.com>
include $(INCLUDE_DIR)/package.mk
VERSION_PATH=$(PKG_BUILD_DIR)/QCA_Networking.SPF_11.5.0/CS
define Package/nss-firmware-default
SECTION:=firmware
CATEGORY:=Firmware
URL:=$(PKG_SOURCE_URL)
DEPENDS:=@(TARGET_ipq807x||TARGET_ipq60xx)
endef
define Package/nss-firmware-ipq6018
$(Package/nss-firmware-default)
TITLE:=NSS firmware for IPQ6018 devices
NSS_ARCHIVE:=$(VERSION_PATH)/IPQ6018.ATH.11.4/BIN-NSS.CP.11.4.0.5-5-R.tar.bz2
endef
define Package/nss-firmware-ipq8074
$(Package/nss-firmware-default)
TITLE:=NSS firmware for IPQ8074 devices
NSS_ARCHIVE:=$(VERSION_PATH)/IPQ8074.ATH.11.5.0/BIN-NSS.FW.12.0.r1-002-HK.R.tar.bz2
endef
define Build/Compile
endef
define Package/nss-firmware-ipq6018/install
mkdir -p $(PKG_BUILD_DIR)/IPQ6018
$(TAR) -C $(PKG_BUILD_DIR)/IPQ6018 -xf $(NSS_ARCHIVE) --strip-components=1
$(INSTALL_DIR) $(1)/lib/firmware/
$(INSTALL_DATA) \
$(PKG_BUILD_DIR)/IPQ6018/retail_router0.bin \
$(1)/lib/firmware/qca-nss0-retail.bin
endef
define Package/nss-firmware-ipq8074/install
mkdir -p $(PKG_BUILD_DIR)/IPQ8074
$(TAR) -C $(PKG_BUILD_DIR)/IPQ8074 -xf $(NSS_ARCHIVE) --strip-components=1
$(INSTALL_DIR) $(1)/lib/firmware/
$(INSTALL_DATA) \
$(PKG_BUILD_DIR)/IPQ8074/retail_router0.bin \
$(1)/lib/firmware/qca-nss0-retail.bin
$(INSTALL_DATA) \
$(PKG_BUILD_DIR)/IPQ8074/retail_router1.bin \
$(1)/lib/firmware/qca-nss1-retail.bin
endef
$(eval $(call BuildPackage,nss-firmware-ipq6018))
$(eval $(call BuildPackage,nss-firmware-ipq8074))

71
qca/qca-nss-cfi/Makefile
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@ -1,71 +0,0 @@
include $(TOPDIR)/rules.mk
PKG_NAME:=qca-nss-cfi
PKG_RELEASE:=1
PKG_SOURCE_PROTO:=git
PKG_SOURCE_DATE:=2021-03-22
PKG_SOURCE_URL:=https://source.codeaurora.org/quic/qsdk/oss/lklm/nss-cfi
PKG_SOURCE_VERSION:=73f2e5f5bf93cc244036ce5641faf9f859692cdf
PKG_MIRROR_HASH:=8c8edc9b8d8c68fdd14640152245013a93c123957b6b338c06f266f6c9db8cbd
include $(INCLUDE_DIR)/kernel.mk
include $(INCLUDE_DIR)/package.mk
# v1.0 is for Akronite
# v2.0 is for Hawkeye/Cypress/Maple
ifneq (, $(findstring $(BOARD), ipq50xx ipq60xx ipq807x))
CFI_OCF_DIR:=ocf/v2.0
CFI_CRYPTOAPI_DIR:=cryptoapi/v2.0
else
CFI_CRYPTOAPI_DIR:=cryptoapi/v1.1
CFI_OCF_DIR:=ocf/v1.0
CFI_IPSEC_DIR:=ipsec/v1.0
endif
define KernelPackage/qca-nss-cfi-cryptoapi
SECTION:=kernel
CATEGORY:=Kernel modules
SUBMENU:=Network Devices
DEPENDS:=@TARGET_ipq60xx +kmod-crypto-authenc +kmod-qca-nss-crypto
TITLE:=Kernel driver for NSS cfi
FILES:=$(PKG_BUILD_DIR)/$(CFI_CRYPTOAPI_DIR)/qca-nss-cfi-cryptoapi.ko
AUTOLOAD:=$(call AutoLoad,59,qca-nss-cfi-cryptoapi)
endef
define Build/InstallDev
$(INSTALL_DIR) $(1)/usr/include/qca-nss-cfi
$(CP) $(PKG_BUILD_DIR)/$(CFI_CRYPTOAPI_DIR)/../exports/* $(1)/usr/include/qca-nss-cfi
$(CP) $(PKG_BUILD_DIR)/include/* $(1)/usr/include/qca-nss-cfi
endef
define KernelPackage/qca-nss-cfi/Description
This package contains a NSS cfi driver for QCA chipset
endef
EXTRA_CFLAGS+= \
-DCONFIG_NSS_DEBUG_LEVEL=4 \
-I$(LINUX_DIR)/crypto/ocf \
-I$(STAGING_DIR)/usr/include/qca-nss-crypto \
-I$(STAGING_DIR)/usr/include/crypto \
-I$(STAGING_DIR)/usr/include/qca-nss-drv
ifneq (, $(findstring $(BOARD), ipq50xx ipq60xx ipq807x))
EXTRA_CFLAGS+= -I$(STAGING_DIR)/usr/include/qca-nss-clients
endif
define Build/Compile
$(MAKE) -C "$(LINUX_DIR)" \
CROSS_COMPILE="$(TARGET_CROSS)" \
EXTRA_CFLAGS="$(EXTRA_CFLAGS)" \
CFI_CRYPTOAPI_DIR=$(CFI_CRYPTOAPI_DIR) \
CFI_IPSEC_DIR=$(CFI_IPSEC_DIR) \
CFI_OCF_DIR=$(CFI_OCF_DIR) \
$(KERNEL_MAKE_FLAGS) \
M="$(PKG_BUILD_DIR)" \
SoC="$(BOARD)_64" \
"cryptoapi=y" \
modules
endef
$(eval $(call KernelPackage,qca-nss-cfi-cryptoapi))

30
qca/qca-nss-cfi/patches/100-remove-noise-logs.patch
View file

@ -1,30 +0,0 @@
--- a/cryptoapi/v2.0/nss_cryptoapi_ahash.c
+++ b/cryptoapi/v2.0/nss_cryptoapi_ahash.c
@@ -449,9 +449,12 @@ int nss_cryptoapi_ahash_digest(struct ahash_request *req)
int nss_cryptoapi_ahash_export(struct ahash_request *req, void *out)
{
struct nss_cryptoapi_ctx *ctx __attribute__((unused)) = crypto_tfm_ctx(req->base.tfm);
+ struct nss_cryptoapi_req_ctx *rctx = ahash_request_ctx(req);
+ struct nss_cryptoapi_req_ctx *state = out;
+
+ *state = *rctx;
- nss_cfi_warn("%px: ahash .export is not supported", ctx);
- return -ENOSYS;
+ return 0;
};
/*
@@ -464,7 +467,10 @@ int nss_cryptoapi_ahash_export(struct ahash_request *req, void *out)
int nss_cryptoapi_ahash_import(struct ahash_request *req, const void *in)
{
struct nss_cryptoapi_ctx *ctx __attribute__((unused)) = crypto_tfm_ctx(req->base.tfm);
+ struct nss_cryptoapi_req_ctx *rctx = ahash_request_ctx(req);
+ const struct nss_cryptoapi_req_ctx *state = in;
+
+ *rctx = *state;
- nss_cfi_warn("%px: ahash .import is not supported", ctx);
- return -ENOSYS;
+ return 0;
}

102
qca/qca-nss-clients/Makefile
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@ -1,102 +0,0 @@
include $(TOPDIR)/rules.mk
PKG_NAME:=qca-nss-clients
PKG_RELEASE:=$(AUTORELEASE)
PKG_SOURCE_URL:=https://git.codelinaro.org/clo/qsdk/oss/lklm/nss-clients.git
PKG_SOURCE_PROTO:=git
PKG_SOURCE_DATE:=2021-07-23
PKG_SOURCE_VERSION:=ec7a57bed8914adcbd5bf95de1f0b630296489c1
PKG_MIRROR_HASH:=b7413c5b20a341d3d7ea49c1b86ff92b4a8795aa7c64986ca820ba18205e332d
include $(INCLUDE_DIR)/kernel.mk
include $(INCLUDE_DIR)/package.mk
define KernelPackage/qca-nss-drv-pppoe
SECTION:=kernel
CATEGORY:=Kernel modules
SUBMENU:=Network Devices
TITLE:=Kernel driver for NSS (connection manager) - PPPoE
DEPENDS:=@LINUX_5_10 @TARGET_ipq807x +kmod-qca-nss-drv +kmod-ppp +kmod-pppoe
FILES:=$(PKG_BUILD_DIR)/pppoe/qca-nss-pppoe.ko
AUTOLOAD:=$(call AutoLoad,51,qca-nss-pppoe)
endef
define KernelPackage/qca-nss-drv-pppoe/Description
Kernel modules for NSS connection manager - Support for PPPoE
endef
define KernelPackage/qca-nss-drv-bridge-mgr
SECTION:=kernel
CATEGORY:=Kernel modules
SUBMENU:=Network Devices
TITLE:=Kernel driver for NSS bridge manager
DEPENDS:=@LINUX_5_10 @TARGET_ipq807x +kmod-qca-nss-drv +kmod-qca-nss-drv-vlan-mgr
FILES:=$(PKG_BUILD_DIR)/bridge/qca-nss-bridge-mgr.ko
AUTOLOAD:=$(call AutoLoad,51,qca-nss-bridge-mgr)
endef
define KernelPackage/qca-nss-drv-bridge-mgr/Description
Kernel modules for NSS bridge manager
endef
define KernelPackage/qca-nss-drv-vlan-mgr
SECTION:=kernel
CATEGORY:=Kernel modules
SUBMENU:=Network Devices
TITLE:=Kernel driver for NSS vlan manager
DEPENDS:=@LINUX_5_10 @TARGET_ipq807x +kmod-qca-nss-drv
FILES:=$(PKG_BUILD_DIR)/vlan/qca-nss-vlan.ko
AUTOLOAD:=$(call AutoLoad,51,qca-nss-vlan)
endef
define KernelPackage/qca-nss-drv-vlan-mgr/Description
Kernel modules for NSS vlan manager
endef
EXTRA_CFLAGS+= \
-I$(STAGING_DIR)/usr/include/qca-nss-drv \
-I$(STAGING_DIR)/usr/include/qca-nss-crypto \
-I$(STAGING_DIR)/usr/include/qca-nss-cfi \
-I$(STAGING_DIR)/usr/include/qca-nss-gmac \
-I$(STAGING_DIR)/usr/include/qca-ssdk \
-I$(STAGING_DIR)/usr/include/qca-ssdk/fal \
-I$(STAGING_DIR)/usr/include/nat46
ifneq ($(CONFIG_PACKAGE_kmod-qca-nss-drv-pppoe),)
NSS_CLIENTS_MAKE_OPTS+=pppoe=y
endif
ifneq ($(CONFIG_PACKAGE_kmod-qca-nss-drv-bridge-mgr),)
NSS_CLIENTS_MAKE_OPTS+=bridge-mgr=y
#enable OVS bridge if ovsmgr is enabled
ifneq ($(CONFIG_PACKAGE_kmod-qca-ovsmgr),)
NSS_CLIENTS_MAKE_OPTS+= NSS_BRIDGE_MGR_OVS_ENABLE=y
EXTRA_CFLAGS+= -I$(STAGING_DIR)/usr/include/qca-ovsmgr
endif
endif
ifneq ($(CONFIG_PACKAGE_kmod-qca-nss-drv-vlan-mgr),)
NSS_CLIENTS_MAKE_OPTS+=vlan-mgr=y
endif
ifeq ($(CONFIG_TARGET_BOARD), "ipq807x")
SOC="ipq807x_64"
else ifeq ($(CONFIG_TARGET_BOARD), "ipq60xx")
SOC="ipq60xx_64"
endif
define Build/Compile
$(MAKE) -C "$(LINUX_DIR)" $(strip $(NSS_CLIENTS_MAKE_OPTS)) \
CROSS_COMPILE="$(TARGET_CROSS)" \
ARCH="$(LINUX_KARCH)" \
M="$(PKG_BUILD_DIR)" \
EXTRA_CFLAGS="$(EXTRA_CFLAGS)" \
SoC=$(SOC) \
$(KERNEL_MAKE_FLAGS) \
modules
endef
$(eval $(call KernelPackage,qca-nss-drv-pppoe))
$(eval $(call KernelPackage,qca-nss-drv-bridge-mgr))
$(eval $(call KernelPackage,qca-nss-drv-vlan-mgr))

214
qca/qca-nss-clients/files/qca-nss-ipsec
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@ -1,214 +0,0 @@
#!/bin/sh /etc/rc.common
#
# Copyright (c) 2018-2019, 2021 The Linux Foundation. All rights reserved.
#
# Permission to use, copy, modify, and/or distribute this software for any
# purpose with or without fee is hereby granted, provided that the above
# copyright notice and this permission notice appear in all copies.
#
# THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
# WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
# MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
# ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
# WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
# ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
# OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
NSS_IPSEC_LOG_FILE=/tmp/.nss_ipsec_log
NSS_IPSEC_LOG_STR_ECM="ECM_Loaded"
NSS_IPSEC_OL_FILE=/tmp/qca_nss_ipsec_ol
ecm_load () {
if [ ! -d /sys/module/ecm ]; then
/etc/init.d/qca-nss-ecm start
if [ -d /sys/module/ecm ]; then
echo ${NSS_IPSEC_LOG_STR_ECM} >> ${NSS_IPSEC_LOG_FILE}
fi
fi
}
ecm_unload () {
if [ -f /tmp/.nss_ipsec_log ]; then
str=`grep ${NSS_IPSEC_LOG_STR_ECM} ${NSS_IPSEC_LOG_FILE}`
if [[ $str == ${NSS_IPSEC_LOG_STR_ECM} ]]; then
/etc/init.d/qca-nss-ecm stop
`sed 's/${NSS_IPSEC_LOG_STR_ECM}/ /g' $NSS_IPSEC_LOG_FILE > $NSS_IPSEC_LOG_FILE`
fi
fi
}
ecm_disable() {
if [ ! -d /sys/module/ecm ]; then
return;
fi
echo 1 > /sys/kernel/debug/ecm/front_end_ipv4_stop
echo 1 > /sys/kernel/debug/ecm/front_end_ipv6_stop
echo 1 > /sys/kernel/debug/ecm/ecm_db/defunct_all
sleep 2
}
ecm_enable() {
if [ ! -d /sys/module/ecm ]; then
return;
fi
echo 0 > /sys/kernel/debug/ecm/ecm_db/defunct_all
echo 0 > /sys/kernel/debug/ecm/front_end_ipv4_stop
echo 0 > /sys/kernel/debug/ecm/front_end_ipv6_stop
}
kernel_version_check_5_4() {
major_ver=$(uname -r | awk -F '.' '{print $1}')
minor_ver=$(uname -r | awk -F '.' '{print $2}')
if [ $major_ver -lt 5 ] || ([ $major_ver -eq 5 ] && [ $minor_ver -lt 4 ] ) ; then
return 1
else
return 0
fi
}
start_klips() {
if kernel_version_check_5_4
then
echo "Kernel 5.4 doesn't support klips stack."
return $?
fi
touch $NSS_IPSEC_OL_FILE
ecm_load
local kernel_version=$(uname -r)
insmod /lib/modules/${kernel_version}/qca-nss-ipsec-klips.ko
if [ "$?" -gt 0 ]; then
echo "Failed to load plugin. Please start ecm if not done already"
ecm_enable
rm $NSS_IPSEC_OL_FILE
return
fi
/etc/init.d/ipsec start
sleep 2
ipsec eroute
ecm_enable
}
stop_klips() {
if kernel_version_check_5_4
then
echo "Kernel 5.4 doesn't support klips stack."
return $?
fi
ecm_disable
/etc/init.d/ipsec stop
rmmod qca-nss-ipsec-klips
rm $NSS_IPSEC_OL_FILE
ecm_unload
}
start_xfrm() {
touch $NSS_IPSEC_OL_FILE
ecm_load
local kernel_version=$(uname -r)
# load all NETKEY modules first.
for mod in xfrm_ipcomp ipcomp xfrm6_tunnel ipcomp6 xfrm6_mode_tunnel xfrm6_mode_beet xfrm6_mode_ro \
xfrm6_mode_transport xfrm4_mode_transport xfrm4_mode_tunnel \
xfrm4_tunnel xfrm4_mode_beet esp4 esp6 ah4 ah6 af_key
do
insmod $mod 2> /dev/null
done
# Now load the xfrm plugin
insmod /lib/modules/${kernel_version}/qca-nss-ipsec-xfrm.ko
if [ "$?" -gt 0 ]; then
echo "Failed to load plugin. Please start ecm if not done already"
ecm_enable
rm $NSS_IPSEC_OL_FILE
return
fi
/etc/init.d/ipsec start
sleep 2
ecm_enable
}
stop_xfrm() {
ecm_disable
#Shutdown Pluto first. Then only plugin can be removed.
plutopid=/var/run/pluto/pluto.pid
if [ -f $plutopid ]; then
pid=`cat $plutopid`
if [ ! -z "$pid" ]; then
ipsec whack --shutdown | grep -v "002";
if [ -s $plutopid ]; then
echo "Attempt to shut Pluto down failed! Trying kill:"
kill $pid;
sleep 5;
fi
fi
rm -rf $plutopid
fi
ip xfrm state flush;
ip xfrm policy flush;
sleep 2
#Now we can remove the plugin
retries=5
while [ -d /sys/module/qca_nss_ipsec_xfrm ]
do
rmmod qca-nss-ipsec-xfrm
if [ "$?" -eq 0 ]; then
rm $NSS_IPSEC_OL_FILE
break
fi
if [ ${retries} -eq 0 ]; then
echo "Failed to unload qca-nss-ipsec-xfrm plugin!"
exit
fi
echo "XFRM plugin unload failed; retrying ${retries} times"
sleep 1
retries=`expr ${retries} - 1`
done
/etc/init.d/ipsec stop
ecm_unload
}
start() {
local protostack=`uci -q get ipsec.setup.protostack`
if [ "$protostack" = "klips" ]; then
start_klips
return $?
fi
start_xfrm
return $?
}
stop() {
local protostack=`uci -q get ipsec.setup.protostack`
if [ "$protostack" = "klips" ]; then
stop_klips
return $?
fi
stop_xfrm
return $?
}
restart() {
stop
start
}

28
qca/qca-nss-clients/files/qca-nss-mirred.init
View file

@ -1,28 +0,0 @@
#!/bin/sh /etc/rc.common
###########################################################################
# Copyright (c) 2019, The Linux Foundation. All rights reserved.
# Permission to use, copy, modify, and/or distribute this software for
# any purpose with or without fee is hereby granted, provided that the
# above copyright notice and this permission notice appear in all copies.
# THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
# WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
# MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
# ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
# WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
# ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT
# OF OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
###########################################################################
restart() {
rmmod act_nssmirred.ko
insmod act_nssmirred.ko
}
start() {
insmod act_nssmirred.ko
}
stop() {
rmmod act_nssmirred.ko
}

69
qca/qca-nss-clients/files/qca-nss-ovpn.init
View file

@ -1,69 +0,0 @@
#!/bin/sh /etc/rc.common
###########################################################################
# Copyright (c) 2019, The Linux Foundation. All rights reserved.
# Permission to use, copy, modify, and/or distribute this software for
# any purpose with or without fee is hereby granted, provided that the
# above copyright notice and this permission notice appear in all copies.
# THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
# WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
# MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
# ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
# WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
# ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT
# OF OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
###########################################################################
ecm_disable() {
if [ ! -d /sys/module/ecm ]; then
return
fi
echo 1 > /sys/kernel/debug/ecm/front_end_ipv4_stop
echo 1 > /sys/kernel/debug/ecm/front_end_ipv6_stop
echo 1 > /sys/kernel/debug/ecm/ecm_db/defunct_all
sleep 2
}
ecm_enable() {
if [ ! -d /sys/module/ecm ]; then
return
fi
echo 0 > /sys/kernel/debug/ecm/ecm_db/defunct_all
echo 0 > /sys/kernel/debug/ecm/front_end_ipv4_stop
echo 0 > /sys/kernel/debug/ecm/front_end_ipv6_stop
}
restart() {
ecm_disable
/etc/init.d/openvpn stop
rmmod qca-nss-ovpn-link
rmmod qca-nss-ovpn-mgr
insmod qca-nss-ovpn-mgr
insmod qca-nss-ovpn-link
if [ "$?" -gt 0 ]; then
echo "Failed to load plugin. Please start ecm if not done already"
ecm_enable
return
fi
ecm_enable
}
start() {
restart
}
stop() {
ecm_disable
/etc/init.d/openvpn stop
rmmod qca-nss-ovpn-link
rmmod qca-nss-ovpn-mgr
ecm_enable
}

72
qca/qca-nss-crypto/Makefile
View file

@ -1,72 +0,0 @@
include $(TOPDIR)/rules.mk
PKG_NAME:=qca-nss-crypto
PKG_RELEASE:=$(AUTORELEASE)
PKG_SOURCE_URL:=https://git.codelinaro.org/clo/qsdk/oss/lklm/nss-crypto.git
PKG_SOURCE_PROTO:=git
PKG_SOURCE_DATE:=2021-03-20
PKG_SOURCE_VERSION:=2271a3a66f7e8284d42a9e787ddec6f24a1d2e15
PKG_MIRROR_HASH:=afd2b746779bf9abb72dfb58c755acf54d1cb51085b879013dd0edf9ba98d3c9
PKG_BUILD_PARALLEL:=1
include $(INCLUDE_DIR)/kernel.mk
include $(INCLUDE_DIR)/package.mk
ifeq ($(CONFIG_TARGET_BOARD), "ipq807x")
SOC="ipq807x_64"
else ifeq ($(CONFIG_TARGET_BOARD), "ipq60xx")
SOC="ipq60xx_64"
endif
# v1.0 is for Akronite
# v2.0 is for Hawkeye/Cypress/Maple
ifneq (, $(findstring $(CONFIG_TARGET_BOARD), "ipq807x" "ipq60xx"))
NSS_CRYPTO_DIR:=v2.0
else
NSS_CRYPTO_DIR:=v1.0
endif
define KernelPackage/qca-nss-crypto
SECTION:=kernel
CATEGORY:=Kernel modules
SUBMENU:=Cryptographic API modules
DEPENDS:=@(TARGET_ipq807x||TARGET_ipq60xx) +kmod-qca-nss-drv +nss-eip-firmware
TITLE:=Kernel driver for NSS crypto driver
FILES:=$(PKG_BUILD_DIR)/$(NSS_CRYPTO_DIR)/src/qca-nss-crypto.ko \
$(PKG_BUILD_DIR)/$(NSS_CRYPTO_DIR)/tool/qca-nss-crypto-tool.ko
AUTOLOAD:=$(call AutoLoad,52,qca-nss-crypto)
endef
define KernelPackage/qca-nss-crypto/Description
This package contains a NSS crypto driver for QCA chipset
endef
define Build/InstallDev
$(INSTALL_DIR) $(1)/usr/include/qca-nss-crypto
$(CP) $(PKG_BUILD_DIR)/$(NSS_CRYPTO_DIR)/include/* $(1)/usr/include/qca-nss-crypto
endef
EXTRA_CFLAGS+= \
-DCONFIG_NSS_DEBUG_LEVEL=4 \
-I$(STAGING_DIR)/usr/include/qca-nss-crypto \
-I$(STAGING_DIR)/usr/include/qca-nss-drv \
-I$(PKG_BUILD_DIR)/$(NSS_CRYPTO_DIR)/include \
-I$(PKG_BUILD_DIR)/$(NSS_CRYPTO_DIR)/src
define Build/Compile
+$(MAKE) -C "$(LINUX_DIR)" \
CC="$(TARGET_CC)" \
CROSS_COMPILE="$(TARGET_CROSS)" \
ARCH="$(LINUX_KARCH)" \
M="$(PKG_BUILD_DIR)" \
EXTRA_CFLAGS="$(EXTRA_CFLAGS)" \
NSS_CRYPTO_DIR=$(NSS_CRYPTO_DIR) \
SoC=$(SOC) \
$(KERNEL_MAKE_FLAGS) \
$(PKG_JOBS) \
modules
endef
$(eval $(call KernelPackage,qca-nss-crypto))

32
qca/qca-nss-crypto/patches/0001-nss-crypto-fix-SHA1-header-include.patch
View file

@ -1,32 +0,0 @@
From 68b7776673aabc2f93bd75e73ef4b45a1ac561d9 Mon Sep 17 00:00:00 2001
From: Robert Marko <robimarko@gmail.com>
Date: Sun, 13 Mar 2022 13:44:47 +0100
Subject: [PATCH 1/3] nss-crypto: fix SHA1 header include
SHA1 header has been merged to the generic SHA one,
and with that the cryptohash.h was dropped.
So, fix include in kernels 5.8 and newer.
Signed-off-by: Robert Marko <robimarko@gmail.com>
---
v2.0/src/nss_crypto_hlos.h | 2 ++
1 file changed, 2 insertions(+)
diff --git a/v2.0/src/nss_crypto_hlos.h b/v2.0/src/nss_crypto_hlos.h
index 84740c2..e827f4f 100644
--- a/v2.0/src/nss_crypto_hlos.h
+++ b/v2.0/src/nss_crypto_hlos.h
@@ -55,7 +55,9 @@
#include <linux/interrupt.h>
#include <linux/delay.h>
#include <linux/vmalloc.h>
+#if LINUX_VERSION_CODE < KERNEL_VERSION(5, 8, 0)
#include <linux/cryptohash.h>
+#endif
#include <crypto/sha.h>
#include <crypto/aes.h>
#include <crypto/des.h>
--
2.35.1

69
qca/qca-nss-crypto/patches/0002-nss-crypto-replace-ioremap_nocache-with-ioremap.patch
View file

@ -1,69 +0,0 @@
From 80393ab565e26d572de56b7502b069b0a944bd40 Mon Sep 17 00:00:00 2001
From: Robert Marko <robimarko@gmail.com>
Date: Tue, 8 Jun 2021 22:14:34 +0200
Subject: [PATCH 2/3] nss-crypto: replace ioremap_nocache() with ioremap
ioremap_nocache() was dropped in kernel 5.5 as regular
ioremap() was exactly the same.
So, simply replace all of the ioremap_nocache() calls
with ioremap().
Signed-off-by: Robert Marko <robimarko@gmail.com>
---
v2.0/src/hal/ipq50xx/nss_crypto_ce5.c | 4 ++--
v2.0/src/hal/ipq60xx/nss_crypto_eip197.c | 2 +-
v2.0/src/hal/ipq807x/nss_crypto_eip197.c | 2 +-
3 files changed, 4 insertions(+), 4 deletions(-)
diff --git a/v2.0/src/hal/ipq50xx/nss_crypto_ce5.c b/v2.0/src/hal/ipq50xx/nss_crypto_ce5.c
index c89cd38..a7a46e0 100644
--- a/v2.0/src/hal/ipq50xx/nss_crypto_ce5.c
+++ b/v2.0/src/hal/ipq50xx/nss_crypto_ce5.c
@@ -288,7 +288,7 @@ int nss_crypto_ce5_engine_init(struct platform_device *pdev, struct resource *cr
* remap the I/O addresses for crypto
*/
eng->crypto_paddr = crypto_res->start;
- eng->crypto_vaddr = ioremap_nocache(crypto_res->start, resource_size(crypto_res));
+ eng->crypto_vaddr = ioremap(crypto_res->start, resource_size(crypto_res));
if (!eng->crypto_vaddr) {
nss_crypto_warn("%px: unable to remap crypto_addr(0x%px)\n", node, (void *)eng->crypto_paddr);
nss_crypto_engine_free(eng);
@@ -299,7 +299,7 @@ int nss_crypto_ce5_engine_init(struct platform_device *pdev, struct resource *cr
* remap the I/O addresses for bam
*/
eng->dma_paddr = bam_res->start;
- eng->dma_vaddr = ioremap_nocache(bam_res->start, resource_size(bam_res));
+ eng->dma_vaddr = ioremap(bam_res->start, resource_size(bam_res));
if (!eng->dma_vaddr) {
iounmap(eng->crypto_vaddr);
nss_crypto_warn("%px: unable to remap dma_addr(0x%px)\n", node, (void *)eng->dma_paddr);
diff --git a/v2.0/src/hal/ipq60xx/nss_crypto_eip197.c b/v2.0/src/hal/ipq60xx/nss_crypto_eip197.c
index 8dfc35d..79649f9 100644
--- a/v2.0/src/hal/ipq60xx/nss_crypto_eip197.c
+++ b/v2.0/src/hal/ipq60xx/nss_crypto_eip197.c
@@ -490,7 +490,7 @@ int nss_crypto_eip197_engine_init(struct platform_device *pdev, struct device_no
* remap the I/O addresses
*/
paddr = res->start + offset;
- vaddr = ioremap_nocache(paddr, resource_size(res));
+ vaddr = ioremap(paddr, resource_size(res));
if (!vaddr) {
nss_crypto_warn("%px: unable to remap crypto_addr(0x%px)\n", node, (void *)paddr);
return -EIO;
diff --git a/v2.0/src/hal/ipq807x/nss_crypto_eip197.c b/v2.0/src/hal/ipq807x/nss_crypto_eip197.c
index 632adca..5e2c146 100644
--- a/v2.0/src/hal/ipq807x/nss_crypto_eip197.c
+++ b/v2.0/src/hal/ipq807x/nss_crypto_eip197.c
@@ -490,7 +490,7 @@ int nss_crypto_eip197_engine_init(struct platform_device *pdev, struct device_no
* remap the I/O addresses
*/
paddr = res->start + offset;
- vaddr = ioremap_nocache(paddr, resource_size(res));
+ vaddr = ioremap(paddr, resource_size(res));
if (!vaddr) {
nss_crypto_warn("%px: unable to remap crypto_addr(0x%px)\n", node, (void *)paddr);
return -EIO;
--
2.35.1

51
qca/qca-nss-crypto/patches/0003-nss-crypto-fix-SHA-header-include-in-5.15.patch
View file

@ -1,51 +0,0 @@
From 4c0cc66cde0c4a30aa049b586af311501304e9ce Mon Sep 17 00:00:00 2001
From: Robert Marko <robimarko@gmail.com>
Date: Sun, 13 Mar 2022 13:47:24 +0100
Subject: [PATCH 3/3] nss-crypto: fix SHA header include in 5.15
SHA header was split into SHA-1 and SHA-2 headers in kernel 5.11, so
fix the include for newer kernels.
Signed-off-by: Robert Marko <robimarko@gmail.com>
---
v2.0/src/nss_crypto_ctrl.c | 6 ++++++
v2.0/src/nss_crypto_hlos.h | 4 ++++
2 files changed, 10 insertions(+)
diff --git a/v2.0/src/nss_crypto_ctrl.c b/v2.0/src/nss_crypto_ctrl.c
index 72d1602..a462705 100644
--- a/v2.0/src/nss_crypto_ctrl.c
+++ b/v2.0/src/nss_crypto_ctrl.c
@@ -38,7 +38,13 @@
#include <linux/debugfs.h>
#include <linux/log2.h>
#include <linux/completion.h>
+#include <linux/version.h>
+#if LINUX_VERSION_CODE < KERNEL_VERSION(5, 11, 0)
#include <crypto/sha.h>
+#else
+#include <crypto/sha1.h>
+#include <crypto/sha2.h>
+#endif
#include <crypto/des.h>
#include <crypto/aes.h>
#include <crypto/md5.h>
diff --git a/v2.0/src/nss_crypto_hlos.h b/v2.0/src/nss_crypto_hlos.h
index e827f4f..5565472 100644
--- a/v2.0/src/nss_crypto_hlos.h
+++ b/v2.0/src/nss_crypto_hlos.h
@@ -58,7 +58,11 @@
#if LINUX_VERSION_CODE < KERNEL_VERSION(5, 8, 0)
#include <linux/cryptohash.h>
#endif
+#if LINUX_VERSION_CODE < KERNEL_VERSION(5, 11, 0)
#include <crypto/sha.h>
+#else
+#include <crypto/sha1.h>
+#endif
#include <crypto/aes.h>
#include <crypto/des.h>
#include <crypto/ghash.h>
--
2.35.1

56
qca/qca-nss-dp/Makefile
View file

@ -1,56 +0,0 @@
include $(TOPDIR)/rules.mk
PKG_NAME:=qca-nss-dp
PKG_RELEASE:=$(AUTORELEASE)
PKG_SOURCE_URL:=https://git.codelinaro.org/clo/qsdk/oss/lklm/nss-dp.git
PKG_SOURCE_PROTO:=git
PKG_SOURCE_DATE:=2022-04-30
PKG_SOURCE_VERSION:=72e9ec4187414461cbcf6ccff100e8b5ebe5f40b
PKG_MIRROR_HASH:=805f16e59c75511132922f97740ebf6bf953845b0bbfd2089c4615456893bb37
PKG_BUILD_PARALLEL:=1
include $(INCLUDE_DIR)/kernel.mk
include $(INCLUDE_DIR)/package.mk
define KernelPackage/qca-nss-dp
SECTION:=kernel
CATEGORY:=Kernel modules
SUBMENU:=Network Devices
DEPENDS:=@(TARGET_ipq807x||TARGET_ipq60xx) +kmod-qca-ssdk-nohnat
TITLE:=Kernel driver for NSS data plane
FILES:=$(PKG_BUILD_DIR)/qca-nss-dp.ko
AUTOLOAD:=$(call AutoLoad,31,qca-nss-dp,1)
endef
define KernelPackage/qca-nss-dp/Description
This package contains a NSS data plane driver for QCA chipset
endef
define Build/InstallDev
mkdir -p $(1)/usr/include/qca-nss-dp
$(CP) $(PKG_BUILD_DIR)/exports/* $(1)/usr/include/qca-nss-dp/
endef
EXTRA_CFLAGS+= \
-I$(STAGING_DIR)/usr/include/qca-ssdk
NSS_DP_HAL_DIR:=$(PKG_BUILD_DIR)/hal
define Build/Configure
$(LN) $(NSS_DP_HAL_DIR)/soc_ops/$(CONFIG_TARGET_BOARD)/nss_$(CONFIG_TARGET_BOARD).h \
$(PKG_BUILD_DIR)/exports/nss_dp_arch.h
endef
define Build/Compile
+$(MAKE) -C "$(LINUX_DIR)" \
CROSS_COMPILE="$(TARGET_CROSS)" \
ARCH="$(LINUX_KARCH)" \
M="$(PKG_BUILD_DIR)" \
EXTRA_CFLAGS="$(EXTRA_CFLAGS)" SoC="$(CONFIG_TARGET_BOARD)" \
$(KERNEL_MAKE_FLAGS) \
$(PKG_JOBS) \
modules
endef
$(eval $(call KernelPackage,qca-nss-dp))

44
qca/qca-nss-dp/patches/0001-edma_tx_rx-support-newer-kernels-time-stamping-API.patch
View file

@ -1,44 +0,0 @@
From 40979666b4371012405715ffa61ab5760fcdc6b3 Mon Sep 17 00:00:00 2001
Message-Id: <40979666b4371012405715ffa61ab5760fcdc6b3.1620066716.git.baruch@tkos.co.il>
From: Baruch Siach <baruch@tkos.co.il>
Date: Mon, 3 May 2021 20:07:36 +0300
Subject: [PATCH 1/3] edma_tx_rx: support newer kernels time stamping API
---
hal/dp_ops/edma_dp/edma_v1/edma_tx_rx.c | 11 +++++++++++
1 file changed, 11 insertions(+)
--- a/hal/dp_ops/edma_dp/edma_v1/edma_tx_rx.c
+++ b/hal/dp_ops/edma_dp/edma_v1/edma_tx_rx.c
@@ -227,10 +227,16 @@ void nss_phy_tstamp_rx_buf(__attribute__
* set to the correct PTP class value by calling ptp_classify_raw
* in drv->rxtstamp function.
*/
+#if (LINUX_VERSION_CODE < KERNEL_VERSION(5, 6, 0))
if (ndev && ndev->phydev && ndev->phydev->drv &&
ndev->phydev->drv->rxtstamp)
if(ndev->phydev->drv->rxtstamp(ndev->phydev, skb, 0))
return;
+#else
+ if (ndev && phy_has_rxtstamp(ndev->phydev))
+ if (phy_rxtstamp(ndev->phydev, skb, 0))
+ return;
+#endif
netif_receive_skb(skb);
}
@@ -248,9 +254,14 @@ void nss_phy_tstamp_tx_buf(struct net_de
* set to the correct PTP class value by calling ptp_classify_raw
* in the drv->txtstamp function.
*/
+#if (LINUX_VERSION_CODE < KERNEL_VERSION(5, 6, 0))
if (ndev && ndev->phydev && ndev->phydev->drv &&
ndev->phydev->drv->txtstamp)
ndev->phydev->drv->txtstamp(ndev->phydev, skb, 0);
+#else
+ if (ndev && phy_has_txtstamp(ndev->phydev))
+ phy_rxtstamp(ndev->phydev, skb, 0);
+#endif
}
EXPORT_SYMBOL(nss_phy_tstamp_tx_buf);

48
qca/qca-nss-dp/patches/0002-nss_dp_main-make-phy-mode-code-compatible-with-newer.patch
View file

@ -1,48 +0,0 @@
From cef7873a2d77df13ee702d902ed4e06b2248904b Mon Sep 17 00:00:00 2001
Message-Id: <cef7873a2d77df13ee702d902ed4e06b2248904b.1620066716.git.baruch@tkos.co.il>
In-Reply-To: <40979666b4371012405715ffa61ab5760fcdc6b3.1620066716.git.baruch@tkos.co.il>
References: <40979666b4371012405715ffa61ab5760fcdc6b3.1620066716.git.baruch@tkos.co.il>
From: Baruch Siach <baruch@tkos.co.il>
Date: Mon, 3 May 2021 20:17:22 +0300
Subject: [PATCH 2/3] nss_dp_main: make phy mode code compatible with newer
kernels
---
include/nss_dp_dev.h | 4 ++--
nss_dp_main.c | 4 ++++
2 files changed, 6 insertions(+), 2 deletions(-)
--- a/include/nss_dp_dev.h
+++ b/include/nss_dp_dev.h
@@ -22,7 +22,7 @@
#include <linux/etherdevice.h>
#include <linux/netdevice.h>
#include <linux/platform_device.h>
-#include <linux/switch.h>
+#include <linux/phy.h>
#include <linux/version.h>
#include "nss_dp_api_if.h"
@@ -99,7 +99,7 @@ struct nss_dp_dev {
/* Phy related stuff */
struct phy_device *phydev; /* Phy device */
struct mii_bus *miibus; /* MII bus */
- uint32_t phy_mii_type; /* RGMII/SGMII/QSGMII */
+ phy_interface_t phy_mii_type; /* RGMII/SGMII/QSGMII */
uint32_t phy_mdio_addr; /* Mdio address */
bool link_poll; /* Link polling enable? */
uint32_t forced_speed; /* Forced speed? */
--- a/nss_dp_main.c
+++ b/nss_dp_main.c
@@ -584,7 +584,11 @@ static int32_t nss_dp_of_get_pdata(struc
hal_pdata->netdev = netdev;
hal_pdata->macid = dp_priv->macid;
+#if (LINUX_VERSION_CODE < KERNEL_VERSION(5, 5, 0))
dp_priv->phy_mii_type = of_get_phy_mode(np);
+#else
+ of_get_phy_mode(np, &dp_priv->phy_mii_type);
+#endif
dp_priv->link_poll = of_property_read_bool(np, "qcom,link-poll");
if (of_property_read_u32(np, "qcom,phy-mdio-addr",
&dp_priv->phy_mdio_addr) && dp_priv->link_poll) {

48
qca/qca-nss-dp/patches/0003-Drop-_nocache-variants-of-ioremap.patch
View file

@ -1,48 +0,0 @@
From c8c52512ff48bee578901c381a42f027e79eadf9 Mon Sep 17 00:00:00 2001
Message-Id: <c8c52512ff48bee578901c381a42f027e79eadf9.1620066716.git.baruch@tkos.co.il>
In-Reply-To: <40979666b4371012405715ffa61ab5760fcdc6b3.1620066716.git.baruch@tkos.co.il>
References: <40979666b4371012405715ffa61ab5760fcdc6b3.1620066716.git.baruch@tkos.co.il>
From: Baruch Siach <baruch@tkos.co.il>
Date: Mon, 3 May 2021 20:20:29 +0300
Subject: [PATCH 3/3] Drop _nocache variants of ioremap()
Recent kernels removed them.
---
hal/dp_ops/edma_dp/edma_v1/edma_data_plane.c | 2 +-
hal/gmac_ops/qcom/qcom_if.c | 2 +-
hal/gmac_ops/syn/xgmac/syn_if.c | 2 +-
3 files changed, 3 insertions(+), 3 deletions(-)
--- a/hal/dp_ops/edma_dp/edma_v1/edma_data_plane.c
+++ b/hal/dp_ops/edma_dp/edma_v1/edma_data_plane.c
@@ -279,7 +279,7 @@ int edma_init(void)
/*
* Remap register resource
*/
- edma_hw.reg_base = ioremap_nocache((edma_hw.reg_resource)->start,
+ edma_hw.reg_base = ioremap((edma_hw.reg_resource)->start,
resource_size(edma_hw.reg_resource));
if (!edma_hw.reg_base) {
pr_warn("Unable to remap EDMA register memory.\n");
--- a/hal/gmac_ops/qcom/qcom_if.c
+++ b/hal/gmac_ops/qcom/qcom_if.c
@@ -418,7 +418,7 @@ static void *qcom_init(struct nss_gmac_h
qhd->nghd.mac_id = gmacpdata->macid;
/* Populate the mac base addresses */
- qhd->nghd.mac_base = devm_ioremap_nocache(&dp_priv->pdev->dev,
+ qhd->nghd.mac_base = devm_ioremap(&dp_priv->pdev->dev,
res->start, resource_size(res));
if (!qhd->nghd.mac_base) {
netdev_dbg(ndev, "ioremap fail.\n");
--- a/hal/gmac_ops/syn/xgmac/syn_if.c
+++ b/hal/gmac_ops/syn/xgmac/syn_if.c
@@ -432,7 +432,7 @@ static void *syn_init(struct nss_gmac_ha
/* Populate the mac base addresses */
shd->nghd.mac_base =
- devm_ioremap_nocache(&dp_priv->pdev->dev, res->start,
+ devm_ioremap(&dp_priv->pdev->dev, res->start,
resource_size(res));
if (!shd->nghd.mac_base) {
netdev_dbg(ndev, "ioremap fail.\n");

31
qca/qca-nss-dp/patches/0004-EDMA-Fix-NAPI-packet-counting.patch
View file

@ -1,31 +0,0 @@
From d74920e2a7c413ef40eed72f9cf287cf6fbd5fb8 Mon Sep 17 00:00:00 2001
From: Robert Marko <robimarko@gmail.com>
Date: Thu, 20 May 2021 14:56:46 +0200
Subject: [PATCH 1/2] EDMA: Fix NAPI packet counting
There is a bug in the NAPI packet counting that will
cause NAPI over budget warnings.
Signed-off-by: Baruch Siach <baruch@tkos.co.il>
Signed-off-by: Robert Marko <robimarko@gmail.com>
---
hal/dp_ops/edma_dp/edma_v1/edma_tx_rx.c | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
--- a/hal/dp_ops/edma_dp/edma_v1/edma_tx_rx.c
+++ b/hal/dp_ops/edma_dp/edma_v1/edma_tx_rx.c
@@ -459,12 +459,12 @@ int edma_napi(struct napi_struct *napi,
for (i = 0; i < ehw->txcmpl_rings; i++) {
txcmpl_ring = &ehw->txcmpl_ring[i];
- work_done += edma_clean_tx(ehw, txcmpl_ring);
+ edma_clean_tx(ehw, txcmpl_ring);
}
for (i = 0; i < ehw->rxfill_rings; i++) {
rxfill_ring = &ehw->rxfill_ring[i];
- work_done += edma_alloc_rx_buffer(ehw, rxfill_ring);
+ edma_alloc_rx_buffer(ehw, rxfill_ring);
}
/*

41
qca/qca-nss-dp/patches/0005-EDMA-Use-NAPI_POLL_WEIGHT-as-NAPI-weight.patch
View file

@ -1,41 +0,0 @@
From 44a30d94abcbb10aacc21db29be212518a6b1bf7 Mon Sep 17 00:00:00 2001
From: Robert Marko <robimarko@gmail.com>
Date: Thu, 20 May 2021 14:57:46 +0200
Subject: [PATCH] EDMA: Use NAPI_POLL_WEIGHT as NAPI weight
Currently a weight of 100 is used by the EDMA, according
to upstream max of 64 should be used and that is used for
almost any driver.
They also introduced NAPI_POLL_WEIGHT define which equals
to 64.
So use NAPI_POLL_WEIGHT as the weight.
Signed-off-by: Robert Marko <robimarko@gmail.com>
---
hal/dp_ops/edma_dp/edma_v1/edma_data_plane.c | 2 +-
hal/dp_ops/edma_dp/edma_v1/edma_data_plane.h | 1 -
2 files changed, 1 insertion(+), 2 deletions(-)
--- a/hal/dp_ops/edma_dp/edma_v1/edma_data_plane.c
+++ b/hal/dp_ops/edma_dp/edma_v1/edma_data_plane.c
@@ -837,7 +837,7 @@ static int edma_register_netdevice(struc
*/
if (!edma_hw.napi_added) {
netif_napi_add(netdev, &edma_hw.napi, edma_napi,
- EDMA_NAPI_WORK);
+ NAPI_POLL_WEIGHT);
/*
* Register the interrupt handlers and enable interrupts
*/
--- a/hal/dp_ops/edma_dp/edma_v1/edma_data_plane.h
+++ b/hal/dp_ops/edma_dp/edma_v1/edma_data_plane.h
@@ -26,7 +26,6 @@
#define EDMA_RX_PREHDR_SIZE (sizeof(struct edma_rx_preheader))
#define EDMA_TX_PREHDR_SIZE (sizeof(struct edma_tx_preheader))
#define EDMA_RING_SIZE 128
-#define EDMA_NAPI_WORK 100
#define EDMA_START_GMACS NSS_DP_HAL_START_IFNUM
#define EDMA_MAX_GMACS NSS_DP_HAL_MAX_PORTS
#define EDMA_TX_PKT_MIN_SIZE 33 /* IPQ807x EDMA needs a minimum packet size of 33 bytes */

46
qca/qca-nss-dp/patches/0006-NSS-DP-fix-of_get_mac_address.patch
View file

@ -1,46 +0,0 @@
From cadeb62a42296563141d6954eec58e34ef86778d Mon Sep 17 00:00:00 2001
From: Robert Marko <robimarko@gmail.com>
Date: Fri, 13 Aug 2021 20:12:08 +0200
Subject: [PATCH] NSS-DP: fix of_get_mac_address()
Recently OpenWrt backported the updated of_get_mac_address()
function which returns and error code instead.
So, patch the SSDK to use it and fix the compilation error.
Signed-off-by: Robert Marko <robimarko@gmail.com>
---
nss_dp_main.c | 13 ++++---------
1 file changed, 4 insertions(+), 9 deletions(-)
--- a/nss_dp_main.c
+++ b/nss_dp_main.c
@@ -555,9 +555,10 @@ static int32_t nss_dp_of_get_pdata(struc
struct net_device *netdev,
struct nss_gmac_hal_platform_data *hal_pdata)
{
- uint8_t *maddr;
+ u8 maddr[ETH_ALEN];
struct nss_dp_dev *dp_priv;
struct resource memres_devtree = {0};
+ int ret;
dp_priv = netdev_priv(netdev);
@@ -600,14 +601,8 @@ static int32_t nss_dp_of_get_pdata(struc
of_property_read_u32(np, "qcom,forced-speed", &dp_priv->forced_speed);
of_property_read_u32(np, "qcom,forced-duplex", &dp_priv->forced_duplex);
- maddr = (uint8_t *)of_get_mac_address(np);
-#if (LINUX_VERSION_CODE > KERNEL_VERSION(5, 4, 0))
- if (IS_ERR((void *)maddr)) {
- maddr = NULL;
- }
-#endif
-
- if (maddr && is_valid_ether_addr(maddr)) {
+ ret = of_get_mac_address(np, maddr);
+ if (!ret && is_valid_ether_addr(maddr)) {
ether_addr_copy(netdev->dev_addr, maddr);
} else {
random_ether_addr(netdev->dev_addr);

29
qca/qca-nss-dp/patches/0007-NSS-DP-implement-ethernet-IOCTL-s.patch
View file

@ -1,29 +0,0 @@
From 5da62ba19f554bf437752a44360fb5ae9f1a7f5e Mon Sep 17 00:00:00 2001
From: Robert Marko <robimarko@gmail.com>
Date: Tue, 8 Mar 2022 10:48:32 +0100
Subject: [PATCH] NSS-DP: implement ethernet IOCTL-s
Since kernel 5.15 ethernet/PHY related IOCTL-s have been split from the
generic IOCTL netdev op.
So, implement the new op instead of the generic one which is considered
for private IOCTL-s only now for 5.15+.
Signed-off-by: Robert Marko <robimarko@gmail.com>
---
nss_dp_main.c | 4 ++++
1 file changed, 4 insertions(+)
--- a/nss_dp_main.c
+++ b/nss_dp_main.c
@@ -532,7 +532,11 @@ static const struct net_device_ops nss_d
.ndo_set_mac_address = nss_dp_set_mac_address,
.ndo_validate_addr = eth_validate_addr,
.ndo_change_mtu = nss_dp_change_mtu,
+#if (LINUX_VERSION_CODE < KERNEL_VERSION(5, 15, 0))
.ndo_do_ioctl = nss_dp_do_ioctl,
+#else
+ .ndo_eth_ioctl = nss_dp_do_ioctl,
+#endif
#if (LINUX_VERSION_CODE < KERNEL_VERSION(4, 5, 0))
.ndo_bridge_setlink = switchdev_port_bridge_setlink,

48
qca/qca-nss-dp/patches/0008-switchdev-remove-the-transaction-structure.patch
View file

@ -1,48 +0,0 @@
From c9afdcdd2642485a6476906be9da2e811090fc7a Mon Sep 17 00:00:00 2001
From: Robert Marko <robimarko@gmail.com>
Date: Fri, 18 Mar 2022 18:06:03 +0100
Subject: [PATCH] switchdev: remove the transaction structure
Since 5.12 there is no transaction structure anymore, so drop it for
5.12 and newer.
Signed-off-by: Robert Marko <robimarko@gmail.com>
---
nss_dp_switchdev.c | 10 ++++++++++
1 file changed, 10 insertions(+)
--- a/nss_dp_switchdev.c
+++ b/nss_dp_switchdev.c
@@ -279,13 +279,19 @@ void nss_dp_switchdev_setup(struct net_d
* Sets attributes
*/
static int nss_dp_port_attr_set(struct net_device *dev,
+#if (LINUX_VERSION_CODE < KERNEL_VERSION(5, 12, 0))
const struct switchdev_attr *attr,
struct switchdev_trans *trans)
+#else
+ const struct switchdev_attr *attr)
+#endif
{
struct nss_dp_dev *dp_priv = (struct nss_dp_dev *)netdev_priv(dev);
+#if (LINUX_VERSION_CODE < KERNEL_VERSION(5, 12, 0))
if (switchdev_trans_ph_prepare(trans))
return 0;
+#endif
switch (attr->id) {
case SWITCHDEV_ATTR_ID_PORT_BRIDGE_FLAGS:
@@ -309,8 +315,12 @@ static int nss_dp_switchdev_port_attr_se
{
int err;
+#if (LINUX_VERSION_CODE < KERNEL_VERSION(5, 12, 0))
err = nss_dp_port_attr_set(netdev, port_attr_info->attr,
port_attr_info->trans);
+#else
+ err = nss_dp_port_attr_set(netdev, port_attr_info->attr);
+#endif
port_attr_info->handled = true;
return notifier_from_errno(err);

51
qca/qca-nss-dp/patches/0009-switchdev-use-new-switchdev-flags.patch
View file

@ -1,51 +0,0 @@
From f95868d54301c0f54e968ec9d978c9caa02ee425 Mon Sep 17 00:00:00 2001
From: Robert Marko <robimarko@gmail.com>
Date: Fri, 18 Mar 2022 18:24:18 +0100
Subject: [PATCH] switchdev: use new switchdev flags
Since kernel 5.12 switched utilizes a new way of setting the flags by
using a dedicated structure with flags and mask.
So fix using kernels 5.12 and later.
Signed-off-by: Robert Marko <robimarko@gmail.com>
---
include/nss_dp_dev.h | 7 +++++++
nss_dp_switchdev.c | 2 +-
2 files changed, 8 insertions(+), 1 deletion(-)
--- a/include/nss_dp_dev.h
+++ b/include/nss_dp_dev.h
@@ -24,6 +24,9 @@
#include <linux/platform_device.h>
#include <linux/phy.h>
#include <linux/version.h>
+#if (LINUX_VERSION_CODE >= KERNEL_VERSION(5, 12, 0))
+#include <net/switchdev.h>
+#endif
#include "nss_dp_api_if.h"
#include "nss_dp_hal_if.h"
@@ -126,7 +129,11 @@ struct nss_dp_dev {
/* switchdev related attributes */
#ifdef CONFIG_NET_SWITCHDEV
u8 stp_state; /* STP state of this physical port */
+#if (LINUX_VERSION_CODE < KERNEL_VERSION(5, 12, 0))
unsigned long brport_flags; /* bridge port flags */
+#else
+ struct switchdev_brport_flags brport_flags; /* bridge port flags */
+#endif
#endif
uint32_t rx_page_mode; /* page mode for Rx processing */
uint32_t rx_jumbo_mru; /* Jumbo mru value for Rx processing */
--- a/nss_dp_switchdev.c
+++ b/nss_dp_switchdev.c
@@ -296,7 +296,7 @@ static int nss_dp_port_attr_set(struct n
switch (attr->id) {
case SWITCHDEV_ATTR_ID_PORT_BRIDGE_FLAGS:
dp_priv->brport_flags = attr->u.brport_flags;
- netdev_dbg(dev, "set brport_flags %lu\n", attr->u.brport_flags);
+ netdev_dbg(dev, "set brport_flags %lu\n", attr->u.brport_flags.val);
return 0;
case SWITCHDEV_ATTR_ID_PORT_STP_STATE:
return nss_dp_stp_state_set(dp_priv, attr->u.stp_state);

110
qca/qca-nss-dp/patches/0010-switchdev-fix-FDB-roaming.patch
View file

@ -1,110 +0,0 @@
From d16102cad769f430144ca8094d928762b445e9b0 Mon Sep 17 00:00:00 2001
From: Robert Marko <robimarko@gmail.com>
Date: Fri, 18 Mar 2022 22:02:01 +0100
Subject: [PATCH] switchdev: fix FDB roaming
Try and solve the roaming issue by trying to replicate what NSS bridge
module is doing, but by utilizing switchdev FDB notifiers instead of
adding new notifiers to the bridge code.
We register a new non-blocking switchdev notifier and simply wait for
notification, and then process the SWITCHDEV_FDB_DEL_TO_DEVICE
notifications.
Those tell us that a certain FDB entry should be removed, then a VSI ID
is fetched for the physical PPE port and using that VSI ID and the
notification provided MAC adress existing FDB entry gets removed.
Signed-off-by: Robert Marko <robimarko@gmail.com>
---
nss_dp_switchdev.c | 61 ++++++++++++++++++++++++++++++++++++++++++++++
1 file changed, 61 insertions(+)
--- a/nss_dp_switchdev.c
+++ b/nss_dp_switchdev.c
@@ -24,6 +24,8 @@
#include "nss_dp_dev.h"
#include "fal/fal_stp.h"
#include "fal/fal_ctrlpkt.h"
+#include "fal/fal_fdb.h"
+#include "ref/ref_vsi.h"
#define NSS_DP_SWITCH_ID 0
#define NSS_DP_SW_ETHTYPE_PID 0 /* PPE ethtype profile ID for slow protocols */
@@ -348,10 +350,64 @@ static int nss_dp_switchdev_event(struct
return NOTIFY_DONE;
}
+static int nss_dp_switchdev_fdb_del_event(struct net_device *netdev,
+ struct switchdev_notifier_fdb_info *fdb_info)
+{
+ struct nss_dp_dev *dp_priv = (struct nss_dp_dev *)netdev_priv(netdev);
+ fal_fdb_entry_t entry;
+ a_uint32_t vsi_id;
+ sw_error_t rv;
+
+ netdev_dbg(netdev, "FDB DEL %pM port %d\n", fdb_info->addr, dp_priv->macid);
+
+ rv = ppe_port_vsi_get(NSS_DP_SWITCH_ID, dp_priv->macid, &vsi_id);
+ if (rv) {
+ netdev_err(netdev, "cannot get VSI ID for port %d\n", dp_priv->macid);
+ return notifier_from_errno(rv);
+ }
+
+ memset(&entry, 0, sizeof(entry));
+ memcpy(&entry.addr, fdb_info->addr, ETH_ALEN);
+ entry.fid = vsi_id;
+
+ rv = fal_fdb_entry_del_bymac(NSS_DP_SWITCH_ID, &entry);
+ if (rv) {
+ netdev_err(netdev, "FDB entry delete failed with MAC %pM and fid %d\n",
+ &entry.addr, entry.fid);
+ return notifier_from_errno(rv);
+ }
+
+ return notifier_from_errno(rv);
+}
+
+static int nss_dp_fdb_switchdev_event(struct notifier_block *nb,
+ unsigned long event, void *ptr)
+{
+ struct net_device *dev = switchdev_notifier_info_to_dev(ptr);
+
+ /*
+ * Handle switchdev event only for physical devices
+ */
+ if (!nss_dp_is_phy_dev(dev)) {
+ return NOTIFY_DONE;
+ }
+
+ switch (event) {
+ case SWITCHDEV_FDB_DEL_TO_DEVICE:
+ return nss_dp_switchdev_fdb_del_event(dev, ptr);
+ }
+
+ return NOTIFY_DONE;
+}
+
static struct notifier_block nss_dp_switchdev_notifier = {
.notifier_call = nss_dp_switchdev_event,
};
+static struct notifier_block nss_dp_switchdev_fdb_notifier = {
+ .notifier_call = nss_dp_fdb_switchdev_event,
+};
+
static bool switch_init_done;
/*
@@ -366,6 +422,11 @@ void nss_dp_switchdev_setup(struct net_d
return;
}
+ err = register_switchdev_notifier(&nss_dp_switchdev_fdb_notifier);
+ if (err) {
+ netdev_dbg(dev, "%px:Failed to register switchdev FDB notifier\n", dev);
+ }
+
err = register_switchdev_blocking_notifier(&nss_dp_switchdev_notifier);
if (err) {
netdev_dbg(dev, "%px:Failed to register switchdev notifier\n", dev);

48
qca/qca-nss-dp/patches/0011-treewide-fix-confusing-printing-of-registered-netdev.patch
View file

@ -1,48 +0,0 @@
From 7e4ae2d6285095794d73d2f2ce61404f61d4e633 Mon Sep 17 00:00:00 2001
From: Ansuel Smith <ansuelsmth@gmail.com>
Date: Tue, 17 May 2022 15:55:36 +0200
Subject: [PATCH 11/11] treewide: fix confusing printing of registered netdev
Net core implementation changed and now printing the netdev name cause
confusing printing if done before register_netdev. Move the old printing
to dbg and add an additional info log right after register_netdev to
give the user some info on correct nss-dp probe.
Signed-off-by: Ansuel Smith <ansuelsmth@gmail.com>
---
hal/dp_ops/edma_dp/edma_v1/edma_data_plane.c | 4 ++--
nss_dp_main.c | 3 +++
2 files changed, 5 insertions(+), 2 deletions(-)
diff --git a/hal/dp_ops/edma_dp/edma_v1/edma_data_plane.c b/hal/dp_ops/edma_dp/edma_v1/edma_data_plane.c
index 0af39c2..1d748db 100644
--- a/hal/dp_ops/edma_dp/edma_v1/edma_data_plane.c
+++ b/hal/dp_ops/edma_dp/edma_v1/edma_data_plane.c
@@ -822,8 +822,8 @@ static int edma_register_netdevice(struct net_device *netdev, uint32_t macid)
return -EINVAL;
}
- netdev_info(netdev, "nss_dp_edma: Registering netdev %s(qcom-id:%d) with EDMA\n",
- netdev->name, macid);
+ netdev_dbg(netdev, "nss_dp_edma: Registering netdev %s(qcom-id:%d) with EDMA\n",
+ netdev->name, macid);
/*
* We expect 'macid' to correspond to ports numbers on
diff --git a/nss_dp_main.c b/nss_dp_main.c
index c0ae9d6..441c300 100644
--- a/nss_dp_main.c
+++ b/nss_dp_main.c
@@ -875,6 +875,9 @@ static int32_t nss_dp_probe(struct platform_device *pdev)
goto phy_setup_fail;
}
+ netdev_info(netdev, "Registered netdev %s(qcom-id:%d)\n",
+ netdev->name, port_id);
+
dp_global_ctx.nss_dp[dp_priv->macid - 1] = dp_priv;
dp_global_ctx.slowproto_acl_bm = 0;
--
2.34.1

28
qca/qca-nss-dp/patches/0012-gmac-syn-xgmac-silence-debug-log-on-probe.patch
View file

@ -1,28 +0,0 @@
From fee52ef165e9fab2fca15492677082fd8e9e891f Mon Sep 17 00:00:00 2001
From: Ansuel Smith <ansuelsmth@gmail.com>
Date: Thu, 19 May 2022 23:40:24 +0200
Subject: [PATCH 12/12] gmac: syn: xgmac: silence debug log on probe
Silence debug log set as info in xgmac port probe.
Signed-off-by: Ansuel Smith <ansuelsmth@gmail.com>
---
hal/gmac_ops/syn/xgmac/syn_if.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/hal/gmac_ops/syn/xgmac/syn_if.c b/hal/gmac_ops/syn/xgmac/syn_if.c
index 1152f5c..bc2880d 100644
--- a/hal/gmac_ops/syn/xgmac/syn_if.c
+++ b/hal/gmac_ops/syn/xgmac/syn_if.c
@@ -445,7 +445,7 @@ static void *syn_init(struct nss_gmac_hal_platform_data *gmacpdata)
spin_lock_init(&shd->nghd.slock);
- netdev_info(ndev, "ioremap OK.Size 0x%x Ndev base 0x%lx macbase 0x%px\n",
+ netdev_dbg(ndev, "ioremap OK.Size 0x%x Ndev base 0x%lx macbase 0x%px\n",
gmacpdata->reg_len,
ndev->base_addr,
shd->nghd.mac_base);
--
2.34.1

189
qca/qca-nss-dp/patches/0013-nss_dp_main-Use-a-phy-handle-property-to-connect-to-.patch
View file

@ -1,189 +0,0 @@
From 8293a26ca56ee2e9a88e4efb5dcc7f647803cd8c Mon Sep 17 00:00:00 2001
From: Alexandru Gagniuc <mr.nuke.me@gmail.com>
Date: Sun, 5 Jun 2022 21:45:09 -0500
Subject: [PATCH] nss_dp_main: Use a 'phy-handle' property to connect to the
PHY
The original method of connecting a PHY to the ethernet controller
requires the "qcom,link-poll", and "qcom,phy-mdio-addr" devicetree
properties. This is redundant. The PHY node already contains the MDIO
address, and attaching a PHY implies "link-poll".
Allow using a "phy-handle" property. Remove the following properties,
as they are no longer used:
* "qcom,link-poll"
* "qcom,phy-mdio-addr"
* "mdio-bus"
* "qcom,forced-speed"
* "qcom,forced-duplex"
Signed-off-by: Alexandru Gagniuc <mr.nuke.me@gmail.com>
---
include/nss_dp_dev.h | 5 +--
nss_dp_main.c | 91 +++++---------------------------------------
2 files changed, 10 insertions(+), 86 deletions(-)
diff --git a/include/nss_dp_dev.h b/include/nss_dp_dev.h
index 19b3e78..63a857a 100644
--- a/include/nss_dp_dev.h
+++ b/include/nss_dp_dev.h
@@ -100,13 +100,10 @@ struct nss_dp_dev {
unsigned long drv_flags; /* Driver specific feature flags */
/* Phy related stuff */
+ struct device_node *phy_node;
struct phy_device *phydev; /* Phy device */
struct mii_bus *miibus; /* MII bus */
phy_interface_t phy_mii_type; /* RGMII/SGMII/QSGMII */
- uint32_t phy_mdio_addr; /* Mdio address */
- bool link_poll; /* Link polling enable? */
- uint32_t forced_speed; /* Forced speed? */
- uint32_t forced_duplex; /* Forced duplex? */
uint32_t link_state; /* Current link state */
uint32_t pause; /* Current flow control settings */
diff --git a/nss_dp_main.c b/nss_dp_main.c
index 441c300..a1e8627 100644
--- a/nss_dp_main.c
+++ b/nss_dp_main.c
@@ -399,7 +399,7 @@ static int nss_dp_open(struct net_device *netdev)
netif_start_queue(netdev);
- if (!dp_priv->link_poll) {
+ if (!dp_priv->phydev) {
/* Notify data plane link is up */
if (dp_priv->data_plane_ops->link_state(dp_priv->dpc, 1)) {
netdev_dbg(netdev, "Data plane set link failed\n");
@@ -576,6 +576,8 @@ static int32_t nss_dp_of_get_pdata(struct device_node *np,
return -EFAULT;
}
+ dp_priv->phy_node = of_parse_phandle(np, "phy-handle", 0);
+
if (of_property_read_u32(np, "qcom,mactype", &hal_pdata->mactype)) {
pr_err("%s: error reading mactype\n", np->name);
return -EFAULT;
@@ -594,16 +596,6 @@ static int32_t nss_dp_of_get_pdata(struct device_node *np,
#else
of_get_phy_mode(np, &dp_priv->phy_mii_type);
#endif
- dp_priv->link_poll = of_property_read_bool(np, "qcom,link-poll");
- if (of_property_read_u32(np, "qcom,phy-mdio-addr",
- &dp_priv->phy_mdio_addr) && dp_priv->link_poll) {
- pr_err("%s: mdio addr required if link polling is enabled\n",
- np->name);
- return -EFAULT;
- }
-
- of_property_read_u32(np, "qcom,forced-speed", &dp_priv->forced_speed);
- of_property_read_u32(np, "qcom,forced-duplex", &dp_priv->forced_duplex);
ret = of_get_mac_address(np, maddr);
if (!ret && is_valid_ether_addr(maddr)) {
@@ -636,50 +628,6 @@ static int32_t nss_dp_of_get_pdata(struct device_node *np,
return 0;
}
-/*
- * nss_dp_mdio_attach()
- */
-static struct mii_bus *nss_dp_mdio_attach(struct platform_device *pdev)
-{
- struct device_node *mdio_node;
- struct platform_device *mdio_plat;
- struct ipq40xx_mdio_data *mdio_data;
-
- /*
- * Find mii_bus using "mdio-bus" handle.
- */
- mdio_node = of_parse_phandle(pdev->dev.of_node, "mdio-bus", 0);
- if (mdio_node) {
- return of_mdio_find_bus(mdio_node);
- }
-
- mdio_node = of_find_compatible_node(NULL, NULL, "qcom,qca-mdio");
- if (!mdio_node) {
- mdio_node = of_find_compatible_node(NULL, NULL,
- "qcom,ipq40xx-mdio");
- if (!mdio_node) {
- dev_err(&pdev->dev, "cannot find mdio node by phandle\n");
- return NULL;
- }
- }
-
- mdio_plat = of_find_device_by_node(mdio_node);
- if (!mdio_plat) {
- dev_err(&pdev->dev, "cannot find platform device from mdio node\n");
- of_node_put(mdio_node);
- return NULL;
- }
-
- mdio_data = dev_get_drvdata(&mdio_plat->dev);
- if (!mdio_data) {
- dev_err(&pdev->dev, "cannot get mii bus reference from device data\n");
- of_node_put(mdio_node);
- return NULL;
- }
-
- return mdio_data->mii_bus;
-}
-
#ifdef CONFIG_NET_SWITCHDEV
/*
* nss_dp_is_phy_dev()
@@ -738,7 +686,6 @@ static int32_t nss_dp_probe(struct platform_device *pdev)
struct device_node *np = pdev->dev.of_node;
struct nss_gmac_hal_platform_data gmac_hal_pdata;
int32_t ret = 0;
- uint8_t phy_id[MII_BUS_ID_SIZE + 3];
#if defined(NSS_DP_PPE_SUPPORT)
uint32_t vsi_id;
fal_port_t port_id;
@@ -813,37 +760,17 @@ static int32_t nss_dp_probe(struct platform_device *pdev)
dp_priv->drv_flags |= NSS_DP_PRIV_FLAG(INIT_DONE);
- if (dp_priv->link_poll) {
- dp_priv->miibus = nss_dp_mdio_attach(pdev);
- if (!dp_priv->miibus) {
- netdev_dbg(netdev, "failed to find miibus\n");
- goto phy_setup_fail;
- }
- snprintf(phy_id, MII_BUS_ID_SIZE + 3, PHY_ID_FMT,
- dp_priv->miibus->id, dp_priv->phy_mdio_addr);
-
+ if (dp_priv->phy_node) {
SET_NETDEV_DEV(netdev, &pdev->dev);
-
- dp_priv->phydev = phy_connect(netdev, phy_id,
- &nss_dp_adjust_link,
- dp_priv->phy_mii_type);
+ dp_priv->phydev = of_phy_connect(netdev, dp_priv->phy_node,
+ &nss_dp_adjust_link, 0,
+ dp_priv->phy_mii_type);
if (IS_ERR(dp_priv->phydev)) {
- netdev_dbg(netdev, "failed to connect to phy device\n");
+ dev_err(&pdev->dev, "Could not attach to PHY\n");
goto phy_setup_fail;
}
-#if (LINUX_VERSION_CODE < KERNEL_VERSION(4, 5, 0))
- dp_priv->phydev->advertising |=
- (ADVERTISED_Pause | ADVERTISED_Asym_Pause);
- dp_priv->phydev->supported |=
- (SUPPORTED_Pause | SUPPORTED_Asym_Pause);
-#else
- linkmode_set_bit(ETHTOOL_LINK_MODE_Pause_BIT, dp_priv->phydev->advertising);
- linkmode_set_bit(ETHTOOL_LINK_MODE_Asym_Pause_BIT, dp_priv->phydev->advertising);
-
- linkmode_set_bit(ETHTOOL_LINK_MODE_Pause_BIT, dp_priv->phydev->supported);
- linkmode_set_bit(ETHTOOL_LINK_MODE_Asym_Pause_BIT, dp_priv->phydev->supported);
-#endif
+ phy_attached_info(dp_priv->phydev);
}
#if defined(NSS_DP_PPE_SUPPORT)
--
2.36.1

46
qca/qca-nss-dp/patches/0014-nss-dp-edma-v1-switch-to-napi_gro_receive.patch
View file

@ -1,46 +0,0 @@
From 57b521e876986844dfe34457f39c62dc8100424d Mon Sep 17 00:00:00 2001
From: Robert Marko <robimarko@gmail.com>
Date: Thu, 23 Jun 2022 14:18:50 +0200
Subject: [PATCH] nss-dp: edma-v1: switch to napi_gro_receive
Utilize napi_gro_receive instead of plain netif_receive_skb on EDMA v1.
It provides significant performance improvements when testing with iperf3.
Signed-off-by: Robert Marko <robimarko@gmail.com>
---
Makefile | 2 +-
hal/dp_ops/edma_dp/edma_v1/edma_tx_rx.c | 4 ++++
2 files changed, 5 insertions(+), 1 deletion(-)
diff --git a/Makefile b/Makefile
index 8e81317..dcfa8ca 100644
--- a/Makefile
+++ b/Makefile
@@ -25,7 +25,7 @@ qca-nss-dp-objs += hal/dp_ops/edma_dp/edma_v1/edma_cfg.o \
hal/gmac_ops/qcom/qcom_if.o \
hal/gmac_ops/syn/xgmac/syn_if.o
NSS_DP_INCLUDE += -I$(obj)/hal/dp_ops/edma_dp/edma_v1/include
-ccflags-y += -DNSS_DP_PPE_SUPPORT
+ccflags-y += -DNSS_DP_PPE_SUPPORT -DNSS_DP_ENABLE_NAPI_GRO
endif
ifeq ($(SoC),$(filter $(SoC),ipq807x))
diff --git a/hal/dp_ops/edma_dp/edma_v1/edma_tx_rx.c b/hal/dp_ops/edma_dp/edma_v1/edma_tx_rx.c
index 5780a30..6ee1451 100644
--- a/hal/dp_ops/edma_dp/edma_v1/edma_tx_rx.c
+++ b/hal/dp_ops/edma_dp/edma_v1/edma_tx_rx.c
@@ -411,7 +411,11 @@ static uint32_t edma_clean_rx(struct edma_hw *ehw,
NSS_PTP_EVENT_SERVICE_CODE))
nss_phy_tstamp_rx_buf(ndev, skb);
else
+#if defined(NSS_DP_ENABLE_NAPI_GRO)
+ napi_gro_receive(&ehw->napi, skb);
+#else
netif_receive_skb(skb);
+#endif
next_rx_desc:
/*
--
2.36.1

129
qca/qca-nss-drv/Makefile
View file

@ -1,129 +0,0 @@
include $(TOPDIR)/rules.mk
PKG_NAME:=qca-nss-drv
PKG_RELEASE:=$(AUTORELEASE)
PKG_SOURCE_URL:=https://git.codelinaro.org/clo/qsdk/oss/lklm/nss-drv.git
PKG_SOURCE_PROTO:=git
PKG_SOURCE_DATE:=2022-03-07
PKG_SOURCE_VERSION:=397c88cf184e0eb011dd44ad82c2dfae60ece1b4
PKG_MIRROR_HASH:=a3bea305d85fcec3d77f9b40d06a71b65ccf3d8b98018d9c8c23d6ad95e6aedc
PKG_BUILD_PARALLEL:=1
include $(INCLUDE_DIR)/kernel.mk
include $(INCLUDE_DIR)/package.mk
NSS_CLIENTS_DIR:=$(TOPDIR)/qca/src/qca-nss-clients
define KernelPackage/qca-nss-drv
SECTION:=kernel
CATEGORY:=Kernel modules
SUBMENU:=Network Devices
DEPENDS:=@(TARGET_ipq807x||TARGET_ipq60xx) +kmod-qca-nss-dp
TITLE:=Kernel driver for NSS (core driver)
FILES:=$(PKG_BUILD_DIR)/qca-nss-drv.ko
AUTOLOAD:=$(call AutoLoad,32,qca-nss-drv)
endef
define KernelPackage/qca-nss-drv/install
$(INSTALL_DIR) $(1)/lib/debug
$(INSTALL_DIR) $(1)/etc/init.d
$(INSTALL_DIR) $(1)/etc/sysctl.d
$(INSTALL_DIR) $(1)/etc/hotplug.d/firmware
$(INSTALL_DIR) $(1)/etc/config
$(INSTALL_BIN) ./files/qca-nss-drv.debug $(1)/lib/debug/qca-nss-drv
$(INSTALL_BIN) ./files/qca-nss-drv.init $(1)/etc/init.d/qca-nss-drv
$(INSTALL_BIN) ./files/qca-nss-drv.sysctl $(1)/etc/sysctl.d/qca-nss-drv.conf
$(INSTALL_BIN) ./files/qca-nss-drv.hotplug $(1)/etc/hotplug.d/firmware/10-qca-nss-fw
$(INSTALL_BIN) ./files/qca-nss-drv.conf $(1)/etc/config/nss
endef
define KernelPackage/qca-nss-drv/Description
This package contains a NSS driver for QCA chipset
endef
define Build/InstallDev
mkdir -p $(1)/usr/include/qca-nss-drv
$(CP) $(PKG_BUILD_DIR)/exports/* $(1)/usr/include/qca-nss-drv/
endef
EXTRA_CFLAGS+= -I$(STAGING_DIR)/usr/include/qca-nss-gmac \
-I$(STAGING_DIR)/usr/include/qca-nss-dp \
-I$(STAGING_DIR)/usr/include/qca-ssdk \
-Wno-unused-variable
ifneq (, $(findstring $(CONFIG_TARGET_BOARD), "ipq807x" "ipq60xx"))
EXTRA_CFLAGS+= -DNSS_MEM_PROFILE_MEDIUM
LOW_MEM_PROFILE_MAKE_OPTS=y
endif
ifeq ($(CONFIG_KERNEL_SKB_FIXED_SIZE_2K),y)
EXTRA_CFLAGS+= -DNSS_SKB_FIXED_SIZE_2K
endif
DRV_MAKE_OPTS:=
ifeq ($(LOW_MEM_PROFILE_MAKE_OPTS),y)
DRV_MAKE_OPTS+= \
NSS_DRV_C2C_ENABLE=n \
NSS_DRV_CAPWAP_ENABLE=n \
NSS_DRV_CLMAP_ENABLE=n \
NSS_DRV_CRYPTO_ENABLE=y \
NSS_DRV_DTLS_ENABLE=n \
NSS_DRV_GRE_ENABLE=n \
NSS_DRV_GRE_REDIR_ENABLE=n \
NSS_DRV_GRE_TUNNEL_ENABLE=n \
NSS_DRV_IGS_ENABLE=n \
NSS_DRV_IPSEC_ENABLE=n \
NSS_DRV_LAG_ENABLE=n \
NSS_DRV_L2TP_ENABLE=n \
NSS_DRV_MAPT_ENABLE=n \
NSS_DRV_OAM_ENABLE=n \
NSS_DRV_PPTP_ENABLE=n \
NSS_DRV_PORTID_ENABLE=n \
NSS_DRV_PVXLAN_ENABLE=n \
NSS_DRV_QRFS_ENABLE=n \
NSS_DRV_QVPN_ENABLE=n \
NSS_DRV_RMNET_ENABLE=n \
NSS_DRV_SHAPER_ENABLE=n \
NSS_DRV_SJACK_ENABLE=n \
NSS_DRV_TLS_ENABLE=n \
NSS_DRV_TRUSTSEC_ENABLE=n \
NSS_DRV_TSTAMP_ENABLE=n \
NSS_DRV_TUN6RD_ENABLE=n \
NSS_DRV_TUNIPIP6_ENABLE=n \
NSS_DRV_VXLAN_ENABLE=n \
NSS_DRV_MATCH_ENABLE=n \
NSS_DRV_MIRROR_ENABLE=n \
NSS_DRV_PPPOE_ENABLE=n \
NSS_DRV_VIRT_IF_ENABLE=n \
NSS_DRV_VLAN_ENABLE=n \
NSS_DRV_BRIDGE_ENABLE=n \
NSS_DRV_WIFI_EXT_VDEV_ENABLE=n \
NSS_DRV_WIFI_MESH_ENABLE=n
endif
ifeq ($(CONFIG_TARGET_BOARD), "ipq807x")
SOC="ipq807x_64"
else ifeq ($(CONFIG_TARGET_BOARD), "ipq60xx")
SOC="ipq60xx_64"
endif
define Build/Configure
$(LN) arch/nss_$(SOC).h $(PKG_BUILD_DIR)/exports/nss_arch.h
endef
define Build/Compile
+$(MAKE) -C "$(LINUX_DIR)" $(strip $(DRV_MAKE_OPTS)) \
CROSS_COMPILE="$(TARGET_CROSS)" \
ARCH="$(LINUX_KARCH)" \
M="$(PKG_BUILD_DIR)" \
EXTRA_CFLAGS="$(EXTRA_CFLAGS)" SoC=$(SOC) \
$(KERNEL_MAKE_FLAGS) \
$(PKG_JOBS) \
modules
endef
$(eval $(call KernelPackage,qca-nss-drv))

6
qca/qca-nss-drv/files/qca-nss-drv.conf
View file

@ -1,6 +0,0 @@
config nss_firmware 'qca_nss_0'
config nss_firmware 'qca_nss_1'
config general
option enable_rps '1'

26
qca/qca-nss-drv/files/qca-nss-drv.debug
View file

@ -1,26 +0,0 @@
#!/bin/sh /sbin/sysdebug
#
# Copyright (c) 2015-2016, The Linux Foundation. All rights reserved.
#
# Permission to use, copy, modify, and/or distribute this software for any
# purpose with or without fee is hereby granted, provided that the above
# copyright notice and this permission notice appear in all copies.
#
# THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
# WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
# MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
# ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
# WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
# ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
# OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
#
log cat /sys/kernel/debug/qca-nss-drv/stats/pppoe
log cat /sys/kernel/debug/qca-nss-drv/stats/n2h
log cat /sys/kernel/debug/qca-nss-drv/stats/ipv6
log cat /sys/kernel/debug/qca-nss-drv/stats/ipv4
log cat /sys/kernel/debug/qca-nss-drv/stats/gmac
log cat /sys/kernel/debug/qca-nss-drv/stats/drv
log cat /sys/kernel/debug/qca-nss-drv/stats/wifi
log cat /sys/kernel/debug/qca-nss-drv/stats/wifi_if
log cat /sys/kernel/debug/qca-nss-drv/stats/eth_rx

70
qca/qca-nss-drv/files/qca-nss-drv.hotplug
View file

@ -1,70 +0,0 @@
#!/bin/sh
#
# Copyright (c) 2015-2016, The Linux Foundation. All rights reserved.
#
# Permission to use, copy, modify, and/or distribute this software for any
# purpose with or without fee is hereby granted, provided that the above
# copyright notice and this permission notice appear in all copies.
#
# THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
# WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
# MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
# ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
# WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
# ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
# OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
#
KERNEL=`uname -r`
case "${KERNEL}" in
3.4*)
select_or_load=load_nss_fw
;;
*)
select_or_load=select_nss_fw
;;
esac
load_nss_fw () {
ls -l $1 | awk ' { print $9,$5 } '> /dev/console
echo 1 > /sys/class/firmware/$DEVICENAME/loading
cat $1 > /sys/class/firmware/$DEVICENAME/data
echo 0 > /sys/class/firmware/$DEVICENAME/loading
}
select_nss_fw () {
rm -f /lib/firmware/$DEVICENAME
ln -s $1 /lib/firmware/$DEVICENAME
ls -l /lib/firmware/$DEVICENAME | awk ' { print $9,$5 } '> /dev/console
}
[ "$ACTION" != "add" ] && exit
# dev name for UCI, since it doesn't let you use . or -
SDEVNAME=$(echo ${DEVICENAME} | sed s/[.-]/_/g)
SELECTED_FW=$(uci get nss.${SDEVNAME}.firmware 2>/dev/null)
[ -e "${SELECTED_FW}" ] && {
$select_or_load ${SELECTED_FW}
exit
}
case $DEVICENAME in
qca-nss0* | qca-nss.0*)
if [ -e /lib/firmware/qca-nss0-enterprise.bin ] ; then
$select_or_load /lib/firmware/qca-nss0-enterprise.bin
else
$select_or_load /lib/firmware/qca-nss0-retail.bin
fi
exit
;;
qca-nss1* | qca-nss.1*)
if [ -e /lib/firmware/qca-nss1-enterprise.bin ] ; then
$select_or_load /lib/firmware/qca-nss1-enterprise.bin
else
$select_or_load /lib/firmware/qca-nss1-retail.bin
fi
exit
;;
esac

50
qca/qca-nss-drv/files/qca-nss-drv.init
View file

@ -1,50 +0,0 @@
#!/bin/sh /etc/rc.common
#
# Copyright (c) 2015-2017, The Linux Foundation. All rights reserved.
#
# Permission to use, copy, modify, and/or distribute this software for any
# purpose with or without fee is hereby granted, provided that the above
# copyright notice and this permission notice appear in all copies.
#
# THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
# WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
# MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
# ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
# WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
# ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
# OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
#
START=70
enable_rps() {
irq_nss_rps=`grep nss_queue1 /proc/interrupts | cut -d ':' -f 1 | tr -d ' '`
for entry in $irq_nss_rps
do
echo 2 > /proc/irq/$entry/smp_affinity
done
irq_nss_rps=`grep nss_queue2 /proc/interrupts | cut -d ':' -f 1 | tr -d ' '`
for entry in $irq_nss_rps
do
echo 4 > /proc/irq/$entry/smp_affinity
done
irq_nss_rps=`grep nss_queue3 /proc/interrupts | cut -d ':' -f 1 | tr -d ' '`
for entry in $irq_nss_rps
do
echo 8 > /proc/irq/$entry/smp_affinity
done
# Enable NSS RPS
sysctl -w dev.nss.rps.enable=1 >/dev/null 2>/dev/null
}
start() {
local rps_enabled="$(uci_get nss @general[0] enable_rps)"
if [ "$rps_enabled" -eq 1 ]; then
enable_rps
fi
}

4
qca/qca-nss-drv/files/qca-nss-drv.sysctl
View file

@ -1,4 +0,0 @@
# Default Number of connection configuration
dev.nss.ipv4cfg.ipv4_conn=4096
dev.nss.ipv6cfg.ipv6_conn=4096

25
qca/qca-nss-drv/patches/0001-core-add-5.10-kernel-to-version-check.patch
View file

@ -1,25 +0,0 @@
From 3885c752e12f74cad6c97888b797e5903ad1930d Mon Sep 17 00:00:00 2001
From: Robert Marko <robimarko@gmail.com>
Date: Thu, 13 May 2021 23:22:38 +0200
Subject: [PATCH] core: add 5.10 kernel to version check
NSS DRV has a kernel version check, so simply add
5.10 as supported.
Signed-off-by: Robert Marko <robimarko@gmail.com>
---
nss_core.c | 3 ++-
1 file changed, 2 insertions(+), 1 deletion(-)
--- a/nss_core.c
+++ b/nss_core.c
@@ -52,7 +52,8 @@
(((LINUX_VERSION_CODE >= KERNEL_VERSION(3, 10, 0)) && (LINUX_VERSION_CODE < KERNEL_VERSION(3, 11, 0)))) || \
(((LINUX_VERSION_CODE >= KERNEL_VERSION(3, 18, 0)) && (LINUX_VERSION_CODE < KERNEL_VERSION(3, 19, 0)))) || \
(((LINUX_VERSION_CODE >= KERNEL_VERSION(4, 4, 0)) && (LINUX_VERSION_CODE < KERNEL_VERSION(4, 5, 0)))) || \
-(((LINUX_VERSION_CODE >= KERNEL_VERSION(5, 4, 0)) && (LINUX_VERSION_CODE < KERNEL_VERSION(5, 5, 0))))))
+(((LINUX_VERSION_CODE >= KERNEL_VERSION(5, 4, 0)) && (LINUX_VERSION_CODE < KERNEL_VERSION(5, 5, 0)))) || \
+(((LINUX_VERSION_CODE >= KERNEL_VERSION(5, 10, 0)) && (LINUX_VERSION_CODE < KERNEL_VERSION(5, 11, 0))))))
#error "Check skb recycle code in this file to match Linux version"
#endif

181
qca/qca-nss-drv/patches/0002-nss-drv-replace-ioremap_nocache-with-ioremap.patch
View file

@ -1,181 +0,0 @@
From 0cffa7bb366a4e0ff5665d6fc2fa33c1437cb397 Mon Sep 17 00:00:00 2001
From: Robert Marko <robimarko@gmail.com>
Date: Thu, 13 May 2021 23:33:18 +0200
Subject: [PATCH 2/8] nss-drv: replace ioremap_nocache() with ioremap()
ioremap_nocache() does not exist anymore.
Signed-off-by: Robert Marko <robimarko@gmail.com>
---
nss_hal/ipq50xx/nss_hal_pvt.c | 6 +++---
nss_hal/ipq60xx/nss_hal_pvt.c | 8 ++++----
nss_hal/ipq806x/nss_hal_pvt.c | 4 ++--
nss_hal/ipq807x/nss_hal_pvt.c | 6 +++---
nss_hal/nss_hal.c | 4 ++--
nss_meminfo.c | 2 +-
nss_ppe.c | 2 +-
7 files changed, 16 insertions(+), 16 deletions(-)
diff --git a/nss_hal/ipq50xx/nss_hal_pvt.c b/nss_hal/ipq50xx/nss_hal_pvt.c
index 3d6dfd0..e3e4bd2 100644
--- a/nss_hal/ipq50xx/nss_hal_pvt.c
+++ b/nss_hal/ipq50xx/nss_hal_pvt.c
@@ -184,13 +184,13 @@ static struct nss_platform_data *__nss_hal_of_get_pdata(struct platform_device *
npd->nphys = res_nphys.start;
npd->qgic_phys = res_qgic_phys.start;
- npd->nmap = ioremap_nocache(npd->nphys, resource_size(&res_nphys));
+ npd->nmap = ioremap(npd->nphys, resource_size(&res_nphys));
if (!npd->nmap) {
nss_info_always("%px: nss%d: ioremap() fail for nphys\n", nss_ctx, nss_ctx->id);
goto out;
}
- npd->qgic_map = ioremap_nocache(npd->qgic_phys, resource_size(&res_qgic_phys));
+ npd->qgic_map = ioremap(npd->qgic_phys, resource_size(&res_qgic_phys));
if (!npd->qgic_map) {
nss_info_always("%px: nss%d: ioremap() fail for qgic map\n", nss_ctx, nss_ctx->id);
goto out;
@@ -348,7 +348,7 @@ static int __nss_hal_common_reset(struct platform_device *nss_dev)
of_node_put(cmn);
- nss_misc_reset = ioremap_nocache(res_nss_misc_reset.start, resource_size(&res_nss_misc_reset));
+ nss_misc_reset = ioremap(res_nss_misc_reset.start, resource_size(&res_nss_misc_reset));
if (!nss_misc_reset) {
pr_err("%px: ioremap fail for nss_misc_reset\n", nss_dev);
return -EFAULT;
diff --git a/nss_hal/ipq60xx/nss_hal_pvt.c b/nss_hal/ipq60xx/nss_hal_pvt.c
index 4c84cb9..e76ef6d 100644
--- a/nss_hal/ipq60xx/nss_hal_pvt.c
+++ b/nss_hal/ipq60xx/nss_hal_pvt.c
@@ -207,13 +207,13 @@ static struct nss_platform_data *__nss_hal_of_get_pdata(struct platform_device *
npd->nphys = res_nphys.start;
npd->qgic_phys = res_qgic_phys.start;
- npd->nmap = ioremap_nocache(npd->nphys, resource_size(&res_nphys));
+ npd->nmap = ioremap(npd->nphys, resource_size(&res_nphys));
if (!npd->nmap) {
nss_info_always("%px: nss%d: ioremap() fail for nphys\n", nss_ctx, nss_ctx->id);
goto out;
}
- npd->qgic_map = ioremap_nocache(npd->qgic_phys, resource_size(&res_qgic_phys));
+ npd->qgic_map = ioremap(npd->qgic_phys, resource_size(&res_qgic_phys));
if (!npd->qgic_map) {
nss_info_always("%px: nss%d: ioremap() fail for qgic map\n", nss_ctx, nss_ctx->id);
goto out;
@@ -433,13 +433,13 @@ static int __nss_hal_common_reset(struct platform_device *nss_dev)
of_node_put(cmn);
- nss_misc_reset = ioremap_nocache(res_nss_misc_reset.start, resource_size(&res_nss_misc_reset));
+ nss_misc_reset = ioremap(res_nss_misc_reset.start, resource_size(&res_nss_misc_reset));
if (!nss_misc_reset) {
pr_err("%px: ioremap fail for nss_misc_reset\n", nss_dev);
return -EFAULT;
}
- nss_misc_reset_flag = ioremap_nocache(res_nss_misc_reset_flag.start, resource_size(&res_nss_misc_reset_flag));
+ nss_misc_reset_flag = ioremap(res_nss_misc_reset_flag.start, resource_size(&res_nss_misc_reset_flag));
if (!nss_misc_reset_flag) {
pr_err("%px: ioremap fail for nss_misc_reset_flag\n", nss_dev);
return -EFAULT;
diff --git a/nss_hal/ipq806x/nss_hal_pvt.c b/nss_hal/ipq806x/nss_hal_pvt.c
index b8733e0..52d63b0 100644
--- a/nss_hal/ipq806x/nss_hal_pvt.c
+++ b/nss_hal/ipq806x/nss_hal_pvt.c
@@ -458,7 +458,7 @@ static struct nss_platform_data *__nss_hal_of_get_pdata(struct platform_device *
npd->nphys = res_nphys.start;
npd->vphys = res_vphys.start;
- npd->nmap = ioremap_nocache(npd->nphys, resource_size(&res_nphys));
+ npd->nmap = ioremap(npd->nphys, resource_size(&res_nphys));
if (!npd->nmap) {
nss_info_always("%px: nss%d: ioremap() fail for nphys\n", nss_ctx, nss_ctx->id);
goto out;
@@ -711,7 +711,7 @@ static int __nss_hal_common_reset(struct platform_device *nss_dev)
}
of_node_put(cmn);
- fpb_base = ioremap_nocache(res_nss_fpb_base.start, resource_size(&res_nss_fpb_base));
+ fpb_base = ioremap(res_nss_fpb_base.start, resource_size(&res_nss_fpb_base));
if (!fpb_base) {
pr_err("%px: ioremap fail for nss_fpb_base\n", nss_dev);
return -EFAULT;
diff --git a/nss_hal/ipq807x/nss_hal_pvt.c b/nss_hal/ipq807x/nss_hal_pvt.c
index b95a23c..bb8f42f 100644
--- a/nss_hal/ipq807x/nss_hal_pvt.c
+++ b/nss_hal/ipq807x/nss_hal_pvt.c
@@ -234,7 +234,7 @@ static struct nss_platform_data *__nss_hal_of_get_pdata(struct platform_device *
npd->vphys = res_vphys.start;
npd->qgic_phys = res_qgic_phys.start;
- npd->nmap = ioremap_nocache(npd->nphys, resource_size(&res_nphys));
+ npd->nmap = ioremap(npd->nphys, resource_size(&res_nphys));
if (!npd->nmap) {
nss_info_always("%px: nss%d: ioremap() fail for nphys\n", nss_ctx, nss_ctx->id);
goto out;
@@ -247,7 +247,7 @@ static struct nss_platform_data *__nss_hal_of_get_pdata(struct platform_device *
goto out;
}
- npd->qgic_map = ioremap_nocache(npd->qgic_phys, resource_size(&res_qgic_phys));
+ npd->qgic_map = ioremap(npd->qgic_phys, resource_size(&res_qgic_phys));
if (!npd->qgic_map) {
nss_info_always("%px: nss%d: ioremap() fail for qgic map\n", nss_ctx, nss_ctx->id);
goto out;
@@ -467,7 +467,7 @@ static int __nss_hal_common_reset(struct platform_device *nss_dev)
}
of_node_put(cmn);
- nss_misc_reset = ioremap_nocache(res_nss_misc_reset.start, resource_size(&res_nss_misc_reset));
+ nss_misc_reset = ioremap(res_nss_misc_reset.start, resource_size(&res_nss_misc_reset));
if (!nss_misc_reset) {
pr_err("%px: ioremap fail for nss_misc_reset\n", nss_dev);
return -EFAULT;
diff --git a/nss_hal/nss_hal.c b/nss_hal/nss_hal.c
index d58bb57..57974c1 100644
--- a/nss_hal/nss_hal.c
+++ b/nss_hal/nss_hal.c
@@ -78,9 +78,9 @@ int nss_hal_firmware_load(struct nss_ctx_instance *nss_ctx, struct platform_devi
return rc;
}
- load_mem = ioremap_nocache(npd->load_addr, nss_fw->size);
+ load_mem = ioremap(npd->load_addr, nss_fw->size);
if (!load_mem) {
- nss_info_always("%px: ioremap_nocache failed: %x", nss_ctx, npd->load_addr);
+ nss_info_always("%px: ioremap failed: %x", nss_ctx, npd->load_addr);
release_firmware(nss_fw);
return rc;
}
diff --git a/nss_meminfo.c b/nss_meminfo.c
index e24e6be..2255eae 100644
--- a/nss_meminfo.c
+++ b/nss_meminfo.c
@@ -728,7 +728,7 @@ bool nss_meminfo_init(struct nss_ctx_instance *nss_ctx)
/*
* meminfo_start is the label where the start address of meminfo map is stored.
*/
- meminfo_start = (uint32_t *)ioremap_nocache(nss_ctx->load + NSS_MEMINFO_MAP_START_OFFSET,
+ meminfo_start = (uint32_t *)ioremap(nss_ctx->load + NSS_MEMINFO_MAP_START_OFFSET,
NSS_MEMINFO_RESERVE_AREA_SIZE);
if (!meminfo_start) {
nss_info_always("%px: cannot remap meminfo start\n", nss_ctx);
diff --git a/nss_ppe.c b/nss_ppe.c
index 46ce217..644fc98 100644
--- a/nss_ppe.c
+++ b/nss_ppe.c
@@ -357,7 +357,7 @@ void nss_ppe_init(void)
/*
* Get the PPE base address
*/
- ppe_pvt.ppe_base = ioremap_nocache(PPE_BASE_ADDR, PPE_REG_SIZE);
+ ppe_pvt.ppe_base = ioremap(PPE_BASE_ADDR, PPE_REG_SIZE);
if (!ppe_pvt.ppe_base) {
nss_warning("DRV can't get PPE base address\n");
return;
--
2.34.1

49
qca/qca-nss-drv/patches/0003-DMA-Fix-NULL-pointer-exceptions.patch
View file

@ -1,49 +0,0 @@
From 62e457f262aaa0db7113ad3ccbcb7ae49d4d7ea8 Mon Sep 17 00:00:00 2001
From: Robert Marko <robimarko@gmail.com>
Date: Tue, 8 Jun 2021 23:24:43 +0200
Subject: [PATCH] DMA: Fix NULL pointer exceptions
There are multiple instances that pass NULL instead
of device to DMA functions.
That is incorrect and will cause kernel NULL pointer
exceptions.
So, simply pass the device structure pointers.
Signed-off-by: Robert Marko <robimarko@gmail.com>
---
nss_core.c | 2 +-
nss_coredump.c | 4 ++--
2 files changed, 3 insertions(+), 3 deletions(-)
--- a/nss_core.c
+++ b/nss_core.c
@@ -1617,7 +1617,7 @@ static int32_t nss_core_handle_cause_que
*
*/
if (unlikely((buffer_type == N2H_BUFFER_CRYPTO_RESP))) {
- dma_unmap_single(NULL, (desc->buffer + desc->payload_offs), desc->payload_len, DMA_FROM_DEVICE);
+ dma_unmap_single(nss_ctx->dev, (desc->buffer + desc->payload_offs), desc->payload_len, DMA_FROM_DEVICE);
goto consume;
}
--- a/nss_coredump.c
+++ b/nss_coredump.c
@@ -154,7 +154,7 @@ void nss_fw_coredump_notify(struct nss_c
dma_addr = nss_own->meminfo_ctx.logbuffer_dma;
}
- dma_sync_single_for_cpu(NULL, dma_addr, sizeof(struct nss_log_descriptor), DMA_FROM_DEVICE);
+ dma_sync_single_for_cpu(nss_own->dev, dma_addr, sizeof(struct nss_log_descriptor), DMA_FROM_DEVICE);
/*
* If the current entry is smaller than or equal to the number of NSS_LOG_COREDUMP_LINE_NUM,
@@ -181,7 +181,7 @@ void nss_fw_coredump_notify(struct nss_c
offset = (index * sizeof(struct nss_log_entry))
+ offsetof(struct nss_log_descriptor, log_ring_buffer);
- dma_sync_single_for_cpu(NULL, dma_addr + offset,
+ dma_sync_single_for_cpu(nss_own->dev, dma_addr + offset,
sizeof(struct nss_log_entry), DMA_FROM_DEVICE);
nss_info_always("%px: %s\n", nss_own, nle_print->message);
nle_print++;

573
qca/qca-nss-drv/patches/0004-nss-drv-rework-NSS_CORE_DMA_CACHE_MAINT-ops.patch
View file

@ -1,573 +0,0 @@
From 12cf63f66bfe509da6d845e5c716efd99dadf01e Mon Sep 17 00:00:00 2001
From: Ansuel Smith <ansuelsmth@gmail.com>
Date: Tue, 5 Apr 2022 15:38:18 +0200
Subject: [PATCH 4/8] nss-drv: rework NSS_CORE_DMA_CACHE_MAINT ops
Rework NSS_CORE_DMA_CACHE_MAINT ops to use standard dma sync ops instead
of using the direct arch function. This permit to skip any hack/patch
needed for nss-drv to correctly compile on upstream kernel.
We drop any NSS_CORE_DMA_CACHE_MAINT use in nss_core and we correctly
use the dma_sync_single_for_device we correctly dma addr using the new
DMA helper.
We drop sync for IOREMAP addr and we just leave a memory block.
We hope the nss_profiler is correctly ported.
We finally drop the NSS_CORE_DMA_CACHE_MAINT jus in case someone wants
to use it.
Signed-off-by: Ansuel Smith <ansuelsmth@gmail.com>
---
nss_core.c | 136 +++++++++++++++++++++++++---------
nss_core.h | 41 +++++-----
nss_hal/ipq806x/nss_hal_pvt.c | 5 +-
nss_hal/ipq807x/nss_hal_pvt.c | 5 +-
nss_meminfo.c | 5 +-
nss_profiler.c | 3 +-
6 files changed, 127 insertions(+), 68 deletions(-)
diff --git a/nss_core.c b/nss_core.c
index 23dc155..f9e6014 100644
--- a/nss_core.c
+++ b/nss_core.c
@@ -1429,6 +1429,8 @@ static inline void nss_core_handle_empty_buffers(struct nss_ctx_instance *nss_ct
uint32_t count, uint32_t hlos_index,
uint16_t mask)
{
+ struct nss_meminfo_ctx *mem_ctx = &nss_ctx->meminfo_ctx;
+
while (count) {
/*
* Since we only return the primary skb, we have no way to unmap
@@ -1482,7 +1484,9 @@ next:
n2h_desc_ring->hlos_index = hlos_index;
if_map->n2h_hlos_index[NSS_IF_N2H_EMPTY_BUFFER_RETURN_QUEUE] = hlos_index;
- NSS_CORE_DMA_CACHE_MAINT((void *)&if_map->n2h_hlos_index[NSS_IF_N2H_EMPTY_BUFFER_RETURN_QUEUE], sizeof(uint32_t), DMA_TO_DEVICE);
+ dma_sync_single_for_device(nss_ctx->dev,
+ n2h_hlos_index_to_dma(mem_ctx->if_map_dma, NSS_IF_N2H_EMPTY_BUFFER_RETURN_QUEUE),
+ sizeof(uint32_t), DMA_TO_DEVICE);
NSS_CORE_DSB();
}
@@ -1504,6 +1508,7 @@ static int32_t nss_core_handle_cause_queue(struct int_ctx_instance *int_ctx, uin
struct nss_ctx_instance *nss_ctx = int_ctx->nss_ctx;
struct nss_meminfo_ctx *mem_ctx = &nss_ctx->meminfo_ctx;
struct nss_if_mem_map *if_map = mem_ctx->if_map;
+ int dma_size;
qid = nss_core_cause_to_queue(cause);
@@ -1515,7 +1520,8 @@ static int32_t nss_core_handle_cause_queue(struct int_ctx_instance *int_ctx, uin
n2h_desc_ring = &nss_ctx->n2h_desc_ring[qid];
desc_if = &n2h_desc_ring->desc_ring;
desc_ring = desc_if->desc;
- NSS_CORE_DMA_CACHE_MAINT((void *)&if_map->n2h_nss_index[qid], sizeof(uint32_t), DMA_FROM_DEVICE);
+ dma_sync_single_for_device(nss_ctx->dev, n2h_nss_index_to_dma(mem_ctx->if_map_dma, qid),
+ sizeof(uint32_t), DMA_FROM_DEVICE);
NSS_CORE_DSB();
nss_index = if_map->n2h_nss_index[qid];
@@ -1544,13 +1550,23 @@ static int32_t nss_core_handle_cause_queue(struct int_ctx_instance *int_ctx, uin
start = hlos_index;
end = (hlos_index + count) & mask;
if (end > start) {
- dmac_inv_range((void *)&desc_ring[start], (void *)&desc_ring[end] + sizeof(struct n2h_descriptor));
+ dma_size = sizeof(struct n2h_descriptor) * (end - start + 1);
+
+ dma_sync_single_for_device(nss_ctx->dev, n2h_desc_index_to_dma(if_map, qid, start),
+ dma_size, DMA_FROM_DEVICE);
} else {
/*
* We have wrapped around
*/
- dmac_inv_range((void *)&desc_ring[start], (void *)&desc_ring[mask] + sizeof(struct n2h_descriptor));
- dmac_inv_range((void *)&desc_ring[0], (void *)&desc_ring[end] + sizeof(struct n2h_descriptor));
+ dma_size = sizeof(struct n2h_descriptor) * (mask - start + 1);
+
+ dma_sync_single_for_device(nss_ctx->dev, n2h_desc_index_to_dma(if_map, qid, start),
+ dma_size, DMA_FROM_DEVICE);
+
+ dma_size = sizeof(struct n2h_descriptor) * (end + 1);
+
+ dma_sync_single_for_device(nss_ctx->dev, n2h_desc_index_to_dma(if_map, qid, 0), dma_size,
+ DMA_FROM_DEVICE);
}
/*
@@ -1679,7 +1695,8 @@ next:
n2h_desc_ring->hlos_index = hlos_index;
if_map->n2h_hlos_index[qid] = hlos_index;
- NSS_CORE_DMA_CACHE_MAINT((void *)&if_map->n2h_hlos_index[qid], sizeof(uint32_t), DMA_TO_DEVICE);
+ dma_sync_single_for_device(nss_ctx->dev, n2h_hlos_index_to_dma(mem_ctx->if_map_dma, qid),
+ sizeof(uint32_t), DMA_TO_DEVICE);
NSS_CORE_DSB();
return count;
@@ -1691,11 +1708,12 @@ next:
*/
static void nss_core_init_nss(struct nss_ctx_instance *nss_ctx, struct nss_if_mem_map *if_map)
{
+ struct nss_meminfo_ctx *mem_ctx = &nss_ctx->meminfo_ctx;
struct nss_top_instance *nss_top;
int ret;
int i;
- NSS_CORE_DMA_CACHE_MAINT((void *)if_map, sizeof(*if_map), DMA_FROM_DEVICE);
+ dma_sync_single_for_device(nss_ctx->dev, mem_ctx->if_map_dma, sizeof(*if_map), DMA_FROM_DEVICE);
NSS_CORE_DSB();
/*
@@ -1762,6 +1780,7 @@ static void nss_core_alloc_paged_buffers(struct nss_ctx_instance *nss_ctx, struc
uint16_t count, int16_t mask, int32_t hlos_index, uint32_t alloc_fail_count,
uint32_t buffer_type, uint32_t buffer_queue, uint32_t stats_index)
{
+ struct nss_meminfo_ctx *mem_ctx = &nss_ctx->meminfo_ctx;
struct sk_buff *nbuf;
struct page *npage;
struct hlos_h2n_desc_rings *h2n_desc_ring = &nss_ctx->h2n_desc_rings[buffer_queue];
@@ -1831,7 +1850,9 @@ static void nss_core_alloc_paged_buffers(struct nss_ctx_instance *nss_ctx, struc
/*
* Flush the descriptor
*/
- NSS_CORE_DMA_CACHE_MAINT((void *)desc, sizeof(*desc), DMA_TO_DEVICE);
+ dma_sync_single_for_device(nss_ctx->dev,
+ h2n_desc_index_to_dma(if_map, buffer_queue, hlos_index),
+ sizeof(*desc), DMA_TO_DEVICE);
hlos_index = (hlos_index + 1) & (mask);
count--;
@@ -1845,7 +1866,8 @@ static void nss_core_alloc_paged_buffers(struct nss_ctx_instance *nss_ctx, struc
h2n_desc_ring->hlos_index = hlos_index;
if_map->h2n_hlos_index[buffer_queue] = hlos_index;
- NSS_CORE_DMA_CACHE_MAINT(&if_map->h2n_hlos_index[buffer_queue], sizeof(uint32_t), DMA_TO_DEVICE);
+ dma_sync_single_for_device(nss_ctx->dev, h2n_hlos_index_to_dma(mem_ctx->if_map_dma, buffer_queue),
+ sizeof(uint32_t), DMA_TO_DEVICE);
NSS_CORE_DSB();
NSS_PKT_STATS_INC(&nss_top->stats_drv[stats_index]);
@@ -1858,7 +1880,7 @@ static void nss_core_alloc_paged_buffers(struct nss_ctx_instance *nss_ctx, struc
static void nss_core_alloc_jumbo_mru_buffers(struct nss_ctx_instance *nss_ctx, struct nss_if_mem_map *if_map,
int jumbo_mru, uint16_t count, int16_t mask, int32_t hlos_index)
{
-
+ struct nss_meminfo_ctx *mem_ctx = &nss_ctx->meminfo_ctx;
struct sk_buff *nbuf;
struct hlos_h2n_desc_rings *h2n_desc_ring = &nss_ctx->h2n_desc_rings[NSS_IF_H2N_EMPTY_BUFFER_QUEUE];
struct h2n_desc_if_instance *desc_if = &h2n_desc_ring->desc_ring;
@@ -1905,7 +1927,9 @@ static void nss_core_alloc_jumbo_mru_buffers(struct nss_ctx_instance *nss_ctx, s
/*
* Flush the descriptor
*/
- NSS_CORE_DMA_CACHE_MAINT((void *)desc, sizeof(*desc), DMA_TO_DEVICE);
+ dma_sync_single_for_device(nss_ctx->dev,
+ h2n_desc_index_to_dma(if_map, NSS_IF_H2N_EMPTY_BUFFER_QUEUE, hlos_index),
+ sizeof(*desc), DMA_TO_DEVICE);
hlos_index = (hlos_index + 1) & (mask);
count--;
@@ -1919,7 +1943,8 @@ static void nss_core_alloc_jumbo_mru_buffers(struct nss_ctx_instance *nss_ctx, s
h2n_desc_ring->hlos_index = hlos_index;
if_map->h2n_hlos_index[NSS_IF_H2N_EMPTY_BUFFER_QUEUE] = hlos_index;
- NSS_CORE_DMA_CACHE_MAINT(&if_map->h2n_hlos_index[NSS_IF_H2N_EMPTY_BUFFER_QUEUE], sizeof(uint32_t), DMA_TO_DEVICE);
+ dma_sync_single_for_device(nss_ctx->dev, h2n_hlos_index_to_dma(mem_ctx->if_map_dma, NSS_IF_H2N_EMPTY_BUFFER_QUEUE),
+ sizeof(uint32_t), DMA_TO_DEVICE);
NSS_CORE_DSB();
NSS_PKT_STATS_INC(&nss_top->stats_drv[NSS_DRV_STATS_TX_EMPTY]);
@@ -1932,6 +1957,7 @@ static void nss_core_alloc_jumbo_mru_buffers(struct nss_ctx_instance *nss_ctx, s
static void nss_core_alloc_max_avail_size_buffers(struct nss_ctx_instance *nss_ctx, struct nss_if_mem_map *if_map,
uint16_t max_buf_size, uint16_t count, int16_t mask, int32_t hlos_index)
{
+ struct nss_meminfo_ctx *mem_ctx = &nss_ctx->meminfo_ctx;
struct hlos_h2n_desc_rings *h2n_desc_ring = &nss_ctx->h2n_desc_rings[NSS_IF_H2N_EMPTY_BUFFER_QUEUE];
struct h2n_desc_if_instance *desc_if = &h2n_desc_ring->desc_ring;
struct h2n_descriptor *desc_ring = desc_if->desc;
@@ -1939,6 +1965,7 @@ static void nss_core_alloc_max_avail_size_buffers(struct nss_ctx_instance *nss_c
uint16_t payload_len = max_buf_size + NET_SKB_PAD;
uint16_t start = hlos_index;
uint16_t prev_hlos_index;
+ int dma_size;
while (count) {
dma_addr_t buffer;
@@ -1991,13 +2018,26 @@ static void nss_core_alloc_max_avail_size_buffers(struct nss_ctx_instance *nss_c
* Flush the descriptors, including the descriptor at prev_hlos_index.
*/
if (prev_hlos_index > start) {
- dmac_clean_range((void *)&desc_ring[start], (void *)&desc_ring[prev_hlos_index] + sizeof(struct h2n_descriptor));
+ dma_size = sizeof(struct h2n_descriptor) * (prev_hlos_index - start + 1);
+
+ dma_sync_single_for_device(nss_ctx->dev,
+ h2n_desc_index_to_dma(if_map, NSS_IF_H2N_EMPTY_BUFFER_QUEUE, start),
+ dma_size, DMA_TO_DEVICE);
} else {
/*
* We have wrapped around
*/
- dmac_clean_range((void *)&desc_ring[start], (void *)&desc_ring[mask] + sizeof(struct h2n_descriptor));
- dmac_clean_range((void *)&desc_ring[0], (void *)&desc_ring[prev_hlos_index] + sizeof(struct h2n_descriptor));
+ dma_size = sizeof(struct h2n_descriptor) * (mask - start + 1);
+
+ dma_sync_single_for_device(nss_ctx->dev,
+ h2n_desc_index_to_dma(if_map, NSS_IF_H2N_EMPTY_BUFFER_QUEUE, start),
+ dma_size, DMA_TO_DEVICE);
+
+ dma_size = sizeof(struct h2n_descriptor) * (prev_hlos_index + 1);
+
+ dma_sync_single_for_device(nss_ctx->dev,
+ h2n_desc_index_to_dma(if_map, NSS_IF_H2N_EMPTY_BUFFER_QUEUE, 0),
+ dma_size, DMA_TO_DEVICE);
}
/*
@@ -2008,7 +2048,8 @@ static void nss_core_alloc_max_avail_size_buffers(struct nss_ctx_instance *nss_c
h2n_desc_ring->hlos_index = hlos_index;
if_map->h2n_hlos_index[NSS_IF_H2N_EMPTY_BUFFER_QUEUE] = hlos_index;
- NSS_CORE_DMA_CACHE_MAINT(&if_map->h2n_hlos_index[NSS_IF_H2N_EMPTY_BUFFER_QUEUE], sizeof(uint32_t), DMA_TO_DEVICE);
+ dma_sync_single_for_device(nss_ctx->dev, h2n_hlos_index_to_dma(mem_ctx->if_map_dma, NSS_IF_H2N_EMPTY_BUFFER_QUEUE),
+ sizeof(uint32_t), DMA_TO_DEVICE);
NSS_CORE_DSB();
NSS_PKT_STATS_INC(&nss_top->stats_drv[NSS_DRV_STATS_TX_EMPTY]);
@@ -2021,6 +2062,7 @@ static void nss_core_alloc_max_avail_size_buffers(struct nss_ctx_instance *nss_c
static inline void nss_core_handle_empty_buffer_sos(struct nss_ctx_instance *nss_ctx,
struct nss_if_mem_map *if_map, uint16_t max_buf_size)
{
+ struct nss_meminfo_ctx *mem_ctx = &nss_ctx->meminfo_ctx;
uint16_t count, size, mask;
int32_t nss_index, hlos_index;
struct hlos_h2n_desc_rings *h2n_desc_ring = &nss_ctx->h2n_desc_rings[NSS_IF_H2N_EMPTY_BUFFER_QUEUE];
@@ -2031,7 +2073,8 @@ static inline void nss_core_handle_empty_buffer_sos(struct nss_ctx_instance *nss
/*
* Check how many empty buffers could be filled in queue
*/
- NSS_CORE_DMA_CACHE_MAINT(&if_map->h2n_nss_index[NSS_IF_H2N_EMPTY_BUFFER_QUEUE], sizeof(uint32_t), DMA_FROM_DEVICE);
+ dma_sync_single_for_device(nss_ctx->dev, h2n_nss_index_to_dma(mem_ctx->if_map_dma, NSS_IF_H2N_EMPTY_BUFFER_QUEUE),
+ sizeof(uint32_t), DMA_FROM_DEVICE);
NSS_CORE_DSB();
nss_index = if_map->h2n_nss_index[NSS_IF_H2N_EMPTY_BUFFER_QUEUE];
@@ -2076,6 +2119,7 @@ static inline void nss_core_handle_empty_buffer_sos(struct nss_ctx_instance *nss
static inline void nss_core_handle_paged_empty_buffer_sos(struct nss_ctx_instance *nss_ctx,
struct nss_if_mem_map *if_map, uint16_t max_buf_size)
{
+ struct nss_meminfo_ctx *mem_ctx = &nss_ctx->meminfo_ctx;
uint16_t count, size, mask;
int32_t nss_index, hlos_index;
struct hlos_h2n_desc_rings *h2n_desc_ring = &nss_ctx->h2n_desc_rings[NSS_IF_H2N_EMPTY_PAGED_BUFFER_QUEUE];
@@ -2083,7 +2127,8 @@ static inline void nss_core_handle_paged_empty_buffer_sos(struct nss_ctx_instanc
/*
* Check how many empty buffers could be filled in queue
*/
- NSS_CORE_DMA_CACHE_MAINT((void *)&if_map->h2n_nss_index[NSS_IF_H2N_EMPTY_PAGED_BUFFER_QUEUE], sizeof(uint32_t), DMA_FROM_DEVICE);
+ dma_sync_single_for_device(nss_ctx->dev, h2n_nss_index_to_dma(mem_ctx->if_map_dma, NSS_IF_H2N_EMPTY_PAGED_BUFFER_QUEUE),
+ sizeof(uint32_t), DMA_FROM_DEVICE);
NSS_CORE_DSB();
nss_index = if_map->h2n_nss_index[NSS_IF_H2N_EMPTY_PAGED_BUFFER_QUEUE];
@@ -2651,9 +2696,11 @@ void nss_skb_reuse(struct sk_buff *nbuf)
* Sends one skb to NSS FW
*/
static inline int32_t nss_core_send_buffer_simple_skb(struct nss_ctx_instance *nss_ctx,
- struct h2n_desc_if_instance *desc_if, uint32_t if_num,
- struct sk_buff *nbuf, uint16_t hlos_index, uint16_t flags, uint8_t buffer_type, uint16_t mss)
+ struct h2n_desc_if_instance *desc_if, uint32_t if_num, struct sk_buff *nbuf,
+ uint16_t qid, uint16_t hlos_index, uint16_t flags, uint8_t buffer_type, uint16_t mss)
{
+ struct nss_meminfo_ctx *mem_ctx = &nss_ctx->meminfo_ctx;
+ struct nss_if_mem_map *if_map = mem_ctx->if_map;
struct h2n_descriptor *desc_ring = desc_if->desc;
struct h2n_descriptor *desc;
uint16_t bit_flags;
@@ -2707,7 +2754,8 @@ static inline int32_t nss_core_send_buffer_simple_skb(struct nss_ctx_instance *n
(nss_ptr_t)nbuf, (uint16_t)(nbuf->data - nbuf->head), nbuf->len,
sz, (uint32_t)nbuf->priority, mss, bit_flags);
- NSS_CORE_DMA_CACHE_MAINT((void *)desc, sizeof(*desc), DMA_TO_DEVICE);
+ dma_sync_single_for_device(nss_ctx->dev, h2n_desc_index_to_dma(if_map, qid, hlos_index),
+ sizeof(*desc), DMA_TO_DEVICE);
/*
* We are done using the skb fields and can reuse it now
@@ -2731,7 +2779,8 @@ no_reuse:
(nss_ptr_t)nbuf, (uint16_t)(nbuf->data - nbuf->head), nbuf->len,
(uint16_t)skb_end_offset(nbuf), (uint32_t)nbuf->priority, mss, bit_flags);
- NSS_CORE_DMA_CACHE_MAINT((void *)desc, sizeof(*desc), DMA_TO_DEVICE);
+ dma_sync_single_for_device(nss_ctx->dev, h2n_desc_index_to_dma(if_map, qid, hlos_index),
+ sizeof(*desc), DMA_TO_DEVICE);
NSS_PKT_STATS_INC(&nss_ctx->nss_top->stats_drv[NSS_DRV_STATS_TX_SIMPLE]);
return 1;
@@ -2745,9 +2794,11 @@ no_reuse:
* Used to differentiate from FRAGLIST
*/
static inline int32_t nss_core_send_buffer_nr_frags(struct nss_ctx_instance *nss_ctx,
- struct h2n_desc_if_instance *desc_if, uint32_t if_num,
- struct sk_buff *nbuf, uint16_t hlos_index, uint16_t flags, uint8_t buffer_type, uint16_t mss)
+ struct h2n_desc_if_instance *desc_if, uint32_t if_num, struct sk_buff *nbuf,
+ uint16_t qid, uint16_t hlos_index, uint16_t flags, uint8_t buffer_type, uint16_t mss)
{
+ struct nss_meminfo_ctx *mem_ctx = &nss_ctx->meminfo_ctx;
+ struct nss_if_mem_map *if_map = mem_ctx->if_map;
struct h2n_descriptor *desc_ring = desc_if->desc;
struct h2n_descriptor *desc;
const skb_frag_t *frag;
@@ -2787,7 +2838,8 @@ static inline int32_t nss_core_send_buffer_nr_frags(struct nss_ctx_instance *nss
(nss_ptr_t)NULL, nbuf->data - nbuf->head, nbuf->len - nbuf->data_len,
skb_end_offset(nbuf), (uint32_t)nbuf->priority, mss, bit_flags | H2N_BIT_FLAG_FIRST_SEGMENT);
- NSS_CORE_DMA_CACHE_MAINT((void *)desc, sizeof(*desc), DMA_TO_DEVICE);
+ dma_sync_single_for_device(nss_ctx->dev, h2n_desc_index_to_dma(if_map, qid, hlos_index),
+ sizeof(*desc), DMA_TO_DEVICE);
/*
* Now handle rest of the fragments.
@@ -2811,7 +2863,8 @@ static inline int32_t nss_core_send_buffer_nr_frags(struct nss_ctx_instance *nss
(nss_ptr_t)NULL, 0, skb_frag_size(frag), skb_frag_size(frag),
nbuf->priority, mss, bit_flags);
- NSS_CORE_DMA_CACHE_MAINT((void *)desc, sizeof(*desc), DMA_TO_DEVICE);
+ dma_sync_single_for_device(nss_ctx->dev, h2n_desc_index_to_dma(if_map, qid, hlos_index),
+ sizeof(*desc), DMA_TO_DEVICE);
}
/*
@@ -2827,7 +2880,8 @@ static inline int32_t nss_core_send_buffer_nr_frags(struct nss_ctx_instance *nss
desc->bit_flags &= ~(H2N_BIT_FLAG_DISCARD);
desc->opaque = (nss_ptr_t)nbuf;
- NSS_CORE_DMA_CACHE_MAINT((void *)desc, sizeof(*desc), DMA_TO_DEVICE);
+ dma_sync_single_for_device(nss_ctx->dev, h2n_desc_index_to_dma(if_map, qid, hlos_index),
+ sizeof(*desc), DMA_TO_DEVICE);
NSS_PKT_STATS_INC(&nss_ctx->nss_top->stats_drv[NSS_DRV_STATS_TX_NR_FRAGS]);
return i+1;
@@ -2841,9 +2895,11 @@ static inline int32_t nss_core_send_buffer_nr_frags(struct nss_ctx_instance *nss
* Used to differentiate from FRAGS
*/
static inline int32_t nss_core_send_buffer_fraglist(struct nss_ctx_instance *nss_ctx,
- struct h2n_desc_if_instance *desc_if, uint32_t if_num,
- struct sk_buff *nbuf, uint16_t hlos_index, uint16_t flags, uint8_t buffer_type, uint16_t mss)
+ struct h2n_desc_if_instance *desc_if, uint32_t if_num, struct sk_buff *nbuf,
+ uint16_t qid, uint16_t hlos_index, uint16_t flags, uint8_t buffer_type, uint16_t mss)
{
+ struct nss_meminfo_ctx *mem_ctx = &nss_ctx->meminfo_ctx;
+ struct nss_if_mem_map *if_map = mem_ctx->if_map;
struct h2n_descriptor *desc_ring = desc_if->desc;
struct h2n_descriptor *desc;
dma_addr_t buffer;
@@ -2882,7 +2938,8 @@ static inline int32_t nss_core_send_buffer_fraglist(struct nss_ctx_instance *nss
(nss_ptr_t)nbuf, nbuf->data - nbuf->head, nbuf->len - nbuf->data_len,
skb_end_offset(nbuf), (uint32_t)nbuf->priority, mss, bit_flags | H2N_BIT_FLAG_FIRST_SEGMENT);
- NSS_CORE_DMA_CACHE_MAINT((void *)desc, sizeof(*desc), DMA_TO_DEVICE);
+ dma_sync_single_for_device(nss_ctx->dev, h2n_desc_index_to_dma(if_map, qid, hlos_index),
+ sizeof(*desc), DMA_TO_DEVICE);
/*
* Walk the frag_list in nbuf
@@ -2935,7 +2992,8 @@ static inline int32_t nss_core_send_buffer_fraglist(struct nss_ctx_instance *nss
(nss_ptr_t)iter, iter->data - iter->head, iter->len - iter->data_len,
skb_end_offset(iter), iter->priority, mss, bit_flags);
- NSS_CORE_DMA_CACHE_MAINT((void *)desc, sizeof(*desc), DMA_TO_DEVICE);
+ dma_sync_single_for_device(nss_ctx->dev, h2n_desc_index_to_dma(if_map, qid, hlos_index),
+ sizeof(*desc), DMA_TO_DEVICE);
i++;
}
@@ -2954,7 +3012,8 @@ static inline int32_t nss_core_send_buffer_fraglist(struct nss_ctx_instance *nss
* Update bit flag for last descriptor.
*/
desc->bit_flags |= H2N_BIT_FLAG_LAST_SEGMENT;
- NSS_CORE_DMA_CACHE_MAINT((void *)desc, sizeof(*desc), DMA_TO_DEVICE);
+ dma_sync_single_for_device(nss_ctx->dev, h2n_desc_index_to_dma(if_map, qid, hlos_index),
+ sizeof(*desc), DMA_TO_DEVICE);
NSS_PKT_STATS_INC(&nss_ctx->nss_top->stats_drv[NSS_DRV_STATS_TX_FRAGLIST]);
return i+1;
@@ -3025,8 +3084,10 @@ int32_t nss_core_send_buffer(struct nss_ctx_instance *nss_ctx, uint32_t if_num,
* We need to work out if there's sufficent space in our transmit descriptor
* ring to place all the segments of a nbuf.
*/
- NSS_CORE_DMA_CACHE_MAINT((void *)&if_map->h2n_nss_index[qid], sizeof(uint32_t), DMA_FROM_DEVICE);
+ dma_sync_single_for_device(nss_ctx->dev, h2n_nss_index_to_dma(mem_ctx->if_map_dma, qid),
+ sizeof(uint32_t), DMA_FROM_DEVICE);
NSS_CORE_DSB();
+
nss_index = if_map->h2n_nss_index[qid];
h2n_desc_ring->nss_index_local = nss_index;
count = ((nss_index - hlos_index - 1) + size) & (mask);
@@ -3095,13 +3156,13 @@ int32_t nss_core_send_buffer(struct nss_ctx_instance *nss_ctx, uint32_t if_num,
count = 0;
if (likely((segments == 0) || is_bounce)) {
count = nss_core_send_buffer_simple_skb(nss_ctx, desc_if, if_num,
- nbuf, hlos_index, flags, buffer_type, mss);
+ nbuf, qid, hlos_index, flags, buffer_type, mss);
} else if (skb_has_frag_list(nbuf)) {
count = nss_core_send_buffer_fraglist(nss_ctx, desc_if, if_num,
- nbuf, hlos_index, flags, buffer_type, mss);
+ nbuf, qid, hlos_index, flags, buffer_type, mss);
} else {
count = nss_core_send_buffer_nr_frags(nss_ctx, desc_if, if_num,
- nbuf, hlos_index, flags, buffer_type, mss);
+ nbuf, qid, hlos_index, flags, buffer_type, mss);
}
if (unlikely(count <= 0)) {
@@ -3125,7 +3186,8 @@ int32_t nss_core_send_buffer(struct nss_ctx_instance *nss_ctx, uint32_t if_num,
h2n_desc_ring->hlos_index = hlos_index;
if_map->h2n_hlos_index[qid] = hlos_index;
- NSS_CORE_DMA_CACHE_MAINT(&if_map->h2n_hlos_index[qid], sizeof(uint32_t), DMA_TO_DEVICE);
+ dma_sync_single_for_device(nss_ctx->dev, h2n_hlos_index_to_dma(mem_ctx->if_map_dma, qid),
+ sizeof(uint32_t), DMA_TO_DEVICE);
NSS_CORE_DSB();
#ifdef CONFIG_DEBUG_KMEMLEAK
diff --git a/nss_core.h b/nss_core.h
index d7f62fe..7ddf6ce 100644
--- a/nss_core.h
+++ b/nss_core.h
@@ -100,31 +100,30 @@
#endif
/*
- * Cache operation
+ * DMA Offset helper
*/
-#define NSS_CORE_DSB() dsb(sy)
-#define NSS_CORE_DMA_CACHE_MAINT(start, size, dir) nss_core_dma_cache_maint(start, size, dir)
+#define n2h_desc_index_offset(_index) sizeof(struct n2h_descriptor) * (_index)
+#define h2n_desc_index_offset(_index) sizeof(struct h2n_descriptor) * (_index)
+
+#define n2h_desc_index_to_dma(_if_map_addr, _qid, _index) (_if_map_addr)->n2h_desc_if[(_qid)].desc_addr + n2h_desc_index_offset(_index)
+#define h2n_desc_index_to_dma(_if_map_addr, _qid, _index) (_if_map_addr)->h2n_desc_if[(_qid)].desc_addr + h2n_desc_index_offset(_index)
+
+#define h2n_nss_index_offset offsetof(struct nss_if_mem_map, h2n_nss_index)
+#define n2h_nss_index_offset offsetof(struct nss_if_mem_map, n2h_nss_index)
+#define h2n_hlos_index_offset offsetof(struct nss_if_mem_map, h2n_hlos_index)
+#define n2h_hlos_index_offset offsetof(struct nss_if_mem_map, n2h_hlos_index)
+
+#define h2n_nss_index_to_dma(_if_map_addr, _index) (_if_map_addr) + h2n_nss_index_offset + (sizeof(uint32_t) * (_index))
+#define n2h_nss_index_to_dma(_if_map_addr, _index) (_if_map_addr) + n2h_nss_index_offset + (sizeof(uint32_t) * (_index))
+#define h2n_hlos_index_to_dma(_if_map_addr, _index) (_if_map_addr) + h2n_hlos_index_offset + (sizeof(uint32_t) * (_index))
+#define n2h_hlos_index_to_dma(_if_map_addr, _index) (_if_map_addr) + n2h_hlos_index_offset + (sizeof(uint32_t) * (_index))
/*
- * nss_core_dma_cache_maint()
- * Perform the appropriate cache op based on direction
+ * Cache operation
*/
-static inline void nss_core_dma_cache_maint(void *start, uint32_t size, int direction)
-{
- switch (direction) {
- case DMA_FROM_DEVICE:/* invalidate only */
- dmac_inv_range(start, start + size);
- break;
- case DMA_TO_DEVICE:/* writeback only */
- dmac_clean_range(start, start + size);
- break;
- case DMA_BIDIRECTIONAL:/* writeback and invalidate */
- dmac_flush_range(start, start + size);
- break;
- default:
- BUG();
- }
-}
+#define NSS_CORE_DSB() dsb(sy)
+#define NSS_CORE_DMA_CACHE_MAINT(dev, start, size, dir) BUILD_BUG_ON_MSG(1, \
+ "NSS_CORE_DMA_CACHE_MAINT is deprecated. Fix the code to use correct dma_sync_* API")
#define NSS_DEVICE_IF_START NSS_PHYSICAL_IF_START
diff --git a/nss_hal/ipq806x/nss_hal_pvt.c b/nss_hal/ipq806x/nss_hal_pvt.c
index 52d63b0..5375087 100644
--- a/nss_hal/ipq806x/nss_hal_pvt.c
+++ b/nss_hal/ipq806x/nss_hal_pvt.c
@@ -474,10 +474,9 @@ static struct nss_platform_data *__nss_hal_of_get_pdata(struct platform_device *
/*
* Clear TCM memory used by this core
*/
- for (i = 0; i < resource_size(&res_vphys) ; i += 4) {
+ for (i = 0; i < resource_size(&res_vphys) ; i += 4)
nss_write_32(npd->vmap, i, 0);
- NSS_CORE_DMA_CACHE_MAINT((npd->vmap + i), 4, DMA_TO_DEVICE);
- }
+
NSS_CORE_DSB();
/*
diff --git a/nss_hal/ipq807x/nss_hal_pvt.c b/nss_hal/ipq807x/nss_hal_pvt.c
index bb8f42f..733d7f1 100644
--- a/nss_hal/ipq807x/nss_hal_pvt.c
+++ b/nss_hal/ipq807x/nss_hal_pvt.c
@@ -256,10 +256,9 @@ static struct nss_platform_data *__nss_hal_of_get_pdata(struct platform_device *
/*
* Clear TCM memory used by this core
*/
- for (i = 0; i < resource_size(&res_vphys) ; i += 4) {
+ for (i = 0; i < resource_size(&res_vphys) ; i += 4)
nss_write_32(npd->vmap, i, 0);
- NSS_CORE_DMA_CACHE_MAINT((npd->vmap + i), 4, DMA_TO_DEVICE);
- }
+
NSS_CORE_DSB();
/*
diff --git a/nss_meminfo.c b/nss_meminfo.c
index 2255eae..d804524 100644
--- a/nss_meminfo.c
+++ b/nss_meminfo.c
@@ -414,7 +414,6 @@ static bool nss_meminfo_init_block_lists(struct nss_ctx_instance *nss_ctx)
/*
* Flush the updated meminfo request.
*/
- NSS_CORE_DMA_CACHE_MAINT(r, sizeof(struct nss_meminfo_request), DMA_TO_DEVICE);
NSS_CORE_DSB();
/*
@@ -538,7 +537,7 @@ static bool nss_meminfo_configure_n2h_h2n_rings(struct nss_ctx_instance *nss_ctx
* Bring a fresh copy of if_map from memory in order to read it correctly.
*/
if_map = mem_ctx->if_map;
- NSS_CORE_DMA_CACHE_MAINT((void *)if_map, sizeof(struct nss_if_mem_map), DMA_FROM_DEVICE);
+ dma_sync_single_for_device(nss_ctx->dev, mem_ctx->if_map_dma, sizeof(struct nss_if_mem_map), DMA_FROM_DEVICE);
NSS_CORE_DSB();
if_map->n2h_rings = NSS_N2H_RING_COUNT;
@@ -576,7 +575,7 @@ static bool nss_meminfo_configure_n2h_h2n_rings(struct nss_ctx_instance *nss_ctx
/*
* Flush the updated nss_if_mem_map.
*/
- NSS_CORE_DMA_CACHE_MAINT((void *)if_map, sizeof(struct nss_if_mem_map), DMA_TO_DEVICE);
+ dma_sync_single_for_device(nss_ctx->dev, mem_ctx->if_map_dma, sizeof(struct nss_if_mem_map), DMA_TO_DEVICE);
NSS_CORE_DSB();
return true;
diff --git a/nss_profiler.c b/nss_profiler.c
index 5717ac3..aadc7c9 100755
--- a/nss_profiler.c
+++ b/nss_profiler.c
@@ -199,11 +199,12 @@ EXPORT_SYMBOL(nss_profile_dma_deregister_cb);
struct nss_profile_sdma_ctrl *nss_profile_dma_get_ctrl(struct nss_ctx_instance *nss_ctx)
{
struct nss_profile_sdma_ctrl *ctrl = nss_ctx->meminfo_ctx.sdma_ctrl;
+ int size = offsetof(struct nss_profile_sdma_ctrl, cidx);
if (!ctrl) {
return ctrl;
}
- dmac_inv_range(ctrl, &ctrl->cidx);
+ dma_sync_single_for_device(nss_ctx->dev, (dma_addr_t) ctrl, size, DMA_FROM_DEVICE);
dsb(sy);
return ctrl;
}
--
2.34.1

70
qca/qca-nss-drv/patches/0005-nss-drv-add-support-for-kernel-5.15.patch
View file

@ -1,70 +0,0 @@
From 6e65f6daecb09463688eaea0a234018a728196b8 Mon Sep 17 00:00:00 2001
From: Ansuel Smith <ansuelsmth@gmail.com>
Date: Tue, 5 Apr 2022 18:10:57 +0200
Subject: [PATCH 5/8] nss-drv: add support for kernel 5.15
- Fix coredump panic notifier include change.
- Fix skb ZEROCOPY flag.
- Add skb reuse support for 5.15 kernel version.
Signed-off-by: Ansuel Smith <ansuelsmth@gmail.com>
---
nss_core.c | 5 +++--
nss_coredump.c | 4 ++++
nss_hal/nss_hal.c | 1 +
3 files changed, 8 insertions(+), 2 deletions(-)
diff --git a/nss_core.c b/nss_core.c
index f9e6014..8cd1d4b 100644
--- a/nss_core.c
+++ b/nss_core.c
@@ -53,7 +53,8 @@
(((LINUX_VERSION_CODE >= KERNEL_VERSION(3, 18, 0)) && (LINUX_VERSION_CODE < KERNEL_VERSION(3, 19, 0)))) || \
(((LINUX_VERSION_CODE >= KERNEL_VERSION(4, 4, 0)) && (LINUX_VERSION_CODE < KERNEL_VERSION(4, 5, 0)))) || \
(((LINUX_VERSION_CODE >= KERNEL_VERSION(5, 4, 0)) && (LINUX_VERSION_CODE < KERNEL_VERSION(5, 5, 0)))) || \
-(((LINUX_VERSION_CODE >= KERNEL_VERSION(5, 10, 0)) && (LINUX_VERSION_CODE < KERNEL_VERSION(5, 11, 0))))))
+(((LINUX_VERSION_CODE >= KERNEL_VERSION(5, 10, 0)) && (LINUX_VERSION_CODE < KERNEL_VERSION(5, 11, 0)))) || \
+(((LINUX_VERSION_CODE >= KERNEL_VERSION(5, 15, 0)) && (LINUX_VERSION_CODE < KERNEL_VERSION(5, 16, 0))))))
#error "Check skb recycle code in this file to match Linux version"
#endif
@@ -2623,7 +2624,7 @@ static inline bool nss_core_skb_can_reuse(struct nss_ctx_instance *nss_ctx,
if (unlikely(irqs_disabled()))
return false;
- if (unlikely(skb_shinfo(nbuf)->tx_flags & SKBTX_DEV_ZEROCOPY))
+ if (unlikely(skb_shinfo(nbuf)->flags & SKBFL_ZEROCOPY_ENABLE))
return false;
if (unlikely(skb_is_nonlinear(nbuf)))
diff --git a/nss_coredump.c b/nss_coredump.c
index ecad659..3ecef7e 100644
--- a/nss_coredump.c
+++ b/nss_coredump.c
@@ -23,7 +23,11 @@
#include "nss_hal.h"
#include "nss_log.h"
#include <linux/kernel.h>
+#if (LINUX_VERSION_CODE < KERNEL_VERSION(5, 14, 0))
#include <linux/notifier.h> /* for panic_notifier_list */
+#else
+#include <linux/panic_notifier.h>
+#endif
#include <linux/jiffies.h> /* for time */
#include "nss_tx_rx_common.h"
diff --git a/nss_hal/nss_hal.c b/nss_hal/nss_hal.c
index 57974c1..d8c703b 100644
--- a/nss_hal/nss_hal.c
+++ b/nss_hal/nss_hal.c
@@ -24,6 +24,7 @@
#include <linux/firmware.h>
#include <linux/of.h>
#include <linux/irq.h>
+#include <linux/ethtool.h>
#include "nss_hal.h"
#include "nss_arch.h"
--
2.34.1

30
qca/qca-nss-drv/patches/0005-nss-drv-use-standard-skb_skip_tc_classify-instead-of.patch
View file

@ -1,30 +0,0 @@
From 4dd701916186803172a9f35e7e982a953613ad55 Mon Sep 17 00:00:00 2001
From: Ansuel Smith <ansuelsmth@gmail.com>
Date: Mon, 11 Apr 2022 21:32:41 +0200
Subject: [PATCH 5/9] nss-drv: use standard skb_skip_tc_classify instead of
custom api
Use skb_skip_tc_classify to skip classify for packet handled by nss
instead of custom api.
Signed-off-by: Ansuel Smith <ansuelsmth@gmail.com>
---
nss_core.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/nss_core.c b/nss_core.c
index f9e6014..6ab8038 100644
--- a/nss_core.c
+++ b/nss_core.c
@@ -1075,7 +1075,7 @@ static inline void nss_core_set_skb_classify(struct sk_buff *nbuf)
#if (LINUX_VERSION_CODE < KERNEL_VERSION(5, 4, 0))
nbuf->tc_verd = SET_TC_NCLS_NSS(nbuf->tc_verd);
#else
- skb_set_tc_classify_offload(nbuf);
+ skb_skip_tc_classify(nbuf);
#endif
#endif
}
--
2.34.1

172
qca/qca-nss-drv/patches/0008-Makefile-modularize-driver-even-more.patch
View file

@ -1,172 +0,0 @@
From 895de8e4119afe3cbad2aa81566b1ebcb2b39dcd Mon Sep 17 00:00:00 2001
From: Ansuel Smith <ansuelsmth@gmail.com>
Date: Tue, 17 May 2022 20:23:19 +0200
Subject: [PATCH] Makefile: modularize driver even more
Permit to disable even more module.
Signed-off-by: Ansuel Smith <ansuelsmth@gmail.com>
---
Makefile | 56 ++++++++++++++++++++++++++++++++---------------
nss_hal/nss_hal.c | 6 +++++
nss_init.c | 4 ++++
3 files changed, 48 insertions(+), 18 deletions(-)
diff --git a/Makefile b/Makefile
index f5c4b90..0194dbd 100644
--- a/Makefile
+++ b/Makefile
@@ -39,35 +39,55 @@ qca-nss-drv-objs := \
nss_pm.o \
nss_profiler.o \
nss_project.o \
- nss_pppoe.o \
- nss_pppoe_log.o \
- nss_pppoe_stats.o \
- nss_pppoe_strings.o \
nss_rps.o \
nss_stats.o \
nss_strings.o \
nss_tx_msg_sync.o \
nss_unaligned.o \
nss_unaligned_log.o \
- nss_unaligned_stats.o \
- nss_virt_if.o \
- nss_virt_if_stats.o \
- nss_vlan.o \
- nss_vlan_log.o \
- nss_wifi.o \
- nss_wifi_log.o \
- nss_wifi_stats.o \
- nss_wifi_vdev.o \
- nss_wifili.o \
- nss_wifili_log.o \
- nss_wifili_stats.o \
- nss_wifili_strings.o \
- nss_wifi_mac_db.o
+ nss_unaligned_stats.o
# Base NSS data plane/HAL support
qca-nss-drv-objs += nss_data_plane/nss_data_plane_common.o
qca-nss-drv-objs += nss_hal/nss_hal.o
+ifneq "$(NSS_DRV_PPPOE_ENABLE)" "n"
+ccflags-y += -DNSS_DRV_PPPOE_ENABLE
+qca-nss-drv-objs += \
+ nss_pppoe.o \
+ nss_pppoe_log.o \
+ nss_pppoe_stats.o \
+ nss_pppoe_strings.o
+endif
+
+ifneq "$(NSS_DRV_VIRT_IF_ENABLE)" "n"
+ccflags-y += -DNSS_DRV_VIRT_IF_ENABLE
+qca-nss-drv-objs += \
+ nss_virt_if.o \
+ nss_virt_if_stats.o
+endif
+
+ifneq "$(NSS_DRV_VLAN_ENABLE)" "n"
+ccflags-y += -DNSS_DRV_VLAN_ENABLE
+qca-nss-drv-objs += \
+ nss_vlan.o \
+ nss_vlan_log.o
+endif
+
+ifneq "$(NSS_DRV_WIFI_ENABLE)" "n"
+ccflags-y += -DNSS_DRV_WIFI_ENABLE
+qca-nss-drv-objs += \
+ nss_wifi.o \
+ nss_wifi_log.o \
+ nss_wifi_stats.o \
+ nss_wifi_vdev.o \
+ nss_wifili.o \
+ nss_wifili_log.o \
+ nss_wifili_stats.o \
+ nss_wifili_strings.o \
+ nss_wifi_mac_db.o
+endif
+
ifneq "$(NSS_DRV_BRIDGE_ENABLE)" "n"
ccflags-y += -DNSS_DRV_BRIDGE_ENABLE
qca-nss-drv-objs += \
diff --git a/nss_hal/nss_hal.c b/nss_hal/nss_hal.c
index 7e9a044..c0051e4 100644
--- a/nss_hal/nss_hal.c
+++ b/nss_hal/nss_hal.c
@@ -460,10 +460,12 @@ int nss_hal_probe(struct platform_device *nss_dev)
}
#endif
+#ifdef NSS_DRV_PPPOE_ENABLE
if (npd->pppoe_enabled == NSS_FEATURE_ENABLED) {
nss_top->pppoe_handler_id = nss_dev->id;
nss_pppoe_register_handler();
}
+#endif
#ifdef NSS_DRV_PPE_ENABLE
if (npd->ppe_enabled == NSS_FEATURE_ENABLED) {
@@ -558,6 +560,7 @@ int nss_hal_probe(struct platform_device *nss_dev)
}
#endif
+#ifdef NSS_DRV_WIFI_ENABLE
if (npd->wifioffload_enabled == NSS_FEATURE_ENABLED) {
nss_top->wifi_handler_id = nss_dev->id;
nss_top->dynamic_interface_table[NSS_DYNAMIC_INTERFACE_TYPE_VAP] = nss_dev->id;
@@ -585,6 +588,7 @@ int nss_hal_probe(struct platform_device *nss_dev)
*/
nss_wifili_thread_scheme_db_init(nss_dev->id);
}
+#endif
#ifdef NSS_DRV_OAM_ENABLE
if (npd->oam_enabled == NSS_FEATURE_ENABLED) {
@@ -601,11 +605,13 @@ int nss_hal_probe(struct platform_device *nss_dev)
}
#endif
+#ifdef NSS_DRV_VLAN_ENABLE
if (npd->vlan_enabled == NSS_FEATURE_ENABLED) {
nss_top->vlan_handler_id = nss_dev->id;
nss_top->dynamic_interface_table[NSS_DYNAMIC_INTERFACE_TYPE_VLAN] = nss_dev->id;
nss_vlan_register_handler();
}
+#endif
#ifdef NSS_DRV_QVPN_ENABLE
#if defined(NSS_HAL_IPQ807x_SUPPORT) || defined(NSS_HAL_IPQ60XX_SUPPORT)
diff --git a/nss_init.c b/nss_init.c
index ebd2a12..40e9351 100644
--- a/nss_init.c
+++ b/nss_init.c
@@ -775,10 +775,12 @@ static int __init nss_init(void)
*/
nss_project_register_sysctl();
+#ifdef NSS_DRV_PPPOE_ENABLE
/*
* Registering sysctl for pppoe specific config.
*/
nss_pppoe_register_sysctl();
+#endif
/*
* Setup Runtime Sample values
@@ -913,10 +915,12 @@ static void __exit nss_cleanup(void)
nss_c2c_tx_unregister_sysctl();
#endif
+#ifdef NSS_DRV_PPPOE_ENABLE
/*
* Unregister pppoe specific sysctl
*/
nss_pppoe_unregister_sysctl();
+#endif
/*
* Unregister ipv4/6 specific sysctl and free allocated to connection tables
--
2.34.1

97
qca/qca-nss-ecm/Makefile
View file

@ -1,97 +0,0 @@
include $(TOPDIR)/rules.mk
PKG_NAME:=qca-nss-ecm
PKG_RELEASE:=$(AUTORELEASE)
PKG_SOURCE_URL:=https://git.codelinaro.org/clo/qsdk/oss/lklm/qca-nss-ecm.git
PKG_SOURCE_PROTO:=git
PKG_SOURCE_DATE:=2021-06-15
PKG_SOURCE_VERSION:=34267065855d32f33264dc3054efb0e8103d627b
PKG_MIRROR_HASH:=0917659d69c5f3e6067d6671b9393b4b2d6b6cd5a7bacf5e7d6cf842dc906eca
PKG_BUILD_PARALLEL:=1
include $(INCLUDE_DIR)/kernel.mk
include $(INCLUDE_DIR)/package.mk
define KernelPackage/qca-nss-ecm
SECTION:=kernel
CATEGORY:=Kernel modules
SUBMENU:=Network Support
DEPENDS:=@LINUX_5_10 @(TARGET_ipq807x||TARGET_ipq60xx) \
+kmod-qca-nss-drv \
+iptables-mod-extra \
+kmod-ipt-conntrack \
+kmod-ipt-physdev \
+iptables-mod-physdev \
+kmod-ppp \
+kmod-pppoe
TITLE:=QCA NSS Enhanced Connection Manager (ECM)
FILES:=$(PKG_BUILD_DIR)/*.ko
KCONFIG:=CONFIG_BRIDGE_NETFILTER=y \
CONFIG_NF_CONNTRACK_EVENTS=y \
CONFIG_NF_CONNTRACK_CHAIN_EVENTS=n \
CONFIG_NF_CONNTRACK_DSCPREMARK_EXT=n
endef
define KernelPackage/qca-nss-ecm/Description
This package contains the QCA NSS Enhanced Connection Manager
endef
define KernelPackage/qca-nss-ecm/install
$(INSTALL_DIR) $(1)/etc/firewall.d $(1)/etc/init.d $(1)/usr/bin $(1)/lib/netifd/offload $(1)/etc/config $(1)/etc/uci-defaults $(1)/etc/sysctl.d
$(INSTALL_DATA) ./files/qca-nss-ecm.firewall $(1)/etc/firewall.d/qca-nss-ecm
$(INSTALL_BIN) ./files/qca-nss-ecm.init $(1)/etc/init.d/qca-nss-ecm
$(INSTALL_BIN) ./files/ecm_dump.sh $(1)/usr/bin/
$(INSTALL_BIN) ./files/on-demand-down $(1)/lib/netifd/offload/on-demand-down
$(INSTALL_DATA) ./files/qca-nss-ecm.uci $(1)/etc/config/ecm
$(INSTALL_DATA) ./files/qca-nss-ecm.defaults $(1)/etc/uci-defaults/99-qca-nss-ecm
$(INSTALL_BIN) ./files/qca-nss-ecm.sysctl $(1)/etc/sysctl.d/qca-nss-ecm.conf
echo 'net.netfilter.nf_conntrack_max=8192' >> $(1)/etc/sysctl.d/qca-nss-ecm.conf
endef
EXTRA_CFLAGS+=-I$(STAGING_DIR)/usr/include/qca-nss-drv
ifneq (, $(findstring $(CONFIG_TARGET_BOARD), "ipq807x" "ipq60xx"))
ECM_MAKE_OPTS+= ECM_FRONT_END_NSS_ENABLE=y \
ECM_CLASSIFIER_HYFI_ENABLE=n \
ECM_MULTICAST_ENABLE=n \
ECM_INTERFACE_IPSEC_ENABLE=n \
ECM_INTERFACE_PPTP_ENABLE=n \
ECM_INTERFACE_L2TPV2_ENABLE=n \
ECM_INTERFACE_GRE_TAP_ENABLE=n \
ECM_INTERFACE_GRE_TUN_ENABLE=n \
ECM_INTERFACE_SIT_ENABLE=n \
ECM_INTERFACE_TUNIPIP6_ENABLE=n \
ECM_INTERFACE_RAWIP_ENABLE=n \
ECM_INTERFACE_VLAN_ENABLE=n \
ECM_CLASSIFIER_MARK_ENABLE=n \
ECM_CLASSIFIER_DSCP_ENABLE=n \
ECM_CLASSIFIER_PCC_ENABLE=n \
ECM_BAND_STEERING_ENABLE=n \
ECM_INTERFACE_PPPOE_ENABLE=y
endif
ifeq ($(CONFIG_TARGET_BOARD), "ipq807x")
SOC="ipq807x_64"
else ifeq ($(CONFIG_TARGET_BOARD), "ipq60xx")
SOC="ipq60xx_64"
endif
define Build/InstallDev
mkdir -p $(1)/usr/include/qca-nss-ecm
$(CP) $(PKG_BUILD_DIR)/exports/* $(1)/usr/include/qca-nss-ecm
endef
define Build/Compile
+$(MAKE) -C "$(LINUX_DIR)" $(strip $(ECM_MAKE_OPTS)) \
CROSS_COMPILE="$(TARGET_CROSS)" \
ARCH="$(LINUX_KARCH)" \
M="$(PKG_BUILD_DIR)" \
EXTRA_CFLAGS="$(EXTRA_CFLAGS)" SoC=$(SOC) \
$(KERNEL_MAKE_FLAGS) \
$(PKG_JOBS) \
modules
endef
$(eval $(call KernelPackage,qca-nss-ecm))

95
qca/qca-nss-ecm/files/ecm_dump.sh
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@ -1,95 +0,0 @@
#!/bin/sh
#
# Copyright (c) 2015-2016, The Linux Foundation. All rights reserved.
#
# Permission to use, copy, modify, and/or distribute this software for any
# purpose with or without fee is hereby granted, provided that the above
# copyright notice and this permission notice appear in all copies.
#
# THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
# WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
# MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
# ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
# WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
# ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
# OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
#
ECM_MODULE=${1:-ecm_state}
MOUNT_ROOT=/dev/ecm
#
# usage: ecm_dump.sh [module=ecm_db]
#
# with no parameters, ecm_dump.sh will attempt to mount the
# ecm_db state file and cat its contents.
#
# example with a parameter: ecm_dump.sh ecm_classifier_default
#
# this will cause ecm_dump to attempt to find and mount the state
# file for the ecm_classifier_default module, and if successful
# cat the contents.
#
# this is one of the state files, which happens to be the
# last module started in ecm
ECM_STATE=/sys/kernel/debug/ecm/ecm_state/state_dev_major
# tests to see if ECM is up and ready to receive commands.
# returns 0 if ECM is fully up and ready, else 1
ecm_is_ready() {
if [ ! -e "${ECM_STATE}" ]
then
return 1
fi
return 0
}
#
# module_state_mount(module_name)
# Mounts the state file of the module, if supported
#
module_state_mount() {
local module_name=$1
local mount_dir=$2
local state_file="/sys/kernel/debug/ecm/${module_name}/state_dev_major"
if [ -e "${mount_dir}/${module_name}" ]
then
# already mounted
return 0
fi
#echo "Mount state file for $module_name ..."
if [ ! -e "$state_file" ]
then
#echo "... $module_name does not support state"
return 1
fi
local major="`cat $state_file`"
#echo "... Mounting state $state_file with major: $major"
mknod "${mount_dir}/${module_name}" c $major 0
}
#
# main
#
ecm_is_ready || {
#echo "ECM is not running"
exit 1
}
# all state files are mounted under MOUNT_ROOT, so make sure it exists
mkdir -p ${MOUNT_ROOT}
#
# attempt to mount state files for the requested module and cat it
# if the mount succeeded
#
module_state_mount ${ECM_MODULE} ${MOUNT_ROOT} && {
cat ${MOUNT_ROOT}/${ECM_MODULE}
exit 0
}
exit 2

6
qca/qca-nss-ecm/files/on-demand-down
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@ -1,6 +0,0 @@
#!/bin/sh
# Copyright (c) 2016 The Linux Foundation. All rights reserved.
[ -e "/sys/kernel/debug/ecm/ecm_db/defunct_all" ] && {
echo 1 > /sys/kernel/debug/ecm/ecm_db/defunct_all
}

28
qca/qca-nss-ecm/files/qca-nss-ecm.defaults
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@ -1,28 +0,0 @@
#!/bin/sh
#
# Copyright (c) 2015-2016, The Linux Foundation. All rights reserved.
#
# Permission to use, copy, modify, and/or distribute this software for any
# purpose with or without fee is hereby granted, provided that the above
# copyright notice and this permission notice appear in all copies.
#
# THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
# WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
# MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
# ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
# WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
# ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
# OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
#
uci -q batch << EOF
delete firewall.qcanssecm
set firewall.qcanssecm=include
set firewall.qcanssecm.type=script
set firewall.qcanssecm.path=/etc/firewall.d/qca-nss-ecm
set firewall.qcanssecm.family=any
set firewall.qcanssecm.reload=1
commit firewall
EOF
exit 0

18
qca/qca-nss-ecm/files/qca-nss-ecm.firewall
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@ -1,18 +0,0 @@
#!/bin/sh
#
# Copyright (c) 2015-2016, The Linux Foundation. All rights reserved.
#
# Permission to use, copy, modify, and/or distribute this software for any
# purpose with or without fee is hereby granted, provided that the above
# copyright notice and this permission notice appear in all copies.
#
# THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
# WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
# MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
# ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
# WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
# ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
# OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
#
iptables -A FORWARD -m physdev --physdev-is-bridged -j ACCEPT

142
qca/qca-nss-ecm/files/qca-nss-ecm.init
View file

@ -1,142 +0,0 @@
#!/bin/sh /etc/rc.common
#
# Copyright (c) 2014, 2019-2020 The Linux Foundation. All rights reserved.
#
# Permission to use, copy, modify, and/or distribute this software for any
# purpose with or without fee is hereby granted, provided that the above
# copyright notice and this permission notice appear in all copies.
#
# THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
# WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
# MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
# ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
# WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
# ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
# OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
# The shebang above has an extra space intentially to avoid having
# openwrt build scripts automatically enable this package starting
# at boot.
START=19
get_front_end_mode() {
config_load "ecm"
config_get front_end global acceleration_engine "auto"
case $front_end in
auto)
echo '0'
;;
nss)
echo '1'
;;
sfe)
echo '2'
;;
*)
echo 'uci_option_acceleration_engine is invalid'
esac
}
support_bridge() {
#NSS support bridge acceleration
[ -d /sys/kernel/debug/ecm/ecm_nss_ipv4 ] && return 0
#SFE doesn't support bridge acceleration
[ -d /sys/kernel/debug/ecm/ecm_sfe_ipv4 ] && return 1
}
load_sfe() {
local kernel_version=$(uname -r)
[ -e "/lib/modules/$kernel_version/shortcut-fe.ko" ] && {
[ -d /sys/module/shortcut_fe ] || insmod shortcut-fe
}
[ -e "/lib/modules/$kernel_version/shortcut-fe-ipv6.ko" ] && {
[ -d /sys/module/shortcut_fe_ipv6 ] || insmod shortcut-fe-ipv6
}
[ -e "/lib/modules/$kernel_version/shortcut-fe-drv.ko" ] && {
[ -d /sys/module/shortcut_fe_drv ] || insmod shortcut-fe-drv
}
}
load_ecm() {
[ -d /sys/module/ecm ] || {
[ ! -e /proc/device-tree/MP_256 ] && load_sfe
insmod ecm front_end_selection=$(get_front_end_mode)
}
support_bridge && {
sysctl -w net.bridge.bridge-nf-call-ip6tables=1
sysctl -w net.bridge.bridge-nf-call-iptables=1
}
}
unload_ecm() {
sysctl -w net.bridge.bridge-nf-call-ip6tables=0
sysctl -w net.bridge.bridge-nf-call-iptables=0
if [ -d /sys/module/ecm ]; then
#
# Stop ECM frontends
#
echo 1 > /sys/kernel/debug/ecm/front_end_ipv4_stop
echo 1 > /sys/kernel/debug/ecm/front_end_ipv6_stop
#
# Defunct the connections
#
echo 1 > /sys/kernel/debug/ecm/ecm_db/defunct_all
sleep 5;
rmmod ecm
sleep 1
fi
}
start() {
# If SFE CM is loaded, return.
if [ -d /sys/module/shortcut_fe_cm ]; then
echo "shortcut_fe CM is loaded, unload it first"
echo "cmd: /etc/init.d/shortcut_fe stop"
return
fi
load_ecm
# If the acceleration engine is NSS, enable wifi redirect.
[ -d /sys/kernel/debug/ecm/ecm_nss_ipv4 ] && sysctl -w dev.nss.general.redirect=1
support_bridge && {
if ([ -z "$(grep "net.bridge.bridge-nf-call-ip6tables=1" /etc/sysctl.d/qca-nss-ecm.conf)" ] && [ -z "$(grep "net.bridge.bridge-nf-call-iptables=1" /etc/sysctl.d/qca-nss-ecm.conf)" ]); then
echo 'net.bridge.bridge-nf-call-ip6tables=1' >> /etc/sysctl.d/qca-nss-ecm.conf
echo 'net.bridge.bridge-nf-call-iptables=1' >> /etc/sysctl.d/qca-nss-ecm.conf
fi
}
if [ -d /sys/module/qca_ovsmgr ]; then
insmod ecm_ovs
fi
}
stop() {
# If ECM is already not loaded, just return.
if [ ! -d /sys/module/ecm ]; then
return
fi
# If the acceleration engine is NSS, disable wifi redirect.
[ -d /sys/kernel/debug/ecm/ecm_nss_ipv4 ] && sysctl -w dev.nss.general.redirect=0
sed '/net.bridge.bridge-nf-call-ip6tables=1/d' -i /etc/sysctl.d/qca-nss-ecm.conf
sed '/net.bridge.bridge-nf-call-iptables=1/d' -i /etc/sysctl.d/qca-nss-ecm.conf
if [ -d /sys/module/ecm_ovs ]; then
rmmod ecm_ovs
fi
unload_ecm
}

2
qca/qca-nss-ecm/files/qca-nss-ecm.sysctl
View file

@ -1,2 +0,0 @@
# nf_conntrack_tcp_no_window_check is 0 by default, set it to 1
net.netfilter.nf_conntrack_tcp_no_window_check=1

2
qca/qca-nss-ecm/files/qca-nss-ecm.uci
View file

@ -1,2 +0,0 @@
config ecm 'global'
option acceleration_engine 'auto'

335
qca/qca-nss-ecm/patches/001-treewide-componentize-the-module-even-more.patch
View file

@ -1,335 +0,0 @@
From 73345c87b28a473b35b57e673f8de963c3d73da1 Mon Sep 17 00:00:00 2001
From: Ansuel Smith <ansuelsmth@gmail.com>
Date: Wed, 19 May 2021 02:38:53 +0200
Subject: [PATCH] treewide: componentize the module even more
Signed-off-by: Ansuel Smith <ansuelsmth@gmail.com>
---
Makefile | 56 +++++++++++++++++++++++++-------
ecm_db/ecm_db_connection.c | 8 +++++
ecm_db/ecm_db_node.c | 4 +++
ecm_interface.c | 8 +++++
frontends/ecm_front_end_common.c | 7 ++++
5 files changed, 72 insertions(+), 11 deletions(-)
--- a/Makefile
+++ b/Makefile
@@ -82,10 +82,18 @@ ccflags-$(ECM_INTERFACE_BOND_ENABLE) +=
# Define ECM_INTERFACE_PPPOE_ENABLE=y in order
# to enable support for PPPoE acceleration.
# #############################################################################
-ECM_INTERFACE_PPPOE_ENABLE=y
+ifndef $(ECM_INTERFACE_PPPOE_ENABLE)
+ ECM_INTERFACE_PPPOE_ENABLE=y
+endif
ccflags-$(ECM_INTERFACE_PPPOE_ENABLE) += -DECM_INTERFACE_PPPOE_ENABLE
# #############################################################################
+# Define ECM_INTERFACE_L2TPV2_PPTP_ENABLE=y in order
+# to enable support for l2tpv2 or PPTP detection.
+# #############################################################################
+ccflags-$(ECM_INTERFACE_L2TPV2_PPTP_ENABLE) += -DECM_INTERFACE_L2TPV2_PPTP_ENABLE
+
+# #############################################################################
# Define ECM_INTERFACE_L2TPV2_ENABLE=y in order
# to enable support for l2tpv2 acceleration.
# #############################################################################
@@ -118,6 +126,12 @@ ccflags-$(ECM_INTERFACE_PPP_ENABLE) += -
ccflags-$(ECM_INTERFACE_MAP_T_ENABLE) += -DECM_INTERFACE_MAP_T_ENABLE
# #############################################################################
+# Define ECM_INTERFACE_GRE_ENABLE=y in order
+# to enable support for GRE detection.
+# #############################################################################
+ccflags-$(ECM_INTERFACE_GRE_ENABLE) += -DECM_INTERFACE_GRE_ENABLE
+
+# #############################################################################
# Define ECM_INTERFACE_GRE_TAP_ENABLE=y in order
# to enable support for GRE TAP interface.
# #############################################################################
@@ -186,7 +200,9 @@ ccflags-$(ECM_INTERFACE_OVS_BRIDGE_ENABL
# #############################################################################
# Define ECM_INTERFACE_VLAN_ENABLE=y in order to enable support for VLAN
# #############################################################################
-ECM_INTERFACE_VLAN_ENABLE=y
+ifndef $(ECM_INTERFACE_VLAN_ENABLE)
+ ECM_INTERFACE_VLAN_ENABLE=y
+endif
ccflags-$(ECM_INTERFACE_VLAN_ENABLE) += -DECM_INTERFACE_VLAN_ENABLE
# #############################################################################
@@ -228,7 +244,9 @@ ccflags-$(ECM_CLASSIFIER_OVS_ENABLE) +=
# #############################################################################
# Define ECM_CLASSIFIER_MARK_ENABLE=y in order to enable mark classifier.
# #############################################################################
-ECM_CLASSIFIER_MARK_ENABLE=y
+ifndef $(ECM_CLASSIFIER_MARK_ENABLE)
+ ECM_CLASSIFIER_MARK_ENABLE=y
+endif
ecm-$(ECM_CLASSIFIER_MARK_ENABLE) += ecm_classifier_mark.o
ccflags-$(ECM_CLASSIFIER_MARK_ENABLE) += -DECM_CLASSIFIER_MARK_ENABLE
@@ -247,7 +265,9 @@ ccflags-$(ECM_CLASSIFIER_NL_ENABLE) += -
# #############################################################################
# Define ECM_CLASSIFIER_DSCP_ENABLE=y in order to enable DSCP classifier.
# #############################################################################
-ECM_CLASSIFIER_DSCP_ENABLE=y
+ifndef $(ECM_CLASSIFIER_DSCP_ENABLE)
+ ECM_CLASSIFIER_DSCP_ENABLE=y
+endif
ecm-$(ECM_CLASSIFIER_DSCP_ENABLE) += ecm_classifier_dscp.o
ccflags-$(ECM_CLASSIFIER_DSCP_ENABLE) += -DECM_CLASSIFIER_DSCP_ENABLE
ccflags-$(ECM_CLASSIFIER_DSCP_IGS) += -DECM_CLASSIFIER_DSCP_IGS
@@ -274,7 +294,9 @@ endif
# the Parental Controls subsystem classifier in ECM. Currently disabled until
# customers require it / if they need to integrate their Parental Controls with it.
# #############################################################################
-ECM_CLASSIFIER_PCC_ENABLE=y
+ifndef $(ECM_CLASSIFIER_PCC_ENABLE)
+ ECM_CLASSIFIER_PCC_ENABLE=y
+endif
ecm-$(ECM_CLASSIFIER_PCC_ENABLE) += ecm_classifier_pcc.o
ccflags-$(ECM_CLASSIFIER_PCC_ENABLE) += -DECM_CLASSIFIER_PCC_ENABLE
@@ -301,28 +323,36 @@ ccflags-$(ECM_NON_PORTED_SUPPORT_ENABLE)
# #############################################################################
# Define ECM_STATE_OUTPUT_ENABLE=y to support XML state output
# #############################################################################
-ECM_STATE_OUTPUT_ENABLE=y
+ifndef $(ECM_STATE_OUTPUT_ENABLE)
+ ECM_STATE_OUTPUT_ENABLE=y
+endif
ecm-$(ECM_STATE_OUTPUT_ENABLE) += ecm_state.o
ccflags-$(ECM_STATE_OUTPUT_ENABLE) += -DECM_STATE_OUTPUT_ENABLE
# #############################################################################
# Define ECM_DB_ADVANCED_STATS_ENABLE to support XML state output
# #############################################################################
-ECM_DB_ADVANCED_STATS_ENABLE=y
+ifndef $(ECM_DB_ADVANCED_STATS_ENABLE)
+ ECM_DB_ADVANCED_STATS_ENABLE=y
+endif
ccflags-$(ECM_DB_ADVANCED_STATS_ENABLE) += -DECM_DB_ADVANCED_STATS_ENABLE
# #############################################################################
# Define ECM_DB_CONNECTION_CROSS_REFERENCING_ENABLE=y in order to enable
# the database to track relationships between objects.
# #############################################################################
-ECM_DB_CONNECTION_CROSS_REFERENCING_ENABLE=y
+ifndef $(ECM_DB_CONNECTION_CROSS_REFERENCING_ENABLE)
+ ECM_DB_CONNECTION_CROSS_REFERENCING_ENABLE=y
+endif
ccflags-$(ECM_DB_CONNECTION_CROSS_REFERENCING_ENABLE) += -DECM_DB_XREF_ENABLE
# #############################################################################
# Define ECM_TRACKER_DPI_SUPPORT_ENABLE=y in order to enable support for
# deep packet inspection and tracking of data with the trackers.
# #############################################################################
-ECM_TRACKER_DPI_SUPPORT_ENABLE=y
+ifndef $(ECM_TRACKER_DPI_SUPPORT_ENABLE)
+ ECM_TRACKER_DPI_SUPPORT_ENABLE=y
+endif
ccflags-$(ECM_TRACKER_DPI_SUPPORT_ENABLE) += -DECM_TRACKER_DPI_SUPPORT_ENABLE
# #############################################################################
@@ -330,14 +360,18 @@ ccflags-$(ECM_TRACKER_DPI_SUPPORT_ENABLE
# support for the database keeping lists of connections that are assigned
# on a per TYPE of classifier basis.
# #############################################################################
-ECM_DB_CLASSIFIER_TYPE_ASSIGNMENTS_TRACK_ENABLE=y
+ifndef $(ECM_DB_CLASSIFIER_TYPE_ASSIGNMENTS_TRACK_ENABLE)
+ ECM_DB_CLASSIFIER_TYPE_ASSIGNMENTS_TRACK_ENABLE=y
+endif
ccflags-$(ECM_DB_CLASSIFIER_TYPE_ASSIGNMENTS_TRACK_ENABLE) += -DECM_DB_CTA_TRACK_ENABLE
# #############################################################################
# Define ECM_BAND_STEERING_ENABLE=y in order to enable
# band steering feature.
# #############################################################################
-ECM_BAND_STEERING_ENABLE=y
+ifndef $(ECM_BAND_STEERING_ENABLE)
+ ECM_BAND_STEERING_ENABLE=y
+endif
ccflags-$(ECM_BAND_STEERING_ENABLE) += -DECM_BAND_STEERING_ENABLE
# #############################################################################
--- a/ecm_db/ecm_db_connection.c
+++ b/ecm_db/ecm_db_connection.c
@@ -430,7 +430,9 @@ EXPORT_SYMBOL(ecm_db_connection_make_def
*/
void ecm_db_connection_data_totals_update(struct ecm_db_connection_instance *ci, bool is_from, uint64_t size, uint64_t packets)
{
+#ifdef ECM_DB_ADVANCED_STATS_ENABLE
int32_t i;
+#endif
DEBUG_CHECK_MAGIC(ci, ECM_DB_CONNECTION_INSTANCE_MAGIC, "%px: magic failed\n", ci);
@@ -529,7 +531,9 @@ EXPORT_SYMBOL(ecm_db_connection_data_tot
*/
void ecm_db_connection_data_totals_update_dropped(struct ecm_db_connection_instance *ci, bool is_from, uint64_t size, uint64_t packets)
{
+#ifdef ECM_DB_ADVANCED_STATS_ENABLE
int32_t i;
+#endif
DEBUG_CHECK_MAGIC(ci, ECM_DB_CONNECTION_INSTANCE_MAGIC, "%px: magic failed\n", ci);
@@ -1508,6 +1512,7 @@ void ecm_db_connection_defunct_all(void)
}
EXPORT_SYMBOL(ecm_db_connection_defunct_all);
+#ifdef ECM_INTERFACE_OVS_BRIDGE_ENABLE
/*
* ecm_db_connection_defunct_by_classifier()
* Make defunct based on masked fields
@@ -1667,6 +1672,7 @@ next_ci:
ECM_IP_ADDR_TO_OCTAL(dest_addr_mask), dest_port_mask, proto_mask, cnt);
}
}
+#endif
/*
* ecm_db_connection_defunct_by_port()
@@ -1956,6 +1962,7 @@ struct ecm_db_node_instance *ecm_db_conn
}
EXPORT_SYMBOL(ecm_db_connection_node_get_and_ref);
+#ifdef ECM_DB_XREF_ENABLE
/*
* ecm_db_connection_mapping_get_and_ref_next()
* Return reference to next connection in the mapping chain in the specified direction.
@@ -1997,6 +2004,7 @@ struct ecm_db_connection_instance *ecm_d
return nci;
}
EXPORT_SYMBOL(ecm_db_connection_iface_get_and_ref_next);
+#endif
/*
* ecm_db_connection_mapping_get_and_ref()
--- a/ecm_db/ecm_db_node.c
+++ b/ecm_db/ecm_db_node.c
@@ -224,9 +224,11 @@ EXPORT_SYMBOL(ecm_db_node_get_and_ref_ne
*/
int ecm_db_node_deref(struct ecm_db_node_instance *ni)
{
+#ifdef ECM_DB_XREF_ENABLE
#if (DEBUG_LEVEL >= 1)
int dir;
#endif
+#endif
DEBUG_CHECK_MAGIC(ni, ECM_DB_NODE_INSTANCE_MAGIC, "%px: magic failed\n", ni);
spin_lock_bh(&ecm_db_lock);
@@ -486,9 +488,11 @@ EXPORT_SYMBOL(ecm_db_node_iface_get_and_
void ecm_db_node_add(struct ecm_db_node_instance *ni, struct ecm_db_iface_instance *ii, uint8_t *address,
ecm_db_node_final_callback_t final, void *arg)
{
+#ifdef ECM_DB_XREF_ENABLE
#if (DEBUG_LEVEL >= 1)
int dir;
#endif
+#endif
ecm_db_node_hash_t hash_index;
struct ecm_db_listener_instance *li;
--- a/ecm_interface.c
+++ b/ecm_interface.c
@@ -1343,6 +1343,7 @@ struct neighbour *ecm_interface_ipv6_nei
*/
bool ecm_interface_is_pptp(struct sk_buff *skb, const struct net_device *out)
{
+#ifdef ECM_INTERFACE_PPTP_ENABLE
struct net_device *in;
/*
@@ -1367,6 +1368,7 @@ bool ecm_interface_is_pptp(struct sk_buf
}
dev_put(in);
+#endif
return false;
}
@@ -1379,6 +1381,7 @@ bool ecm_interface_is_pptp(struct sk_buf
*/
bool ecm_interface_is_l2tp_packet_by_version(struct sk_buff *skb, const struct net_device *out, int ver)
{
+#ifdef ECM_INTERFACE_L2TPV2_PPTP_ENABLE
uint32_t flag = 0;
struct net_device *in;
@@ -1411,6 +1414,7 @@ bool ecm_interface_is_l2tp_packet_by_ver
}
dev_put(in);
+#endif
return false;
}
@@ -1423,6 +1427,7 @@ bool ecm_interface_is_l2tp_packet_by_ver
*/
bool ecm_interface_is_l2tp_pptp(struct sk_buff *skb, const struct net_device *out)
{
+#ifdef ECM_INTERFACE_L2TPV2_PPTP_ENABLE
struct net_device *in;
/*
@@ -1445,6 +1450,7 @@ bool ecm_interface_is_l2tp_pptp(struct s
}
dev_put(in);
+#endif
return false;
}
@@ -6630,6 +6636,7 @@ static void ecm_interface_regenerate_con
return;
}
+#ifdef ECM_DB_XREF_ENABLE
for (dir = 0; dir < ECM_DB_OBJ_DIR_MAX; dir++) {
/*
* Re-generate all connections associated with this interface
@@ -6645,6 +6652,7 @@ static void ecm_interface_regenerate_con
ci[dir] = cin;
}
}
+#endif
#ifdef ECM_MULTICAST_ENABLE
/*
--- a/frontends/ecm_front_end_common.c
+++ b/frontends/ecm_front_end_common.c
@@ -106,6 +106,7 @@ bool ecm_front_end_gre_proto_is_accel_al
struct nf_conntrack_tuple *tuple,
int ip_version)
{
+#ifdef ECM_INTERFACE_GRE_ENABLE
struct net_device *dev;
struct gre_base_hdr *greh;
@@ -117,10 +118,12 @@ bool ecm_front_end_gre_proto_is_accel_al
/*
* Case 1: PPTP locally terminated
*/
+#ifdef ECM_INTERFACE_PPTP_ENABLE
if (ecm_interface_is_pptp(skb, outdev)) {
DEBUG_TRACE("%px: PPTP GRE locally terminated - allow acceleration\n", skb);
return true;
}
+#endif
/*
* Case 2: PPTP pass through
@@ -223,6 +226,10 @@ bool ecm_front_end_gre_proto_is_accel_al
*/
DEBUG_TRACE("%px: GRE IPv%d pass through - allow acceleration\n", skb, ip_version);
return true;
+#else
+ DEBUG_TRACE("%px: GRE%d feature is disabled - do not allow acceleration\n", skb, ip_version);
+ return false;
+#endif
}
#ifdef ECM_CLASSIFIER_DSCP_ENABLE

831
qca/qca-nss-ecm/patches/100-kernel-5.10-support.patch
View file

@ -1,831 +0,0 @@
From e8b642c23af9146c973e828a7f4e0fb56cfc8d0b Mon Sep 17 00:00:00 2001
From: Ansuel Smith <ansuelsmth@gmail.com>
Date: Sat, 15 May 2021 03:51:14 +0200
Subject: [PATCH] add support for kernel 5.10
Signed-off-by: Ansuel Smith <ansuelsmth@gmail.com>
---
ecm_classifier_default.c | 24 +++---------
ecm_classifier_dscp.c | 8 +---
ecm_classifier_emesh.c | 16 ++------
ecm_classifier_hyfi.c | 7 +---
ecm_classifier_mark.c | 8 +---
ecm_classifier_ovs.c | 8 +---
ecm_classifier_pcc.c | 8 +---
ecm_conntrack_notifier.c | 8 +---
ecm_db/ecm_db_connection.c | 7 +---
ecm_db/ecm_db_host.c | 7 +---
ecm_db/ecm_db_iface.c | 7 +---
ecm_db/ecm_db_mapping.c | 7 +---
ecm_db/ecm_db_node.c | 7 +---
ecm_interface.c | 4 +-
ecm_state.c | 14 ++-----
frontends/ecm_front_end_common.c | 4 +-
frontends/ecm_front_end_ipv4.c | 7 +---
frontends/ecm_front_end_ipv6.c | 7 +---
frontends/nss/ecm_nss_bond_notifier.c | 8 +---
frontends/nss/ecm_nss_ipv4.c | 49 +++++++------------------
frontends/nss/ecm_nss_ipv6.c | 49 +++++++------------------
frontends/nss/ecm_nss_multicast_ipv4.c | 7 +---
frontends/nss/ecm_nss_multicast_ipv6.c | 7 +---
frontends/nss/ecm_nss_non_ported_ipv4.c | 7 +---
frontends/nss/ecm_nss_non_ported_ipv6.c | 7 +---
frontends/nss/ecm_nss_ported_ipv4.c | 8 +---
frontends/nss/ecm_nss_ported_ipv6.c | 8 +---
frontends/sfe/ecm_sfe_ipv4.c | 49 +++++++------------------
frontends/sfe/ecm_sfe_ipv6.c | 49 +++++++------------------
frontends/sfe/ecm_sfe_non_ported_ipv4.c | 7 +---
frontends/sfe/ecm_sfe_non_ported_ipv6.c | 7 +---
frontends/sfe/ecm_sfe_ported_ipv4.c | 8 +---
frontends/sfe/ecm_sfe_ported_ipv6.c | 8 +---
33 files changed, 122 insertions(+), 314 deletions(-)
--- a/ecm_classifier_default.c
+++ b/ecm_classifier_default.c
@@ -776,26 +776,14 @@ int ecm_classifier_default_init(struct d
return -1;
}
- if (!debugfs_create_u32("enabled", S_IRUGO | S_IWUSR, ecm_classifier_default_dentry,
- (u32 *)&ecm_classifier_default_enabled)) {
- DEBUG_ERROR("Failed to create ecm deafult classifier enabled file in debugfs\n");
- debugfs_remove_recursive(ecm_classifier_default_dentry);
- return -1;
- }
+ debugfs_create_u32("enabled", S_IRUGO | S_IWUSR, ecm_classifier_default_dentry,
+ (u32 *)&ecm_classifier_default_enabled);
- if (!debugfs_create_u32("accel_mode", S_IRUGO | S_IWUSR, ecm_classifier_default_dentry,
- (u32 *)&ecm_classifier_default_accel_mode)) {
- DEBUG_ERROR("Failed to create ecm deafult classifier accel_mode file in debugfs\n");
- debugfs_remove_recursive(ecm_classifier_default_dentry);
- return -1;
- }
+ debugfs_create_u32("accel_mode", S_IRUGO | S_IWUSR, ecm_classifier_default_dentry,
+ (u32 *)&ecm_classifier_default_accel_mode);
- if (!debugfs_create_u32("accel_delay_pkts", S_IRUGO | S_IWUSR, ecm_classifier_default_dentry,
- (u32 *)&ecm_classifier_accel_delay_pkts)) {
- DEBUG_ERROR("Failed to create accel delay packet counts in debugfs\n");
- debugfs_remove_recursive(ecm_classifier_default_dentry);
- return -1;
- }
+ debugfs_create_u32("accel_delay_pkts", S_IRUGO | S_IWUSR, ecm_classifier_default_dentry,
+ (u32 *)&ecm_classifier_accel_delay_pkts);
return 0;
}
--- a/ecm_classifier_dscp.c
+++ b/ecm_classifier_dscp.c
@@ -747,12 +747,8 @@ int ecm_classifier_dscp_init(struct dent
return -1;
}
- if (!debugfs_create_u32("enabled", S_IRUGO | S_IWUSR, ecm_classifier_dscp_dentry,
- (u32 *)&ecm_classifier_dscp_enabled)) {
- DEBUG_ERROR("Failed to create dscp enabled file in debugfs\n");
- debugfs_remove_recursive(ecm_classifier_dscp_dentry);
- return -1;
- }
+ debugfs_create_u32("enabled", S_IRUGO | S_IWUSR, ecm_classifier_dscp_dentry,
+ (u32 *)&ecm_classifier_dscp_enabled);
return 0;
}
--- a/ecm_classifier_emesh.c
+++ b/ecm_classifier_emesh.c
@@ -974,19 +974,11 @@ int ecm_classifier_emesh_init(struct den
return -1;
}
- if (!debugfs_create_u32("enabled", S_IRUGO | S_IWUSR, ecm_classifier_emesh_dentry,
- (u32 *)&ecm_classifier_emesh_enabled)) {
- DEBUG_ERROR("Failed to create ecm emesh classifier enabled file in debugfs\n");
- debugfs_remove_recursive(ecm_classifier_emesh_dentry);
- return -1;
- }
+ debugfs_create_u32("enabled", S_IRUGO | S_IWUSR, ecm_classifier_emesh_dentry,
+ (u32 *)&ecm_classifier_emesh_enabled);
- if (!debugfs_create_u32("latency_config_enabled", S_IRUGO | S_IWUSR, ecm_classifier_emesh_dentry,
- (u32 *)&ecm_classifier_emesh_latency_config_enabled)) {
- DEBUG_ERROR("Failed to create ecm emesh classifier latency config enabled file in debugfs\n");
- debugfs_remove_recursive(ecm_classifier_emesh_dentry);
- return -1;
- }
+ debugfs_create_u32("latency_config_enabled", S_IRUGO | S_IWUSR, ecm_classifier_emesh_dentry,
+ (u32 *)&ecm_classifier_emesh_latency_config_enabled);
/*
* Register for service prioritization notification update.
--- a/ecm_classifier_hyfi.c
+++ b/ecm_classifier_hyfi.c
@@ -1099,11 +1099,8 @@ int ecm_classifier_hyfi_rules_init(struc
goto classifier_task_cleanup;
}
- if (!debugfs_create_u32("enabled", S_IRUGO | S_IWUSR, ecm_classifier_hyfi_dentry,
- (u32 *)&ecm_classifier_hyfi_enabled)) {
- DEBUG_ERROR("Failed to create ecm hyfi classifier enabled file in debugfs\n");
- goto classifier_task_cleanup;
- }
+ debugfs_create_u32("enabled", S_IRUGO | S_IWUSR, ecm_classifier_hyfi_dentry,
+ (u32 *)&ecm_classifier_hyfi_enabled);
if (!debugfs_create_file("cmd", S_IWUSR, ecm_classifier_hyfi_dentry,
NULL, &ecm_classifier_hyfi_cmd_fops)) {
--- a/ecm_classifier_mark.c
+++ b/ecm_classifier_mark.c
@@ -753,12 +753,8 @@ int ecm_classifier_mark_init(struct dent
return -1;
}
- if (!debugfs_create_u32("enabled", S_IRUGO | S_IWUSR, ecm_classifier_mark_dentry,
- (u32 *)&ecm_classifier_mark_enabled)) {
- DEBUG_ERROR("Failed to create mark enabled file in debugfs\n");
- debugfs_remove_recursive(ecm_classifier_mark_dentry);
- return -1;
- }
+ debugfs_create_u32("enabled", S_IRUGO | S_IWUSR, ecm_classifier_mark_dentry,
+ (u32 *)&ecm_classifier_mark_enabled);
return 0;
}
--- a/ecm_classifier_ovs.c
+++ b/ecm_classifier_ovs.c
@@ -2200,12 +2200,8 @@ int ecm_classifier_ovs_init(struct dentr
return -1;
}
- if (!debugfs_create_u32("enabled", S_IRUGO | S_IWUSR, ecm_classifier_ovs_dentry,
- (u32 *)&ecm_classifier_ovs_enabled)) {
- DEBUG_ERROR("Failed to create ovs enabled file in debugfs\n");
- debugfs_remove_recursive(ecm_classifier_ovs_dentry);
- return -1;
- }
+ debugfs_create_u32("enabled", S_IRUGO | S_IWUSR, ecm_classifier_ovs_dentry,
+ (u32 *)&ecm_classifier_ovs_enabled);
return 0;
}
--- a/ecm_classifier_pcc.c
+++ b/ecm_classifier_pcc.c
@@ -1308,12 +1308,8 @@ int ecm_classifier_pcc_init(struct dentr
return -1;
}
- if (!debugfs_create_u32("enabled", S_IRUGO, ecm_classifier_pcc_dentry,
- (u32 *)&ecm_classifier_pcc_enabled)) {
- DEBUG_ERROR("Failed to create pcc enabled file in debugfs\n");
- debugfs_remove_recursive(ecm_classifier_pcc_dentry);
- return -1;
- }
+ debugfs_create_u32("enabled", S_IRUGO, ecm_classifier_pcc_dentry,
+ (u32 *)&ecm_classifier_pcc_enabled);
return 0;
}
--- a/ecm_conntrack_notifier.c
+++ b/ecm_conntrack_notifier.c
@@ -414,12 +414,8 @@ int ecm_conntrack_notifier_init(struct d
return -1;
}
- if (!debugfs_create_u32("stop", S_IRUGO | S_IWUSR, ecm_conntrack_notifier_dentry,
- (u32 *)&ecm_conntrack_notifier_stopped)) {
- DEBUG_ERROR("Failed to create ecm conntrack notifier stopped file in debugfs\n");
- debugfs_remove_recursive(ecm_conntrack_notifier_dentry);
- return -1;
- }
+ debugfs_create_u32("stop", S_IRUGO | S_IWUSR, ecm_conntrack_notifier_dentry,
+ (u32 *)&ecm_conntrack_notifier_stopped);
#ifdef CONFIG_NF_CONNTRACK_EVENTS
/*
--- a/ecm_db/ecm_db_connection.c
+++ b/ecm_db/ecm_db_connection.c
@@ -3642,11 +3642,8 @@ static struct file_operations ecm_db_con
*/
bool ecm_db_connection_init(struct dentry *dentry)
{
- if (!debugfs_create_u32("connection_count", S_IRUGO, dentry,
- (u32 *)&ecm_db_connection_count)) {
- DEBUG_ERROR("Failed to create ecm db connection count file in debugfs\n");
- return false;
- }
+ debugfs_create_u32("connection_count", S_IRUGO, dentry,
+ (u32 *)&ecm_db_connection_count);
if (!debugfs_create_file("connection_count_simple", S_IRUGO, dentry,
NULL, &ecm_db_connection_count_simple_fops)) {
--- a/ecm_db/ecm_db_host.c
+++ b/ecm_db/ecm_db_host.c
@@ -770,11 +770,8 @@ EXPORT_SYMBOL(ecm_db_host_alloc);
bool ecm_db_host_init(struct dentry *dentry)
{
- if (!debugfs_create_u32("host_count", S_IRUGO, dentry,
- (u32 *)&ecm_db_host_count)) {
- DEBUG_ERROR("Failed to create ecm db host count file in debugfs\n");
- return false;;
- }
+ debugfs_create_u32("host_count", S_IRUGO, dentry,
+ (u32 *)&ecm_db_host_count);
ecm_db_host_table = vzalloc(sizeof(struct ecm_db_host_instance *) * ECM_DB_HOST_HASH_SLOTS);
if (!ecm_db_host_table) {
--- a/ecm_db/ecm_db_iface.c
+++ b/ecm_db/ecm_db_iface.c
@@ -3670,11 +3670,8 @@ EXPORT_SYMBOL(ecm_db_iface_alloc);
*/
bool ecm_db_iface_init(struct dentry *dentry)
{
- if (!debugfs_create_u32("iface_count", S_IRUGO, dentry,
- (u32 *)&ecm_db_iface_count)) {
- DEBUG_ERROR("Failed to create ecm db iface count file in debugfs\n");
- return false;
- }
+ debugfs_create_u32("iface_count", S_IRUGO, dentry,
+ (u32 *)&ecm_db_iface_count);
return true;
}
--- a/ecm_db/ecm_db_mapping.c
+++ b/ecm_db/ecm_db_mapping.c
@@ -806,11 +806,8 @@ EXPORT_SYMBOL(ecm_db_mapping_alloc);
*/
bool ecm_db_mapping_init(struct dentry *dentry)
{
- if (!debugfs_create_u32("mapping_count", S_IRUGO, dentry,
- (u32 *)&ecm_db_mapping_count)) {
- DEBUG_ERROR("Failed to create ecm db mapping count file in debugfs\n");
- return false;
- }
+ debugfs_create_u32("mapping_count", S_IRUGO, dentry,
+ (u32 *)&ecm_db_mapping_count);
ecm_db_mapping_table = vzalloc(sizeof(struct ecm_db_mapping_instance *) * ECM_DB_MAPPING_HASH_SLOTS);
if (!ecm_db_mapping_table) {
--- a/ecm_db/ecm_db_node.c
+++ b/ecm_db/ecm_db_node.c
@@ -1187,11 +1187,8 @@ keep_sni_conn:
*/
bool ecm_db_node_init(struct dentry *dentry)
{
- if (!debugfs_create_u32("node_count", S_IRUGO, dentry,
- (u32 *)&ecm_db_node_count)) {
- DEBUG_ERROR("Failed to create ecm db node count file in debugfs\n");
- return false;
- }
+ debugfs_create_u32("node_count", S_IRUGO, dentry,
+ (u32 *)&ecm_db_node_count);
ecm_db_node_table = vzalloc(sizeof(struct ecm_db_node_instance *) * ECM_DB_NODE_HASH_SLOTS);
if (!ecm_db_node_table) {
--- a/ecm_interface.c
+++ b/ecm_interface.c
@@ -332,7 +332,7 @@ static struct net_device *ecm_interface_
struct net_device *dev;
ECM_IP_ADDR_TO_NIN6_ADDR(addr6, addr);
- dev = (struct net_device *)ipv6_dev_find(&init_net, &addr6, 1);
+ dev = (struct net_device *)ipv6_dev_find_and_hold(&init_net, &addr6, 1);
return dev;
}
#endif
@@ -734,7 +734,7 @@ static bool ecm_interface_mac_addr_get_i
* Get the MAC address that corresponds to IP address given.
*/
ECM_IP_ADDR_TO_NIN6_ADDR(daddr, addr);
- local_dev = ipv6_dev_find(&init_net, &daddr, 1);
+ local_dev = ipv6_dev_find_and_hold(&init_net, &daddr, 1);
if (local_dev) {
DEBUG_TRACE("%pi6 is a local address\n", &daddr);
memcpy(mac_addr, dev->dev_addr, ETH_ALEN);
--- a/ecm_state.c
+++ b/ecm_state.c
@@ -899,17 +899,11 @@ int ecm_state_init(struct dentry *dentry
return -1;
}
- if (!debugfs_create_u32("state_dev_major", S_IRUGO, ecm_state_dentry,
- (u32 *)&ecm_state_dev_major_id)) {
- DEBUG_ERROR("Failed to create ecm state dev major file in debugfs\n");
- goto init_cleanup;
- }
+ debugfs_create_u32("state_dev_major", S_IRUGO, ecm_state_dentry,
+ (u32 *)&ecm_state_dev_major_id);
- if (!debugfs_create_u32("state_file_output_mask", S_IRUGO | S_IWUSR, ecm_state_dentry,
- (u32 *)&ecm_state_file_output_mask)) {
- DEBUG_ERROR("Failed to create ecm state output mask file in debugfs\n");
- goto init_cleanup;
- }
+ debugfs_create_u32("state_file_output_mask", S_IRUGO | S_IWUSR, ecm_state_dentry,
+ (u32 *)&ecm_state_file_output_mask);
/*
* Register a char device that we will use to provide a dump of our state
--- a/frontends/ecm_front_end_common.c
+++ b/frontends/ecm_front_end_common.c
@@ -192,7 +192,7 @@ bool ecm_front_end_gre_proto_is_accel_al
return false;
}
} else {
- dev = ipv6_dev_find(&init_net, &(tuple->src.u3.in6), 1);
+ dev = ipv6_dev_find_and_hold(&init_net, &(tuple->src.u3.in6), 1);
if (dev) {
/*
* Source IP address is local
@@ -202,7 +202,7 @@ bool ecm_front_end_gre_proto_is_accel_al
return false;
}
- dev = ipv6_dev_find(&init_net, &(tuple->dst.u3.in6), 1);
+ dev = ipv6_dev_find_and_hold(&init_net, &(tuple->dst.u3.in6), 1);
if (dev) {
/*
* Destination IP address is local
--- a/frontends/ecm_front_end_ipv4.c
+++ b/frontends/ecm_front_end_ipv4.c
@@ -376,11 +376,8 @@ void ecm_front_end_ipv4_stop(int num)
*/
int ecm_front_end_ipv4_init(struct dentry *dentry)
{
- if (!debugfs_create_u32("front_end_ipv4_stop", S_IRUGO | S_IWUSR, dentry,
- (u32 *)&ecm_front_end_ipv4_stopped)) {
- DEBUG_ERROR("Failed to create ecm front end ipv4 stop file in debugfs\n");
- return -1;
- }
+ debugfs_create_u32("front_end_ipv4_stop", S_IRUGO | S_IWUSR, dentry,
+ (u32 *)&ecm_front_end_ipv4_stopped);
switch (ecm_front_end_type_get()) {
case ECM_FRONT_END_TYPE_NSS:
--- a/frontends/ecm_front_end_ipv6.c
+++ b/frontends/ecm_front_end_ipv6.c
@@ -255,11 +255,8 @@ void ecm_front_end_ipv6_stop(int num)
*/
int ecm_front_end_ipv6_init(struct dentry *dentry)
{
- if (!debugfs_create_u32("front_end_ipv6_stop", S_IRUGO | S_IWUSR, dentry,
- (u32 *)&ecm_front_end_ipv6_stopped)) {
- DEBUG_ERROR("Failed to create ecm front end ipv6 stop file in debugfs\n");
- return -1;
- }
+ debugfs_create_u32("front_end_ipv6_stop", S_IRUGO | S_IWUSR, dentry,
+ (u32 *)&ecm_front_end_ipv6_stopped);
switch (ecm_front_end_type_get()) {
case ECM_FRONT_END_TYPE_NSS:
--- a/frontends/nss/ecm_nss_bond_notifier.c
+++ b/frontends/nss/ecm_nss_bond_notifier.c
@@ -240,12 +240,8 @@ int ecm_nss_bond_notifier_init(struct de
return -1;
}
- if (!debugfs_create_u32("stop", S_IRUGO | S_IWUSR, ecm_nss_bond_notifier_dentry,
- (u32 *)&ecm_nss_bond_notifier_stopped)) {
- DEBUG_ERROR("Failed to create ecm bond notifier stopped file in debugfs\n");
- debugfs_remove_recursive(ecm_nss_bond_notifier_dentry);
- return -1;
- }
+ debugfs_create_u32("stop", S_IRUGO | S_IWUSR, ecm_nss_bond_notifier_dentry,
+ (u32 *)&ecm_nss_bond_notifier_stopped);
/*
* Register Link Aggregation callbacks with the bonding driver
--- a/frontends/nss/ecm_nss_ipv4.c
+++ b/frontends/nss/ecm_nss_ipv4.c
@@ -2802,41 +2802,23 @@ int ecm_nss_ipv4_init(struct dentry *den
return result;
}
- if (!debugfs_create_u32("no_action_limit_default", S_IRUGO | S_IWUSR, ecm_nss_ipv4_dentry,
- (u32 *)&ecm_nss_ipv4_no_action_limit_default)) {
- DEBUG_ERROR("Failed to create ecm nss ipv4 no_action_limit_default file in debugfs\n");
- goto task_cleanup;
- }
+ debugfs_create_u32("no_action_limit_default", S_IRUGO | S_IWUSR, ecm_nss_ipv4_dentry,
+ (u32 *)&ecm_nss_ipv4_no_action_limit_default);
- if (!debugfs_create_u32("driver_fail_limit_default", S_IRUGO | S_IWUSR, ecm_nss_ipv4_dentry,
- (u32 *)&ecm_nss_ipv4_driver_fail_limit_default)) {
- DEBUG_ERROR("Failed to create ecm nss ipv4 driver_fail_limit_default file in debugfs\n");
- goto task_cleanup;
- }
+ debugfs_create_u32("driver_fail_limit_default", S_IRUGO | S_IWUSR, ecm_nss_ipv4_dentry,
+ (u32 *)&ecm_nss_ipv4_driver_fail_limit_default);
- if (!debugfs_create_u32("nack_limit_default", S_IRUGO | S_IWUSR, ecm_nss_ipv4_dentry,
- (u32 *)&ecm_nss_ipv4_nack_limit_default)) {
- DEBUG_ERROR("Failed to create ecm nss ipv4 nack_limit_default file in debugfs\n");
- goto task_cleanup;
- }
+ debugfs_create_u32("nack_limit_default", S_IRUGO | S_IWUSR, ecm_nss_ipv4_dentry,
+ (u32 *)&ecm_nss_ipv4_nack_limit_default);
- if (!debugfs_create_u32("accelerated_count", S_IRUGO, ecm_nss_ipv4_dentry,
- (u32 *)&ecm_nss_ipv4_accelerated_count)) {
- DEBUG_ERROR("Failed to create ecm nss ipv4 accelerated_count file in debugfs\n");
- goto task_cleanup;
- }
+ debugfs_create_u32("accelerated_count", S_IRUGO, ecm_nss_ipv4_dentry,
+ (u32 *)&ecm_nss_ipv4_accelerated_count);
- if (!debugfs_create_u32("pending_accel_count", S_IRUGO, ecm_nss_ipv4_dentry,
- (u32 *)&ecm_nss_ipv4_pending_accel_count)) {
- DEBUG_ERROR("Failed to create ecm nss ipv4 pending_accel_count file in debugfs\n");
- goto task_cleanup;
- }
+ debugfs_create_u32("pending_accel_count", S_IRUGO, ecm_nss_ipv4_dentry,
+ (u32 *)&ecm_nss_ipv4_pending_accel_count);
- if (!debugfs_create_u32("pending_decel_count", S_IRUGO, ecm_nss_ipv4_dentry,
- (u32 *)&ecm_nss_ipv4_pending_decel_count)) {
- DEBUG_ERROR("Failed to create ecm nss ipv4 pending_decel_count file in debugfs\n");
- goto task_cleanup;
- }
+ debugfs_create_u32("pending_decel_count", S_IRUGO, ecm_nss_ipv4_dentry,
+ (u32 *)&ecm_nss_ipv4_pending_decel_count);
if (!debugfs_create_file("accel_limit_mode", S_IRUGO | S_IWUSR, ecm_nss_ipv4_dentry,
NULL, &ecm_nss_ipv4_accel_limit_mode_fops)) {
@@ -2867,11 +2849,8 @@ int ecm_nss_ipv4_init(struct dentry *den
goto task_cleanup;
}
- if (!debugfs_create_u32("vlan_passthrough_set", S_IRUGO | S_IWUSR, ecm_nss_ipv4_dentry,
- (u32 *)&ecm_nss_ipv4_vlan_passthrough_enable)) {
- DEBUG_ERROR("Failed to create ecm nss ipv4 vlan passthrough file in debugfs\n");
- goto task_cleanup;
- }
+ debugfs_create_u32("vlan_passthrough_set", S_IRUGO | S_IWUSR, ecm_nss_ipv4_dentry,
+ (u32 *)&ecm_nss_ipv4_vlan_passthrough_enable);
#ifdef ECM_NON_PORTED_SUPPORT_ENABLE
if (!ecm_nss_non_ported_ipv4_debugfs_init(ecm_nss_ipv4_dentry)) {
--- a/frontends/nss/ecm_nss_ipv6.c
+++ b/frontends/nss/ecm_nss_ipv6.c
@@ -2542,41 +2542,23 @@ int ecm_nss_ipv6_init(struct dentry *den
return result;
}
- if (!debugfs_create_u32("no_action_limit_default", S_IRUGO | S_IWUSR, ecm_nss_ipv6_dentry,
- (u32 *)&ecm_nss_ipv6_no_action_limit_default)) {
- DEBUG_ERROR("Failed to create ecm nss ipv6 no_action_limit_default file in debugfs\n");
- goto task_cleanup;
- }
+ debugfs_create_u32("no_action_limit_default", S_IRUGO | S_IWUSR, ecm_nss_ipv6_dentry,
+ (u32 *)&ecm_nss_ipv6_no_action_limit_default);
- if (!debugfs_create_u32("driver_fail_limit_default", S_IRUGO | S_IWUSR, ecm_nss_ipv6_dentry,
- (u32 *)&ecm_nss_ipv6_driver_fail_limit_default)) {
- DEBUG_ERROR("Failed to create ecm nss ipv6 driver_fail_limit_default file in debugfs\n");
- goto task_cleanup;
- }
+ debugfs_create_u32("driver_fail_limit_default", S_IRUGO | S_IWUSR, ecm_nss_ipv6_dentry,
+ (u32 *)&ecm_nss_ipv6_driver_fail_limit_default);
- if (!debugfs_create_u32("nack_limit_default", S_IRUGO | S_IWUSR, ecm_nss_ipv6_dentry,
- (u32 *)&ecm_nss_ipv6_nack_limit_default)) {
- DEBUG_ERROR("Failed to create ecm nss ipv6 nack_limit_default file in debugfs\n");
- goto task_cleanup;
- }
+ debugfs_create_u32("nack_limit_default", S_IRUGO | S_IWUSR, ecm_nss_ipv6_dentry,
+ (u32 *)&ecm_nss_ipv6_nack_limit_default);
- if (!debugfs_create_u32("accelerated_count", S_IRUGO, ecm_nss_ipv6_dentry,
- (u32 *)&ecm_nss_ipv6_accelerated_count)) {
- DEBUG_ERROR("Failed to create ecm nss ipv6 accelerated_count file in debugfs\n");
- goto task_cleanup;
- }
+ debugfs_create_u32("accelerated_count", S_IRUGO, ecm_nss_ipv6_dentry,
+ (u32 *)&ecm_nss_ipv6_accelerated_count);
- if (!debugfs_create_u32("pending_accel_count", S_IRUGO, ecm_nss_ipv6_dentry,
- (u32 *)&ecm_nss_ipv6_pending_accel_count)) {
- DEBUG_ERROR("Failed to create ecm nss ipv6 pending_accel_count file in debugfs\n");
- goto task_cleanup;
- }
+ debugfs_create_u32("pending_accel_count", S_IRUGO, ecm_nss_ipv6_dentry,
+ (u32 *)&ecm_nss_ipv6_pending_accel_count);
- if (!debugfs_create_u32("pending_decel_count", S_IRUGO, ecm_nss_ipv6_dentry,
- (u32 *)&ecm_nss_ipv6_pending_decel_count)) {
- DEBUG_ERROR("Failed to create ecm nss ipv6 pending_decel_count file in debugfs\n");
- goto task_cleanup;
- }
+ debugfs_create_u32("pending_decel_count", S_IRUGO, ecm_nss_ipv6_dentry,
+ (u32 *)&ecm_nss_ipv6_pending_decel_count);
if (!debugfs_create_file("accel_limit_mode", S_IRUGO | S_IWUSR, ecm_nss_ipv6_dentry,
NULL, &ecm_nss_ipv6_accel_limit_mode_fops)) {
@@ -2607,11 +2589,8 @@ int ecm_nss_ipv6_init(struct dentry *den
goto task_cleanup;
}
- if (!debugfs_create_u32("vlan_passthrough_set", S_IRUGO | S_IWUSR, ecm_nss_ipv6_dentry,
- (u32 *)&ecm_nss_ipv6_vlan_passthrough_enable)) {
- DEBUG_ERROR("Failed to create ecm nss ipv6 vlan passthrough file in debugfs\n");
- goto task_cleanup;
- }
+ debugfs_create_u32("vlan_passthrough_set", S_IRUGO | S_IWUSR, ecm_nss_ipv6_dentry,
+ (u32 *)&ecm_nss_ipv6_vlan_passthrough_enable);
#ifdef ECM_NON_PORTED_SUPPORT_ENABLE
if (!ecm_nss_non_ported_ipv6_debugfs_init(ecm_nss_ipv6_dentry)) {
--- a/frontends/nss/ecm_nss_multicast_ipv4.c
+++ b/frontends/nss/ecm_nss_multicast_ipv4.c
@@ -4139,11 +4139,8 @@ void ecm_nss_multicast_ipv4_stop(int num
*/
int ecm_nss_multicast_ipv4_init(struct dentry *dentry)
{
- if (!debugfs_create_u32("ecm_nss_multicast_ipv4_stop", S_IRUGO | S_IWUSR, dentry,
- (u32 *)&ecm_front_end_ipv4_mc_stopped)) {
- DEBUG_ERROR("Failed to create ecm front end ipv4 mc stop file in debugfs\n");
- return -1;
- }
+ debugfs_create_u32("ecm_nss_multicast_ipv4_stop", S_IRUGO | S_IWUSR, dentry,
+ (u32 *)&ecm_front_end_ipv4_mc_stopped);
/*
* Register multicast update callback to MCS snooper
--- a/frontends/nss/ecm_nss_multicast_ipv6.c
+++ b/frontends/nss/ecm_nss_multicast_ipv6.c
@@ -3939,11 +3939,8 @@ void ecm_nss_multicast_ipv6_stop(int num
*/
int ecm_nss_multicast_ipv6_init(struct dentry *dentry)
{
- if (!debugfs_create_u32("ecm_nss_multicast_ipv6_stop", S_IRUGO | S_IWUSR, dentry,
- (u32 *)&ecm_front_end_ipv6_mc_stopped)) {
- DEBUG_ERROR("Failed to create ecm front end ipv6 mc stop file in debugfs\n");
- return -1;
- }
+ debugfs_create_u32("ecm_nss_multicast_ipv6_stop", S_IRUGO | S_IWUSR, dentry,
+ (u32 *)&ecm_front_end_ipv6_mc_stopped);
/*
* Register multicast update callback to MCS snooper
--- a/frontends/nss/ecm_nss_non_ported_ipv4.c
+++ b/frontends/nss/ecm_nss_non_ported_ipv4.c
@@ -2615,11 +2615,8 @@ done:
*/
bool ecm_nss_non_ported_ipv4_debugfs_init(struct dentry *dentry)
{
- if (!debugfs_create_u32("non_ported_accelerated_count", S_IRUGO, dentry,
- (u32 *)&ecm_nss_non_ported_ipv4_accelerated_count)) {
- DEBUG_ERROR("Failed to create ecm nss ipv4 non_ported_accelerated_count file in debugfs\n");
- return false;
- }
+ debugfs_create_u32("non_ported_accelerated_count", S_IRUGO, dentry,
+ (u32 *)&ecm_nss_non_ported_ipv4_accelerated_count);
return true;
}
--- a/frontends/nss/ecm_nss_non_ported_ipv6.c
+++ b/frontends/nss/ecm_nss_non_ported_ipv6.c
@@ -2329,11 +2329,8 @@ done:
*/
bool ecm_nss_non_ported_ipv6_debugfs_init(struct dentry *dentry)
{
- if (!debugfs_create_u32("non_ported_accelerated_count", S_IRUGO, dentry,
- (u32 *)&ecm_nss_non_ported_ipv6_accelerated_count)) {
- DEBUG_ERROR("Failed to create ecm nss ipv6 non_ported_accelerated_count file in debugfs\n");
- return false;
- }
+ debugfs_create_u32("non_ported_accelerated_count", S_IRUGO, dentry,
+ (u32 *)&ecm_nss_non_ported_ipv6_accelerated_count);
return true;
}
--- a/frontends/nss/ecm_nss_ported_ipv4.c
+++ b/frontends/nss/ecm_nss_ported_ipv4.c
@@ -2944,12 +2944,8 @@ bool ecm_nss_ported_ipv4_debugfs_init(st
return false;
}
- if (!debugfs_create_u32("tcp_accelerated_count", S_IRUGO, dentry,
- &ecm_nss_ported_ipv4_accelerated_count[ECM_NSS_PORTED_IPV4_PROTO_TCP])) {
- DEBUG_ERROR("Failed to create ecm nss ipv4 tcp_accelerated_count file in debugfs\n");
- debugfs_remove(udp_dentry);
- return false;
- }
+ debugfs_create_u32("tcp_accelerated_count", S_IRUGO, dentry,
+ &ecm_nss_ported_ipv4_accelerated_count[ECM_NSS_PORTED_IPV4_PROTO_TCP]);
return true;
}
--- a/frontends/nss/ecm_nss_ported_ipv6.c
+++ b/frontends/nss/ecm_nss_ported_ipv6.c
@@ -2732,12 +2732,8 @@ bool ecm_nss_ported_ipv6_debugfs_init(st
return false;
}
- if (!debugfs_create_u32("tcp_accelerated_count", S_IRUGO, dentry,
- &ecm_nss_ported_ipv6_accelerated_count[ECM_NSS_PORTED_IPV6_PROTO_TCP])) {
- DEBUG_ERROR("Failed to create ecm nss ipv6 tcp_accelerated_count file in debugfs\n");
- debugfs_remove(udp_dentry);
- return false;
- }
+ debugfs_create_u32("tcp_accelerated_count", S_IRUGO, dentry,
+ &ecm_nss_ported_ipv6_accelerated_count[ECM_NSS_PORTED_IPV6_PROTO_TCP]);
return true;
}
--- a/frontends/sfe/ecm_sfe_ipv4.c
+++ b/frontends/sfe/ecm_sfe_ipv4.c
@@ -1808,48 +1808,27 @@ int ecm_sfe_ipv4_init(struct dentry *den
}
#ifdef CONFIG_XFRM
- if (!debugfs_create_u32("reject_acceleration_for_ipsec", S_IRUGO | S_IWUSR, ecm_sfe_ipv4_dentry,
- (u32 *)&ecm_sfe_ipv4_reject_acceleration_for_ipsec)) {
- DEBUG_ERROR("Failed to create ecm sfe ipv4 reject_acceleration_for_ipsec file in debugfs\n");
- goto task_cleanup;
- }
+ debugfs_create_u32("reject_acceleration_for_ipsec", S_IRUGO | S_IWUSR, ecm_sfe_ipv4_dentry,
+ (u32 *)&ecm_sfe_ipv4_reject_acceleration_for_ipsec);
#endif
- if (!debugfs_create_u32("no_action_limit_default", S_IRUGO | S_IWUSR, ecm_sfe_ipv4_dentry,
- (u32 *)&ecm_sfe_ipv4_no_action_limit_default)) {
- DEBUG_ERROR("Failed to create ecm sfe ipv4 no_action_limit_default file in debugfs\n");
- goto task_cleanup;
- }
+ debugfs_create_u32("no_action_limit_default", S_IRUGO | S_IWUSR, ecm_sfe_ipv4_dentry,
+ (u32 *)&ecm_sfe_ipv4_no_action_limit_default);
- if (!debugfs_create_u32("driver_fail_limit_default", S_IRUGO | S_IWUSR, ecm_sfe_ipv4_dentry,
- (u32 *)&ecm_sfe_ipv4_driver_fail_limit_default)) {
- DEBUG_ERROR("Failed to create ecm sfe ipv4 driver_fail_limit_default file in debugfs\n");
- goto task_cleanup;
- }
+ debugfs_create_u32("driver_fail_limit_default", S_IRUGO | S_IWUSR, ecm_sfe_ipv4_dentry,
+ (u32 *)&ecm_sfe_ipv4_driver_fail_limit_default);
- if (!debugfs_create_u32("nack_limit_default", S_IRUGO | S_IWUSR, ecm_sfe_ipv4_dentry,
- (u32 *)&ecm_sfe_ipv4_nack_limit_default)) {
- DEBUG_ERROR("Failed to create ecm sfe ipv4 nack_limit_default file in debugfs\n");
- goto task_cleanup;
- }
+ debugfs_create_u32("nack_limit_default", S_IRUGO | S_IWUSR, ecm_sfe_ipv4_dentry,
+ (u32 *)&ecm_sfe_ipv4_nack_limit_default);
- if (!debugfs_create_u32("accelerated_count", S_IRUGO, ecm_sfe_ipv4_dentry,
- (u32 *)&ecm_sfe_ipv4_accelerated_count)) {
- DEBUG_ERROR("Failed to create ecm sfe ipv4 accelerated_count file in debugfs\n");
- goto task_cleanup;
- }
+ debugfs_create_u32("accelerated_count", S_IRUGO, ecm_sfe_ipv4_dentry,
+ (u32 *)&ecm_sfe_ipv4_accelerated_count);
- if (!debugfs_create_u32("pending_accel_count", S_IRUGO, ecm_sfe_ipv4_dentry,
- (u32 *)&ecm_sfe_ipv4_pending_accel_count)) {
- DEBUG_ERROR("Failed to create ecm sfe ipv4 pending_accel_count file in debugfs\n");
- goto task_cleanup;
- }
+ debugfs_create_u32("pending_accel_count", S_IRUGO, ecm_sfe_ipv4_dentry,
+ (u32 *)&ecm_sfe_ipv4_pending_accel_count);
- if (!debugfs_create_u32("pending_decel_count", S_IRUGO, ecm_sfe_ipv4_dentry,
- (u32 *)&ecm_sfe_ipv4_pending_decel_count)) {
- DEBUG_ERROR("Failed to create ecm sfe ipv4 pending_decel_count file in debugfs\n");
- goto task_cleanup;
- }
+ debugfs_create_u32("pending_decel_count", S_IRUGO, ecm_sfe_ipv4_dentry,
+ (u32 *)&ecm_sfe_ipv4_pending_decel_count);
if (!debugfs_create_file("accel_limit_mode", S_IRUGO | S_IWUSR, ecm_sfe_ipv4_dentry,
NULL, &ecm_sfe_ipv4_accel_limit_mode_fops)) {
--- a/frontends/sfe/ecm_sfe_ipv6.c
+++ b/frontends/sfe/ecm_sfe_ipv6.c
@@ -1532,48 +1532,27 @@ int ecm_sfe_ipv6_init(struct dentry *den
}
#ifdef CONFIG_XFRM
- if (!debugfs_create_u32("reject_acceleration_for_ipsec", S_IRUGO | S_IWUSR, ecm_sfe_ipv6_dentry,
- (u32 *)&ecm_sfe_ipv6_reject_acceleration_for_ipsec)) {
- DEBUG_ERROR("Failed to create ecm sfe ipv6 reject_acceleration_for_ipsec file in debugfs\n");
- goto task_cleanup;
- }
+ debugfs_create_u32("reject_acceleration_for_ipsec", S_IRUGO | S_IWUSR, ecm_sfe_ipv6_dentry,
+ (u32 *)&ecm_sfe_ipv6_reject_acceleration_for_ipsec);
#endif
- if (!debugfs_create_u32("no_action_limit_default", S_IRUGO | S_IWUSR, ecm_sfe_ipv6_dentry,
- (u32 *)&ecm_sfe_ipv6_no_action_limit_default)) {
- DEBUG_ERROR("Failed to create ecm sfe ipv6 no_action_limit_default file in debugfs\n");
- goto task_cleanup;
- }
+ debugfs_create_u32("no_action_limit_default", S_IRUGO | S_IWUSR, ecm_sfe_ipv6_dentry,
+ (u32 *)&ecm_sfe_ipv6_no_action_limit_default);
- if (!debugfs_create_u32("driver_fail_limit_default", S_IRUGO | S_IWUSR, ecm_sfe_ipv6_dentry,
- (u32 *)&ecm_sfe_ipv6_driver_fail_limit_default)) {
- DEBUG_ERROR("Failed to create ecm sfe ipv6 driver_fail_limit_default file in debugfs\n");
- goto task_cleanup;
- }
+ debugfs_create_u32("driver_fail_limit_default", S_IRUGO | S_IWUSR, ecm_sfe_ipv6_dentry,
+ (u32 *)&ecm_sfe_ipv6_driver_fail_limit_default);
- if (!debugfs_create_u32("nack_limit_default", S_IRUGO | S_IWUSR, ecm_sfe_ipv6_dentry,
- (u32 *)&ecm_sfe_ipv6_nack_limit_default)) {
- DEBUG_ERROR("Failed to create ecm sfe ipv6 nack_limit_default file in debugfs\n");
- goto task_cleanup;
- }
+ debugfs_create_u32("nack_limit_default", S_IRUGO | S_IWUSR, ecm_sfe_ipv6_dentry,
+ (u32 *)&ecm_sfe_ipv6_nack_limit_default);
- if (!debugfs_create_u32("accelerated_count", S_IRUGO, ecm_sfe_ipv6_dentry,
- (u32 *)&ecm_sfe_ipv6_accelerated_count)) {
- DEBUG_ERROR("Failed to create ecm sfe ipv6 accelerated_count file in debugfs\n");
- goto task_cleanup;
- }
+ debugfs_create_u32("accelerated_count", S_IRUGO, ecm_sfe_ipv6_dentry,
+ (u32 *)&ecm_sfe_ipv6_accelerated_count);
- if (!debugfs_create_u32("pending_accel_count", S_IRUGO, ecm_sfe_ipv6_dentry,
- (u32 *)&ecm_sfe_ipv6_pending_accel_count)) {
- DEBUG_ERROR("Failed to create ecm sfe ipv6 pending_accel_count file in debugfs\n");
- goto task_cleanup;
- }
+ debugfs_create_u32("pending_accel_count", S_IRUGO, ecm_sfe_ipv6_dentry,
+ (u32 *)&ecm_sfe_ipv6_pending_accel_count);
- if (!debugfs_create_u32("pending_decel_count", S_IRUGO, ecm_sfe_ipv6_dentry,
- (u32 *)&ecm_sfe_ipv6_pending_decel_count)) {
- DEBUG_ERROR("Failed to create ecm sfe ipv6 pending_decel_count file in debugfs\n");
- goto task_cleanup;
- }
+ debugfs_create_u32("pending_decel_count", S_IRUGO, ecm_sfe_ipv6_dentry,
+ (u32 *)&ecm_sfe_ipv6_pending_decel_count);
if (!debugfs_create_file("accel_limit_mode", S_IRUGO | S_IWUSR, ecm_sfe_ipv6_dentry,
NULL, &ecm_sfe_ipv6_accel_limit_mode_fops)) {
--- a/frontends/sfe/ecm_sfe_non_ported_ipv4.c
+++ b/frontends/sfe/ecm_sfe_non_ported_ipv4.c
@@ -2284,11 +2284,8 @@ done:
*/
bool ecm_sfe_non_ported_ipv4_debugfs_init(struct dentry *dentry)
{
- if (!debugfs_create_u32("non_ported_accelerated_count", S_IRUGO, dentry,
- (u32 *)&ecm_sfe_non_ported_ipv4_accelerated_count)) {
- DEBUG_ERROR("Failed to create ecm sfe ipv4 non_ported_accelerated_count file in debugfs\n");
- return false;
- }
+ debugfs_create_u32("non_ported_accelerated_count", S_IRUGO, dentry,
+ (u32 *)&ecm_sfe_non_ported_ipv4_accelerated_count);
return true;
}
--- a/frontends/sfe/ecm_sfe_non_ported_ipv6.c
+++ b/frontends/sfe/ecm_sfe_non_ported_ipv6.c
@@ -2083,11 +2083,8 @@ done:
*/
bool ecm_sfe_non_ported_ipv6_debugfs_init(struct dentry *dentry)
{
- if (!debugfs_create_u32("non_ported_accelerated_count", S_IRUGO, dentry,
- (u32 *)&ecm_sfe_non_ported_ipv6_accelerated_count)) {
- DEBUG_ERROR("Failed to create ecm sfe ipv6 non_ported_accelerated_count file in debugfs\n");
- return false;
- }
+ debugfs_create_u32("non_ported_accelerated_count", S_IRUGO, dentry,
+ (u32 *)&ecm_sfe_non_ported_ipv6_accelerated_count);
return true;
}
--- a/frontends/sfe/ecm_sfe_ported_ipv4.c
+++ b/frontends/sfe/ecm_sfe_ported_ipv4.c
@@ -2528,12 +2528,8 @@ bool ecm_sfe_ported_ipv4_debugfs_init(st
return false;
}
- if (!debugfs_create_u32("tcp_accelerated_count", S_IRUGO, dentry,
- &ecm_sfe_ported_ipv4_accelerated_count[ECM_SFE_PORTED_IPV4_PROTO_TCP])) {
- DEBUG_ERROR("Failed to create ecm sfe ipv4 tcp_accelerated_count file in debugfs\n");
- debugfs_remove(udp_dentry);
- return false;
- }
+ debugfs_create_u32("tcp_accelerated_count", S_IRUGO, dentry,
+ &ecm_sfe_ported_ipv4_accelerated_count[ECM_SFE_PORTED_IPV4_PROTO_TCP]);
return true;
}
--- a/frontends/sfe/ecm_sfe_ported_ipv6.c
+++ b/frontends/sfe/ecm_sfe_ported_ipv6.c
@@ -2374,12 +2374,8 @@ bool ecm_sfe_ported_ipv6_debugfs_init(st
return false;
}
- if (!debugfs_create_u32("tcp_accelerated_count", S_IRUGO, dentry,
- &ecm_sfe_ported_ipv6_accelerated_count[ECM_SFE_PORTED_IPV6_PROTO_TCP])) {
- DEBUG_ERROR("Failed to create ecm sfe ipv6 tcp_accelerated_count file in debugfs\n");
- debugfs_remove(udp_dentry);
- return false;
- }
+ debugfs_create_u32("tcp_accelerated_count", S_IRUGO, dentry,
+ &ecm_sfe_ported_ipv6_accelerated_count[ECM_SFE_PORTED_IPV6_PROTO_TCP]);
return true;
}

61
qca/qca-nss-ecm/patches/200-resolve-high-load.patch
View file

@ -1,61 +0,0 @@
From 6924b71ed809b37fffd74d6428a8ca83e5919746 Mon Sep 17 00:00:00 2001
From: Dirk Buchwalder <buchwalder@posteo.de>
Date: Sun, 27 Jun 2021 16:52:39 +0200
Subject: [PATCH] qca-nss-ecm: resolve the cpu high load regarding ecm
If using ECM, cpu load goes up (around 1.0) and stucks there.
This is due to using uninterruptible sleep function,
the patch changes this to interruptible sleep function.
Signed-off-by: Dirk Buchwalder <buchwalder@posteo.de>
---
frontends/nss/ecm_nss_ipv4.c | 4 ++--
frontends/nss/ecm_nss_ipv6.c | 4 ++--
2 files changed, 4 insertions(+), 4 deletions(-)
diff --git a/frontends/nss/ecm_nss_ipv4.c b/frontends/nss/ecm_nss_ipv4.c
index e00553c..94b39cd 100644
--- a/frontends/nss/ecm_nss_ipv4.c
+++ b/frontends/nss/ecm_nss_ipv4.c
@@ -2471,7 +2471,7 @@ static void ecm_nss_ipv4_stats_sync_req_work(struct work_struct *work)
}
spin_unlock_bh(&ecm_nss_ipv4_lock);
- usleep_range(ECM_NSS_IPV4_STATS_SYNC_UDELAY - 100, ECM_NSS_IPV4_STATS_SYNC_UDELAY);
+ msleep_interruptible(ECM_NSS_IPV4_STATS_SYNC_UDELAY / 1000);
/*
* If index is 0, we are starting a new round, but if we still have time remain
@@ -2485,7 +2485,7 @@ static void ecm_nss_ipv4_stats_sync_req_work(struct work_struct *work)
}
if (time_after(ecm_nss_ipv4_next_req_time, current_jiffies)) {
- msleep(jiffies_to_msecs(ecm_nss_ipv4_next_req_time - current_jiffies));
+ msleep_interruptible(jiffies_to_msecs(ecm_nss_ipv4_next_req_time - current_jiffies));
}
ecm_nss_ipv4_roll_check_jiffies = jiffies;
ecm_nss_ipv4_next_req_time = ecm_nss_ipv4_roll_check_jiffies + ECM_NSS_IPV4_STATS_SYNC_PERIOD;
diff --git a/frontends/nss/ecm_nss_ipv6.c b/frontends/nss/ecm_nss_ipv6.c
index 82e739f..30af050 100644
--- a/frontends/nss/ecm_nss_ipv6.c
+++ b/frontends/nss/ecm_nss_ipv6.c
@@ -2210,7 +2210,7 @@ static void ecm_nss_ipv6_stats_sync_req_work(struct work_struct *work)
}
spin_unlock_bh(&ecm_nss_ipv6_lock);
- usleep_range(ECM_NSS_IPV6_STATS_SYNC_UDELAY - 100, ECM_NSS_IPV6_STATS_SYNC_UDELAY);
+ msleep_interruptible(ECM_NSS_IPV6_STATS_SYNC_UDELAY / 1000);
/*
* If index is 0, we are starting a new round, but if we still have time remain
@@ -2224,7 +2224,7 @@ static void ecm_nss_ipv6_stats_sync_req_work(struct work_struct *work)
}
if (time_after(ecm_nss_ipv6_next_req_time, current_jiffies)) {
- msleep(jiffies_to_msecs(ecm_nss_ipv6_next_req_time - current_jiffies));
+ msleep_interruptible(jiffies_to_msecs(ecm_nss_ipv6_next_req_time - current_jiffies));
}
ecm_nss_ipv6_roll_check_jiffies = jiffies;
ecm_nss_ipv6_next_req_time = ecm_nss_ipv6_roll_check_jiffies + ECM_NSS_IPV6_STATS_SYNC_PERIOD;
--
2.31.1

25
qca/qca-nss-ecm/patches/203-rework-nfct-notification.patch
View file

@ -1,25 +0,0 @@
--- a/ecm_conntrack_notifier.c
+++ b/ecm_conntrack_notifier.c
@@ -421,7 +421,11 @@ int ecm_conntrack_notifier_init(struct d
/*
* Eventing subsystem is available so we register a notifier hook to get fast notifications of expired connections
*/
+#ifdef CONFIG_NF_CONNTRACK_CHAIN_EVENTS
+ result = nf_conntrack_register_chain_notifier(&init_net, &ecm_conntrack_notifier);
+#else
result = nf_conntrack_register_notifier(&init_net, &ecm_conntrack_notifier);
+#endif
if (result < 0) {
DEBUG_ERROR("Can't register nf notifier hook.\n");
debugfs_remove_recursive(ecm_conntrack_notifier_dentry);
@@ -439,7 +443,9 @@ EXPORT_SYMBOL(ecm_conntrack_notifier_ini
void ecm_conntrack_notifier_exit(void)
{
DEBUG_INFO("ECM Conntrack Notifier exit\n");
-#ifdef CONFIG_NF_CONNTRACK_EVENTS
+#ifdef CONFIG_NF_CONNTRACK_CHAIN_EVENTS
+ nf_conntrack_unregister_chain_notifier(&init_net, &ecm_conntrack_notifier);
+#else
nf_conntrack_unregister_notifier(&init_net, &ecm_conntrack_notifier);
#endif
/*

49
qca/qca-nss-ecm/patches/204-More-compile-fixes.patch
View file

@ -1,49 +0,0 @@
From e6d701c0d454d841366c556b2ef07a5203ffb35d Mon Sep 17 00:00:00 2001
From: Robert Marko <robimarko@gmail.com>
Date: Fri, 21 May 2021 21:41:31 +0200
Subject: [PATCH] More compile fixes
More runtime compile fixes.
Signed-off-by: Robert Marko <robimarko@gmail.com>
---
frontends/nss/ecm_nss_ported_ipv4.c | 12 +++---------
frontends/nss/ecm_nss_ported_ipv6.c | 12 +++---------
2 files changed, 6 insertions(+), 18 deletions(-)
--- a/frontends/nss/ecm_nss_ported_ipv4.c
+++ b/frontends/nss/ecm_nss_ported_ipv4.c
@@ -2935,14 +2935,8 @@ done:
*/
bool ecm_nss_ported_ipv4_debugfs_init(struct dentry *dentry)
{
- struct dentry *udp_dentry;
-
- udp_dentry = debugfs_create_u32("udp_accelerated_count", S_IRUGO, dentry,
+ debugfs_create_u32("udp_accelerated_count", S_IRUGO, dentry,
&ecm_nss_ported_ipv4_accelerated_count[ECM_NSS_PORTED_IPV4_PROTO_UDP]);
- if (!udp_dentry) {
- DEBUG_ERROR("Failed to create ecm nss ipv4 udp_accelerated_count file in debugfs\n");
- return false;
- }
debugfs_create_u32("tcp_accelerated_count", S_IRUGO, dentry,
&ecm_nss_ported_ipv4_accelerated_count[ECM_NSS_PORTED_IPV4_PROTO_TCP]);
--- a/frontends/nss/ecm_nss_ported_ipv6.c
+++ b/frontends/nss/ecm_nss_ported_ipv6.c
@@ -2723,14 +2723,8 @@ done:
*/
bool ecm_nss_ported_ipv6_debugfs_init(struct dentry *dentry)
{
- struct dentry *udp_dentry;
-
- udp_dentry = debugfs_create_u32("udp_accelerated_count", S_IRUGO, dentry,
+ debugfs_create_u32("udp_accelerated_count", S_IRUGO, dentry,
&ecm_nss_ported_ipv6_accelerated_count[ECM_NSS_PORTED_IPV6_PROTO_UDP]);
- if (!udp_dentry) {
- DEBUG_ERROR("Failed to create ecm nss ipv6 udp_accelerated_count file in debugfs\n");
- return false;
- }
debugfs_create_u32("tcp_accelerated_count", S_IRUGO, dentry,
&ecm_nss_ported_ipv6_accelerated_count[ECM_NSS_PORTED_IPV6_PROTO_TCP]);

55
qca/qca-nss-ecm/patches/205-resolve-high-load.patch
View file

@ -1,55 +0,0 @@
From 6924b71ed809b37fffd74d6428a8ca83e5919746 Mon Sep 17 00:00:00 2001
From: Dirk Buchwalder <buchwalder@posteo.de>
Date: Sun, 27 Jun 2021 16:52:39 +0200
Subject: [PATCH] qca-nss-ecm: resolve the cpu high load regarding ecm
If using ECM, cpu load goes up (around 1.0) and stucks there.
This is due to using uninterruptible sleep function,
the patch changes this to interruptible sleep function.
Signed-off-by: Dirk Buchwalder buchwalder@posteo.de
---
frontends/nss/ecm_nss_ipv4.c | 4 ++--
frontends/nss/ecm_nss_ipv6.c | 4 ++--
2 files changed, 4 insertions(+), 4 deletions(-)
--- a/frontends/nss/ecm_nss_ipv4.c
+++ b/frontends/nss/ecm_nss_ipv4.c
@@ -2471,7 +2471,7 @@ static void ecm_nss_ipv4_stats_sync_req_
}
spin_unlock_bh(&ecm_nss_ipv4_lock);
- usleep_range(ECM_NSS_IPV4_STATS_SYNC_UDELAY - 100, ECM_NSS_IPV4_STATS_SYNC_UDELAY);
+ msleep_interruptible(ECM_NSS_IPV4_STATS_SYNC_UDELAY / 1000);
/*
* If index is 0, we are starting a new round, but if we still have time remain
@@ -2485,7 +2485,7 @@ static void ecm_nss_ipv4_stats_sync_req_
}
if (time_after(ecm_nss_ipv4_next_req_time, current_jiffies)) {
- msleep(jiffies_to_msecs(ecm_nss_ipv4_next_req_time - current_jiffies));
+ msleep_interruptible(jiffies_to_msecs(ecm_nss_ipv4_next_req_time - current_jiffies));
}
ecm_nss_ipv4_roll_check_jiffies = jiffies;
ecm_nss_ipv4_next_req_time = ecm_nss_ipv4_roll_check_jiffies + ECM_NSS_IPV4_STATS_SYNC_PERIOD;
--- a/frontends/nss/ecm_nss_ipv6.c
+++ b/frontends/nss/ecm_nss_ipv6.c
@@ -2210,7 +2210,7 @@ static void ecm_nss_ipv6_stats_sync_req_
}
spin_unlock_bh(&ecm_nss_ipv6_lock);
- usleep_range(ECM_NSS_IPV6_STATS_SYNC_UDELAY - 100, ECM_NSS_IPV6_STATS_SYNC_UDELAY);
+ msleep_interruptible(ECM_NSS_IPV6_STATS_SYNC_UDELAY / 1000);
/*
* If index is 0, we are starting a new round, but if we still have time remain
@@ -2224,7 +2224,7 @@ static void ecm_nss_ipv6_stats_sync_req_
}
if (time_after(ecm_nss_ipv6_next_req_time, current_jiffies)) {
- msleep(jiffies_to_msecs(ecm_nss_ipv6_next_req_time - current_jiffies));
+ msleep_interruptible(jiffies_to_msecs(ecm_nss_ipv6_next_req_time - current_jiffies));
}
ecm_nss_ipv6_roll_check_jiffies = jiffies;
ecm_nss_ipv6_next_req_time = ecm_nss_ipv6_roll_check_jiffies + ECM_NSS_IPV6_STATS_SYNC_PERIOD;

48
qca/qca-ssdk-shell/Makefile
View file

@ -1,48 +0,0 @@
include $(TOPDIR)/rules.mk
PKG_NAME:=qca-ssdk-shell
PKG_RELEASE:=$(AUTORELEASE)
PKG_SOURCE_URL:=https://git.codelinaro.org/clo/qsdk/oss/ssdk-shell.git
PKG_SOURCE_PROTO:=git
PKG_SOURCE_DATE:=2022-03-16
PKG_SOURCE_VERSION:=72a7dc725ae9ccbe7d99f451a6518e7c0dde4740
PKG_MIRROR_HASH:=a591875ad05d7a6779cf9da575d890bc470889308f239c89a14721924420ac2b
include $(INCLUDE_DIR)/kernel.mk
include $(INCLUDE_DIR)/package.mk
define Package/qca-ssdk-shell
SECTION:=QCA
CATEGORY:=Utilities
TITLE:=Shell application for QCA SSDK
endef
define Package/qca-ssdk-shell/Description
This package contains a qca-ssdk shell application for QCA chipset
endef
ifndef CONFIG_TOOLCHAIN_BIN_PATH
CONFIG_TOOLCHAIN_BIN_PATH=$(TOOLCHAIN_DIR)/bin
endif
QCASSDK_CONFIG_OPTS+= TOOL_PATH=$(CONFIG_TOOLCHAIN_BIN_PATH) \
SYS_PATH=$(LINUX_DIR) \
TOOLPREFIX=$(TARGET_CROSS) \
KVER=$(LINUX_VERSION) \
CFLAGS="$(TARGET_CFLAGS)" \
LDFLAGS="$(TARGET_LDFLAGS)" \
ARCH=$(LINUX_KARCH)
define Build/Compile
$(MAKE) -C $(PKG_BUILD_DIR) $(strip $(QCASSDK_CONFIG_OPTS))
endef
define Package/qca-ssdk-shell/install
$(INSTALL_DIR) $(1)/usr/sbin
$(INSTALL_BIN) $(PKG_BUILD_DIR)/build/bin/ssdk_sh $(1)/usr/sbin/
endef
$(eval $(call BuildPackage,qca-ssdk-shell))

91
qca/qca-ssdk/Makefile
View file

@ -1,91 +0,0 @@
include $(TOPDIR)/rules.mk
PKG_NAME:=qca-ssdk
PKG_RELEASE:=$(AUTORELEASE)
PKG_SOURCE_URL:=https://git.codelinaro.org/clo/qsdk/oss/lklm/qca-ssdk.git
PKG_SOURCE_PROTO:=git
PKG_SOURCE_DATE:=2022-04-07
PKG_SOURCE_VERSION:=62955de3c838028d3f72313eef99c57fa4babb71
PKG_MIRROR_HASH:=84c7de6d1ce82fb15acebea0e44158695a33ed6f18335da32ec9f248dcb4b285
include $(INCLUDE_DIR)/kernel.mk
include $(INCLUDE_DIR)/package.mk
define KernelPackage/qca-ssdk-nohnat
SECTION:=kernel
CATEGORY:=Kernel modules
SUBMENU:=Network Devices
TITLE:=Kernel driver for QCA SSDK
DEPENDS:=@(TARGET_ipq807x)
FILES:=$(PKG_BUILD_DIR)/build/bin/qca-ssdk.ko
AUTOLOAD:=$(call AutoLoad,30,qca-ssdk)
endef
define KernelPackage/qca-ssdk-nohnat/Description
This package contains a qca-ssdk driver for QCA chipset
endef
GCC_VERSION=$(shell echo "$(CONFIG_GCC_VERSION)" | sed 's/[^0-9.]*\([0-9.]*\).*/\1/')
ifdef CONFIG_TOOLCHAIN_BIN_PATH
TOOLCHAIN_BIN_PATH=$(CONFIG_TOOLCHAIN_BIN_PATH)
else
TOOLCHAIN_BIN_PATH=$(TOOLCHAIN_DIR)/bin
endif
MAKE_FLAGS+= \
TARGET_NAME=$(CONFIG_TARGET_NAME) \
TOOL_PATH=$(TOOLCHAIN_BIN_PATH) \
SYS_PATH=$(LINUX_DIR) \
TOOLPREFIX=$(TARGET_CROSS) \
KVER=$(LINUX_VERSION) \
ARCH=$(LINUX_KARCH) \
TARGET_SUFFIX=$(CONFIG_TARGET_SUFFIX) \
GCC_VERSION=$(GCC_VERSION) \
EXTRA_CFLAGS=-fno-stack-protector -I$(STAGING_DIR)/usr/include \
$(KERNEL_MAKE_FLAGS)
ifneq (, $(findstring $(CONFIG_TARGET_BOARD), "ipq60xx" "ipq807x"))
MAKE_FLAGS+= PTP_FEATURE=disable SWCONFIG_FEATURE=disable
endif
ifeq ($(CONFIG_TARGET_BOARD), "ipq807x")
MAKE_FLAGS+= CHIP_TYPE=HPPE
else ifeq ($(CONFIG_TARGET_BOARD), "ipq60xx")
MAKE_FLAGS+= CHIP_TYPE=CPPE
endif
define Build/InstallDev
$(INSTALL_DIR) $(1)/usr/include/qca-ssdk
$(INSTALL_DIR) $(1)/usr/include/qca-ssdk/api
$(INSTALL_DIR) $(1)/usr/include/qca-ssdk/ref
$(INSTALL_DIR) $(1)/usr/include/qca-ssdk/fal
$(INSTALL_DIR) $(1)/usr/include/qca-ssdk/sal
$(INSTALL_DIR) $(1)/usr/include/qca-ssdk/init
$(CP) -rf $(PKG_BUILD_DIR)/include/api/sw_ioctl.h $(1)/usr/include/qca-ssdk/api
if [ -f $(PKG_BUILD_DIR)/include/ref/ref_vsi.h ]; then \
$(CP) -rf $(PKG_BUILD_DIR)/include/ref/ref_vsi.h $(1)/usr/include/qca-ssdk/ref/; \
fi
if [ -f $(PKG_BUILD_DIR)/include/ref/ref_fdb.h ]; then \
$(CP) -rf $(PKG_BUILD_DIR)/include/ref/ref_fdb.h $(1)/usr/include/qca-ssdk/ref/; \
fi
if [ -f $(PKG_BUILD_DIR)/include/ref/ref_port_ctrl.h ]; then \
$(CP) -rf $(PKG_BUILD_DIR)/include/ref/ref_port_ctrl.h $(1)/usr/include/qca-ssdk/ref/; \
fi
if [ -f $(PKG_BUILD_DIR)/include/init/ssdk_init.h ]; then \
$(CP) -rf $(PKG_BUILD_DIR)/include/init/ssdk_init.h $(1)/usr/include/qca-ssdk/init/; \
fi
$(CP) -rf $(PKG_BUILD_DIR)/include/fal $(1)/usr/include/qca-ssdk
$(CP) -rf $(PKG_BUILD_DIR)/include/common/*.h $(1)/usr/include/qca-ssdk
$(CP) -rf $(PKG_BUILD_DIR)/include/sal/os/linux/*.h $(1)/usr/include/qca-ssdk
$(CP) -rf $(PKG_BUILD_DIR)/include/sal/os/*.h $(1)/usr/include/qca-ssdk
endef
define KernelPackage/qca-ssdk-nohnat/install
$(INSTALL_DIR) $(1)/etc/init.d
$(INSTALL_BIN) ./files/qca-ssdk $(1)/etc/init.d/qca-ssdk
endef
$(eval $(call KernelPackage,qca-ssdk-nohnat))

206
qca/qca-ssdk/files/qca-ssdk
View file

@ -1,206 +0,0 @@
#!/bin/sh /etc/rc.common
# Copyright (c) 2018, The Linux Foundation. All rights reserved.
#
# Permission to use, copy, modify, and/or distribute this software for any
# purpose with or without fee is hereby granted, provided that the above
# copyright notice and this permission notice appear in all copies.
#
# THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
# WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
# MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
# ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
# WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
# ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
# OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
#
START=16
#!/bin/sh
ruletype="ip4 ip6"
side="wan lan"
qwan="1 3 2 0 5 7 6 4"
qlan="0 1 2 3 4 5 6 7"
function create_war_acl_rules(){
for lw in $side
do
#echo $lw
if [ "$lw" == "wan" ];then
listid=254
queue=$qwan
portmap=0x20
else
listid=255
queue=$qlan
portmap=0x1e
fi
#echo $queue
#echo "creating list $listid"
ssdk_sh acl list create $listid 255
ruleid=0
for rt in $ruletype
do
for qid in $queue
do
cmd="ssdk_sh acl rule add $listid $ruleid 1 n 0 0"
#echo $cmd
if [ "$rt" == "ip4" ];then
cmd="$cmd ip4 n n n n n n n n n n n n n n n n n n n n n n n n n n n n n"
#echo $cmd
else
cmd="$cmd ip6 n n n n n n n n n n n n n n n n n n n n n n n n n n n n n n n"
#echo $cmd
fi
if [ $ruleid -le 3 ];then
#non-zero dscp
cmd="$cmd y 0x0 0xff"
elif [ $ruleid -le 7 ];then
#zero dscp
cmd="$cmd n"
elif [ $ruleid -le 11 ];then
#non-zero dscp
cmd="$cmd y 0x0 0xff"
else
#zero dscp
cmd="$cmd n"
fi
p=$((ruleid/2))
cmd="$cmd y mask $((ruleid%2)) 0x1 y mask $((p%2)) 0x1 n n n n n n n n n n n n n n n y n n n n n n n y $qid n n 0 0 n n n n n n n n n n n n n n n n n n n n 0"
#echo $cmd
$cmd
ruleid=`expr $ruleid + 1`
done
done
ssdk_sh acl list bind $listid 0 1 $portmap
done
}
function create_war_cosmap(){
ssdk_sh cosmap pri2q set 0 0
ssdk_sh cosmap pri2q set 1 0
ssdk_sh cosmap pri2q set 2 0
ssdk_sh cosmap pri2q set 3 0
ssdk_sh cosmap pri2q set 4 1
ssdk_sh cosmap pri2q set 5 1
ssdk_sh cosmap pri2q set 6 1
ssdk_sh cosmap pri2q set 7 1
ssdk_sh cosmap pri2ehq set 0 0
ssdk_sh cosmap pri2ehq set 1 0
ssdk_sh cosmap pri2ehq set 2 0
ssdk_sh cosmap pri2ehq set 3 0
ssdk_sh cosmap pri2ehq set 4 1
ssdk_sh cosmap pri2ehq set 5 1
ssdk_sh cosmap pri2ehq set 6 1
ssdk_sh cosmap pri2ehq set 7 1
}
function create_acl_byp_egstp_rules(){
ssdk_sh debug module_func set servcode 0xf 0x0 0x0
ssdk_sh servcode config set 1 n 0 0xfffefc7f 0xffbdff 0 0 0 0 0 0
ssdk_sh debug module_func set servcode 0x0 0x0 0x0
ssdk_sh acl list create 56 48
ssdk_sh acl rule add 56 0 1 n 0 0 mac n n n n n y 01-80-c2-00-00-00 ff-ff-ff-ff-ff-ff n n n n n n n n n n n n n n n n n n n n n n n y n n n n n n n n n n 0 0 n n n n n n n n n n n n n y n n n n n n n n n n n n y n n n n n n n n n n n n 0
ssdk_sh acl rule add 56 1 1 n 0 0 mac n n n n n n n yes 0x8809 0xffff n n n n n n n n n n n n n n n n n n n n n y n n n n n n n n n n 0 0 n n n n n n n n n n n n n y n n n n n n n n n n n n y n n n n n n n n n n n n 0
ssdk_sh acl rule add 56 2 1 n 0 0 mac n n n n n n n yes 0x888e 0xffff n n n n n n n n n n n n n n n n n n n n n y n n n n n n n n n n 0 0 n n n n n n n n n n n n n y n n n n n n n n n n n n y n n n n n n n n n n n n 0
ssdk_sh acl list bind 56 0 2 1
}
function delete_war_acl_rules(){
for lw in $side
do
#echo $lw
if [ "$lw" == "wan" ];then
listid=254
queue=$qwan
portmap=0x20
else
listid=255
queue=$qlan
portmap=0x1e
fi
ssdk_sh acl list unbind $listid 0 1 $portmap
for rt in $ruletype
do
for qid in $queue
do
cmd="ssdk_sh acl rule del $listid 0 1"
echo $cmd
$cmd
done
done
#echo "deleting list $listid"
ssdk_sh acl list destroy $listid
done
}
function delete_war_cosmap(){
ssdk_sh cosmap pri2q set 0 0
ssdk_sh cosmap pri2q set 1 0
ssdk_sh cosmap pri2q set 2 1
ssdk_sh cosmap pri2q set 3 1
ssdk_sh cosmap pri2q set 4 2
ssdk_sh cosmap pri2q set 5 2
ssdk_sh cosmap pri2q set 6 3
ssdk_sh cosmap pri2q set 7 3
ssdk_sh cosmap pri2ehq set 0 1
ssdk_sh cosmap pri2ehq set 1 0
ssdk_sh cosmap pri2ehq set 2 2
ssdk_sh cosmap pri2ehq set 3 2
ssdk_sh cosmap pri2ehq set 4 3
ssdk_sh cosmap pri2ehq set 5 3
ssdk_sh cosmap pri2ehq set 6 4
ssdk_sh cosmap pri2ehq set 7 5
}
function delete_acl_byp_egstp_rules(){
ssdk_sh debug module_func set servcode 0xf 0x0 0x0
ssdk_sh servcode config set 1 n 0 0xfffefcff 0xffbfff 0 0 0 0 0 0
ssdk_sh debug module_func set servcode 0x0 0x0 0x0
ssdk_sh acl list unbind 56 0 2 1
ssdk_sh acl rule del 56 0 1
ssdk_sh acl rule del 56 1 1
ssdk_sh acl rule del 56 2 1
ssdk_sh acl list destroy 56
}
function edma_war_config_add(){
create_war_cosmap
ssdk_sh acl status set enable
create_war_acl_rules
}
function edma_war_config_del(){
delete_war_acl_rules
delete_war_cosmap
}
start() {
chip_ver=`ssdk_sh debug reg get 0 4 | grep Data | tr -d 'SSDK Init OK![Data]:'`
#The following commands should be uncommented to enable EDMA WAR
if [ "$chip_ver" = "0x1401" ]; then
#edma_war_config_add
echo ''
fi
#The following commands should be uncommented to add acl egress stp bypass rules
if [ "$chip_ver" = "0x1500" ] || [ "$chip_ver" = "0x1501" ]; then
#create_acl_byp_egstp_rules
echo ''
fi
echo starting
}
stop() {
chip_ver=`ssdk_sh debug reg get 0 4 | grep Data | tr -d 'SSDK Init OK![Data]:'`
#The following commands should be uncommented to disable EDMA WAR
if [ "$chip_ver" = "0x1401" ]; then
#edma_war_config_del
echo ''
fi
#The following commands should be uncommented to delete acl egress stp bypass rules
if [ "$chip_ver" = "0x1500" ] || [ "$chip_ver" = "0x1501" ]; then
#delete_acl_byp_egstp_rules
echo ''
fi
echo stoping
}

56
qca/qca-ssdk/patches/0001-SSDK-config-add-kernel-5.10.patch
View file

@ -1,56 +0,0 @@
From 472c0c8132784608312c80c4b02c03ea7c132235 Mon Sep 17 00:00:00 2001
From: Robert Marko <robimarko@gmail.com>
Date: Wed, 12 May 2021 13:41:12 +0200
Subject: [PATCH] SSDK: config: add kernel 5.10
This is purely to identify it and be able to set
flags correctly.
Signed-off-by: Robert Marko <robimarko@gmail.com>
---
config | 6 +++++-
make/linux_opt.mk | 4 ++--
2 files changed, 7 insertions(+), 3 deletions(-)
--- a/config
+++ b/config
@@ -22,6 +22,10 @@ ifeq ($(KVER),$(filter 5.4%,$(KVER)))
OS_VER=5_4
endif
+ifeq ($(KVER),$(filter 5.10%,$(KVER)))
+OS_VER=5_10
+endif
+
ifeq ($(KVER), 3.4.0)
OS_VER=3_4
endif
@@ -123,7 +127,7 @@ endif
endif
ifeq ($(ARCH), arm64)
- ifeq ($(KVER),$(filter 4.1% 4.4% 4.9% 5.4%,$(KVER)))
+ ifeq ($(KVER),$(filter 4.1% 4.4% 4.9% 5.4% 5.10%,$(KVER)))
CPU_CFLAG= -DMODULE -Os -pipe -march=armv8-a -mcpu=cortex-a53+crypto -fno-caller-saves -fno-strict-aliasing -Werror -fno-common -Wno-format-security -Wno-pointer-sign -Wno-unused-but-set-variable -Wno-error=unused-result -mcmodel=large
endif
endif
--- a/make/linux_opt.mk
+++ b/make/linux_opt.mk
@@ -388,7 +388,7 @@ ifeq (KSLIB, $(MODULE_TYPE))
KASAN_SHADOW_SCALE_SHIFT := 3
endif
- ifeq (5_4, $(OS_VER))
+ ifeq ($(OS_VER),$(filter 5_4 5_10, $(OS_VER)))
ifeq ($(ARCH), arm64)
KASAN_OPTION += -DKASAN_SHADOW_SCALE_SHIFT=$(KASAN_SHADOW_SCALE_SHIFT)
endif
@@ -419,7 +419,7 @@ ifeq (KSLIB, $(MODULE_TYPE))
endif
- ifeq ($(OS_VER),$(filter 4_4 5_4, $(OS_VER)))
+ ifeq ($(OS_VER),$(filter 4_4 5_4 5_10, $(OS_VER)))
MODULE_CFLAG += -DKVER34
MODULE_CFLAG += -DKVER32
MODULE_CFLAG += -DLNX26_22

102
qca/qca-ssdk/patches/0002-SSDK-replace-ioremap_nocache-with-ioremap.patch
View file

@ -1,102 +0,0 @@
From 784f2cfdfaf3bdf44917924e157049230a0ef5f8 Mon Sep 17 00:00:00 2001
From: Robert Marko <robimarko@gmail.com>
Date: Wed, 12 May 2021 13:45:45 +0200
Subject: [PATCH] SSDK: replace ioremap_nocache with ioremap
ioremap_nocache was dropped upstream, simply use the
generic variety.
Signed-off-by: Robert Marko <robimarko@gmail.com>
---
src/init/ssdk_clk.c | 10 +++++-----
src/init/ssdk_init.c | 2 +-
src/init/ssdk_plat.c | 6 +++---
3 files changed, 9 insertions(+), 9 deletions(-)
--- a/src/init/ssdk_clk.c
+++ b/src/init/ssdk_clk.c
@@ -623,7 +623,7 @@ ssdk_mp_tcsr_get(a_uint32_t tcsr_offset,
{
void __iomem *tcsr_base = NULL;
- tcsr_base = ioremap_nocache(TCSR_ETH_ADDR, TCSR_ETH_SIZE);
+ tcsr_base = ioremap(TCSR_ETH_ADDR, TCSR_ETH_SIZE);
if (!tcsr_base)
{
SSDK_ERROR("Failed to map tcsr eth address!\n");
@@ -640,7 +640,7 @@ ssdk_mp_tcsr_set(a_uint32_t tcsr_offset,
{
void __iomem *tcsr_base = NULL;
- tcsr_base = ioremap_nocache(TCSR_ETH_ADDR, TCSR_ETH_SIZE);
+ tcsr_base = ioremap(TCSR_ETH_ADDR, TCSR_ETH_SIZE);
if (!tcsr_base)
{
SSDK_ERROR("Failed to map tcsr eth address!\n");
@@ -688,7 +688,7 @@ ssdk_mp_cmnblk_stable_check(void)
a_uint32_t reg_val;
int i, loops = 20;
- pll_lock = ioremap_nocache(CMN_PLL_LOCKED_ADDR, CMN_PLL_LOCKED_SIZE);
+ pll_lock = ioremap(CMN_PLL_LOCKED_ADDR, CMN_PLL_LOCKED_SIZE);
if (!pll_lock) {
SSDK_ERROR("Failed to map CMN PLL LOCK register!\n");
return A_FALSE;
@@ -745,7 +745,7 @@ static void ssdk_cmnblk_pll_src_set(enum
void __iomem *cmn_pll_src_base = NULL;
a_uint32_t reg_val;
- cmn_pll_src_base = ioremap_nocache(CMN_BLK_PLL_SRC_ADDR, CMN_BLK_SIZE);
+ cmn_pll_src_base = ioremap(CMN_BLK_PLL_SRC_ADDR, CMN_BLK_SIZE);
if (!cmn_pll_src_base) {
SSDK_ERROR("Failed to map cmn pll source address!\n");
return;
@@ -766,7 +766,7 @@ static void ssdk_cmnblk_init(enum cmnblk
void __iomem *gcc_pll_base = NULL;
a_uint32_t reg_val;
- gcc_pll_base = ioremap_nocache(CMN_BLK_ADDR, CMN_BLK_SIZE);
+ gcc_pll_base = ioremap(CMN_BLK_ADDR, CMN_BLK_SIZE);
if (!gcc_pll_base) {
SSDK_ERROR("Failed to map gcc pll address!\n");
return;
--- a/src/init/ssdk_init.c
+++ b/src/init/ssdk_init.c
@@ -2770,7 +2770,7 @@ static int ssdk_dess_mac_mode_init(a_uin
(a_uint8_t *)&reg_value, 4);
mdelay(10);
/*softreset psgmii, fixme*/
- gcc_addr = ioremap_nocache(0x1812000, 0x200);
+ gcc_addr = ioremap(0x1812000, 0x200);
if (!gcc_addr) {
SSDK_ERROR("gcc map fail!\n");
return 0;
--- a/src/init/ssdk_plat.c
+++ b/src/init/ssdk_plat.c
@@ -1312,7 +1312,7 @@ ssdk_plat_init(ssdk_init_cfg *cfg, a_uin
reg_mode = ssdk_uniphy_reg_access_mode_get(dev_id);
if(reg_mode == HSL_REG_LOCAL_BUS) {
ssdk_uniphy_reg_map_info_get(dev_id, &map);
- qca_phy_priv_global[dev_id]->uniphy_hw_addr = ioremap_nocache(map.base_addr,
+ qca_phy_priv_global[dev_id]->uniphy_hw_addr = ioremap(map.base_addr,
map.size);
if (!qca_phy_priv_global[dev_id]->uniphy_hw_addr) {
SSDK_ERROR("%s ioremap fail.", __func__);
@@ -1327,7 +1327,7 @@ ssdk_plat_init(ssdk_init_cfg *cfg, a_uin
reg_mode = ssdk_switch_reg_access_mode_get(dev_id);
if(reg_mode == HSL_REG_LOCAL_BUS) {
ssdk_switch_reg_map_info_get(dev_id, &map);
- qca_phy_priv_global[dev_id]->hw_addr = ioremap_nocache(map.base_addr,
+ qca_phy_priv_global[dev_id]->hw_addr = ioremap(map.base_addr,
map.size);
if (!qca_phy_priv_global[dev_id]->hw_addr) {
SSDK_ERROR("%s ioremap fail.", __func__);
@@ -1358,7 +1358,7 @@ ssdk_plat_init(ssdk_init_cfg *cfg, a_uin
return -1;
}
- qca_phy_priv_global[dev_id]->psgmii_hw_addr = ioremap_nocache(map.base_addr,
+ qca_phy_priv_global[dev_id]->psgmii_hw_addr = ioremap(map.base_addr,
map.size);
if (!qca_phy_priv_global[dev_id]->psgmii_hw_addr) {
SSDK_ERROR("%s ioremap fail.", __func__);

40
qca/qca-ssdk/patches/0004-platform-use-of_mdio_find_bus-to-get-MDIO-bus.patch
View file

@ -1,40 +0,0 @@
From b6190ca46287d01a895c7cc14de30410c09ff1b8 Mon Sep 17 00:00:00 2001
From: Robert Marko <robimarko@gmail.com>
Date: Wed, 12 May 2021 17:15:46 +0200
Subject: [PATCH] SSDK: platform: use of_mdio_find_bus() to get MDIO bus
Kernel has a generic of_mdio_find_bus() which can get the appropriate
MDIO bus based on the DT node.
So, drop the getting MDIO from platform data, which no longer works
in 5.4 and later and use of_mdio_find_bus().
Signed-off-by: Baruch Siach <baruch@tkos.co.il>
Signed-off-by: Robert Marko <robimarko@gmail.com>
---
src/init/ssdk_plat.c | 8 +-------
1 file changed, 1 insertion(+), 7 deletions(-)
--- a/src/init/ssdk_plat.c
+++ b/src/init/ssdk_plat.c
@@ -551,7 +551,6 @@ static int miibus_get(a_uint32_t dev_id)
struct device_node *mdio_node = NULL;
struct device_node *switch_node = NULL;
struct platform_device *mdio_plat = NULL;
- struct ipq40xx_mdio_data *mdio_data = NULL;
struct qca_phy_priv *priv;
hsl_reg_mode reg_mode = HSL_REG_LOCAL_BUS;
priv = qca_phy_priv_global[dev_id];
@@ -584,12 +583,7 @@ static int miibus_get(a_uint32_t dev_id)
if(reg_mode == HSL_REG_LOCAL_BUS)
{
- mdio_data = dev_get_drvdata(&mdio_plat->dev);
- if (!mdio_data) {
- SSDK_ERROR("cannot get mdio_data reference from device data\n");
- return 1;
- }
- priv->miibus = mdio_data->mii_bus;
+ priv->miibus = of_mdio_find_bus(mdio_node);
}
else
priv->miibus = dev_get_drvdata(&mdio_plat->dev);

42
qca/qca-ssdk/patches/0005-SSDK-dts-fix-of_get_mac_address.patch
View file

@ -1,42 +0,0 @@
From f3a7b93137c1a6a1b8010b86296242178eed5d9e Mon Sep 17 00:00:00 2001
From: Robert Marko <robimarko@gmail.com>
Date: Fri, 13 Aug 2021 20:03:21 +0200
Subject: [PATCH] SSDK: dts: fix of_get_mac_address()
Recently OpenWrt backported the updated of_get_mac_address()
function which returns and error code instead.
So, patch the SSDK to use it and fix the compilation error.
Signed-off-by: Robert Marko <robimarko@gmail.com>
---
src/init/ssdk_dts.c | 7 ++++---
1 file changed, 4 insertions(+), 3 deletions(-)
--- a/src/init/ssdk_dts.c
+++ b/src/init/ssdk_dts.c
@@ -779,8 +779,9 @@ static void ssdk_dt_parse_intf_mac(void)
{
struct device_node *dp_node = NULL;
a_uint32_t dp = 0;
- a_uint8_t *maddr = NULL;
+ u8 maddr[ETH_ALEN];
char dp_name[8] = {0};
+ int ret;
for (dp = 1; dp <= SSDK_MAX_NR_ETH; dp++) {
snprintf(dp_name, sizeof(dp_name), "dp%d", dp);
@@ -788,11 +789,11 @@ static void ssdk_dt_parse_intf_mac(void)
if (!dp_node) {
continue;
}
- maddr = (a_uint8_t *)of_get_mac_address(dp_node);
+ ret = of_get_mac_address(dp_node, maddr);
#if (LINUX_VERSION_CODE < KERNEL_VERSION(5, 0, 0))
if (maddr && is_valid_ether_addr(maddr)) {
#else
- if (!IS_ERR(maddr) && is_valid_ether_addr(maddr)) {
+ if (!ret && is_valid_ether_addr(maddr)) {
#endif
ssdk_dt_global.num_intf_mac++;
ether_addr_copy(ssdk_dt_global.intf_mac[dp-1].uc, maddr);

56
qca/qca-ssdk/patches/0006-SSDK-config-add-kernel-5.15.patch
View file

@ -1,56 +0,0 @@
From 599f19551dc8db3cb396e4c139a73bd72300ebf5 Mon Sep 17 00:00:00 2001
From: Robert Marko <robimarko@gmail.com>
Date: Fri, 24 Dec 2021 19:39:02 +0100
Subject: [PATCH] SSDK: config: add kernel 5.15
This is purely to identify it and be able to set
flags correctly.
Signed-off-by: Robert Marko <robimarko@gmail.com>
---
config | 6 +++++-
make/linux_opt.mk | 4 ++--
2 files changed, 7 insertions(+), 3 deletions(-)
--- a/config
+++ b/config
@@ -26,6 +26,10 @@ ifeq ($(KVER),$(filter 5.10%,$(KVER)))
OS_VER=5_10
endif
+ifeq ($(KVER),$(filter 5.15%,$(KVER)))
+OS_VER=5_15
+endif
+
ifeq ($(KVER), 3.4.0)
OS_VER=3_4
endif
@@ -127,7 +131,7 @@ endif
endif
ifeq ($(ARCH), arm64)
- ifeq ($(KVER),$(filter 4.1% 4.4% 4.9% 5.4% 5.10%,$(KVER)))
+ ifeq ($(KVER),$(filter 4.1% 4.4% 4.9% 5.4% 5.10% 5.15%,$(KVER)))
CPU_CFLAG= -DMODULE -Os -pipe -march=armv8-a -mcpu=cortex-a53+crypto -fno-caller-saves -fno-strict-aliasing -Werror -fno-common -Wno-format-security -Wno-pointer-sign -Wno-unused-but-set-variable -Wno-error=unused-result -mcmodel=large
endif
endif
--- a/make/linux_opt.mk
+++ b/make/linux_opt.mk
@@ -388,7 +388,7 @@ ifeq (KSLIB, $(MODULE_TYPE))
KASAN_SHADOW_SCALE_SHIFT := 3
endif
- ifeq ($(OS_VER),$(filter 5_4 5_10, $(OS_VER)))
+ ifeq ($(OS_VER),$(filter 5_4 5_10 5_15, $(OS_VER)))
ifeq ($(ARCH), arm64)
KASAN_OPTION += -DKASAN_SHADOW_SCALE_SHIFT=$(KASAN_SHADOW_SCALE_SHIFT)
endif
@@ -419,7 +419,7 @@ ifeq (KSLIB, $(MODULE_TYPE))
endif
- ifeq ($(OS_VER),$(filter 4_4 5_4 5_10, $(OS_VER)))
+ ifeq ($(OS_VER),$(filter 4_4 5_4 5_10 5_15, $(OS_VER)))
MODULE_CFLAG += -DKVER34
MODULE_CFLAG += -DKVER32
MODULE_CFLAG += -DLNX26_22

83
qca/qca-ssdk/patches/0007-qca8081-convert-to-5.11-IRQ-model.patch
View file

@ -1,83 +0,0 @@
From 25ff0ae02accadd7b05f1dae788505f833d5c019 Mon Sep 17 00:00:00 2001
From: Robert Marko <robimarko@gmail.com>
Date: Fri, 24 Dec 2021 20:02:32 +0100
Subject: [PATCH] qca8081: convert to 5.11 IRQ model
Kernel 5.11 introduced new IRQ handling model for PHY-s,
so provide those if 5.11 or later is used.
Signed-off-by: Robert Marko <robimarko@gmail.com>
---
src/hsl/phy/qca808x.c | 46 +++++++++++++++++++++++++++++++++++++++++++
1 file changed, 46 insertions(+)
--- a/src/hsl/phy/qca808x.c
+++ b/src/hsl/phy/qca808x.c
@@ -238,6 +238,7 @@ static int qca808x_config_intr(struct ph
return err;
}
+#if (LINUX_VERSION_CODE < KERNEL_VERSION(5, 11, 0))
static int qca808x_ack_interrupt(struct phy_device *phydev)
{
int err;
@@ -257,6 +258,47 @@ static int qca808x_ack_interrupt(struct
return (err < 0) ? err : 0;
}
+#endif
+
+#if (LINUX_VERSION_CODE > KERNEL_VERSION(5, 11, 0))
+static irqreturn_t qca808x_handle_interrupt(struct phy_device *phydev)
+{
+ a_uint16_t irq_status, int_enabled;
+ a_uint32_t dev_id = 0, phy_id = 0;
+ qca808x_priv *priv = phydev->priv;
+ const struct qca808x_phy_info *pdata = priv->phy_info;
+
+ if (!pdata) {
+ return SW_FAIL;
+ }
+
+ dev_id = pdata->dev_id;
+ phy_id = pdata->phy_addr;
+
+ irq_status = qca808x_phy_reg_read(dev_id, phy_id,
+ QCA808X_PHY_INTR_STATUS);
+ if (irq_status < 0) {
+ phy_error(phydev);
+ return IRQ_NONE;
+ }
+
+ /* Read the current enabled interrupts */
+ int_enabled = qca808x_phy_reg_read(dev_id, phy_id,
+ QCA808X_PHY_INTR_MASK);
+ if (int_enabled < 0) {
+ phy_error(phydev);
+ return IRQ_NONE;
+ }
+
+ /* See if this was one of our enabled interrupts */
+ if (!(irq_status & int_enabled))
+ return IRQ_NONE;
+
+ phy_trigger_machine(phydev);
+
+ return IRQ_HANDLED;
+}
+#endif
/* switch linux negtiation capability to fal avariable */
#if (LINUX_VERSION_CODE < KERNEL_VERSION(5, 0, 0))
@@ -559,7 +601,11 @@ struct phy_driver qca808x_phy_driver = {
.config_intr = qca808x_config_intr,
.config_aneg = qca808x_config_aneg,
.aneg_done = qca808x_aneg_done,
+#if (LINUX_VERSION_CODE < KERNEL_VERSION(5, 11, 0))
.ack_interrupt = qca808x_ack_interrupt,
+#else
+ .handle_interrupt = qca808x_handle_interrupt,
+#endif
.read_status = qca808x_read_status,
.suspend = qca808x_suspend,
.resume = qca808x_resume,

74
qca/qca-ssdk/patches/0008-qca807x-add-a-LED-quirk-for-Xiaomi-AX9000.patch
View file

@ -1,74 +0,0 @@
From 86624624c2b593c57999780a3838e6a9fe40b30c Mon Sep 17 00:00:00 2001
From: Robert Marko <robimarko@gmail.com>
Date: Tue, 11 Jan 2022 00:28:42 +0100
Subject: [PATCH] qca807x: add a LED quirk for Xiaomi AX9000
Xiaomi AX9000 has a single LED for each of 4 gigabit ethernet ports that
are connected to QCA8075, and that LED is connected to the 100M LED pin.
So, by default it will only work when in 10 or 100Mbit mode, this is quite
annoying and makes no sense(If they have connected it to the 1000Mbit LED
pin then it would have worked for 10/100 by default as well).
So, to solve this add a check for system compatible as we cant parse if
from DTS in any other way and set the 100M LED to blink on 1000Base-T
as well.
Signed-off-by: Robert Marko <robimarko@gmail.com>
---
include/hsl/phy/malibu_phy.h | 2 ++
src/hsl/phy/malibu_phy.c | 11 +++++++++++
2 files changed, 13 insertions(+)
diff --git a/include/hsl/phy/malibu_phy.h b/include/hsl/phy/malibu_phy.h
index b7354041..ec7a0621 100755
--- a/include/hsl/phy/malibu_phy.h
+++ b/include/hsl/phy/malibu_phy.h
@@ -94,6 +94,7 @@ extern "C"
#define MALIBU_DAC_CTRL_MASK 0x380
#define MALIBU_DAC_CTRL_VALUE 0x280
#define MALIBU_LED_1000_CTRL1_100_10_MASK 0x30
+#define MALIBU_LED_100_CTRL1_1000_MASK 0x40
#define MALIBU_PHY_EEE_ADV_100M 0x0002
#define MALIBU_PHY_EEE_ADV_1000M 0x0004
@@ -118,6 +119,7 @@ extern "C"
#define MALIBU_PHY_MMD7_EGRESS_COUNTER_HIGH 0x802d
#define MALIBU_PHY_MMD7_EGRESS_COUNTER_LOW 0x802e
#define MALIBU_PHY_MMD7_EGRESS_ERROR_COUNTER 0x802f
+#define MALIBU_PHY_MMD7_LED_100_CTRL1 0x8074
#define MALIBU_PHY_MMD7_LED_1000_CTRL1 0x8076
diff --git a/src/hsl/phy/malibu_phy.c b/src/hsl/phy/malibu_phy.c
index 1f4dba15..2bef9fa3 100644
--- a/src/hsl/phy/malibu_phy.c
+++ b/src/hsl/phy/malibu_phy.c
@@ -12,6 +12,8 @@
* OF OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
*/
+#include <linux/of.h>
+
#include "sw.h"
#include "fal_port_ctrl.h"
#include "hsl_api.h"
@@ -2726,6 +2728,15 @@ malibu_phy_hw_init(a_uint32_t dev_id, a_uint32_t port_bmp)
led_status |= MALIBU_LED_1000_CTRL1_100_10_MASK;
malibu_phy_mmd_write(dev_id, phy_addr, MALIBU_PHY_MMD7_NUM,
MALIBU_PHY_MMD7_LED_1000_CTRL1, led_status);
+ if (of_machine_is_compatible("xiaomi,ax9000")) {
+ /* add 1000M link LED behavior for Xiaomi AX9000 */
+ led_status = malibu_phy_mmd_read(dev_id, phy_addr, MALIBU_PHY_MMD7_NUM,
+ MALIBU_PHY_MMD7_LED_100_CTRL1);
+ led_status &= ~MALIBU_LED_100_CTRL1_1000_MASK;
+ led_status |= MALIBU_LED_100_CTRL1_1000_MASK;
+ malibu_phy_mmd_write(dev_id, phy_addr, MALIBU_PHY_MMD7_NUM,
+ MALIBU_PHY_MMD7_LED_100_CTRL1, led_status);
+ }
/*disable Extended next page*/
phy_data = malibu_phy_reg_read(dev_id, phy_addr, MALIBU_AUTONEG_ADVERT);
phy_data &= ~MALIBU_EXTENDED_NEXT_PAGE_EN;
--
2.34.1

29
qca/qca-ssdk/patches/0009-qca807x-add-a-LED-quirk-for-Xiaomi-AX3600.patch
View file

@ -1,29 +0,0 @@
From 913514b9177e77836f2c8d61fc498b54f54c6775 Mon Sep 17 00:00:00 2001
From: Robert Marko <robimarko@gmail.com>
Date: Wed, 26 Jan 2022 14:47:33 +0100
Subject: [PATCH] qca807x: add a LED quirk for Xiaomi AX3600
AX3600 requires the same LED quirk so that PHY LED-s will blink even
once Linux resets the PHY.
So, just check for its compatible.
Signed-off-by: Robert Marko <robimarko@gmail.com>
---
src/hsl/phy/malibu_phy.c | 5 +++--
1 file changed, 3 insertions(+), 2 deletions(-)
--- a/src/hsl/phy/malibu_phy.c
+++ b/src/hsl/phy/malibu_phy.c
@@ -2728,8 +2728,9 @@ malibu_phy_hw_init(a_uint32_t dev_id, a_
led_status |= MALIBU_LED_1000_CTRL1_100_10_MASK;
malibu_phy_mmd_write(dev_id, phy_addr, MALIBU_PHY_MMD7_NUM,
MALIBU_PHY_MMD7_LED_1000_CTRL1, led_status);
- if (of_machine_is_compatible("xiaomi,ax9000")) {
- /* add 1000M link LED behavior for Xiaomi AX9000 */
+ /* add 1000M link LED behavior for Xiaomi boards */
+ if (of_machine_is_compatible("xiaomi,ax9000") ||
+ of_machine_is_compatible("xiaomi,ax3600")) {
led_status = malibu_phy_mmd_read(dev_id, phy_addr, MALIBU_PHY_MMD7_NUM,
MALIBU_PHY_MMD7_LED_100_CTRL1);
led_status &= ~MALIBU_LED_100_CTRL1_1000_MASK;

27
qca/qca-ssdk/patches/0012-include-fix-compilation-error-for-parse_uci_option.patch
View file

@ -1,27 +0,0 @@
From 8e3500df074625b3eb3a8ed4e8e0b1b116f13d0c Mon Sep 17 00:00:00 2001
From: Ansuel Smith <ansuelsmth@gmail.com>
Date: Sat, 7 May 2022 19:03:55 +0200
Subject: [PATCH] include: fix compilation error for parse_uci_option
Fix missing include for parse_uci_option
Signed-off-by: Ansuel Smith <ansuelsmth@gmail.com>
---
include/ref/ref_uci.h | 1 +
1 file changed, 1 insertion(+)
diff --git a/include/ref/ref_uci.h b/include/ref/ref_uci.h
index a42ea153..0906c5ba 100755
--- a/include/ref/ref_uci.h
+++ b/include/ref/ref_uci.h
@@ -19,6 +19,7 @@
extern "C" {
#endif /* __cplusplus */
+#include <linux/switch.h>
#if defined(IN_SWCONFIG)
int
--
2.34.1