2023-02-08 12:49:27 +00:00
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--- a/arch/arm/dts/Makefile
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+++ b/arch/arm/dts/Makefile
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2023-04-22 06:07:24 +00:00
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@@ -145,6 +145,7 @@ dtb-$(CONFIG_ROCKCHIP_RK3399) += \
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rk3399-gru-bob.dtb \
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rk3399-guangmiao-g4c.dtb \
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rk3399-gru-kevin.dtb \
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+ rk3399-h3399pc.dtb \
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rk3399-khadas-edge.dtb \
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rk3399-khadas-edge-captain.dtb \
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rk3399-khadas-edge-v.dtb \
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2023-02-08 12:49:27 +00:00
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--- /dev/null
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2023-04-22 06:07:24 +00:00
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+++ b/arch/arm/dts/rk3399-h3399pc.dts
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@@ -0,0 +1,828 @@
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2023-02-08 12:49:27 +00:00
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+// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
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2023-04-22 06:07:24 +00:00
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+/*
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+ * Copyright (c) 2017 Fuzhou Rockchip Electronics Co., Ltd.
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+ */
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2023-02-08 12:49:27 +00:00
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+
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+/dts-v1/;
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+#include <dt-bindings/input/linux-event-codes.h>
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+#include "rk3399.dtsi"
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+#include "rk3399-opp.dtsi"
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+
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+/ {
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2023-04-22 06:07:24 +00:00
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+ model = "SHAREVDI H3399PC";
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+ compatible = "sharevdi,h3399pc", "rockchip,rk3399";
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2023-02-08 12:49:27 +00:00
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+
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+ aliases {
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2023-04-22 06:07:24 +00:00
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+ mmc0 = &sdio0;
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+ mmc1 = &sdmmc;
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+ mmc2 = &sdhci;
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2023-02-08 12:49:27 +00:00
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+ };
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+
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+ chosen {
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+ stdout-path = "serial2:1500000n8";
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+ };
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+
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+ clkin_gmac: external-gmac-clock {
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+ compatible = "fixed-clock";
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+ clock-frequency = <125000000>;
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+ clock-output-names = "clkin_gmac";
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+ #clock-cells = <0>;
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+ };
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+
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2023-04-22 06:07:24 +00:00
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+ dc_12v: dc-12v {
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2023-02-08 12:49:27 +00:00
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+ compatible = "regulator-fixed";
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2023-04-22 06:07:24 +00:00
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+ regulator-name = "dc_12v";
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2023-02-08 12:49:27 +00:00
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+ regulator-always-on;
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+ regulator-boot-on;
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+ regulator-min-microvolt = <12000000>;
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+ regulator-max-microvolt = <12000000>;
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+ };
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+
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2023-04-22 06:07:24 +00:00
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+ gpio-keys {
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+ compatible = "gpio-keys";
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+ autorepeat;
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+
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+ power {
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+ debounce-interval = <100>;
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+ gpios = <&gpio0 RK_PA5 GPIO_ACTIVE_LOW>;
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+ label = "GPIO Key Power";
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+ linux,code = <KEY_POWER>;
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+ wakeup-source;
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+ };
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+ };
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+
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+ leds {
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+ compatible = "gpio-leds";
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+ pinctrl-names = "default";
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+ pinctrl-0 = <&work_led_pin>, <&diy_led_pin>;
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+
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+ work_led: led-0 {
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+ label = "work";
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+ default-state = "on";
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+ gpios = <&gpio0 RK_PB4 GPIO_ACTIVE_HIGH>;
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+ };
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+
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+ diy_led: led-1 {
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+ label = "diy";
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+ default-state = "off";
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+ gpios = <&gpio0 RK_PB5 GPIO_ACTIVE_HIGH>;
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+ };
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+ };
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+
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+ sound: sound {
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+ compatible = "audio-graph-card";
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+ label = "Analog";
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+ dais = <&i2s0_p0>;
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+ };
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+
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+ sound-dit {
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+ compatible = "audio-graph-card";
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+ label = "SPDIF";
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+ dais = <&spdif_p0>;
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+ };
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+
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+ spdif-dit {
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+ compatible = "linux,spdif-dit";
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+ #sound-dai-cells = <0>;
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+
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+ port {
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+ dit_p0_0: endpoint {
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+ remote-endpoint = <&spdif_p0_0>;
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+ };
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+ };
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+ };
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+
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2023-02-08 12:49:27 +00:00
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+ sdio_pwrseq: sdio-pwrseq {
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+ compatible = "mmc-pwrseq-simple";
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+ clocks = <&rk808 1>;
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+ clock-names = "ext_clock";
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+ pinctrl-names = "default";
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+ pinctrl-0 = <&wifi_enable_h>;
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2023-04-22 06:07:24 +00:00
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+
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+ /*
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+ * On the module itself this is one of these (depending
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+ * on the actual card populated):
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+ * - SDIO_RESET_L_WL_REG_ON
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+ * - PDN (power down when low)
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+ */
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+ reset-gpios = <&gpio0 RK_PB2 GPIO_ACTIVE_LOW>;
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+ };
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+
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+ sound-dit {
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+ compatible = "audio-graph-card";
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+ label = "SPDIF";
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+ dais = <&spdif_p0>;
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2023-02-08 12:49:27 +00:00
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+ };
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+
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2023-04-22 06:07:24 +00:00
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+ spdif-dit {
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+ compatible = "linux,spdif-dit";
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+ #sound-dai-cells = <0>;
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+
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+ port {
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+ dit_p0_0: endpoint {
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+ remote-endpoint = <&spdif_p0_0>;
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+ };
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+ };
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+ };
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+
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+ /* switched by pmic_sleep */
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+ vcc1v8_s3: vcca1v8_s3: vcc1v8-s3 {
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2023-02-08 12:49:27 +00:00
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+ compatible = "regulator-fixed";
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2023-04-22 06:07:24 +00:00
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+ regulator-name = "vcc1v8_s3";
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2023-02-08 12:49:27 +00:00
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+ regulator-always-on;
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+ regulator-boot-on;
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2023-04-22 06:07:24 +00:00
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+ regulator-min-microvolt = <1800000>;
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+ regulator-max-microvolt = <1800000>;
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+ vin-supply = <&vcc_1v8>;
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+ };
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+
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+ vcc1v8_sys: vcc1v8-sys {
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+ compatible = "regulator-fixed";
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+ regulator-name = "vcc1v8_sys";
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+ regulator-always-on;
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+ regulator-boot-on;
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+ regulator-min-microvolt = <1800000>;
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+ regulator-max-microvolt = <1800000>;
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+ };
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+
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+ vcc3v3_pcie: vcc3v3-pcie-regulator {
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+ compatible = "regulator-fixed";
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+ enable-active-high;
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+ gpio = <&gpio4 RK_PD5 GPIO_ACTIVE_HIGH>;
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+ pinctrl-names = "default";
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+ pinctrl-0 = <&pcie_pwr_en>;
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+ regulator-name = "vcc3v3_pcie";
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+ regulator-always-on;
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+ regulator-boot-on;
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+ vin-supply = <&dc_12v>;
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+ };
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+
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+ vcc3v3_3g: vcc3v3-3g-regulator {
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+ compatible = "regulator-fixed";
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+ enable-active-high;
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+ regulator-always-on;
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+ regulator-boot-on;
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+ gpio = <&gpio0 RK_PA2 GPIO_ACTIVE_HIGH>;
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+ pinctrl-names = "default";
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+ pinctrl-0 = <&pcie_3g_drv>;
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+ regulator-name = "vcc3v3_3g";
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2023-02-08 12:49:27 +00:00
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+ };
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+
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+ vcc3v3_sys: vcc3v3-sys {
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+ compatible = "regulator-fixed";
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+ regulator-name = "vcc3v3_sys";
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+ regulator-always-on;
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+ regulator-boot-on;
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+ regulator-min-microvolt = <3300000>;
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+ regulator-max-microvolt = <3300000>;
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2023-04-22 06:07:24 +00:00
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+ vin-supply = <&vcc_sys>;
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2023-02-08 12:49:27 +00:00
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+ };
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+
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2023-04-22 06:07:24 +00:00
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+ /* Actually 3 regulators (host0, 1, 2) controlled by the same gpio */
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2023-02-08 12:49:27 +00:00
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+ vcc5v0_host: vcc5v0-host-regulator {
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+ compatible = "regulator-fixed";
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+ enable-active-high;
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2023-04-22 06:07:24 +00:00
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+ gpio = <&gpio1 RK_PA0 GPIO_ACTIVE_HIGH>;
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2023-02-08 12:49:27 +00:00
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+ pinctrl-names = "default";
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+ pinctrl-0 = <&vcc5v0_host_en>;
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+ regulator-name = "vcc5v0_host";
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+ regulator-always-on;
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2023-04-22 06:07:24 +00:00
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+ vin-supply = <&vcc_sys>;
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+ };
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+
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+ vcc5v0_hub: vcc5v0-hub-regulator {
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+ compatible = "regulator-fixed";
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+ enable-active-high;
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+ gpio = <&gpio4 RK_PD6 GPIO_ACTIVE_HIGH>;
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+ pinctrl-names = "default";
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+ pinctrl-0 = <&vcc5v0_hub_en>;
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+ regulator-name = "vcc5v0_hub";
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+ regulator-always-on;
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+ vin-supply = <&vcc_sys>;
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2023-02-08 12:49:27 +00:00
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+ };
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+
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2023-04-22 06:07:24 +00:00
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+ vcc_sys: vcc-sys {
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2023-02-08 12:49:27 +00:00
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+ compatible = "regulator-fixed";
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2023-04-22 06:07:24 +00:00
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+ regulator-name = "vcc_sys";
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2023-02-08 12:49:27 +00:00
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+ regulator-always-on;
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+ regulator-boot-on;
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2023-04-22 06:07:24 +00:00
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+ regulator-min-microvolt = <5000000>;
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+ regulator-max-microvolt = <5000000>;
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+ vin-supply = <&dc_12v>;
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2023-02-08 12:49:27 +00:00
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+ };
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+
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+ vdd_log: vdd-log {
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+ compatible = "pwm-regulator";
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+ pwms = <&pwm2 0 25000 1>;
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+ regulator-name = "vdd_log";
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+ regulator-always-on;
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+ regulator-boot-on;
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+ regulator-min-microvolt = <800000>;
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2023-04-22 06:07:24 +00:00
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+ regulator-max-microvolt = <1100000>;
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+ vin-supply = <&vcc_sys>;
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2023-02-08 12:49:27 +00:00
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+ };
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+
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2023-04-22 06:07:24 +00:00
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+ vcc_phy: vcc-phy-regulator {
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+ compatible = "regulator-fixed";
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+ regulator-name = "vcc_phy";
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+ regulator-always-on;
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+ regulator-boot-on;
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2023-02-08 12:49:27 +00:00
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+ };
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+};
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+
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+&cpu_l0 {
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+ cpu-supply = <&vdd_cpu_l>;
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+};
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+
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+&cpu_l1 {
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+ cpu-supply = <&vdd_cpu_l>;
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+};
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+
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+&cpu_l2 {
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+ cpu-supply = <&vdd_cpu_l>;
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+};
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+
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+&cpu_l3 {
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+ cpu-supply = <&vdd_cpu_l>;
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+};
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+
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+&cpu_b0 {
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+ cpu-supply = <&vdd_cpu_b>;
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+};
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+
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+&cpu_b1 {
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+ cpu-supply = <&vdd_cpu_b>;
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+};
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+
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+&emmc_phy {
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+ status = "okay";
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+};
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+
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+&gmac {
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+ assigned-clocks = <&cru SCLK_RMII_SRC>;
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+ assigned-clock-parents = <&clkin_gmac>;
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+ clock_in_out = "input";
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+ phy-supply = <&vcc_lan>;
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2023-04-22 06:07:24 +00:00
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+ phy-mode = "rgmii";
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2023-02-08 12:49:27 +00:00
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+ pinctrl-names = "default";
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+ pinctrl-0 = <&rgmii_pins>;
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+ snps,reset-gpio = <&gpio3 RK_PB7 GPIO_ACTIVE_LOW>;
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+ snps,reset-active-low;
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+ snps,reset-delays-us = <0 10000 50000>;
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+ tx_delay = <0x28>;
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+ rx_delay = <0x11>;
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+ status = "okay";
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+};
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+
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+&hdmi {
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+ ddc-i2c-bus = <&i2c3>;
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+ pinctrl-names = "default";
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2023-04-22 06:07:24 +00:00
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+ pinctrl-0 = <&hdmi_cec>;
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2023-02-08 12:49:27 +00:00
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+ status = "okay";
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+};
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+
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+&i2c0 {
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+ clock-frequency = <400000>;
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+ i2c-scl-rising-time-ns = <168>;
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+ i2c-scl-falling-time-ns = <4>;
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+ status = "okay";
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+
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+ rk808: pmic@1b {
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+ compatible = "rockchip,rk808";
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+ reg = <0x1b>;
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+ interrupt-parent = <&gpio1>;
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+ interrupts = <21 IRQ_TYPE_LEVEL_LOW>;
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+ #clock-cells = <1>;
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+ clock-output-names = "xin32k", "rk808-clkout2";
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+ pinctrl-names = "default";
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+ pinctrl-0 = <&pmic_int_l>;
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+ rockchip,system-power-controller;
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+ wakeup-source;
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+
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2023-04-22 06:07:24 +00:00
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+ vcc1-supply = <&vcc3v3_sys>;
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+ vcc2-supply = <&vcc3v3_sys>;
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+ vcc3-supply = <&vcc3v3_sys>;
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+ vcc4-supply = <&vcc3v3_sys>;
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+ vcc6-supply = <&vcc3v3_sys>;
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+ vcc7-supply = <&vcc3v3_sys>;
|
2023-02-08 12:49:27 +00:00
|
|
|
+ vcc8-supply = <&vcc3v3_sys>;
|
2023-04-22 06:07:24 +00:00
|
|
|
+ vcc9-supply = <&vcc3v3_sys>;
|
|
|
|
+ vcc10-supply = <&vcc3v3_sys>;
|
|
|
|
+ vcc11-supply = <&vcc3v3_sys>;
|
2023-02-08 12:49:27 +00:00
|
|
|
+ vcc12-supply = <&vcc3v3_sys>;
|
2023-04-22 06:07:24 +00:00
|
|
|
+ vddio-supply = <&vcc1v8_pmu>;
|
2023-02-08 12:49:27 +00:00
|
|
|
+
|
|
|
|
+ regulators {
|
|
|
|
+ vdd_center: DCDC_REG1 {
|
|
|
|
+ regulator-name = "vdd_center";
|
|
|
|
+ regulator-always-on;
|
|
|
|
+ regulator-boot-on;
|
|
|
|
+ regulator-min-microvolt = <750000>;
|
|
|
|
+ regulator-max-microvolt = <1350000>;
|
|
|
|
+ regulator-ramp-delay = <6001>;
|
|
|
|
+
|
|
|
|
+ regulator-state-mem {
|
|
|
|
+ regulator-off-in-suspend;
|
|
|
|
+ };
|
|
|
|
+ };
|
|
|
|
+
|
|
|
|
+ vdd_cpu_l: DCDC_REG2 {
|
|
|
|
+ regulator-name = "vdd_cpu_l";
|
|
|
|
+ regulator-always-on;
|
|
|
|
+ regulator-boot-on;
|
|
|
|
+ regulator-min-microvolt = <750000>;
|
|
|
|
+ regulator-max-microvolt = <1350000>;
|
|
|
|
+ regulator-ramp-delay = <6001>;
|
|
|
|
+
|
|
|
|
+ regulator-state-mem {
|
|
|
|
+ regulator-off-in-suspend;
|
|
|
|
+ };
|
|
|
|
+ };
|
|
|
|
+
|
|
|
|
+ vcc_ddr: DCDC_REG3 {
|
|
|
|
+ regulator-name = "vcc_ddr";
|
|
|
|
+ regulator-always-on;
|
|
|
|
+ regulator-boot-on;
|
|
|
|
+
|
|
|
|
+ regulator-state-mem {
|
|
|
|
+ regulator-on-in-suspend;
|
|
|
|
+ };
|
|
|
|
+ };
|
|
|
|
+
|
|
|
|
+ vcc_1v8: DCDC_REG4 {
|
|
|
|
+ regulator-name = "vcc_1v8";
|
|
|
|
+ regulator-always-on;
|
|
|
|
+ regulator-boot-on;
|
|
|
|
+ regulator-min-microvolt = <1800000>;
|
|
|
|
+ regulator-max-microvolt = <1800000>;
|
|
|
|
+
|
|
|
|
+ regulator-state-mem {
|
|
|
|
+ regulator-on-in-suspend;
|
|
|
|
+ regulator-suspend-microvolt = <1800000>;
|
|
|
|
+ };
|
|
|
|
+ };
|
|
|
|
+
|
2023-04-22 06:07:24 +00:00
|
|
|
+ vcc2v8_dvp: LDO_REG1 {
|
|
|
|
+ regulator-name = "vcc2v8_dvp";
|
2023-02-08 12:49:27 +00:00
|
|
|
+ regulator-always-on;
|
|
|
|
+ regulator-boot-on;
|
2023-04-22 06:07:24 +00:00
|
|
|
+ regulator-min-microvolt = <2800000>;
|
|
|
|
+ regulator-max-microvolt = <2800000>;
|
2023-02-08 12:49:27 +00:00
|
|
|
+
|
|
|
|
+ regulator-state-mem {
|
|
|
|
+ regulator-off-in-suspend;
|
|
|
|
+ };
|
|
|
|
+ };
|
|
|
|
+
|
2023-04-22 06:07:24 +00:00
|
|
|
+
|
|
|
|
+ vcc1v8_dvp: LDO_REG2 {
|
|
|
|
+ regulator-name = "vcc1v8_dvp";
|
2023-02-08 12:49:27 +00:00
|
|
|
+ regulator-always-on;
|
|
|
|
+ regulator-boot-on;
|
2023-04-22 06:07:24 +00:00
|
|
|
+ regulator-min-microvolt = <1800000>;
|
|
|
|
+ regulator-max-microvolt = <1800000>;
|
2023-02-08 12:49:27 +00:00
|
|
|
+
|
|
|
|
+ regulator-state-mem {
|
2023-04-22 06:07:24 +00:00
|
|
|
+ regulator-off-in-suspend;
|
2023-02-08 12:49:27 +00:00
|
|
|
+ };
|
|
|
|
+ };
|
|
|
|
+
|
|
|
|
+ vcc1v8_pmu: LDO_REG3 {
|
|
|
|
+ regulator-name = "vcc1v8_pmu";
|
|
|
|
+ regulator-always-on;
|
|
|
|
+ regulator-boot-on;
|
|
|
|
+ regulator-min-microvolt = <1800000>;
|
|
|
|
+ regulator-max-microvolt = <1800000>;
|
|
|
|
+
|
|
|
|
+ regulator-state-mem {
|
|
|
|
+ regulator-on-in-suspend;
|
|
|
|
+ regulator-suspend-microvolt = <1800000>;
|
|
|
|
+ };
|
|
|
|
+ };
|
|
|
|
+
|
|
|
|
+ vcc_sdio: LDO_REG4 {
|
|
|
|
+ regulator-name = "vcc_sdio";
|
|
|
|
+ regulator-always-on;
|
|
|
|
+ regulator-boot-on;
|
2023-04-22 06:07:24 +00:00
|
|
|
+ regulator-min-microvolt = <1800000>;
|
2023-02-08 12:49:27 +00:00
|
|
|
+ regulator-max-microvolt = <3000000>;
|
|
|
|
+
|
|
|
|
+ regulator-state-mem {
|
|
|
|
+ regulator-on-in-suspend;
|
|
|
|
+ regulator-suspend-microvolt = <3000000>;
|
|
|
|
+ };
|
|
|
|
+ };
|
|
|
|
+
|
|
|
|
+ vcca3v0_codec: LDO_REG5 {
|
|
|
|
+ regulator-name = "vcca3v0_codec";
|
|
|
|
+ regulator-always-on;
|
|
|
|
+ regulator-boot-on;
|
|
|
|
+ regulator-min-microvolt = <3000000>;
|
|
|
|
+ regulator-max-microvolt = <3000000>;
|
|
|
|
+
|
|
|
|
+ regulator-state-mem {
|
|
|
|
+ regulator-off-in-suspend;
|
|
|
|
+ };
|
|
|
|
+ };
|
|
|
|
+
|
|
|
|
+ vcc_1v5: LDO_REG6 {
|
|
|
|
+ regulator-name = "vcc_1v5";
|
|
|
|
+ regulator-always-on;
|
|
|
|
+ regulator-boot-on;
|
|
|
|
+ regulator-min-microvolt = <1500000>;
|
|
|
|
+ regulator-max-microvolt = <1500000>;
|
|
|
|
+
|
|
|
|
+ regulator-state-mem {
|
2023-04-22 06:07:24 +00:00
|
|
|
+ regulator-on-in-suspend;
|
|
|
|
+ regulator-suspend-microvolt = <1500000>;
|
2023-02-08 12:49:27 +00:00
|
|
|
+ };
|
|
|
|
+ };
|
|
|
|
+
|
2023-04-22 06:07:24 +00:00
|
|
|
+ vcca1v8_codec: LDO_REG7 {
|
|
|
|
+ regulator-name = "vcca1v8_codec";
|
2023-02-08 12:49:27 +00:00
|
|
|
+ regulator-always-on;
|
|
|
|
+ regulator-boot-on;
|
|
|
|
+ regulator-min-microvolt = <1800000>;
|
|
|
|
+ regulator-max-microvolt = <1800000>;
|
|
|
|
+
|
|
|
|
+ regulator-state-mem {
|
|
|
|
+ regulator-off-in-suspend;
|
|
|
|
+ };
|
|
|
|
+ };
|
|
|
|
+
|
|
|
|
+ vcc_3v0: LDO_REG8 {
|
|
|
|
+ regulator-name = "vcc_3v0";
|
|
|
|
+ regulator-always-on;
|
|
|
|
+ regulator-boot-on;
|
|
|
|
+ regulator-min-microvolt = <3000000>;
|
|
|
|
+ regulator-max-microvolt = <3000000>;
|
|
|
|
+
|
|
|
|
+ regulator-state-mem {
|
|
|
|
+ regulator-on-in-suspend;
|
|
|
|
+ regulator-suspend-microvolt = <3000000>;
|
|
|
|
+ };
|
|
|
|
+ };
|
|
|
|
+
|
2023-04-22 06:07:24 +00:00
|
|
|
+ vcc3v3_s3: vcc_lan: SWITCH_REG1 {
|
|
|
|
+ regulator-name = "vcc3v3_s3";
|
2023-02-08 12:49:27 +00:00
|
|
|
+ regulator-always-on;
|
|
|
|
+ regulator-boot-on;
|
|
|
|
+
|
|
|
|
+ regulator-state-mem {
|
|
|
|
+ regulator-off-in-suspend;
|
|
|
|
+ };
|
|
|
|
+ };
|
|
|
|
+
|
|
|
|
+ vcc3v3_s0: SWITCH_REG2 {
|
2023-04-22 06:07:24 +00:00
|
|
|
+ regulator-name = "vcc3v3_s0";
|
2023-02-08 12:49:27 +00:00
|
|
|
+ regulator-always-on;
|
|
|
|
+ regulator-boot-on;
|
|
|
|
+
|
|
|
|
+ regulator-state-mem {
|
|
|
|
+ regulator-off-in-suspend;
|
|
|
|
+ };
|
|
|
|
+ };
|
|
|
|
+ };
|
|
|
|
+ };
|
|
|
|
+
|
|
|
|
+ vdd_cpu_b: regulator@40 {
|
|
|
|
+ compatible = "silergy,syr827";
|
|
|
|
+ reg = <0x40>;
|
2023-04-22 06:07:24 +00:00
|
|
|
+ fcs,suspend-voltage-selector = <0>;
|
2023-02-08 12:49:27 +00:00
|
|
|
+ regulator-name = "vdd_cpu_b";
|
|
|
|
+ regulator-min-microvolt = <712500>;
|
|
|
|
+ regulator-max-microvolt = <1500000>;
|
|
|
|
+ regulator-ramp-delay = <1000>;
|
|
|
|
+ regulator-always-on;
|
|
|
|
+ regulator-boot-on;
|
2023-04-22 06:07:24 +00:00
|
|
|
+ vin-supply = <&vcc_sys>;
|
2023-02-08 12:49:27 +00:00
|
|
|
+
|
|
|
|
+ regulator-state-mem {
|
|
|
|
+ regulator-off-in-suspend;
|
|
|
|
+ };
|
|
|
|
+ };
|
|
|
|
+
|
|
|
|
+ vdd_gpu: regulator@41 {
|
|
|
|
+ compatible = "silergy,syr828";
|
|
|
|
+ reg = <0x41>;
|
|
|
|
+ fcs,suspend-voltage-selector = <1>;
|
|
|
|
+ regulator-name = "vdd_gpu";
|
|
|
|
+ regulator-min-microvolt = <712500>;
|
|
|
|
+ regulator-max-microvolt = <1500000>;
|
|
|
|
+ regulator-ramp-delay = <1000>;
|
|
|
|
+ regulator-always-on;
|
|
|
|
+ regulator-boot-on;
|
2023-04-22 06:07:24 +00:00
|
|
|
+ vin-supply = <&vcc_sys>;
|
2023-02-08 12:49:27 +00:00
|
|
|
+
|
|
|
|
+ regulator-state-mem {
|
|
|
|
+ regulator-off-in-suspend;
|
|
|
|
+ };
|
|
|
|
+ };
|
|
|
|
+};
|
|
|
|
+
|
|
|
|
+&i2c1 {
|
|
|
|
+ i2c-scl-rising-time-ns = <300>;
|
|
|
|
+ i2c-scl-falling-time-ns = <15>;
|
|
|
|
+ status = "okay";
|
|
|
|
+
|
2023-04-22 06:07:24 +00:00
|
|
|
+ es8316: codec@11 {
|
|
|
|
+ compatible = "everest,es8316";
|
|
|
|
+ reg = <0x11>;
|
|
|
|
+ clocks = <&cru SCLK_I2S_8CH_OUT>;
|
|
|
|
+ clock-names = "mclk";
|
|
|
|
+ #sound-dai-cells = <0>;
|
|
|
|
+ pinctrl-0 = <&i2s_8ch_mclk>;
|
|
|
|
+ spk-con-gpio = <&gpio3 RK_PD6 GPIO_ACTIVE_HIGH>;
|
|
|
|
+ hp-det-gpio = <&gpio3 RK_PD7 GPIO_ACTIVE_HIGH>;
|
2023-02-08 12:49:27 +00:00
|
|
|
+
|
2023-04-22 06:07:24 +00:00
|
|
|
+ port {
|
|
|
|
+ es8316_p0_0: endpoint {
|
|
|
|
+ remote-endpoint = <&i2s0_p0_0>;
|
|
|
|
+ };
|
|
|
|
+ };
|
|
|
|
+ };
|
2023-02-08 12:49:27 +00:00
|
|
|
+};
|
|
|
|
+
|
2023-04-22 06:07:24 +00:00
|
|
|
+&i2c2 {
|
2023-02-08 12:49:27 +00:00
|
|
|
+ status = "okay";
|
|
|
|
+};
|
|
|
|
+
|
|
|
|
+&i2s0 {
|
|
|
|
+ rockchip,playback-channels = <8>;
|
|
|
|
+ rockchip,capture-channels = <8>;
|
|
|
|
+ status = "okay";
|
2023-04-22 06:07:24 +00:00
|
|
|
+
|
|
|
|
+ i2s0_p0: port {
|
|
|
|
+ i2s0_p0_0: endpoint {
|
|
|
|
+ dai-format = "i2s";
|
|
|
|
+ mclk-fs = <256>;
|
|
|
|
+ remote-endpoint = <&es8316_p0_0>;
|
|
|
|
+ };
|
|
|
|
+ };
|
|
|
|
+};
|
|
|
|
+
|
|
|
|
+&i2s1 {
|
|
|
|
+ rockchip,playback-channels = <2>;
|
|
|
|
+ rockchip,capture-channels = <2>;
|
|
|
|
+ status = "okay";
|
2023-02-08 12:49:27 +00:00
|
|
|
+};
|
|
|
|
+
|
|
|
|
+&i2s2 {
|
|
|
|
+ status = "okay";
|
|
|
|
+};
|
|
|
|
+
|
|
|
|
+&io_domains {
|
|
|
|
+ status = "okay";
|
|
|
|
+
|
2023-04-22 06:07:24 +00:00
|
|
|
+ bt656-supply = <&vcc1v8_dvp>;
|
|
|
|
+ audio-supply = <&vcca1v8_codec>;
|
2023-02-08 12:49:27 +00:00
|
|
|
+ sdmmc-supply = <&vcc_sdio>;
|
|
|
|
+ gpio1830-supply = <&vcc_3v0>;
|
|
|
|
+};
|
|
|
|
+
|
2023-04-22 06:07:24 +00:00
|
|
|
+&pcie_phy {
|
2023-02-08 12:49:27 +00:00
|
|
|
+ status = "okay";
|
2023-04-22 06:07:24 +00:00
|
|
|
+};
|
2023-02-08 12:49:27 +00:00
|
|
|
+
|
2023-04-22 06:07:24 +00:00
|
|
|
+&pcie0 {
|
|
|
|
+ ep-gpios = <&gpio4 RK_PD3 GPIO_ACTIVE_HIGH>;
|
|
|
|
+ num-lanes = <4>;
|
|
|
|
+ pinctrl-names = "default";
|
|
|
|
+ pinctrl-0 = <&pcie_clkreqn_cpm>;
|
|
|
|
+ status = "okay";
|
|
|
|
+ vpcie3v3-supply = <&vcc3v3_pcie>;
|
|
|
|
+};
|
|
|
|
+
|
|
|
|
+&pmu_io_domains {
|
2023-02-08 12:49:27 +00:00
|
|
|
+ pmu1830-supply = <&vcc_3v0>;
|
2023-04-22 06:07:24 +00:00
|
|
|
+ status = "okay";
|
2023-02-08 12:49:27 +00:00
|
|
|
+};
|
|
|
|
+
|
|
|
|
+&pinctrl {
|
2023-04-22 06:07:24 +00:00
|
|
|
+ i2s0 {
|
|
|
|
+ i2s_8ch_mclk: i2s-8ch-mclk {
|
|
|
|
+ rockchip,pins = <4 RK_PB4 1 &pcfg_pull_none>;
|
|
|
|
+ };
|
|
|
|
+ };
|
|
|
|
+
|
|
|
|
+ leds {
|
|
|
|
+ work_led_pin: work-led-pin {
|
|
|
|
+ rockchip,pins = <0 RK_PB4 RK_FUNC_GPIO &pcfg_pull_none>;
|
|
|
|
+ };
|
|
|
|
+
|
|
|
|
+ diy_led_pin: diy-led-pin {
|
|
|
|
+ rockchip,pins = <0 RK_PB5 RK_FUNC_GPIO &pcfg_pull_none>;
|
|
|
|
+ };
|
|
|
|
+ };
|
|
|
|
+
|
|
|
|
+ pcie {
|
|
|
|
+ pcie_pwr_en: pcie-pwr-en {
|
|
|
|
+ rockchip,pins = <4 RK_PD5 RK_FUNC_GPIO &pcfg_pull_up>;
|
|
|
|
+ };
|
|
|
|
+
|
|
|
|
+ pcie_3g_drv: pcie-3g-drv {
|
|
|
|
+ rockchip,pins = <0 RK_PA2 RK_FUNC_GPIO &pcfg_pull_up>;
|
2023-02-08 12:49:27 +00:00
|
|
|
+ };
|
|
|
|
+ };
|
|
|
|
+
|
|
|
|
+ pmic {
|
|
|
|
+ pmic_int_l: pmic-int-l {
|
|
|
|
+ rockchip,pins = <1 RK_PC5 RK_FUNC_GPIO &pcfg_pull_up>;
|
|
|
|
+ };
|
|
|
|
+
|
|
|
|
+ vsel1_pin: vsel1-pin {
|
2023-04-22 06:07:24 +00:00
|
|
|
+ rockchip,pins = <1 RK_PC2 RK_FUNC_GPIO &pcfg_pull_down>;
|
2023-02-08 12:49:27 +00:00
|
|
|
+ };
|
|
|
|
+
|
|
|
|
+ vsel2_pin: vsel2-pin {
|
|
|
|
+ rockchip,pins = <1 RK_PB6 RK_FUNC_GPIO &pcfg_pull_down>;
|
|
|
|
+ };
|
|
|
|
+ };
|
|
|
|
+
|
2023-04-22 06:07:24 +00:00
|
|
|
+ sdio-pwrseq {
|
2023-02-08 12:49:27 +00:00
|
|
|
+ wifi_enable_h: wifi-enable-h {
|
2023-04-22 06:07:24 +00:00
|
|
|
+ rockchip,pins = <0 RK_PB2 RK_FUNC_GPIO &pcfg_pull_none>;
|
2023-02-08 12:49:27 +00:00
|
|
|
+ };
|
|
|
|
+ };
|
|
|
|
+
|
2023-04-22 06:07:24 +00:00
|
|
|
+ usb2 {
|
|
|
|
+ vcc5v0_host_en: vcc5v0-host-en {
|
|
|
|
+ rockchip,pins = <1 RK_PA0 RK_FUNC_GPIO &pcfg_pull_up>;
|
2023-02-08 12:49:27 +00:00
|
|
|
+ };
|
|
|
|
+
|
2023-04-22 06:07:24 +00:00
|
|
|
+ vcc5v0_host3_en: vcc5v0-host3-en {
|
|
|
|
+ rockchip,pins = <1 RK_PA3 RK_FUNC_GPIO &pcfg_pull_up>;
|
2023-02-08 12:49:27 +00:00
|
|
|
+ };
|
|
|
|
+
|
2023-04-22 06:07:24 +00:00
|
|
|
+ vcc5v0_hub_en: vcc5v0-hub-en {
|
|
|
|
+ rockchip,pins = <4 RK_PD6 RK_FUNC_GPIO &pcfg_pull_up>;
|
2023-02-08 12:49:27 +00:00
|
|
|
+ };
|
|
|
|
+ };
|
|
|
|
+};
|
|
|
|
+
|
|
|
|
+&pwm0 {
|
|
|
|
+ status = "okay";
|
|
|
|
+};
|
|
|
|
+
|
|
|
|
+&pwm2 {
|
|
|
|
+ status = "okay";
|
|
|
|
+};
|
|
|
|
+
|
|
|
|
+&saradc {
|
2023-04-22 06:07:24 +00:00
|
|
|
+ vref-supply = <&vcca1v8_s3>;
|
2023-02-08 12:49:27 +00:00
|
|
|
+ status = "okay";
|
|
|
|
+};
|
|
|
|
+
|
|
|
|
+&sdio0 {
|
2023-04-22 06:07:24 +00:00
|
|
|
+ /* WiFi & BT combo module Ampak AP6356S */
|
2023-02-08 12:49:27 +00:00
|
|
|
+ bus-width = <4>;
|
|
|
|
+ cap-sdio-irq;
|
|
|
|
+ cap-sd-highspeed;
|
|
|
|
+ keep-power-in-suspend;
|
|
|
|
+ mmc-pwrseq = <&sdio_pwrseq>;
|
|
|
|
+ non-removable;
|
|
|
|
+ pinctrl-names = "default";
|
|
|
|
+ pinctrl-0 = <&sdio0_bus4 &sdio0_cmd &sdio0_clk>;
|
|
|
|
+ sd-uhs-sdr104;
|
2023-04-22 06:07:24 +00:00
|
|
|
+
|
|
|
|
+ /* Power supply */
|
|
|
|
+ vqmmc-supply = <&vcc1v8_s3>; /* IO line */
|
|
|
|
+ vmmc-supply = <&vcc_sdio>; /* card's power */
|
|
|
|
+
|
|
|
|
+ #address-cells = <1>;
|
|
|
|
+ #size-cells = <0>;
|
2023-02-08 12:49:27 +00:00
|
|
|
+ status = "okay";
|
|
|
|
+};
|
|
|
|
+
|
|
|
|
+&sdmmc {
|
|
|
|
+ bus-width = <4>;
|
|
|
|
+ cap-mmc-highspeed;
|
|
|
|
+ cap-sd-highspeed;
|
2023-04-22 06:07:24 +00:00
|
|
|
+ cd-gpios = <&gpio0 7 GPIO_ACTIVE_LOW>;
|
2023-02-08 12:49:27 +00:00
|
|
|
+ disable-wp;
|
|
|
|
+ max-frequency = <150000000>;
|
|
|
|
+ pinctrl-names = "default";
|
2023-04-22 06:07:24 +00:00
|
|
|
+ pinctrl-0 = <&sdmmc_clk &sdmmc_cmd &sdmmc_bus4>;
|
2023-02-08 12:49:27 +00:00
|
|
|
+ status = "okay";
|
|
|
|
+};
|
|
|
|
+
|
|
|
|
+&sdhci {
|
|
|
|
+ bus-width = <8>;
|
|
|
|
+ mmc-hs400-1_8v;
|
|
|
|
+ mmc-hs400-enhanced-strobe;
|
|
|
|
+ non-removable;
|
|
|
|
+ status = "okay";
|
|
|
|
+};
|
|
|
|
+
|
2023-04-22 06:07:24 +00:00
|
|
|
+&spdif {
|
|
|
|
+ pinctrl-0 = <&spdif_bus_1>;
|
|
|
|
+ status = "okay";
|
|
|
|
+
|
|
|
|
+ spdif_p0: port {
|
|
|
|
+ spdif_p0_0: endpoint {
|
|
|
|
+ remote-endpoint = <&dit_p0_0>;
|
|
|
|
+ };
|
|
|
|
+ };
|
|
|
|
+};
|
|
|
|
+
|
2023-02-08 12:49:27 +00:00
|
|
|
+&tcphy0 {
|
|
|
|
+ status = "okay";
|
|
|
|
+};
|
|
|
|
+
|
|
|
|
+&tcphy1 {
|
|
|
|
+ status = "okay";
|
|
|
|
+};
|
|
|
|
+
|
|
|
|
+&tsadc {
|
|
|
|
+ /* tshut mode 0:CRU 1:GPIO */
|
|
|
|
+ rockchip,hw-tshut-mode = <1>;
|
|
|
|
+ /* tshut polarity 0:LOW 1:HIGH */
|
|
|
|
+ rockchip,hw-tshut-polarity = <1>;
|
2023-04-22 06:07:24 +00:00
|
|
|
+ status = "okay";
|
2023-02-08 12:49:27 +00:00
|
|
|
+};
|
|
|
|
+
|
|
|
|
+&u2phy0 {
|
|
|
|
+ status = "okay";
|
|
|
|
+};
|
|
|
|
+
|
|
|
|
+&u2phy0_otg {
|
|
|
|
+ status = "okay";
|
|
|
|
+};
|
|
|
|
+
|
|
|
|
+&u2phy0_host {
|
2023-04-22 06:07:24 +00:00
|
|
|
+ phy-supply = <&vcc5v0_host>;
|
2023-02-08 12:49:27 +00:00
|
|
|
+ status = "okay";
|
|
|
|
+};
|
|
|
|
+
|
|
|
|
+&u2phy1 {
|
|
|
|
+ status = "okay";
|
|
|
|
+};
|
|
|
|
+
|
|
|
|
+&u2phy1_otg {
|
|
|
|
+ status = "okay";
|
|
|
|
+};
|
|
|
|
+
|
|
|
|
+&u2phy1_host {
|
2023-04-22 06:07:24 +00:00
|
|
|
+ phy-supply = <&vcc5v0_host>;
|
2023-02-08 12:49:27 +00:00
|
|
|
+ status = "okay";
|
|
|
|
+};
|
|
|
|
+
|
|
|
|
+&uart0 {
|
|
|
|
+ pinctrl-names = "default";
|
2023-04-22 06:07:24 +00:00
|
|
|
+ pinctrl-0 = <&uart0_xfer &uart0_cts>;
|
|
|
|
+ status = "okay";
|
2023-02-08 12:49:27 +00:00
|
|
|
+};
|
|
|
|
+
|
|
|
|
+&uart2 {
|
|
|
|
+ status = "okay";
|
|
|
|
+};
|
|
|
|
+
|
|
|
|
+&usb_host0_ehci {
|
|
|
|
+ status = "okay";
|
|
|
|
+};
|
|
|
|
+
|
|
|
|
+&usb_host0_ohci {
|
|
|
|
+ status = "okay";
|
|
|
|
+};
|
|
|
|
+
|
|
|
|
+&usb_host1_ehci {
|
|
|
|
+ status = "okay";
|
|
|
|
+};
|
|
|
|
+
|
|
|
|
+&usb_host1_ohci {
|
|
|
|
+ status = "okay";
|
|
|
|
+};
|
|
|
|
+
|
|
|
|
+&usbdrd3_0 {
|
|
|
|
+ status = "okay";
|
|
|
|
+};
|
|
|
|
+
|
|
|
|
+&usbdrd_dwc3_0 {
|
|
|
|
+ status = "okay";
|
2023-04-22 06:07:24 +00:00
|
|
|
+ dr_mode = "otg";
|
2023-02-08 12:49:27 +00:00
|
|
|
+};
|
|
|
|
+
|
|
|
|
+&usbdrd3_1 {
|
|
|
|
+ status = "okay";
|
|
|
|
+};
|
|
|
|
+
|
|
|
|
+&usbdrd_dwc3_1 {
|
|
|
|
+ status = "okay";
|
|
|
|
+ dr_mode = "host";
|
|
|
|
+};
|
|
|
|
+
|
|
|
|
+&vopb {
|
|
|
|
+ status = "okay";
|
|
|
|
+};
|
|
|
|
+
|
|
|
|
+&vopb_mmu {
|
|
|
|
+ status = "okay";
|
|
|
|
+};
|
|
|
|
+
|
|
|
|
+&vopl {
|
|
|
|
+ status = "okay";
|
|
|
|
+};
|
|
|
|
+
|
|
|
|
+&vopl_mmu {
|
|
|
|
+ status = "okay";
|
|
|
|
+};
|
|
|
|
--- /dev/null
|
2023-04-22 06:07:24 +00:00
|
|
|
+++ b/arch/arm/dts/rk3399-h3399pc-u-boot.dtsi
|
2023-02-08 12:49:27 +00:00
|
|
|
@@ -0,0 +1,14 @@
|
|
|
|
+// SPDX-License-Identifier: GPL-2.0+
|
|
|
|
+
|
|
|
|
+#include "rk3399-u-boot.dtsi"
|
2023-04-22 06:07:24 +00:00
|
|
|
+#include "rk3399-sdram-ddr3-1600.dtsi"
|
2023-02-08 12:49:27 +00:00
|
|
|
+
|
|
|
|
+/ {
|
|
|
|
+ chosen {
|
|
|
|
+ u-boot,spl-boot-order = "same-as-spl", &sdhci, &sdmmc;
|
|
|
|
+ };
|
|
|
|
+};
|
|
|
|
+
|
|
|
|
+&sdmmc {
|
|
|
|
+ pinctrl-0 = <&sdmmc_bus4 &sdmmc_clk &sdmmc_cmd &sdmmc_cd>;
|
|
|
|
+};
|
|
|
|
--- /dev/null
|
2023-04-22 06:07:24 +00:00
|
|
|
+++ b/configs/sharevdi-h3399pc-rk3399_defconfig
|
|
|
|
@@ -0,0 +1,72 @@
|
2023-02-08 12:49:27 +00:00
|
|
|
+CONFIG_ARM=y
|
|
|
|
+CONFIG_SKIP_LOWLEVEL_INIT=y
|
|
|
|
+CONFIG_COUNTER_FREQUENCY=24000000
|
|
|
|
+CONFIG_ARCH_ROCKCHIP=y
|
2023-04-22 06:07:24 +00:00
|
|
|
+CONFIG_TEXT_BASE=0x00200000
|
|
|
|
+CONFIG_NR_DRAM_BANKS=1
|
|
|
|
+CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y
|
|
|
|
+CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x300000
|
2023-02-08 12:49:27 +00:00
|
|
|
+CONFIG_ENV_OFFSET=0x3F8000
|
2023-04-22 06:07:24 +00:00
|
|
|
+CONFIG_DEFAULT_DEVICE_TREE="rk3399-h3399pc"
|
2023-02-08 12:49:27 +00:00
|
|
|
+CONFIG_ROCKCHIP_RK3399=y
|
|
|
|
+CONFIG_TARGET_EVB_RK3399=y
|
2023-04-22 06:07:24 +00:00
|
|
|
+CONFIG_SPL_STACK=0x400000
|
2023-02-08 12:49:27 +00:00
|
|
|
+CONFIG_DEBUG_UART_BASE=0xFF1A0000
|
|
|
|
+CONFIG_DEBUG_UART_CLOCK=24000000
|
2023-04-22 06:07:24 +00:00
|
|
|
+CONFIG_SYS_LOAD_ADDR=0x800800
|
2023-02-08 12:49:27 +00:00
|
|
|
+CONFIG_DEBUG_UART=y
|
2023-04-22 06:07:24 +00:00
|
|
|
+CONFIG_DEFAULT_FDT_FILE="rockchip/rk3399-h3399pc.dtb"
|
2023-02-08 12:49:27 +00:00
|
|
|
+CONFIG_DISPLAY_BOARDINFO_LATE=y
|
2023-04-22 06:07:24 +00:00
|
|
|
+CONFIG_SPL_MAX_SIZE=0x2e000
|
|
|
|
+CONFIG_SPL_PAD_TO=0x7f8000
|
|
|
|
+CONFIG_SPL_HAS_BSS_LINKER_SECTION=y
|
|
|
|
+CONFIG_SPL_BSS_START_ADDR=0x400000
|
|
|
|
+CONFIG_SPL_BSS_MAX_SIZE=0x2000
|
2023-02-08 12:49:27 +00:00
|
|
|
+# CONFIG_SPL_RAW_IMAGE_SUPPORT is not set
|
2023-04-22 06:07:24 +00:00
|
|
|
+# CONFIG_SPL_SHARES_INIT_SP_ADDR is not set
|
2023-02-08 12:49:27 +00:00
|
|
|
+CONFIG_SPL_STACK_R=y
|
|
|
|
+CONFIG_SPL_STACK_R_MALLOC_SIMPLE_LEN=0x10000
|
|
|
|
+CONFIG_TPL=y
|
|
|
|
+CONFIG_CMD_BOOTZ=y
|
|
|
|
+CONFIG_CMD_GPT=y
|
|
|
|
+CONFIG_CMD_MMC=y
|
|
|
|
+CONFIG_CMD_USB=y
|
|
|
|
+# CONFIG_CMD_SETEXPR is not set
|
|
|
|
+CONFIG_CMD_TIME=y
|
|
|
|
+CONFIG_SPL_OF_CONTROL=y
|
|
|
|
+CONFIG_OF_SPL_REMOVE_PROPS="pinctrl-0 pinctrl-names clock-names interrupt-parent assigned-clocks assigned-clock-rates assigned-clock-parents"
|
|
|
|
+CONFIG_ENV_IS_IN_MMC=y
|
|
|
|
+CONFIG_SYS_RELOC_GD_ENV_ADDR=y
|
|
|
|
+CONFIG_ROCKCHIP_GPIO=y
|
|
|
|
+CONFIG_SYS_I2C_ROCKCHIP=y
|
|
|
|
+CONFIG_MMC_DW=y
|
|
|
|
+CONFIG_MMC_DW_ROCKCHIP=y
|
|
|
|
+CONFIG_MMC_SDHCI=y
|
|
|
|
+CONFIG_MMC_SDHCI_ROCKCHIP=y
|
|
|
|
+CONFIG_ETH_DESIGNWARE=y
|
|
|
|
+CONFIG_GMAC_ROCKCHIP=y
|
|
|
|
+CONFIG_PMIC_RK8XX=y
|
|
|
|
+CONFIG_REGULATOR_PWM=y
|
|
|
|
+CONFIG_REGULATOR_RK8XX=y
|
|
|
|
+CONFIG_PWM_ROCKCHIP=y
|
|
|
|
+CONFIG_BAUDRATE=1500000
|
|
|
|
+CONFIG_DEBUG_UART_SHIFT=2
|
2023-04-22 06:07:24 +00:00
|
|
|
+CONFIG_SYS_NS16550_MEM32=y
|
2023-02-08 12:49:27 +00:00
|
|
|
+CONFIG_SYSRESET=y
|
|
|
|
+CONFIG_USB=y
|
|
|
|
+CONFIG_USB_XHCI_HCD=y
|
|
|
|
+CONFIG_USB_XHCI_DWC3=y
|
|
|
|
+CONFIG_USB_EHCI_HCD=y
|
|
|
|
+CONFIG_USB_EHCI_GENERIC=y
|
|
|
|
+CONFIG_USB_HOST_ETHER=y
|
|
|
|
+CONFIG_USB_ETHER_ASIX=y
|
|
|
|
+CONFIG_USB_ETHER_ASIX88179=y
|
|
|
|
+CONFIG_USB_ETHER_MCS7830=y
|
|
|
|
+CONFIG_USB_ETHER_RTL8152=y
|
|
|
|
+CONFIG_USB_ETHER_SMSC95XX=y
|
2023-04-22 06:07:24 +00:00
|
|
|
+CONFIG_VIDEO=y
|
2023-02-08 12:49:27 +00:00
|
|
|
+CONFIG_DISPLAY=y
|
|
|
|
+CONFIG_VIDEO_ROCKCHIP=y
|
|
|
|
+CONFIG_DISPLAY_ROCKCHIP_HDMI=y
|
|
|
|
+CONFIG_SPL_TINY_MEMSET=y
|
|
|
|
+CONFIG_ERRNO_STR=y
|