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Update qcom-ipq4019-nhx4019.dts

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This commit is contained in:
suyuan168 2022-07-03 02:40:30 +08:00
parent b063bd11ab
commit 12a43b67bf
1 changed files with 18 additions and 18 deletions
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36
root/target/linux/ipq40xx/files/arch/arm/boot/dts/qcom-ipq4019-nhx4019.dts
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@ -38,7 +38,7 @@
status = "okay"; status = "okay";
pinctrl-0 = <&mdio_pins>; pinctrl-0 = <&mdio_pins>;
pinctrl-names = "default"; pinctrl-names = "default";
reset-gpios = <&gpio 47 GPIO_ACTIVE_LOW>; reset-gpios = <&tlmm 47 GPIO_ACTIVE_LOW>;
reset-delay-us = <2000>; reset-delay-us = <2000>;
}; };
@ -100,42 +100,42 @@
led_sys: status { led_sys: status {
label = "nhx:system"; label = "nhx:system";
gpios = <&gpio 4 GPIO_ACTIVE_HIGH>; gpio = <&tlmm 4 GPIO_ACTIVE_HIGH>;
}; };
lte1 { lte1 {
label = "nhx:5g1"; label = "nhx:5g1";
gpios = <&gpio 3 GPIO_ACTIVE_HIGH>; gpio = <&tlmm 3 GPIO_ACTIVE_HIGH>;
}; };
lterssi1 { lterssi1 {
label = "nhx:5g2"; label = "nhx:5g2";
gpios = <&gpio 2 GPIO_ACTIVE_HIGH>; gpio = <&tlmm 2 GPIO_ACTIVE_HIGH>;
}; };
lterssi2 { lterssi2 {
label = "nhx:5g3"; label = "nhx:5g3";
gpios = <&gpio 1 GPIO_ACTIVE_HIGH>; gpio = <&tlmm 1 GPIO_ACTIVE_HIGH>;
}; };
lterssi3 { lterssi3 {
label = "nhx:wifi2"; label = "nhx:wifi2";
gpios = <&gpio 36 GPIO_ACTIVE_HIGH>; gpio = <&tlmm 36 GPIO_ACTIVE_HIGH>;
}; };
wifi { wifi {
label = "nhx:wifi5"; label = "nhx:wifi5";
gpios = <&gpio 37 GPIO_ACTIVE_HIGH>; gpio = <&tlmm 37 GPIO_ACTIVE_HIGH>;
}; };
err { err {
label = "nhx:net"; label = "nhx:net";
gpios = <&gpio 44 GPIO_ACTIVE_HIGH>; gpio = <&tlmm 44 GPIO_ACTIVE_HIGH>;
}; };
net { net {
label = "nhx:xnet"; label = "nhx:xnet";
gpios = <&gpio 0 GPIO_ACTIVE_HIGH>; gpio = <&tlmm 0 GPIO_ACTIVE_HIGH>;
}; };
}; };
@ -144,7 +144,7 @@
reset { reset {
label = "reset"; label = "reset";
gpios = <&gpio 18 GPIO_ACTIVE_LOW>; gpios = <&tlmm 18 GPIO_ACTIVE_LOW>;
linux,code = <KEY_RESTART>; linux,code = <KEY_RESTART>;
}; };
}; };
@ -156,48 +156,48 @@
3vpower { 3vpower {
gpio-export,name = "3vpower"; gpio-export,name = "3vpower";
gpio-export,output = <1>; gpio-export,output = <1>;
gpios = <&gpio 19 GPIO_ACTIVE_HIGH>; gpio = <&tlmm 19 GPIO_ACTIVE_HIGH>;
}; };
m2power { m2power {
gpio-export,name = "m2power"; gpio-export,name = "m2power";
gpio-export,output = <1>; gpio-export,output = <1>;
gpios = <&gpio 48 GPIO_ACTIVE_LOW>; gpio = <&tlmm 48 GPIO_ACTIVE_LOW>;
}; };
m2reset { m2reset {
gpio-export,name = "m2reset"; gpio-export,name = "m2reset";
gpio-export,output = <1>; gpio-export,output = <1>;
gpios = <&gpio 49 GPIO_ACTIVE_LOW>; gpio = <&tlmm 49 GPIO_ACTIVE_LOW>;
}; };
m2dcpower { m2dcpower {
gpio-export,name = "m2dcpower"; gpio-export,name = "m2dcpower";
gpio-export,output = <1>; gpio-export,output = <1>;
gpios = <&gpio 51 GPIO_ACTIVE_HIGH>; gpio = <&tlmm 51 GPIO_ACTIVE_HIGH>;
}; };
pcie1dcpower { pcie1dcpower {
gpio-export,name = "pcie1dcpower"; gpio-export,name = "pcie1dcpower";
gpio-export,output = <1>; gpio-export,output = <1>;
gpios = <&gpio 50 GPIO_ACTIVE_HIGH>; gpio = <&tlmm 50 GPIO_ACTIVE_HIGH>;
}; };
pcie1rst { pcie1rst {
gpio-export,name = "pcie1rst"; gpio-export,name = "pcie1rst";
gpio-export,output = <1>; gpio-export,output = <1>;
gpios = <&gpio 42 GPIO_ACTIVE_LOW>; gpio = <&tlmm 42 GPIO_ACTIVE_LOW>;
}; };
pcie2dcpower { pcie2dcpower {
gpio-export,name = "pcie2dcpower"; gpio-export,name = "pcie2dcpower";
gpio-export,output = <1>; gpio-export,output = <1>;
gpios = <&gpio 46 GPIO_ACTIVE_HIGH>; gpio = <&tlmm 46 GPIO_ACTIVE_HIGH>;
}; };
pcie2rst { pcie2rst {
gpio-export,name = "pcie2rst"; gpio-export,name = "pcie2rst";
gpio-export,output = <1>; gpio-export,output = <1>;
gpios = <&gpio 43 GPIO_ACTIVE_LOW>; gpio = <&tlmm 43 GPIO_ACTIVE_LOW>;
}; };
}; };
}; };