mirror of
https://github.com/Ysurac/openmptcprouter.git
synced 2025-03-09 15:40:20 +00:00
Add a directory by kernel instead of a common root, add qnap-301w and rpi4 kernel 6.1 suppport
This commit is contained in:
Ycarus (Yannick Chabanois)
parent
e910436a7a
commit
46837ec4c0
9459 changed files with 362648 additions and 116345 deletions
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@ -0,0 +1,350 @@
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/*
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* Copyright (c) 2015 - 2016, The Linux Foundation. All rights reserved.
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*
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* Permission to use, copy, modify, and/or distribute this software for
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* any purpose with or without fee is hereby granted, provided that the
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* above copyright notice and this permission notice appear in all copies.
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* THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
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* WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
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* MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
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* ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
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* WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
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* ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT
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* OF OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
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*/
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#include <linux/ethtool.h>
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#include <linux/netdevice.h>
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#include <linux/string.h>
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#include <linux/version.h>
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#include "edma.h"
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struct edma_ethtool_stats {
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uint8_t stat_string[ETH_GSTRING_LEN];
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uint32_t stat_offset;
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};
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#define EDMA_STAT(m) offsetof(struct edma_ethtool_statistics, m)
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#define DRVINFO_LEN 32
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/* Array of strings describing statistics
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*/
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static const struct edma_ethtool_stats edma_gstrings_stats[] = {
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{"tx_q0_pkt", EDMA_STAT(tx_q0_pkt)},
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{"tx_q1_pkt", EDMA_STAT(tx_q1_pkt)},
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{"tx_q2_pkt", EDMA_STAT(tx_q2_pkt)},
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{"tx_q3_pkt", EDMA_STAT(tx_q3_pkt)},
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{"tx_q4_pkt", EDMA_STAT(tx_q4_pkt)},
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{"tx_q5_pkt", EDMA_STAT(tx_q5_pkt)},
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{"tx_q6_pkt", EDMA_STAT(tx_q6_pkt)},
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{"tx_q7_pkt", EDMA_STAT(tx_q7_pkt)},
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{"tx_q8_pkt", EDMA_STAT(tx_q8_pkt)},
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{"tx_q9_pkt", EDMA_STAT(tx_q9_pkt)},
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{"tx_q10_pkt", EDMA_STAT(tx_q10_pkt)},
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{"tx_q11_pkt", EDMA_STAT(tx_q11_pkt)},
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{"tx_q12_pkt", EDMA_STAT(tx_q12_pkt)},
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{"tx_q13_pkt", EDMA_STAT(tx_q13_pkt)},
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{"tx_q14_pkt", EDMA_STAT(tx_q14_pkt)},
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{"tx_q15_pkt", EDMA_STAT(tx_q15_pkt)},
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{"tx_q0_byte", EDMA_STAT(tx_q0_byte)},
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{"tx_q1_byte", EDMA_STAT(tx_q1_byte)},
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{"tx_q2_byte", EDMA_STAT(tx_q2_byte)},
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{"tx_q3_byte", EDMA_STAT(tx_q3_byte)},
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{"tx_q4_byte", EDMA_STAT(tx_q4_byte)},
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{"tx_q5_byte", EDMA_STAT(tx_q5_byte)},
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{"tx_q6_byte", EDMA_STAT(tx_q6_byte)},
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{"tx_q7_byte", EDMA_STAT(tx_q7_byte)},
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{"tx_q8_byte", EDMA_STAT(tx_q8_byte)},
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{"tx_q9_byte", EDMA_STAT(tx_q9_byte)},
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{"tx_q10_byte", EDMA_STAT(tx_q10_byte)},
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{"tx_q11_byte", EDMA_STAT(tx_q11_byte)},
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{"tx_q12_byte", EDMA_STAT(tx_q12_byte)},
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{"tx_q13_byte", EDMA_STAT(tx_q13_byte)},
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{"tx_q14_byte", EDMA_STAT(tx_q14_byte)},
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{"tx_q15_byte", EDMA_STAT(tx_q15_byte)},
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{"rx_q0_pkt", EDMA_STAT(rx_q0_pkt)},
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{"rx_q1_pkt", EDMA_STAT(rx_q1_pkt)},
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{"rx_q2_pkt", EDMA_STAT(rx_q2_pkt)},
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{"rx_q3_pkt", EDMA_STAT(rx_q3_pkt)},
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{"rx_q4_pkt", EDMA_STAT(rx_q4_pkt)},
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{"rx_q5_pkt", EDMA_STAT(rx_q5_pkt)},
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{"rx_q6_pkt", EDMA_STAT(rx_q6_pkt)},
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{"rx_q7_pkt", EDMA_STAT(rx_q7_pkt)},
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{"rx_q0_byte", EDMA_STAT(rx_q0_byte)},
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{"rx_q1_byte", EDMA_STAT(rx_q1_byte)},
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{"rx_q2_byte", EDMA_STAT(rx_q2_byte)},
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{"rx_q3_byte", EDMA_STAT(rx_q3_byte)},
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{"rx_q4_byte", EDMA_STAT(rx_q4_byte)},
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{"rx_q5_byte", EDMA_STAT(rx_q5_byte)},
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{"rx_q6_byte", EDMA_STAT(rx_q6_byte)},
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{"rx_q7_byte", EDMA_STAT(rx_q7_byte)},
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{"tx_desc_error", EDMA_STAT(tx_desc_error)},
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{"rx_alloc_fail_ctr", EDMA_STAT(rx_alloc_fail_ctr)},
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};
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#define EDMA_STATS_LEN ARRAY_SIZE(edma_gstrings_stats)
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/* edma_get_strset_count()
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* Get strset count
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*/
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static int edma_get_strset_count(struct net_device *netdev,
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int sset)
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{
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switch (sset) {
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case ETH_SS_STATS:
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return EDMA_STATS_LEN;
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default:
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netdev_dbg(netdev, "%s: Invalid string set", __func__);
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return -EOPNOTSUPP;
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}
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}
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/* edma_get_strings()
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* get stats string
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*/
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static void edma_get_strings(struct net_device *netdev, uint32_t stringset,
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uint8_t *data)
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{
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uint8_t *p = data;
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uint32_t i;
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switch (stringset) {
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case ETH_SS_STATS:
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for (i = 0; i < EDMA_STATS_LEN; i++) {
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memcpy(p, edma_gstrings_stats[i].stat_string,
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min((size_t)ETH_GSTRING_LEN,
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strlen(edma_gstrings_stats[i].stat_string)
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+ 1));
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p += ETH_GSTRING_LEN;
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}
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break;
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}
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}
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/* edma_get_ethtool_stats()
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* Get ethtool statistics
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*/
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static void edma_get_ethtool_stats(struct net_device *netdev,
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struct ethtool_stats *stats, uint64_t *data)
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{
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struct edma_adapter *adapter = netdev_priv(netdev);
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struct edma_common_info *edma_cinfo = adapter->edma_cinfo;
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int i;
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uint8_t *p = NULL;
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edma_read_append_stats(edma_cinfo);
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for(i = 0; i < EDMA_STATS_LEN; i++) {
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p = (uint8_t *)&(edma_cinfo->edma_ethstats) +
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edma_gstrings_stats[i].stat_offset;
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data[i] = *(uint32_t *)p;
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}
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}
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/* edma_get_drvinfo()
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* get edma driver info
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*/
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static void edma_get_drvinfo(struct net_device *dev,
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struct ethtool_drvinfo *info)
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{
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strlcpy(info->driver, "ess_edma", DRVINFO_LEN);
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strlcpy(info->bus_info, "axi", ETHTOOL_BUSINFO_LEN);
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}
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/* edma_nway_reset()
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* Reset the phy, if available.
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*/
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static int edma_nway_reset(struct net_device *netdev)
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{
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return -EINVAL;
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}
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/* edma_get_wol()
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* get wake on lan info
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*/
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static void edma_get_wol(struct net_device *netdev,
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struct ethtool_wolinfo *wol)
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{
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wol->supported = 0;
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wol->wolopts = 0;
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}
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/* edma_get_msglevel()
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* get message level.
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*/
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static uint32_t edma_get_msglevel(struct net_device *netdev)
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{
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return 0;
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}
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/* edma_get_settings()
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* Get edma settings
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*/
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static int edma_get_settings(struct net_device *netdev,
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struct ethtool_link_ksettings *cmd)
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{
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struct edma_adapter *adapter = netdev_priv(netdev);
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if (adapter->poll_required) {
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if ((adapter->forced_speed != SPEED_UNKNOWN)
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&& !(adapter->poll_required))
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return -EPERM;
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phy_ethtool_ksettings_get(adapter->phydev, cmd);
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if (linkmode_test_bit(ETHTOOL_LINK_MODE_FIBRE_BIT, adapter->phydev->advertising))
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cmd->base.port = PORT_FIBRE;
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else
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cmd->base.port = PORT_TP;
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} else {
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/* If the speed/duplex for this GMAC is forced and we
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* are not polling for link state changes, return the
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* values as specified by platform. This will be true
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* for GMACs connected to switch, and interfaces that
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* do not use a PHY.
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*/
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if (!(adapter->poll_required)) {
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if (adapter->forced_speed != SPEED_UNKNOWN) {
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/* set speed and duplex */
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cmd->base.speed = SPEED_1000;
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cmd->base.duplex = DUPLEX_FULL;
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/* Populate capabilities advertised by self */
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linkmode_zero(cmd->link_modes.advertising);
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cmd->base.autoneg = 0;
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cmd->base.port = PORT_TP;
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cmd->base.transceiver = XCVR_EXTERNAL;
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} else {
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/* non link polled and non
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* forced speed/duplex interface
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*/
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return -EIO;
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}
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}
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}
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return 0;
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}
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/* edma_set_settings()
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* Set EDMA settings
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*/
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static int edma_set_settings(struct net_device *netdev,
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const struct ethtool_link_ksettings *cmd)
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{
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struct edma_adapter *adapter = netdev_priv(netdev);
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if ((adapter->forced_speed != SPEED_UNKNOWN) &&
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!adapter->poll_required)
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return -EPERM;
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return phy_ethtool_ksettings_set(adapter->phydev, cmd);
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}
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/* edma_get_coalesce
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* get interrupt mitigation
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*/
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#if LINUX_VERSION_CODE >= KERNEL_VERSION(5,15,0)
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static int edma_get_coalesce(struct net_device *dev, struct ethtool_coalesce *ec,
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struct kernel_ethtool_coalesce *kernel_coal,
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struct netlink_ext_ack *extack)
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#else
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static int edma_get_coalesce(struct net_device *netdev,
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struct ethtool_coalesce *ec)
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#endif
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{
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u32 reg_val;
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edma_get_tx_rx_coalesce(®_val);
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/* We read the Interrupt Moderation Timer(IMT) register value,
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* use lower 16 bit for rx and higher 16 bit for Tx. We do a
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* left shift by 1, because IMT resolution timer is 2usecs.
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* Hence the value given by the register is multiplied by 2 to
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* get the actual time in usecs.
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*/
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ec->tx_coalesce_usecs = (((reg_val >> 16) & 0xffff) << 1);
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ec->rx_coalesce_usecs = ((reg_val & 0xffff) << 1);
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return 0;
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}
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/* edma_set_coalesce
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* set interrupt mitigation
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*/
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#if LINUX_VERSION_CODE >= KERNEL_VERSION(5,15,0)
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static int edma_set_coalesce(struct net_device *dev, struct ethtool_coalesce *ec,
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struct kernel_ethtool_coalesce *kernel_coal,
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struct netlink_ext_ack *extack)
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#else
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static int edma_set_coalesce(struct net_device *netdev,
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struct ethtool_coalesce *ec)
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#endif
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{
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if (ec->tx_coalesce_usecs)
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edma_change_tx_coalesce(ec->tx_coalesce_usecs);
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if (ec->rx_coalesce_usecs)
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edma_change_rx_coalesce(ec->rx_coalesce_usecs);
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return 0;
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}
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/* edma_set_priv_flags()
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* Set EDMA private flags
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*/
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static int edma_set_priv_flags(struct net_device *netdev, u32 flags)
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{
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return 0;
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}
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/* edma_get_priv_flags()
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* get edma driver flags
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*/
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static u32 edma_get_priv_flags(struct net_device *netdev)
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{
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return 0;
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}
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/* edma_get_ringparam()
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* get ring size
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*/
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static void edma_get_ringparam(struct net_device *netdev,
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struct ethtool_ringparam *ring)
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{
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struct edma_adapter *adapter = netdev_priv(netdev);
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struct edma_common_info *edma_cinfo = adapter->edma_cinfo;
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ring->tx_max_pending = edma_cinfo->tx_ring_count;
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ring->rx_max_pending = edma_cinfo->rx_ring_count;
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}
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/* Ethtool operations
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*/
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static const struct ethtool_ops edma_ethtool_ops = {
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#if LINUX_VERSION_CODE >= KERNEL_VERSION(5,7,0)
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.supported_coalesce_params = ETHTOOL_COALESCE_USECS,
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#endif
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.get_drvinfo = &edma_get_drvinfo,
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.get_link = ðtool_op_get_link,
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.get_msglevel = &edma_get_msglevel,
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.nway_reset = &edma_nway_reset,
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.get_wol = &edma_get_wol,
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.get_link_ksettings = &edma_get_settings,
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.set_link_ksettings = &edma_set_settings,
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.get_strings = &edma_get_strings,
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.get_sset_count = &edma_get_strset_count,
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.get_ethtool_stats = &edma_get_ethtool_stats,
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.get_coalesce = &edma_get_coalesce,
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.set_coalesce = &edma_set_coalesce,
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.get_priv_flags = edma_get_priv_flags,
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.set_priv_flags = edma_set_priv_flags,
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.get_ringparam = edma_get_ringparam,
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};
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/* edma_set_ethtool_ops
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* Set ethtool operations
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*/
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void edma_set_ethtool_ops(struct net_device *netdev)
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{
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netdev->ethtool_ops = &edma_ethtool_ops;
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}
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865
5.4/target/linux/ipq40xx/files/drivers/net/phy/qca807x.c
Normal file
865
5.4/target/linux/ipq40xx/files/drivers/net/phy/qca807x.c
Normal file
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@ -0,0 +1,865 @@
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// SPDX-License-Identifier: GPL-2.0-or-later
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/*
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* Copyright (c) 2020 Sartura Ltd.
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*
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* Author: Robert Marko <robert.marko@sartura.hr>
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*
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* Qualcomm QCA8072 and QCA8075 PHY driver
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*/
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#include <linux/version.h>
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#include <linux/module.h>
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#include <linux/of.h>
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#include <linux/phy.h>
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#include <linux/bitfield.h>
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#if LINUX_VERSION_CODE >= KERNEL_VERSION(5,8,0)
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#include <linux/ethtool_netlink.h>
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#endif
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#include <linux/gpio.h>
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#include <linux/sfp.h>
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#include <dt-bindings/net/qcom-qca807x.h>
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#define PHY_ID_QCA8072 0x004dd0b2
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#define PHY_ID_QCA8075 0x004dd0b1
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#define PHY_ID_QCA807X_PSGMII 0x06820805
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/* Downshift */
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#define QCA807X_SMARTSPEED_EN BIT(5)
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#define QCA807X_SMARTSPEED_RETRY_LIMIT_MASK GENMASK(4, 2)
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#define QCA807X_SMARTSPEED_RETRY_LIMIT_DEFAULT 5
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#define QCA807X_SMARTSPEED_RETRY_LIMIT_MIN 2
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#define QCA807X_SMARTSPEED_RETRY_LIMIT_MAX 9
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/* Cable diagnostic test (CDT) */
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#define QCA807X_CDT 0x16
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#define QCA807X_CDT_ENABLE BIT(15)
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#define QCA807X_CDT_ENABLE_INTER_PAIR_SHORT BIT(13)
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#define QCA807X_CDT_STATUS BIT(11)
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#define QCA807X_CDT_MMD3_STATUS 0x8064
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#define QCA807X_CDT_MDI0_STATUS_MASK GENMASK(15, 12)
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#define QCA807X_CDT_MDI1_STATUS_MASK GENMASK(11, 8)
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#define QCA807X_CDT_MDI2_STATUS_MASK GENMASK(7, 4)
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#define QCA807X_CDT_MDI3_STATUS_MASK GENMASK(3, 0)
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#define QCA807X_CDT_RESULTS_INVALID 0x0
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#define QCA807X_CDT_RESULTS_OK 0x1
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#define QCA807X_CDT_RESULTS_OPEN 0x2
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#define QCA807X_CDT_RESULTS_SAME_SHORT 0x3
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#define QCA807X_CDT_RESULTS_CROSS_SHORT_WITH_MDI1_SAME_OK 0x4
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#define QCA807X_CDT_RESULTS_CROSS_SHORT_WITH_MDI2_SAME_OK 0x8
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#define QCA807X_CDT_RESULTS_CROSS_SHORT_WITH_MDI3_SAME_OK 0xc
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#define QCA807X_CDT_RESULTS_CROSS_SHORT_WITH_MDI1_SAME_OPEN 0x6
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#define QCA807X_CDT_RESULTS_CROSS_SHORT_WITH_MDI2_SAME_OPEN 0xa
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#define QCA807X_CDT_RESULTS_CROSS_SHORT_WITH_MDI3_SAME_OPEN 0xe
|
||||
#define QCA807X_CDT_RESULTS_CROSS_SHORT_WITH_MDI1_SAME_SHORT 0x7
|
||||
#define QCA807X_CDT_RESULTS_CROSS_SHORT_WITH_MDI2_SAME_SHORT 0xb
|
||||
#define QCA807X_CDT_RESULTS_CROSS_SHORT_WITH_MDI3_SAME_SHORT 0xf
|
||||
#define QCA807X_CDT_RESULTS_BUSY 0x9
|
||||
#define QCA807X_CDT_MMD3_MDI0_LENGTH 0x8065
|
||||
#define QCA807X_CDT_MMD3_MDI1_LENGTH 0x8066
|
||||
#define QCA807X_CDT_MMD3_MDI2_LENGTH 0x8067
|
||||
#define QCA807X_CDT_MMD3_MDI3_LENGTH 0x8068
|
||||
#define QCA807X_CDT_SAME_SHORT_LENGTH_MASK GENMASK(15, 8)
|
||||
#define QCA807X_CDT_CROSS_SHORT_LENGTH_MASK GENMASK(7, 0)
|
||||
|
||||
#define QCA807X_CHIP_CONFIGURATION 0x1f
|
||||
#define QCA807X_BT_BX_REG_SEL BIT(15)
|
||||
#define QCA807X_CHIP_CONFIGURATION_MODE_CFG_MASK GENMASK(3, 0)
|
||||
#define QCA807X_CHIP_CONFIGURATION_MODE_QSGMII_SGMII 4
|
||||
#define QCA807X_CHIP_CONFIGURATION_MODE_PSGMII_FIBER 3
|
||||
#define QCA807X_CHIP_CONFIGURATION_MODE_PSGMII_ALL_COPPER 0
|
||||
|
||||
#define QCA807X_MEDIA_SELECT_STATUS 0x1a
|
||||
#define QCA807X_MEDIA_DETECTED_COPPER BIT(5)
|
||||
#define QCA807X_MEDIA_DETECTED_1000_BASE_X BIT(4)
|
||||
#define QCA807X_MEDIA_DETECTED_100_BASE_FX BIT(3)
|
||||
|
||||
#define QCA807X_MMD7_FIBER_MODE_AUTO_DETECTION 0x807e
|
||||
#define QCA807X_MMD7_FIBER_MODE_AUTO_DETECTION_EN BIT(0)
|
||||
|
||||
#define QCA807X_MMD7_1000BASE_T_POWER_SAVE_PER_CABLE_LENGTH 0x801a
|
||||
#define QCA807X_CONTROL_DAC_MASK GENMASK(2, 0)
|
||||
|
||||
#define QCA807X_MMD7_LED_100N_1 0x8074
|
||||
#define QCA807X_MMD7_LED_100N_2 0x8075
|
||||
#define QCA807X_MMD7_LED_1000N_1 0x8076
|
||||
#define QCA807X_MMD7_LED_1000N_2 0x8077
|
||||
#define QCA807X_LED_TXACT_BLK_EN_2 BIT(10)
|
||||
#define QCA807X_LED_RXACT_BLK_EN_2 BIT(9)
|
||||
#define QCA807X_LED_GT_ON_EN_2 BIT(6)
|
||||
#define QCA807X_LED_HT_ON_EN_2 BIT(5)
|
||||
#define QCA807X_LED_BT_ON_EN_2 BIT(4)
|
||||
#define QCA807X_GPIO_FORCE_EN BIT(15)
|
||||
#define QCA807X_GPIO_FORCE_MODE_MASK GENMASK(14, 13)
|
||||
|
||||
#define QCA807X_INTR_ENABLE 0x12
|
||||
#define QCA807X_INTR_STATUS 0x13
|
||||
#define QCA807X_INTR_ENABLE_AUTONEG_ERR BIT(15)
|
||||
#define QCA807X_INTR_ENABLE_SPEED_CHANGED BIT(14)
|
||||
#define QCA807X_INTR_ENABLE_DUPLEX_CHANGED BIT(13)
|
||||
#define QCA807X_INTR_ENABLE_LINK_FAIL BIT(11)
|
||||
#define QCA807X_INTR_ENABLE_LINK_SUCCESS BIT(10)
|
||||
|
||||
#define QCA807X_FUNCTION_CONTROL 0x10
|
||||
#define QCA807X_FC_MDI_CROSSOVER_MODE_MASK GENMASK(6, 5)
|
||||
#define QCA807X_FC_MDI_CROSSOVER_AUTO 3
|
||||
#define QCA807X_FC_MDI_CROSSOVER_MANUAL_MDIX 1
|
||||
#define QCA807X_FC_MDI_CROSSOVER_MANUAL_MDI 0
|
||||
|
||||
#define QCA807X_PHY_SPECIFIC_STATUS 0x11
|
||||
#define QCA807X_SS_SPEED_AND_DUPLEX_RESOLVED BIT(11)
|
||||
#define QCA807X_SS_SPEED_MASK GENMASK(15, 14)
|
||||
#define QCA807X_SS_SPEED_1000 2
|
||||
#define QCA807X_SS_SPEED_100 1
|
||||
#define QCA807X_SS_SPEED_10 0
|
||||
#define QCA807X_SS_DUPLEX BIT(13)
|
||||
#define QCA807X_SS_MDIX BIT(6)
|
||||
|
||||
/* PSGMII PHY specific */
|
||||
#define PSGMII_QSGMII_DRIVE_CONTROL_1 0xb
|
||||
#define PSGMII_QSGMII_TX_DRIVER_MASK GENMASK(7, 4)
|
||||
#define PSGMII_MODE_CTRL 0x6d
|
||||
#define PSGMII_MODE_CTRL_AZ_WORKAROUND_MASK GENMASK(3, 0)
|
||||
#define PSGMII_MMD3_SERDES_CONTROL 0x805a
|
||||
|
||||
struct qca807x_gpio_priv {
|
||||
struct phy_device *phy;
|
||||
};
|
||||
|
||||
static int qca807x_get_downshift(struct phy_device *phydev, u8 *data)
|
||||
{
|
||||
int val, cnt, enable;
|
||||
|
||||
val = phy_read(phydev, MII_NWAYTEST);
|
||||
if (val < 0)
|
||||
return val;
|
||||
|
||||
enable = FIELD_GET(QCA807X_SMARTSPEED_EN, val);
|
||||
cnt = FIELD_GET(QCA807X_SMARTSPEED_RETRY_LIMIT_MASK, val) + 2;
|
||||
|
||||
*data = enable ? cnt : DOWNSHIFT_DEV_DISABLE;
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
static int qca807x_set_downshift(struct phy_device *phydev, u8 cnt)
|
||||
{
|
||||
int ret, val;
|
||||
|
||||
if (cnt > QCA807X_SMARTSPEED_RETRY_LIMIT_MAX ||
|
||||
(cnt < QCA807X_SMARTSPEED_RETRY_LIMIT_MIN && cnt != DOWNSHIFT_DEV_DISABLE))
|
||||
return -EINVAL;
|
||||
|
||||
if (!cnt) {
|
||||
ret = phy_clear_bits(phydev, MII_NWAYTEST, QCA807X_SMARTSPEED_EN);
|
||||
} else {
|
||||
val = QCA807X_SMARTSPEED_EN;
|
||||
val |= FIELD_PREP(QCA807X_SMARTSPEED_RETRY_LIMIT_MASK, cnt - 2);
|
||||
|
||||
phy_modify(phydev, MII_NWAYTEST,
|
||||
QCA807X_SMARTSPEED_EN |
|
||||
QCA807X_SMARTSPEED_RETRY_LIMIT_MASK,
|
||||
val);
|
||||
}
|
||||
|
||||
ret = genphy_soft_reset(phydev);
|
||||
|
||||
return ret;
|
||||
}
|
||||
|
||||
static int qca807x_get_tunable(struct phy_device *phydev,
|
||||
struct ethtool_tunable *tuna, void *data)
|
||||
{
|
||||
switch (tuna->id) {
|
||||
case ETHTOOL_PHY_DOWNSHIFT:
|
||||
return qca807x_get_downshift(phydev, data);
|
||||
default:
|
||||
return -EOPNOTSUPP;
|
||||
}
|
||||
}
|
||||
|
||||
static int qca807x_set_tunable(struct phy_device *phydev,
|
||||
struct ethtool_tunable *tuna, const void *data)
|
||||
{
|
||||
switch (tuna->id) {
|
||||
case ETHTOOL_PHY_DOWNSHIFT:
|
||||
return qca807x_set_downshift(phydev, *(const u8 *)data);
|
||||
default:
|
||||
return -EOPNOTSUPP;
|
||||
}
|
||||
}
|
||||
|
||||
#if LINUX_VERSION_CODE >= KERNEL_VERSION(5,8,0)
|
||||
static bool qca807x_distance_valid(int result)
|
||||
{
|
||||
switch (result) {
|
||||
case QCA807X_CDT_RESULTS_OPEN:
|
||||
case QCA807X_CDT_RESULTS_SAME_SHORT:
|
||||
case QCA807X_CDT_RESULTS_CROSS_SHORT_WITH_MDI1_SAME_OK:
|
||||
case QCA807X_CDT_RESULTS_CROSS_SHORT_WITH_MDI2_SAME_OK:
|
||||
case QCA807X_CDT_RESULTS_CROSS_SHORT_WITH_MDI3_SAME_OK:
|
||||
case QCA807X_CDT_RESULTS_CROSS_SHORT_WITH_MDI1_SAME_OPEN:
|
||||
case QCA807X_CDT_RESULTS_CROSS_SHORT_WITH_MDI2_SAME_OPEN:
|
||||
case QCA807X_CDT_RESULTS_CROSS_SHORT_WITH_MDI3_SAME_OPEN:
|
||||
case QCA807X_CDT_RESULTS_CROSS_SHORT_WITH_MDI1_SAME_SHORT:
|
||||
case QCA807X_CDT_RESULTS_CROSS_SHORT_WITH_MDI2_SAME_SHORT:
|
||||
case QCA807X_CDT_RESULTS_CROSS_SHORT_WITH_MDI3_SAME_SHORT:
|
||||
return true;
|
||||
}
|
||||
return false;
|
||||
}
|
||||
|
||||
static int qca807x_report_length(struct phy_device *phydev,
|
||||
int pair, int result)
|
||||
{
|
||||
int length;
|
||||
int ret;
|
||||
|
||||
ret = phy_read_mmd(phydev, MDIO_MMD_PCS, QCA807X_CDT_MMD3_MDI0_LENGTH + pair);
|
||||
if (ret < 0)
|
||||
return ret;
|
||||
|
||||
switch (result) {
|
||||
case ETHTOOL_A_CABLE_RESULT_CODE_SAME_SHORT:
|
||||
length = (FIELD_GET(QCA807X_CDT_SAME_SHORT_LENGTH_MASK, ret) * 800) / 10;
|
||||
break;
|
||||
case ETHTOOL_A_CABLE_RESULT_CODE_OPEN:
|
||||
case ETHTOOL_A_CABLE_RESULT_CODE_CROSS_SHORT:
|
||||
length = (FIELD_GET(QCA807X_CDT_CROSS_SHORT_LENGTH_MASK, ret) * 800) / 10;
|
||||
break;
|
||||
}
|
||||
|
||||
ethnl_cable_test_fault_length(phydev, pair, length);
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
static int qca807x_cable_test_report_trans(int result)
|
||||
{
|
||||
switch (result) {
|
||||
case QCA807X_CDT_RESULTS_OK:
|
||||
return ETHTOOL_A_CABLE_RESULT_CODE_OK;
|
||||
case QCA807X_CDT_RESULTS_OPEN:
|
||||
return ETHTOOL_A_CABLE_RESULT_CODE_OPEN;
|
||||
case QCA807X_CDT_RESULTS_SAME_SHORT:
|
||||
return ETHTOOL_A_CABLE_RESULT_CODE_SAME_SHORT;
|
||||
case QCA807X_CDT_RESULTS_CROSS_SHORT_WITH_MDI1_SAME_OK:
|
||||
case QCA807X_CDT_RESULTS_CROSS_SHORT_WITH_MDI2_SAME_OK:
|
||||
case QCA807X_CDT_RESULTS_CROSS_SHORT_WITH_MDI3_SAME_OK:
|
||||
case QCA807X_CDT_RESULTS_CROSS_SHORT_WITH_MDI1_SAME_OPEN:
|
||||
case QCA807X_CDT_RESULTS_CROSS_SHORT_WITH_MDI2_SAME_OPEN:
|
||||
case QCA807X_CDT_RESULTS_CROSS_SHORT_WITH_MDI3_SAME_OPEN:
|
||||
case QCA807X_CDT_RESULTS_CROSS_SHORT_WITH_MDI1_SAME_SHORT:
|
||||
case QCA807X_CDT_RESULTS_CROSS_SHORT_WITH_MDI2_SAME_SHORT:
|
||||
case QCA807X_CDT_RESULTS_CROSS_SHORT_WITH_MDI3_SAME_SHORT:
|
||||
return ETHTOOL_A_CABLE_RESULT_CODE_CROSS_SHORT;
|
||||
default:
|
||||
return ETHTOOL_A_CABLE_RESULT_CODE_UNSPEC;
|
||||
}
|
||||
}
|
||||
|
||||
static int qca807x_cable_test_report(struct phy_device *phydev)
|
||||
{
|
||||
int pair0, pair1, pair2, pair3;
|
||||
int ret;
|
||||
|
||||
ret = phy_read_mmd(phydev, MDIO_MMD_PCS, QCA807X_CDT_MMD3_STATUS);
|
||||
if (ret < 0)
|
||||
return ret;
|
||||
|
||||
pair0 = FIELD_GET(QCA807X_CDT_MDI0_STATUS_MASK, ret);
|
||||
pair1 = FIELD_GET(QCA807X_CDT_MDI1_STATUS_MASK, ret);
|
||||
pair2 = FIELD_GET(QCA807X_CDT_MDI2_STATUS_MASK, ret);
|
||||
pair3 = FIELD_GET(QCA807X_CDT_MDI3_STATUS_MASK, ret);
|
||||
|
||||
ethnl_cable_test_result(phydev, ETHTOOL_A_CABLE_PAIR_A,
|
||||
qca807x_cable_test_report_trans(pair0));
|
||||
ethnl_cable_test_result(phydev, ETHTOOL_A_CABLE_PAIR_B,
|
||||
qca807x_cable_test_report_trans(pair1));
|
||||
ethnl_cable_test_result(phydev, ETHTOOL_A_CABLE_PAIR_C,
|
||||
qca807x_cable_test_report_trans(pair2));
|
||||
ethnl_cable_test_result(phydev, ETHTOOL_A_CABLE_PAIR_D,
|
||||
qca807x_cable_test_report_trans(pair3));
|
||||
|
||||
if (qca807x_distance_valid(pair0))
|
||||
qca807x_report_length(phydev, 0, qca807x_cable_test_report_trans(pair0));
|
||||
if (qca807x_distance_valid(pair1))
|
||||
qca807x_report_length(phydev, 1, qca807x_cable_test_report_trans(pair1));
|
||||
if (qca807x_distance_valid(pair2))
|
||||
qca807x_report_length(phydev, 2, qca807x_cable_test_report_trans(pair2));
|
||||
if (qca807x_distance_valid(pair3))
|
||||
qca807x_report_length(phydev, 3, qca807x_cable_test_report_trans(pair3));
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
static int qca807x_cable_test_get_status(struct phy_device *phydev,
|
||||
bool *finished)
|
||||
{
|
||||
int val;
|
||||
|
||||
*finished = false;
|
||||
|
||||
val = phy_read(phydev, QCA807X_CDT);
|
||||
if (!((val & QCA807X_CDT_ENABLE) && (val & QCA807X_CDT_STATUS))) {
|
||||
*finished = true;
|
||||
|
||||
return qca807x_cable_test_report(phydev);
|
||||
}
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
static int qca807x_cable_test_start(struct phy_device *phydev)
|
||||
{
|
||||
int val, ret;
|
||||
|
||||
val = phy_read(phydev, QCA807X_CDT);
|
||||
/* Enable inter-pair short check as well */
|
||||
val &= ~QCA807X_CDT_ENABLE_INTER_PAIR_SHORT;
|
||||
val |= QCA807X_CDT_ENABLE;
|
||||
ret = phy_write(phydev, QCA807X_CDT, val);
|
||||
|
||||
return ret;
|
||||
}
|
||||
#endif
|
||||
|
||||
#ifdef CONFIG_GPIOLIB
|
||||
static int qca807x_gpio_get_direction(struct gpio_chip *gc, unsigned int offset)
|
||||
{
|
||||
#if LINUX_VERSION_CODE >= KERNEL_VERSION(5,5,0)
|
||||
return GPIO_LINE_DIRECTION_OUT;
|
||||
#else
|
||||
return GPIOF_DIR_OUT;
|
||||
#endif
|
||||
}
|
||||
|
||||
static int qca807x_gpio_get_reg(unsigned int offset)
|
||||
{
|
||||
return QCA807X_MMD7_LED_100N_2 + (offset % 2) * 2;
|
||||
}
|
||||
|
||||
static int qca807x_gpio_get(struct gpio_chip *gc, unsigned int offset)
|
||||
{
|
||||
struct qca807x_gpio_priv *priv = gpiochip_get_data(gc);
|
||||
int val;
|
||||
|
||||
val = phy_read_mmd(priv->phy, MDIO_MMD_AN, qca807x_gpio_get_reg(offset));
|
||||
|
||||
return FIELD_GET(QCA807X_GPIO_FORCE_MODE_MASK, val);
|
||||
}
|
||||
|
||||
static void qca807x_gpio_set(struct gpio_chip *gc, unsigned int offset, int value)
|
||||
{
|
||||
struct qca807x_gpio_priv *priv = gpiochip_get_data(gc);
|
||||
int val;
|
||||
|
||||
val = phy_read_mmd(priv->phy, MDIO_MMD_AN, qca807x_gpio_get_reg(offset));
|
||||
val &= ~QCA807X_GPIO_FORCE_MODE_MASK;
|
||||
val |= QCA807X_GPIO_FORCE_EN;
|
||||
val |= FIELD_PREP(QCA807X_GPIO_FORCE_MODE_MASK, value);
|
||||
|
||||
phy_write_mmd(priv->phy, MDIO_MMD_AN, qca807x_gpio_get_reg(offset), val);
|
||||
}
|
||||
|
||||
static int qca807x_gpio_dir_out(struct gpio_chip *gc, unsigned int offset, int value)
|
||||
{
|
||||
qca807x_gpio_set(gc, offset, value);
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
static int qca807x_gpio(struct phy_device *phydev)
|
||||
{
|
||||
struct device *dev = &phydev->mdio.dev;
|
||||
struct qca807x_gpio_priv *priv;
|
||||
struct gpio_chip *gc;
|
||||
|
||||
priv = devm_kzalloc(dev, sizeof(*priv), GFP_KERNEL);
|
||||
if (!priv)
|
||||
return -ENOMEM;
|
||||
|
||||
priv->phy = phydev;
|
||||
|
||||
gc = devm_kzalloc(dev, sizeof(*gc), GFP_KERNEL);
|
||||
if (!gc)
|
||||
return -ENOMEM;
|
||||
|
||||
gc->label = dev_name(dev);
|
||||
gc->base = -1;
|
||||
gc->ngpio = 2;
|
||||
gc->parent = dev;
|
||||
gc->owner = THIS_MODULE;
|
||||
gc->can_sleep = true;
|
||||
gc->get_direction = qca807x_gpio_get_direction;
|
||||
gc->direction_output = qca807x_gpio_dir_out;
|
||||
gc->get = qca807x_gpio_get;
|
||||
gc->set = qca807x_gpio_set;
|
||||
|
||||
return devm_gpiochip_add_data(dev, gc, priv);
|
||||
}
|
||||
#endif
|
||||
|
||||
static int qca807x_read_copper_status(struct phy_device *phydev, bool combo_port)
|
||||
{
|
||||
int ss, err, page, old_link = phydev->link;
|
||||
|
||||
/* Only combo port has dual pages */
|
||||
if (combo_port) {
|
||||
/* Check whether copper page is set and set if needed */
|
||||
page = phy_read(phydev, QCA807X_CHIP_CONFIGURATION);
|
||||
if (!(page & QCA807X_BT_BX_REG_SEL)) {
|
||||
page |= QCA807X_BT_BX_REG_SEL;
|
||||
phy_write(phydev, QCA807X_CHIP_CONFIGURATION, page);
|
||||
}
|
||||
}
|
||||
|
||||
/* Update the link, but return if there was an error */
|
||||
err = genphy_update_link(phydev);
|
||||
if (err)
|
||||
return err;
|
||||
|
||||
/* why bother the PHY if nothing can have changed */
|
||||
if (phydev->autoneg == AUTONEG_ENABLE && old_link && phydev->link)
|
||||
return 0;
|
||||
|
||||
phydev->speed = SPEED_UNKNOWN;
|
||||
phydev->duplex = DUPLEX_UNKNOWN;
|
||||
phydev->pause = 0;
|
||||
phydev->asym_pause = 0;
|
||||
|
||||
err = genphy_read_lpa(phydev);
|
||||
if (err < 0)
|
||||
return err;
|
||||
|
||||
/* Read the QCA807x PHY-Specific Status register copper page,
|
||||
* which indicates the speed and duplex that the PHY is actually
|
||||
* using, irrespective of whether we are in autoneg mode or not.
|
||||
*/
|
||||
ss = phy_read(phydev, QCA807X_PHY_SPECIFIC_STATUS);
|
||||
if (ss < 0)
|
||||
return ss;
|
||||
|
||||
if (ss & QCA807X_SS_SPEED_AND_DUPLEX_RESOLVED) {
|
||||
int sfc;
|
||||
|
||||
sfc = phy_read(phydev, QCA807X_FUNCTION_CONTROL);
|
||||
if (sfc < 0)
|
||||
return sfc;
|
||||
|
||||
switch (FIELD_GET(QCA807X_SS_SPEED_MASK, ss)) {
|
||||
case QCA807X_SS_SPEED_10:
|
||||
phydev->speed = SPEED_10;
|
||||
break;
|
||||
case QCA807X_SS_SPEED_100:
|
||||
phydev->speed = SPEED_100;
|
||||
break;
|
||||
case QCA807X_SS_SPEED_1000:
|
||||
phydev->speed = SPEED_1000;
|
||||
break;
|
||||
}
|
||||
if (ss & QCA807X_SS_DUPLEX)
|
||||
phydev->duplex = DUPLEX_FULL;
|
||||
else
|
||||
phydev->duplex = DUPLEX_HALF;
|
||||
|
||||
if (ss & QCA807X_SS_MDIX)
|
||||
phydev->mdix = ETH_TP_MDI_X;
|
||||
else
|
||||
phydev->mdix = ETH_TP_MDI;
|
||||
|
||||
switch (FIELD_GET(QCA807X_FC_MDI_CROSSOVER_MODE_MASK, sfc)) {
|
||||
case QCA807X_FC_MDI_CROSSOVER_MANUAL_MDI:
|
||||
phydev->mdix_ctrl = ETH_TP_MDI;
|
||||
break;
|
||||
case QCA807X_FC_MDI_CROSSOVER_MANUAL_MDIX:
|
||||
phydev->mdix_ctrl = ETH_TP_MDI_X;
|
||||
break;
|
||||
case QCA807X_FC_MDI_CROSSOVER_AUTO:
|
||||
phydev->mdix_ctrl = ETH_TP_MDI_AUTO;
|
||||
break;
|
||||
}
|
||||
}
|
||||
|
||||
if (phydev->autoneg == AUTONEG_ENABLE && phydev->autoneg_complete)
|
||||
phy_resolve_aneg_pause(phydev);
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
static int qca807x_read_fiber_status(struct phy_device *phydev, bool combo_port)
|
||||
{
|
||||
int ss, err, page, lpa, old_link = phydev->link;
|
||||
|
||||
/* Check whether fiber page is set and set if needed */
|
||||
page = phy_read(phydev, QCA807X_CHIP_CONFIGURATION);
|
||||
if (page & QCA807X_BT_BX_REG_SEL) {
|
||||
page &= ~QCA807X_BT_BX_REG_SEL;
|
||||
phy_write(phydev, QCA807X_CHIP_CONFIGURATION, page);
|
||||
}
|
||||
|
||||
/* Update the link, but return if there was an error */
|
||||
err = genphy_update_link(phydev);
|
||||
if (err)
|
||||
return err;
|
||||
|
||||
/* why bother the PHY if nothing can have changed */
|
||||
if (phydev->autoneg == AUTONEG_ENABLE && old_link && phydev->link)
|
||||
return 0;
|
||||
|
||||
phydev->speed = SPEED_UNKNOWN;
|
||||
phydev->duplex = DUPLEX_UNKNOWN;
|
||||
phydev->pause = 0;
|
||||
phydev->asym_pause = 0;
|
||||
|
||||
if (phydev->autoneg == AUTONEG_ENABLE && phydev->autoneg_complete) {
|
||||
lpa = phy_read(phydev, MII_LPA);
|
||||
if (lpa < 0)
|
||||
return lpa;
|
||||
|
||||
linkmode_mod_bit(ETHTOOL_LINK_MODE_Autoneg_BIT,
|
||||
phydev->lp_advertising, lpa & LPA_LPACK);
|
||||
linkmode_mod_bit(ETHTOOL_LINK_MODE_1000baseX_Full_BIT,
|
||||
phydev->lp_advertising, lpa & LPA_1000XFULL);
|
||||
linkmode_mod_bit(ETHTOOL_LINK_MODE_Pause_BIT,
|
||||
phydev->lp_advertising, lpa & LPA_1000XPAUSE);
|
||||
linkmode_mod_bit(ETHTOOL_LINK_MODE_Asym_Pause_BIT,
|
||||
phydev->lp_advertising,
|
||||
lpa & LPA_1000XPAUSE_ASYM);
|
||||
|
||||
phy_resolve_aneg_linkmode(phydev);
|
||||
}
|
||||
|
||||
/* Read the QCA807x PHY-Specific Status register fiber page,
|
||||
* which indicates the speed and duplex that the PHY is actually
|
||||
* using, irrespective of whether we are in autoneg mode or not.
|
||||
*/
|
||||
ss = phy_read(phydev, QCA807X_PHY_SPECIFIC_STATUS);
|
||||
if (ss < 0)
|
||||
return ss;
|
||||
|
||||
if (ss & QCA807X_SS_SPEED_AND_DUPLEX_RESOLVED) {
|
||||
switch (FIELD_GET(QCA807X_SS_SPEED_MASK, ss)) {
|
||||
case QCA807X_SS_SPEED_100:
|
||||
phydev->speed = SPEED_100;
|
||||
break;
|
||||
case QCA807X_SS_SPEED_1000:
|
||||
phydev->speed = SPEED_1000;
|
||||
break;
|
||||
}
|
||||
|
||||
if (ss & QCA807X_SS_DUPLEX)
|
||||
phydev->duplex = DUPLEX_FULL;
|
||||
else
|
||||
phydev->duplex = DUPLEX_HALF;
|
||||
}
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
static int qca807x_read_status(struct phy_device *phydev)
|
||||
{
|
||||
int val;
|
||||
|
||||
/* Check for Combo port */
|
||||
if (phy_read(phydev, QCA807X_CHIP_CONFIGURATION)) {
|
||||
/* Check for fiber mode first */
|
||||
if (linkmode_test_bit(ETHTOOL_LINK_MODE_FIBRE_BIT, phydev->supported)) {
|
||||
/* Check for actual detected media */
|
||||
val = phy_read(phydev, QCA807X_MEDIA_SELECT_STATUS);
|
||||
if (val & QCA807X_MEDIA_DETECTED_COPPER) {
|
||||
qca807x_read_copper_status(phydev, true);
|
||||
} else if ((val & QCA807X_MEDIA_DETECTED_1000_BASE_X) ||
|
||||
(val & QCA807X_MEDIA_DETECTED_100_BASE_FX)) {
|
||||
qca807x_read_fiber_status(phydev, true);
|
||||
}
|
||||
} else {
|
||||
qca807x_read_copper_status(phydev, true);
|
||||
}
|
||||
} else {
|
||||
qca807x_read_copper_status(phydev, false);
|
||||
}
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
static int qca807x_config_intr(struct phy_device *phydev)
|
||||
{
|
||||
int ret, val;
|
||||
|
||||
val = phy_read(phydev, QCA807X_INTR_ENABLE);
|
||||
|
||||
if (phydev->interrupts == PHY_INTERRUPT_ENABLED) {
|
||||
/* Check for combo port as it has fewer interrupts */
|
||||
if (phy_read(phydev, QCA807X_CHIP_CONFIGURATION)) {
|
||||
val |= QCA807X_INTR_ENABLE_SPEED_CHANGED;
|
||||
val |= QCA807X_INTR_ENABLE_LINK_FAIL;
|
||||
val |= QCA807X_INTR_ENABLE_LINK_SUCCESS;
|
||||
} else {
|
||||
val |= QCA807X_INTR_ENABLE_AUTONEG_ERR;
|
||||
val |= QCA807X_INTR_ENABLE_SPEED_CHANGED;
|
||||
val |= QCA807X_INTR_ENABLE_DUPLEX_CHANGED;
|
||||
val |= QCA807X_INTR_ENABLE_LINK_FAIL;
|
||||
val |= QCA807X_INTR_ENABLE_LINK_SUCCESS;
|
||||
}
|
||||
ret = phy_write(phydev, QCA807X_INTR_ENABLE, val);
|
||||
} else {
|
||||
ret = phy_write(phydev, QCA807X_INTR_ENABLE, 0);
|
||||
}
|
||||
|
||||
return ret;
|
||||
}
|
||||
|
||||
#if LINUX_VERSION_CODE < KERNEL_VERSION(5,12,0)
|
||||
static int qca807x_ack_intr(struct phy_device *phydev)
|
||||
{
|
||||
int ret;
|
||||
|
||||
ret = phy_read(phydev, QCA807X_INTR_STATUS);
|
||||
|
||||
return (ret < 0) ? ret : 0;
|
||||
}
|
||||
#else
|
||||
static irqreturn_t qca807x_handle_interrupt(struct phy_device *phydev)
|
||||
{
|
||||
int irq_status, int_enabled;
|
||||
|
||||
irq_status = phy_read(phydev, QCA807X_INTR_STATUS);
|
||||
if (irq_status < 0) {
|
||||
phy_error(phydev);
|
||||
return IRQ_NONE;
|
||||
}
|
||||
|
||||
/* Read the current enabled interrupts */
|
||||
int_enabled = phy_read(phydev, QCA807X_INTR_ENABLE);
|
||||
if (int_enabled < 0) {
|
||||
phy_error(phydev);
|
||||
return IRQ_NONE;
|
||||
}
|
||||
|
||||
/* See if this was one of our enabled interrupts */
|
||||
if (!(irq_status & int_enabled))
|
||||
return IRQ_NONE;
|
||||
|
||||
phy_trigger_machine(phydev);
|
||||
|
||||
return IRQ_HANDLED;
|
||||
}
|
||||
#endif
|
||||
|
||||
static int qca807x_led_config(struct phy_device *phydev)
|
||||
{
|
||||
struct device_node *node = phydev->mdio.dev.of_node;
|
||||
bool led_config = false;
|
||||
int val;
|
||||
|
||||
val = phy_read_mmd(phydev, MDIO_MMD_AN, QCA807X_MMD7_LED_1000N_1);
|
||||
if (val < 0)
|
||||
return val;
|
||||
|
||||
if (of_property_read_bool(node, "qcom,single-led-1000")) {
|
||||
val |= QCA807X_LED_TXACT_BLK_EN_2;
|
||||
val |= QCA807X_LED_RXACT_BLK_EN_2;
|
||||
val |= QCA807X_LED_GT_ON_EN_2;
|
||||
|
||||
led_config = true;
|
||||
}
|
||||
|
||||
if (of_property_read_bool(node, "qcom,single-led-100")) {
|
||||
val |= QCA807X_LED_HT_ON_EN_2;
|
||||
|
||||
led_config = true;
|
||||
}
|
||||
|
||||
if (of_property_read_bool(node, "qcom,single-led-10")) {
|
||||
val |= QCA807X_LED_BT_ON_EN_2;
|
||||
|
||||
led_config = true;
|
||||
}
|
||||
|
||||
if (led_config)
|
||||
return phy_write_mmd(phydev, MDIO_MMD_AN, QCA807X_MMD7_LED_1000N_1, val);
|
||||
else
|
||||
return 0;
|
||||
}
|
||||
|
||||
static const struct sfp_upstream_ops qca807x_sfp_ops = {
|
||||
.attach = phy_sfp_attach,
|
||||
.detach = phy_sfp_detach,
|
||||
};
|
||||
|
||||
static int qca807x_config(struct phy_device *phydev)
|
||||
{
|
||||
struct device_node *node = phydev->mdio.dev.of_node;
|
||||
int control_dac, ret = 0;
|
||||
u32 of_control_dac;
|
||||
|
||||
/* Check for Combo port */
|
||||
if (phy_read(phydev, QCA807X_CHIP_CONFIGURATION)) {
|
||||
int fiber_mode_autodect;
|
||||
int psgmii_serdes;
|
||||
int chip_config;
|
||||
|
||||
if (of_property_read_bool(node, "qcom,fiber-enable")) {
|
||||
/* Enable fiber mode autodection (1000Base-X or 100Base-FX) */
|
||||
fiber_mode_autodect = phy_read_mmd(phydev, MDIO_MMD_AN,
|
||||
QCA807X_MMD7_FIBER_MODE_AUTO_DETECTION);
|
||||
fiber_mode_autodect |= QCA807X_MMD7_FIBER_MODE_AUTO_DETECTION_EN;
|
||||
phy_write_mmd(phydev, MDIO_MMD_AN, QCA807X_MMD7_FIBER_MODE_AUTO_DETECTION,
|
||||
fiber_mode_autodect);
|
||||
|
||||
/* Enable 4 copper + combo port mode */
|
||||
chip_config = phy_read(phydev, QCA807X_CHIP_CONFIGURATION);
|
||||
chip_config &= ~QCA807X_CHIP_CONFIGURATION_MODE_CFG_MASK;
|
||||
chip_config |= FIELD_PREP(QCA807X_CHIP_CONFIGURATION_MODE_CFG_MASK,
|
||||
QCA807X_CHIP_CONFIGURATION_MODE_PSGMII_FIBER);
|
||||
phy_write(phydev, QCA807X_CHIP_CONFIGURATION, chip_config);
|
||||
|
||||
linkmode_set_bit(ETHTOOL_LINK_MODE_FIBRE_BIT, phydev->supported);
|
||||
linkmode_set_bit(ETHTOOL_LINK_MODE_FIBRE_BIT, phydev->advertising);
|
||||
}
|
||||
|
||||
/* Prevent PSGMII going into hibernation via PSGMII self test */
|
||||
psgmii_serdes = phy_read_mmd(phydev, MDIO_MMD_PCS, PSGMII_MMD3_SERDES_CONTROL);
|
||||
psgmii_serdes &= ~BIT(1);
|
||||
ret = phy_write_mmd(phydev, MDIO_MMD_PCS,
|
||||
PSGMII_MMD3_SERDES_CONTROL,
|
||||
psgmii_serdes);
|
||||
}
|
||||
|
||||
if (!of_property_read_u32(node, "qcom,control-dac", &of_control_dac)) {
|
||||
control_dac = phy_read_mmd(phydev, MDIO_MMD_AN,
|
||||
QCA807X_MMD7_1000BASE_T_POWER_SAVE_PER_CABLE_LENGTH);
|
||||
control_dac &= ~QCA807X_CONTROL_DAC_MASK;
|
||||
control_dac |= FIELD_PREP(QCA807X_CONTROL_DAC_MASK, of_control_dac);
|
||||
ret = phy_write_mmd(phydev, MDIO_MMD_AN,
|
||||
QCA807X_MMD7_1000BASE_T_POWER_SAVE_PER_CABLE_LENGTH,
|
||||
control_dac);
|
||||
}
|
||||
|
||||
/* Optionally configure LED-s */
|
||||
if (IS_ENABLED(CONFIG_GPIOLIB)) {
|
||||
/* Check whether PHY-s pins are used as GPIO-s */
|
||||
if (!of_property_read_bool(node, "gpio-controller"))
|
||||
ret = qca807x_led_config(phydev);
|
||||
} else {
|
||||
ret = qca807x_led_config(phydev);
|
||||
}
|
||||
|
||||
return ret;
|
||||
}
|
||||
|
||||
static int qca807x_probe(struct phy_device *phydev)
|
||||
{
|
||||
struct device_node *node = phydev->mdio.dev.of_node;
|
||||
int ret = 0;
|
||||
|
||||
if (IS_ENABLED(CONFIG_GPIOLIB)) {
|
||||
/* Do not register a GPIO controller unless flagged for it */
|
||||
if (of_property_read_bool(node, "gpio-controller"))
|
||||
ret = qca807x_gpio(phydev);
|
||||
}
|
||||
|
||||
/* Attach SFP bus on combo port*/
|
||||
if (of_property_read_bool(node, "qcom,fiber-enable")) {
|
||||
if (phy_read(phydev, QCA807X_CHIP_CONFIGURATION))
|
||||
ret = phy_sfp_probe(phydev, &qca807x_sfp_ops);
|
||||
}
|
||||
|
||||
return ret;
|
||||
}
|
||||
|
||||
static int qca807x_psgmii_config(struct phy_device *phydev)
|
||||
{
|
||||
struct device_node *node = phydev->mdio.dev.of_node;
|
||||
int psgmii_az, tx_amp, ret = 0;
|
||||
u32 tx_driver_strength;
|
||||
|
||||
/* Workaround to enable AZ transmitting ability */
|
||||
if (of_property_read_bool(node, "qcom,psgmii-az")) {
|
||||
psgmii_az = phy_read_mmd(phydev, MDIO_MMD_PMAPMD, PSGMII_MODE_CTRL);
|
||||
psgmii_az &= ~PSGMII_MODE_CTRL_AZ_WORKAROUND_MASK;
|
||||
psgmii_az |= FIELD_PREP(PSGMII_MODE_CTRL_AZ_WORKAROUND_MASK, 0xc);
|
||||
ret = phy_write_mmd(phydev, MDIO_MMD_PMAPMD, PSGMII_MODE_CTRL, psgmii_az);
|
||||
psgmii_az = phy_read_mmd(phydev, MDIO_MMD_PMAPMD, PSGMII_MODE_CTRL);
|
||||
}
|
||||
|
||||
/* PSGMII/QSGMII TX amp set to DT defined value instead of default 600mV */
|
||||
if (!of_property_read_u32(node, "qcom,tx-driver-strength", &tx_driver_strength)) {
|
||||
tx_amp = phy_read(phydev, PSGMII_QSGMII_DRIVE_CONTROL_1);
|
||||
tx_amp &= ~PSGMII_QSGMII_TX_DRIVER_MASK;
|
||||
tx_amp |= FIELD_PREP(PSGMII_QSGMII_TX_DRIVER_MASK, tx_driver_strength);
|
||||
ret = phy_write(phydev, PSGMII_QSGMII_DRIVE_CONTROL_1, tx_amp);
|
||||
}
|
||||
|
||||
return ret;
|
||||
}
|
||||
|
||||
static struct phy_driver qca807x_drivers[] = {
|
||||
{
|
||||
PHY_ID_MATCH_EXACT(PHY_ID_QCA8072),
|
||||
.name = "Qualcomm QCA8072",
|
||||
#if LINUX_VERSION_CODE >= KERNEL_VERSION(5,8,0)
|
||||
.flags = PHY_POLL_CABLE_TEST,
|
||||
#endif
|
||||
/* PHY_GBIT_FEATURES */
|
||||
.probe = qca807x_probe,
|
||||
.config_init = qca807x_config,
|
||||
.read_status = qca807x_read_status,
|
||||
.config_intr = qca807x_config_intr,
|
||||
#if LINUX_VERSION_CODE < KERNEL_VERSION(5,12,0)
|
||||
.ack_interrupt = qca807x_ack_intr,
|
||||
#else
|
||||
.handle_interrupt = qca807x_handle_interrupt,
|
||||
#endif
|
||||
.soft_reset = genphy_soft_reset,
|
||||
.get_tunable = qca807x_get_tunable,
|
||||
.set_tunable = qca807x_set_tunable,
|
||||
#if LINUX_VERSION_CODE >= KERNEL_VERSION(5,8,0)
|
||||
.cable_test_start = qca807x_cable_test_start,
|
||||
.cable_test_get_status = qca807x_cable_test_get_status,
|
||||
#endif
|
||||
},
|
||||
{
|
||||
PHY_ID_MATCH_EXACT(PHY_ID_QCA8075),
|
||||
.name = "Qualcomm QCA8075",
|
||||
#if LINUX_VERSION_CODE >= KERNEL_VERSION(5,8,0)
|
||||
.flags = PHY_POLL_CABLE_TEST,
|
||||
#endif
|
||||
/* PHY_GBIT_FEATURES */
|
||||
.probe = qca807x_probe,
|
||||
.config_init = qca807x_config,
|
||||
.read_status = qca807x_read_status,
|
||||
.config_intr = qca807x_config_intr,
|
||||
#if LINUX_VERSION_CODE < KERNEL_VERSION(5,12,0)
|
||||
.ack_interrupt = qca807x_ack_intr,
|
||||
#else
|
||||
.handle_interrupt = qca807x_handle_interrupt,
|
||||
#endif
|
||||
.soft_reset = genphy_soft_reset,
|
||||
.get_tunable = qca807x_get_tunable,
|
||||
.set_tunable = qca807x_set_tunable,
|
||||
#if LINUX_VERSION_CODE >= KERNEL_VERSION(5,8,0)
|
||||
.cable_test_start = qca807x_cable_test_start,
|
||||
.cable_test_get_status = qca807x_cable_test_get_status,
|
||||
#endif
|
||||
},
|
||||
{
|
||||
PHY_ID_MATCH_EXACT(PHY_ID_QCA807X_PSGMII),
|
||||
.name = "Qualcomm QCA807x PSGMII",
|
||||
.probe = qca807x_psgmii_config,
|
||||
},
|
||||
};
|
||||
module_phy_driver(qca807x_drivers);
|
||||
|
||||
static struct mdio_device_id __maybe_unused qca807x_tbl[] = {
|
||||
{ PHY_ID_MATCH_EXACT(PHY_ID_QCA8072) },
|
||||
{ PHY_ID_MATCH_EXACT(PHY_ID_QCA8075) },
|
||||
{ PHY_ID_MATCH_MODEL(PHY_ID_QCA807X_PSGMII) },
|
||||
{ }
|
||||
};
|
||||
|
||||
MODULE_AUTHOR("Robert Marko");
|
||||
MODULE_DESCRIPTION("Qualcomm QCA807x PHY driver");
|
||||
MODULE_DEVICE_TABLE(mdio, qca807x_tbl);
|
||||
MODULE_LICENSE("GPL");
|
||||
Loading…
Add table
Add a link
Reference in a new issue