mirror of
https://github.com/Ysurac/openmptcprouter.git
synced 2025-03-09 15:40:20 +00:00
Add a directory by kernel instead of a common root, add qnap-301w and rpi4 kernel 6.1 suppport
This commit is contained in:
Ycarus (Yannick Chabanois)
parent
e910436a7a
commit
46837ec4c0
9459 changed files with 362648 additions and 116345 deletions
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#
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# (C) Copyright 2000-2006
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# Wolfgang Denk, DENX Software Engineering, wd@denx.de.
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#
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# See file CREDITS for list of people who contributed to this
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# project.
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#
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# This program is free software; you can redistribute it and/or
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# modify it under the terms of the GNU General Public License as
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# published by the Free Software Foundation; either version 2 of
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# the License, or (at your option) any later version.
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#
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# This program is distributed in the hope that it will be useful,
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# but WITHOUT ANY WARRANTY; without even the implied warranty of
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# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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# GNU General Public License for more details.
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#
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# You should have received a copy of the GNU General Public License
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# along with this program; if not, write to the Free Software
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# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
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# MA 02111-1307 USA
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#
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include $(TOPDIR)/config.mk
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LIB = $(obj)lib$(BOARD).o
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ifndef CONFIG_SPL_BUILD
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COBJS := m28evk.o
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else
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COBJS := spl_boot.o
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endif
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SRCS := $(COBJS:.o=.c)
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OBJS := $(addprefix $(obj),$(COBJS))
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$(LIB): $(obj).depend $(OBJS)
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$(call cmd_link_o_target, $(OBJS))
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#########################################################################
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# defines $(obj).depend target
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include $(SRCTREE)/rules.mk
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sinclude $(obj).depend
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#########################################################################
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@ -0,0 +1,183 @@
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/*
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* DENX M28 module
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*
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* Copyright (C) 2011 Marek Vasut <marek.vasut@gmail.com>
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* on behalf of DENX Software Engineering GmbH
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*
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* See file CREDITS for list of people who contributed to this
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* project.
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*
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* This program is free software; you can redistribute it and/or
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||||
* modify it under the terms of the GNU General Public License as
|
||||
* published by the Free Software Foundation; either version 2 of
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||||
* the License, or (at your option) any later version.
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||||
*
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* This program is distributed in the hope that it will be useful,
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||||
* but WITHOUT ANY WARRANTY; without even the implied warranty of
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||||
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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||||
* GNU General Public License for more details.
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||||
*
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||||
* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, Inc., 59 Temple Place, Suite 330, Boston,
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* MA 02111-1307 USA
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*/
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#include <common.h>
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#include <asm/gpio.h>
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#include <asm/io.h>
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#include <asm/arch/imx-regs.h>
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#include <asm/arch/iomux-mx28.h>
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#include <asm/arch/clock.h>
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#include <asm/arch/sys_proto.h>
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#include <linux/mii.h>
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#include <miiphy.h>
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#include <netdev.h>
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#include <errno.h>
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DECLARE_GLOBAL_DATA_PTR;
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/*
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* Functions
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*/
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int board_early_init_f(void)
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{
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/* IO0 clock at 480MHz */
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mx28_set_ioclk(MXC_IOCLK0, 480000);
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/* IO1 clock at 480MHz */
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mx28_set_ioclk(MXC_IOCLK1, 480000);
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/* SSP0 clock at 96MHz */
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mx28_set_sspclk(MXC_SSPCLK0, 96000, 0);
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/* SSP2 clock at 96MHz */
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mx28_set_sspclk(MXC_SSPCLK2, 96000, 0);
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#ifdef CONFIG_CMD_USB
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mxs_iomux_setup_pad(MX28_PAD_SSP2_SS1__USB1_OVERCURRENT);
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mxs_iomux_setup_pad(MX28_PAD_AUART3_TX__GPIO_3_13 |
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MXS_PAD_12MA | MXS_PAD_3V3 | MXS_PAD_PULLUP);
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gpio_direction_output(MX28_PAD_AUART3_TX__GPIO_3_13, 0);
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#endif
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return 0;
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}
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int board_init(void)
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{
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/* Adress of boot parameters */
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gd->bd->bi_boot_params = PHYS_SDRAM_1 + 0x100;
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return 0;
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}
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int dram_init(void)
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{
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return mx28_dram_init();
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}
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#ifdef CONFIG_CMD_MMC
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static int m28_mmc_wp(int id)
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{
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if (id != 0) {
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printf("MXS MMC: Invalid card selected (card id = %d)\n", id);
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return 1;
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}
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return gpio_get_value(MX28_PAD_AUART2_CTS__GPIO_3_10);
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}
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int board_mmc_init(bd_t *bis)
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{
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/* Configure WP as input. */
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gpio_direction_input(MX28_PAD_AUART2_CTS__GPIO_3_10);
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/* Turn on the power to the card. */
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gpio_direction_output(MX28_PAD_PWM3__GPIO_3_28, 0);
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return mxsmmc_initialize(bis, 0, m28_mmc_wp);
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}
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#endif
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#ifdef CONFIG_CMD_NET
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#define MII_OPMODE_STRAP_OVERRIDE 0x16
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#define MII_PHY_CTRL1 0x1e
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#define MII_PHY_CTRL2 0x1f
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int fecmxc_mii_postcall(int phy)
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{
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#if defined(CONFIG_DENX_M28_V11) || defined(CONFIG_DENX_M28_V10)
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/* KZ8031 PHY on old boards. */
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const uint32_t freq = 0x0080;
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#else
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/* KZ8021 PHY on new boards. */
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const uint32_t freq = 0x0000;
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#endif
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miiphy_write("FEC1", phy, MII_BMCR, 0x9000);
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miiphy_write("FEC1", phy, MII_OPMODE_STRAP_OVERRIDE, 0x0202);
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if (phy == 3)
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miiphy_write("FEC1", 3, MII_PHY_CTRL2, 0x8100 | freq);
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return 0;
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}
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int board_eth_init(bd_t *bis)
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{
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struct mx28_clkctrl_regs *clkctrl_regs =
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(struct mx28_clkctrl_regs *)MXS_CLKCTRL_BASE;
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struct eth_device *dev;
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int ret;
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ret = cpu_eth_init(bis);
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clrsetbits_le32(&clkctrl_regs->hw_clkctrl_enet,
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CLKCTRL_ENET_TIME_SEL_MASK | CLKCTRL_ENET_CLK_OUT_EN,
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CLKCTRL_ENET_TIME_SEL_RMII_CLK);
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#if !defined(CONFIG_DENX_M28_V11) && !defined(CONFIG_DENX_M28_V10)
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/* Reset the new PHY */
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gpio_direction_output(MX28_PAD_AUART2_RTS__GPIO_3_11, 0);
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udelay(10000);
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gpio_set_value(MX28_PAD_AUART2_RTS__GPIO_3_11, 1);
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udelay(10000);
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#endif
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ret = fecmxc_initialize_multi(bis, 0, 0, MXS_ENET0_BASE);
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if (ret) {
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printf("FEC MXS: Unable to init FEC0\n");
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return ret;
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}
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ret = fecmxc_initialize_multi(bis, 1, 3, MXS_ENET1_BASE);
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if (ret) {
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printf("FEC MXS: Unable to init FEC1\n");
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return ret;
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}
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dev = eth_get_dev_by_name("FEC0");
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if (!dev) {
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printf("FEC MXS: Unable to get FEC0 device entry\n");
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return -EINVAL;
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}
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ret = fecmxc_register_mii_postcall(dev, fecmxc_mii_postcall);
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if (ret) {
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printf("FEC MXS: Unable to register FEC0 mii postcall\n");
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return ret;
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}
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dev = eth_get_dev_by_name("FEC1");
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if (!dev) {
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printf("FEC MXS: Unable to get FEC1 device entry\n");
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return -EINVAL;
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}
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ret = fecmxc_register_mii_postcall(dev, fecmxc_mii_postcall);
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if (ret) {
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printf("FEC MXS: Unable to register FEC1 mii postcall\n");
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return ret;
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}
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return ret;
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}
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#endif
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@ -0,0 +1,222 @@
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/*
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* DENX M28 Boot setup
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*
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* Copyright (C) 2011 Marek Vasut <marek.vasut@gmail.com>
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* on behalf of DENX Software Engineering GmbH
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*
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* See file CREDITS for list of people who contributed to this
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* project.
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*
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* This program is free software; you can redistribute it and/or
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||||
* modify it under the terms of the GNU General Public License as
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||||
* published by the Free Software Foundation; either version 2 of
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* the License, or (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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||||
* but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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||||
* GNU General Public License for more details.
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||||
*
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||||
* You should have received a copy of the GNU General Public License
|
||||
* along with this program; if not, write to the Free Software
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||||
* Foundation, Inc., 59 Temple Place, Suite 330, Boston,
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* MA 02111-1307 USA
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*/
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#include <common.h>
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#include <config.h>
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#include <asm/io.h>
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#include <asm/arch/iomux-mx28.h>
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#include <asm/arch/imx-regs.h>
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#include <asm/arch/sys_proto.h>
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#define MUX_CONFIG_LED (MXS_PAD_3V3 | MXS_PAD_4MA | MXS_PAD_NOPULL)
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#define MUX_CONFIG_LCD (MXS_PAD_3V3 | MXS_PAD_4MA | MXS_PAD_NOPULL)
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#define MUX_CONFIG_TSC (MXS_PAD_3V3 | MXS_PAD_8MA | MXS_PAD_PULLUP)
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#define MUX_CONFIG_SSP0 (MXS_PAD_3V3 | MXS_PAD_12MA | MXS_PAD_PULLUP)
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#define MUX_CONFIG_SSP2 (MXS_PAD_3V3 | MXS_PAD_4MA | MXS_PAD_PULLUP)
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#define MUX_CONFIG_GPMI (MXS_PAD_1V8 | MXS_PAD_4MA | MXS_PAD_NOPULL)
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#define MUX_CONFIG_ENET (MXS_PAD_3V3 | MXS_PAD_4MA | MXS_PAD_PULLUP)
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#define MUX_CONFIG_EMI (MXS_PAD_3V3 | MXS_PAD_12MA | MXS_PAD_NOPULL)
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const iomux_cfg_t iomux_setup[] = {
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/* LED */
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MX28_PAD_ENET0_RXD3__GPIO_4_10 | MUX_CONFIG_LED,
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/* framebuffer */
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MX28_PAD_LCD_D00__LCD_D0 | MUX_CONFIG_LCD,
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MX28_PAD_LCD_D01__LCD_D1 | MUX_CONFIG_LCD,
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MX28_PAD_LCD_D02__LCD_D2 | MUX_CONFIG_LCD,
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MX28_PAD_LCD_D03__LCD_D3 | MUX_CONFIG_LCD,
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MX28_PAD_LCD_D04__LCD_D4 | MUX_CONFIG_LCD,
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MX28_PAD_LCD_D05__LCD_D5 | MUX_CONFIG_LCD,
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MX28_PAD_LCD_D06__LCD_D6 | MUX_CONFIG_LCD,
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MX28_PAD_LCD_D07__LCD_D7 | MUX_CONFIG_LCD,
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MX28_PAD_LCD_D08__LCD_D8 | MUX_CONFIG_LCD,
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MX28_PAD_LCD_D09__LCD_D9 | MUX_CONFIG_LCD,
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MX28_PAD_LCD_D10__LCD_D10 | MUX_CONFIG_LCD,
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MX28_PAD_LCD_D11__LCD_D11 | MUX_CONFIG_LCD,
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MX28_PAD_LCD_D12__LCD_D12 | MUX_CONFIG_LCD,
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MX28_PAD_LCD_D13__LCD_D13 | MUX_CONFIG_LCD,
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MX28_PAD_LCD_D14__LCD_D14 | MUX_CONFIG_LCD,
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MX28_PAD_LCD_D15__LCD_D15 | MUX_CONFIG_LCD,
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MX28_PAD_LCD_D16__LCD_D16 | MUX_CONFIG_LCD,
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MX28_PAD_LCD_D17__LCD_D17 | MUX_CONFIG_LCD,
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MX28_PAD_LCD_D18__LCD_D18 | MUX_CONFIG_LCD,
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MX28_PAD_LCD_D19__LCD_D19 | MUX_CONFIG_LCD,
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MX28_PAD_LCD_D20__LCD_D20 | MUX_CONFIG_LCD,
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MX28_PAD_LCD_D21__LCD_D21 | MUX_CONFIG_LCD,
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MX28_PAD_LCD_D22__LCD_D22 | MUX_CONFIG_LCD,
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MX28_PAD_LCD_D23__LCD_D23 | MUX_CONFIG_LCD,
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MX28_PAD_LCD_DOTCLK__LCD_DOTCLK | MUX_CONFIG_LCD,
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MX28_PAD_LCD_ENABLE__LCD_ENABLE | MUX_CONFIG_LCD,
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/* UART1 */
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#ifdef CONFIG_DENX_M28_V10
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MX28_PAD_AUART0_CTS__DUART_RX,
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MX28_PAD_AUART0_RTS__DUART_TX,
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#else
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MX28_PAD_PWM0__DUART_RX,
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MX28_PAD_PWM1__DUART_TX,
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#endif
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MX28_PAD_AUART0_TX__DUART_RTS,
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MX28_PAD_AUART0_RX__DUART_CTS,
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/* UART2 */
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MX28_PAD_AUART1_RX__AUART1_RX,
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MX28_PAD_AUART1_TX__AUART1_TX,
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MX28_PAD_AUART1_RTS__AUART1_RTS,
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MX28_PAD_AUART1_CTS__AUART1_CTS,
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/* CAN */
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MX28_PAD_GPMI_RDY2__CAN0_TX,
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MX28_PAD_GPMI_RDY3__CAN0_RX,
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/* TSC2007 */
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MX28_PAD_SAIF0_MCLK__GPIO_3_20 | MUX_CONFIG_TSC,
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/* MMC0 */
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MX28_PAD_SSP0_DATA0__SSP0_D0 | MUX_CONFIG_SSP0,
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MX28_PAD_SSP0_DATA1__SSP0_D1 | MUX_CONFIG_SSP0,
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MX28_PAD_SSP0_DATA2__SSP0_D2 | MUX_CONFIG_SSP0,
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MX28_PAD_SSP0_DATA3__SSP0_D3 | MUX_CONFIG_SSP0,
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MX28_PAD_SSP0_DATA4__SSP0_D4 | MUX_CONFIG_SSP0,
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MX28_PAD_SSP0_DATA5__SSP0_D5 | MUX_CONFIG_SSP0,
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MX28_PAD_SSP0_DATA6__SSP0_D6 | MUX_CONFIG_SSP0,
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MX28_PAD_SSP0_DATA7__SSP0_D7 | MUX_CONFIG_SSP0,
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MX28_PAD_SSP0_CMD__SSP0_CMD | MUX_CONFIG_SSP0,
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MX28_PAD_SSP0_DETECT__SSP0_CARD_DETECT |
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(MXS_PAD_3V3 | MXS_PAD_12MA | MXS_PAD_NOPULL),
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MX28_PAD_SSP0_SCK__SSP0_SCK |
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(MXS_PAD_3V3 | MXS_PAD_12MA | MXS_PAD_NOPULL),
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MX28_PAD_PWM3__GPIO_3_28 | MUX_CONFIG_SSP0 |
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(MXS_PAD_3V3 | MXS_PAD_12MA | MXS_PAD_NOPULL), /* Power */
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MX28_PAD_AUART2_CTS__GPIO_3_10, /* WP */
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/* GPMI NAND */
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MX28_PAD_GPMI_D00__GPMI_D0 | MUX_CONFIG_GPMI,
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MX28_PAD_GPMI_D01__GPMI_D1 | MUX_CONFIG_GPMI,
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MX28_PAD_GPMI_D02__GPMI_D2 | MUX_CONFIG_GPMI,
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MX28_PAD_GPMI_D03__GPMI_D3 | MUX_CONFIG_GPMI,
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MX28_PAD_GPMI_D04__GPMI_D4 | MUX_CONFIG_GPMI,
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MX28_PAD_GPMI_D05__GPMI_D5 | MUX_CONFIG_GPMI,
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MX28_PAD_GPMI_D06__GPMI_D6 | MUX_CONFIG_GPMI,
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MX28_PAD_GPMI_D07__GPMI_D7 | MUX_CONFIG_GPMI,
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MX28_PAD_GPMI_CE0N__GPMI_CE0N | MUX_CONFIG_GPMI,
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MX28_PAD_GPMI_RDY0__GPMI_READY0 | MUX_CONFIG_GPMI,
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MX28_PAD_GPMI_RDN__GPMI_RDN |
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(MXS_PAD_1V8 | MXS_PAD_8MA | MXS_PAD_PULLUP),
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MX28_PAD_GPMI_WRN__GPMI_WRN | MUX_CONFIG_GPMI,
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MX28_PAD_GPMI_ALE__GPMI_ALE | MUX_CONFIG_GPMI,
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MX28_PAD_GPMI_CLE__GPMI_CLE | MUX_CONFIG_GPMI,
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MX28_PAD_GPMI_RESETN__GPMI_RESETN | MUX_CONFIG_GPMI,
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/* FEC Ethernet */
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MX28_PAD_ENET0_MDC__ENET0_MDC | MUX_CONFIG_ENET,
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MX28_PAD_ENET0_MDIO__ENET0_MDIO | MUX_CONFIG_ENET,
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||||
MX28_PAD_ENET0_RX_EN__ENET0_RX_EN | MUX_CONFIG_ENET,
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MX28_PAD_ENET0_TX_EN__ENET0_TX_EN | MUX_CONFIG_ENET,
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MX28_PAD_ENET0_RXD0__ENET0_RXD0 | MUX_CONFIG_ENET,
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MX28_PAD_ENET0_RXD1__ENET0_RXD1 | MUX_CONFIG_ENET,
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MX28_PAD_ENET0_TXD0__ENET0_TXD0 | MUX_CONFIG_ENET,
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MX28_PAD_ENET0_TXD1__ENET0_TXD1 | MUX_CONFIG_ENET,
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MX28_PAD_ENET_CLK__CLKCTRL_ENET | MUX_CONFIG_ENET,
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MX28_PAD_ENET0_COL__ENET1_TX_EN | MUX_CONFIG_ENET,
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MX28_PAD_ENET0_CRS__ENET1_RX_EN | MUX_CONFIG_ENET,
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MX28_PAD_ENET0_RXD2__ENET1_RXD0 | MUX_CONFIG_ENET,
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MX28_PAD_ENET0_RXD3__ENET1_RXD1 | MUX_CONFIG_ENET,
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MX28_PAD_ENET0_TXD2__ENET1_TXD0 | MUX_CONFIG_ENET,
|
||||
MX28_PAD_ENET0_TXD3__ENET1_TXD1 | MUX_CONFIG_ENET,
|
||||
#if !defined(CONFIG_DENX_M28_V11) && !defined(CONFIG_DENX_M28_V10)
|
||||
MX28_PAD_AUART2_RTS__GPIO_3_11, /* PHY reset */
|
||||
#endif
|
||||
|
||||
/* I2C */
|
||||
MX28_PAD_I2C0_SCL__I2C0_SCL,
|
||||
MX28_PAD_I2C0_SDA__I2C0_SDA,
|
||||
|
||||
/* EMI */
|
||||
MX28_PAD_EMI_D00__EMI_DATA0 | MUX_CONFIG_EMI,
|
||||
MX28_PAD_EMI_D01__EMI_DATA1 | MUX_CONFIG_EMI,
|
||||
MX28_PAD_EMI_D02__EMI_DATA2 | MUX_CONFIG_EMI,
|
||||
MX28_PAD_EMI_D03__EMI_DATA3 | MUX_CONFIG_EMI,
|
||||
MX28_PAD_EMI_D04__EMI_DATA4 | MUX_CONFIG_EMI,
|
||||
MX28_PAD_EMI_D05__EMI_DATA5 | MUX_CONFIG_EMI,
|
||||
MX28_PAD_EMI_D06__EMI_DATA6 | MUX_CONFIG_EMI,
|
||||
MX28_PAD_EMI_D07__EMI_DATA7 | MUX_CONFIG_EMI,
|
||||
MX28_PAD_EMI_D08__EMI_DATA8 | MUX_CONFIG_EMI,
|
||||
MX28_PAD_EMI_D09__EMI_DATA9 | MUX_CONFIG_EMI,
|
||||
MX28_PAD_EMI_D10__EMI_DATA10 | MUX_CONFIG_EMI,
|
||||
MX28_PAD_EMI_D11__EMI_DATA11 | MUX_CONFIG_EMI,
|
||||
MX28_PAD_EMI_D12__EMI_DATA12 | MUX_CONFIG_EMI,
|
||||
MX28_PAD_EMI_D13__EMI_DATA13 | MUX_CONFIG_EMI,
|
||||
MX28_PAD_EMI_D14__EMI_DATA14 | MUX_CONFIG_EMI,
|
||||
MX28_PAD_EMI_D15__EMI_DATA15 | MUX_CONFIG_EMI,
|
||||
MX28_PAD_EMI_ODT0__EMI_ODT0 | MUX_CONFIG_EMI,
|
||||
MX28_PAD_EMI_DQM0__EMI_DQM0 | MUX_CONFIG_EMI,
|
||||
MX28_PAD_EMI_ODT1__EMI_ODT1 | MUX_CONFIG_EMI,
|
||||
MX28_PAD_EMI_DQM1__EMI_DQM1 | MUX_CONFIG_EMI,
|
||||
MX28_PAD_EMI_DDR_OPEN_FB__EMI_DDR_OPEN_FEEDBACK | MUX_CONFIG_EMI,
|
||||
MX28_PAD_EMI_CLK__EMI_CLK | MUX_CONFIG_EMI,
|
||||
MX28_PAD_EMI_DQS0__EMI_DQS0 | MUX_CONFIG_EMI,
|
||||
MX28_PAD_EMI_DQS1__EMI_DQS1 | MUX_CONFIG_EMI,
|
||||
MX28_PAD_EMI_DDR_OPEN__EMI_DDR_OPEN | MUX_CONFIG_EMI,
|
||||
|
||||
MX28_PAD_EMI_A00__EMI_ADDR0 | MUX_CONFIG_EMI,
|
||||
MX28_PAD_EMI_A01__EMI_ADDR1 | MUX_CONFIG_EMI,
|
||||
MX28_PAD_EMI_A02__EMI_ADDR2 | MUX_CONFIG_EMI,
|
||||
MX28_PAD_EMI_A03__EMI_ADDR3 | MUX_CONFIG_EMI,
|
||||
MX28_PAD_EMI_A04__EMI_ADDR4 | MUX_CONFIG_EMI,
|
||||
MX28_PAD_EMI_A05__EMI_ADDR5 | MUX_CONFIG_EMI,
|
||||
MX28_PAD_EMI_A06__EMI_ADDR6 | MUX_CONFIG_EMI,
|
||||
MX28_PAD_EMI_A07__EMI_ADDR7 | MUX_CONFIG_EMI,
|
||||
MX28_PAD_EMI_A08__EMI_ADDR8 | MUX_CONFIG_EMI,
|
||||
MX28_PAD_EMI_A09__EMI_ADDR9 | MUX_CONFIG_EMI,
|
||||
MX28_PAD_EMI_A10__EMI_ADDR10 | MUX_CONFIG_EMI,
|
||||
MX28_PAD_EMI_A11__EMI_ADDR11 | MUX_CONFIG_EMI,
|
||||
MX28_PAD_EMI_A12__EMI_ADDR12 | MUX_CONFIG_EMI,
|
||||
MX28_PAD_EMI_A13__EMI_ADDR13 | MUX_CONFIG_EMI,
|
||||
MX28_PAD_EMI_A14__EMI_ADDR14 | MUX_CONFIG_EMI,
|
||||
MX28_PAD_EMI_BA0__EMI_BA0 | MUX_CONFIG_EMI,
|
||||
MX28_PAD_EMI_BA1__EMI_BA1 | MUX_CONFIG_EMI,
|
||||
MX28_PAD_EMI_BA2__EMI_BA2 | MUX_CONFIG_EMI,
|
||||
MX28_PAD_EMI_CASN__EMI_CASN | MUX_CONFIG_EMI,
|
||||
MX28_PAD_EMI_RASN__EMI_RASN | MUX_CONFIG_EMI,
|
||||
MX28_PAD_EMI_WEN__EMI_WEN | MUX_CONFIG_EMI,
|
||||
MX28_PAD_EMI_CE0N__EMI_CE0N | MUX_CONFIG_EMI,
|
||||
MX28_PAD_EMI_CE1N__EMI_CE1N | MUX_CONFIG_EMI,
|
||||
MX28_PAD_EMI_CKE__EMI_CKE | MUX_CONFIG_EMI,
|
||||
|
||||
/* SPI2 (for flash) */
|
||||
MX28_PAD_SSP2_SCK__SSP2_SCK | MUX_CONFIG_SSP2,
|
||||
MX28_PAD_SSP2_MOSI__SSP2_CMD | MUX_CONFIG_SSP2,
|
||||
MX28_PAD_SSP2_MISO__SSP2_D0 | MUX_CONFIG_SSP2,
|
||||
MX28_PAD_SSP2_SS0__SSP2_D3 |
|
||||
(MXS_PAD_3V3 | MXS_PAD_8MA | MXS_PAD_PULLUP),
|
||||
};
|
||||
|
||||
void board_init_ll(void)
|
||||
{
|
||||
mx28_common_spl_init(iomux_setup, ARRAY_SIZE(iomux_setup));
|
||||
}
|
||||
|
|
@ -0,0 +1,14 @@
|
|||
sources {
|
||||
u_boot_spl="spl/u-boot-spl.bin";
|
||||
u_boot="u-boot.bin";
|
||||
}
|
||||
|
||||
section (0) {
|
||||
load u_boot_spl > 0x0000;
|
||||
load ivt (entry = 0x0014) > 0x8000;
|
||||
hab call 0x8000;
|
||||
|
||||
load u_boot > 0x40000100;
|
||||
load ivt (entry = 0x40000100) > 0x8000;
|
||||
hab call 0x8000;
|
||||
}
|
||||
Loading…
Add table
Add a link
Reference in a new issue