mirror of
https://github.com/Ysurac/openmptcprouter.git
synced 2025-03-09 15:40:20 +00:00
Add a directory by kernel instead of a common root, add qnap-301w and rpi4 kernel 6.1 suppport
This commit is contained in:
Ycarus (Yannick Chabanois)
parent
e910436a7a
commit
46837ec4c0
9459 changed files with 362648 additions and 116345 deletions
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@ -0,0 +1,52 @@
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#
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# (C) Copyright 2008
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# Graeme Russ, graeme.russ@gmail.com.
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#
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# (C) Copyright 2006
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# Wolfgang Denk, DENX Software Engineering, wd@denx.de.
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#
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# (C) Copyright 2002
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# Daniel Engström, Omicron Ceti AB, daniel@omicron.se.
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#
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# See file CREDITS for list of people who contributed to this
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# project.
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#
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# This program is free software; you can redistribute it and/or
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# modify it under the terms of the GNU General Public License as
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# published by the Free Software Foundation; either version 2 of
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# the License, or (at your option) any later version.
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#
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# This program is distributed in the hope that it will be useful,
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# but WITHOUT ANY WARRANTY; without even the implied warranty of
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# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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# GNU General Public License for more details.
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#
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# You should have received a copy of the GNU General Public License
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||||
# along with this program; if not, write to the Free Software
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# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
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# MA 02111-1307 USA
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#
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include $(TOPDIR)/config.mk
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LIB = $(obj)lib$(BOARD).o
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COBJS-y += eNET.o
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COBJS-$(CONFIG_PCI) += eNET_pci.o
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SOBJS-y += eNET_start16.o
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SOBJS-y += eNET_start.o
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SRCS := $(SOBJS-y:.o=.S) $(COBJS-y:.o=.c)
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OBJS := $(addprefix $(obj),$(SOBJS-y) $(COBJS-y))
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$(LIB): $(obj).depend $(OBJS) $(SOBJS)
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$(call cmd_link_o_target, $(OBJS) $(SOBJS))
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#########################################################################
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# defines $(obj).depend target
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include $(SRCTREE)/rules.mk
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sinclude $(obj).depend
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#########################################################################
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284
common/package/utils/sysupgrade-helper/src/board/eNET/eNET.c
Normal file
284
common/package/utils/sysupgrade-helper/src/board/eNET/eNET.c
Normal file
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@ -0,0 +1,284 @@
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/*
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* (C) Copyright 2008
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* Graeme Russ, graeme.russ@gmail.com.
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*
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* See file CREDITS for list of people who contributed to this
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* project.
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*
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* This program is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License as
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||||
* published by the Free Software Foundation; either version 2 of
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* the License, or (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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||||
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, Inc., 59 Temple Place, Suite 330, Boston,
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* MA 02111-1307 USA
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*/
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#include <common.h>
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#include <asm/io.h>
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#include <asm/arch/sc520.h>
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#include <net.h>
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#include <netdev.h>
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#ifdef CONFIG_HW_WATCHDOG
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#include <watchdog.h>
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#endif
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#include "hardware.h"
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DECLARE_GLOBAL_DATA_PTR;
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unsigned long monitor_flash_len = CONFIG_SYS_MONITOR_LEN;
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static void enet_timer_isr(void);
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static void enet_toggle_run_led(void);
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static void enet_setup_pars(void);
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/*
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* Miscellaneous platform dependent initializations
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*/
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int board_early_init_f(void)
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{
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u16 pio_out_cfg = 0x0000;
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/* Configure General Purpose Bus timing */
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writeb(CONFIG_SYS_SC520_GPCSRT, &sc520_mmcr->gpcsrt);
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writeb(CONFIG_SYS_SC520_GPCSPW, &sc520_mmcr->gpcspw);
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writeb(CONFIG_SYS_SC520_GPCSOFF, &sc520_mmcr->gpcsoff);
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writeb(CONFIG_SYS_SC520_GPRDW, &sc520_mmcr->gprdw);
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writeb(CONFIG_SYS_SC520_GPRDOFF, &sc520_mmcr->gprdoff);
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writeb(CONFIG_SYS_SC520_GPWRW, &sc520_mmcr->gpwrw);
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writeb(CONFIG_SYS_SC520_GPWROFF, &sc520_mmcr->gpwroff);
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/* Configure Programmable Input/Output Pins */
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writew(CONFIG_SYS_SC520_PIODIR15_0, &sc520_mmcr->piodir15_0);
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writew(CONFIG_SYS_SC520_PIODIR31_16, &sc520_mmcr->piodir31_16);
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writew(CONFIG_SYS_SC520_PIOPFS31_16, &sc520_mmcr->piopfs31_16);
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writew(CONFIG_SYS_SC520_PIOPFS15_0, &sc520_mmcr->piopfs15_0);
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writeb(CONFIG_SYS_SC520_CSPFS, &sc520_mmcr->cspfs);
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writeb(CONFIG_SYS_SC520_CLKSEL, &sc520_mmcr->clksel);
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/*
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* Turn off top board
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* Set StrataFlash chips to 16-bit width
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* Set StrataFlash chips to normal (non reset/power down) mode
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*/
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pio_out_cfg |= CONFIG_SYS_ENET_TOP_BRD_PWR;
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pio_out_cfg |= CONFIG_SYS_ENET_SF_WIDTH;
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pio_out_cfg |= CONFIG_SYS_ENET_SF1_MODE;
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pio_out_cfg |= CONFIG_SYS_ENET_SF2_MODE;
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writew(pio_out_cfg, &sc520_mmcr->pioset15_0);
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/* Turn off auxiliary power output */
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writew(CONFIG_SYS_ENET_AUX_PWR, &sc520_mmcr->pioclr15_0);
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/* Clear FPGA program mode */
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writew(CONFIG_SYS_ENET_FPGA_PROG, &sc520_mmcr->pioset31_16);
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enet_setup_pars();
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/* Disable Watchdog */
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writew(0x3333, &sc520_mmcr->wdtmrctl);
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writew(0xcccc, &sc520_mmcr->wdtmrctl);
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writew(0x0000, &sc520_mmcr->wdtmrctl);
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/* Chip Select Configuration */
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writew(CONFIG_SYS_SC520_BOOTCS_CTRL, &sc520_mmcr->bootcsctl);
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writew(CONFIG_SYS_SC520_ROMCS1_CTRL, &sc520_mmcr->romcs1ctl);
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writew(CONFIG_SYS_SC520_ROMCS2_CTRL, &sc520_mmcr->romcs2ctl);
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writeb(CONFIG_SYS_SC520_ADDDECCTL, &sc520_mmcr->adddecctl);
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writeb(CONFIG_SYS_SC520_UART1CTL, &sc520_mmcr->uart1ctl);
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writeb(CONFIG_SYS_SC520_UART2CTL, &sc520_mmcr->uart2ctl);
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writeb(CONFIG_SYS_SC520_SYSARBCTL, &sc520_mmcr->sysarbctl);
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writew(CONFIG_SYS_SC520_SYSARBMENB, &sc520_mmcr->sysarbmenb);
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/* enable posted-writes */
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writeb(CONFIG_SYS_SC520_HBCTL, &sc520_mmcr->hbctl);
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return 0;
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}
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static void enet_setup_pars(void)
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{
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/*
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* PARs 11 and 12 are 2MB SRAM @ 0x19000000
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*
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* These are setup now because older version of U-Boot have them
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* mapped to a different PAR which gets clobbered which prevents
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* using SRAM for warm-booting a new image
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*/
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writel(CONFIG_SYS_SC520_SRAM1_PAR, &sc520_mmcr->par[11]);
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writel(CONFIG_SYS_SC520_SRAM2_PAR, &sc520_mmcr->par[12]);
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/* PARs 0 and 1 are Compact Flash slots (4kB each) */
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writel(CONFIG_SYS_SC520_CF1_PAR, &sc520_mmcr->par[0]);
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writel(CONFIG_SYS_SC520_CF2_PAR, &sc520_mmcr->par[1]);
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/* PAR 2 is used for Cache-As-RAM */
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/*
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* PARs 5 through 8 are additional NS16550 UARTS
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* 8 bytes each @ 0x013f8, 0x012f8, 0x011f8 and 0x010f8
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*/
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writel(CONFIG_SYS_SC520_UARTA_PAR, &sc520_mmcr->par[5]);
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writel(CONFIG_SYS_SC520_UARTB_PAR, &sc520_mmcr->par[6]);
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writel(CONFIG_SYS_SC520_UARTC_PAR, &sc520_mmcr->par[7]);
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writel(CONFIG_SYS_SC520_UARTD_PAR, &sc520_mmcr->par[8]);
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/* PARs 9 and 10 are 32MB StrataFlash @ 0x10000000 */
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writel(CONFIG_SYS_SC520_SF1_PAR, &sc520_mmcr->par[9]);
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writel(CONFIG_SYS_SC520_SF2_PAR, &sc520_mmcr->par[10]);
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/* PAR 13 is 4kB DPRAM @ 0x18100000 (implemented in FPGA) */
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writel(CONFIG_SYS_SC520_DPRAM_PAR, &sc520_mmcr->par[13]);
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/*
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* PAR 14 is Low Level I/O (LEDs, Hex Switches etc)
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* Already configured in board_init16 (eNET_start16.S)
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*
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* PAR 15 is Boot ROM
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* Already configured in board_init16 (eNET_start16.S)
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*/
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}
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int board_early_init_r(void)
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{
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/* CPU Speed to 100MHz */
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gd->cpu_clk = 100000000;
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/* Crystal is 33.000MHz */
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gd->bus_clk = 33000000;
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return 0;
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}
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void show_boot_progress(int val)
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{
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uchar led_mask;
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led_mask = 0x00;
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if (val < 0)
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led_mask |= LED_ERR_BITMASK;
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led_mask |= (uchar)(val & 0x001f);
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outb(led_mask, LED_LATCH_ADDRESS);
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}
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int last_stage_init(void)
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{
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outb(0x00, LED_LATCH_ADDRESS);
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register_timer_isr(enet_timer_isr);
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printf("Serck Controls eNET\n");
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return 0;
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}
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ulong board_flash_get_legacy(ulong base, int banknum, flash_info_t *info)
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{
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if (banknum == 0) { /* non-CFI boot flash */
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info->portwidth = FLASH_CFI_8BIT;
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info->chipwidth = FLASH_CFI_BY8;
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info->interface = FLASH_CFI_X8;
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return 1;
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} else {
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return 0;
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}
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}
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int board_eth_init(bd_t *bis)
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{
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return pci_eth_init(bis);
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}
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void setup_pcat_compatibility()
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{
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/* disable global interrupt mode */
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writeb(0x40, &sc520_mmcr->picicr);
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/* set all irqs to edge */
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writeb(0x00, &sc520_mmcr->pic_mode[0]);
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writeb(0x00, &sc520_mmcr->pic_mode[1]);
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writeb(0x00, &sc520_mmcr->pic_mode[2]);
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/*
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* active low polarity on PIC interrupt pins,
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* active high polarity on all other irq pins
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*/
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writew(0x0000, &sc520_mmcr->intpinpol);
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/*
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* PIT 0 -> IRQ0
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* RTC -> IRQ8
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* FP error -> IRQ13
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* UART1 -> IRQ4
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* UART2 -> IRQ3
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*/
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writeb(SC520_IRQ0, &sc520_mmcr->pit_int_map[0]);
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writeb(SC520_IRQ8, &sc520_mmcr->rtcmap);
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writeb(SC520_IRQ13, &sc520_mmcr->ferrmap);
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writeb(SC520_IRQ4, &sc520_mmcr->uart_int_map[0]);
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writeb(SC520_IRQ3, &sc520_mmcr->uart_int_map[1]);
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/* Disable all other interrupt sources */
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writeb(SC520_IRQ_DISABLED, &sc520_mmcr->gp_tmr_int_map[0]);
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writeb(SC520_IRQ_DISABLED, &sc520_mmcr->gp_tmr_int_map[1]);
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writeb(SC520_IRQ_DISABLED, &sc520_mmcr->gp_tmr_int_map[2]);
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writeb(SC520_IRQ_DISABLED, &sc520_mmcr->pit_int_map[1]);
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writeb(SC520_IRQ_DISABLED, &sc520_mmcr->pit_int_map[2]);
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writeb(SC520_IRQ_DISABLED, &sc520_mmcr->ssimap);
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writeb(SC520_IRQ_DISABLED, &sc520_mmcr->wdtmap);
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writeb(SC520_IRQ_DISABLED, &sc520_mmcr->wpvmap);
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writeb(SC520_IRQ_DISABLED, &sc520_mmcr->icemap);
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}
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void enet_timer_isr(void)
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{
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static long enet_ticks;
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enet_ticks++;
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/* Toggle Watchdog every 100ms */
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if ((enet_ticks % 100) == 0)
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hw_watchdog_reset();
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/* Toggle Run LED every 500ms */
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if ((enet_ticks % 500) == 0)
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enet_toggle_run_led();
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}
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void hw_watchdog_reset(void)
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{
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/* Watchdog Reset must be atomic */
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long flag = disable_interrupts();
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if (sc520_mmcr->piodata15_0 & WATCHDOG_PIO_BIT)
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sc520_mmcr->pioclr15_0 = WATCHDOG_PIO_BIT;
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else
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sc520_mmcr->pioset15_0 = WATCHDOG_PIO_BIT;
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if (flag)
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enable_interrupts();
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}
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void enet_toggle_run_led(void)
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{
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unsigned char leds_state = inb(LED_LATCH_ADDRESS);
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if (leds_state & LED_RUN_BITMASK)
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outb(leds_state & ~LED_RUN_BITMASK, LED_LATCH_ADDRESS);
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else
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outb(leds_state | LED_RUN_BITMASK, LED_LATCH_ADDRESS);
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}
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128
common/package/utils/sysupgrade-helper/src/board/eNET/eNET_pci.c
Normal file
128
common/package/utils/sysupgrade-helper/src/board/eNET/eNET_pci.c
Normal file
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@ -0,0 +1,128 @@
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/*
|
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* (C) Copyright 2008,2009
|
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* Graeme Russ, <graeme.russ@gmail.com>
|
||||
*
|
||||
* (C) Copyright 2002
|
||||
* Daniel Engström, Omicron Ceti AB, <daniel@omicron.se>
|
||||
*
|
||||
* See file CREDITS for list of people who contributed to this
|
||||
* project.
|
||||
*
|
||||
* This program is free software; you can redistribute it and/or
|
||||
* modify it under the terms of the GNU General Public License as
|
||||
* published by the Free Software Foundation; either version 2 of
|
||||
* the License, or (at your option) any later version.
|
||||
*
|
||||
* This program is distributed in the hope that it will be useful,
|
||||
* but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
||||
* GNU General Public License for more details.
|
||||
*
|
||||
* You should have received a copy of the GNU General Public License
|
||||
* along with this program; if not, write to the Free Software
|
||||
* Foundation, Inc., 59 Temple Place, Suite 330, Boston,
|
||||
* MA 02111-1307 USA
|
||||
*/
|
||||
|
||||
#include <common.h>
|
||||
#include <pci.h>
|
||||
#include <asm/pci.h>
|
||||
#include <asm/arch/pci.h>
|
||||
|
||||
static void pci_enet_fixup_irq(struct pci_controller *hose, pci_dev_t dev)
|
||||
{
|
||||
/* a configurable lists of IRQs to steal when we need one */
|
||||
static int irq_list[] = {
|
||||
CONFIG_SYS_FIRST_PCI_IRQ,
|
||||
CONFIG_SYS_SECOND_PCI_IRQ,
|
||||
CONFIG_SYS_THIRD_PCI_IRQ,
|
||||
CONFIG_SYS_FORTH_PCI_IRQ
|
||||
};
|
||||
static int next_irq_index;
|
||||
|
||||
uchar tmp_pin;
|
||||
int pin;
|
||||
|
||||
pci_hose_read_config_byte(hose, dev, PCI_INTERRUPT_PIN, &tmp_pin);
|
||||
pin = tmp_pin;
|
||||
|
||||
pin -= 1; /* PCI config space use 1-based numbering */
|
||||
if (pin == -1)
|
||||
return; /* device use no irq */
|
||||
|
||||
/* map device number + pin to a pin on the sc520 */
|
||||
switch (PCI_DEV(dev)) {
|
||||
case 12: /* First Ethernet Chip */
|
||||
pin += SC520_PCI_INTA;
|
||||
break;
|
||||
|
||||
case 13: /* Second Ethernet Chip */
|
||||
pin += SC520_PCI_INTB;
|
||||
break;
|
||||
|
||||
default:
|
||||
return;
|
||||
}
|
||||
|
||||
pin &= 3; /* wrap around */
|
||||
|
||||
if (sc520_pci_ints[pin] == -1) {
|
||||
/* re-route one interrupt for us */
|
||||
if (next_irq_index > 3)
|
||||
return;
|
||||
|
||||
if (pci_sc520_set_irq(pin, irq_list[next_irq_index]))
|
||||
return;
|
||||
|
||||
next_irq_index++;
|
||||
}
|
||||
|
||||
if (-1 != sc520_pci_ints[pin])
|
||||
pci_hose_write_config_byte(hose, dev, PCI_INTERRUPT_LINE,
|
||||
sc520_pci_ints[pin]);
|
||||
|
||||
printf("fixup_irq: device %d pin %c irq %d\n",
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||||
PCI_DEV(dev), 'A' + pin, sc520_pci_ints[pin]);
|
||||
}
|
||||
|
||||
static struct pci_controller enet_hose = {
|
||||
fixup_irq: pci_enet_fixup_irq,
|
||||
};
|
||||
|
||||
void pci_init_board(void)
|
||||
{
|
||||
pci_sc520_init(&enet_hose);
|
||||
}
|
||||
|
||||
int pci_set_regions(struct pci_controller *hose)
|
||||
{
|
||||
/* System memory space */
|
||||
pci_set_region(hose->regions + 0,
|
||||
SC520_PCI_MEMORY_BUS,
|
||||
SC520_PCI_MEMORY_PHYS,
|
||||
SC520_PCI_MEMORY_SIZE,
|
||||
PCI_REGION_MEM | PCI_REGION_SYS_MEMORY);
|
||||
|
||||
/* ISA/PCI memory space */
|
||||
pci_set_region(hose->regions + 1,
|
||||
SC520_ISA_MEM_BUS,
|
||||
SC520_ISA_MEM_PHYS,
|
||||
SC520_ISA_MEM_SIZE,
|
||||
PCI_REGION_MEM);
|
||||
|
||||
/* PCI I/O space */
|
||||
pci_set_region(hose->regions + 2,
|
||||
SC520_PCI_IO_BUS,
|
||||
SC520_PCI_IO_PHYS,
|
||||
SC520_PCI_IO_SIZE,
|
||||
PCI_REGION_IO);
|
||||
|
||||
/* ISA/PCI I/O space */
|
||||
pci_set_region(hose->regions + 3,
|
||||
SC520_ISA_IO_BUS,
|
||||
SC520_ISA_IO_PHYS,
|
||||
SC520_ISA_IO_SIZE,
|
||||
PCI_REGION_IO);
|
||||
|
||||
return 4;
|
||||
}
|
||||
|
|
@ -0,0 +1,30 @@
|
|||
/*
|
||||
* (C) Copyright 2008
|
||||
* Graeme Russ, graeme.russ@gmail.com.
|
||||
*
|
||||
* See file CREDITS for list of people who contributed to this
|
||||
* project.
|
||||
*
|
||||
* This program is free software; you can redistribute it and/or
|
||||
* modify it under the terms of the GNU General Public License as
|
||||
* published by the Free Software Foundation; either version 2 of
|
||||
* the License, or (at your option) any later version.
|
||||
*
|
||||
* This program is distributed in the hope that it will be useful,
|
||||
* but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
||||
* GNU General Public License for more details.
|
||||
*
|
||||
* You should have received a copy of the GNU General Public License
|
||||
* along with this program; if not, write to the Free Software
|
||||
* Foundation, Inc., 59 Temple Place, Suite 330, Boston,
|
||||
* MA 02111-1307 USA
|
||||
*/
|
||||
|
||||
#include "hardware.h"
|
||||
|
||||
/* board early intialization */
|
||||
.globl early_board_init
|
||||
early_board_init:
|
||||
/* No 32-bit board specific initialisation */
|
||||
jmp early_board_init_ret
|
||||
|
|
@ -0,0 +1,87 @@
|
|||
/*
|
||||
* (C) Copyright 2008
|
||||
* Graeme Russ, graeme.russ@gmail.com.
|
||||
*
|
||||
* See file CREDITS for list of people who contributed to this
|
||||
* project.
|
||||
*
|
||||
* This program is free software; you can redistribute it and/or
|
||||
* modify it under the terms of the GNU General Public License as
|
||||
* published by the Free Software Foundation; either version 2 of
|
||||
* the License, or (at your option) any later version.
|
||||
*
|
||||
* This program is distributed in the hope that it will be useful,
|
||||
* but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
||||
* GNU General Public License for more details.
|
||||
*
|
||||
* You should have received a copy of the GNU General Public License
|
||||
* along with this program; if not, write to the Free Software
|
||||
* Foundation, Inc., 59 Temple Place, Suite 330, Boston,
|
||||
* MA 02111-1307 USA
|
||||
*/
|
||||
|
||||
/*
|
||||
* 16bit initialization code.
|
||||
* This code have to map the area of the boot flash
|
||||
* that is used by U-boot to its final destination.
|
||||
*/
|
||||
|
||||
#include "config.h"
|
||||
#include "hardware.h"
|
||||
#include <asm/arch/sc520.h>
|
||||
#include <generated/asm-offsets.h>
|
||||
|
||||
.text
|
||||
.section .start16, "ax"
|
||||
.code16
|
||||
.globl board_init16
|
||||
board_init16:
|
||||
/* Alias MMCR to 0xdf000 */
|
||||
movw $0xfffc, %dx
|
||||
movl $0x800df0cb, %eax
|
||||
outl %eax, %dx
|
||||
|
||||
/* Set ds to point to MMCR alias */
|
||||
movw $0xdf00, %ax
|
||||
movw %ax, %ds
|
||||
|
||||
/* Map PAR for Boot Flash (BOOTCS, 512kB @ 0x380000000) */
|
||||
movl $GENERATED_SC520_PAR14, %edi
|
||||
movl $CONFIG_SYS_SC520_BOOTCS_PAR, %eax
|
||||
movl %eax, (%di)
|
||||
|
||||
/* Map PAR for LED, Hex Switches (GPCS6, 20 Bytes @ 0x1000) */
|
||||
movl $GENERATED_SC520_PAR15, %edi
|
||||
movl $CONFIG_SYS_SC520_LLIO_PAR, %eax
|
||||
movl %eax, (%di)
|
||||
|
||||
/* Disabe MMCR alias */
|
||||
movw $0xfffc, %dx
|
||||
movl $0x000000cb, %eax
|
||||
outl %eax, %dx
|
||||
|
||||
jmp board_init16_ret
|
||||
|
||||
.section .bios, "ax"
|
||||
.code16
|
||||
.globl realmode_reset
|
||||
.hidden realmode_reset
|
||||
.type realmode_reset, @function
|
||||
realmode_reset:
|
||||
/* Alias MMCR to 0xdf000 */
|
||||
movw $0xfffc, %dx
|
||||
movl $0x800df0cb, %eax
|
||||
outl %eax, %dx
|
||||
|
||||
/* Set ds to point to MMCR alias */
|
||||
movw $0xdf00, %ax
|
||||
movw %ax, %ds
|
||||
|
||||
/* issue software reset thorugh MMCR */
|
||||
movl $0xd72, %edi
|
||||
movb $0x01, %al
|
||||
movb %al, (%di)
|
||||
|
||||
1: hlt
|
||||
jmp 1
|
||||
|
|
@ -0,0 +1,36 @@
|
|||
/*
|
||||
* (C) Copyright 2008
|
||||
* Graeme Russ, graeme.russ@gmail.com.
|
||||
*
|
||||
* See file CREDITS for list of people who contributed to this
|
||||
* project.
|
||||
*
|
||||
* This program is free software; you can redistribute it and/or
|
||||
* modify it under the terms of the GNU General Public License as
|
||||
* published by the Free Software Foundation; either version 2 of
|
||||
* the License, or (at your option) any later version.
|
||||
*
|
||||
* This program is distributed in the hope that it will be useful,
|
||||
* but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
||||
* GNU General Public License for more details.
|
||||
*
|
||||
* You should have received a copy of the GNU General Public License
|
||||
* along with this program; if not, write to the Free Software
|
||||
* Foundation, Inc., 59 Temple Place, Suite 330, Boston,
|
||||
* MA 02111-1307 USA
|
||||
*/
|
||||
|
||||
#ifndef HARDWARE_H_
|
||||
#define HARDWARE_H_
|
||||
|
||||
#define LED_LATCH_ADDRESS 0x1002
|
||||
#define LED_RUN_BITMASK 0x01
|
||||
#define LED_1_BITMASK 0x02
|
||||
#define LED_2_BITMASK 0x04
|
||||
#define LED_RX_BITMASK 0x08
|
||||
#define LED_TX_BITMASK 0x10
|
||||
#define LED_ERR_BITMASK 0x20
|
||||
#define WATCHDOG_PIO_BIT 0x8000
|
||||
|
||||
#endif /* HARDWARE_H_ */
|
||||
Loading…
Add table
Add a link
Reference in a new issue