mirror of
https://github.com/Ysurac/openmptcprouter.git
synced 2025-03-09 15:40:20 +00:00
Add a directory by kernel instead of a common root, add qnap-301w and rpi4 kernel 6.1 suppport
This commit is contained in:
parent
e910436a7a
commit
46837ec4c0
9459 changed files with 362648 additions and 116345 deletions
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#
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# (C) Copyright 2000-2006
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# Wolfgang Denk, DENX Software Engineering, wd@denx.de.
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#
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# See file CREDITS for list of people who contributed to this
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# project.
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#
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# This program is free software; you can redistribute it and/or
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# modify it under the terms of the GNU General Public License as
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# published by the Free Software Foundation; either version 2 of
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# the License, or (at your option) any later version.
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#
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# This program is distributed in the hope that it will be useful,
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# but WITHOUT ANY WARRANTY; without even the implied warranty of
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# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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# GNU General Public License for more details.
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#
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# You should have received a copy of the GNU General Public License
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# along with this program; if not, write to the Free Software
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# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
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# MA 02111-1307 USA
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#
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include $(TOPDIR)/config.mk
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LIB = $(obj)lib$(BOARD).o
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COBJS = $(BOARD).o flash.o
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SRCS := $(SOBJS:.o=.S) $(COBJS:.o=.c)
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OBJS := $(addprefix $(obj),$(COBJS))
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SOBJS := $(addprefix $(obj),$(SOBJS))
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$(LIB): $(obj).depend $(OBJS)
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$(call cmd_link_o_target, $(OBJS))
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#########################################################################
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# defines $(obj).depend target
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include $(SRCTREE)/rules.mk
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sinclude $(obj).depend
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#########################################################################
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465
common/package/utils/sysupgrade-helper/src/board/genietv/flash.c
Normal file
465
common/package/utils/sysupgrade-helper/src/board/genietv/flash.c
Normal file
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/*
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* (C) Copyright 2000-2011
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* Wolfgang Denk, DENX Software Engineering, wd@denx.de.
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*
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* See file CREDITS for list of people who contributed to this
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* project.
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*
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* This program is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License as
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||||
* published by the Free Software Foundation; either version 2 of
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* the License, or (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, Inc., 59 Temple Place, Suite 330, Boston,
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* MA 02111-1307 USA
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*/
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#include <common.h>
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#include <mpc8xx.h>
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flash_info_t flash_info[CONFIG_SYS_MAX_FLASH_BANKS];
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/*-----------------------------------------------------------------------
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* Functions
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*/
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static ulong flash_get_size(vu_long *addr, flash_info_t *info);
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static int write_word(flash_info_t *info, ulong dest, ulong data);
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static void flash_get_offsets(ulong base, flash_info_t *info);
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/*-----------------------------------------------------------------------
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*/
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unsigned long flash_init(void)
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{
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unsigned long size_b0;
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int i;
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/* Init: no FLASHes known */
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for (i = 0; i < CONFIG_SYS_MAX_FLASH_BANKS; ++i)
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flash_info[i].flash_id = FLASH_UNKNOWN;
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/* Detect size */
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size_b0 = flash_get_size((vu_long *)CONFIG_SYS_FLASH_BASE,
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&flash_info[0]);
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/* Setup offsets */
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flash_get_offsets(CONFIG_SYS_FLASH_BASE, &flash_info[0]);
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#if CONFIG_SYS_MONITOR_BASE >= CONFIG_SYS_FLASH_BASE
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/* Monitor protection ON by default */
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flash_protect(FLAG_PROTECT_SET,
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CONFIG_SYS_MONITOR_BASE,
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CONFIG_SYS_MONITOR_BASE+monitor_flash_len-1,
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&flash_info[0]);
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#endif
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flash_info[0].size = size_b0;
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return size_b0;
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}
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/*-----------------------------------------------------------------------
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* Fix this to support variable sector sizes
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*/
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static void flash_get_offsets(ulong base, flash_info_t *info)
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{
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int i;
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/* set up sector start address table */
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if ((info->flash_id & FLASH_TYPEMASK) == FLASH_AM040) {
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/* set sector offsets for bottom boot block type */
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for (i = 0; i < info->sector_count; i++)
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info->start[i] = base + (i * 0x00010000);
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}
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}
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/*-----------------------------------------------------------------------
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*/
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void flash_print_info(flash_info_t *info)
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{
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int i;
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if (info->flash_id == FLASH_UNKNOWN) {
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puts("missing or unknown FLASH type\n");
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return;
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}
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switch (info->flash_id & FLASH_VENDMASK) {
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case FLASH_MAN_AMD:
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printf("AMD ");
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break;
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case FLASH_MAN_FUJ:
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printf("FUJITSU ");
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break;
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case FLASH_MAN_BM:
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printf("BRIGHT MICRO ");
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break;
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default:
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printf("Unknown Vendor ");
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break;
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}
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switch (info->flash_id & FLASH_TYPEMASK) {
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case FLASH_AM040:
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printf("29F040 or 29LV040 (4 Mbit, uniform sectors)\n");
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break;
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case FLASH_AM400B:
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printf("AM29LV400B (4 Mbit, bottom boot sect)\n");
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break;
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case FLASH_AM400T:
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printf("AM29LV400T (4 Mbit, top boot sector)\n");
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break;
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case FLASH_AM800B:
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printf("AM29LV800B (8 Mbit, bottom boot sect)\n");
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break;
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case FLASH_AM800T:
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printf("AM29LV800T (8 Mbit, top boot sector)\n");
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break;
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case FLASH_AM160B:
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printf("AM29LV160B (16 Mbit, bottom boot sect)\n");
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break;
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case FLASH_AM160T:
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printf("AM29LV160T (16 Mbit, top boot sector)\n");
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break;
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case FLASH_AM320B:
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printf("AM29LV320B (32 Mbit, bottom boot sect)\n");
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break;
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case FLASH_AM320T:
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printf("AM29LV320T (32 Mbit, top boot sector)\n");
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break;
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default:
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printf("Unknown Chip Type\n");
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break;
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}
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if (info->size >> 20) {
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printf(" Size: %ld MB in %d Sectors\n",
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info->size >> 20,
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info->sector_count);
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} else {
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printf(" Size: %ld KB in %d Sectors\n",
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info->size >> 10,
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info->sector_count);
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}
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puts(" Sector Start Addresses:");
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for (i = 0; i < info->sector_count; ++i) {
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if ((i % 5) == 0)
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puts("\n ");
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printf(" %08lX%s",
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info->start[i],
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info->protect[i] ? " (RO)" : " ");
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}
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putc('\n');
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return;
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}
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/*-----------------------------------------------------------------------
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*/
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/*
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* The following code cannot be run from FLASH!
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*/
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static ulong flash_get_size(vu_long *addr, flash_info_t *info)
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{
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short i;
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volatile unsigned char *caddr;
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char value;
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caddr = (volatile unsigned char *)addr ;
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/* Write auto select command: read Manufacturer ID */
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debug("Base address is: %8p\n", caddr);
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caddr[0x0555] = 0xAA;
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caddr[0x02AA] = 0x55;
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caddr[0x0555] = 0x90;
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value = caddr[0];
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debug("Manufact ID: %02x\n", value);
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switch (value) {
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case 0x1: /* AMD_MANUFACT */
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info->flash_id = FLASH_MAN_AMD;
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break;
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case 0x4: /* FUJ_MANUFACT */
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info->flash_id = FLASH_MAN_FUJ;
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break;
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default:
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info->flash_id = FLASH_UNKNOWN;
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info->sector_count = 0;
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info->size = 0;
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break;
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}
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value = caddr[1]; /* device ID */
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debug("Device ID: %02x\n", value);
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switch (value) {
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case AMD_ID_LV040B:
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info->flash_id += FLASH_AM040;
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info->sector_count = 8;
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info->size = 0x00080000;
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break; /* => 512Kb */
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default:
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info->flash_id = FLASH_UNKNOWN;
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return 0; /* => no or unknown flash */
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}
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flash_get_offsets((ulong)addr, &flash_info[0]);
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/* check for protected sectors */
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for (i = 0; i < info->sector_count; i++) {
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/*
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* read sector protection at sector address,
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* (A7 .. A0) = 0x02
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* D0 = 1 if protected
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*/
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caddr = (volatile unsigned char *)(info->start[i]);
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info->protect[i] = caddr[2] & 1;
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}
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/*
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* Prevent writes to uninitialized FLASH.
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*/
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if (info->flash_id != FLASH_UNKNOWN) {
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caddr = (volatile unsigned char *)info->start[0];
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*caddr = 0xF0; /* reset bank */
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}
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return info->size;
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}
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int flash_erase(flash_info_t *info, int s_first, int s_last)
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{
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volatile unsigned char *addr =
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(volatile unsigned char *)(info->start[0]);
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int flag, prot, sect, l_sect;
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ulong start, now, last;
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if ((s_first < 0) || (s_first > s_last)) {
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if (info->flash_id == FLASH_UNKNOWN)
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printf("- missing\n");
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else
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printf("- no sectors to erase\n");
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return 1;
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}
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if ((info->flash_id == FLASH_UNKNOWN) ||
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(info->flash_id > FLASH_AMD_COMP)) {
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printf("Can't erase unknown flash type - aborted\n");
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return 1;
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}
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prot = 0;
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for (sect = s_first; sect <= s_last; ++sect) {
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if (info->protect[sect])
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prot++;
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}
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if (prot) {
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printf("- Warning: %d protected sectors will not be erased!\n",
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prot);
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} else {
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printf("\n");
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}
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l_sect = -1;
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/* Disable interrupts which might cause a timeout here */
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flag = disable_interrupts();
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addr[0x0555] = 0xAA;
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addr[0x02AA] = 0x55;
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addr[0x0555] = 0x80;
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addr[0x0555] = 0xAA;
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addr[0x02AA] = 0x55;
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/* Start erase on unprotected sectors */
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for (sect = s_first; sect <= s_last; sect++) {
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if (info->protect[sect] == 0) { /* not protected */
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addr = (volatile unsigned char *)(info->start[sect]);
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addr[0] = 0x30;
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l_sect = sect;
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}
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}
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|
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/* re-enable interrupts if necessary */
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if (flag)
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enable_interrupts();
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|
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/* wait at least 80us - let's wait 1 ms */
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udelay(1000);
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|
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/*
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* We wait for the last triggered sector
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*/
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if (l_sect < 0)
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goto DONE;
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start = get_timer(0);
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last = start;
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addr = (volatile unsigned char *)(info->start[l_sect]);
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|
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while ((addr[0] & 0xFF) != 0xFF) {
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|
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now = get_timer(start);
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|
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if (now > CONFIG_SYS_FLASH_ERASE_TOUT) {
|
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printf("Timeout\n");
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return 1;
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}
|
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/* show that we're waiting */
|
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if ((now - last) > 1000) { /* every second */
|
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putc('.');
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last = now;
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}
|
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}
|
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|
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DONE:
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/* reset to read mode */
|
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addr = (volatile unsigned char *)info->start[0];
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addr[0] = 0xF0; /* reset bank */
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printf(" done\n");
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return 0;
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}
|
||||
|
||||
/*-----------------------------------------------------------------------
|
||||
* Copy memory to flash, returns:
|
||||
* 0 - OK
|
||||
* 1 - write timeout
|
||||
* 2 - Flash not erased
|
||||
*/
|
||||
|
||||
int write_buff(flash_info_t *info, uchar *src, ulong addr, ulong cnt)
|
||||
{
|
||||
ulong cp, wp, data;
|
||||
int i, l, rc;
|
||||
|
||||
wp = (addr & ~3); /* get lower word aligned address */
|
||||
|
||||
/*
|
||||
* handle unaligned start bytes
|
||||
*/
|
||||
l = addr - wp;
|
||||
|
||||
if (l != 0) {
|
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data = 0;
|
||||
for (i = 0, cp = wp; i < l; ++i, ++cp)
|
||||
data = (data << 8) | (*(uchar *)cp);
|
||||
|
||||
for (; i < 4 && cnt > 0; ++i) {
|
||||
data = (data << 8) | *src++;
|
||||
--cnt;
|
||||
++cp;
|
||||
}
|
||||
for (; cnt == 0 && i < 4; ++i, ++cp)
|
||||
data = (data << 8) | (*(uchar *)cp);
|
||||
|
||||
rc = write_word(info, wp, data);
|
||||
|
||||
if (rc != 0)
|
||||
return rc;
|
||||
|
||||
wp += 4;
|
||||
}
|
||||
|
||||
/*
|
||||
* handle word aligned part
|
||||
*/
|
||||
while (cnt >= 4) {
|
||||
data = 0;
|
||||
for (i = 0; i < 4; ++i)
|
||||
data = (data << 8) | *src++;
|
||||
|
||||
rc = write_word(info, wp, data);
|
||||
|
||||
if (rc != 0)
|
||||
return rc;
|
||||
|
||||
wp += 4;
|
||||
cnt -= 4;
|
||||
}
|
||||
|
||||
if (cnt == 0)
|
||||
return 0;
|
||||
|
||||
/*
|
||||
* handle unaligned tail bytes
|
||||
*/
|
||||
data = 0;
|
||||
for (i = 0, cp = wp; i < 4 && cnt > 0; ++i, ++cp) {
|
||||
data = (data << 8) | *src++;
|
||||
--cnt;
|
||||
}
|
||||
for (; i < 4; ++i, ++cp)
|
||||
data = (data << 8) | (*(uchar *)cp);
|
||||
|
||||
return write_word(info, wp, data);
|
||||
}
|
||||
|
||||
/*-----------------------------------------------------------------------
|
||||
* Write a word to Flash, returns:
|
||||
* 0 - OK
|
||||
* 1 - write timeout
|
||||
* 2 - Flash not erased
|
||||
*/
|
||||
static int write_word(flash_info_t *info, ulong dest, ulong data)
|
||||
{
|
||||
volatile unsigned char *cdest, *cdata;
|
||||
volatile unsigned char *addr =
|
||||
(volatile unsigned char *)(info->start[0]);
|
||||
ulong start;
|
||||
int flag, count = 4 ;
|
||||
|
||||
cdest = (volatile unsigned char *)dest ;
|
||||
cdata = (volatile unsigned char *)&data ;
|
||||
|
||||
/* Check if Flash is (sufficiently) erased */
|
||||
if ((*((vu_long *)dest) & data) != data)
|
||||
return 2;
|
||||
|
||||
while (count--) {
|
||||
|
||||
/* Disable interrupts which might cause a timeout here */
|
||||
flag = disable_interrupts();
|
||||
|
||||
addr[0x0555] = 0xAA;
|
||||
addr[0x02AA] = 0x55;
|
||||
addr[0x0555] = 0xA0;
|
||||
|
||||
*cdest = *cdata;
|
||||
|
||||
/* re-enable interrupts if necessary */
|
||||
if (flag)
|
||||
enable_interrupts();
|
||||
|
||||
/* data polling for D7 */
|
||||
start = get_timer(0);
|
||||
while ((*cdest ^ *cdata) & 0x80) {
|
||||
if (get_timer(start) > CONFIG_SYS_FLASH_WRITE_TOUT)
|
||||
return 1;
|
||||
}
|
||||
|
||||
cdata++ ;
|
||||
cdest++ ;
|
||||
}
|
||||
return 0;
|
||||
}
|
||||
|
|
@ -0,0 +1,360 @@
|
|||
/*
|
||||
* genietv/genietv.c
|
||||
*
|
||||
* The GENIETV is using the following physical memorymap (copied from
|
||||
* the FADS configuration):
|
||||
*
|
||||
* ff020000 -> ff02ffff : pcmcia
|
||||
* ff010000 -> ff01ffff : BCSR connected to CS1, setup by 8xxROM
|
||||
* ff000000 -> ff00ffff : IMAP internal in the cpu
|
||||
* 02800000 -> 0287ffff : flash connected to CS0
|
||||
* 00000000 -> nnnnnnnn : sdram setup by U-Boot
|
||||
*
|
||||
* CS pins are connected as follows:
|
||||
*
|
||||
* CS0 -512Kb boot flash
|
||||
* CS1 - SDRAM #1
|
||||
* CS2 - SDRAM #2
|
||||
* CS3 - Flash #1
|
||||
* CS4 - Flash #2
|
||||
* CS5 - LON (if present)
|
||||
* CS6 - PCMCIA #1
|
||||
* CS7 - PCMCIA #2
|
||||
*
|
||||
* Ports are configured as follows:
|
||||
*
|
||||
* PA7 - SDRAM banks enable
|
||||
*/
|
||||
|
||||
#include <common.h>
|
||||
#include <mpc8xx.h>
|
||||
|
||||
#define CONFIG_SYS_PA7 0x0100
|
||||
|
||||
/* ------------------------------------------------------------------------- */
|
||||
|
||||
static long int dram_size (long int, long int *, long int);
|
||||
|
||||
/* ------------------------------------------------------------------------- */
|
||||
|
||||
#define _NOT_USED_ 0xFFFFFFFF
|
||||
|
||||
const uint sdram_table[] = {
|
||||
/*
|
||||
* Single Read. (Offset 0 in UPMB RAM)
|
||||
*/
|
||||
0x1F0DFC04, 0xEEAFBC04, 0x11AF7C04, 0xEFBEEC00,
|
||||
0x1FFDDC47, /* last */
|
||||
/*
|
||||
* SDRAM Initialization (offset 5 in UPMB RAM)
|
||||
*
|
||||
* This is no UPM entry point. The following definition uses
|
||||
* the remaining space to establish an initialization
|
||||
* sequence, which is executed by a RUN command.
|
||||
*
|
||||
*/
|
||||
0x1FFDDC34, 0xEFEEAC34, 0x1FBD5C35, /* last */
|
||||
/*
|
||||
* Burst Read. (Offset 8 in UPMB RAM)
|
||||
*/
|
||||
0x1F0DFC04, 0xEEAFBC04, 0x10AF7C04, 0xF0AFFC00,
|
||||
0xF0AFFC00, 0xF1AFFC00, 0xEFBEEC00, 0x1FFDDC47, /* last */
|
||||
_NOT_USED_, _NOT_USED_, _NOT_USED_, _NOT_USED_,
|
||||
_NOT_USED_, _NOT_USED_, _NOT_USED_, _NOT_USED_,
|
||||
/*
|
||||
* Single Write. (Offset 18 in UPMB RAM)
|
||||
*/
|
||||
0x1F2DFC04, 0xEEAFAC00, 0x01BE4C04, 0x1FFDDC47, /* last */
|
||||
_NOT_USED_, _NOT_USED_, _NOT_USED_, _NOT_USED_,
|
||||
/*
|
||||
* Burst Write. (Offset 20 in UPMB RAM)
|
||||
*/
|
||||
0x1F0DFC04, 0xEEAFAC00, 0x10AF5C00, 0xF0AFFC00,
|
||||
0xF0AFFC00, 0xE1BEEC04, 0x1FFDDC47, /* last */
|
||||
_NOT_USED_,
|
||||
_NOT_USED_, _NOT_USED_, _NOT_USED_, _NOT_USED_,
|
||||
_NOT_USED_, _NOT_USED_, _NOT_USED_, _NOT_USED_,
|
||||
/*
|
||||
* Refresh (Offset 30 in UPMB RAM)
|
||||
*/
|
||||
0x1FFD7C84, 0xFFFFFC04, 0xFFFFFC04, 0xFFFFFC04,
|
||||
0xFFFFFC84, 0xFFFFFC07, /* last */
|
||||
_NOT_USED_, _NOT_USED_,
|
||||
_NOT_USED_, _NOT_USED_, _NOT_USED_, _NOT_USED_,
|
||||
/*
|
||||
* Exception. (Offset 3c in UPMB RAM)
|
||||
*/
|
||||
0x7FFFFC07, /* last */
|
||||
_NOT_USED_, _NOT_USED_, _NOT_USED_,
|
||||
};
|
||||
|
||||
/* ------------------------------------------------------------------------- */
|
||||
|
||||
|
||||
/*
|
||||
* Check Board Identity
|
||||
*/
|
||||
|
||||
int checkboard (void)
|
||||
{
|
||||
puts ("Board: GenieTV\n");
|
||||
return 0;
|
||||
}
|
||||
|
||||
#if 0
|
||||
static void PrintState (void)
|
||||
{
|
||||
volatile immap_t *im = (immap_t *) CONFIG_SYS_IMMR;
|
||||
volatile memctl8xx_t *memctl = &im->im_memctl;
|
||||
|
||||
printf ("\n0 - FLASH: B=%08x O=%08x", memctl->memc_br0,
|
||||
memctl->memc_or0);
|
||||
printf ("\n1 - SDRAM: B=%08x O=%08x", memctl->memc_br1,
|
||||
memctl->memc_or1);
|
||||
printf ("\n2 - SDRAM: B=%08x O=%08x", memctl->memc_br2,
|
||||
memctl->memc_or2);
|
||||
}
|
||||
#endif
|
||||
|
||||
/* ------------------------------------------------------------------------- */
|
||||
|
||||
phys_size_t initdram (int board_type)
|
||||
{
|
||||
volatile immap_t *im = (immap_t *) CONFIG_SYS_IMMR;
|
||||
volatile memctl8xx_t *memctl = &im->im_memctl;
|
||||
long int size_b0, size_b1, size8;
|
||||
|
||||
/* Enable SDRAM */
|
||||
|
||||
/* Configuring PA7 for general purpouse output pin */
|
||||
im->im_ioport.iop_papar &= ~CONFIG_SYS_PA7; /* 0 = general purpouse */
|
||||
im->im_ioport.iop_padir |= CONFIG_SYS_PA7; /* 1 = output */
|
||||
|
||||
/* Enable SDRAM - PA7 = 1 */
|
||||
im->im_ioport.iop_padat |= CONFIG_SYS_PA7; /* value of PA7 */
|
||||
|
||||
/*
|
||||
* Preliminary prescaler for refresh (depends on number of
|
||||
* banks): This value is selected for four cycles every 62.4 us
|
||||
* with two SDRAM banks or four cycles every 31.2 us with one
|
||||
* bank. It will be adjusted after memory sizing.
|
||||
*/
|
||||
memctl->memc_mptpr = CONFIG_SYS_MPTPR_2BK_4K;
|
||||
|
||||
memctl->memc_mbmr = CONFIG_SYS_MBMR_8COL;
|
||||
|
||||
upmconfig (UPMB, (uint *) sdram_table,
|
||||
sizeof (sdram_table) / sizeof (uint));
|
||||
|
||||
/*
|
||||
* Map controller banks 1 and 2 to the SDRAM banks 1 and 2 at
|
||||
* preliminary addresses - these have to be modified after the
|
||||
* SDRAM size has been determined.
|
||||
*/
|
||||
|
||||
memctl->memc_or1 = 0xF0000000 | CONFIG_SYS_OR_TIMING_SDRAM;
|
||||
memctl->memc_br1 =
|
||||
((SDRAM_BASE1_PRELIM & BR_BA_MSK) | BR_MS_UPMB | BR_V);
|
||||
|
||||
memctl->memc_or2 = 0xF0000000 | CONFIG_SYS_OR_TIMING_SDRAM;
|
||||
memctl->memc_br2 =
|
||||
((SDRAM_BASE2_PRELIM & BR_BA_MSK) | BR_MS_UPMB | BR_V);
|
||||
|
||||
/* perform SDRAM initialization sequence */
|
||||
memctl->memc_mar = 0x00000088;
|
||||
|
||||
memctl->memc_mcr = 0x80802105; /* SDRAM bank 0 */
|
||||
|
||||
memctl->memc_mcr = 0x80804105; /* SDRAM bank 1 */
|
||||
|
||||
/* Execute refresh 8 times */
|
||||
memctl->memc_mbmr = (CONFIG_SYS_MBMR_8COL & ~MBMR_TLFB_MSK) | MBMR_TLFB_8X;
|
||||
|
||||
memctl->memc_mcr = 0x80802130; /* SDRAM bank 0 - execute twice */
|
||||
|
||||
memctl->memc_mcr = 0x80804130; /* SDRAM bank 1 - execute twice */
|
||||
|
||||
/* Execute refresh 4 times */
|
||||
memctl->memc_mbmr = CONFIG_SYS_MBMR_8COL;
|
||||
|
||||
/*
|
||||
* Check Bank 0 Memory Size for re-configuration
|
||||
*
|
||||
* try 8 column mode
|
||||
*/
|
||||
|
||||
#if 0
|
||||
PrintState ();
|
||||
#endif
|
||||
/* printf ("\nChecking bank1..."); */
|
||||
size8 = dram_size (CONFIG_SYS_MBMR_8COL, (long *) SDRAM_BASE1_PRELIM,
|
||||
SDRAM_MAX_SIZE);
|
||||
|
||||
size_b0 = size8;
|
||||
|
||||
/* printf ("\nChecking bank2..."); */
|
||||
size_b1 =
|
||||
dram_size (memctl->memc_mbmr, (long *) SDRAM_BASE2_PRELIM,
|
||||
SDRAM_MAX_SIZE);
|
||||
|
||||
/*
|
||||
* Final mapping: map bigger bank first
|
||||
*/
|
||||
|
||||
memctl->memc_or1 = ((-size_b0) & 0xFFFF0000) | CONFIG_SYS_OR_TIMING_SDRAM;
|
||||
memctl->memc_br1 = (CONFIG_SYS_SDRAM_BASE & BR_BA_MSK) | BR_MS_UPMB | BR_V;
|
||||
|
||||
if (size_b1 > 0) {
|
||||
/*
|
||||
* Position Bank 1 immediately above Bank 0
|
||||
*/
|
||||
memctl->memc_or2 =
|
||||
((-size_b1) & 0xFFFF0000) | CONFIG_SYS_OR_TIMING_SDRAM;
|
||||
memctl->memc_br2 =
|
||||
((CONFIG_SYS_SDRAM_BASE & BR_BA_MSK) | BR_MS_UPMB | BR_V) +
|
||||
(size_b0 & BR_BA_MSK);
|
||||
} else {
|
||||
/*
|
||||
* No bank 1
|
||||
*
|
||||
* invalidate bank
|
||||
*/
|
||||
memctl->memc_br2 = 0;
|
||||
/* adjust refresh rate depending on SDRAM type, one bank */
|
||||
memctl->memc_mptpr = CONFIG_SYS_MPTPR_1BK_4K;
|
||||
}
|
||||
|
||||
/* If no memory detected, disable SDRAM */
|
||||
if ((size_b0 + size_b1) == 0) {
|
||||
printf ("disabling SDRAM!\n");
|
||||
/* Disable SDRAM - PA7 = 1 */
|
||||
im->im_ioport.iop_padat &= ~CONFIG_SYS_PA7; /* value of PA7 */
|
||||
}
|
||||
/* else */
|
||||
/* printf("done! (%08lx)\n", size_b0 + size_b1); */
|
||||
|
||||
#if 0
|
||||
PrintState ();
|
||||
#endif
|
||||
return (size_b0 + size_b1);
|
||||
}
|
||||
|
||||
/* ------------------------------------------------------------------------- */
|
||||
|
||||
/*
|
||||
* Check memory range for valid RAM. A simple memory test determines
|
||||
* the actually available RAM size between addresses `base' and
|
||||
* `base + maxsize'. Some (not all) hardware errors are detected:
|
||||
* - short between address lines
|
||||
* - short between data lines
|
||||
*/
|
||||
|
||||
static long int dram_size (long int mbmr_value, long int *base,
|
||||
long int maxsize)
|
||||
{
|
||||
long size;
|
||||
|
||||
/*memctl->memc_mbmr = mbmr_value; */
|
||||
|
||||
size = get_ram_size (base, maxsize);
|
||||
|
||||
if (size) {
|
||||
/* printf("(%08lx)", size); */
|
||||
} else {
|
||||
printf ("(0)");
|
||||
}
|
||||
|
||||
return (size);
|
||||
}
|
||||
|
||||
#if defined(CONFIG_CMD_PCMCIA)
|
||||
|
||||
#ifdef CONFIG_SYS_PCMCIA_MEM_ADDR
|
||||
volatile unsigned char *pcmcia_mem = (unsigned char *) CONFIG_SYS_PCMCIA_MEM_ADDR;
|
||||
#endif
|
||||
|
||||
int pcmcia_init (void)
|
||||
{
|
||||
volatile pcmconf8xx_t *pcmp;
|
||||
uint v, slota, slotb;
|
||||
|
||||
/*
|
||||
** Enable the PCMCIA for a Flash card.
|
||||
*/
|
||||
pcmp = (pcmconf8xx_t *) (&(((immap_t *) CONFIG_SYS_IMMR)->im_pcmcia));
|
||||
|
||||
#if 0
|
||||
pcmp->pcmc_pbr0 = CONFIG_SYS_PCMCIA_MEM_ADDR;
|
||||
pcmp->pcmc_por0 = 0xc00ff05d;
|
||||
#endif
|
||||
|
||||
/* Set all slots to zero by default. */
|
||||
pcmp->pcmc_pgcra = 0;
|
||||
pcmp->pcmc_pgcrb = 0;
|
||||
#ifdef PCMCIA_SLOT_A
|
||||
pcmp->pcmc_pgcra = 0x40;
|
||||
#endif
|
||||
#ifdef PCMCIA_SLOT_B
|
||||
pcmp->pcmc_pgcrb = 0x40;
|
||||
#endif
|
||||
|
||||
/* Check if any PCMCIA card is luged in. */
|
||||
slota = (pcmp->pcmc_pipr & 0x18000000) == 0;
|
||||
slotb = (pcmp->pcmc_pipr & 0x00001800) == 0;
|
||||
|
||||
if (!(slota || slotb)) {
|
||||
printf ("No card present\n");
|
||||
#ifdef PCMCIA_SLOT_A
|
||||
pcmp->pcmc_pgcra = 0;
|
||||
#endif
|
||||
#ifdef PCMCIA_SLOT_B
|
||||
pcmp->pcmc_pgcrb = 0;
|
||||
#endif
|
||||
return -1;
|
||||
} else
|
||||
printf ("Unknown card (");
|
||||
|
||||
v = 0;
|
||||
|
||||
switch ((pcmp->pcmc_pipr >> 14) & 3) {
|
||||
case 0x00:
|
||||
printf ("5V");
|
||||
v = 5;
|
||||
break;
|
||||
case 0x01:
|
||||
printf ("5V and 3V");
|
||||
v = 3;
|
||||
break;
|
||||
case 0x03:
|
||||
printf ("5V, 3V and x.xV");
|
||||
v = 3;
|
||||
break;
|
||||
}
|
||||
|
||||
switch (v) {
|
||||
case 3:
|
||||
printf ("; using 3V");
|
||||
/* Enable 3 volt Vcc. */
|
||||
|
||||
break;
|
||||
|
||||
default:
|
||||
printf ("; unknown voltage");
|
||||
return -1;
|
||||
}
|
||||
printf (")\n");
|
||||
/* disable pcmcia reset after a while */
|
||||
|
||||
udelay (20);
|
||||
|
||||
pcmp->pcmc_pgcrb = 0;
|
||||
|
||||
/* If you using a real hd you should give a short
|
||||
* spin-up time. */
|
||||
#ifdef CONFIG_DISK_SPINUP_TIME
|
||||
udelay (CONFIG_DISK_SPINUP_TIME);
|
||||
#endif
|
||||
|
||||
return 0;
|
||||
}
|
||||
#endif
|
||||
|
|
@ -0,0 +1,25 @@
|
|||
/*
|
||||
* The GENIETV is using the following physical memorymap (copied from
|
||||
* the FADS configuration):
|
||||
*
|
||||
* ff020000 -> ff02ffff : pcmcia
|
||||
* ff010000 -> ff01ffff : BCSR connected to CS1, setup by 8xxROM
|
||||
* ff000000 -> ff00ffff : IMAP internal in the cpu
|
||||
* 02800000 -> 0287ffff : flash connected to CS0
|
||||
* 00000000 -> nnnnnnnn : sdram setup by U-Boot
|
||||
*
|
||||
* CS pins are connected as follows:
|
||||
*
|
||||
* CS0 -512Kb boot flash
|
||||
* CS1 - SDRAM #1
|
||||
* CS2 - SDRAM #2
|
||||
* CS3 - Flash #1
|
||||
* CS4 - Flash #2
|
||||
* CS5 - LON (if present)
|
||||
* CS6 - PCMCIA #1
|
||||
* CS7 - PCMCIA #2
|
||||
*
|
||||
* Ports are configured as follows:
|
||||
*
|
||||
* PA7 - SDRAM banks enable
|
||||
*/
|
||||
|
|
@ -0,0 +1,115 @@
|
|||
/*
|
||||
* (C) Copyright 2000-2010
|
||||
* Wolfgang Denk, DENX Software Engineering, wd@denx.de.
|
||||
*
|
||||
* See file CREDITS for list of people who contributed to this
|
||||
* project.
|
||||
*
|
||||
* This program is free software; you can redistribute it and/or
|
||||
* modify it under the terms of the GNU General Public License as
|
||||
* published by the Free Software Foundation; either version 2 of
|
||||
* the License, or (at your option) any later version.
|
||||
*
|
||||
* This program is distributed in the hope that it will be useful,
|
||||
* but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
||||
* GNU General Public License for more details.
|
||||
*
|
||||
* You should have received a copy of the GNU General Public License
|
||||
* along with this program; if not, write to the Free Software
|
||||
* Foundation, Inc., 59 Temple Place, Suite 330, Boston,
|
||||
* MA 02111-1307 USA
|
||||
*/
|
||||
|
||||
OUTPUT_ARCH(powerpc)
|
||||
|
||||
SECTIONS
|
||||
{
|
||||
/* Read-only sections, merged into text segment: */
|
||||
. = + SIZEOF_HEADERS;
|
||||
.text :
|
||||
{
|
||||
/* WARNING - the following is hand-optimized to fit within */
|
||||
/* the sector layout of our flash chips! XXX FIXME XXX */
|
||||
|
||||
arch/powerpc/cpu/mpc8xx/start.o (.text*)
|
||||
arch/powerpc/cpu/mpc8xx/traps.o (.text*)
|
||||
lib/libgeneric.o (.text*)
|
||||
net/libnet.o (.text*)
|
||||
arch/powerpc/cpu/mpc8xx/libmpc8xx.o (.text*)
|
||||
board/genietv/libgenietv.o (.text*)
|
||||
arch/powerpc/lib/libpowerpc.o (.text*)
|
||||
*(.text.do_load_serial*)
|
||||
*(.text.do_mem_*)
|
||||
*(.text.do_bootm*)
|
||||
|
||||
. = env_offset;
|
||||
common/env_embedded.o (.text*)
|
||||
|
||||
*(.text*)
|
||||
}
|
||||
_etext = .;
|
||||
PROVIDE (etext = .);
|
||||
.rodata :
|
||||
{
|
||||
*(SORT_BY_ALIGNMENT(SORT_BY_NAME(.rodata*)))
|
||||
}
|
||||
|
||||
/* Read-write section, merged into data segment: */
|
||||
. = (. + 0x0FFF) & 0xFFFFF000;
|
||||
_erotext = .;
|
||||
PROVIDE (erotext = .);
|
||||
.reloc :
|
||||
{
|
||||
_GOT2_TABLE_ = .;
|
||||
KEEP(*(.got2))
|
||||
KEEP(*(.got))
|
||||
PROVIDE(_GLOBAL_OFFSET_TABLE_ = . + 4);
|
||||
_FIXUP_TABLE_ = .;
|
||||
KEEP(*(.fixup))
|
||||
}
|
||||
__got2_entries = ((_GLOBAL_OFFSET_TABLE_ - _GOT2_TABLE_) >> 2) - 1;
|
||||
__fixup_entries = (. - _FIXUP_TABLE_)>>2;
|
||||
|
||||
.data :
|
||||
{
|
||||
*(.data*)
|
||||
*(.sdata*)
|
||||
}
|
||||
_edata = .;
|
||||
PROVIDE (edata = .);
|
||||
|
||||
. = .;
|
||||
__u_boot_cmd_start = .;
|
||||
.u_boot_cmd : { *(.u_boot_cmd) }
|
||||
__u_boot_cmd_end = .;
|
||||
|
||||
|
||||
. = .;
|
||||
__start___ex_table = .;
|
||||
__ex_table : { *(__ex_table) }
|
||||
__stop___ex_table = .;
|
||||
|
||||
. = ALIGN(4096);
|
||||
__init_begin = .;
|
||||
.text.init : { *(.text.init) }
|
||||
.data.init : { *(.data.init) }
|
||||
. = ALIGN(4096);
|
||||
__init_end = .;
|
||||
|
||||
__bss_start = .;
|
||||
.bss (NOLOAD) :
|
||||
{
|
||||
*(.bss*)
|
||||
*(.sbss*)
|
||||
*(COMMON)
|
||||
}
|
||||
. = ALIGN(256 * 1024);
|
||||
.ppcenv :
|
||||
{
|
||||
common/env_embedded.o (.ppcenv)
|
||||
}
|
||||
. = ALIGN(4);
|
||||
__bss_end__ = . ;
|
||||
PROVIDE (end = .);
|
||||
}
|
||||
|
|
@ -0,0 +1,141 @@
|
|||
/*
|
||||
* (C) Copyright 2000
|
||||
* Wolfgang Denk, DENX Software Engineering, wd@denx.de.
|
||||
*
|
||||
* See file CREDITS for list of people who contributed to this
|
||||
* project.
|
||||
*
|
||||
* This program is free software; you can redistribute it and/or
|
||||
* modify it under the terms of the GNU General Public License as
|
||||
* published by the Free Software Foundation; either version 2 of
|
||||
* the License, or (at your option) any later version.
|
||||
*
|
||||
* This program is distributed in the hope that it will be useful,
|
||||
* but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
||||
* GNU General Public License for more details.
|
||||
*
|
||||
* You should have received a copy of the GNU General Public License
|
||||
* along with this program; if not, write to the Free Software
|
||||
* Foundation, Inc., 59 Temple Place, Suite 330, Boston,
|
||||
* MA 02111-1307 USA
|
||||
*/
|
||||
|
||||
OUTPUT_ARCH(powerpc)
|
||||
/* Do we need any of these for elf?
|
||||
__DYNAMIC = 0; */
|
||||
SECTIONS
|
||||
{
|
||||
/* Read-only sections, merged into text segment: */
|
||||
. = + SIZEOF_HEADERS;
|
||||
.interp : { *(.interp) }
|
||||
.hash : { *(.hash) }
|
||||
.dynsym : { *(.dynsym) }
|
||||
.dynstr : { *(.dynstr) }
|
||||
.rel.text : { *(.rel.text) }
|
||||
.rela.text : { *(.rela.text) }
|
||||
.rel.data : { *(.rel.data) }
|
||||
.rela.data : { *(.rela.data) }
|
||||
.rel.rodata : { *(.rel.rodata) }
|
||||
.rela.rodata : { *(.rela.rodata) }
|
||||
.rel.got : { *(.rel.got) }
|
||||
.rela.got : { *(.rela.got) }
|
||||
.rel.ctors : { *(.rel.ctors) }
|
||||
.rela.ctors : { *(.rela.ctors) }
|
||||
.rel.dtors : { *(.rel.dtors) }
|
||||
.rela.dtors : { *(.rela.dtors) }
|
||||
.rel.bss : { *(.rel.bss) }
|
||||
.rela.bss : { *(.rela.bss) }
|
||||
.rel.plt : { *(.rel.plt) }
|
||||
.rela.plt : { *(.rela.plt) }
|
||||
.init : { *(.init) }
|
||||
.plt : { *(.plt) }
|
||||
.text :
|
||||
{
|
||||
/* WARNING - the following is hand-optimized to fit within */
|
||||
/* the sector layout of our flash chips! XXX FIXME XXX */
|
||||
|
||||
arch/powerpc/cpu/mpc8xx/start.o (.text)
|
||||
common/dlmalloc.o (.text)
|
||||
arch/powerpc/lib/ppcstring.o (.text)
|
||||
lib/vsprintf.o (.text)
|
||||
lib/crc32.o (.text)
|
||||
lib/zlib.o (.text)
|
||||
|
||||
. = env_offset;
|
||||
common/env_embedded.o(.text)
|
||||
*(.text)
|
||||
*(.got1)
|
||||
}
|
||||
_etext = .;
|
||||
PROVIDE (etext = .);
|
||||
.rodata :
|
||||
{
|
||||
*(.rodata)
|
||||
*(.rodata1)
|
||||
*(.rodata.str1.4)
|
||||
*(.eh_frame)
|
||||
}
|
||||
.fini : { *(.fini) } =0
|
||||
.ctors : { *(.ctors) }
|
||||
.dtors : { *(.dtors) }
|
||||
|
||||
/* Read-write section, merged into data segment: */
|
||||
. = (. + 0x0FFF) & 0xFFFFF000;
|
||||
_erotext = .;
|
||||
PROVIDE (erotext = .);
|
||||
.reloc :
|
||||
{
|
||||
*(.got)
|
||||
_GOT2_TABLE_ = .;
|
||||
*(.got2)
|
||||
_FIXUP_TABLE_ = .;
|
||||
*(.fixup)
|
||||
}
|
||||
__got2_entries = (_FIXUP_TABLE_ - _GOT2_TABLE_) >>2;
|
||||
__fixup_entries = (. - _FIXUP_TABLE_)>>2;
|
||||
|
||||
.data :
|
||||
{
|
||||
*(.data)
|
||||
*(.data1)
|
||||
*(.sdata)
|
||||
*(.sdata2)
|
||||
*(.dynamic)
|
||||
CONSTRUCTORS
|
||||
}
|
||||
_edata = .;
|
||||
PROVIDE (edata = .);
|
||||
|
||||
__u_boot_cmd_start = .;
|
||||
.u_boot_cmd : { *(.u_boot_cmd) }
|
||||
__u_boot_cmd_end = .;
|
||||
|
||||
|
||||
__start___ex_table = .;
|
||||
__ex_table : { *(__ex_table) }
|
||||
__stop___ex_table = .;
|
||||
|
||||
. = ALIGN(4096);
|
||||
__init_begin = .;
|
||||
.text.init : { *(.text.init) }
|
||||
.data.init : { *(.data.init) }
|
||||
. = ALIGN(4096);
|
||||
__init_end = .;
|
||||
|
||||
__bss_start = .;
|
||||
.bss :
|
||||
{
|
||||
*(.sbss) *(.scommon)
|
||||
*(.dynbss)
|
||||
*(.bss)
|
||||
*(COMMON)
|
||||
}
|
||||
. = ALIGN(256 * 1024);
|
||||
.ppcenv :
|
||||
{
|
||||
common/env_embedded.o (.ppcenv)
|
||||
}
|
||||
__bss_end__ = . ;
|
||||
PROVIDE (end = .);
|
||||
}
|
||||
Loading…
Add table
Add a link
Reference in a new issue