mirror of
https://github.com/Ysurac/openmptcprouter.git
synced 2025-03-09 15:40:20 +00:00
Add a directory by kernel instead of a common root, add qnap-301w and rpi4 kernel 6.1 suppport
This commit is contained in:
Ycarus (Yannick Chabanois)
parent
e910436a7a
commit
46837ec4c0
9459 changed files with 362648 additions and 116345 deletions
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#
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# (C) Copyright 2000-2006
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# Wolfgang Denk, DENX Software Engineering, wd@denx.de.
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#
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# See file CREDITS for list of people who contributed to this
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# project.
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#
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# This program is free software; you can redistribute it and/or
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||||
# modify it under the terms of the GNU General Public License as
|
||||
# published by the Free Software Foundation; either version 2 of
|
||||
# the License, or (at your option) any later version.
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||||
#
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||||
# This program is distributed in the hope that it will be useful,
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||||
# but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||
# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
||||
# GNU General Public License for more details.
|
||||
#
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||||
# You should have received a copy of the GNU General Public License
|
||||
# along with this program; if not, write to the Free Software
|
||||
# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
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# MA 02111-1307 USA
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#
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include $(TOPDIR)/config.mk
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LIB = $(obj)lib$(BOARD).o
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COBJS = $(BOARD).o flash.o
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SRCS := $(SOBJS:.o=.S) $(COBJS:.o=.c)
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OBJS := $(addprefix $(obj),$(COBJS))
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SOBJS := $(addprefix $(obj),$(SOBJS))
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$(LIB): $(obj).depend $(OBJS)
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$(call cmd_link_o_target, $(OBJS))
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#########################################################################
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# defines $(obj).depend target
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include $(SRCTREE)/rules.mk
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sinclude $(obj).depend
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#########################################################################
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@ -0,0 +1,60 @@
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U-Boot for Hidden Dragon board
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------------------------------
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Hidden Dragon is a MPC824x-based board by Motorola. For the most
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part it is similar to Sandpoint8245 board. So unless otherwise
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mentioned, the codes in this directory are adapted from ../sandpoint
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directory.
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Apparently there are very few of this board out there. Even Motorola
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website does not have any info on it.
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RAM:
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start = 0x0000 0000
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size = 0x0200 0000 (32 MB)
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Flash:
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BANK ONE:
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start = 0xFFE0 0000
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size = 0x0020 0000 (2 MB)
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flash chip = 29LV160TE (1x16 Mbits or 2x8 Mbits)
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flash sectors = 16K, 2x8K, 32K, 31x64K
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BANK TWO:
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NONE
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The processor interrupt vectors reside on the first 256 bytes
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starting from address 0xFFF00000. The "reset vector" (first
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instruction executed after reset) is located on 0xFFF0 0100.
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U-Boot is configured to reside in flash starting at the address of
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0xFFF00000. The environment space is located in flash separately from
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U-Boot, at the second sector of the first flash bank, starting from
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0xFFE04000 until 0xFFE06000 (8KB).
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Network:
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- RTL8139 chip on the base board (SUPPORTED)
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- RTL8129 chip on the processor board (NOT SUPPORTED)
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Serial:
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- Two NS16550 compatible UART on the processor board (SUPPORTED)
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- One NS16550 compatible UART on the base board (UNTESTED)
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Misc:
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VIA686A PCI SuperIO peripheral controller
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- 2 USB ports (UNTESTED)
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- 2 PS2 ports (UNTESTED)
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- Parallel port (UNTESTED)
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- IDE & floppy interface (UNTESTED)
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S3 Savage4 video card (UNTESTED)
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TODO:
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-----
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- Support for the VIA686A based peripherals
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- The RTL8139 driver frequently gives rx error.
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- Support for RTL8129 network controller. (Why is the support removed from
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rtl8139.c driver?)
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(C) Copyright 2004
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Yusdi Santoso, Adaptec Inc., yusdi_santoso@adaptec.com
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@ -0,0 +1,153 @@
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/*
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* (C) Copyright 2001
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* Thomas Koeller, tkoeller@gmx.net
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*
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* See file CREDITS for list of people who contributed to this
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* project.
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*
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* This program is free software; you can redistribute it and/or
|
||||
* modify it under the terms of the GNU General Public License as
|
||||
* published by the Free Software Foundation; either version 2 of
|
||||
* the License, or (at your option) any later version.
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||||
*
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* This program is distributed in the hope that it will be useful,
|
||||
* but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
||||
* GNU General Public License for more details.
|
||||
*
|
||||
* You should have received a copy of the GNU General Public License
|
||||
* along with this program; if not, write to the Free Software
|
||||
* Foundation, Inc., 59 Temple Place, Suite 330, Boston,
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* MA 02111-1307 USA
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*/
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#ifndef __ASSEMBLY__
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#define __ASSEMBLY__ 1
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#endif
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#include <asm-offsets.h>
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#include <config.h>
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#include <asm/processor.h>
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#include <mpc824x.h>
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#include <ppc_asm.tmpl>
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#if defined(USE_DINK32)
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/* We are running from RAM, so do not clear the MCCR1_MEMGO bit! */
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#define MCCR1VAL ((CONFIG_SYS_ROMNAL << MCCR1_ROMNAL_SHIFT) | (CONFIG_SYS_ROMFAL << MCCR1_ROMFAL_SHIFT) | MCCR1_MEMGO)
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#else
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#define MCCR1VAL (CONFIG_SYS_ROMNAL << MCCR1_ROMNAL_SHIFT) | (CONFIG_SYS_ROMFAL << MCCR1_ROMFAL_SHIFT)
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#endif
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.text
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/* Values to program into memory controller registers */
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tbl: .long MCCR1, MCCR1VAL
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.long MCCR2, CONFIG_SYS_REFINT << MCCR2_REFINT_SHIFT
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.long MCCR3
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.long (((CONFIG_SYS_BSTOPRE & 0x000000f0) >> 4) << MCCR3_BSTOPRE2TO5_SHIFT) | \
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(CONFIG_SYS_REFREC << MCCR3_REFREC_SHIFT) | \
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(CONFIG_SYS_RDLAT << MCCR3_RDLAT_SHIFT)
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.long MCCR4
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.long (CONFIG_SYS_PRETOACT << MCCR4_PRETOACT_SHIFT) | (CONFIG_SYS_ACTTOPRE << MCCR4_ACTTOPRE_SHIFT) | \
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(CONFIG_SYS_REGISTERD_TYPE_BUFFER << 20) | \
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(((CONFIG_SYS_BSTOPRE & 0x00000300) >> 8) << MCCR4_BSTOPRE0TO1_SHIFT ) | \
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((CONFIG_SYS_SDMODE_CAS_LAT << 4) | (CONFIG_SYS_SDMODE_WRAP << 3) | \
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(CONFIG_SYS_SDMODE_BURSTLEN) << MCCR4_SDMODE_SHIFT) | \
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(CONFIG_SYS_ACTTORW << MCCR4_ACTTORW_SHIFT) | \
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((CONFIG_SYS_BSTOPRE & 0x0000000f) << MCCR4_BSTOPRE6TO9_SHIFT )
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.long MSAR1
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.long (((CONFIG_SYS_BANK0_START & MICR_ADDR_MASK) >> MICR_ADDR_SHIFT) << 0) | \
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(((CONFIG_SYS_BANK1_START & MICR_ADDR_MASK) >> MICR_ADDR_SHIFT) << 8) | \
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(((CONFIG_SYS_BANK2_START & MICR_ADDR_MASK) >> MICR_ADDR_SHIFT) << 16) | \
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(((CONFIG_SYS_BANK3_START & MICR_ADDR_MASK) >> MICR_ADDR_SHIFT) << 24)
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.long EMSAR1
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.long (((CONFIG_SYS_BANK0_START & MICR_EADDR_MASK) >> MICR_EADDR_SHIFT) << 0) | \
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(((CONFIG_SYS_BANK1_START & MICR_EADDR_MASK) >> MICR_EADDR_SHIFT) << 8) | \
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(((CONFIG_SYS_BANK2_START & MICR_EADDR_MASK) >> MICR_EADDR_SHIFT) << 16) | \
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(((CONFIG_SYS_BANK3_START & MICR_EADDR_MASK) >> MICR_EADDR_SHIFT) << 24)
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.long MSAR2
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.long (((CONFIG_SYS_BANK4_START & MICR_ADDR_MASK) >> MICR_ADDR_SHIFT) << 0) | \
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(((CONFIG_SYS_BANK5_START & MICR_ADDR_MASK) >> MICR_ADDR_SHIFT) << 8) | \
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(((CONFIG_SYS_BANK6_START & MICR_ADDR_MASK) >> MICR_ADDR_SHIFT) << 16) | \
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(((CONFIG_SYS_BANK7_START & MICR_ADDR_MASK) >> MICR_ADDR_SHIFT) << 24)
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.long EMSAR2
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.long (((CONFIG_SYS_BANK4_START & MICR_EADDR_MASK) >> MICR_EADDR_SHIFT) << 0) | \
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(((CONFIG_SYS_BANK5_START & MICR_EADDR_MASK) >> MICR_EADDR_SHIFT) << 8) | \
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(((CONFIG_SYS_BANK6_START & MICR_EADDR_MASK) >> MICR_EADDR_SHIFT) << 16) | \
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(((CONFIG_SYS_BANK7_START & MICR_EADDR_MASK) >> MICR_EADDR_SHIFT) << 24)
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.long MEAR1
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.long (((CONFIG_SYS_BANK0_END & MICR_ADDR_MASK) >> MICR_ADDR_SHIFT) << 0) | \
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(((CONFIG_SYS_BANK1_END & MICR_ADDR_MASK) >> MICR_ADDR_SHIFT) << 8) | \
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(((CONFIG_SYS_BANK2_END & MICR_ADDR_MASK) >> MICR_ADDR_SHIFT) << 16) | \
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(((CONFIG_SYS_BANK3_END & MICR_ADDR_MASK) >> MICR_ADDR_SHIFT) << 24)
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.long EMEAR1
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.long (((CONFIG_SYS_BANK0_END & MICR_EADDR_MASK) >> MICR_EADDR_SHIFT) << 0) | \
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(((CONFIG_SYS_BANK1_END & MICR_EADDR_MASK) >> MICR_EADDR_SHIFT) << 8) | \
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(((CONFIG_SYS_BANK2_END & MICR_EADDR_MASK) >> MICR_EADDR_SHIFT) << 16) | \
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(((CONFIG_SYS_BANK3_END & MICR_EADDR_MASK) >> MICR_EADDR_SHIFT) << 24)
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.long MEAR2
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.long (((CONFIG_SYS_BANK4_END & MICR_ADDR_MASK) >> MICR_ADDR_SHIFT) << 0) | \
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(((CONFIG_SYS_BANK5_END & MICR_ADDR_MASK) >> MICR_ADDR_SHIFT) << 8) | \
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(((CONFIG_SYS_BANK6_END & MICR_ADDR_MASK) >> MICR_ADDR_SHIFT) << 16) | \
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(((CONFIG_SYS_BANK7_END & MICR_ADDR_MASK) >> MICR_ADDR_SHIFT) << 24)
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.long EMEAR2
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.long (((CONFIG_SYS_BANK4_END & MICR_EADDR_MASK) >> MICR_EADDR_SHIFT) << 0) | \
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(((CONFIG_SYS_BANK5_END & MICR_EADDR_MASK) >> MICR_EADDR_SHIFT) << 8) | \
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(((CONFIG_SYS_BANK6_END & MICR_EADDR_MASK) >> MICR_EADDR_SHIFT) << 16) | \
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(((CONFIG_SYS_BANK7_END & MICR_EADDR_MASK) >> MICR_EADDR_SHIFT) << 24)
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.long 0
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/*
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* Early CPU initialization. Set up memory controller, so we can access any RAM at all. This
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* must be done in assembly, since we have no stack at this point.
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*/
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.global early_init_f
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early_init_f:
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mflr r10
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/* basic memory controller configuration */
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lis r3, CONFIG_ADDR_HIGH
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lis r4, CONFIG_DATA_HIGH
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bl lab
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lab: mflr r5
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lwzu r0, tbl - lab(r5)
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loop: lwz r1, 4(r5)
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stwbrx r0, 0, r3
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eieio
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stwbrx r1, 0, r4
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eieio
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lwzu r0, 8(r5)
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cmpli cr0, 0, r0, 0
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bne cr0, loop
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/* set bank enable bits */
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lis r0, MBER@h
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ori r0, 0, MBER@l
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li r1, CONFIG_SYS_BANK_ENABLE
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stwbrx r0, 0, r3
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eieio
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stb r1, 0(r4)
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eieio
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/* delay loop */
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lis r0, 0x0003
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mtctr r0
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delay: bdnz delay
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/* enable memory controller */
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lis r0, MCCR1@h
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ori r0, 0, MCCR1@l
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stwbrx r0, 0, r3
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eieio
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lwbrx r0, 0, r4
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oris r0, 0, MCCR1_MEMGO@h
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stwbrx r0, 0, r4
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eieio
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/* set up stack pointer */
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lis r1, CONFIG_SYS_INIT_SP_OFFSET@h
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ori r1, r1, CONFIG_SYS_INIT_SP_OFFSET@l
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mtlr r10
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blr
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@ -0,0 +1,575 @@
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/*
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* (C) Copyright 2004
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* Yusdi Santoso, Adaptec Inc., yusdi_santoso@adaptec.com
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*
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* (C) Copyright 2000-2005
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* Wolfgang Denk, DENX Software Engineering, wd@denx.de.
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*
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* See file CREDITS for list of people who contributed to this
|
||||
* project.
|
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*
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||||
* This program is free software; you can redistribute it and/or
|
||||
* modify it under the terms of the GNU General Public License as
|
||||
* published by the Free Software Foundation; either version 2 of
|
||||
* the License, or (at your option) any later version.
|
||||
*
|
||||
* This program is distributed in the hope that it will be useful,
|
||||
* but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
||||
* GNU General Public License for more details.
|
||||
*
|
||||
* You should have received a copy of the GNU General Public License
|
||||
* along with this program; if not, write to the Free Software
|
||||
* Foundation, Inc., 59 Temple Place, Suite 330, Boston,
|
||||
* MA 02111-1307 USA
|
||||
*/
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#include <common.h>
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#include <mpc824x.h>
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#include <asm/processor.h>
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#include <asm/pci_io.h>
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#include <w83c553f.h>
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#define ROM_CS0_START 0xFF800000
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#define ROM_CS1_START 0xFF000000
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flash_info_t flash_info[CONFIG_SYS_MAX_FLASH_BANKS]; /* info for FLASH chips */
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#if defined(CONFIG_ENV_IS_IN_FLASH)
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# ifndef CONFIG_ENV_ADDR
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# define CONFIG_ENV_ADDR (CONFIG_SYS_FLASH_BASE + CONFIG_ENV_OFFSET)
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# endif
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# ifndef CONFIG_ENV_SIZE
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# define CONFIG_ENV_SIZE CONFIG_ENV_SECT_SIZE
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# endif
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# ifndef CONFIG_ENV_SECT_SIZE
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# define CONFIG_ENV_SECT_SIZE CONFIG_ENV_SIZE
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# endif
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#endif
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/*-----------------------------------------------------------------------
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* Functions
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||||
*/
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static int write_word (flash_info_t *info, ulong dest, ulong data);
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/*flash command address offsets*/
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#define ADDR0 (0xAAA)
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#define ADDR1 (0x555)
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#define ADDR3 (0x001)
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#define FLASH_WORD_SIZE unsigned char
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||||
/*-----------------------------------------------------------------------
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||||
*/
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||||
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static unsigned long flash_id (unsigned char mfct, unsigned char chip)
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__attribute__ ((const));
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|
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typedef struct {
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FLASH_WORD_SIZE extval;
|
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unsigned short intval;
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||||
} map_entry;
|
||||
|
||||
static unsigned long flash_id (unsigned char mfct, unsigned char chip)
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||||
{
|
||||
static const map_entry mfct_map[] = {
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||||
{(FLASH_WORD_SIZE) AMD_MANUFACT,
|
||||
(unsigned short) ((unsigned long) FLASH_MAN_AMD >> 16)},
|
||||
{(FLASH_WORD_SIZE) FUJ_MANUFACT,
|
||||
(unsigned short) ((unsigned long) FLASH_MAN_FUJ >> 16)},
|
||||
{(FLASH_WORD_SIZE) STM_MANUFACT,
|
||||
(unsigned short) ((unsigned long) FLASH_MAN_STM >> 16)},
|
||||
{(FLASH_WORD_SIZE) MT_MANUFACT,
|
||||
(unsigned short) ((unsigned long) FLASH_MAN_MT >> 16)},
|
||||
{(FLASH_WORD_SIZE) INTEL_MANUFACT,
|
||||
(unsigned short) ((unsigned long) FLASH_MAN_INTEL >> 16)},
|
||||
{(FLASH_WORD_SIZE) INTEL_ALT_MANU,
|
||||
(unsigned short) ((unsigned long) FLASH_MAN_INTEL >> 16)}
|
||||
};
|
||||
|
||||
static const map_entry chip_map[] = {
|
||||
{AMD_ID_F040B, FLASH_AM040},
|
||||
{(FLASH_WORD_SIZE) STM_ID_x800AB, FLASH_STM800AB}
|
||||
};
|
||||
|
||||
const map_entry *p;
|
||||
unsigned long result = FLASH_UNKNOWN;
|
||||
|
||||
/* find chip id */
|
||||
for (p = &chip_map[0];
|
||||
p < &chip_map[sizeof chip_map / sizeof chip_map[0]]; p++)
|
||||
if (p->extval == chip) {
|
||||
result = FLASH_VENDMASK | p->intval;
|
||||
break;
|
||||
}
|
||||
|
||||
/* find vendor id */
|
||||
for (p = &mfct_map[0];
|
||||
p < &mfct_map[sizeof mfct_map / sizeof mfct_map[0]]; p++)
|
||||
if (p->extval == mfct) {
|
||||
result &= ~FLASH_VENDMASK;
|
||||
result |= (unsigned long) p->intval << 16;
|
||||
break;
|
||||
}
|
||||
|
||||
return result;
|
||||
}
|
||||
|
||||
unsigned long flash_init (void)
|
||||
{
|
||||
unsigned long i;
|
||||
unsigned char j;
|
||||
static const ulong flash_banks[] = CONFIG_SYS_FLASH_BANKS;
|
||||
|
||||
/* Init: no FLASHes known */
|
||||
for (i = 0; i < CONFIG_SYS_MAX_FLASH_BANKS; i++) {
|
||||
flash_info_t *const pflinfo = &flash_info[i];
|
||||
|
||||
pflinfo->flash_id = FLASH_UNKNOWN;
|
||||
pflinfo->size = 0;
|
||||
pflinfo->sector_count = 0;
|
||||
}
|
||||
|
||||
/* Enable writes to Hidden Dragon flash */
|
||||
{
|
||||
register unsigned char temp;
|
||||
|
||||
CONFIG_READ_BYTE (CONFIG_SYS_WINBOND_ISA_CFG_ADDR + WINBOND_CSCR,
|
||||
temp);
|
||||
temp &= ~0x20; /* clear BIOSWP bit */
|
||||
CONFIG_WRITE_BYTE (CONFIG_SYS_WINBOND_ISA_CFG_ADDR + WINBOND_CSCR,
|
||||
temp);
|
||||
}
|
||||
|
||||
for (i = 0; i < sizeof flash_banks / sizeof flash_banks[0]; i++) {
|
||||
flash_info_t *const pflinfo = &flash_info[i];
|
||||
const unsigned long base_address = flash_banks[i];
|
||||
volatile FLASH_WORD_SIZE *const flash =
|
||||
(FLASH_WORD_SIZE *) base_address;
|
||||
|
||||
flash[0xAAA << (3 * i)] = 0xaa;
|
||||
flash[0x555 << (3 * i)] = 0x55;
|
||||
flash[0xAAA << (3 * i)] = 0x90;
|
||||
__asm__ __volatile__ ("sync");
|
||||
|
||||
pflinfo->flash_id =
|
||||
flash_id (flash[0x0], flash[0x2 + 14 * i]);
|
||||
|
||||
switch (pflinfo->flash_id & FLASH_TYPEMASK) {
|
||||
case FLASH_AM040:
|
||||
pflinfo->size = 0x00080000;
|
||||
pflinfo->sector_count = 8;
|
||||
for (j = 0; j < 8; j++) {
|
||||
pflinfo->start[j] =
|
||||
base_address + 0x00010000 * j;
|
||||
pflinfo->protect[j] = flash[(j << 16) | 0x2];
|
||||
}
|
||||
break;
|
||||
case FLASH_STM800AB:
|
||||
pflinfo->size = 0x00100000;
|
||||
pflinfo->sector_count = 19;
|
||||
pflinfo->start[0] = base_address;
|
||||
pflinfo->start[1] = base_address + 0x4000;
|
||||
pflinfo->start[2] = base_address + 0x6000;
|
||||
pflinfo->start[3] = base_address + 0x8000;
|
||||
for (j = 1; j < 16; j++) {
|
||||
pflinfo->start[j + 3] =
|
||||
base_address + 0x00010000 * j;
|
||||
}
|
||||
break;
|
||||
default:
|
||||
/* The chip used is not listed in flash_id
|
||||
TODO: Change this to explicitly detect the flash type
|
||||
*/
|
||||
{
|
||||
int sector_addr = base_address;
|
||||
|
||||
pflinfo->size = 0x00200000;
|
||||
pflinfo->sector_count = 35;
|
||||
pflinfo->start[0] = sector_addr;
|
||||
sector_addr += 0x4000; /* 16K */
|
||||
pflinfo->start[1] = sector_addr;
|
||||
sector_addr += 0x2000; /* 8K */
|
||||
pflinfo->start[2] = sector_addr;
|
||||
sector_addr += 0x2000; /* 8K */
|
||||
pflinfo->start[3] = sector_addr;
|
||||
sector_addr += 0x8000; /* 32K */
|
||||
|
||||
for (j = 4; j < 35; j++) {
|
||||
pflinfo->start[j] = sector_addr;
|
||||
sector_addr += 0x10000; /* 64K */
|
||||
}
|
||||
}
|
||||
break;
|
||||
}
|
||||
/* Protect monitor and environment sectors
|
||||
*/
|
||||
#if CONFIG_SYS_MONITOR_BASE >= CONFIG_SYS_FLASH_BASE
|
||||
flash_protect (FLAG_PROTECT_SET,
|
||||
CONFIG_SYS_MONITOR_BASE,
|
||||
CONFIG_SYS_MONITOR_BASE + monitor_flash_len - 1,
|
||||
&flash_info[0]);
|
||||
#endif
|
||||
|
||||
#if defined(CONFIG_ENV_IS_IN_FLASH) && defined(CONFIG_ENV_ADDR)
|
||||
flash_protect (FLAG_PROTECT_SET,
|
||||
CONFIG_ENV_ADDR,
|
||||
CONFIG_ENV_ADDR + CONFIG_ENV_SIZE - 1,
|
||||
&flash_info[0]);
|
||||
#endif
|
||||
|
||||
/* reset device to read mode */
|
||||
flash[0x0000] = 0xf0;
|
||||
__asm__ __volatile__ ("sync");
|
||||
}
|
||||
|
||||
/* only have 1 bank */
|
||||
return flash_info[0].size;
|
||||
}
|
||||
|
||||
/*-----------------------------------------------------------------------
|
||||
*/
|
||||
void flash_print_info (flash_info_t * info)
|
||||
{
|
||||
static const char unk[] = "Unknown";
|
||||
const char *mfct = unk, *type = unk;
|
||||
unsigned int i;
|
||||
|
||||
if (info->flash_id != FLASH_UNKNOWN) {
|
||||
switch (info->flash_id & FLASH_VENDMASK) {
|
||||
case FLASH_MAN_AMD:
|
||||
mfct = "AMD";
|
||||
break;
|
||||
case FLASH_MAN_FUJ:
|
||||
mfct = "FUJITSU";
|
||||
break;
|
||||
case FLASH_MAN_STM:
|
||||
mfct = "STM";
|
||||
break;
|
||||
case FLASH_MAN_SST:
|
||||
mfct = "SST";
|
||||
break;
|
||||
case FLASH_MAN_BM:
|
||||
mfct = "Bright Microelectonics";
|
||||
break;
|
||||
case FLASH_MAN_INTEL:
|
||||
mfct = "Intel";
|
||||
break;
|
||||
}
|
||||
|
||||
switch (info->flash_id & FLASH_TYPEMASK) {
|
||||
case FLASH_AM040:
|
||||
type = "AM29F040B (512K * 8, uniform sector size)";
|
||||
break;
|
||||
case FLASH_AM400B:
|
||||
type = "AM29LV400B (4 Mbit, bottom boot sect)";
|
||||
break;
|
||||
case FLASH_AM400T:
|
||||
type = "AM29LV400T (4 Mbit, top boot sector)";
|
||||
break;
|
||||
case FLASH_AM800B:
|
||||
type = "AM29LV800B (8 Mbit, bottom boot sect)";
|
||||
break;
|
||||
case FLASH_AM800T:
|
||||
type = "AM29LV800T (8 Mbit, top boot sector)";
|
||||
break;
|
||||
case FLASH_AM160T:
|
||||
type = "AM29LV160T (16 Mbit, top boot sector)";
|
||||
break;
|
||||
case FLASH_AM320B:
|
||||
type = "AM29LV320B (32 Mbit, bottom boot sect)";
|
||||
break;
|
||||
case FLASH_AM320T:
|
||||
type = "AM29LV320T (32 Mbit, top boot sector)";
|
||||
break;
|
||||
case FLASH_STM800AB:
|
||||
type = "M29W800AB (8 Mbit, bottom boot sect)";
|
||||
break;
|
||||
case FLASH_SST800A:
|
||||
type = "SST39LF/VF800 (8 Mbit, uniform sector size)";
|
||||
break;
|
||||
case FLASH_SST160A:
|
||||
type = "SST39LF/VF160 (16 Mbit, uniform sector size)";
|
||||
break;
|
||||
}
|
||||
}
|
||||
|
||||
printf ("\n Brand: %s Type: %s\n"
|
||||
" Size: %lu KB in %d Sectors\n",
|
||||
mfct, type, info->size >> 10, info->sector_count);
|
||||
|
||||
printf (" Sector Start Addresses:");
|
||||
|
||||
for (i = 0; i < info->sector_count; i++) {
|
||||
unsigned long size;
|
||||
unsigned int erased;
|
||||
unsigned long *flash = (unsigned long *) info->start[i];
|
||||
|
||||
/*
|
||||
* Check if whole sector is erased
|
||||
*/
|
||||
size = (i != (info->sector_count - 1)) ?
|
||||
(info->start[i + 1] - info->start[i]) >> 2 :
|
||||
(info->start[0] + info->size - info->start[i]) >> 2;
|
||||
|
||||
for (flash = (unsigned long *) info->start[i], erased = 1;
|
||||
(flash != (unsigned long *) info->start[i] + size)
|
||||
&& erased; flash++)
|
||||
erased = *flash == ~0x0UL;
|
||||
|
||||
printf ("%s %08lX %s %s",
|
||||
(i % 5) ? "" : "\n ",
|
||||
info->start[i],
|
||||
erased ? "E" : " ", info->protect[i] ? "RO" : " ");
|
||||
}
|
||||
|
||||
puts ("\n");
|
||||
return;
|
||||
}
|
||||
|
||||
int flash_erase (flash_info_t * info, int s_first, int s_last)
|
||||
{
|
||||
volatile FLASH_WORD_SIZE *addr = (FLASH_WORD_SIZE *) (info->start[0]);
|
||||
int flag, prot, sect, l_sect;
|
||||
ulong start, now, last;
|
||||
unsigned char sh8b;
|
||||
|
||||
if ((s_first < 0) || (s_first > s_last)) {
|
||||
if (info->flash_id == FLASH_UNKNOWN) {
|
||||
printf ("- missing\n");
|
||||
} else {
|
||||
printf ("- no sectors to erase\n");
|
||||
}
|
||||
return 1;
|
||||
}
|
||||
|
||||
if ((info->flash_id == FLASH_UNKNOWN) ||
|
||||
(info->flash_id > (FLASH_MAN_STM | FLASH_AMD_COMP))) {
|
||||
printf ("Can't erase unknown flash type - aborted\n");
|
||||
return 1;
|
||||
}
|
||||
|
||||
prot = 0;
|
||||
for (sect = s_first; sect <= s_last; ++sect) {
|
||||
if (info->protect[sect]) {
|
||||
prot++;
|
||||
}
|
||||
}
|
||||
|
||||
if (prot) {
|
||||
printf ("- Warning: %d protected sectors will not be erased!\n", prot);
|
||||
} else {
|
||||
printf ("\n");
|
||||
}
|
||||
|
||||
l_sect = -1;
|
||||
|
||||
/* Check the ROM CS */
|
||||
if ((info->start[0] >= ROM_CS1_START)
|
||||
&& (info->start[0] < ROM_CS0_START))
|
||||
sh8b = 3;
|
||||
else
|
||||
sh8b = 0;
|
||||
|
||||
/* Disable interrupts which might cause a timeout here */
|
||||
flag = disable_interrupts ();
|
||||
|
||||
addr[ADDR0 << sh8b] = (FLASH_WORD_SIZE) 0x00AA00AA;
|
||||
addr[ADDR1 << sh8b] = (FLASH_WORD_SIZE) 0x00550055;
|
||||
addr[ADDR0 << sh8b] = (FLASH_WORD_SIZE) 0x00800080;
|
||||
addr[ADDR0 << sh8b] = (FLASH_WORD_SIZE) 0x00AA00AA;
|
||||
addr[ADDR1 << sh8b] = (FLASH_WORD_SIZE) 0x00550055;
|
||||
|
||||
/* Start erase on unprotected sectors */
|
||||
for (sect = s_first; sect <= s_last; sect++) {
|
||||
if (info->protect[sect] == 0) { /* not protected */
|
||||
addr = (FLASH_WORD_SIZE *) (info->start[0] +
|
||||
((info->start[sect] -
|
||||
info->start[0]) << sh8b));
|
||||
if (info->flash_id & FLASH_MAN_SST) {
|
||||
addr[ADDR0 << sh8b] =
|
||||
(FLASH_WORD_SIZE) 0x00AA00AA;
|
||||
addr[ADDR1 << sh8b] =
|
||||
(FLASH_WORD_SIZE) 0x00550055;
|
||||
addr[ADDR0 << sh8b] =
|
||||
(FLASH_WORD_SIZE) 0x00800080;
|
||||
addr[ADDR0 << sh8b] =
|
||||
(FLASH_WORD_SIZE) 0x00AA00AA;
|
||||
addr[ADDR1 << sh8b] =
|
||||
(FLASH_WORD_SIZE) 0x00550055;
|
||||
addr[0] = (FLASH_WORD_SIZE) 0x00500050; /* block erase */
|
||||
udelay (30000); /* wait 30 ms */
|
||||
} else
|
||||
addr[0] = (FLASH_WORD_SIZE) 0x00300030; /* sector erase */
|
||||
l_sect = sect;
|
||||
}
|
||||
}
|
||||
|
||||
/* re-enable interrupts if necessary */
|
||||
if (flag)
|
||||
enable_interrupts ();
|
||||
|
||||
/* wait at least 80us - let's wait 1 ms */
|
||||
udelay (1000);
|
||||
|
||||
/*
|
||||
* We wait for the last triggered sector
|
||||
*/
|
||||
if (l_sect < 0)
|
||||
goto DONE;
|
||||
|
||||
start = get_timer (0);
|
||||
last = start;
|
||||
addr = (FLASH_WORD_SIZE *) (info->start[0] + ((info->start[l_sect] -
|
||||
info->
|
||||
start[0]) << sh8b));
|
||||
while ((addr[0] & (FLASH_WORD_SIZE) 0x00800080) !=
|
||||
(FLASH_WORD_SIZE) 0x00800080) {
|
||||
if ((now = get_timer (start)) > CONFIG_SYS_FLASH_ERASE_TOUT) {
|
||||
printf ("Timeout\n");
|
||||
return 1;
|
||||
}
|
||||
/* show that we're waiting */
|
||||
if ((now - last) > 1000) { /* every second */
|
||||
serial_putc ('.');
|
||||
last = now;
|
||||
}
|
||||
}
|
||||
|
||||
DONE:
|
||||
/* reset to read mode */
|
||||
addr = (FLASH_WORD_SIZE *) info->start[0];
|
||||
addr[0] = (FLASH_WORD_SIZE) 0x00F000F0; /* reset bank */
|
||||
|
||||
printf (" done\n");
|
||||
return 0;
|
||||
}
|
||||
|
||||
/*-----------------------------------------------------------------------
|
||||
* Copy memory to flash, returns:
|
||||
* 0 - OK
|
||||
* 1 - write timeout
|
||||
* 2 - Flash not erased
|
||||
*/
|
||||
|
||||
int write_buff (flash_info_t * info, uchar * src, ulong addr, ulong cnt)
|
||||
{
|
||||
ulong cp, wp, data;
|
||||
int i, l, rc;
|
||||
|
||||
wp = (addr & ~3); /* get lower word aligned address */
|
||||
|
||||
/*
|
||||
* handle unaligned start bytes
|
||||
*/
|
||||
if ((l = addr - wp) != 0) {
|
||||
data = 0;
|
||||
for (i = 0, cp = wp; i < l; ++i, ++cp) {
|
||||
data = (data << 8) | (*(uchar *) cp);
|
||||
}
|
||||
for (; i < 4 && cnt > 0; ++i) {
|
||||
data = (data << 8) | *src++;
|
||||
--cnt;
|
||||
++cp;
|
||||
}
|
||||
for (; cnt == 0 && i < 4; ++i, ++cp) {
|
||||
data = (data << 8) | (*(uchar *) cp);
|
||||
}
|
||||
|
||||
if ((rc = write_word (info, wp, data)) != 0) {
|
||||
return (rc);
|
||||
}
|
||||
wp += 4;
|
||||
}
|
||||
|
||||
/*
|
||||
* handle word aligned part
|
||||
*/
|
||||
while (cnt >= 4) {
|
||||
data = 0;
|
||||
for (i = 0; i < 4; ++i) {
|
||||
data = (data << 8) | *src++;
|
||||
}
|
||||
if ((rc = write_word (info, wp, data)) != 0) {
|
||||
return (rc);
|
||||
}
|
||||
wp += 4;
|
||||
cnt -= 4;
|
||||
}
|
||||
|
||||
if (cnt == 0) {
|
||||
return (0);
|
||||
}
|
||||
|
||||
/*
|
||||
* handle unaligned tail bytes
|
||||
*/
|
||||
data = 0;
|
||||
for (i = 0, cp = wp; i < 4 && cnt > 0; ++i, ++cp) {
|
||||
data = (data << 8) | *src++;
|
||||
--cnt;
|
||||
}
|
||||
for (; i < 4; ++i, ++cp) {
|
||||
data = (data << 8) | (*(uchar *) cp);
|
||||
}
|
||||
|
||||
return (write_word (info, wp, data));
|
||||
}
|
||||
|
||||
/*-----------------------------------------------------------------------
|
||||
* Write a word to Flash, returns:
|
||||
* 0 - OK
|
||||
* 1 - write timeout
|
||||
* 2 - Flash not erased
|
||||
*/
|
||||
static int write_word (flash_info_t * info, ulong dest, ulong data)
|
||||
{
|
||||
volatile FLASH_WORD_SIZE *addr2 = (FLASH_WORD_SIZE *) info->start[0];
|
||||
volatile FLASH_WORD_SIZE *dest2;
|
||||
volatile FLASH_WORD_SIZE *data2 = (FLASH_WORD_SIZE *) & data;
|
||||
ulong start;
|
||||
int flag;
|
||||
int i;
|
||||
unsigned char sh8b;
|
||||
|
||||
/* Check the ROM CS */
|
||||
if ((info->start[0] >= ROM_CS1_START)
|
||||
&& (info->start[0] < ROM_CS0_START))
|
||||
sh8b = 3;
|
||||
else
|
||||
sh8b = 0;
|
||||
|
||||
dest2 = (FLASH_WORD_SIZE *) (((dest - info->start[0]) << sh8b) +
|
||||
info->start[0]);
|
||||
|
||||
/* Check if Flash is (sufficiently) erased */
|
||||
if ((*dest2 & (FLASH_WORD_SIZE) data) != (FLASH_WORD_SIZE) data) {
|
||||
return (2);
|
||||
}
|
||||
/* Disable interrupts which might cause a timeout here */
|
||||
flag = disable_interrupts ();
|
||||
|
||||
for (i = 0; i < 4 / sizeof (FLASH_WORD_SIZE); i++) {
|
||||
addr2[ADDR0 << sh8b] = (FLASH_WORD_SIZE) 0x00AA00AA;
|
||||
addr2[ADDR1 << sh8b] = (FLASH_WORD_SIZE) 0x00550055;
|
||||
addr2[ADDR0 << sh8b] = (FLASH_WORD_SIZE) 0x00A000A0;
|
||||
|
||||
dest2[i << sh8b] = data2[i];
|
||||
|
||||
/* re-enable interrupts if necessary */
|
||||
if (flag)
|
||||
enable_interrupts ();
|
||||
|
||||
/* data polling for D7 */
|
||||
start = get_timer (0);
|
||||
while ((dest2[i << sh8b] & (FLASH_WORD_SIZE) 0x00800080) !=
|
||||
(data2[i] & (FLASH_WORD_SIZE) 0x00800080)) {
|
||||
if (get_timer (start) > CONFIG_SYS_FLASH_WRITE_TOUT) {
|
||||
return (1);
|
||||
}
|
||||
}
|
||||
}
|
||||
|
||||
return (0);
|
||||
}
|
||||
|
|
@ -0,0 +1,101 @@
|
|||
/*
|
||||
* (C) Copyright 2004
|
||||
* Yusdi Santoso, Adaptec Inc., yusdi_santoso@adaptec.com
|
||||
*
|
||||
* (C) Copyright 2000
|
||||
* Rob Taylor, Flying Pig Systems. robt@flyingpig.com.
|
||||
*
|
||||
* See file CREDITS for list of people who contributed to this
|
||||
* project.
|
||||
*
|
||||
* This program is free software; you can redistribute it and/or
|
||||
* modify it under the terms of the GNU General Public License as
|
||||
* published by the Free Software Foundation; either version 2 of
|
||||
* the License, or (at your option) any later version.
|
||||
*
|
||||
* This program is distributed in the hope that it will be useful,
|
||||
* but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
||||
* GNU General Public License for more details.
|
||||
*
|
||||
* You should have received a copy of the GNU General Public License
|
||||
* along with this program; if not, write to the Free Software
|
||||
* Foundation, Inc., 59 Temple Place, Suite 330, Boston,
|
||||
* MA 02111-1307 USA
|
||||
*/
|
||||
|
||||
#include <common.h>
|
||||
#include <mpc824x.h>
|
||||
#include <pci.h>
|
||||
#include <netdev.h>
|
||||
|
||||
int checkboard (void)
|
||||
{
|
||||
/*TODO: Check processor type */
|
||||
|
||||
puts ( "Board: Hidden Dragon "
|
||||
#ifdef CONFIG_MPC8240
|
||||
"8240"
|
||||
#endif
|
||||
#ifdef CONFIG_MPC8245
|
||||
"8245"
|
||||
#endif
|
||||
" ##Test not implemented yet##\n");
|
||||
/* TODO: Implement board test */
|
||||
return 0;
|
||||
}
|
||||
|
||||
phys_size_t initdram (int board_type)
|
||||
{
|
||||
long size;
|
||||
long new_bank0_end;
|
||||
long mear1;
|
||||
long emear1;
|
||||
|
||||
size = get_ram_size(CONFIG_SYS_SDRAM_BASE, CONFIG_SYS_MAX_RAM_SIZE);
|
||||
|
||||
new_bank0_end = size - 1;
|
||||
mear1 = mpc824x_mpc107_getreg(MEAR1);
|
||||
emear1 = mpc824x_mpc107_getreg(EMEAR1);
|
||||
mear1 = (mear1 & 0xFFFFFF00) |
|
||||
((new_bank0_end & MICR_ADDR_MASK) >> MICR_ADDR_SHIFT);
|
||||
emear1 = (emear1 & 0xFFFFFF00) |
|
||||
((new_bank0_end & MICR_ADDR_MASK) >> MICR_EADDR_SHIFT);
|
||||
mpc824x_mpc107_setreg(MEAR1, mear1);
|
||||
mpc824x_mpc107_setreg(EMEAR1, emear1);
|
||||
|
||||
return (size);
|
||||
}
|
||||
|
||||
/*
|
||||
* Initialize PCI Devices, report devices found.
|
||||
*/
|
||||
#ifndef CONFIG_PCI_PNP
|
||||
static struct pci_config_table pci_hidden_dragon_config_table[] = {
|
||||
{ PCI_ANY_ID, PCI_ANY_ID, PCI_ANY_ID, PCI_ANY_ID, 0x0f, PCI_ANY_ID,
|
||||
pci_cfgfunc_config_device, { PCI_ENET0_IOADDR,
|
||||
PCI_ENET0_MEMADDR,
|
||||
PCI_COMMAND_MEMORY | PCI_COMMAND_MASTER }},
|
||||
{ PCI_ANY_ID, PCI_ANY_ID, PCI_ANY_ID, PCI_ANY_ID, 0x10, PCI_ANY_ID,
|
||||
pci_cfgfunc_config_device, { PCI_ENET1_IOADDR,
|
||||
PCI_ENET1_MEMADDR,
|
||||
PCI_COMMAND_MEMORY | PCI_COMMAND_MASTER }},
|
||||
{ }
|
||||
};
|
||||
#endif
|
||||
|
||||
struct pci_controller hose = {
|
||||
#ifndef CONFIG_PCI_PNP
|
||||
config_table: pci_hidden_dragon_config_table,
|
||||
#endif
|
||||
};
|
||||
|
||||
void pci_init_board(void)
|
||||
{
|
||||
pci_mpc824x_init(&hose);
|
||||
}
|
||||
|
||||
int board_eth_init(bd_t *bis)
|
||||
{
|
||||
return pci_eth_init(bis);
|
||||
}
|
||||
|
|
@ -0,0 +1,54 @@
|
|||
/*
|
||||
* (C) Copyright 2000
|
||||
* Wolfgang Denk, DENX Software Engineering, wd@denx.de.
|
||||
*
|
||||
* See file CREDITS for list of people who contributed to this
|
||||
* project.
|
||||
*
|
||||
* This program is free software; you can redistribute it and/or
|
||||
* modify it under the terms of the GNU General Public License as
|
||||
* published by the Free Software Foundation; either version 2 of
|
||||
* the License, or (at your option) any later version.
|
||||
*
|
||||
* This program is distributed in the hope that it will be useful,
|
||||
* but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
||||
* GNU General Public License for more details.
|
||||
*
|
||||
* You should have received a copy of the GNU General Public License
|
||||
* along with this program; if not, write to the Free Software
|
||||
* Foundation, Inc., 59 Temple Place, Suite 330, Boston,
|
||||
* MA 02111-1307 USA
|
||||
*/
|
||||
|
||||
/*-----------------------------------------------------------------------
|
||||
* Timer value for timer 2, ICLK = 10
|
||||
*
|
||||
* SPEED_FCOUNT2 = GCLK / (16 * (TIMER_TMR_PS + 1))
|
||||
* SPEED_TMR3_PS = (GCLK / (16 * SPEED_FCOUNT3)) - 1
|
||||
*
|
||||
* SPEED_FCOUNT2 timer 2 counting frequency
|
||||
* GCLK CPU clock
|
||||
* SPEED_TMR2_PS prescaler
|
||||
*/
|
||||
#define SPEED_TMR2_PS (250 - 1) /* divide by 250 */
|
||||
|
||||
/*-----------------------------------------------------------------------
|
||||
* Timer value for PIT
|
||||
*
|
||||
* PIT_TIME = SPEED_PITC / PITRTCLK
|
||||
* PITRTCLK = 8192
|
||||
*/
|
||||
#define SPEED_PITC (82 << 16) /* start counting from 82 */
|
||||
|
||||
/*
|
||||
* The new value for PTA is calculated from
|
||||
*
|
||||
* PTA = (gclk * Trefresh) / (2 ^ (2 * DFBRG) * PTP * NCS)
|
||||
*
|
||||
* gclk CPU clock (not bus clock !)
|
||||
* Trefresh Refresh cycle * 4 (four word bursts used)
|
||||
* DFBRG For normal mode (no clock reduction) always 0
|
||||
* PTP Prescaler (already adjusted for no. of banks and 4K / 8K refresh)
|
||||
* NCS Number of SDRAM banks (chip selects) on this UPM.
|
||||
*/
|
||||
Loading…
Add table
Add a link
Reference in a new issue