Add a directory by kernel instead of a common root, add qnap-301w and rpi4 kernel 6.1 suppport

common/package/utils/sysupgrade-helper/src/board/ip860/Makefile

@@ -0,0 +1,44 @@
+#
+# (C) Copyright 2000-2006
+# Wolfgang Denk, DENX Software Engineering, wd@denx.de.
+#
+# See file CREDITS for list of people who contributed to this
+# project.
+#
+# This program is free software; you can redistribute it and/or
+# modify it under the terms of the GNU General Public License as
+# published by the Free Software Foundation; either version 2 of
+# the License, or (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+# GNU General Public License for more details.
+#
+# You should have received a copy of the GNU General Public License
+# along with this program; if not, write to the Free Software
+# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+# MA 02111-1307 USA
+#
+
+include $(TOPDIR)/config.mk
+
+LIB	= $(obj)lib$(BOARD).o
+
+COBJS	= $(BOARD).o flash.o
+
+SRCS	:= $(SOBJS:.o=.S) $(COBJS:.o=.c)
+OBJS	:= $(addprefix $(obj),$(COBJS))
+SOBJS	:= $(addprefix $(obj),$(SOBJS))
+
+$(LIB):	$(obj).depend $(OBJS)
+	$(call cmd_link_o_target, $(OBJS))
+
+#########################################################################
+
+# defines $(obj).depend target
+include $(SRCTREE)/rules.mk
+
+sinclude $(obj).depend
+
+#########################################################################

common/package/utils/sysupgrade-helper/src/board/ip860/flash.c

@@ -0,0 +1,456 @@
+/*
+ * (C) Copyright 2000
+ * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+#include <common.h>
+#include <mpc8xx.h>
+
+flash_info_t	flash_info[CONFIG_SYS_MAX_FLASH_BANKS]; /* info for FLASH chips	*/
+
+#if defined(CONFIG_ENV_IS_IN_FLASH)
+# ifndef  CONFIG_ENV_ADDR
+#  define CONFIG_ENV_ADDR	(CONFIG_SYS_FLASH_BASE + CONFIG_ENV_OFFSET)
+# endif
+# ifndef  CONFIG_ENV_SIZE
+#  define CONFIG_ENV_SIZE	CONFIG_ENV_SECT_SIZE
+# endif
+# ifndef  CONFIG_ENV_SECT_SIZE
+#  define CONFIG_ENV_SECT_SIZE  CONFIG_ENV_SIZE
+# endif
+#endif
+
+/*-----------------------------------------------------------------------
+ * Functions
+ */
+static ulong flash_get_size (vu_long *addr, flash_info_t *info);
+static int write_word (flash_info_t *info, ulong dest, ulong data);
+static void flash_get_offsets (ulong base, flash_info_t *info);
+
+/*-----------------------------------------------------------------------
+ */
+
+unsigned long flash_init (void)
+{
+	volatile immap_t	*immap  = (immap_t *)CONFIG_SYS_IMMR;
+	volatile memctl8xx_t	*memctl = &immap->im_memctl;
+	volatile ip860_bcsr_t	*bcsr   = (ip860_bcsr_t *)BCSR_BASE;
+	unsigned long size;
+	int i;
+
+	/* Init: enable write,
+	 * or we cannot even write flash commands
+	 */
+	bcsr->bd_ctrl |= BD_CTRL_FLWE;
+
+	for (i=0; i<CONFIG_SYS_MAX_FLASH_BANKS; ++i) {
+		flash_info[i].flash_id = FLASH_UNKNOWN;
+	}
+
+	/* Static FLASH Bank configuration here - FIXME XXX */
+
+	size = flash_get_size((vu_long *)FLASH_BASE, &flash_info[0]);
+
+	if (flash_info[0].flash_id == FLASH_UNKNOWN) {
+		printf ("## Unknown FLASH on Bank 0 - Size = 0x%08lx = %ld MB\n",
+			size, size<<20);
+	}
+
+	/* Remap FLASH according to real size */
+	memctl->memc_or1 = CONFIG_SYS_OR_TIMING_FLASH | (-size & 0xFFFF8000);
+	memctl->memc_br1 = (CONFIG_SYS_FLASH_BASE & BR_BA_MSK) |
+				(memctl->memc_br1 & ~(BR_BA_MSK));
+
+	/* Re-do sizing to get full correct info */
+	size = flash_get_size((vu_long *)CONFIG_SYS_FLASH_BASE, &flash_info[0]);
+
+	flash_get_offsets (CONFIG_SYS_FLASH_BASE, &flash_info[0]);
+
+	flash_info[0].size = size;
+
+#if CONFIG_SYS_MONITOR_BASE >= CONFIG_SYS_FLASH_BASE
+	/* monitor protection ON by default */
+	flash_protect(FLAG_PROTECT_SET,
+		      CONFIG_SYS_MONITOR_BASE,
+		      CONFIG_SYS_MONITOR_BASE+monitor_flash_len-1,
+		      &flash_info[0]);
+#endif
+
+#ifdef	CONFIG_ENV_IS_IN_FLASH
+	/* ENV protection ON by default */
+	flash_protect(FLAG_PROTECT_SET,
+		      CONFIG_ENV_ADDR,
+		      CONFIG_ENV_ADDR+CONFIG_ENV_SECT_SIZE-1,
+		      &flash_info[0]);
+#endif
+	return (size);
+}
+
+/*-----------------------------------------------------------------------
+ */
+static void flash_get_offsets (ulong base, flash_info_t *info)
+{
+	int i;
+
+	/* all possible flash types
+	 * (28F016SV, 28F160S3, 28F320S3)
+	 * have the same erase block size: 64 kB per chip,
+	 * of 128 kB per bank
+	 */
+
+	/* set up sector start address table */
+	for (i = 0; i < info->sector_count; i++) {
+		info->start[i] = base;
+		base += 0x00020000;
+	}
+}
+
+/*-----------------------------------------------------------------------
+ */
+void flash_print_info  (flash_info_t *info)
+{
+	int i;
+
+	if (info->flash_id == FLASH_UNKNOWN) {
+		printf ("missing or unknown FLASH type\n");
+		return;
+	}
+
+	switch (info->flash_id & FLASH_VENDMASK) {
+	case FLASH_MAN_INTEL:	printf ("Intel ");		break;
+	default:		printf ("Unknown Vendor ");	break;
+	}
+
+	switch (info->flash_id & FLASH_TYPEMASK) {
+	case FLASH_28F016SV:	printf ("28F016SV (16 Mbit, 32 x 64k)\n");
+				break;
+	case FLASH_28F160S3:	printf ("28F160S3 (16 Mbit, 32 x 512K)\n");
+				break;
+	case FLASH_28F320S3:	printf ("28F320S3 (32 Mbit, 64 x 512K)\n");
+				break;
+	default:		printf ("Unknown Chip Type\n");
+				break;
+	}
+
+	printf ("  Size: %ld MB in %d Sectors\n",
+		info->size >> 20, info->sector_count);
+
+	printf ("  Sector Start Addresses:");
+	for (i=0; i<info->sector_count; ++i) {
+		if ((i % 5) == 0)
+			printf ("\n   ");
+		printf (" %08lX%s",
+			info->start[i],
+			info->protect[i] ? " (RO)" : "     "
+		);
+	}
+	printf ("\n");
+	return;
+}
+
+/*-----------------------------------------------------------------------
+ */
+
+
+/*-----------------------------------------------------------------------
+ */
+
+/*
+ * The following code cannot be run from FLASH!
+ */
+
+static ulong flash_get_size (vu_long *addr, flash_info_t *info)
+{
+	short i;
+	ulong value;
+	ulong base = (ulong)addr;
+
+	/* Write "Intelligent Identifier" command: read Manufacturer ID */
+	*addr = 0x90909090;
+
+	value = addr[0];
+	switch (value) {
+	case (MT_MANUFACT & 0x00FF00FF):	/* MT or => Intel */
+	case (INTEL_ALT_MANU & 0x00FF00FF):
+		info->flash_id = FLASH_MAN_INTEL;
+		break;
+	default:
+		info->flash_id = FLASH_UNKNOWN;
+		info->sector_count = 0;
+		info->size = 0;
+		return (0);			/* no or unknown flash	*/
+	}
+
+	value = addr[1];			/* device ID		*/
+
+	switch (value) {
+	case (INTEL_ID_28F016S):
+		info->flash_id += FLASH_28F016SV;
+		info->sector_count = 32;
+		info->size = 0x00400000;
+		break;				/* => 2x2 MB		*/
+
+	case (INTEL_ID_28F160S3):
+		info->flash_id += FLASH_28F160S3;
+		info->sector_count = 32;
+		info->size = 0x00400000;
+		break;				/* => 2x2 MB		*/
+
+	case (INTEL_ID_28F320S3):
+		info->flash_id += FLASH_28F320S3;
+		info->sector_count = 64;
+		info->size = 0x00800000;
+		break;				/* => 2x4 MB		*/
+
+	default:
+		info->flash_id = FLASH_UNKNOWN;
+		return (0);			/* => no or unknown flash */
+
+	}
+
+	/* set up sector start address table */
+	for (i = 0; i < info->sector_count; i++) {
+		info->start[i] = base + (i * 0x00020000);
+		/* don't know how to check sector protection */
+		info->protect[i] = 0;
+	}
+
+	/*
+	 * Prevent writes to uninitialized FLASH.
+	 */
+	if (info->flash_id != FLASH_UNKNOWN) {
+		addr = (vu_long *)info->start[0];
+
+		*addr = 0xFFFFFF;	/* reset bank to read array mode */
+	}
+
+	return (info->size);
+}
+
+
+/*-----------------------------------------------------------------------
+ */
+
+int	flash_erase (flash_info_t *info, int s_first, int s_last)
+{
+	int flag, prot, sect;
+	ulong start, now, last;
+
+	if ((s_first < 0) || (s_first > s_last)) {
+		if (info->flash_id == FLASH_UNKNOWN) {
+			printf ("- missing\n");
+		} else {
+			printf ("- no sectors to erase\n");
+		}
+		return 1;
+	}
+
+	if ((info->flash_id & FLASH_VENDMASK) != FLASH_MAN_INTEL) {
+		printf ("Can't erase unknown flash type %08lx - aborted\n",
+			info->flash_id);
+		return 1;
+	}
+
+	prot = 0;
+	for (sect=s_first; sect<=s_last; ++sect) {
+		if (info->protect[sect]) {
+			prot++;
+		}
+	}
+
+	if (prot) {
+		printf ("- Warning: %d protected sectors will not be erased!\n",
+			prot);
+	} else {
+		printf ("\n");
+	}
+
+	start = get_timer (0);
+	last  = start;
+
+	/* Start erase on unprotected sectors */
+	for (sect = s_first; sect<=s_last; sect++) {
+		if (info->protect[sect] == 0) {	/* not protected */
+			vu_long *addr = (vu_long *)(info->start[sect]);
+
+			/* Disable interrupts which might cause a timeout here */
+			flag = disable_interrupts();
+
+			/* Single Block Erase Command */
+			*addr = 0x20202020;
+			/* Confirm */
+			*addr = 0xD0D0D0D0;
+			/* Resume Command, as per errata update */
+			*addr = 0xD0D0D0D0;
+
+			/* re-enable interrupts if necessary */
+			if (flag)
+				enable_interrupts();
+
+			/* wait at least 80us - let's wait 1 ms */
+			udelay (1000);
+
+			while ((*addr & 0x00800080) != 0x00800080) {
+				if ((now=get_timer(start)) > CONFIG_SYS_FLASH_ERASE_TOUT) {
+					printf ("Timeout\n");
+					*addr = 0xFFFFFFFF;	/* reset bank */
+					return 1;
+				}
+				/* show that we're waiting */
+				if ((now - last) > 1000) {	/* every second */
+					putc ('.');
+					last = now;
+				}
+			}
+
+			/* reset to read mode */
+			*addr = 0xFFFFFFFF;
+		}
+	}
+
+	printf (" done\n");
+	return 0;
+}
+
+/*-----------------------------------------------------------------------
+ * Copy memory to flash, returns:
+ * 0 - OK
+ * 1 - write timeout
+ * 2 - Flash not erased
+ */
+
+int write_buff (flash_info_t *info, uchar *src, ulong addr, ulong cnt)
+{
+	ulong cp, wp, data;
+	int i, l, rc;
+
+	wp = (addr & ~3);	/* get lower word aligned address */
+
+	/*
+	 * handle unaligned start bytes
+	 */
+	if ((l = addr - wp) != 0) {
+		data = 0;
+		for (i=0, cp=wp; i<l; ++i, ++cp) {
+			data = (data << 8) | (*(uchar *)cp);
+		}
+		for (; i<4 && cnt>0; ++i) {
+			data = (data << 8) | *src++;
+			--cnt;
+			++cp;
+		}
+		for (; cnt==0 && i<4; ++i, ++cp) {
+			data = (data << 8) | (*(uchar *)cp);
+		}
+
+		if ((rc = write_word(info, wp, data)) != 0) {
+			return (rc);
+		}
+		wp += 4;
+	}
+
+	/*
+	 * handle word aligned part
+	 */
+	while (cnt >= 4) {
+		data = 0;
+		for (i=0; i<4; ++i) {
+			data = (data << 8) | *src++;
+		}
+		if ((rc = write_word(info, wp, data)) != 0) {
+			return (rc);
+		}
+		wp  += 4;
+		cnt -= 4;
+	}
+
+	if (cnt == 0) {
+		return (0);
+	}
+
+	/*
+	 * handle unaligned tail bytes
+	 */
+	data = 0;
+	for (i=0, cp=wp; i<4 && cnt>0; ++i, ++cp) {
+		data = (data << 8) | *src++;
+		--cnt;
+	}
+	for (; i<4; ++i, ++cp) {
+		data = (data << 8) | (*(uchar *)cp);
+	}
+
+	return (write_word(info, wp, data));
+}
+
+/*-----------------------------------------------------------------------
+ * Write a word to Flash, returns:
+ * 0 - OK
+ * 1 - write timeout
+ * 2 - Flash not erased
+ */
+static int write_word (flash_info_t *info, ulong dest, ulong data)
+{
+	vu_long *addr = (vu_long *)dest;
+	ulong start, csr;
+	int flag;
+
+	/* Check if Flash is (sufficiently) erased */
+	if ((*addr & data) != data) {
+		return (2);
+	}
+	/* Disable interrupts which might cause a timeout here */
+	flag = disable_interrupts();
+
+	/* Write Command */
+	*addr = 0x10101010;
+
+	/* Write Data */
+	*addr = data;
+
+	/* re-enable interrupts if necessary */
+	if (flag)
+		enable_interrupts();
+
+	/* data polling for D7 */
+	start = get_timer (0);
+	flag  = 0;
+	while (((csr = *addr) & 0x00800080) != 0x00800080) {
+		if (get_timer(start) > CONFIG_SYS_FLASH_WRITE_TOUT) {
+			flag = 1;
+			break;
+		}
+	}
+	if (csr & 0x00400040) {
+printf ("CSR indicates write error (%08lx) at %08lx\n", csr, (ulong)addr);
+		flag = 1;
+	}
+
+	/* Clear Status Registers Command */
+	*addr = 0x50505050;
+	/* Reset to read array mode */
+	*addr = 0xFFFFFFFF;
+
+	return (flag);
+}
+
+/*-----------------------------------------------------------------------
+ */

common/package/utils/sysupgrade-helper/src/board/ip860/ip860.c

@@ -0,0 +1,356 @@
+/*
+ * (C) Copyright 2000
+ * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+#include <common.h>
+#include <commproc.h>
+#include <mpc8xx.h>
+
+/* ------------------------------------------------------------------------- */
+
+static long int dram_size (long int, long int *, long int);
+unsigned long ip860_get_dram_size(void);
+unsigned long ip860_get_clk_freq (void);
+/* ------------------------------------------------------------------------- */
+
+#define	_NOT_USED_	0xFFFFFFFF
+
+const uint sdram_table[] = {
+	/*
+	 * Single Read. (Offset 0 in UPMA RAM)
+	 */
+	0x1f07fc04, 0xeeaefc04, 0x11adfc04, 0xefbbbc00,
+	0x1ff77c47,					/* last */
+	/*
+	 * SDRAM Initialization (offset 5 in UPMA RAM)
+	 *
+	 * This is no UPM entry point. The following definition uses
+	 * the remaining space to establish an initialization
+	 * sequence, which is executed by a RUN command.
+	 *
+	 */
+	0x1ff77c34, 0xefeabc34, 0x1fb57c35,	/* last */
+	/*
+	 * Burst Read. (Offset 8 in UPMA RAM)
+	 */
+	0x1f07fc04, 0xeeaefc04, 0x10adfc04, 0xf0affc00,
+	0xf0affc00, 0xf1affc00, 0xefbbbc00, 0x1ff77c47,	/* last */
+	_NOT_USED_, _NOT_USED_, _NOT_USED_, _NOT_USED_,
+	_NOT_USED_, _NOT_USED_, _NOT_USED_, _NOT_USED_,
+	/*
+	 * Single Write. (Offset 18 in UPMA RAM)
+	 */
+	0x1f27fc04, 0xeeaebc00, 0x01b93c04, 0x1ff77c47,	/* last */
+	_NOT_USED_, _NOT_USED_, _NOT_USED_, _NOT_USED_,
+	/*
+	 * Burst Write. (Offset 20 in UPMA RAM)
+	 */
+	0x1f07fc04, 0xeeaebc00, 0x10ad7c00, 0xf0affc00,
+	0xf0affc00, 0xe1bbbc04, 0x1ff77c47,	/* last */
+	_NOT_USED_,
+	_NOT_USED_, _NOT_USED_, _NOT_USED_, _NOT_USED_,
+	_NOT_USED_, _NOT_USED_, _NOT_USED_, _NOT_USED_,
+	/*
+	 * Refresh  (Offset 30 in UPMA RAM)
+	 */
+	0x1ff5fc84, 0xfffffc04, 0xfffffc04, 0xfffffc04,
+	0xfffffc84, 0xfffffc07,		/* last */
+	_NOT_USED_, _NOT_USED_,
+	_NOT_USED_, _NOT_USED_, _NOT_USED_, _NOT_USED_,
+	/*
+	 * Exception. (Offset 3c in UPMA RAM)
+	 */
+	0x7ffffc07,					/* last */
+	_NOT_USED_, _NOT_USED_, _NOT_USED_,
+};
+
+
+/* ------------------------------------------------------------------------- */
+int board_early_init_f(void)
+{
+    volatile immap_t     *immap  = (immap_t *)CONFIG_SYS_IMMR;
+    volatile memctl8xx_t *memctl = &immap->im_memctl;
+
+/* init BCSR chipselect line for ip860_get_clk_freq() and ip860_get_dram_size() */
+    memctl->memc_or4 = CONFIG_SYS_OR4;
+    memctl->memc_br4 = CONFIG_SYS_BR4;
+
+    return 0;
+}
+
+
+/* ------------------------------------------------------------------------- */
+
+/*
+ * Check Board Identity:
+ *
+ * Test ID string (IP860...)
+ */
+
+int checkboard (void)
+{
+	unsigned char *s, *e;
+	unsigned char buf[64];
+	int i;
+
+	puts ("Board: ");
+
+	i = getenv_f("serial#", (char *)buf, sizeof (buf));
+	s = (i > 0) ? buf : NULL;
+
+	if (!s || strncmp ((char *)s, "IP860", 5)) {
+		puts ("### No HW ID - assuming IP860");
+	} else {
+		for (e = s; *e; ++e) {
+			if (*e == ' ')
+				break;
+		}
+
+		for (; s < e; ++s) {
+			putc (*s);
+		}
+	}
+
+	putc ('\n');
+
+	return (0);
+}
+
+/* ------------------------------------------------------------------------- */
+
+phys_size_t initdram (int board_type)
+{
+	volatile immap_t *immap = (immap_t *) CONFIG_SYS_IMMR;
+	volatile memctl8xx_t *memctl = &immap->im_memctl;
+	long int size;
+	ulong refresh_val;
+
+	upmconfig (UPMA, (uint *) sdram_table,
+			   sizeof (sdram_table) / sizeof (uint));
+
+	/*
+	 * Preliminary prescaler for refresh
+	 */
+	if (ip860_get_clk_freq() == 50000000)
+	{
+		memctl->memc_mptpr = 0x0400;
+		refresh_val = 0xC3000000;
+	}
+	else
+	{
+		memctl->memc_mptpr = 0x0200;
+		refresh_val = 0x9C000000;
+	}
+
+
+	memctl->memc_mar = 0x00000088;
+
+	/*
+	 * Map controller banks 2 to the SDRAM address
+	 */
+	memctl->memc_or2 = CONFIG_SYS_OR2;
+	memctl->memc_br2 = CONFIG_SYS_BR2;
+
+	/* IP860 boards have only one bank SDRAM */
+
+
+	udelay (200);
+
+	/* perform SDRAM initializsation sequence */
+
+	memctl->memc_mamr = 0x00804114 | refresh_val;
+	memctl->memc_mcr  = 0x80004105;	/* run precharge pattern from loc 5 */
+	udelay(1);
+	memctl->memc_mamr = 0x00804118 | refresh_val;
+	memctl->memc_mcr  = 0x80004130;	/* run refresh pattern 8 times */
+
+
+	udelay (1000);
+
+	/*
+	 * Check SDRAM Memory Size
+	 */
+	if (ip860_get_dram_size() == 16)
+		size = dram_size (refresh_val | 0x00804114, SDRAM_BASE, SDRAM_MAX_SIZE);
+	else
+		size = dram_size (refresh_val | 0x00906114, SDRAM_BASE, SDRAM_MAX_SIZE);
+
+	udelay (1000);
+
+	memctl->memc_or2 = ((-size) & 0xFFFF0000) | SDRAM_TIMING;
+	memctl->memc_br2 = (CONFIG_SYS_SDRAM_BASE & BR_BA_MSK) | BR_MS_UPMA | BR_V;
+
+	udelay (10000);
+
+	/*
+	 * Also, map other memory to correct position
+	 */
+
+#if (defined(CONFIG_SYS_OR1) && defined(CONFIG_SYS_BR1_PRELIM))
+	memctl->memc_or1 = CONFIG_SYS_OR1;
+	memctl->memc_br1 = CONFIG_SYS_BR1;
+#endif
+
+#if defined(CONFIG_SYS_OR3) && defined(CONFIG_SYS_BR3)
+	memctl->memc_or3 = CONFIG_SYS_OR3;
+	memctl->memc_br3 = CONFIG_SYS_BR3;
+#endif
+
+#if defined(CONFIG_SYS_OR4) && defined(CONFIG_SYS_BR4)
+	memctl->memc_or4 = CONFIG_SYS_OR4;
+	memctl->memc_br4 = CONFIG_SYS_BR4;
+#endif
+
+#if defined(CONFIG_SYS_OR5) && defined(CONFIG_SYS_BR5)
+	memctl->memc_or5 = CONFIG_SYS_OR5;
+	memctl->memc_br5 = CONFIG_SYS_BR5;
+#endif
+
+#if defined(CONFIG_SYS_OR6) && defined(CONFIG_SYS_BR6)
+	memctl->memc_or6 = CONFIG_SYS_OR6;
+	memctl->memc_br6 = CONFIG_SYS_BR6;
+#endif
+
+#if defined(CONFIG_SYS_OR7) && defined(CONFIG_SYS_BR7)
+	memctl->memc_or7 = CONFIG_SYS_OR7;
+	memctl->memc_br7 = CONFIG_SYS_BR7;
+#endif
+
+	return (size);
+}
+
+/* ------------------------------------------------------------------------- */
+
+/*
+ * Check memory range for valid RAM. A simple memory test determines
+ * the actually available RAM size between addresses `base' and
+ * `base + maxsize'. Some (not all) hardware errors are detected:
+ * - short between address lines
+ * - short between data lines
+ */
+
+static long int dram_size (long int mamr_value, long int *base,
+						   long int maxsize)
+{
+	volatile immap_t *immap = (immap_t *) CONFIG_SYS_IMMR;
+	volatile memctl8xx_t *memctl = &immap->im_memctl;
+
+	memctl->memc_mamr = mamr_value;
+
+	return (get_ram_size(base, maxsize));
+}
+
+/* ------------------------------------------------------------------------- */
+
+void reset_phy (void)
+{
+	volatile immap_t *immr = (immap_t *) CONFIG_SYS_IMMR;
+	ulong mask = PB_ENET_RESET | PB_ENET_JABD;
+	ulong reg;
+
+	/* Make sure PHY is not in low-power mode */
+	immr->im_cpm.cp_pbpar &= ~(mask);	/* GPIO */
+	immr->im_cpm.cp_pbodr &= ~(mask);	/* active output */
+
+	/* Set  JABD low  (no JABber Disable),
+	 * and RESET high (Reset PHY)
+	 */
+	reg = immr->im_cpm.cp_pbdat;
+	reg = (reg & ~PB_ENET_JABD) | PB_ENET_RESET;
+	immr->im_cpm.cp_pbdat = reg;
+
+	/* now drive outputs */
+	immr->im_cpm.cp_pbdir |= mask;	/* output */
+	udelay (1000);
+	/*
+	   * Release RESET signal
+	 */
+	immr->im_cpm.cp_pbdat &= ~(PB_ENET_RESET);
+	udelay (1000);
+}
+
+/* ------------------------------------------------------------------------- */
+
+unsigned long ip860_get_clk_freq(void)
+{
+	volatile ip860_bcsr_t	*bcsr   = (ip860_bcsr_t *)BCSR_BASE;
+	ulong temp;
+	uchar sysclk;
+
+	if ((bcsr->bd_status & 0x80) == 0x80)	/* bd_rev valid ? */
+		sysclk = (bcsr->bd_rev & 0x18) >> 3;
+	else
+		sysclk = 0x00;
+
+	switch (sysclk)
+	{
+		case 0x00:
+			temp = 50000000;
+			break;
+
+		case 0x01:
+			temp = 80000000;
+			break;
+
+		default:
+			temp = 50000000;
+			break;
+	}
+
+	return (temp);
+
+}
+
+
+/* ------------------------------------------------------------------------- */
+
+unsigned long ip860_get_dram_size(void)
+{
+	volatile ip860_bcsr_t	*bcsr   = (ip860_bcsr_t *)BCSR_BASE;
+	ulong temp;
+	uchar dram_size;
+
+	if ((bcsr->bd_status & 0x80) == 0x80)	/* bd_rev valid ? */
+		dram_size = (bcsr->bd_rev & 0xE0) >> 5;
+	else
+		dram_size = 0x00;	/* default is 16 MB */
+
+	switch (dram_size)
+	{
+		case 0x00:
+			temp = 16;
+			break;
+
+		case 0x01:
+			temp = 32;
+			break;
+
+		default:
+			temp = 16;
+			break;
+	}
+
+	return (temp);
+
+}
+
+/* ------------------------------------------------------------------------- */

common/package/utils/sysupgrade-helper/src/board/ip860/u-boot.lds

@@ -0,0 +1,96 @@
+/*
+ * (C) Copyright 2000-2010
+ * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+OUTPUT_ARCH(powerpc)
+
+SECTIONS
+{
+  /* Read-only sections, merged into text segment: */
+  . = + SIZEOF_HEADERS;
+  .text      :
+  {
+    arch/powerpc/cpu/mpc8xx/start.o	(.text*)
+    arch/powerpc/cpu/mpc8xx/traps.o	(.text*)
+
+    *(.text*)
+  }
+  _etext = .;
+  PROVIDE (etext = .);
+  .rodata    :
+  {
+    *(SORT_BY_ALIGNMENT(SORT_BY_NAME(.rodata*)))
+  }
+
+  /* Read-write section, merged into data segment: */
+  . = (. + 0x00FF) & 0xFFFFFF00;
+  _erotext = .;
+  PROVIDE (erotext = .);
+  .reloc   :
+  {
+    _GOT2_TABLE_ = .;
+    KEEP(*(.got2))
+    KEEP(*(.got))
+    PROVIDE(_GLOBAL_OFFSET_TABLE_ = . + 4);
+    _FIXUP_TABLE_ = .;
+    KEEP(*(.fixup))
+  }
+  __got2_entries = ((_GLOBAL_OFFSET_TABLE_ - _GOT2_TABLE_) >> 2) - 1;
+  __fixup_entries = (. - _FIXUP_TABLE_)>>2;
+
+  .data    :
+  {
+    *(.data*)
+    *(.sdata*)
+  }
+  _edata  =  .;
+  PROVIDE (edata = .);
+
+  . = .;
+  __u_boot_cmd_start = .;
+  .u_boot_cmd : { *(.u_boot_cmd) }
+  __u_boot_cmd_end = .;
+
+
+  . = .;
+  __start___ex_table = .;
+  __ex_table : { *(__ex_table) }
+  __stop___ex_table = .;
+
+  . = ALIGN(256);
+  __init_begin = .;
+  .text.init : { *(.text.init) }
+  .data.init : { *(.data.init) }
+  . = ALIGN(256);
+  __init_end = .;
+
+  __bss_start = .;
+  .bss (NOLOAD)       :
+  {
+   *(.bss*)
+   *(.sbss*)
+   *(COMMON)
+   . = ALIGN(4);
+  }
+  __bss_end__ = . ;
+  PROVIDE (end = .);
+}

common/package/utils/sysupgrade-helper/src/board/ip860/u-boot.lds.debug

@@ -0,0 +1,136 @@
+/*
+ * (C) Copyright 2000
+ * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+OUTPUT_ARCH(powerpc)
+/* Do we need any of these for elf?
+   __DYNAMIC = 0;    */
+SECTIONS
+{
+  /* Read-only sections, merged into text segment: */
+  . = + SIZEOF_HEADERS;
+  .interp : { *(.interp) }
+  .hash          : { *(.hash)		}
+  .dynsym        : { *(.dynsym)		}
+  .dynstr        : { *(.dynstr)		}
+  .rel.text      : { *(.rel.text)		}
+  .rela.text     : { *(.rela.text)	}
+  .rel.data      : { *(.rel.data)		}
+  .rela.data     : { *(.rela.data)	}
+  .rel.rodata    : { *(.rel.rodata)	}
+  .rela.rodata   : { *(.rela.rodata)	}
+  .rel.got       : { *(.rel.got)		}
+  .rela.got      : { *(.rela.got)		}
+  .rel.ctors     : { *(.rel.ctors)	}
+  .rela.ctors    : { *(.rela.ctors)	}
+  .rel.dtors     : { *(.rel.dtors)	}
+  .rela.dtors    : { *(.rela.dtors)	}
+  .rel.bss       : { *(.rel.bss)		}
+  .rela.bss      : { *(.rela.bss)		}
+  .rel.plt       : { *(.rel.plt)		}
+  .rela.plt      : { *(.rela.plt)		}
+  .init          : { *(.init)	}
+  .plt : { *(.plt) }
+  .text      :
+  {
+    /* WARNING - the following is hand-optimized to fit within	*/
+    /* the sector layout of our flash chips!	XXX FIXME XXX	*/
+
+    arch/powerpc/cpu/mpc8xx/start.o	(.text)
+    arch/powerpc/lib/ppcstring.o	(.text)
+    arch/powerpc/cpu/mpc8xx/interrupts.o (.text)
+    arch/powerpc/lib/time.o		(.text)
+    arch/powerpc/lib/ticks.o		(.text)
+/**
+    . = env_offset;
+    common/env_embedded.o(.text)
+**/
+    *(.text)
+    *(.got1)
+  }
+  _etext = .;
+  PROVIDE (etext = .);
+  .rodata    :
+  {
+    *(.rodata)
+    *(.rodata1)
+    *(.rodata.str1.4)
+    *(.eh_frame)
+  }
+  .fini      : { *(.fini)    } =0
+  .ctors     : { *(.ctors)   }
+  .dtors     : { *(.dtors)   }
+
+  /* Read-write section, merged into data segment: */
+  . = (. + 0x0FFF) & 0xFFFFF000;
+  _erotext = .;
+  PROVIDE (erotext = .);
+  .reloc   :
+  {
+    *(.got)
+    _GOT2_TABLE_ = .;
+    *(.got2)
+    _FIXUP_TABLE_ = .;
+    *(.fixup)
+  }
+  __got2_entries = (_FIXUP_TABLE_ - _GOT2_TABLE_) >>2;
+  __fixup_entries = (. - _FIXUP_TABLE_)>>2;
+
+  .data    :
+  {
+    *(.data)
+    *(.data1)
+    *(.sdata)
+    *(.sdata2)
+    *(.dynamic)
+    CONSTRUCTORS
+  }
+  _edata  =  .;
+  PROVIDE (edata = .);
+
+  __u_boot_cmd_start = .;
+  .u_boot_cmd : { *(.u_boot_cmd) }
+  __u_boot_cmd_end = .;
+
+
+  __start___ex_table = .;
+  __ex_table : { *(__ex_table) }
+  __stop___ex_table = .;
+
+  . = ALIGN(4096);
+  __init_begin = .;
+  .text.init : { *(.text.init) }
+  .data.init : { *(.data.init) }
+  . = ALIGN(4096);
+  __init_end = .;
+
+  __bss_start = .;
+  .bss       :
+  {
+   *(.sbss) *(.scommon)
+   *(.dynbss)
+   *(.bss)
+   *(COMMON)
+  }
+  __bss_end__ = . ;
+  PROVIDE (end = .);
+}