mirror of
https://github.com/Ysurac/openmptcprouter.git
synced 2025-03-09 15:40:20 +00:00
Add a directory by kernel instead of a common root, add qnap-301w and rpi4 kernel 6.1 suppport
This commit is contained in:
Ycarus (Yannick Chabanois)
parent
e910436a7a
commit
46837ec4c0
9459 changed files with 362648 additions and 116345 deletions
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@ -0,0 +1,44 @@
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#
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# (C) Copyright 2000-2006
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# Wolfgang Denk, DENX Software Engineering, wd@denx.de.
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#
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# See file CREDITS for list of people who contributed to this
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# project.
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#
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# This program is free software; you can redistribute it and/or
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# modify it under the terms of the GNU General Public License as
|
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# published by the Free Software Foundation; either version 2 of
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# the License, or (at your option) any later version.
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#
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# This program is distributed in the hope that it will be useful,
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# but WITHOUT ANY WARRANTY; without even the implied warranty of
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# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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# GNU General Public License for more details.
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#
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# You should have received a copy of the GNU General Public License
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# along with this program; if not, write to the Free Software
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# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
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# MA 02111-1307 USA
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#
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include $(TOPDIR)/config.mk
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LIB = $(obj)lib$(BOARD).o
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COBJS = $(BOARD).o flash.o kbd.o
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SRCS := $(SOBJS:.o=.S) $(COBJS:.o=.c)
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OBJS := $(addprefix $(obj),$(COBJS))
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SOBJS := $(addprefix $(obj),$(SOBJS))
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$(LIB): $(obj).depend $(OBJS)
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$(call cmd_link_o_target, $(OBJS))
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#########################################################################
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# defines $(obj).depend target
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include $(SRCTREE)/rules.mk
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sinclude $(obj).depend
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#########################################################################
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461
common/package/utils/sysupgrade-helper/src/board/rbc823/flash.c
Normal file
461
common/package/utils/sysupgrade-helper/src/board/rbc823/flash.c
Normal file
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@ -0,0 +1,461 @@
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/*
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* (C) Copyright 2000
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* Wolfgang Denk, DENX Software Engineering, wd@denx.de.
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*
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* See file CREDITS for list of people who contributed to this
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* project.
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*
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* This program is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License as
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||||
* published by the Free Software Foundation; either version 2 of
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* the License, or (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, Inc., 59 Temple Place, Suite 330, Boston,
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* MA 02111-1307 USA
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*/
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#include <common.h>
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#include <mpc8xx.h>
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flash_info_t flash_info[CONFIG_SYS_MAX_FLASH_BANKS];
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/*
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* Functions
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*/
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static ulong flash_get_size(vu_long *addr, flash_info_t *info);
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static int write_word(flash_info_t *info, ulong dest, ulong data);
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static void flash_get_offsets(ulong base, flash_info_t *info);
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unsigned long flash_init(void)
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{
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unsigned long size_b0;
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int i;
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/* Init: no FLASHes known */
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for (i = 0; i < CONFIG_SYS_MAX_FLASH_BANKS; ++i)
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flash_info[i].flash_id = FLASH_UNKNOWN;
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/* Detect size */
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size_b0 = flash_get_size((vu_long *)CONFIG_SYS_FLASH_BASE,
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&flash_info[0]);
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/* Setup offsets */
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flash_get_offsets(CONFIG_SYS_FLASH_BASE, &flash_info[0]);
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#if CONFIG_SYS_MONITOR_BASE >= CONFIG_SYS_FLASH_BASE
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/* Monitor protection ON by default */
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flash_protect(FLAG_PROTECT_SET,
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CONFIG_SYS_MONITOR_BASE,
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CONFIG_SYS_MONITOR_BASE+monitor_flash_len-1,
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&flash_info[0]);
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#endif
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flash_info[0].size = size_b0;
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return size_b0;
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}
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/*-----------------------------------------------------------------------
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* Fix this to support variable sector sizes
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*/
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static void flash_get_offsets(ulong base, flash_info_t *info)
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{
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int i;
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/* set up sector start address table */
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if ((info->flash_id & FLASH_TYPEMASK) == FLASH_AM040) {
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/* set sector offsets for bottom boot block type */
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for (i = 0; i < info->sector_count; i++)
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info->start[i] = base + (i * 0x00010000);
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}
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}
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/*-----------------------------------------------------------------------
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*/
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void flash_print_info(flash_info_t *info)
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{
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int i;
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if (info->flash_id == FLASH_UNKNOWN) {
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puts("missing or unknown FLASH type\n");
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return;
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}
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switch (info->flash_id & FLASH_VENDMASK) {
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case FLASH_MAN_AMD:
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printf("AMD ");
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break;
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case FLASH_MAN_FUJ:
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printf("FUJITSU ");
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break;
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case FLASH_MAN_BM:
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printf("BRIGHT MICRO ");
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break;
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default:
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printf("Unknown Vendor ");
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break;
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}
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switch (info->flash_id & FLASH_TYPEMASK) {
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case FLASH_AM040:
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printf("29F040 or 29LV040 (4 Mbit, uniform sectors)\n");
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break;
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case FLASH_AM400B:
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printf("AM29LV400B (4 Mbit, bottom boot sect)\n");
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break;
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case FLASH_AM400T:
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printf("AM29LV400T (4 Mbit, top boot sector)\n");
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break;
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case FLASH_AM800B:
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printf("AM29LV800B (8 Mbit, bottom boot sect)\n");
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break;
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case FLASH_AM800T:
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printf("AM29LV800T (8 Mbit, top boot sector)\n");
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break;
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case FLASH_AM160B:
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printf("AM29LV160B (16 Mbit, bottom boot sect)\n");
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break;
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case FLASH_AM160T:
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printf("AM29LV160T (16 Mbit, top boot sector)\n");
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break;
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case FLASH_AM320B:
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printf("AM29LV320B (32 Mbit, bottom boot sect)\n");
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break;
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case FLASH_AM320T:
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printf("AM29LV320T (32 Mbit, top boot sector)\n");
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break;
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default:
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printf("Unknown Chip Type\n");
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break;
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}
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if (info->size >> 20) {
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printf(" Size: %ld MB in %d Sectors\n",
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info->size >> 20,
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info->sector_count);
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} else {
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printf(" Size: %ld KB in %d Sectors\n",
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info->size >> 10,
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info->sector_count);
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}
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puts(" Sector Start Addresses:");
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for (i = 0; i < info->sector_count; ++i) {
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if ((i % 5) == 0)
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puts("\n ");
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printf(" %08lX%s",
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info->start[i],
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info->protect[i] ? " (RO)" : " ");
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}
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putc('\n');
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return;
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}
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/*
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* The following code cannot be run from FLASH!
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*/
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static ulong flash_get_size(vu_long *addr, flash_info_t *info)
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{
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short i;
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volatile unsigned char *caddr;
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char value;
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caddr = (volatile unsigned char *)addr ;
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/* Write auto select command: read Manufacturer ID */
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debug("Base address is: %8p\n", caddr);
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caddr[0x0555] = 0xAA;
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caddr[0x02AA] = 0x55;
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caddr[0x0555] = 0x90;
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value = caddr[0];
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debug("Manufact ID: %02x\n", value);
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switch (value) {
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case 0x01: /*AMD_MANUFACT*/
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info->flash_id = FLASH_MAN_AMD;
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break;
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case 0x04: /*FUJ_MANUFACT*/
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info->flash_id = FLASH_MAN_FUJ;
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break;
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default:
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info->flash_id = FLASH_UNKNOWN;
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info->sector_count = 0;
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info->size = 0;
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break;
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}
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value = caddr[1]; /* device ID */
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debug("Device ID: %02x\n", value);
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switch (value) {
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case AMD_ID_LV040B:
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info->flash_id += FLASH_AM040;
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info->sector_count = 8;
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info->size = 0x00080000;
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break; /* => 512Kb */
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default:
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info->flash_id = FLASH_UNKNOWN;
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return 0; /* => no or unknown flash */
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}
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flash_get_offsets((ulong)addr, &flash_info[0]);
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/* check for protected sectors */
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for (i = 0; i < info->sector_count; i++) {
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/*
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* read sector protection at sector address,
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* (A7 .. A0) = 0x02
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* D0 = 1 if protected
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*/
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caddr = (volatile unsigned char *)(info->start[i]);
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info->protect[i] = caddr[2] & 1;
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}
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/*
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* Prevent writes to uninitialized FLASH.
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*/
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if (info->flash_id != FLASH_UNKNOWN) {
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caddr = (volatile unsigned char *)info->start[0];
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*caddr = 0xF0; /* reset bank */
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}
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return info->size;
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}
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int flash_erase(flash_info_t *info, int s_first, int s_last)
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{
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volatile unsigned char *addr =
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(volatile unsigned char *)(info->start[0]);
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int flag, prot, sect, l_sect;
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ulong start, now, last;
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if ((s_first < 0) || (s_first > s_last)) {
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if (info->flash_id == FLASH_UNKNOWN)
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printf("- missing\n");
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else
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printf("- no sectors to erase\n");
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return 1;
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}
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if ((info->flash_id == FLASH_UNKNOWN) ||
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(info->flash_id > FLASH_AMD_COMP)) {
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printf("Can't erase unknown flash type - aborted\n");
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return 1;
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}
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prot = 0;
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for (sect = s_first; sect <= s_last; ++sect) {
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if (info->protect[sect])
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prot++;
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}
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if (prot) {
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printf("- Warning: %d protected sectors will not be erased!\n",
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prot);
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} else {
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printf("\n");
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}
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l_sect = -1;
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/* Disable interrupts which might cause a timeout here */
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flag = disable_interrupts();
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addr[0x0555] = 0xAA;
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addr[0x02AA] = 0x55;
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addr[0x0555] = 0x80;
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addr[0x0555] = 0xAA;
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addr[0x02AA] = 0x55;
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/* Start erase on unprotected sectors */
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for (sect = s_first; sect <= s_last; sect++) {
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if (info->protect[sect] == 0) { /* not protected */
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addr = (volatile unsigned char *)(info->start[sect]);
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addr[0] = 0x30;
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l_sect = sect;
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}
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}
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|
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/* re-enable interrupts if necessary */
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if (flag)
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enable_interrupts();
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|
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/* wait at least 80us - let's wait 1 ms */
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udelay(1000);
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|
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/*
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* We wait for the last triggered sector
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*/
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if (l_sect < 0)
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goto DONE;
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start = get_timer(0);
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last = start;
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addr = (volatile unsigned char *)(info->start[l_sect]);
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while ((addr[0] & 0xFF) != 0xFF) {
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now = get_timer(start);
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if (now > CONFIG_SYS_FLASH_ERASE_TOUT) {
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printf("Timeout\n");
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return 1;
|
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}
|
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/* show that we're waiting */
|
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if ((now - last) > 1000) { /* every second */
|
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putc('.');
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last = now;
|
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}
|
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}
|
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|
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DONE:
|
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/* reset to read mode */
|
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addr = (volatile unsigned char *)info->start[0];
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addr[0] = 0xF0; /* reset bank */
|
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|
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printf(" done\n");
|
||||
return 0;
|
||||
}
|
||||
|
||||
/*
|
||||
* Copy memory to flash, returns:
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* 0 - OK
|
||||
* 1 - write timeout
|
||||
* 2 - Flash not erased
|
||||
*/
|
||||
|
||||
int write_buff(flash_info_t *info, uchar *src, ulong addr, ulong cnt)
|
||||
{
|
||||
ulong cp, wp, data;
|
||||
int i, l, rc;
|
||||
|
||||
wp = (addr & ~3); /* get lower word aligned address */
|
||||
|
||||
/*
|
||||
* handle unaligned start bytes
|
||||
*/
|
||||
l = addr - wp;
|
||||
|
||||
if (l != 0) {
|
||||
data = 0;
|
||||
for (i = 0, cp = wp; i < l; ++i, ++cp)
|
||||
data = (data << 8) | (*(uchar *)cp);
|
||||
|
||||
for (; i < 4 && cnt > 0; ++i) {
|
||||
data = (data << 8) | *src++;
|
||||
--cnt;
|
||||
++cp;
|
||||
}
|
||||
|
||||
for (; cnt == 0 && i < 4; ++i, ++cp)
|
||||
data = (data << 8) | (*(uchar *)cp);
|
||||
|
||||
rc = write_word(info, wp, data);
|
||||
|
||||
if (rc != 0)
|
||||
return rc;
|
||||
|
||||
wp += 4;
|
||||
}
|
||||
|
||||
/*
|
||||
* handle word aligned part
|
||||
*/
|
||||
while (cnt >= 4) {
|
||||
data = 0;
|
||||
for (i = 0; i < 4; ++i)
|
||||
data = (data << 8) | *src++;
|
||||
|
||||
rc = write_word(info, wp, data);
|
||||
|
||||
if (rc != 0)
|
||||
return rc;
|
||||
|
||||
wp += 4;
|
||||
cnt -= 4;
|
||||
}
|
||||
|
||||
if (cnt == 0)
|
||||
return 0;
|
||||
|
||||
/*
|
||||
* handle unaligned tail bytes
|
||||
*/
|
||||
data = 0;
|
||||
for (i = 0, cp = wp; i < 4 && cnt > 0; ++i, ++cp) {
|
||||
data = (data << 8) | *src++;
|
||||
--cnt;
|
||||
}
|
||||
for (; i < 4; ++i, ++cp)
|
||||
data = (data << 8) | (*(uchar *)cp);
|
||||
|
||||
return write_word(info, wp, data);
|
||||
}
|
||||
|
||||
/*
|
||||
* Write a word to Flash, returns:
|
||||
* 0 - OK
|
||||
* 1 - write timeout
|
||||
* 2 - Flash not erased
|
||||
*/
|
||||
static int write_word(flash_info_t *info, ulong dest, ulong data)
|
||||
{
|
||||
volatile unsigned char *cdest, *cdata;
|
||||
volatile unsigned char *addr =
|
||||
(volatile unsigned char *)(info->start[0]);
|
||||
ulong start;
|
||||
int flag, count = 4 ;
|
||||
|
||||
cdest = (volatile unsigned char *)dest ;
|
||||
cdata = (volatile unsigned char *)&data ;
|
||||
|
||||
/* Check if Flash is (sufficiently) erased */
|
||||
if ((*((vu_long *)dest)&data) != data)
|
||||
return 2;
|
||||
|
||||
while (count--) {
|
||||
/* Disable interrupts which might cause a timeout here */
|
||||
flag = disable_interrupts();
|
||||
|
||||
addr[0x0555] = 0xAA;
|
||||
addr[0x02AA] = 0x55;
|
||||
addr[0x0555] = 0xA0;
|
||||
|
||||
*cdest = *cdata;
|
||||
|
||||
/* re-enable interrupts if necessary */
|
||||
if (flag)
|
||||
enable_interrupts();
|
||||
|
||||
/* data polling for D7 */
|
||||
start = get_timer(0);
|
||||
while ((*cdest ^ *cdata) & 0x80) {
|
||||
if (get_timer(start) > CONFIG_SYS_FLASH_WRITE_TOUT)
|
||||
return 1;
|
||||
}
|
||||
|
||||
cdata++ ;
|
||||
cdest++ ;
|
||||
}
|
||||
return 0;
|
||||
}
|
||||
269
common/package/utils/sysupgrade-helper/src/board/rbc823/kbd.c
Normal file
269
common/package/utils/sysupgrade-helper/src/board/rbc823/kbd.c
Normal file
|
|
@ -0,0 +1,269 @@
|
|||
/*
|
||||
* (C) Copyright 2000
|
||||
* Wolfgang Denk, DENX Software Engineering, wd@denx.de.
|
||||
*
|
||||
* See file CREDITS for list of people who contributed to this
|
||||
* project.
|
||||
*
|
||||
* This program is free software; you can redistribute it and/or
|
||||
* modify it under the terms of the GNU General Public License as
|
||||
* published by the Free Software Foundation; either version 2 of
|
||||
* the License, or (at your option) any later version.
|
||||
*
|
||||
* This program is distributed in the hope that it will be useful,
|
||||
* but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
||||
* GNU General Public License for more details.
|
||||
*
|
||||
* You should have received a copy of the GNU General Public License
|
||||
* along with this program; if not, write to the Free Software
|
||||
* Foundation, Inc., 59 Temple Place, Suite 330, Boston,
|
||||
* MA 02111-1307 USA
|
||||
*/
|
||||
|
||||
/* Modified by Udi Finkelstein
|
||||
*
|
||||
* This file includes communication routines for SMC1 that can run even if
|
||||
* SMC2 have already been initialized.
|
||||
*/
|
||||
|
||||
#include <common.h>
|
||||
#include <watchdog.h>
|
||||
#include <commproc.h>
|
||||
#include <stdio_dev.h>
|
||||
#include <lcd.h>
|
||||
|
||||
DECLARE_GLOBAL_DATA_PTR;
|
||||
|
||||
#define SMC_INDEX 0
|
||||
#define PROFF_SMC PROFF_SMC1
|
||||
#define CPM_CR_CH_SMC CPM_CR_CH_SMC1
|
||||
|
||||
#define RBC823_KBD_BAUDRATE 38400
|
||||
#define CPM_KEYBOARD_BASE 0x1000
|
||||
/*
|
||||
* Minimal serial functions needed to use one of the SMC ports
|
||||
* as serial console interface.
|
||||
*/
|
||||
|
||||
void smc1_setbrg (void)
|
||||
{
|
||||
volatile immap_t *im = (immap_t *)CONFIG_SYS_IMMR;
|
||||
volatile cpm8xx_t *cp = &(im->im_cpm);
|
||||
|
||||
/* Set up the baud rate generator.
|
||||
* See 8xx_io/commproc.c for details.
|
||||
*
|
||||
* Wire BRG2 to SMC1, BRG1 to SMC2
|
||||
*/
|
||||
|
||||
cp->cp_simode = 0x00001000;
|
||||
|
||||
cp->cp_brgc2 =
|
||||
(((gd->cpu_clk / 16 / RBC823_KBD_BAUDRATE)-1) << 1) | CPM_BRG_EN;
|
||||
}
|
||||
|
||||
int smc1_init (void)
|
||||
{
|
||||
volatile immap_t *im = (immap_t *)CONFIG_SYS_IMMR;
|
||||
volatile smc_t *sp;
|
||||
volatile smc_uart_t *up;
|
||||
volatile cbd_t *tbdf, *rbdf;
|
||||
volatile cpm8xx_t *cp = &(im->im_cpm);
|
||||
uint dpaddr;
|
||||
|
||||
/* initialize pointers to SMC */
|
||||
|
||||
sp = (smc_t *) &(cp->cp_smc[SMC_INDEX]);
|
||||
up = (smc_uart_t *) &cp->cp_dparam[PROFF_SMC];
|
||||
|
||||
/* Disable transmitter/receiver.
|
||||
*/
|
||||
sp->smc_smcmr &= ~(SMCMR_REN | SMCMR_TEN);
|
||||
|
||||
/* Enable SDMA.
|
||||
*/
|
||||
im->im_siu_conf.sc_sdcr = 1;
|
||||
|
||||
/* clear error conditions */
|
||||
#ifdef CONFIG_SYS_SDSR
|
||||
im->im_sdma.sdma_sdsr = CONFIG_SYS_SDSR;
|
||||
#else
|
||||
im->im_sdma.sdma_sdsr = 0x83;
|
||||
#endif
|
||||
|
||||
/* clear SDMA interrupt mask */
|
||||
#ifdef CONFIG_SYS_SDMR
|
||||
im->im_sdma.sdma_sdmr = CONFIG_SYS_SDMR;
|
||||
#else
|
||||
im->im_sdma.sdma_sdmr = 0x00;
|
||||
#endif
|
||||
|
||||
/* Use Port B for SMC1 instead of other functions.
|
||||
*/
|
||||
cp->cp_pbpar |= 0x000000c0;
|
||||
cp->cp_pbdir &= ~0x000000c0;
|
||||
cp->cp_pbodr &= ~0x000000c0;
|
||||
|
||||
/* Set the physical address of the host memory buffers in
|
||||
* the buffer descriptors.
|
||||
*/
|
||||
|
||||
#ifdef CONFIG_SYS_ALLOC_DPRAM
|
||||
dpaddr = dpram_alloc_align (sizeof(cbd_t)*2 + 2, 8) ;
|
||||
#else
|
||||
dpaddr = CPM_KEYBOARD_BASE ;
|
||||
#endif
|
||||
|
||||
/* Allocate space for two buffer descriptors in the DP ram.
|
||||
* For now, this address seems OK, but it may have to
|
||||
* change with newer versions of the firmware.
|
||||
* damm: allocating space after the two buffers for rx/tx data
|
||||
*/
|
||||
|
||||
rbdf = (cbd_t *)&cp->cp_dpmem[dpaddr];
|
||||
rbdf->cbd_bufaddr = (uint) (rbdf+2);
|
||||
rbdf->cbd_sc = 0;
|
||||
tbdf = rbdf + 1;
|
||||
tbdf->cbd_bufaddr = ((uint) (rbdf+2)) + 1;
|
||||
tbdf->cbd_sc = 0;
|
||||
|
||||
/* Set up the uart parameters in the parameter ram.
|
||||
*/
|
||||
up->smc_rbase = dpaddr;
|
||||
up->smc_tbase = dpaddr+sizeof(cbd_t);
|
||||
up->smc_rfcr = SMC_EB;
|
||||
up->smc_tfcr = SMC_EB;
|
||||
|
||||
/* Set UART mode, 8 bit, no parity, one stop.
|
||||
* Enable receive and transmit.
|
||||
*/
|
||||
sp->smc_smcmr = smcr_mk_clen(9) | SMCMR_SM_UART;
|
||||
|
||||
/* Mask all interrupts and remove anything pending.
|
||||
*/
|
||||
sp->smc_smcm = 0;
|
||||
sp->smc_smce = 0xff;
|
||||
|
||||
/* Set up the baud rate generator.
|
||||
*/
|
||||
smc1_setbrg ();
|
||||
|
||||
/* Make the first buffer the only buffer.
|
||||
*/
|
||||
tbdf->cbd_sc |= BD_SC_WRAP;
|
||||
rbdf->cbd_sc |= BD_SC_EMPTY | BD_SC_WRAP;
|
||||
|
||||
/* Single character receive.
|
||||
*/
|
||||
up->smc_mrblr = 1;
|
||||
up->smc_maxidl = 0;
|
||||
|
||||
/* Initialize Tx/Rx parameters.
|
||||
*/
|
||||
|
||||
while (cp->cp_cpcr & CPM_CR_FLG) /* wait if cp is busy */
|
||||
;
|
||||
|
||||
cp->cp_cpcr = mk_cr_cmd(CPM_CR_CH_SMC, CPM_CR_INIT_TRX) | CPM_CR_FLG;
|
||||
|
||||
while (cp->cp_cpcr & CPM_CR_FLG) /* wait if cp is busy */
|
||||
;
|
||||
|
||||
/* Enable transmitter/receiver.
|
||||
*/
|
||||
sp->smc_smcmr |= SMCMR_REN | SMCMR_TEN;
|
||||
|
||||
return (0);
|
||||
}
|
||||
|
||||
void smc1_putc(const char c)
|
||||
{
|
||||
volatile cbd_t *tbdf;
|
||||
volatile char *buf;
|
||||
volatile smc_uart_t *up;
|
||||
volatile immap_t *im = (immap_t *)CONFIG_SYS_IMMR;
|
||||
volatile cpm8xx_t *cpmp = &(im->im_cpm);
|
||||
|
||||
up = (smc_uart_t *)&cpmp->cp_dparam[PROFF_SMC];
|
||||
|
||||
tbdf = (cbd_t *)&cpmp->cp_dpmem[up->smc_tbase];
|
||||
|
||||
/* Wait for last character to go.
|
||||
*/
|
||||
|
||||
buf = (char *)tbdf->cbd_bufaddr;
|
||||
|
||||
*buf = c;
|
||||
tbdf->cbd_datlen = 1;
|
||||
tbdf->cbd_sc |= BD_SC_READY;
|
||||
__asm__("eieio");
|
||||
|
||||
while (tbdf->cbd_sc & BD_SC_READY) {
|
||||
WATCHDOG_RESET ();
|
||||
__asm__("eieio");
|
||||
}
|
||||
}
|
||||
|
||||
int smc1_getc(void)
|
||||
{
|
||||
volatile cbd_t *rbdf;
|
||||
volatile unsigned char *buf;
|
||||
volatile smc_uart_t *up;
|
||||
volatile immap_t *im = (immap_t *)CONFIG_SYS_IMMR;
|
||||
volatile cpm8xx_t *cpmp = &(im->im_cpm);
|
||||
unsigned char c;
|
||||
|
||||
up = (smc_uart_t *)&cpmp->cp_dparam[PROFF_SMC];
|
||||
|
||||
rbdf = (cbd_t *)&cpmp->cp_dpmem[up->smc_rbase];
|
||||
|
||||
/* Wait for character to show up.
|
||||
*/
|
||||
buf = (unsigned char *)rbdf->cbd_bufaddr;
|
||||
|
||||
while (rbdf->cbd_sc & BD_SC_EMPTY)
|
||||
WATCHDOG_RESET ();
|
||||
|
||||
c = *buf;
|
||||
rbdf->cbd_sc |= BD_SC_EMPTY;
|
||||
|
||||
return(c);
|
||||
}
|
||||
|
||||
int smc1_tstc(void)
|
||||
{
|
||||
volatile cbd_t *rbdf;
|
||||
volatile smc_uart_t *up;
|
||||
volatile immap_t *im = (immap_t *)CONFIG_SYS_IMMR;
|
||||
volatile cpm8xx_t *cpmp = &(im->im_cpm);
|
||||
|
||||
up = (smc_uart_t *)&cpmp->cp_dparam[PROFF_SMC];
|
||||
|
||||
rbdf = (cbd_t *)&cpmp->cp_dpmem[up->smc_rbase];
|
||||
|
||||
return(!(rbdf->cbd_sc & BD_SC_EMPTY));
|
||||
}
|
||||
|
||||
/* search for keyboard and register it if found */
|
||||
int drv_keyboard_init(void)
|
||||
{
|
||||
int error = 0;
|
||||
struct stdio_dev kbd_dev;
|
||||
|
||||
if (0) {
|
||||
/* register the keyboard */
|
||||
memset (&kbd_dev, 0, sizeof(struct stdio_dev));
|
||||
strcpy(kbd_dev.name, "kbd");
|
||||
kbd_dev.flags = DEV_FLAGS_INPUT | DEV_FLAGS_SYSTEM;
|
||||
kbd_dev.putc = NULL;
|
||||
kbd_dev.puts = NULL;
|
||||
kbd_dev.getc = smc1_getc;
|
||||
kbd_dev.tstc = smc1_tstc;
|
||||
error = stdio_register (&kbd_dev);
|
||||
} else {
|
||||
lcd_is_enabled = 0;
|
||||
lcd_disable();
|
||||
}
|
||||
return error;
|
||||
}
|
||||
272
common/package/utils/sysupgrade-helper/src/board/rbc823/rbc823.c
Normal file
272
common/package/utils/sysupgrade-helper/src/board/rbc823/rbc823.c
Normal file
|
|
@ -0,0 +1,272 @@
|
|||
/*
|
||||
* (C) Copyright 2000
|
||||
* Wolfgang Denk, DENX Software Engineering, wd@denx.de.
|
||||
*
|
||||
* See file CREDITS for list of people who contributed to this
|
||||
* project.
|
||||
*
|
||||
* This program is free software; you can redistribute it and/or
|
||||
* modify it under the terms of the GNU General Public License as
|
||||
* published by the Free Software Foundation; either version 2 of
|
||||
* the License, or (at your option) any later version.
|
||||
*
|
||||
* This program is distributed in the hope that it will be useful,
|
||||
* but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
||||
* GNU General Public License for more details.
|
||||
*
|
||||
* You should have received a copy of the GNU General Public License
|
||||
* along with this program; if not, write to the Free Software
|
||||
* Foundation, Inc., 59 Temple Place, Suite 330, Boston,
|
||||
* MA 02111-1307 USA
|
||||
*/
|
||||
|
||||
#include <common.h>
|
||||
#include "mpc8xx.h"
|
||||
#include <linux/mtd/doc2000.h>
|
||||
|
||||
extern int kbd_init(void);
|
||||
extern int drv_kbd_init(void);
|
||||
|
||||
/* ------------------------------------------------------------------------- */
|
||||
|
||||
static long int dram_size (long int, long int *, long int);
|
||||
|
||||
/* ------------------------------------------------------------------------- */
|
||||
|
||||
#define _NOT_USED_ 0xFFFFFFFF
|
||||
|
||||
const uint sdram_table[] =
|
||||
{
|
||||
/*
|
||||
* Single Read. (Offset 0 in UPMA RAM)
|
||||
*/
|
||||
0x1F07FC04, 0xEEAEFC04, 0x11ADFC04, 0xEFBBBC00,
|
||||
0x1FF77C47, /* last */
|
||||
/*
|
||||
* SDRAM Initialization (offset 5 in UPMA RAM)
|
||||
*
|
||||
* This is no UPM entry point. The following definition uses
|
||||
* the remaining space to establish an initialization
|
||||
* sequence, which is executed by a RUN command.
|
||||
*
|
||||
*/
|
||||
0x1FF77C34, 0xEFEABC34, 0x1FB57C35, /* last */
|
||||
/*
|
||||
* Burst Read. (Offset 8 in UPMA RAM)
|
||||
*/
|
||||
0x1F07FC04, 0xEEAEFC04, 0x10ADFC04, 0xF0AFFC00,
|
||||
0xF0AFFC00, 0xF1AFFC00, 0xEFBBBC00, 0x1FF77C47, /* last */
|
||||
_NOT_USED_, _NOT_USED_, _NOT_USED_, _NOT_USED_,
|
||||
_NOT_USED_, _NOT_USED_, _NOT_USED_, _NOT_USED_,
|
||||
/*
|
||||
* Single Write. (Offset 18 in UPMA RAM)
|
||||
*/
|
||||
0x1F27FC04, 0xEEAEBC00, 0x01B93C04, 0x1FF77C47, /* last */
|
||||
_NOT_USED_, _NOT_USED_, _NOT_USED_, _NOT_USED_,
|
||||
/*
|
||||
* Burst Write. (Offset 20 in UPMA RAM)
|
||||
*/
|
||||
0x1F07FC04, 0xEEAEBC00, 0x10AD7C00, 0xF0AFFC00,
|
||||
0xF0AFFC00, 0xE1BBBC04, 0x1FF77C47, /* last */
|
||||
_NOT_USED_,
|
||||
_NOT_USED_, _NOT_USED_, _NOT_USED_, _NOT_USED_,
|
||||
_NOT_USED_, _NOT_USED_, _NOT_USED_, _NOT_USED_,
|
||||
/*
|
||||
* Refresh (Offset 30 in UPMA RAM)
|
||||
*/
|
||||
0x1FF5FC84, 0xFFFFFC04, 0xFFFFFC04, 0xFFFFFC04,
|
||||
0xFFFFFC84, 0xFFFFFC07, /* last */
|
||||
_NOT_USED_, _NOT_USED_,
|
||||
_NOT_USED_, _NOT_USED_, _NOT_USED_, _NOT_USED_,
|
||||
/*
|
||||
* Exception. (Offset 3c in UPMA RAM)
|
||||
*/
|
||||
0x1FF7FC07, /* last */
|
||||
_NOT_USED_, _NOT_USED_, _NOT_USED_,
|
||||
};
|
||||
|
||||
const uint static_table[] =
|
||||
{
|
||||
/*
|
||||
* Single Read. (Offset 0 in UPMA RAM)
|
||||
*/
|
||||
0x0FFFFC04, 0x0FF3FC04, 0x0FF3CC04, 0x0FF3CC04,
|
||||
0x0FF3EC04, 0x0FF3CC00, 0x0FF7FC04, 0x3FFFFC04,
|
||||
0xFFFFFC04, 0xFFFFFC05, /* last */
|
||||
_NOT_USED_, _NOT_USED_,
|
||||
_NOT_USED_, _NOT_USED_, _NOT_USED_, _NOT_USED_,
|
||||
_NOT_USED_, _NOT_USED_, _NOT_USED_, _NOT_USED_,
|
||||
_NOT_USED_, _NOT_USED_, _NOT_USED_, _NOT_USED_,
|
||||
/*
|
||||
* Single Write. (Offset 18 in UPMA RAM)
|
||||
*/
|
||||
0x0FFFFC04, 0x00FFFC04, 0x00FFFC04, 0x00FFFC04,
|
||||
0x01FFFC00, 0x3FFFFC04, 0xFFFFFC04, 0xFFFFFC05, /* last */
|
||||
_NOT_USED_, _NOT_USED_, _NOT_USED_, _NOT_USED_,
|
||||
_NOT_USED_, _NOT_USED_, _NOT_USED_, _NOT_USED_,
|
||||
_NOT_USED_, _NOT_USED_, _NOT_USED_, _NOT_USED_,
|
||||
_NOT_USED_, _NOT_USED_, _NOT_USED_, _NOT_USED_,
|
||||
_NOT_USED_, _NOT_USED_, _NOT_USED_, _NOT_USED_,
|
||||
_NOT_USED_, _NOT_USED_, _NOT_USED_, _NOT_USED_,
|
||||
_NOT_USED_, _NOT_USED_, _NOT_USED_, _NOT_USED_,
|
||||
_NOT_USED_, _NOT_USED_, _NOT_USED_, _NOT_USED_,
|
||||
};
|
||||
|
||||
/* ------------------------------------------------------------------------- */
|
||||
|
||||
/*
|
||||
* Check Board Identity:
|
||||
*
|
||||
* Test TQ ID string (TQM8xx...)
|
||||
* If present, check for "L" type (no second DRAM bank),
|
||||
* otherwise "L" type is assumed as default.
|
||||
*
|
||||
* Return 1 for "L" type, 0 else.
|
||||
*/
|
||||
|
||||
int checkboard (void)
|
||||
{
|
||||
char buf[64];
|
||||
int i = getenv_f("serial#", buf, sizeof(buf));
|
||||
|
||||
if (i < 0 || strncmp(buf, "TQM8", 4)) {
|
||||
printf ("### No HW ID - assuming RBC823\n");
|
||||
return (0);
|
||||
}
|
||||
|
||||
puts(buf);
|
||||
putc('\n');
|
||||
|
||||
return (0);
|
||||
}
|
||||
|
||||
/* ------------------------------------------------------------------------- */
|
||||
|
||||
phys_size_t initdram (int board_type)
|
||||
{
|
||||
volatile immap_t *immap = (immap_t *) CONFIG_SYS_IMMR;
|
||||
volatile memctl8xx_t *memctl = &immap->im_memctl;
|
||||
long int size_b0, size8, size9;
|
||||
|
||||
upmconfig (UPMA, (uint *) sdram_table,
|
||||
sizeof (sdram_table) / sizeof (uint));
|
||||
|
||||
/*
|
||||
* 1 Bank of 64Mbit x 2 devices
|
||||
*/
|
||||
memctl->memc_mptpr = CONFIG_SYS_MPTPR_1BK_4K;
|
||||
memctl->memc_mar = 0x00000088;
|
||||
|
||||
/*
|
||||
* Map controller SDRAM bank 0
|
||||
*/
|
||||
memctl->memc_or4 = CONFIG_SYS_OR4_PRELIM;
|
||||
memctl->memc_br4 = CONFIG_SYS_BR4_PRELIM;
|
||||
memctl->memc_mamr = CONFIG_SYS_MAMR_8COL & (~(MAMR_PTAE)); /* no refresh yet */
|
||||
udelay (200);
|
||||
|
||||
/*
|
||||
* Perform SDRAM initializsation sequence
|
||||
*/
|
||||
memctl->memc_mcr = 0x80008105; /* SDRAM bank 0 */
|
||||
udelay (1);
|
||||
memctl->memc_mamr = (CONFIG_SYS_MAMR_8COL & ~(MAMR_TLFA_MSK)) | MAMR_TLFA_8X;
|
||||
udelay (200);
|
||||
memctl->memc_mcr = 0x80008130; /* SDRAM bank 0 - execute twice */
|
||||
udelay (1);
|
||||
memctl->memc_mamr = (CONFIG_SYS_MAMR_8COL & ~(MAMR_TLFA_MSK)) | MAMR_TLFA_4X;
|
||||
udelay (200);
|
||||
|
||||
memctl->memc_mamr |= MAMR_PTAE; /* enable refresh */
|
||||
udelay (1000);
|
||||
|
||||
/*
|
||||
* Preliminary prescaler for refresh (depends on number of
|
||||
* banks): This value is selected for four cycles every 62.4 us
|
||||
* with two SDRAM banks or four cycles every 31.2 us with one
|
||||
* bank. It will be adjusted after memory sizing.
|
||||
*/
|
||||
memctl->memc_mptpr = CONFIG_SYS_MPTPR_2BK_4K; /* 16: but should be: CONFIG_SYS_MPTPR_1BK_4K */
|
||||
|
||||
/*
|
||||
* Check Bank 0 Memory Size for re-configuration
|
||||
*
|
||||
* try 8 column mode
|
||||
*/
|
||||
size8 = dram_size (CONFIG_SYS_MAMR_8COL, (long *) SDRAM_BASE4_PRELIM,
|
||||
SDRAM_MAX_SIZE);
|
||||
udelay (1000);
|
||||
|
||||
/*
|
||||
* try 9 column mode
|
||||
*/
|
||||
size9 = dram_size (CONFIG_SYS_MAMR_9COL, (long *) SDRAM_BASE4_PRELIM,
|
||||
SDRAM_MAX_SIZE);
|
||||
|
||||
if (size8 < size9) { /* leave configuration at 9 columns */
|
||||
size_b0 = size9;
|
||||
/* debug ("SDRAM Bank 0 in 9 column mode: %ld MB\n", size >> 20); */
|
||||
} else { /* back to 8 columns */
|
||||
size_b0 = size8;
|
||||
memctl->memc_mamr = CONFIG_SYS_MAMR_8COL;
|
||||
udelay (500);
|
||||
/* debug ("SDRAM Bank 0 in 8 column mode: %ld MB\n", size >> 20); */
|
||||
}
|
||||
|
||||
udelay (1000);
|
||||
|
||||
/*
|
||||
* Adjust refresh rate depending on SDRAM type, both banks
|
||||
* For types > 128 MBit leave it at the current (fast) rate
|
||||
*/
|
||||
if ((size_b0 < 0x02000000)) {
|
||||
/* reduce to 15.6 us (62.4 us / quad) */
|
||||
memctl->memc_mptpr = CONFIG_SYS_MPTPR_2BK_4K;
|
||||
udelay (1000);
|
||||
}
|
||||
|
||||
/* SDRAM Bank 0 is bigger - map first */
|
||||
|
||||
memctl->memc_or4 = ((-size_b0) & 0xFFFF0000) | CONFIG_SYS_OR_TIMING_SDRAM;
|
||||
memctl->memc_br4 = (CONFIG_SYS_SDRAM_BASE & BR_BA_MSK) | BR_MS_UPMA | BR_V;
|
||||
|
||||
udelay (10000);
|
||||
|
||||
return (size_b0);
|
||||
}
|
||||
|
||||
/* ------------------------------------------------------------------------- */
|
||||
|
||||
/*
|
||||
* Check memory range for valid RAM. A simple memory test determines
|
||||
* the actually available RAM size between addresses `base' and
|
||||
* `base + maxsize'. Some (not all) hardware errors are detected:
|
||||
* - short between address lines
|
||||
* - short between data lines
|
||||
*/
|
||||
|
||||
static long int dram_size (long int mamr_value, long int *base,
|
||||
long int maxsize)
|
||||
{
|
||||
volatile immap_t *immap = (immap_t *) CONFIG_SYS_IMMR;
|
||||
volatile memctl8xx_t *memctl = &immap->im_memctl;
|
||||
|
||||
memctl->memc_mamr = mamr_value;
|
||||
|
||||
return (get_ram_size (base, maxsize));
|
||||
}
|
||||
|
||||
#ifdef CONFIG_CMD_DOC
|
||||
void doc_init (void)
|
||||
{
|
||||
volatile immap_t *immap = (immap_t *) CONFIG_SYS_IMMR;
|
||||
volatile memctl8xx_t *memctl = &immap->im_memctl;
|
||||
|
||||
upmconfig (UPMB, (uint *) static_table,
|
||||
sizeof (static_table) / sizeof (uint));
|
||||
memctl->memc_mbmr = MAMR_DSA_1_CYCL;
|
||||
|
||||
doc_probe (FLASH_BASE1_PRELIM);
|
||||
}
|
||||
#endif
|
||||
|
|
@ -0,0 +1,106 @@
|
|||
/*
|
||||
* (C) Copyright 2000-2010
|
||||
* Wolfgang Denk, DENX Software Engineering, wd@denx.de.
|
||||
*
|
||||
* See file CREDITS for list of people who contributed to this
|
||||
* project.
|
||||
*
|
||||
* This program is free software; you can redistribute it and/or
|
||||
* modify it under the terms of the GNU General Public License as
|
||||
* published by the Free Software Foundation; either version 2 of
|
||||
* the License, or (at your option) any later version.
|
||||
*
|
||||
* This program is distributed in the hope that it will be useful,
|
||||
* but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
||||
* GNU General Public License for more details.
|
||||
*
|
||||
* You should have received a copy of the GNU General Public License
|
||||
* along with this program; if not, write to the Free Software
|
||||
* Foundation, Inc., 59 Temple Place, Suite 330, Boston,
|
||||
* MA 02111-1307 USA
|
||||
*/
|
||||
|
||||
OUTPUT_ARCH(powerpc)
|
||||
|
||||
SECTIONS
|
||||
{
|
||||
/* Read-only sections, merged into text segment: */
|
||||
. = + SIZEOF_HEADERS;
|
||||
.text :
|
||||
{
|
||||
/* WARNING - the following is hand-optimized to fit within */
|
||||
/* the sector layout of our flash chips! XXX FIXME XXX */
|
||||
|
||||
arch/powerpc/cpu/mpc8xx/start.o (.text*)
|
||||
arch/powerpc/cpu/mpc8xx/traps.o (.text*)
|
||||
|
||||
lib/libgeneric.o (.text*)
|
||||
net/libnet.o (.text*)
|
||||
arch/powerpc/cpu/mpc8xx/libmpc8xx.o (.text*)
|
||||
arch/powerpc/lib/libpowerpc.o (.text*)
|
||||
|
||||
. = env_offset;
|
||||
common/env_embedded.o (.text*)
|
||||
|
||||
*(.text*)
|
||||
}
|
||||
_etext = .;
|
||||
PROVIDE (etext = .);
|
||||
.rodata :
|
||||
{
|
||||
*(SORT_BY_ALIGNMENT(SORT_BY_NAME(.rodata*)))
|
||||
}
|
||||
|
||||
/* Read-write section, merged into data segment: */
|
||||
. = (. + 0x00FF) & 0xFFFFFF00;
|
||||
_erotext = .;
|
||||
PROVIDE (erotext = .);
|
||||
.reloc :
|
||||
{
|
||||
_GOT2_TABLE_ = .;
|
||||
KEEP(*(.got2))
|
||||
KEEP(*(.got))
|
||||
PROVIDE(_GLOBAL_OFFSET_TABLE_ = . + 4);
|
||||
_FIXUP_TABLE_ = .;
|
||||
KEEP(*(.fixup))
|
||||
}
|
||||
__got2_entries = ((_GLOBAL_OFFSET_TABLE_ - _GOT2_TABLE_) >> 2) - 1;
|
||||
__fixup_entries = (. - _FIXUP_TABLE_)>>2;
|
||||
|
||||
.data :
|
||||
{
|
||||
*(.data*)
|
||||
*(.sdata*)
|
||||
}
|
||||
_edata = .;
|
||||
PROVIDE (edata = .);
|
||||
|
||||
. = .;
|
||||
__u_boot_cmd_start = .;
|
||||
.u_boot_cmd : { *(.u_boot_cmd) }
|
||||
__u_boot_cmd_end = .;
|
||||
|
||||
. = .;
|
||||
__start___ex_table = .;
|
||||
__ex_table : { *(__ex_table) }
|
||||
__stop___ex_table = .;
|
||||
|
||||
. = ALIGN(256);
|
||||
__init_begin = .;
|
||||
.text.init : { *(.text.init) }
|
||||
.data.init : { *(.data.init) }
|
||||
. = ALIGN(256);
|
||||
__init_end = .;
|
||||
|
||||
__bss_start = .;
|
||||
.bss (NOLOAD) :
|
||||
{
|
||||
*(.bss*)
|
||||
*(.sbss*)
|
||||
*(COMMON)
|
||||
. = ALIGN(4);
|
||||
}
|
||||
__bss_end__ = . ;
|
||||
PROVIDE (end = .);
|
||||
}
|
||||
Loading…
Add table
Add a link
Reference in a new issue