mirror of
https://github.com/Ysurac/openmptcprouter.git
synced 2025-03-09 15:40:20 +00:00
Add kernel 6.1 support for BPI-R64
This commit is contained in:
Ycarus (Yannick Chabanois)
parent
91028220c3
commit
49e5717c77
73 changed files with 7015 additions and 10 deletions
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@ -0,0 +1,597 @@
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// SPDX-License-Identifier: GPL-2.0-only
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/*
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* Copyright (c) 2018 MediaTek Inc.
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* Author: Weijie Gao <weijie.gao@mediatek.com>
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*/
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#include <linux/kernel.h>
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#include <linux/module.h>
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#include <linux/init.h>
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#include <linux/device.h>
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#include <linux/delay.h>
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#include <linux/reset.h>
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#include <linux/hrtimer.h>
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#include <linux/mii.h>
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#include <linux/of_mdio.h>
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#include <linux/of_platform.h>
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#include <linux/of_gpio.h>
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#include <linux/of_net.h>
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#include <linux/of_irq.h>
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#include <linux/phy.h>
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#include "mt753x.h"
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#include "mt753x_swconfig.h"
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#include "mt753x_regs.h"
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#include "mt753x_nl.h"
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#include "mt7530.h"
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#include "mt7531.h"
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static u32 mt753x_id;
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struct list_head mt753x_devs;
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static DEFINE_MUTEX(mt753x_devs_lock);
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static struct mt753x_sw_id *mt753x_sw_ids[] = {
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&mt7530_id,
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&mt7531_id,
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};
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u32 mt753x_reg_read(struct gsw_mt753x *gsw, u32 reg)
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{
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u32 high, low;
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mutex_lock(&gsw->host_bus->mdio_lock);
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gsw->host_bus->write(gsw->host_bus, gsw->smi_addr, 0x1f,
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(reg & MT753X_REG_PAGE_ADDR_M) >> MT753X_REG_PAGE_ADDR_S);
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low = gsw->host_bus->read(gsw->host_bus, gsw->smi_addr,
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(reg & MT753X_REG_ADDR_M) >> MT753X_REG_ADDR_S);
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high = gsw->host_bus->read(gsw->host_bus, gsw->smi_addr, 0x10);
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mutex_unlock(&gsw->host_bus->mdio_lock);
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return (high << 16) | (low & 0xffff);
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}
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void mt753x_reg_write(struct gsw_mt753x *gsw, u32 reg, u32 val)
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{
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mutex_lock(&gsw->host_bus->mdio_lock);
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gsw->host_bus->write(gsw->host_bus, gsw->smi_addr, 0x1f,
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(reg & MT753X_REG_PAGE_ADDR_M) >> MT753X_REG_PAGE_ADDR_S);
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gsw->host_bus->write(gsw->host_bus, gsw->smi_addr,
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(reg & MT753X_REG_ADDR_M) >> MT753X_REG_ADDR_S, val & 0xffff);
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gsw->host_bus->write(gsw->host_bus, gsw->smi_addr, 0x10, val >> 16);
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mutex_unlock(&gsw->host_bus->mdio_lock);
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}
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/* Indirect MDIO clause 22/45 access */
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static int mt753x_mii_rw(struct gsw_mt753x *gsw, int phy, int reg, u16 data,
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u32 cmd, u32 st)
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{
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ktime_t timeout;
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u32 val, timeout_us;
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int ret = 0;
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timeout_us = 100000;
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timeout = ktime_add_us(ktime_get(), timeout_us);
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while (1) {
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val = mt753x_reg_read(gsw, PHY_IAC);
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if ((val & PHY_ACS_ST) == 0)
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break;
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if (ktime_compare(ktime_get(), timeout) > 0)
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return -ETIMEDOUT;
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}
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val = (st << MDIO_ST_S) |
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((cmd << MDIO_CMD_S) & MDIO_CMD_M) |
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((phy << MDIO_PHY_ADDR_S) & MDIO_PHY_ADDR_M) |
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((reg << MDIO_REG_ADDR_S) & MDIO_REG_ADDR_M);
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if (cmd == MDIO_CMD_WRITE || cmd == MDIO_CMD_ADDR)
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val |= data & MDIO_RW_DATA_M;
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mt753x_reg_write(gsw, PHY_IAC, val | PHY_ACS_ST);
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timeout_us = 100000;
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timeout = ktime_add_us(ktime_get(), timeout_us);
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while (1) {
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val = mt753x_reg_read(gsw, PHY_IAC);
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if ((val & PHY_ACS_ST) == 0)
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break;
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if (ktime_compare(ktime_get(), timeout) > 0)
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return -ETIMEDOUT;
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}
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if (cmd == MDIO_CMD_READ || cmd == MDIO_CMD_READ_C45) {
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val = mt753x_reg_read(gsw, PHY_IAC);
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ret = val & MDIO_RW_DATA_M;
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}
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return ret;
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}
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int mt753x_mii_read(struct gsw_mt753x *gsw, int phy, int reg)
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{
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int val;
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if (phy < MT753X_NUM_PHYS)
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phy = (gsw->phy_base + phy) & MT753X_SMI_ADDR_MASK;
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mutex_lock(&gsw->mii_lock);
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val = mt753x_mii_rw(gsw, phy, reg, 0, MDIO_CMD_READ, MDIO_ST_C22);
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mutex_unlock(&gsw->mii_lock);
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return val;
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}
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void mt753x_mii_write(struct gsw_mt753x *gsw, int phy, int reg, u16 val)
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{
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if (phy < MT753X_NUM_PHYS)
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phy = (gsw->phy_base + phy) & MT753X_SMI_ADDR_MASK;
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mutex_lock(&gsw->mii_lock);
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mt753x_mii_rw(gsw, phy, reg, val, MDIO_CMD_WRITE, MDIO_ST_C22);
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mutex_unlock(&gsw->mii_lock);
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}
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int mt753x_mmd_read(struct gsw_mt753x *gsw, int addr, int devad, u16 reg)
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{
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int val;
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if (addr < MT753X_NUM_PHYS)
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addr = (gsw->phy_base + addr) & MT753X_SMI_ADDR_MASK;
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mutex_lock(&gsw->mii_lock);
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mt753x_mii_rw(gsw, addr, devad, reg, MDIO_CMD_ADDR, MDIO_ST_C45);
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val = mt753x_mii_rw(gsw, addr, devad, 0, MDIO_CMD_READ_C45,
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MDIO_ST_C45);
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mutex_unlock(&gsw->mii_lock);
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return val;
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}
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void mt753x_mmd_write(struct gsw_mt753x *gsw, int addr, int devad, u16 reg,
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u16 val)
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{
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if (addr < MT753X_NUM_PHYS)
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addr = (gsw->phy_base + addr) & MT753X_SMI_ADDR_MASK;
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mutex_lock(&gsw->mii_lock);
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mt753x_mii_rw(gsw, addr, devad, reg, MDIO_CMD_ADDR, MDIO_ST_C45);
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mt753x_mii_rw(gsw, addr, devad, val, MDIO_CMD_WRITE, MDIO_ST_C45);
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mutex_unlock(&gsw->mii_lock);
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}
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int mt753x_mmd_ind_read(struct gsw_mt753x *gsw, int addr, int devad, u16 reg)
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{
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u16 val;
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if (addr < MT753X_NUM_PHYS)
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addr = (gsw->phy_base + addr) & MT753X_SMI_ADDR_MASK;
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mutex_lock(&gsw->mii_lock);
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mt753x_mii_rw(gsw, addr, MII_MMD_ACC_CTL_REG,
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(MMD_ADDR << MMD_CMD_S) |
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((devad << MMD_DEVAD_S) & MMD_DEVAD_M),
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MDIO_CMD_WRITE, MDIO_ST_C22);
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mt753x_mii_rw(gsw, addr, MII_MMD_ADDR_DATA_REG, reg,
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MDIO_CMD_WRITE, MDIO_ST_C22);
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mt753x_mii_rw(gsw, addr, MII_MMD_ACC_CTL_REG,
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(MMD_DATA << MMD_CMD_S) |
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((devad << MMD_DEVAD_S) & MMD_DEVAD_M),
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MDIO_CMD_WRITE, MDIO_ST_C22);
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val = mt753x_mii_rw(gsw, addr, MII_MMD_ADDR_DATA_REG, 0,
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MDIO_CMD_READ, MDIO_ST_C22);
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mutex_unlock(&gsw->mii_lock);
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return val;
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}
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void mt753x_mmd_ind_write(struct gsw_mt753x *gsw, int addr, int devad, u16 reg,
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u16 val)
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{
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if (addr < MT753X_NUM_PHYS)
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addr = (gsw->phy_base + addr) & MT753X_SMI_ADDR_MASK;
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mutex_lock(&gsw->mii_lock);
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mt753x_mii_rw(gsw, addr, MII_MMD_ACC_CTL_REG,
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(MMD_ADDR << MMD_CMD_S) |
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((devad << MMD_DEVAD_S) & MMD_DEVAD_M),
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MDIO_CMD_WRITE, MDIO_ST_C22);
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mt753x_mii_rw(gsw, addr, MII_MMD_ADDR_DATA_REG, reg,
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MDIO_CMD_WRITE, MDIO_ST_C22);
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mt753x_mii_rw(gsw, addr, MII_MMD_ACC_CTL_REG,
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(MMD_DATA << MMD_CMD_S) |
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((devad << MMD_DEVAD_S) & MMD_DEVAD_M),
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MDIO_CMD_WRITE, MDIO_ST_C22);
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mt753x_mii_rw(gsw, addr, MII_MMD_ADDR_DATA_REG, val,
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MDIO_CMD_WRITE, MDIO_ST_C22);
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mutex_unlock(&gsw->mii_lock);
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}
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static inline int mt753x_get_duplex(const struct device_node *np)
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{
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return of_property_read_bool(np, "full-duplex");
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}
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static void mt753x_load_port_cfg(struct gsw_mt753x *gsw)
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{
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struct device_node *port_np;
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struct device_node *fixed_link_node;
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struct mt753x_port_cfg *port_cfg;
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u32 port;
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for_each_child_of_node(gsw->dev->of_node, port_np) {
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if (!of_device_is_compatible(port_np, "mediatek,mt753x-port"))
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continue;
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if (!of_device_is_available(port_np))
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continue;
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if (of_property_read_u32(port_np, "reg", &port))
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continue;
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switch (port) {
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case 5:
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port_cfg = &gsw->port5_cfg;
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break;
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case 6:
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port_cfg = &gsw->port6_cfg;
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break;
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default:
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continue;
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}
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if (port_cfg->enabled) {
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dev_info(gsw->dev, "duplicated node for port%d\n",
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port_cfg->phy_mode);
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continue;
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}
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port_cfg->np = port_np;
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if (of_get_phy_mode(port_np, &port_cfg->phy_mode) < 0) {
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dev_info(gsw->dev, "incorrect phy-mode %d\n", port);
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continue;
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}
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fixed_link_node = of_get_child_by_name(port_np, "fixed-link");
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if (fixed_link_node) {
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u32 speed;
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port_cfg->force_link = 1;
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port_cfg->duplex = mt753x_get_duplex(fixed_link_node);
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if (of_property_read_u32(fixed_link_node, "speed",
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&speed)) {
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speed = 0;
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continue;
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}
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of_node_put(fixed_link_node);
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switch (speed) {
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case 10:
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port_cfg->speed = MAC_SPD_10;
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break;
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case 100:
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port_cfg->speed = MAC_SPD_100;
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break;
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case 1000:
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port_cfg->speed = MAC_SPD_1000;
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break;
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case 2500:
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port_cfg->speed = MAC_SPD_2500;
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break;
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default:
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dev_info(gsw->dev, "incorrect speed %d\n",
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speed);
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continue;
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}
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}
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port_cfg->enabled = 1;
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}
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}
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static void mt753x_add_gsw(struct gsw_mt753x *gsw)
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{
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mutex_lock(&mt753x_devs_lock);
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gsw->id = mt753x_id++;
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INIT_LIST_HEAD(&gsw->list);
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list_add_tail(&gsw->list, &mt753x_devs);
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mutex_unlock(&mt753x_devs_lock);
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}
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static void mt753x_remove_gsw(struct gsw_mt753x *gsw)
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{
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mutex_lock(&mt753x_devs_lock);
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list_del(&gsw->list);
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mutex_unlock(&mt753x_devs_lock);
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}
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struct gsw_mt753x *mt753x_get_gsw(u32 id)
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{
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struct gsw_mt753x *dev;
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mutex_lock(&mt753x_devs_lock);
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list_for_each_entry(dev, &mt753x_devs, list) {
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if (dev->id == id)
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return dev;
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}
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mutex_unlock(&mt753x_devs_lock);
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return NULL;
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}
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struct gsw_mt753x *mt753x_get_first_gsw(void)
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{
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struct gsw_mt753x *dev;
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mutex_lock(&mt753x_devs_lock);
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list_for_each_entry(dev, &mt753x_devs, list)
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return dev;
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mutex_unlock(&mt753x_devs_lock);
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return NULL;
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}
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void mt753x_put_gsw(void)
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{
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mutex_unlock(&mt753x_devs_lock);
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}
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void mt753x_lock_gsw(void)
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{
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mutex_lock(&mt753x_devs_lock);
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}
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static int mt753x_hw_reset(struct gsw_mt753x *gsw)
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{
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struct device_node *np = gsw->dev->of_node;
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struct reset_control *rstc;
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int mcm;
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int ret = -EINVAL;
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mcm = of_property_read_bool(np, "mediatek,mcm");
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if (mcm) {
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rstc = devm_reset_control_get(gsw->dev, "mcm");
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ret = IS_ERR(rstc);
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if (IS_ERR(rstc)) {
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dev_err(gsw->dev, "Missing reset ctrl of switch\n");
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return ret;
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}
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reset_control_assert(rstc);
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msleep(30);
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reset_control_deassert(rstc);
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gsw->reset_pin = -1;
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return 0;
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}
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gsw->reset_pin = of_get_named_gpio(np, "reset-gpios", 0);
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if (gsw->reset_pin < 0) {
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dev_err(gsw->dev, "Missing reset pin of switch\n");
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return ret;
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}
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ret = devm_gpio_request(gsw->dev, gsw->reset_pin, "mt753x-reset");
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if (ret) {
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dev_info(gsw->dev, "Failed to request gpio %d\n",
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gsw->reset_pin);
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return ret;
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}
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gpio_direction_output(gsw->reset_pin, 0);
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msleep(30);
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gpio_set_value(gsw->reset_pin, 1);
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msleep(500);
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return 0;
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}
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static irqreturn_t mt753x_irq_handler(int irq, void *dev)
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{
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struct gsw_mt753x *gsw = dev;
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disable_irq_nosync(gsw->irq);
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schedule_work(&gsw->irq_worker);
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return IRQ_HANDLED;
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}
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static int mt753x_probe(struct platform_device *pdev)
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{
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struct gsw_mt753x *gsw;
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struct mt753x_sw_id *sw;
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struct device_node *np = pdev->dev.of_node;
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struct device_node *mdio;
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struct mii_bus *mdio_bus;
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int ret = -EINVAL;
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struct chip_rev rev;
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struct mt753x_mapping *map;
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int i;
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mdio = of_parse_phandle(np, "mediatek,mdio", 0);
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if (!mdio)
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return -EINVAL;
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|
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mdio_bus = of_mdio_find_bus(mdio);
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if (!mdio_bus)
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return -EPROBE_DEFER;
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gsw = devm_kzalloc(&pdev->dev, sizeof(struct gsw_mt753x), GFP_KERNEL);
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if (!gsw)
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return -ENOMEM;
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gsw->host_bus = mdio_bus;
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gsw->dev = &pdev->dev;
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mutex_init(&gsw->mii_lock);
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/* Switch hard reset */
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if (mt753x_hw_reset(gsw))
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goto fail;
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||||
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/* Fetch the SMI address dirst */
|
||||
if (of_property_read_u32(np, "mediatek,smi-addr", &gsw->smi_addr))
|
||||
gsw->smi_addr = MT753X_DFL_SMI_ADDR;
|
||||
|
||||
/* Get LAN/WAN port mapping */
|
||||
map = mt753x_find_mapping(np);
|
||||
if (map) {
|
||||
mt753x_apply_mapping(gsw, map);
|
||||
gsw->global_vlan_enable = 1;
|
||||
dev_info(gsw->dev, "LAN/WAN VLAN setting=%s\n", map->name);
|
||||
}
|
||||
|
||||
/* Load MAC port configurations */
|
||||
mt753x_load_port_cfg(gsw);
|
||||
|
||||
/* Check for valid switch and then initialize */
|
||||
for (i = 0; i < ARRAY_SIZE(mt753x_sw_ids); i++) {
|
||||
if (!mt753x_sw_ids[i]->detect(gsw, &rev)) {
|
||||
sw = mt753x_sw_ids[i];
|
||||
|
||||
gsw->name = rev.name;
|
||||
gsw->model = sw->model;
|
||||
|
||||
dev_info(gsw->dev, "Switch is MediaTek %s rev %d",
|
||||
gsw->name, rev.rev);
|
||||
|
||||
/* Initialize the switch */
|
||||
ret = sw->init(gsw);
|
||||
if (ret)
|
||||
goto fail;
|
||||
|
||||
break;
|
||||
}
|
||||
}
|
||||
|
||||
if (i >= ARRAY_SIZE(mt753x_sw_ids)) {
|
||||
dev_err(gsw->dev, "No mt753x switch found\n");
|
||||
goto fail;
|
||||
}
|
||||
|
||||
gsw->irq = platform_get_irq(pdev, 0);
|
||||
if (gsw->irq >= 0) {
|
||||
ret = devm_request_irq(gsw->dev, gsw->irq, mt753x_irq_handler,
|
||||
0, dev_name(gsw->dev), gsw);
|
||||
if (ret) {
|
||||
dev_err(gsw->dev, "Failed to request irq %d\n",
|
||||
gsw->irq);
|
||||
goto fail;
|
||||
}
|
||||
|
||||
INIT_WORK(&gsw->irq_worker, mt753x_irq_worker);
|
||||
}
|
||||
|
||||
platform_set_drvdata(pdev, gsw);
|
||||
|
||||
gsw->phy_status_poll = of_property_read_bool(gsw->dev->of_node,
|
||||
"mediatek,phy-poll");
|
||||
|
||||
mt753x_add_gsw(gsw);
|
||||
|
||||
mt753x_swconfig_init(gsw);
|
||||
|
||||
if (sw->post_init)
|
||||
sw->post_init(gsw);
|
||||
|
||||
if (gsw->irq >= 0)
|
||||
mt753x_irq_enable(gsw);
|
||||
|
||||
return 0;
|
||||
|
||||
fail:
|
||||
devm_kfree(&pdev->dev, gsw);
|
||||
|
||||
return ret;
|
||||
}
|
||||
|
||||
static int mt753x_remove(struct platform_device *pdev)
|
||||
{
|
||||
struct gsw_mt753x *gsw = platform_get_drvdata(pdev);
|
||||
|
||||
if (gsw->irq >= 0)
|
||||
cancel_work_sync(&gsw->irq_worker);
|
||||
|
||||
if (gsw->reset_pin >= 0)
|
||||
gpio_free(gsw->reset_pin);
|
||||
|
||||
#ifdef CONFIG_SWCONFIG
|
||||
mt753x_swconfig_destroy(gsw);
|
||||
#endif
|
||||
|
||||
mt753x_remove_gsw(gsw);
|
||||
|
||||
platform_set_drvdata(pdev, NULL);
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
static const struct of_device_id mt753x_ids[] = {
|
||||
{ .compatible = "mediatek,mt753x" },
|
||||
{ },
|
||||
};
|
||||
|
||||
MODULE_DEVICE_TABLE(of, mt753x_ids);
|
||||
|
||||
static struct platform_driver mt753x_driver = {
|
||||
.probe = mt753x_probe,
|
||||
.remove = mt753x_remove,
|
||||
.driver = {
|
||||
.name = "mt753x",
|
||||
.of_match_table = mt753x_ids,
|
||||
},
|
||||
};
|
||||
|
||||
static int __init mt753x_init(void)
|
||||
{
|
||||
int ret;
|
||||
|
||||
INIT_LIST_HEAD(&mt753x_devs);
|
||||
ret = platform_driver_register(&mt753x_driver);
|
||||
|
||||
mt753x_nl_init();
|
||||
|
||||
return ret;
|
||||
}
|
||||
module_init(mt753x_init);
|
||||
|
||||
static void __exit mt753x_exit(void)
|
||||
{
|
||||
mt753x_nl_exit();
|
||||
|
||||
platform_driver_unregister(&mt753x_driver);
|
||||
}
|
||||
module_exit(mt753x_exit);
|
||||
|
||||
MODULE_LICENSE("GPL");
|
||||
MODULE_AUTHOR("Weijie Gao <weijie.gao@mediatek.com>");
|
||||
MODULE_DESCRIPTION("Driver for MediaTek MT753x Gigabit Switch");
|
||||
File diff suppressed because it is too large
Load diff
|
|
@ -0,0 +1,312 @@
|
|||
/*
|
||||
* This program is free software; you can redistribute it and/or
|
||||
* modify it under the terms of the GNU General Public License
|
||||
* as published by the Free Software Foundation; either version 2
|
||||
* of the License, or (at your option) any later version.
|
||||
*
|
||||
* This program is distributed in the hope that it will be useful,
|
||||
* but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
||||
* GNU General Public License for more details.
|
||||
*
|
||||
*/
|
||||
|
||||
#include <linux/kernel.h>
|
||||
#include <linux/module.h>
|
||||
#include <linux/init.h>
|
||||
#include <linux/device.h>
|
||||
#include <linux/delay.h>
|
||||
#include <linux/of_mdio.h>
|
||||
#include <linux/of_platform.h>
|
||||
#include <linux/of_gpio.h>
|
||||
|
||||
|
||||
#include "./rtl8367c/include/rtk_switch.h"
|
||||
#include "./rtl8367c/include/port.h"
|
||||
#include "./rtl8367c/include/vlan.h"
|
||||
#include "./rtl8367c/include/rtl8367c_asicdrv_port.h"
|
||||
|
||||
struct rtk_gsw {
|
||||
struct device *dev;
|
||||
struct mii_bus *bus;
|
||||
int reset_pin;
|
||||
};
|
||||
|
||||
static struct rtk_gsw *_gsw;
|
||||
|
||||
extern int gsw_debug_proc_init(void);
|
||||
extern void gsw_debug_proc_exit(void);
|
||||
|
||||
#ifdef CONFIG_SWCONFIG
|
||||
extern int rtl8367s_swconfig_init( void (*reset_func)(void) );
|
||||
#endif
|
||||
|
||||
/*mii_mgr_read/mii_mgr_write is the callback API for rtl8367 driver*/
|
||||
unsigned int mii_mgr_read(unsigned int phy_addr,unsigned int phy_register,unsigned int *read_data)
|
||||
{
|
||||
struct mii_bus *bus = _gsw->bus;
|
||||
|
||||
mutex_lock_nested(&bus->mdio_lock, MDIO_MUTEX_NESTED);
|
||||
|
||||
*read_data = bus->read(bus, phy_addr, phy_register);
|
||||
|
||||
mutex_unlock(&bus->mdio_lock);
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
unsigned int mii_mgr_write(unsigned int phy_addr,unsigned int phy_register,unsigned int write_data)
|
||||
{
|
||||
struct mii_bus *bus = _gsw->bus;
|
||||
|
||||
mutex_lock_nested(&bus->mdio_lock, MDIO_MUTEX_NESTED);
|
||||
|
||||
bus->write(bus, phy_addr, phy_register, write_data);
|
||||
|
||||
mutex_unlock(&bus->mdio_lock);
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
static int rtl8367s_hw_reset(void)
|
||||
{
|
||||
struct rtk_gsw *gsw = _gsw;
|
||||
int ret;
|
||||
|
||||
if (gsw->reset_pin < 0)
|
||||
return 0;
|
||||
|
||||
ret = devm_gpio_request(gsw->dev, gsw->reset_pin, "mediatek,reset-pin");
|
||||
|
||||
if (ret)
|
||||
printk("fail to devm_gpio_request\n");
|
||||
|
||||
gpio_direction_output(gsw->reset_pin, 0);
|
||||
|
||||
usleep_range(1000, 1100);
|
||||
|
||||
gpio_set_value(gsw->reset_pin, 1);
|
||||
|
||||
mdelay(500);
|
||||
|
||||
gpio_free(gsw->reset_pin);
|
||||
|
||||
return 0;
|
||||
|
||||
}
|
||||
|
||||
static int rtl8367s_vlan_config(int want_at_p0)
|
||||
{
|
||||
rtk_vlan_cfg_t vlan1, vlan2;
|
||||
|
||||
/* Set LAN/WAN VLAN partition */
|
||||
memset(&vlan1, 0x00, sizeof(rtk_vlan_cfg_t));
|
||||
|
||||
RTK_PORTMASK_PORT_SET(vlan1.mbr, EXT_PORT0);
|
||||
RTK_PORTMASK_PORT_SET(vlan1.mbr, UTP_PORT1);
|
||||
RTK_PORTMASK_PORT_SET(vlan1.mbr, UTP_PORT2);
|
||||
RTK_PORTMASK_PORT_SET(vlan1.mbr, UTP_PORT3);
|
||||
RTK_PORTMASK_PORT_SET(vlan1.untag, EXT_PORT0);
|
||||
RTK_PORTMASK_PORT_SET(vlan1.untag, UTP_PORT1);
|
||||
RTK_PORTMASK_PORT_SET(vlan1.untag, UTP_PORT2);
|
||||
RTK_PORTMASK_PORT_SET(vlan1.untag, UTP_PORT3);
|
||||
|
||||
if (want_at_p0) {
|
||||
RTK_PORTMASK_PORT_SET(vlan1.mbr, UTP_PORT4);
|
||||
RTK_PORTMASK_PORT_SET(vlan1.untag, UTP_PORT4);
|
||||
} else {
|
||||
RTK_PORTMASK_PORT_SET(vlan1.mbr, UTP_PORT0);
|
||||
RTK_PORTMASK_PORT_SET(vlan1.untag, UTP_PORT0);
|
||||
}
|
||||
|
||||
vlan1.ivl_en = 1;
|
||||
|
||||
rtk_vlan_set(1, &vlan1);
|
||||
|
||||
memset(&vlan2, 0x00, sizeof(rtk_vlan_cfg_t));
|
||||
|
||||
RTK_PORTMASK_PORT_SET(vlan2.mbr, EXT_PORT1);
|
||||
RTK_PORTMASK_PORT_SET(vlan2.untag, EXT_PORT1);
|
||||
|
||||
if (want_at_p0) {
|
||||
RTK_PORTMASK_PORT_SET(vlan2.mbr, UTP_PORT0);
|
||||
RTK_PORTMASK_PORT_SET(vlan2.untag, UTP_PORT0);
|
||||
} else {
|
||||
RTK_PORTMASK_PORT_SET(vlan2.mbr, UTP_PORT4);
|
||||
RTK_PORTMASK_PORT_SET(vlan2.untag, UTP_PORT4);
|
||||
}
|
||||
|
||||
vlan2.ivl_en = 1;
|
||||
rtk_vlan_set(2, &vlan2);
|
||||
|
||||
rtk_vlan_portPvid_set(EXT_PORT0, 1, 0);
|
||||
rtk_vlan_portPvid_set(UTP_PORT1, 1, 0);
|
||||
rtk_vlan_portPvid_set(UTP_PORT2, 1, 0);
|
||||
rtk_vlan_portPvid_set(UTP_PORT3, 1, 0);
|
||||
rtk_vlan_portPvid_set(EXT_PORT1, 2, 0);
|
||||
|
||||
if (want_at_p0) {
|
||||
rtk_vlan_portPvid_set(UTP_PORT0, 2, 0);
|
||||
rtk_vlan_portPvid_set(UTP_PORT4, 1, 0);
|
||||
} else {
|
||||
rtk_vlan_portPvid_set(UTP_PORT0, 1, 0);
|
||||
rtk_vlan_portPvid_set(UTP_PORT4, 2, 0);
|
||||
}
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
static int rtl8367s_hw_init(void)
|
||||
{
|
||||
|
||||
rtl8367s_hw_reset();
|
||||
|
||||
if(rtk_switch_init())
|
||||
return -1;
|
||||
|
||||
mdelay(500);
|
||||
|
||||
if (rtk_vlan_reset())
|
||||
return -1;
|
||||
|
||||
if (rtk_vlan_init())
|
||||
return -1;
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
static void set_rtl8367s_sgmii(void)
|
||||
{
|
||||
rtk_port_mac_ability_t mac_cfg;
|
||||
rtk_mode_ext_t mode;
|
||||
|
||||
mode = MODE_EXT_HSGMII;
|
||||
mac_cfg.forcemode = MAC_FORCE;
|
||||
mac_cfg.speed = PORT_SPEED_2500M;
|
||||
mac_cfg.duplex = PORT_FULL_DUPLEX;
|
||||
mac_cfg.link = PORT_LINKUP;
|
||||
mac_cfg.nway = DISABLED;
|
||||
mac_cfg.txpause = ENABLED;
|
||||
mac_cfg.rxpause = ENABLED;
|
||||
rtk_port_macForceLinkExt_set(EXT_PORT0, mode, &mac_cfg);
|
||||
rtk_port_sgmiiNway_set(EXT_PORT0, DISABLED);
|
||||
rtk_port_phyEnableAll_set(ENABLED);
|
||||
|
||||
}
|
||||
|
||||
static void set_rtl8367s_rgmii(void)
|
||||
{
|
||||
rtk_port_mac_ability_t mac_cfg;
|
||||
rtk_mode_ext_t mode;
|
||||
|
||||
mode = MODE_EXT_RGMII;
|
||||
mac_cfg.forcemode = MAC_FORCE;
|
||||
mac_cfg.speed = PORT_SPEED_1000M;
|
||||
mac_cfg.duplex = PORT_FULL_DUPLEX;
|
||||
mac_cfg.link = PORT_LINKUP;
|
||||
mac_cfg.nway = DISABLED;
|
||||
mac_cfg.txpause = ENABLED;
|
||||
mac_cfg.rxpause = ENABLED;
|
||||
rtk_port_macForceLinkExt_set(EXT_PORT1, mode, &mac_cfg);
|
||||
rtk_port_rgmiiDelayExt_set(EXT_PORT1, 1, 3);
|
||||
rtk_port_phyEnableAll_set(ENABLED);
|
||||
|
||||
}
|
||||
|
||||
void init_gsw(void)
|
||||
{
|
||||
rtl8367s_hw_init();
|
||||
set_rtl8367s_sgmii();
|
||||
set_rtl8367s_rgmii();
|
||||
}
|
||||
|
||||
// bleow are platform driver
|
||||
static const struct of_device_id rtk_gsw_match[] = {
|
||||
{ .compatible = "mediatek,rtk-gsw" },
|
||||
{},
|
||||
};
|
||||
|
||||
MODULE_DEVICE_TABLE(of, rtk_gsw_match);
|
||||
|
||||
static int rtk_gsw_probe(struct platform_device *pdev)
|
||||
{
|
||||
struct device_node *np = pdev->dev.of_node;
|
||||
struct device_node *mdio;
|
||||
struct mii_bus *mdio_bus;
|
||||
struct rtk_gsw *gsw;
|
||||
const char *pm;
|
||||
|
||||
mdio = of_parse_phandle(np, "mediatek,mdio", 0);
|
||||
|
||||
if (!mdio)
|
||||
return -EINVAL;
|
||||
|
||||
mdio_bus = of_mdio_find_bus(mdio);
|
||||
|
||||
if (!mdio_bus)
|
||||
return -EPROBE_DEFER;
|
||||
|
||||
gsw = devm_kzalloc(&pdev->dev, sizeof(struct rtk_gsw), GFP_KERNEL);
|
||||
|
||||
if (!gsw)
|
||||
return -ENOMEM;
|
||||
|
||||
gsw->dev = &pdev->dev;
|
||||
|
||||
gsw->bus = mdio_bus;
|
||||
|
||||
gsw->reset_pin = of_get_named_gpio(np, "mediatek,reset-pin", 0);
|
||||
|
||||
_gsw = gsw;
|
||||
|
||||
init_gsw();
|
||||
|
||||
//init default vlan or init swocnfig
|
||||
if(!of_property_read_string(pdev->dev.of_node,
|
||||
"mediatek,port_map", &pm)) {
|
||||
|
||||
if (!strcasecmp(pm, "wllll"))
|
||||
rtl8367s_vlan_config(1);
|
||||
else
|
||||
rtl8367s_vlan_config(0);
|
||||
|
||||
} else {
|
||||
#ifdef CONFIG_SWCONFIG
|
||||
rtl8367s_swconfig_init(&init_gsw);
|
||||
#else
|
||||
rtl8367s_vlan_config(0);
|
||||
#endif
|
||||
}
|
||||
|
||||
gsw_debug_proc_init();
|
||||
|
||||
platform_set_drvdata(pdev, gsw);
|
||||
|
||||
return 0;
|
||||
|
||||
}
|
||||
|
||||
static int rtk_gsw_remove(struct platform_device *pdev)
|
||||
{
|
||||
platform_set_drvdata(pdev, NULL);
|
||||
gsw_debug_proc_exit();
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
static struct platform_driver gsw_driver = {
|
||||
.probe = rtk_gsw_probe,
|
||||
.remove = rtk_gsw_remove,
|
||||
.driver = {
|
||||
.name = "rtk-gsw",
|
||||
.owner = THIS_MODULE,
|
||||
.of_match_table = rtk_gsw_match,
|
||||
},
|
||||
};
|
||||
|
||||
module_platform_driver(gsw_driver);
|
||||
|
||||
MODULE_LICENSE("GPL");
|
||||
MODULE_AUTHOR("Mark Lee <marklee0201@gmail.com>");
|
||||
MODULE_DESCRIPTION("rtl8367c switch driver for MT7622");
|
||||
|
||||
Loading…
Add table
Add a link
Reference in a new issue