mirror of
https://github.com/Ysurac/openmptcprouter.git
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Update kernel 6.12 patches
This commit is contained in:
parent
94a20cce9c
commit
4ca673613f
62 changed files with 7522 additions and 780 deletions
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@ -19,7 +19,7 @@ Signed-off-by: Jens Axboe <axboe@kernel.dk>
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--- a/block/blk.h
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+++ b/block/blk.h
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@@ -564,6 +564,7 @@ void blk_free_ext_minor(unsigned int min
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@@ -555,6 +555,7 @@ void blk_free_ext_minor(unsigned int min
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#define ADDPART_FLAG_NONE 0
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#define ADDPART_FLAG_RAID 1
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#define ADDPART_FLAG_WHOLEDISK 2
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@ -82,7 +82,7 @@ Signed-off-by: Jens Axboe <axboe@kernel.dk>
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static void blk_report_disk_dead(struct gendisk *disk, bool surprise)
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--- a/include/linux/blkdev.h
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+++ b/include/linux/blkdev.h
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@@ -735,6 +735,9 @@ static inline unsigned int blk_queue_dep
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@@ -733,6 +733,9 @@ static inline unsigned int blk_queue_dep
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#define for_each_bio(_bio) \
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for (; _bio; _bio = _bio->bi_next)
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@ -0,0 +1,33 @@
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From 854d71c555dfc3383c1fde7d9989b6046e21093d Mon Sep 17 00:00:00 2001
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From: Heiner Kallweit <hkallweit1@gmail.com>
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Date: Wed, 9 Oct 2024 07:48:05 +0200
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Subject: [PATCH] r8169: remove original workaround for RTL8125 broken rx issue
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Now that we have b9c7ac4fe22c ("r8169: disable ALDPS per default for
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RTL8125"), the first attempt to fix the issue shouldn't be needed
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any longer. So let's effectively revert 621735f59064 ("r8169: fix
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rare issue with broken rx after link-down on RTL8125") and see
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whether anybody complains.
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Signed-off-by: Heiner Kallweit <hkallweit1@gmail.com>
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Reviewed-by: Simon Horman <horms@kernel.org>
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Link: https://patch.msgid.link/382d8c88-cbce-400f-ad62-fda0181c7e38@gmail.com
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Signed-off-by: Jakub Kicinski <kuba@kernel.org>
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---
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drivers/net/ethernet/realtek/r8169_main.c | 4 ----
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1 file changed, 4 deletions(-)
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--- a/drivers/net/ethernet/realtek/r8169_main.c
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+++ b/drivers/net/ethernet/realtek/r8169_main.c
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@@ -4777,11 +4777,7 @@ static void r8169_phylink_handler(struct
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if (netif_carrier_ok(ndev)) {
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rtl_link_chg_patch(tp);
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pm_request_resume(d);
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- netif_wake_queue(tp->dev);
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} else {
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- /* In few cases rx is broken after link-down otherwise */
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- if (rtl_is_8125(tp))
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- rtl_schedule_task(tp, RTL_FLAG_TASK_RESET_NO_QUEUE_WAKE);
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pm_runtime_idle(d);
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}
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@ -0,0 +1,52 @@
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From b8bf38440ba94e8ed8e2ae55c5dfb0276d30e843 Mon Sep 17 00:00:00 2001
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From: Heiner Kallweit <hkallweit1@gmail.com>
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Date: Thu, 10 Oct 2024 12:58:02 +0200
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Subject: [PATCH] r8169: enable SG/TSO on selected chip versions per default
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Due to problem reports in the past SG and TSO/TSO6 are disabled per
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default. It's not fully clear which chip versions are affected, so we
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may impact also users of unaffected chip versions, unless they know
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how to use ethtool for enabling SG/TSO/TSO6.
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Vendor drivers r8168/r8125 enable SG/TSO/TSO6 for selected chip
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versions per default, I'd interpret this as confirmation that these
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chip versions are unaffected. So let's do the same here.
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Signed-off-by: Heiner Kallweit <hkallweit1@gmail.com>
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Reviewed-by: Simon Horman <horms@kernel.org>
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Signed-off-by: David S. Miller <davem@davemloft.net>
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---
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drivers/net/ethernet/realtek/r8169_main.c | 16 +++++++++++-----
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1 file changed, 11 insertions(+), 5 deletions(-)
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--- a/drivers/net/ethernet/realtek/r8169_main.c
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+++ b/drivers/net/ethernet/realtek/r8169_main.c
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@@ -5489,11 +5489,6 @@ static int rtl_init_one(struct pci_dev *
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dev->features |= dev->hw_features;
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- /* There has been a number of reports that using SG/TSO results in
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- * tx timeouts. However for a lot of people SG/TSO works fine.
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- * Therefore disable both features by default, but allow users to
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- * enable them. Use at own risk!
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- */
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if (rtl_chip_supports_csum_v2(tp)) {
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dev->hw_features |= NETIF_F_SG | NETIF_F_TSO | NETIF_F_TSO6;
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netif_set_tso_max_size(dev, RTL_GSO_MAX_SIZE_V2);
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@@ -5504,6 +5499,17 @@ static int rtl_init_one(struct pci_dev *
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netif_set_tso_max_segs(dev, RTL_GSO_MAX_SEGS_V1);
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}
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+ /* There has been a number of reports that using SG/TSO results in
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+ * tx timeouts. However for a lot of people SG/TSO works fine.
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+ * It's not fully clear which chip versions are affected. Vendor
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+ * drivers enable SG/TSO for certain chip versions per default,
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+ * let's mimic this here. On other chip versions users can
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+ * use ethtool to enable SG/TSO, use at own risk!
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+ */
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+ if (tp->mac_version >= RTL_GIGA_MAC_VER_46 &&
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+ tp->mac_version != RTL_GIGA_MAC_VER_61)
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+ dev->features |= dev->hw_features;
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+
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dev->hw_features |= NETIF_F_RXALL;
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dev->hw_features |= NETIF_F_RXFCS;
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@ -0,0 +1,130 @@
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From e3fc5139bd8ffaa1498adc21be4e8ecbc6aed508 Mon Sep 17 00:00:00 2001
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From: Heiner Kallweit <hkallweit1@gmail.com>
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Date: Sun, 13 Oct 2024 11:17:39 +0200
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Subject: [PATCH] r8169: implement additional ethtool stats ops
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This adds support for ethtool standard statistics, and makes use of the
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extended hardware statistics being available from RTl8125.
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Signed-off-by: Heiner Kallweit <hkallweit1@gmail.com>
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Reviewed-by: Simon Horman <horms@kernel.org>
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Link: https://patch.msgid.link/58e0da73-a7dd-4be3-82ae-d5b3f9069bde@gmail.com
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Signed-off-by: Jakub Kicinski <kuba@kernel.org>
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---
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drivers/net/ethernet/realtek/r8169_main.c | 82 +++++++++++++++++++++++
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1 file changed, 82 insertions(+)
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--- a/drivers/net/ethernet/realtek/r8169_main.c
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+++ b/drivers/net/ethernet/realtek/r8169_main.c
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@@ -2160,6 +2160,19 @@ static void rtl8169_get_ringparam(struct
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data->tx_pending = NUM_TX_DESC;
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}
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+static void rtl8169_get_pause_stats(struct net_device *dev,
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+ struct ethtool_pause_stats *pause_stats)
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+{
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+ struct rtl8169_private *tp = netdev_priv(dev);
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+
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+ if (!rtl_is_8125(tp))
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+ return;
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+
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+ rtl8169_update_counters(tp);
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+ pause_stats->tx_pause_frames = le32_to_cpu(tp->counters->tx_pause_on);
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+ pause_stats->rx_pause_frames = le32_to_cpu(tp->counters->rx_pause_on);
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+}
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+
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static void rtl8169_get_pauseparam(struct net_device *dev,
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struct ethtool_pauseparam *data)
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{
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@@ -2186,6 +2199,69 @@ static int rtl8169_set_pauseparam(struct
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return 0;
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}
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+static void rtl8169_get_eth_mac_stats(struct net_device *dev,
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+ struct ethtool_eth_mac_stats *mac_stats)
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+{
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+ struct rtl8169_private *tp = netdev_priv(dev);
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+
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+ rtl8169_update_counters(tp);
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+
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+ mac_stats->FramesTransmittedOK =
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+ le64_to_cpu(tp->counters->tx_packets);
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+ mac_stats->SingleCollisionFrames =
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+ le32_to_cpu(tp->counters->tx_one_collision);
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+ mac_stats->MultipleCollisionFrames =
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+ le32_to_cpu(tp->counters->tx_multi_collision);
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+ mac_stats->FramesReceivedOK =
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+ le64_to_cpu(tp->counters->rx_packets);
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+ mac_stats->AlignmentErrors =
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+ le16_to_cpu(tp->counters->align_errors);
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+ mac_stats->FramesLostDueToIntMACXmitError =
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+ le64_to_cpu(tp->counters->tx_errors);
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+ mac_stats->BroadcastFramesReceivedOK =
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+ le64_to_cpu(tp->counters->rx_broadcast);
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+ mac_stats->MulticastFramesReceivedOK =
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+ le32_to_cpu(tp->counters->rx_multicast);
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+
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+ if (!rtl_is_8125(tp))
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+ return;
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+
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+ mac_stats->AlignmentErrors =
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+ le32_to_cpu(tp->counters->align_errors32);
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+ mac_stats->OctetsTransmittedOK =
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+ le64_to_cpu(tp->counters->tx_octets);
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+ mac_stats->LateCollisions =
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+ le32_to_cpu(tp->counters->tx_late_collision);
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+ mac_stats->FramesAbortedDueToXSColls =
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+ le32_to_cpu(tp->counters->tx_aborted32);
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+ mac_stats->OctetsReceivedOK =
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+ le64_to_cpu(tp->counters->rx_octets);
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+ mac_stats->FramesLostDueToIntMACRcvError =
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+ le32_to_cpu(tp->counters->rx_mac_error);
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+ mac_stats->MulticastFramesXmittedOK =
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+ le64_to_cpu(tp->counters->tx_multicast64);
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+ mac_stats->BroadcastFramesXmittedOK =
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+ le64_to_cpu(tp->counters->tx_broadcast64);
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+ mac_stats->MulticastFramesReceivedOK =
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+ le64_to_cpu(tp->counters->rx_multicast64);
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+ mac_stats->FrameTooLongErrors =
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+ le32_to_cpu(tp->counters->rx_frame_too_long);
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+}
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+
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+static void rtl8169_get_eth_ctrl_stats(struct net_device *dev,
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+ struct ethtool_eth_ctrl_stats *ctrl_stats)
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+{
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+ struct rtl8169_private *tp = netdev_priv(dev);
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+
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+ if (!rtl_is_8125(tp))
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+ return;
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+
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+ rtl8169_update_counters(tp);
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+
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+ ctrl_stats->UnsupportedOpcodesReceived =
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+ le32_to_cpu(tp->counters->rx_unknown_opcode);
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+}
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+
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static const struct ethtool_ops rtl8169_ethtool_ops = {
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.supported_coalesce_params = ETHTOOL_COALESCE_USECS |
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ETHTOOL_COALESCE_MAX_FRAMES,
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@@ -2207,8 +2283,11 @@ static const struct ethtool_ops rtl8169_
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.get_link_ksettings = phy_ethtool_get_link_ksettings,
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.set_link_ksettings = phy_ethtool_set_link_ksettings,
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.get_ringparam = rtl8169_get_ringparam,
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+ .get_pause_stats = rtl8169_get_pause_stats,
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.get_pauseparam = rtl8169_get_pauseparam,
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.set_pauseparam = rtl8169_set_pauseparam,
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+ .get_eth_mac_stats = rtl8169_get_eth_mac_stats,
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+ .get_eth_ctrl_stats = rtl8169_get_eth_ctrl_stats,
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};
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static enum mac_version rtl8169_get_mac_version(u16 xid, bool gmii)
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@@ -3893,6 +3972,9 @@ static void rtl_hw_start_8125(struct rtl
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break;
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}
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+ /* enable extended tally counter */
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+ r8168_mac_ocp_modify(tp, 0xea84, 0, BIT(1) | BIT(0));
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+
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rtl_hw_config(tp);
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}
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@ -0,0 +1,50 @@
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From ac48430368c1a4f4e6c2fa92243b4b93fd25bee4 Mon Sep 17 00:00:00 2001
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From: Heiner Kallweit <hkallweit1@gmail.com>
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Date: Wed, 16 Oct 2024 22:05:57 +0200
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Subject: [PATCH] r8169: don't take RTNL lock in rtl_task()
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There's not really a benefit here in taking the RTNL lock. The task
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handler does exception handling only, so we're in trouble anyway when
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we come here, and there's no need to protect against e.g. a parallel
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ethtool call.
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A benefit of removing the RTNL lock here is that we now can
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synchronously cancel the workqueue from a context holding the RTNL mutex.
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Signed-off-by: Heiner Kallweit <hkallweit1@gmail.com>
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Signed-off-by: Andrew Lunn <andrew@lunn.ch>
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---
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drivers/net/ethernet/realtek/r8169_main.c | 8 ++------
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1 file changed, 2 insertions(+), 6 deletions(-)
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--- a/drivers/net/ethernet/realtek/r8169_main.c
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+++ b/drivers/net/ethernet/realtek/r8169_main.c
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@@ -4800,10 +4800,8 @@ static void rtl_task(struct work_struct
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container_of(work, struct rtl8169_private, wk.work);
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int ret;
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- rtnl_lock();
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-
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if (!test_bit(RTL_FLAG_TASK_ENABLED, tp->wk.flags))
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- goto out_unlock;
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+ return;
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if (test_and_clear_bit(RTL_FLAG_TASK_TX_TIMEOUT, tp->wk.flags)) {
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/* if chip isn't accessible, reset bus to revive it */
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@@ -4812,7 +4810,7 @@ static void rtl_task(struct work_struct
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if (ret < 0) {
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netdev_err(tp->dev, "Can't reset secondary PCI bus, detach NIC\n");
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netif_device_detach(tp->dev);
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- goto out_unlock;
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+ return;
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}
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}
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@@ -4831,8 +4829,6 @@ reset:
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} else if (test_and_clear_bit(RTL_FLAG_TASK_RESET_NO_QUEUE_WAKE, tp->wk.flags)) {
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rtl_reset_work(tp);
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}
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-out_unlock:
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- rtnl_unlock();
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}
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static int rtl8169_poll(struct napi_struct *napi, int budget)
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@ -0,0 +1,41 @@
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From 1c105bacb160b5918e917ab811552b7be69fc69c Mon Sep 17 00:00:00 2001
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From: Heiner Kallweit <hkallweit1@gmail.com>
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Date: Wed, 16 Oct 2024 22:29:39 +0200
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Subject: [PATCH] r8169: avoid duplicated messages if loading firmware fails
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and switch to warn level
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In case of a problem with firmware loading we inform at the driver level,
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in addition the firmware load code itself issues warnings. Therefore
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switch to firmware_request_nowarn() to avoid duplicated error messages.
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In addition switch to warn level because the firmware is optional and
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typically just fixes compatibility issues.
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Signed-off-by: Heiner Kallweit <hkallweit1@gmail.com>
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Reviewed-by: Simon Horman <horms@kernel.org>
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Message-ID: <d9c5094c-89a6-40e2-b5fe-8df7df4624ef@gmail.com>
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Signed-off-by: Andrew Lunn <andrew@lunn.ch>
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---
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drivers/net/ethernet/realtek/r8169_firmware.c | 6 +++---
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1 file changed, 3 insertions(+), 3 deletions(-)
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--- a/drivers/net/ethernet/realtek/r8169_firmware.c
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+++ b/drivers/net/ethernet/realtek/r8169_firmware.c
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@@ -215,7 +215,7 @@ int rtl_fw_request_firmware(struct rtl_f
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{
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int rc;
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- rc = request_firmware(&rtl_fw->fw, rtl_fw->fw_name, rtl_fw->dev);
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+ rc = firmware_request_nowarn(&rtl_fw->fw, rtl_fw->fw_name, rtl_fw->dev);
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if (rc < 0)
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goto out;
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@@ -227,7 +227,7 @@ int rtl_fw_request_firmware(struct rtl_f
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return 0;
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out:
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- dev_err(rtl_fw->dev, "Unable to load firmware %s (%d)\n",
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- rtl_fw->fw_name, rc);
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+ dev_warn(rtl_fw->dev, "Unable to load firmware %s (%d)\n",
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+ rtl_fw->fw_name, rc);
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return rc;
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}
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@ -0,0 +1,82 @@
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From d64113c6bb5ea5a70b7c9c3a6bcadef307638187 Mon Sep 17 00:00:00 2001
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From: Heiner Kallweit <hkallweit1@gmail.com>
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Date: Wed, 16 Oct 2024 22:31:10 +0200
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Subject: [PATCH] r8169: remove rtl_dash_loop_wait_high/low
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Remove rtl_dash_loop_wait_high/low to simplify the code.
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Signed-off-by: Heiner Kallweit <hkallweit1@gmail.com>
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Reviewed-by: Simon Horman <horms@kernel.org>
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Message-ID: <fb8c490c-2d92-48f5-8bbf-1fc1f2ee1649@gmail.com>
|
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Signed-off-by: Andrew Lunn <andrew@lunn.ch>
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---
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drivers/net/ethernet/realtek/r8169_main.c | 35 ++++++-----------------
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1 file changed, 8 insertions(+), 27 deletions(-)
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--- a/drivers/net/ethernet/realtek/r8169_main.c
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+++ b/drivers/net/ethernet/realtek/r8169_main.c
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@@ -1346,40 +1346,19 @@ static void rtl8168ep_stop_cmac(struct r
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RTL_W8(tp, IBCR0, RTL_R8(tp, IBCR0) & ~0x01);
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}
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-static void rtl_dash_loop_wait(struct rtl8169_private *tp,
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- const struct rtl_cond *c,
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- unsigned long usecs, int n, bool high)
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-{
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- if (!tp->dash_enabled)
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- return;
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- rtl_loop_wait(tp, c, usecs, n, high);
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-}
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-
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-static void rtl_dash_loop_wait_high(struct rtl8169_private *tp,
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- const struct rtl_cond *c,
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- unsigned long d, int n)
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-{
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- rtl_dash_loop_wait(tp, c, d, n, true);
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-}
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-
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||||
-static void rtl_dash_loop_wait_low(struct rtl8169_private *tp,
|
||||
- const struct rtl_cond *c,
|
||||
- unsigned long d, int n)
|
||||
-{
|
||||
- rtl_dash_loop_wait(tp, c, d, n, false);
|
||||
-}
|
||||
-
|
||||
static void rtl8168dp_driver_start(struct rtl8169_private *tp)
|
||||
{
|
||||
r8168dp_oob_notify(tp, OOB_CMD_DRIVER_START);
|
||||
- rtl_dash_loop_wait_high(tp, &rtl_dp_ocp_read_cond, 10000, 10);
|
||||
+ if (tp->dash_enabled)
|
||||
+ rtl_loop_wait_high(tp, &rtl_dp_ocp_read_cond, 10000, 10);
|
||||
}
|
||||
|
||||
static void rtl8168ep_driver_start(struct rtl8169_private *tp)
|
||||
{
|
||||
r8168ep_ocp_write(tp, 0x01, 0x180, OOB_CMD_DRIVER_START);
|
||||
r8168ep_ocp_write(tp, 0x01, 0x30, r8168ep_ocp_read(tp, 0x30) | 0x01);
|
||||
- rtl_dash_loop_wait_high(tp, &rtl_ep_ocp_read_cond, 10000, 30);
|
||||
+ if (tp->dash_enabled)
|
||||
+ rtl_loop_wait_high(tp, &rtl_ep_ocp_read_cond, 10000, 30);
|
||||
}
|
||||
|
||||
static void rtl8168_driver_start(struct rtl8169_private *tp)
|
||||
@@ -1393,7 +1372,8 @@ static void rtl8168_driver_start(struct
|
||||
static void rtl8168dp_driver_stop(struct rtl8169_private *tp)
|
||||
{
|
||||
r8168dp_oob_notify(tp, OOB_CMD_DRIVER_STOP);
|
||||
- rtl_dash_loop_wait_low(tp, &rtl_dp_ocp_read_cond, 10000, 10);
|
||||
+ if (tp->dash_enabled)
|
||||
+ rtl_loop_wait_low(tp, &rtl_dp_ocp_read_cond, 10000, 10);
|
||||
}
|
||||
|
||||
static void rtl8168ep_driver_stop(struct rtl8169_private *tp)
|
||||
@@ -1401,7 +1381,8 @@ static void rtl8168ep_driver_stop(struct
|
||||
rtl8168ep_stop_cmac(tp);
|
||||
r8168ep_ocp_write(tp, 0x01, 0x180, OOB_CMD_DRIVER_STOP);
|
||||
r8168ep_ocp_write(tp, 0x01, 0x30, r8168ep_ocp_read(tp, 0x30) | 0x01);
|
||||
- rtl_dash_loop_wait_low(tp, &rtl_ep_ocp_read_cond, 10000, 10);
|
||||
+ if (tp->dash_enabled)
|
||||
+ rtl_loop_wait_low(tp, &rtl_ep_ocp_read_cond, 10000, 10);
|
||||
}
|
||||
|
||||
static void rtl8168_driver_stop(struct rtl8169_private *tp)
|
|
@ -0,0 +1,28 @@
|
|||
From c4e64095c00cb2de413cd6b90be047c273bcd491 Mon Sep 17 00:00:00 2001
|
||||
From: Heiner Kallweit <hkallweit1@gmail.com>
|
||||
Date: Thu, 17 Oct 2024 22:27:44 +0200
|
||||
Subject: [PATCH] r8169: enable EEE at 2.5G per default on RTL8125B
|
||||
|
||||
Register a6d/12 is shadowing register MDIO_AN_EEE_ADV2. So this line
|
||||
disables advertisement of EEE at 2.5G. Latest vendor driver r8125
|
||||
doesn't do this (any longer?), so this mode seems to be safe.
|
||||
EEE saves quite some energy, therefore enable this mode per default.
|
||||
|
||||
Signed-off-by: Heiner Kallweit <hkallweit1@gmail.com>
|
||||
Reviewed-by: Simon Horman <horms@kernel.org>
|
||||
Message-ID: <95dd5a0c-09ea-4847-94d9-b7aa3063e8ff@gmail.com>
|
||||
Signed-off-by: Andrew Lunn <andrew@lunn.ch>
|
||||
---
|
||||
drivers/net/ethernet/realtek/r8169_phy_config.c | 1 -
|
||||
1 file changed, 1 deletion(-)
|
||||
|
||||
--- a/drivers/net/ethernet/realtek/r8169_phy_config.c
|
||||
+++ b/drivers/net/ethernet/realtek/r8169_phy_config.c
|
||||
@@ -99,7 +99,6 @@ static void rtl8125a_config_eee_phy(stru
|
||||
|
||||
static void rtl8125b_config_eee_phy(struct phy_device *phydev)
|
||||
{
|
||||
- phy_modify_paged(phydev, 0xa6d, 0x12, 0x0001, 0x0000);
|
||||
phy_modify_paged(phydev, 0xa6d, 0x14, 0x0010, 0x0000);
|
||||
phy_modify_paged(phydev, 0xa42, 0x14, 0x0080, 0x0000);
|
||||
phy_modify_paged(phydev, 0xa4a, 0x11, 0x0200, 0x0000);
|
|
@ -0,0 +1,143 @@
|
|||
From f75d1fbe7809bc5ed134204b920fd9e2fc5db1df Mon Sep 17 00:00:00 2001
|
||||
From: Heiner Kallweit <hkallweit1@gmail.com>
|
||||
Date: Thu, 24 Oct 2024 22:42:33 +0200
|
||||
Subject: [PATCH] r8169: add support for RTL8125D
|
||||
|
||||
This adds support for new chip version RTL8125D, which can be found on
|
||||
boards like Gigabyte X870E AORUS ELITE WIFI7. Firmware rtl8125d-1.fw
|
||||
for this chip version is available in linux-firmware already.
|
||||
|
||||
Signed-off-by: Heiner Kallweit <hkallweit1@gmail.com>
|
||||
Reviewed-by: Simon Horman <horms@kernel.org>
|
||||
Link: https://patch.msgid.link/d0306912-e88e-4c25-8b5d-545ae8834c0c@gmail.com
|
||||
Signed-off-by: Jakub Kicinski <kuba@kernel.org>
|
||||
---
|
||||
drivers/net/ethernet/realtek/r8169.h | 1 +
|
||||
drivers/net/ethernet/realtek/r8169_main.c | 23 +++++++++++++------
|
||||
.../net/ethernet/realtek/r8169_phy_config.c | 10 ++++++++
|
||||
3 files changed, 27 insertions(+), 7 deletions(-)
|
||||
|
||||
--- a/drivers/net/ethernet/realtek/r8169.h
|
||||
+++ b/drivers/net/ethernet/realtek/r8169.h
|
||||
@@ -68,6 +68,7 @@ enum mac_version {
|
||||
/* support for RTL_GIGA_MAC_VER_60 has been removed */
|
||||
RTL_GIGA_MAC_VER_61,
|
||||
RTL_GIGA_MAC_VER_63,
|
||||
+ RTL_GIGA_MAC_VER_64,
|
||||
RTL_GIGA_MAC_VER_65,
|
||||
RTL_GIGA_MAC_VER_66,
|
||||
RTL_GIGA_MAC_NONE
|
||||
--- a/drivers/net/ethernet/realtek/r8169_main.c
|
||||
+++ b/drivers/net/ethernet/realtek/r8169_main.c
|
||||
@@ -55,6 +55,7 @@
|
||||
#define FIRMWARE_8107E_2 "rtl_nic/rtl8107e-2.fw"
|
||||
#define FIRMWARE_8125A_3 "rtl_nic/rtl8125a-3.fw"
|
||||
#define FIRMWARE_8125B_2 "rtl_nic/rtl8125b-2.fw"
|
||||
+#define FIRMWARE_8125D_1 "rtl_nic/rtl8125d-1.fw"
|
||||
#define FIRMWARE_8126A_2 "rtl_nic/rtl8126a-2.fw"
|
||||
#define FIRMWARE_8126A_3 "rtl_nic/rtl8126a-3.fw"
|
||||
|
||||
@@ -138,6 +139,7 @@ static const struct {
|
||||
[RTL_GIGA_MAC_VER_61] = {"RTL8125A", FIRMWARE_8125A_3},
|
||||
/* reserve 62 for CFG_METHOD_4 in the vendor driver */
|
||||
[RTL_GIGA_MAC_VER_63] = {"RTL8125B", FIRMWARE_8125B_2},
|
||||
+ [RTL_GIGA_MAC_VER_64] = {"RTL8125D", FIRMWARE_8125D_1},
|
||||
[RTL_GIGA_MAC_VER_65] = {"RTL8126A", FIRMWARE_8126A_2},
|
||||
[RTL_GIGA_MAC_VER_66] = {"RTL8126A", FIRMWARE_8126A_3},
|
||||
};
|
||||
@@ -707,6 +709,7 @@ MODULE_FIRMWARE(FIRMWARE_8168FP_3);
|
||||
MODULE_FIRMWARE(FIRMWARE_8107E_2);
|
||||
MODULE_FIRMWARE(FIRMWARE_8125A_3);
|
||||
MODULE_FIRMWARE(FIRMWARE_8125B_2);
|
||||
+MODULE_FIRMWARE(FIRMWARE_8125D_1);
|
||||
MODULE_FIRMWARE(FIRMWARE_8126A_2);
|
||||
MODULE_FIRMWARE(FIRMWARE_8126A_3);
|
||||
|
||||
@@ -2079,10 +2082,7 @@ static void rtl_set_eee_txidle_timer(str
|
||||
tp->tx_lpi_timer = timer_val;
|
||||
r8168_mac_ocp_write(tp, 0xe048, timer_val);
|
||||
break;
|
||||
- case RTL_GIGA_MAC_VER_61:
|
||||
- case RTL_GIGA_MAC_VER_63:
|
||||
- case RTL_GIGA_MAC_VER_65:
|
||||
- case RTL_GIGA_MAC_VER_66:
|
||||
+ case RTL_GIGA_MAC_VER_61 ... RTL_GIGA_MAC_VER_66:
|
||||
tp->tx_lpi_timer = timer_val;
|
||||
RTL_W16(tp, EEE_TXIDLE_TIMER_8125, timer_val);
|
||||
break;
|
||||
@@ -2293,6 +2293,9 @@ static enum mac_version rtl8169_get_mac_
|
||||
{ 0x7cf, 0x64a, RTL_GIGA_MAC_VER_66 },
|
||||
{ 0x7cf, 0x649, RTL_GIGA_MAC_VER_65 },
|
||||
|
||||
+ /* 8125D family. */
|
||||
+ { 0x7cf, 0x688, RTL_GIGA_MAC_VER_64 },
|
||||
+
|
||||
/* 8125B family. */
|
||||
{ 0x7cf, 0x641, RTL_GIGA_MAC_VER_63 },
|
||||
|
||||
@@ -2560,9 +2563,7 @@ static void rtl_init_rxcfg(struct rtl816
|
||||
case RTL_GIGA_MAC_VER_61:
|
||||
RTL_W32(tp, RxConfig, RX_FETCH_DFLT_8125 | RX_DMA_BURST);
|
||||
break;
|
||||
- case RTL_GIGA_MAC_VER_63:
|
||||
- case RTL_GIGA_MAC_VER_65:
|
||||
- case RTL_GIGA_MAC_VER_66:
|
||||
+ case RTL_GIGA_MAC_VER_63 ... RTL_GIGA_MAC_VER_66:
|
||||
RTL_W32(tp, RxConfig, RX_FETCH_DFLT_8125 | RX_DMA_BURST |
|
||||
RX_PAUSE_SLOT_ON);
|
||||
break;
|
||||
@@ -3874,6 +3875,12 @@ static void rtl_hw_start_8125b(struct rt
|
||||
rtl_hw_start_8125_common(tp);
|
||||
}
|
||||
|
||||
+static void rtl_hw_start_8125d(struct rtl8169_private *tp)
|
||||
+{
|
||||
+ rtl_set_def_aspm_entry_latency(tp);
|
||||
+ rtl_hw_start_8125_common(tp);
|
||||
+}
|
||||
+
|
||||
static void rtl_hw_start_8126a(struct rtl8169_private *tp)
|
||||
{
|
||||
rtl_set_def_aspm_entry_latency(tp);
|
||||
@@ -3922,6 +3929,7 @@ static void rtl_hw_config(struct rtl8169
|
||||
[RTL_GIGA_MAC_VER_53] = rtl_hw_start_8117,
|
||||
[RTL_GIGA_MAC_VER_61] = rtl_hw_start_8125a_2,
|
||||
[RTL_GIGA_MAC_VER_63] = rtl_hw_start_8125b,
|
||||
+ [RTL_GIGA_MAC_VER_64] = rtl_hw_start_8125d,
|
||||
[RTL_GIGA_MAC_VER_65] = rtl_hw_start_8126a,
|
||||
[RTL_GIGA_MAC_VER_66] = rtl_hw_start_8126a,
|
||||
};
|
||||
@@ -3939,6 +3947,7 @@ static void rtl_hw_start_8125(struct rtl
|
||||
/* disable interrupt coalescing */
|
||||
switch (tp->mac_version) {
|
||||
case RTL_GIGA_MAC_VER_61:
|
||||
+ case RTL_GIGA_MAC_VER_64:
|
||||
for (i = 0xa00; i < 0xb00; i += 4)
|
||||
RTL_W32(tp, i, 0);
|
||||
break;
|
||||
--- a/drivers/net/ethernet/realtek/r8169_phy_config.c
|
||||
+++ b/drivers/net/ethernet/realtek/r8169_phy_config.c
|
||||
@@ -1103,6 +1103,15 @@ static void rtl8125b_hw_phy_config(struc
|
||||
rtl8125b_config_eee_phy(phydev);
|
||||
}
|
||||
|
||||
+static void rtl8125d_hw_phy_config(struct rtl8169_private *tp,
|
||||
+ struct phy_device *phydev)
|
||||
+{
|
||||
+ r8169_apply_firmware(tp);
|
||||
+ rtl8125_legacy_force_mode(phydev);
|
||||
+ rtl8168g_disable_aldps(phydev);
|
||||
+ rtl8125b_config_eee_phy(phydev);
|
||||
+}
|
||||
+
|
||||
static void rtl8126a_hw_phy_config(struct rtl8169_private *tp,
|
||||
struct phy_device *phydev)
|
||||
{
|
||||
@@ -1159,6 +1168,7 @@ void r8169_hw_phy_config(struct rtl8169_
|
||||
[RTL_GIGA_MAC_VER_53] = rtl8117_hw_phy_config,
|
||||
[RTL_GIGA_MAC_VER_61] = rtl8125a_2_hw_phy_config,
|
||||
[RTL_GIGA_MAC_VER_63] = rtl8125b_hw_phy_config,
|
||||
+ [RTL_GIGA_MAC_VER_64] = rtl8125d_hw_phy_config,
|
||||
[RTL_GIGA_MAC_VER_65] = rtl8126a_hw_phy_config,
|
||||
[RTL_GIGA_MAC_VER_66] = rtl8126a_hw_phy_config,
|
||||
};
|
|
@ -0,0 +1,30 @@
|
|||
From b8bd8c44a266c9a7dcb907eab10fbb119e3f6494 Mon Sep 17 00:00:00 2001
|
||||
From: Heiner Kallweit <hkallweit1@gmail.com>
|
||||
Date: Thu, 24 Oct 2024 22:48:59 +0200
|
||||
Subject: [PATCH] r8169: fix inconsistent indenting in
|
||||
rtl8169_get_eth_mac_stats
|
||||
|
||||
This fixes an inconsistent indenting introduced with e3fc5139bd8f
|
||||
("r8169: implement additional ethtool stats ops").
|
||||
|
||||
Reported-by: kernel test robot <lkp@intel.com>
|
||||
Closes: https://lore.kernel.org/oe-kbuild-all/202410220413.1gAxIJ4t-lkp@intel.com/
|
||||
Signed-off-by: Heiner Kallweit <hkallweit1@gmail.com>
|
||||
Reviewed-by: Simon Horman <horms@kernel.org>
|
||||
Link: https://patch.msgid.link/20fd6f39-3c1b-4af0-9adc-7d1f49728fad@gmail.com
|
||||
Signed-off-by: Jakub Kicinski <kuba@kernel.org>
|
||||
---
|
||||
drivers/net/ethernet/realtek/r8169_main.c | 2 +-
|
||||
1 file changed, 1 insertion(+), 1 deletion(-)
|
||||
|
||||
--- a/drivers/net/ethernet/realtek/r8169_main.c
|
||||
+++ b/drivers/net/ethernet/realtek/r8169_main.c
|
||||
@@ -2225,7 +2225,7 @@ static void rtl8169_get_eth_mac_stats(st
|
||||
le64_to_cpu(tp->counters->tx_broadcast64);
|
||||
mac_stats->MulticastFramesReceivedOK =
|
||||
le64_to_cpu(tp->counters->rx_multicast64);
|
||||
- mac_stats->FrameTooLongErrors =
|
||||
+ mac_stats->FrameTooLongErrors =
|
||||
le32_to_cpu(tp->counters->rx_frame_too_long);
|
||||
}
|
||||
|
|
@ -0,0 +1,49 @@
|
|||
From eb90f876b7961d702d7fc549e14614860f531e60 Mon Sep 17 00:00:00 2001
|
||||
From: Heiner Kallweit <hkallweit1@gmail.com>
|
||||
Date: Thu, 31 Oct 2024 22:42:52 +0100
|
||||
Subject: [PATCH] r8169: align RTL8125 EEE config with vendor driver
|
||||
|
||||
Align the EEE config for RTL8125A/RTL8125B with vendor driver r8125.
|
||||
This should help to avoid compatibility issues.
|
||||
|
||||
Signed-off-by: Heiner Kallweit <hkallweit1@gmail.com>
|
||||
Link: https://patch.msgid.link/044c925e-8669-4b98-87df-95b4056f4f5f@gmail.com
|
||||
Signed-off-by: Jakub Kicinski <kuba@kernel.org>
|
||||
---
|
||||
.../net/ethernet/realtek/r8169_phy_config.c | 18 ++++++++++++------
|
||||
1 file changed, 12 insertions(+), 6 deletions(-)
|
||||
|
||||
--- a/drivers/net/ethernet/realtek/r8169_phy_config.c
|
||||
+++ b/drivers/net/ethernet/realtek/r8169_phy_config.c
|
||||
@@ -89,19 +89,25 @@ static void rtl8168h_config_eee_phy(stru
|
||||
phy_modify_paged(phydev, 0xa42, 0x14, 0x0000, 0x0080);
|
||||
}
|
||||
|
||||
-static void rtl8125a_config_eee_phy(struct phy_device *phydev)
|
||||
+static void rtl8125_common_config_eee_phy(struct phy_device *phydev)
|
||||
{
|
||||
- rtl8168h_config_eee_phy(phydev);
|
||||
+ phy_modify_paged(phydev, 0xa6d, 0x14, 0x0010, 0x0000);
|
||||
+ phy_modify_paged(phydev, 0xa42, 0x14, 0x0080, 0x0000);
|
||||
+ phy_modify_paged(phydev, 0xa4a, 0x11, 0x0200, 0x0000);
|
||||
+}
|
||||
|
||||
+static void rtl8125a_config_eee_phy(struct phy_device *phydev)
|
||||
+{
|
||||
+ rtl8168g_config_eee_phy(phydev);
|
||||
+ /* disable EEE at 2.5Gbps */
|
||||
phy_modify_paged(phydev, 0xa6d, 0x12, 0x0001, 0x0000);
|
||||
- phy_modify_paged(phydev, 0xa6d, 0x14, 0x0010, 0x0000);
|
||||
+ rtl8125_common_config_eee_phy(phydev);
|
||||
}
|
||||
|
||||
static void rtl8125b_config_eee_phy(struct phy_device *phydev)
|
||||
{
|
||||
- phy_modify_paged(phydev, 0xa6d, 0x14, 0x0010, 0x0000);
|
||||
- phy_modify_paged(phydev, 0xa42, 0x14, 0x0080, 0x0000);
|
||||
- phy_modify_paged(phydev, 0xa4a, 0x11, 0x0200, 0x0000);
|
||||
+ rtl8168g_config_eee_phy(phydev);
|
||||
+ rtl8125_common_config_eee_phy(phydev);
|
||||
}
|
||||
|
||||
static void rtl8169s_hw_phy_config(struct rtl8169_private *tp,
|
|
@ -0,0 +1,46 @@
|
|||
From 4af2f60bf7378bd5c92b15a528d8c6c7d02bed6c Mon Sep 17 00:00:00 2001
|
||||
From: Heiner Kallweit <hkallweit1@gmail.com>
|
||||
Date: Thu, 31 Oct 2024 22:43:45 +0100
|
||||
Subject: [PATCH] r8169: align RTL8125/RTL8126 PHY config with vendor driver
|
||||
|
||||
This aligns some parameters with vendor driver r8125/r8126 to avoid
|
||||
compatibility issues. Note that for RTL8125B there's no functional
|
||||
change, just the open-coded version of the function is replaced.
|
||||
|
||||
Signed-off-by: Heiner Kallweit <hkallweit1@gmail.com>
|
||||
Link: https://patch.msgid.link/a8a9d896-fbe6-41f2-bf87-666567d3cdb3@gmail.com
|
||||
Signed-off-by: Jakub Kicinski <kuba@kernel.org>
|
||||
---
|
||||
drivers/net/ethernet/realtek/r8169_phy_config.c | 6 +++++-
|
||||
1 file changed, 5 insertions(+), 1 deletion(-)
|
||||
|
||||
--- a/drivers/net/ethernet/realtek/r8169_phy_config.c
|
||||
+++ b/drivers/net/ethernet/realtek/r8169_phy_config.c
|
||||
@@ -1073,8 +1073,8 @@ static void rtl8125b_hw_phy_config(struc
|
||||
struct phy_device *phydev)
|
||||
{
|
||||
r8169_apply_firmware(tp);
|
||||
+ rtl8168g_enable_gphy_10m(phydev);
|
||||
|
||||
- phy_modify_paged(phydev, 0xa44, 0x11, 0x0000, 0x0800);
|
||||
phy_modify_paged(phydev, 0xac4, 0x13, 0x00f0, 0x0090);
|
||||
phy_modify_paged(phydev, 0xad3, 0x10, 0x0003, 0x0001);
|
||||
|
||||
@@ -1113,6 +1113,7 @@ static void rtl8125d_hw_phy_config(struc
|
||||
struct phy_device *phydev)
|
||||
{
|
||||
r8169_apply_firmware(tp);
|
||||
+ rtl8168g_enable_gphy_10m(phydev);
|
||||
rtl8125_legacy_force_mode(phydev);
|
||||
rtl8168g_disable_aldps(phydev);
|
||||
rtl8125b_config_eee_phy(phydev);
|
||||
@@ -1122,6 +1123,9 @@ static void rtl8126a_hw_phy_config(struc
|
||||
struct phy_device *phydev)
|
||||
{
|
||||
r8169_apply_firmware(tp);
|
||||
+ rtl8168g_enable_gphy_10m(phydev);
|
||||
+ rtl8125_legacy_force_mode(phydev);
|
||||
+ rtl8168g_disable_aldps(phydev);
|
||||
}
|
||||
|
||||
void r8169_hw_phy_config(struct rtl8169_private *tp, struct phy_device *phydev,
|
|
@ -0,0 +1,25 @@
|
|||
From a3d8520e6a19ab018da6c7fc22512c913697a829 Mon Sep 17 00:00:00 2001
|
||||
From: Heiner Kallweit <hkallweit1@gmail.com>
|
||||
Date: Thu, 31 Oct 2024 22:44:36 +0100
|
||||
Subject: [PATCH] r8169: align RTL8126 EEE config with vendor driver
|
||||
|
||||
Align the EEE config for RTL8126A with vendor driver r8126 to avoid
|
||||
compatibility issues.
|
||||
|
||||
Signed-off-by: Heiner Kallweit <hkallweit1@gmail.com>
|
||||
Link: https://patch.msgid.link/71e4859e-4cd0-4b6b-b7fa-621d7721992f@gmail.com
|
||||
Signed-off-by: Jakub Kicinski <kuba@kernel.org>
|
||||
---
|
||||
drivers/net/ethernet/realtek/r8169_phy_config.c | 1 +
|
||||
1 file changed, 1 insertion(+)
|
||||
|
||||
--- a/drivers/net/ethernet/realtek/r8169_phy_config.c
|
||||
+++ b/drivers/net/ethernet/realtek/r8169_phy_config.c
|
||||
@@ -1126,6 +1126,7 @@ static void rtl8126a_hw_phy_config(struc
|
||||
rtl8168g_enable_gphy_10m(phydev);
|
||||
rtl8125_legacy_force_mode(phydev);
|
||||
rtl8168g_disable_aldps(phydev);
|
||||
+ rtl8125_common_config_eee_phy(phydev);
|
||||
}
|
||||
|
||||
void r8169_hw_phy_config(struct rtl8169_private *tp, struct phy_device *phydev,
|
|
@ -0,0 +1,38 @@
|
|||
From 2cd02f2fdd8a92e5b6b85ff64eab0fc549b30c07 Mon Sep 17 00:00:00 2001
|
||||
From: Heiner Kallweit <hkallweit1@gmail.com>
|
||||
Date: Sat, 2 Nov 2024 14:49:01 +0100
|
||||
Subject: [PATCH] r8169: improve initialization of RSS registers on
|
||||
RTL8125/RTL8126
|
||||
|
||||
Replace the register addresses with the names used in r8125/r8126
|
||||
vendor driver, and consider that RSS_CTRL_8125 is a 32 bit register.
|
||||
|
||||
Signed-off-by: Heiner Kallweit <hkallweit1@gmail.com>
|
||||
Link: https://patch.msgid.link/3bf2f340-b369-4174-97bf-fd38d4217492@gmail.com
|
||||
Signed-off-by: Jakub Kicinski <kuba@kernel.org>
|
||||
---
|
||||
drivers/net/ethernet/realtek/r8169_main.c | 6 ++++--
|
||||
1 file changed, 4 insertions(+), 2 deletions(-)
|
||||
|
||||
--- a/drivers/net/ethernet/realtek/r8169_main.c
|
||||
+++ b/drivers/net/ethernet/realtek/r8169_main.c
|
||||
@@ -346,6 +346,8 @@ enum rtl8125_registers {
|
||||
TxPoll_8125 = 0x90,
|
||||
LEDSEL3 = 0x96,
|
||||
MAC0_BKP = 0x19e0,
|
||||
+ RSS_CTRL_8125 = 0x4500,
|
||||
+ Q_NUM_CTRL_8125 = 0x4800,
|
||||
EEE_TXIDLE_TIMER_8125 = 0x6048,
|
||||
};
|
||||
|
||||
@@ -3768,8 +3770,8 @@ static void rtl_hw_start_8125_common(str
|
||||
rtl_pcie_state_l2l3_disable(tp);
|
||||
|
||||
RTL_W16(tp, 0x382, 0x221b);
|
||||
- RTL_W8(tp, 0x4500, 0);
|
||||
- RTL_W16(tp, 0x4800, 0);
|
||||
+ RTL_W32(tp, RSS_CTRL_8125, 0);
|
||||
+ RTL_W16(tp, Q_NUM_CTRL_8125, 0);
|
||||
|
||||
/* disable UPS */
|
||||
r8168_mac_ocp_modify(tp, 0xd40a, 0x0010, 0x0000);
|
|
@ -0,0 +1,113 @@
|
|||
From 83cb4b470c66b37b19a347a35cea01e0cbdd258d Mon Sep 17 00:00:00 2001
|
||||
From: Heiner Kallweit <hkallweit1@gmail.com>
|
||||
Date: Mon, 4 Nov 2024 23:16:20 +0100
|
||||
Subject: [PATCH] r8169: remove leftover locks after reverted change
|
||||
|
||||
After e31a9fedc7d8 ("Revert "r8169: disable ASPM during NAPI poll"")
|
||||
these locks aren't needed any longer.
|
||||
|
||||
Signed-off-by: Heiner Kallweit <hkallweit1@gmail.com>
|
||||
Link: https://patch.msgid.link/680f2606-ac7d-4ced-8694-e5033855da9b@gmail.com
|
||||
Signed-off-by: Jakub Kicinski <kuba@kernel.org>
|
||||
---
|
||||
drivers/net/ethernet/realtek/r8169_main.c | 29 ++---------------------
|
||||
1 file changed, 2 insertions(+), 27 deletions(-)
|
||||
|
||||
--- a/drivers/net/ethernet/realtek/r8169_main.c
|
||||
+++ b/drivers/net/ethernet/realtek/r8169_main.c
|
||||
@@ -662,13 +662,9 @@ struct rtl8169_private {
|
||||
struct work_struct work;
|
||||
} wk;
|
||||
|
||||
- raw_spinlock_t config25_lock;
|
||||
raw_spinlock_t mac_ocp_lock;
|
||||
struct mutex led_lock; /* serialize LED ctrl RMW access */
|
||||
|
||||
- raw_spinlock_t cfg9346_usage_lock;
|
||||
- int cfg9346_usage_count;
|
||||
-
|
||||
unsigned supports_gmii:1;
|
||||
unsigned aspm_manageable:1;
|
||||
unsigned dash_enabled:1;
|
||||
@@ -722,22 +718,12 @@ static inline struct device *tp_to_dev(s
|
||||
|
||||
static void rtl_lock_config_regs(struct rtl8169_private *tp)
|
||||
{
|
||||
- unsigned long flags;
|
||||
-
|
||||
- raw_spin_lock_irqsave(&tp->cfg9346_usage_lock, flags);
|
||||
- if (!--tp->cfg9346_usage_count)
|
||||
- RTL_W8(tp, Cfg9346, Cfg9346_Lock);
|
||||
- raw_spin_unlock_irqrestore(&tp->cfg9346_usage_lock, flags);
|
||||
+ RTL_W8(tp, Cfg9346, Cfg9346_Lock);
|
||||
}
|
||||
|
||||
static void rtl_unlock_config_regs(struct rtl8169_private *tp)
|
||||
{
|
||||
- unsigned long flags;
|
||||
-
|
||||
- raw_spin_lock_irqsave(&tp->cfg9346_usage_lock, flags);
|
||||
- if (!tp->cfg9346_usage_count++)
|
||||
- RTL_W8(tp, Cfg9346, Cfg9346_Unlock);
|
||||
- raw_spin_unlock_irqrestore(&tp->cfg9346_usage_lock, flags);
|
||||
+ RTL_W8(tp, Cfg9346, Cfg9346_Unlock);
|
||||
}
|
||||
|
||||
static void rtl_pci_commit(struct rtl8169_private *tp)
|
||||
@@ -748,24 +734,18 @@ static void rtl_pci_commit(struct rtl816
|
||||
|
||||
static void rtl_mod_config2(struct rtl8169_private *tp, u8 clear, u8 set)
|
||||
{
|
||||
- unsigned long flags;
|
||||
u8 val;
|
||||
|
||||
- raw_spin_lock_irqsave(&tp->config25_lock, flags);
|
||||
val = RTL_R8(tp, Config2);
|
||||
RTL_W8(tp, Config2, (val & ~clear) | set);
|
||||
- raw_spin_unlock_irqrestore(&tp->config25_lock, flags);
|
||||
}
|
||||
|
||||
static void rtl_mod_config5(struct rtl8169_private *tp, u8 clear, u8 set)
|
||||
{
|
||||
- unsigned long flags;
|
||||
u8 val;
|
||||
|
||||
- raw_spin_lock_irqsave(&tp->config25_lock, flags);
|
||||
val = RTL_R8(tp, Config5);
|
||||
RTL_W8(tp, Config5, (val & ~clear) | set);
|
||||
- raw_spin_unlock_irqrestore(&tp->config25_lock, flags);
|
||||
}
|
||||
|
||||
static bool rtl_is_8125(struct rtl8169_private *tp)
|
||||
@@ -1571,7 +1551,6 @@ static void __rtl8169_set_wol(struct rtl
|
||||
{ WAKE_MAGIC, Config3, MagicPacket }
|
||||
};
|
||||
unsigned int i, tmp = ARRAY_SIZE(cfg);
|
||||
- unsigned long flags;
|
||||
u8 options;
|
||||
|
||||
rtl_unlock_config_regs(tp);
|
||||
@@ -1590,14 +1569,12 @@ static void __rtl8169_set_wol(struct rtl
|
||||
r8168_mac_ocp_modify(tp, 0xc0b6, BIT(0), 0);
|
||||
}
|
||||
|
||||
- raw_spin_lock_irqsave(&tp->config25_lock, flags);
|
||||
for (i = 0; i < tmp; i++) {
|
||||
options = RTL_R8(tp, cfg[i].reg) & ~cfg[i].mask;
|
||||
if (wolopts & cfg[i].opt)
|
||||
options |= cfg[i].mask;
|
||||
RTL_W8(tp, cfg[i].reg, options);
|
||||
}
|
||||
- raw_spin_unlock_irqrestore(&tp->config25_lock, flags);
|
||||
|
||||
switch (tp->mac_version) {
|
||||
case RTL_GIGA_MAC_VER_02 ... RTL_GIGA_MAC_VER_06:
|
||||
@@ -5458,8 +5435,6 @@ static int rtl_init_one(struct pci_dev *
|
||||
tp->supports_gmii = ent->driver_data == RTL_CFG_NO_GBIT ? 0 : 1;
|
||||
tp->ocp_base = OCP_STD_PHY_BASE;
|
||||
|
||||
- raw_spin_lock_init(&tp->cfg9346_usage_lock);
|
||||
- raw_spin_lock_init(&tp->config25_lock);
|
||||
raw_spin_lock_init(&tp->mac_ocp_lock);
|
||||
mutex_init(&tp->led_lock);
|
||||
|
|
@ -0,0 +1,108 @@
|
|||
From c507e96b5763b36b63ad50ad804341f72ea000e4 Mon Sep 17 00:00:00 2001
|
||||
From: Heiner Kallweit <hkallweit1@gmail.com>
|
||||
Date: Wed, 6 Nov 2024 17:55:45 +0100
|
||||
Subject: [PATCH] r8169: improve __rtl8169_set_wol
|
||||
|
||||
Add helper r8169_mod_reg8_cond() what allows to significantly simplify
|
||||
__rtl8169_set_wol().
|
||||
|
||||
Signed-off-by: Heiner Kallweit <hkallweit1@gmail.com>
|
||||
Reviewed-by: Simon Horman <horms@kernel.org>
|
||||
Link: https://patch.msgid.link/697b197a-8eac-40c6-8847-27093cacec36@gmail.com
|
||||
Signed-off-by: Jakub Kicinski <kuba@kernel.org>
|
||||
---
|
||||
drivers/net/ethernet/realtek/r8169_main.c | 55 ++++++++++-------------
|
||||
1 file changed, 24 insertions(+), 31 deletions(-)
|
||||
|
||||
--- a/drivers/net/ethernet/realtek/r8169_main.c
|
||||
+++ b/drivers/net/ethernet/realtek/r8169_main.c
|
||||
@@ -748,6 +748,20 @@ static void rtl_mod_config5(struct rtl81
|
||||
RTL_W8(tp, Config5, (val & ~clear) | set);
|
||||
}
|
||||
|
||||
+static void r8169_mod_reg8_cond(struct rtl8169_private *tp, int reg,
|
||||
+ u8 bits, bool cond)
|
||||
+{
|
||||
+ u8 val, old_val;
|
||||
+
|
||||
+ old_val = RTL_R8(tp, reg);
|
||||
+ if (cond)
|
||||
+ val = old_val | bits;
|
||||
+ else
|
||||
+ val = old_val & ~bits;
|
||||
+ if (val != old_val)
|
||||
+ RTL_W8(tp, reg, val);
|
||||
+}
|
||||
+
|
||||
static bool rtl_is_8125(struct rtl8169_private *tp)
|
||||
{
|
||||
return tp->mac_version >= RTL_GIGA_MAC_VER_61;
|
||||
@@ -1538,58 +1552,37 @@ static void rtl8169_get_wol(struct net_d
|
||||
|
||||
static void __rtl8169_set_wol(struct rtl8169_private *tp, u32 wolopts)
|
||||
{
|
||||
- static const struct {
|
||||
- u32 opt;
|
||||
- u16 reg;
|
||||
- u8 mask;
|
||||
- } cfg[] = {
|
||||
- { WAKE_PHY, Config3, LinkUp },
|
||||
- { WAKE_UCAST, Config5, UWF },
|
||||
- { WAKE_BCAST, Config5, BWF },
|
||||
- { WAKE_MCAST, Config5, MWF },
|
||||
- { WAKE_ANY, Config5, LanWake },
|
||||
- { WAKE_MAGIC, Config3, MagicPacket }
|
||||
- };
|
||||
- unsigned int i, tmp = ARRAY_SIZE(cfg);
|
||||
- u8 options;
|
||||
-
|
||||
rtl_unlock_config_regs(tp);
|
||||
|
||||
if (rtl_is_8168evl_up(tp)) {
|
||||
- tmp--;
|
||||
if (wolopts & WAKE_MAGIC)
|
||||
rtl_eri_set_bits(tp, 0x0dc, MagicPacket_v2);
|
||||
else
|
||||
rtl_eri_clear_bits(tp, 0x0dc, MagicPacket_v2);
|
||||
} else if (rtl_is_8125(tp)) {
|
||||
- tmp--;
|
||||
if (wolopts & WAKE_MAGIC)
|
||||
r8168_mac_ocp_modify(tp, 0xc0b6, 0, BIT(0));
|
||||
else
|
||||
r8168_mac_ocp_modify(tp, 0xc0b6, BIT(0), 0);
|
||||
+ } else {
|
||||
+ r8169_mod_reg8_cond(tp, Config3, MagicPacket,
|
||||
+ wolopts & WAKE_MAGIC);
|
||||
}
|
||||
|
||||
- for (i = 0; i < tmp; i++) {
|
||||
- options = RTL_R8(tp, cfg[i].reg) & ~cfg[i].mask;
|
||||
- if (wolopts & cfg[i].opt)
|
||||
- options |= cfg[i].mask;
|
||||
- RTL_W8(tp, cfg[i].reg, options);
|
||||
- }
|
||||
+ r8169_mod_reg8_cond(tp, Config3, LinkUp, wolopts & WAKE_PHY);
|
||||
+ r8169_mod_reg8_cond(tp, Config5, UWF, wolopts & WAKE_UCAST);
|
||||
+ r8169_mod_reg8_cond(tp, Config5, BWF, wolopts & WAKE_BCAST);
|
||||
+ r8169_mod_reg8_cond(tp, Config5, MWF, wolopts & WAKE_MCAST);
|
||||
+ r8169_mod_reg8_cond(tp, Config5, LanWake, wolopts);
|
||||
|
||||
switch (tp->mac_version) {
|
||||
case RTL_GIGA_MAC_VER_02 ... RTL_GIGA_MAC_VER_06:
|
||||
- options = RTL_R8(tp, Config1) & ~PMEnable;
|
||||
- if (wolopts)
|
||||
- options |= PMEnable;
|
||||
- RTL_W8(tp, Config1, options);
|
||||
+ r8169_mod_reg8_cond(tp, Config1, PMEnable, wolopts);
|
||||
break;
|
||||
case RTL_GIGA_MAC_VER_34:
|
||||
case RTL_GIGA_MAC_VER_37:
|
||||
case RTL_GIGA_MAC_VER_39 ... RTL_GIGA_MAC_VER_66:
|
||||
- if (wolopts)
|
||||
- rtl_mod_config2(tp, 0, PME_SIGNAL);
|
||||
- else
|
||||
- rtl_mod_config2(tp, PME_SIGNAL, 0);
|
||||
+ r8169_mod_reg8_cond(tp, Config2, PME_SIGNAL, wolopts);
|
||||
break;
|
||||
default:
|
||||
break;
|
|
@ -0,0 +1,44 @@
|
|||
From 330dc2297c82953dff402e0b4176a5383a618538 Mon Sep 17 00:00:00 2001
|
||||
From: Heiner Kallweit <hkallweit1@gmail.com>
|
||||
Date: Wed, 6 Nov 2024 17:56:28 +0100
|
||||
Subject: [PATCH] r8169: improve rtl_set_d3_pll_down
|
||||
|
||||
Make use of new helper r8169_mod_reg8_cond() and move from a switch()
|
||||
to an if() clause. Benefit is that we don't have to touch this piece of
|
||||
code each time support for a new chip version is added.
|
||||
|
||||
Signed-off-by: Heiner Kallweit <hkallweit1@gmail.com>
|
||||
Reviewed-by: Simon Horman <horms@kernel.org>
|
||||
Link: https://patch.msgid.link/e1ccdb85-a4ed-4800-89c2-89770ff06452@gmail.com
|
||||
Signed-off-by: Jakub Kicinski <kuba@kernel.org>
|
||||
---
|
||||
drivers/net/ethernet/realtek/r8169_main.c | 18 +++++-------------
|
||||
1 file changed, 5 insertions(+), 13 deletions(-)
|
||||
|
||||
--- a/drivers/net/ethernet/realtek/r8169_main.c
|
||||
+++ b/drivers/net/ethernet/realtek/r8169_main.c
|
||||
@@ -1431,19 +1431,11 @@ static enum rtl_dash_type rtl_get_dash_t
|
||||
|
||||
static void rtl_set_d3_pll_down(struct rtl8169_private *tp, bool enable)
|
||||
{
|
||||
- switch (tp->mac_version) {
|
||||
- case RTL_GIGA_MAC_VER_25 ... RTL_GIGA_MAC_VER_26:
|
||||
- case RTL_GIGA_MAC_VER_29 ... RTL_GIGA_MAC_VER_30:
|
||||
- case RTL_GIGA_MAC_VER_32 ... RTL_GIGA_MAC_VER_37:
|
||||
- case RTL_GIGA_MAC_VER_39 ... RTL_GIGA_MAC_VER_66:
|
||||
- if (enable)
|
||||
- RTL_W8(tp, PMCH, RTL_R8(tp, PMCH) & ~D3_NO_PLL_DOWN);
|
||||
- else
|
||||
- RTL_W8(tp, PMCH, RTL_R8(tp, PMCH) | D3_NO_PLL_DOWN);
|
||||
- break;
|
||||
- default:
|
||||
- break;
|
||||
- }
|
||||
+ if (tp->mac_version >= RTL_GIGA_MAC_VER_25 &&
|
||||
+ tp->mac_version != RTL_GIGA_MAC_VER_28 &&
|
||||
+ tp->mac_version != RTL_GIGA_MAC_VER_31 &&
|
||||
+ tp->mac_version != RTL_GIGA_MAC_VER_38)
|
||||
+ r8169_mod_reg8_cond(tp, PMCH, D3_NO_PLL_DOWN, !enable);
|
||||
}
|
||||
|
||||
static void rtl_reset_packet_filter(struct rtl8169_private *tp)
|
|
@ -0,0 +1,29 @@
|
|||
From e3e9e9039fa6ae885c7d5c954d7b9f105fa23e8f Mon Sep 17 00:00:00 2001
|
||||
From: Heiner Kallweit <hkallweit1@gmail.com>
|
||||
Date: Wed, 6 Nov 2024 17:57:08 +0100
|
||||
Subject: [PATCH] r8169: align WAKE_PHY handling with r8125/r8126 vendor
|
||||
drivers
|
||||
|
||||
Vendor drivers r8125/r8126 apply this additional magic setting when
|
||||
enabling WAKE_PHY, so do the same here.
|
||||
|
||||
Signed-off-by: Heiner Kallweit <hkallweit1@gmail.com>
|
||||
Reviewed-by: Simon Horman <horms@kernel.org>
|
||||
Link: https://patch.msgid.link/51130715-45be-4db5-abb7-05d87e1f5df9@gmail.com
|
||||
Signed-off-by: Jakub Kicinski <kuba@kernel.org>
|
||||
---
|
||||
drivers/net/ethernet/realtek/r8169_main.c | 3 +++
|
||||
1 file changed, 3 insertions(+)
|
||||
|
||||
--- a/drivers/net/ethernet/realtek/r8169_main.c
|
||||
+++ b/drivers/net/ethernet/realtek/r8169_main.c
|
||||
@@ -1562,6 +1562,9 @@ static void __rtl8169_set_wol(struct rtl
|
||||
}
|
||||
|
||||
r8169_mod_reg8_cond(tp, Config3, LinkUp, wolopts & WAKE_PHY);
|
||||
+ if (rtl_is_8125(tp))
|
||||
+ r8168_mac_ocp_modify(tp, 0xe0c6, 0x3f,
|
||||
+ wolopts & WAKE_PHY ? 0x13 : 0);
|
||||
r8169_mod_reg8_cond(tp, Config5, UWF, wolopts & WAKE_UCAST);
|
||||
r8169_mod_reg8_cond(tp, Config5, BWF, wolopts & WAKE_BCAST);
|
||||
r8169_mod_reg8_cond(tp, Config5, MWF, wolopts & WAKE_MCAST);
|
|
@ -0,0 +1,117 @@
|
|||
From 7a3bcd39ae1f0e3ab896d9df62339ab4297a0bfd Mon Sep 17 00:00:00 2001
|
||||
From: Heiner Kallweit <hkallweit1@gmail.com>
|
||||
Date: Sat, 9 Nov 2024 23:12:12 +0100
|
||||
Subject: [PATCH] r8169: use helper r8169_mod_reg8_cond to simplify
|
||||
rtl_jumbo_config
|
||||
|
||||
Use recently added helper r8169_mod_reg8_cond() to simplify jumbo
|
||||
mode configuration.
|
||||
|
||||
Signed-off-by: Heiner Kallweit <hkallweit1@gmail.com>
|
||||
Reviewed-by: Simon Horman <horms@kernel.org>
|
||||
Link: https://patch.msgid.link/3df1d484-a02e-46e7-8f75-db5b428e422e@gmail.com
|
||||
Signed-off-by: Jakub Kicinski <kuba@kernel.org>
|
||||
---
|
||||
drivers/net/ethernet/realtek/r8169_main.c | 77 ++++-------------------
|
||||
1 file changed, 11 insertions(+), 66 deletions(-)
|
||||
|
||||
--- a/drivers/net/ethernet/realtek/r8169_main.c
|
||||
+++ b/drivers/net/ethernet/realtek/r8169_main.c
|
||||
@@ -2545,86 +2545,31 @@ static void rtl8169_init_ring_indexes(st
|
||||
tp->dirty_tx = tp->cur_tx = tp->cur_rx = 0;
|
||||
}
|
||||
|
||||
-static void r8168c_hw_jumbo_enable(struct rtl8169_private *tp)
|
||||
-{
|
||||
- RTL_W8(tp, Config3, RTL_R8(tp, Config3) | Jumbo_En0);
|
||||
- RTL_W8(tp, Config4, RTL_R8(tp, Config4) | Jumbo_En1);
|
||||
-}
|
||||
-
|
||||
-static void r8168c_hw_jumbo_disable(struct rtl8169_private *tp)
|
||||
-{
|
||||
- RTL_W8(tp, Config3, RTL_R8(tp, Config3) & ~Jumbo_En0);
|
||||
- RTL_W8(tp, Config4, RTL_R8(tp, Config4) & ~Jumbo_En1);
|
||||
-}
|
||||
-
|
||||
-static void r8168dp_hw_jumbo_enable(struct rtl8169_private *tp)
|
||||
-{
|
||||
- RTL_W8(tp, Config3, RTL_R8(tp, Config3) | Jumbo_En0);
|
||||
-}
|
||||
-
|
||||
-static void r8168dp_hw_jumbo_disable(struct rtl8169_private *tp)
|
||||
-{
|
||||
- RTL_W8(tp, Config3, RTL_R8(tp, Config3) & ~Jumbo_En0);
|
||||
-}
|
||||
-
|
||||
-static void r8168e_hw_jumbo_enable(struct rtl8169_private *tp)
|
||||
-{
|
||||
- RTL_W8(tp, MaxTxPacketSize, 0x24);
|
||||
- RTL_W8(tp, Config3, RTL_R8(tp, Config3) | Jumbo_En0);
|
||||
- RTL_W8(tp, Config4, RTL_R8(tp, Config4) | 0x01);
|
||||
-}
|
||||
-
|
||||
-static void r8168e_hw_jumbo_disable(struct rtl8169_private *tp)
|
||||
-{
|
||||
- RTL_W8(tp, MaxTxPacketSize, 0x3f);
|
||||
- RTL_W8(tp, Config3, RTL_R8(tp, Config3) & ~Jumbo_En0);
|
||||
- RTL_W8(tp, Config4, RTL_R8(tp, Config4) & ~0x01);
|
||||
-}
|
||||
-
|
||||
-static void r8168b_1_hw_jumbo_enable(struct rtl8169_private *tp)
|
||||
-{
|
||||
- RTL_W8(tp, Config4, RTL_R8(tp, Config4) | (1 << 0));
|
||||
-}
|
||||
-
|
||||
-static void r8168b_1_hw_jumbo_disable(struct rtl8169_private *tp)
|
||||
-{
|
||||
- RTL_W8(tp, Config4, RTL_R8(tp, Config4) & ~(1 << 0));
|
||||
-}
|
||||
-
|
||||
static void rtl_jumbo_config(struct rtl8169_private *tp)
|
||||
{
|
||||
bool jumbo = tp->dev->mtu > ETH_DATA_LEN;
|
||||
int readrq = 4096;
|
||||
|
||||
+ if (jumbo && tp->mac_version >= RTL_GIGA_MAC_VER_17 &&
|
||||
+ tp->mac_version <= RTL_GIGA_MAC_VER_26)
|
||||
+ readrq = 512;
|
||||
+
|
||||
rtl_unlock_config_regs(tp);
|
||||
switch (tp->mac_version) {
|
||||
case RTL_GIGA_MAC_VER_17:
|
||||
- if (jumbo) {
|
||||
- readrq = 512;
|
||||
- r8168b_1_hw_jumbo_enable(tp);
|
||||
- } else {
|
||||
- r8168b_1_hw_jumbo_disable(tp);
|
||||
- }
|
||||
+ r8169_mod_reg8_cond(tp, Config4, BIT(0), jumbo);
|
||||
break;
|
||||
case RTL_GIGA_MAC_VER_18 ... RTL_GIGA_MAC_VER_26:
|
||||
- if (jumbo) {
|
||||
- readrq = 512;
|
||||
- r8168c_hw_jumbo_enable(tp);
|
||||
- } else {
|
||||
- r8168c_hw_jumbo_disable(tp);
|
||||
- }
|
||||
+ r8169_mod_reg8_cond(tp, Config3, Jumbo_En0, jumbo);
|
||||
+ r8169_mod_reg8_cond(tp, Config4, Jumbo_En1, jumbo);
|
||||
break;
|
||||
case RTL_GIGA_MAC_VER_28:
|
||||
- if (jumbo)
|
||||
- r8168dp_hw_jumbo_enable(tp);
|
||||
- else
|
||||
- r8168dp_hw_jumbo_disable(tp);
|
||||
+ r8169_mod_reg8_cond(tp, Config3, Jumbo_En0, jumbo);
|
||||
break;
|
||||
case RTL_GIGA_MAC_VER_31 ... RTL_GIGA_MAC_VER_33:
|
||||
- if (jumbo)
|
||||
- r8168e_hw_jumbo_enable(tp);
|
||||
- else
|
||||
- r8168e_hw_jumbo_disable(tp);
|
||||
+ RTL_W8(tp, MaxTxPacketSize, jumbo ? 0x24 : 0x3f);
|
||||
+ r8169_mod_reg8_cond(tp, Config3, Jumbo_En0, jumbo);
|
||||
+ r8169_mod_reg8_cond(tp, Config4, BIT(0), jumbo);
|
||||
break;
|
||||
default:
|
||||
break;
|
|
@ -0,0 +1,82 @@
|
|||
From e340bff27e63ed61a1e9895bed546107859e48a7 Mon Sep 17 00:00:00 2001
|
||||
From: Heiner Kallweit <hkallweit1@gmail.com>
|
||||
Date: Fri, 8 Nov 2024 08:08:24 +0100
|
||||
Subject: [PATCH] r8169: copy vendor driver 2.5G/5G EEE advertisement
|
||||
constraints
|
||||
|
||||
Vendor driver r8125 doesn't advertise 2.5G EEE on RTL8125A, and r8126
|
||||
doesn't advertise 5G EEE. Likely there are compatibility issues,
|
||||
therefore do the same in r8169.
|
||||
With this change we don't have to disable 2.5G EEE advertisement in
|
||||
rtl8125a_config_eee_phy() any longer.
|
||||
We use new phylib accessor phy_set_eee_broken() to mark the respective
|
||||
EEE modes as broken.
|
||||
|
||||
Signed-off-by: Heiner Kallweit <hkallweit1@gmail.com>
|
||||
Link: https://patch.msgid.link/ce185e10-8a2f-4cf8-a49b-fd8fb3c3c8a1@gmail.com
|
||||
Signed-off-by: Jakub Kicinski <kuba@kernel.org>
|
||||
---
|
||||
drivers/net/ethernet/realtek/r8169_main.c | 6 ++++++
|
||||
drivers/net/ethernet/realtek/r8169_phy_config.c | 16 ++++------------
|
||||
2 files changed, 10 insertions(+), 12 deletions(-)
|
||||
|
||||
--- a/drivers/net/ethernet/realtek/r8169_main.c
|
||||
+++ b/drivers/net/ethernet/realtek/r8169_main.c
|
||||
@@ -5234,6 +5234,11 @@ static int r8169_mdio_register(struct rt
|
||||
phy_support_eee(tp->phydev);
|
||||
phy_support_asym_pause(tp->phydev);
|
||||
|
||||
+ /* mimic behavior of r8125/r8126 vendor drivers */
|
||||
+ if (tp->mac_version == RTL_GIGA_MAC_VER_61)
|
||||
+ tp->phydev->eee_broken_modes |= MDIO_EEE_2_5GT;
|
||||
+ tp->phydev->eee_broken_modes |= MDIO_EEE_5GT;
|
||||
+
|
||||
/* PHY will be woken up in rtl_open() */
|
||||
phy_suspend(tp->phydev);
|
||||
|
||||
--- a/drivers/net/ethernet/realtek/r8169_phy_config.c
|
||||
+++ b/drivers/net/ethernet/realtek/r8169_phy_config.c
|
||||
@@ -96,15 +96,7 @@ static void rtl8125_common_config_eee_ph
|
||||
phy_modify_paged(phydev, 0xa4a, 0x11, 0x0200, 0x0000);
|
||||
}
|
||||
|
||||
-static void rtl8125a_config_eee_phy(struct phy_device *phydev)
|
||||
-{
|
||||
- rtl8168g_config_eee_phy(phydev);
|
||||
- /* disable EEE at 2.5Gbps */
|
||||
- phy_modify_paged(phydev, 0xa6d, 0x12, 0x0001, 0x0000);
|
||||
- rtl8125_common_config_eee_phy(phydev);
|
||||
-}
|
||||
-
|
||||
-static void rtl8125b_config_eee_phy(struct phy_device *phydev)
|
||||
+static void rtl8125_config_eee_phy(struct phy_device *phydev)
|
||||
{
|
||||
rtl8168g_config_eee_phy(phydev);
|
||||
rtl8125_common_config_eee_phy(phydev);
|
||||
@@ -1066,7 +1058,7 @@ static void rtl8125a_2_hw_phy_config(str
|
||||
rtl8168g_enable_gphy_10m(phydev);
|
||||
|
||||
rtl8168g_disable_aldps(phydev);
|
||||
- rtl8125a_config_eee_phy(phydev);
|
||||
+ rtl8125_config_eee_phy(phydev);
|
||||
}
|
||||
|
||||
static void rtl8125b_hw_phy_config(struct rtl8169_private *tp,
|
||||
@@ -1106,7 +1098,7 @@ static void rtl8125b_hw_phy_config(struc
|
||||
|
||||
rtl8125_legacy_force_mode(phydev);
|
||||
rtl8168g_disable_aldps(phydev);
|
||||
- rtl8125b_config_eee_phy(phydev);
|
||||
+ rtl8125_config_eee_phy(phydev);
|
||||
}
|
||||
|
||||
static void rtl8125d_hw_phy_config(struct rtl8169_private *tp,
|
||||
@@ -1116,7 +1108,7 @@ static void rtl8125d_hw_phy_config(struc
|
||||
rtl8168g_enable_gphy_10m(phydev);
|
||||
rtl8125_legacy_force_mode(phydev);
|
||||
rtl8168g_disable_aldps(phydev);
|
||||
- rtl8125b_config_eee_phy(phydev);
|
||||
+ rtl8125_config_eee_phy(phydev);
|
||||
}
|
||||
|
||||
static void rtl8126a_hw_phy_config(struct rtl8169_private *tp,
|
|
@ -0,0 +1,35 @@
|
|||
From 2e20bf8cc05766dcd0357cdfcada49e1bc45512b Mon Sep 17 00:00:00 2001
|
||||
From: Heiner Kallweit <hkallweit1@gmail.com>
|
||||
Date: Mon, 2 Dec 2024 21:14:35 +0100
|
||||
Subject: [PATCH] r8169: remove unused flag RTL_FLAG_TASK_RESET_NO_QUEUE_WAKE
|
||||
|
||||
After 854d71c555dfc3 ("r8169: remove original workaround for RTL8125
|
||||
broken rx issue") this flag isn't used any longer. So remove it.
|
||||
|
||||
Signed-off-by: Heiner Kallweit <hkallweit1@gmail.com>
|
||||
Reviewed-by: Michal Swiatkowski <michal.swiatkowski@linux.intel.com>
|
||||
Link: https://patch.msgid.link/d9dd214b-3027-4f60-b0e8-6f34a0c76582@gmail.com
|
||||
Signed-off-by: Jakub Kicinski <kuba@kernel.org>
|
||||
---
|
||||
drivers/net/ethernet/realtek/r8169_main.c | 3 ---
|
||||
1 file changed, 3 deletions(-)
|
||||
|
||||
--- a/drivers/net/ethernet/realtek/r8169_main.c
|
||||
+++ b/drivers/net/ethernet/realtek/r8169_main.c
|
||||
@@ -623,7 +623,6 @@ struct rtl8169_tc_offsets {
|
||||
enum rtl_flag {
|
||||
RTL_FLAG_TASK_ENABLED = 0,
|
||||
RTL_FLAG_TASK_RESET_PENDING,
|
||||
- RTL_FLAG_TASK_RESET_NO_QUEUE_WAKE,
|
||||
RTL_FLAG_TASK_TX_TIMEOUT,
|
||||
RTL_FLAG_MAX
|
||||
};
|
||||
@@ -4728,8 +4727,6 @@ static void rtl_task(struct work_struct
|
||||
reset:
|
||||
rtl_reset_work(tp);
|
||||
netif_wake_queue(tp->dev);
|
||||
- } else if (test_and_clear_bit(RTL_FLAG_TASK_RESET_NO_QUEUE_WAKE, tp->wk.flags)) {
|
||||
- rtl_reset_work(tp);
|
||||
}
|
||||
}
|
||||
|
|
@ -0,0 +1,114 @@
|
|||
From bb18265c3aba92b91a1355609769f3e967b65dee Mon Sep 17 00:00:00 2001
|
||||
From: Heiner Kallweit <hkallweit1@gmail.com>
|
||||
Date: Mon, 2 Dec 2024 21:20:02 +0100
|
||||
Subject: [PATCH] r8169: remove support for chip version 11
|
||||
|
||||
This is a follow-up to 982300c115d2 ("r8169: remove detection of chip
|
||||
version 11 (early RTL8168b)"). Nobody complained yet, so remove
|
||||
support for this chip version.
|
||||
|
||||
Signed-off-by: Heiner Kallweit <hkallweit1@gmail.com>
|
||||
Reviewed-by: Simon Horman <horms@kernel.org>
|
||||
Link: https://patch.msgid.link/b689ab6d-20b5-4b64-bd7e-531a0a972ba3@gmail.com
|
||||
Signed-off-by: Jakub Kicinski <kuba@kernel.org>
|
||||
---
|
||||
drivers/net/ethernet/realtek/r8169.h | 2 +-
|
||||
drivers/net/ethernet/realtek/r8169_main.c | 14 +-------------
|
||||
drivers/net/ethernet/realtek/r8169_phy_config.c | 10 ----------
|
||||
3 files changed, 2 insertions(+), 24 deletions(-)
|
||||
|
||||
--- a/drivers/net/ethernet/realtek/r8169.h
|
||||
+++ b/drivers/net/ethernet/realtek/r8169.h
|
||||
@@ -23,7 +23,7 @@ enum mac_version {
|
||||
RTL_GIGA_MAC_VER_08,
|
||||
RTL_GIGA_MAC_VER_09,
|
||||
RTL_GIGA_MAC_VER_10,
|
||||
- RTL_GIGA_MAC_VER_11,
|
||||
+ /* support for RTL_GIGA_MAC_VER_11 has been removed */
|
||||
/* RTL_GIGA_MAC_VER_12 was handled the same as VER_17 */
|
||||
/* RTL_GIGA_MAC_VER_13 was merged with VER_10 */
|
||||
RTL_GIGA_MAC_VER_14,
|
||||
--- a/drivers/net/ethernet/realtek/r8169_main.c
|
||||
+++ b/drivers/net/ethernet/realtek/r8169_main.c
|
||||
@@ -103,7 +103,6 @@ static const struct {
|
||||
[RTL_GIGA_MAC_VER_08] = {"RTL8102e" },
|
||||
[RTL_GIGA_MAC_VER_09] = {"RTL8102e/RTL8103e" },
|
||||
[RTL_GIGA_MAC_VER_10] = {"RTL8101e/RTL8100e" },
|
||||
- [RTL_GIGA_MAC_VER_11] = {"RTL8168b/8111b" },
|
||||
[RTL_GIGA_MAC_VER_14] = {"RTL8401" },
|
||||
[RTL_GIGA_MAC_VER_17] = {"RTL8168b/8111b" },
|
||||
[RTL_GIGA_MAC_VER_18] = {"RTL8168cp/8111cp" },
|
||||
@@ -2335,7 +2334,7 @@ static enum mac_version rtl8169_get_mac_
|
||||
|
||||
/* 8168B family. */
|
||||
{ 0x7c8, 0x380, RTL_GIGA_MAC_VER_17 },
|
||||
- /* This one is very old and rare, let's see if anybody complains.
|
||||
+ /* This one is very old and rare, support has been removed.
|
||||
* { 0x7c8, 0x300, RTL_GIGA_MAC_VER_11 },
|
||||
*/
|
||||
|
||||
@@ -3805,7 +3804,6 @@ static void rtl_hw_config(struct rtl8169
|
||||
[RTL_GIGA_MAC_VER_08] = rtl_hw_start_8102e_3,
|
||||
[RTL_GIGA_MAC_VER_09] = rtl_hw_start_8102e_2,
|
||||
[RTL_GIGA_MAC_VER_10] = NULL,
|
||||
- [RTL_GIGA_MAC_VER_11] = rtl_hw_start_8168b,
|
||||
[RTL_GIGA_MAC_VER_14] = rtl_hw_start_8401,
|
||||
[RTL_GIGA_MAC_VER_17] = rtl_hw_start_8168b,
|
||||
[RTL_GIGA_MAC_VER_18] = rtl_hw_start_8168cp_1,
|
||||
@@ -4681,12 +4679,6 @@ static irqreturn_t rtl8169_interrupt(int
|
||||
if (status & LinkChg)
|
||||
phy_mac_interrupt(tp->phydev);
|
||||
|
||||
- if (unlikely(status & RxFIFOOver &&
|
||||
- tp->mac_version == RTL_GIGA_MAC_VER_11)) {
|
||||
- netif_stop_queue(tp->dev);
|
||||
- rtl_schedule_task(tp, RTL_FLAG_TASK_RESET_PENDING);
|
||||
- }
|
||||
-
|
||||
rtl_irq_disable(tp);
|
||||
napi_schedule(&tp->napi);
|
||||
out:
|
||||
@@ -5106,9 +5098,6 @@ static void rtl_set_irq_mask(struct rtl8
|
||||
|
||||
if (tp->mac_version <= RTL_GIGA_MAC_VER_06)
|
||||
tp->irq_mask |= SYSErr | RxFIFOOver;
|
||||
- else if (tp->mac_version == RTL_GIGA_MAC_VER_11)
|
||||
- /* special workaround needed */
|
||||
- tp->irq_mask |= RxFIFOOver;
|
||||
}
|
||||
|
||||
static int rtl_alloc_irq(struct rtl8169_private *tp)
|
||||
@@ -5302,7 +5291,6 @@ static int rtl_jumbo_max(struct rtl8169_
|
||||
case RTL_GIGA_MAC_VER_02 ... RTL_GIGA_MAC_VER_06:
|
||||
return JUMBO_7K;
|
||||
/* RTL8168b */
|
||||
- case RTL_GIGA_MAC_VER_11:
|
||||
case RTL_GIGA_MAC_VER_17:
|
||||
return JUMBO_4K;
|
||||
/* RTL8168c */
|
||||
--- a/drivers/net/ethernet/realtek/r8169_phy_config.c
|
||||
+++ b/drivers/net/ethernet/realtek/r8169_phy_config.c
|
||||
@@ -276,15 +276,6 @@ static void rtl8169sce_hw_phy_config(str
|
||||
rtl_writephy_batch(phydev, phy_reg_init);
|
||||
}
|
||||
|
||||
-static void rtl8168bb_hw_phy_config(struct rtl8169_private *tp,
|
||||
- struct phy_device *phydev)
|
||||
-{
|
||||
- phy_write(phydev, 0x1f, 0x0001);
|
||||
- phy_set_bits(phydev, 0x16, BIT(0));
|
||||
- phy_write(phydev, 0x10, 0xf41b);
|
||||
- phy_write(phydev, 0x1f, 0x0000);
|
||||
-}
|
||||
-
|
||||
static void rtl8168bef_hw_phy_config(struct rtl8169_private *tp,
|
||||
struct phy_device *phydev)
|
||||
{
|
||||
@@ -1136,7 +1127,6 @@ void r8169_hw_phy_config(struct rtl8169_
|
||||
[RTL_GIGA_MAC_VER_08] = rtl8102e_hw_phy_config,
|
||||
[RTL_GIGA_MAC_VER_09] = rtl8102e_hw_phy_config,
|
||||
[RTL_GIGA_MAC_VER_10] = NULL,
|
||||
- [RTL_GIGA_MAC_VER_11] = rtl8168bb_hw_phy_config,
|
||||
[RTL_GIGA_MAC_VER_14] = rtl8401_hw_phy_config,
|
||||
[RTL_GIGA_MAC_VER_17] = rtl8168bef_hw_phy_config,
|
||||
[RTL_GIGA_MAC_VER_18] = rtl8168cp_1_hw_phy_config,
|
|
@ -0,0 +1,257 @@
|
|||
From b299ea0069284186b0d3d54aebe87f0d195d457a Mon Sep 17 00:00:00 2001
|
||||
From: Heiner Kallweit <hkallweit1@gmail.com>
|
||||
Date: Fri, 13 Dec 2024 20:01:41 +0100
|
||||
Subject: [PATCH] r8169: adjust version numbering for RTL8126
|
||||
|
||||
Adjust version numbering for RTL8126, so that it doesn't overlap with
|
||||
new RTL8125 versions.
|
||||
|
||||
Signed-off-by: Heiner Kallweit <hkallweit1@gmail.com>
|
||||
Reviewed-by: Simon Horman <horms@kernel.org>
|
||||
Link: https://patch.msgid.link/6a354364-20e9-48ad-a198-468264288757@gmail.com
|
||||
Signed-off-by: Jakub Kicinski <kuba@kernel.org>
|
||||
---
|
||||
drivers/net/ethernet/realtek/r8169.h | 4 +-
|
||||
drivers/net/ethernet/realtek/r8169_main.c | 62 +++++++++----------
|
||||
.../net/ethernet/realtek/r8169_phy_config.c | 4 +-
|
||||
3 files changed, 35 insertions(+), 35 deletions(-)
|
||||
|
||||
--- a/drivers/net/ethernet/realtek/r8169.h
|
||||
+++ b/drivers/net/ethernet/realtek/r8169.h
|
||||
@@ -69,8 +69,8 @@ enum mac_version {
|
||||
RTL_GIGA_MAC_VER_61,
|
||||
RTL_GIGA_MAC_VER_63,
|
||||
RTL_GIGA_MAC_VER_64,
|
||||
- RTL_GIGA_MAC_VER_65,
|
||||
- RTL_GIGA_MAC_VER_66,
|
||||
+ RTL_GIGA_MAC_VER_70,
|
||||
+ RTL_GIGA_MAC_VER_71,
|
||||
RTL_GIGA_MAC_NONE
|
||||
};
|
||||
|
||||
--- a/drivers/net/ethernet/realtek/r8169_main.c
|
||||
+++ b/drivers/net/ethernet/realtek/r8169_main.c
|
||||
@@ -139,8 +139,8 @@ static const struct {
|
||||
/* reserve 62 for CFG_METHOD_4 in the vendor driver */
|
||||
[RTL_GIGA_MAC_VER_63] = {"RTL8125B", FIRMWARE_8125B_2},
|
||||
[RTL_GIGA_MAC_VER_64] = {"RTL8125D", FIRMWARE_8125D_1},
|
||||
- [RTL_GIGA_MAC_VER_65] = {"RTL8126A", FIRMWARE_8126A_2},
|
||||
- [RTL_GIGA_MAC_VER_66] = {"RTL8126A", FIRMWARE_8126A_3},
|
||||
+ [RTL_GIGA_MAC_VER_70] = {"RTL8126A", FIRMWARE_8126A_2},
|
||||
+ [RTL_GIGA_MAC_VER_71] = {"RTL8126A", FIRMWARE_8126A_3},
|
||||
};
|
||||
|
||||
static const struct pci_device_id rtl8169_pci_tbl[] = {
|
||||
@@ -1228,7 +1228,7 @@ static void rtl_writephy(struct rtl8169_
|
||||
case RTL_GIGA_MAC_VER_31:
|
||||
r8168dp_2_mdio_write(tp, location, val);
|
||||
break;
|
||||
- case RTL_GIGA_MAC_VER_40 ... RTL_GIGA_MAC_VER_66:
|
||||
+ case RTL_GIGA_MAC_VER_40 ... RTL_GIGA_MAC_VER_71:
|
||||
r8168g_mdio_write(tp, location, val);
|
||||
break;
|
||||
default:
|
||||
@@ -1243,7 +1243,7 @@ static int rtl_readphy(struct rtl8169_pr
|
||||
case RTL_GIGA_MAC_VER_28:
|
||||
case RTL_GIGA_MAC_VER_31:
|
||||
return r8168dp_2_mdio_read(tp, location);
|
||||
- case RTL_GIGA_MAC_VER_40 ... RTL_GIGA_MAC_VER_66:
|
||||
+ case RTL_GIGA_MAC_VER_40 ... RTL_GIGA_MAC_VER_71:
|
||||
return r8168g_mdio_read(tp, location);
|
||||
default:
|
||||
return r8169_mdio_read(tp, location);
|
||||
@@ -1574,7 +1574,7 @@ static void __rtl8169_set_wol(struct rtl
|
||||
break;
|
||||
case RTL_GIGA_MAC_VER_34:
|
||||
case RTL_GIGA_MAC_VER_37:
|
||||
- case RTL_GIGA_MAC_VER_39 ... RTL_GIGA_MAC_VER_66:
|
||||
+ case RTL_GIGA_MAC_VER_39 ... RTL_GIGA_MAC_VER_71:
|
||||
r8169_mod_reg8_cond(tp, Config2, PME_SIGNAL, wolopts);
|
||||
break;
|
||||
default:
|
||||
@@ -2047,7 +2047,7 @@ static void rtl_set_eee_txidle_timer(str
|
||||
tp->tx_lpi_timer = timer_val;
|
||||
r8168_mac_ocp_write(tp, 0xe048, timer_val);
|
||||
break;
|
||||
- case RTL_GIGA_MAC_VER_61 ... RTL_GIGA_MAC_VER_66:
|
||||
+ case RTL_GIGA_MAC_VER_61 ... RTL_GIGA_MAC_VER_71:
|
||||
tp->tx_lpi_timer = timer_val;
|
||||
RTL_W16(tp, EEE_TXIDLE_TIMER_8125, timer_val);
|
||||
break;
|
||||
@@ -2255,8 +2255,8 @@ static enum mac_version rtl8169_get_mac_
|
||||
enum mac_version ver;
|
||||
} mac_info[] = {
|
||||
/* 8126A family. */
|
||||
- { 0x7cf, 0x64a, RTL_GIGA_MAC_VER_66 },
|
||||
- { 0x7cf, 0x649, RTL_GIGA_MAC_VER_65 },
|
||||
+ { 0x7cf, 0x64a, RTL_GIGA_MAC_VER_71 },
|
||||
+ { 0x7cf, 0x649, RTL_GIGA_MAC_VER_70 },
|
||||
|
||||
/* 8125D family. */
|
||||
{ 0x7cf, 0x688, RTL_GIGA_MAC_VER_64 },
|
||||
@@ -2528,7 +2528,7 @@ static void rtl_init_rxcfg(struct rtl816
|
||||
case RTL_GIGA_MAC_VER_61:
|
||||
RTL_W32(tp, RxConfig, RX_FETCH_DFLT_8125 | RX_DMA_BURST);
|
||||
break;
|
||||
- case RTL_GIGA_MAC_VER_63 ... RTL_GIGA_MAC_VER_66:
|
||||
+ case RTL_GIGA_MAC_VER_63 ... RTL_GIGA_MAC_VER_71:
|
||||
RTL_W32(tp, RxConfig, RX_FETCH_DFLT_8125 | RX_DMA_BURST |
|
||||
RX_PAUSE_SLOT_ON);
|
||||
break;
|
||||
@@ -2660,7 +2660,7 @@ static void rtl_wait_txrx_fifo_empty(str
|
||||
case RTL_GIGA_MAC_VER_61 ... RTL_GIGA_MAC_VER_61:
|
||||
rtl_loop_wait_high(tp, &rtl_rxtx_empty_cond, 100, 42);
|
||||
break;
|
||||
- case RTL_GIGA_MAC_VER_63 ... RTL_GIGA_MAC_VER_66:
|
||||
+ case RTL_GIGA_MAC_VER_63 ... RTL_GIGA_MAC_VER_71:
|
||||
RTL_W8(tp, ChipCmd, RTL_R8(tp, ChipCmd) | StopReq);
|
||||
rtl_loop_wait_high(tp, &rtl_rxtx_empty_cond, 100, 42);
|
||||
rtl_loop_wait_high(tp, &rtl_rxtx_empty_cond_2, 100, 42);
|
||||
@@ -2903,7 +2903,7 @@ static void rtl_enable_exit_l1(struct rt
|
||||
case RTL_GIGA_MAC_VER_37 ... RTL_GIGA_MAC_VER_38:
|
||||
rtl_eri_set_bits(tp, 0xd4, 0x0c00);
|
||||
break;
|
||||
- case RTL_GIGA_MAC_VER_40 ... RTL_GIGA_MAC_VER_66:
|
||||
+ case RTL_GIGA_MAC_VER_40 ... RTL_GIGA_MAC_VER_71:
|
||||
r8168_mac_ocp_modify(tp, 0xc0ac, 0, 0x1f80);
|
||||
break;
|
||||
default:
|
||||
@@ -2917,7 +2917,7 @@ static void rtl_disable_exit_l1(struct r
|
||||
case RTL_GIGA_MAC_VER_34 ... RTL_GIGA_MAC_VER_38:
|
||||
rtl_eri_clear_bits(tp, 0xd4, 0x1f00);
|
||||
break;
|
||||
- case RTL_GIGA_MAC_VER_40 ... RTL_GIGA_MAC_VER_66:
|
||||
+ case RTL_GIGA_MAC_VER_40 ... RTL_GIGA_MAC_VER_71:
|
||||
r8168_mac_ocp_modify(tp, 0xc0ac, 0x1f80, 0);
|
||||
break;
|
||||
default:
|
||||
@@ -2943,8 +2943,8 @@ static void rtl_hw_aspm_clkreq_enable(st
|
||||
|
||||
rtl_mod_config5(tp, 0, ASPM_en);
|
||||
switch (tp->mac_version) {
|
||||
- case RTL_GIGA_MAC_VER_65:
|
||||
- case RTL_GIGA_MAC_VER_66:
|
||||
+ case RTL_GIGA_MAC_VER_70:
|
||||
+ case RTL_GIGA_MAC_VER_71:
|
||||
val8 = RTL_R8(tp, INT_CFG0_8125) | INT_CFG0_CLKREQEN;
|
||||
RTL_W8(tp, INT_CFG0_8125, val8);
|
||||
break;
|
||||
@@ -2955,7 +2955,7 @@ static void rtl_hw_aspm_clkreq_enable(st
|
||||
|
||||
switch (tp->mac_version) {
|
||||
case RTL_GIGA_MAC_VER_46 ... RTL_GIGA_MAC_VER_48:
|
||||
- case RTL_GIGA_MAC_VER_61 ... RTL_GIGA_MAC_VER_66:
|
||||
+ case RTL_GIGA_MAC_VER_61 ... RTL_GIGA_MAC_VER_71:
|
||||
/* reset ephy tx/rx disable timer */
|
||||
r8168_mac_ocp_modify(tp, 0xe094, 0xff00, 0);
|
||||
/* chip can trigger L1.2 */
|
||||
@@ -2967,7 +2967,7 @@ static void rtl_hw_aspm_clkreq_enable(st
|
||||
} else {
|
||||
switch (tp->mac_version) {
|
||||
case RTL_GIGA_MAC_VER_46 ... RTL_GIGA_MAC_VER_48:
|
||||
- case RTL_GIGA_MAC_VER_61 ... RTL_GIGA_MAC_VER_66:
|
||||
+ case RTL_GIGA_MAC_VER_61 ... RTL_GIGA_MAC_VER_71:
|
||||
r8168_mac_ocp_modify(tp, 0xe092, 0x00ff, 0);
|
||||
break;
|
||||
default:
|
||||
@@ -2975,8 +2975,8 @@ static void rtl_hw_aspm_clkreq_enable(st
|
||||
}
|
||||
|
||||
switch (tp->mac_version) {
|
||||
- case RTL_GIGA_MAC_VER_65:
|
||||
- case RTL_GIGA_MAC_VER_66:
|
||||
+ case RTL_GIGA_MAC_VER_70:
|
||||
+ case RTL_GIGA_MAC_VER_71:
|
||||
val8 = RTL_R8(tp, INT_CFG0_8125) & ~INT_CFG0_CLKREQEN;
|
||||
RTL_W8(tp, INT_CFG0_8125, val8);
|
||||
break;
|
||||
@@ -3696,12 +3696,12 @@ static void rtl_hw_start_8125_common(str
|
||||
/* disable new tx descriptor format */
|
||||
r8168_mac_ocp_modify(tp, 0xeb58, 0x0001, 0x0000);
|
||||
|
||||
- if (tp->mac_version == RTL_GIGA_MAC_VER_65 ||
|
||||
- tp->mac_version == RTL_GIGA_MAC_VER_66)
|
||||
+ if (tp->mac_version == RTL_GIGA_MAC_VER_70 ||
|
||||
+ tp->mac_version == RTL_GIGA_MAC_VER_71)
|
||||
RTL_W8(tp, 0xD8, RTL_R8(tp, 0xD8) & ~0x02);
|
||||
|
||||
- if (tp->mac_version == RTL_GIGA_MAC_VER_65 ||
|
||||
- tp->mac_version == RTL_GIGA_MAC_VER_66)
|
||||
+ if (tp->mac_version == RTL_GIGA_MAC_VER_70 ||
|
||||
+ tp->mac_version == RTL_GIGA_MAC_VER_71)
|
||||
r8168_mac_ocp_modify(tp, 0xe614, 0x0700, 0x0400);
|
||||
else if (tp->mac_version == RTL_GIGA_MAC_VER_63)
|
||||
r8168_mac_ocp_modify(tp, 0xe614, 0x0700, 0x0200);
|
||||
@@ -3719,8 +3719,8 @@ static void rtl_hw_start_8125_common(str
|
||||
r8168_mac_ocp_modify(tp, 0xe056, 0x00f0, 0x0030);
|
||||
r8168_mac_ocp_modify(tp, 0xe040, 0x1000, 0x0000);
|
||||
r8168_mac_ocp_modify(tp, 0xea1c, 0x0003, 0x0001);
|
||||
- if (tp->mac_version == RTL_GIGA_MAC_VER_65 ||
|
||||
- tp->mac_version == RTL_GIGA_MAC_VER_66)
|
||||
+ if (tp->mac_version == RTL_GIGA_MAC_VER_70 ||
|
||||
+ tp->mac_version == RTL_GIGA_MAC_VER_71)
|
||||
r8168_mac_ocp_modify(tp, 0xea1c, 0x0300, 0x0000);
|
||||
else
|
||||
r8168_mac_ocp_modify(tp, 0xea1c, 0x0004, 0x0000);
|
||||
@@ -3839,8 +3839,8 @@ static void rtl_hw_config(struct rtl8169
|
||||
[RTL_GIGA_MAC_VER_61] = rtl_hw_start_8125a_2,
|
||||
[RTL_GIGA_MAC_VER_63] = rtl_hw_start_8125b,
|
||||
[RTL_GIGA_MAC_VER_64] = rtl_hw_start_8125d,
|
||||
- [RTL_GIGA_MAC_VER_65] = rtl_hw_start_8126a,
|
||||
- [RTL_GIGA_MAC_VER_66] = rtl_hw_start_8126a,
|
||||
+ [RTL_GIGA_MAC_VER_70] = rtl_hw_start_8126a,
|
||||
+ [RTL_GIGA_MAC_VER_71] = rtl_hw_start_8126a,
|
||||
};
|
||||
|
||||
if (hw_configs[tp->mac_version])
|
||||
@@ -3861,8 +3861,8 @@ static void rtl_hw_start_8125(struct rtl
|
||||
RTL_W32(tp, i, 0);
|
||||
break;
|
||||
case RTL_GIGA_MAC_VER_63:
|
||||
- case RTL_GIGA_MAC_VER_65:
|
||||
- case RTL_GIGA_MAC_VER_66:
|
||||
+ case RTL_GIGA_MAC_VER_70:
|
||||
+ case RTL_GIGA_MAC_VER_71:
|
||||
for (i = 0xa00; i < 0xa80; i += 4)
|
||||
RTL_W32(tp, i, 0);
|
||||
RTL_W16(tp, INT_CFG1_8125, 0x0000);
|
||||
@@ -4094,7 +4094,7 @@ static void rtl8169_cleanup(struct rtl81
|
||||
RTL_W8(tp, ChipCmd, RTL_R8(tp, ChipCmd) | StopReq);
|
||||
rtl_loop_wait_high(tp, &rtl_txcfg_empty_cond, 100, 666);
|
||||
break;
|
||||
- case RTL_GIGA_MAC_VER_40 ... RTL_GIGA_MAC_VER_66:
|
||||
+ case RTL_GIGA_MAC_VER_40 ... RTL_GIGA_MAC_VER_71:
|
||||
rtl_enable_rxdvgate(tp);
|
||||
fsleep(2000);
|
||||
break;
|
||||
@@ -4251,7 +4251,7 @@ static unsigned int rtl_quirk_packet_pad
|
||||
|
||||
switch (tp->mac_version) {
|
||||
case RTL_GIGA_MAC_VER_34:
|
||||
- case RTL_GIGA_MAC_VER_61 ... RTL_GIGA_MAC_VER_66:
|
||||
+ case RTL_GIGA_MAC_VER_61 ... RTL_GIGA_MAC_VER_71:
|
||||
padto = max_t(unsigned int, padto, ETH_ZLEN);
|
||||
break;
|
||||
default:
|
||||
@@ -5272,7 +5272,7 @@ static void rtl_hw_initialize(struct rtl
|
||||
case RTL_GIGA_MAC_VER_40 ... RTL_GIGA_MAC_VER_48:
|
||||
rtl_hw_init_8168g(tp);
|
||||
break;
|
||||
- case RTL_GIGA_MAC_VER_61 ... RTL_GIGA_MAC_VER_66:
|
||||
+ case RTL_GIGA_MAC_VER_61 ... RTL_GIGA_MAC_VER_71:
|
||||
rtl_hw_init_8125(tp);
|
||||
break;
|
||||
default:
|
||||
--- a/drivers/net/ethernet/realtek/r8169_phy_config.c
|
||||
+++ b/drivers/net/ethernet/realtek/r8169_phy_config.c
|
||||
@@ -1162,8 +1162,8 @@ void r8169_hw_phy_config(struct rtl8169_
|
||||
[RTL_GIGA_MAC_VER_61] = rtl8125a_2_hw_phy_config,
|
||||
[RTL_GIGA_MAC_VER_63] = rtl8125b_hw_phy_config,
|
||||
[RTL_GIGA_MAC_VER_64] = rtl8125d_hw_phy_config,
|
||||
- [RTL_GIGA_MAC_VER_65] = rtl8126a_hw_phy_config,
|
||||
- [RTL_GIGA_MAC_VER_66] = rtl8126a_hw_phy_config,
|
||||
+ [RTL_GIGA_MAC_VER_70] = rtl8126a_hw_phy_config,
|
||||
+ [RTL_GIGA_MAC_VER_71] = rtl8126a_hw_phy_config,
|
||||
};
|
||||
|
||||
if (phy_configs[ver])
|
|
@ -0,0 +1,90 @@
|
|||
From b3593df26ab19f114d613693fa8a92ab202803d0 Mon Sep 17 00:00:00 2001
|
||||
From: ChunHao Lin <hau@realtek.com>
|
||||
Date: Fri, 13 Dec 2024 20:02:58 +0100
|
||||
Subject: [PATCH] r8169: add support for RTL8125D rev.b
|
||||
|
||||
Add support for RTL8125D rev.b. Its XID is 0x689. It is basically
|
||||
based on the one with XID 0x688, but with different firmware file.
|
||||
|
||||
Signed-off-by: ChunHao Lin <hau@realtek.com>
|
||||
[hkallweit1@gmail.com: rebased after adjusted version numbering]
|
||||
Signed-off-by: Heiner Kallweit <hkallweit1@gmail.com>
|
||||
Reviewed-by: Simon Horman <horms@kernel.org>
|
||||
Link: https://patch.msgid.link/75e5e9ec-d01f-43ac-b0f4-e7456baf18d1@gmail.com
|
||||
Signed-off-by: Jakub Kicinski <kuba@kernel.org>
|
||||
---
|
||||
drivers/net/ethernet/realtek/r8169.h | 1 +
|
||||
drivers/net/ethernet/realtek/r8169_main.c | 6 ++++++
|
||||
drivers/net/ethernet/realtek/r8169_phy_config.c | 1 +
|
||||
3 files changed, 8 insertions(+)
|
||||
|
||||
--- a/drivers/net/ethernet/realtek/r8169.h
|
||||
+++ b/drivers/net/ethernet/realtek/r8169.h
|
||||
@@ -69,6 +69,7 @@ enum mac_version {
|
||||
RTL_GIGA_MAC_VER_61,
|
||||
RTL_GIGA_MAC_VER_63,
|
||||
RTL_GIGA_MAC_VER_64,
|
||||
+ RTL_GIGA_MAC_VER_65,
|
||||
RTL_GIGA_MAC_VER_70,
|
||||
RTL_GIGA_MAC_VER_71,
|
||||
RTL_GIGA_MAC_NONE
|
||||
--- a/drivers/net/ethernet/realtek/r8169_main.c
|
||||
+++ b/drivers/net/ethernet/realtek/r8169_main.c
|
||||
@@ -56,6 +56,7 @@
|
||||
#define FIRMWARE_8125A_3 "rtl_nic/rtl8125a-3.fw"
|
||||
#define FIRMWARE_8125B_2 "rtl_nic/rtl8125b-2.fw"
|
||||
#define FIRMWARE_8125D_1 "rtl_nic/rtl8125d-1.fw"
|
||||
+#define FIRMWARE_8125D_2 "rtl_nic/rtl8125d-2.fw"
|
||||
#define FIRMWARE_8126A_2 "rtl_nic/rtl8126a-2.fw"
|
||||
#define FIRMWARE_8126A_3 "rtl_nic/rtl8126a-3.fw"
|
||||
|
||||
@@ -139,6 +140,7 @@ static const struct {
|
||||
/* reserve 62 for CFG_METHOD_4 in the vendor driver */
|
||||
[RTL_GIGA_MAC_VER_63] = {"RTL8125B", FIRMWARE_8125B_2},
|
||||
[RTL_GIGA_MAC_VER_64] = {"RTL8125D", FIRMWARE_8125D_1},
|
||||
+ [RTL_GIGA_MAC_VER_65] = {"RTL8125D", FIRMWARE_8125D_2},
|
||||
[RTL_GIGA_MAC_VER_70] = {"RTL8126A", FIRMWARE_8126A_2},
|
||||
[RTL_GIGA_MAC_VER_71] = {"RTL8126A", FIRMWARE_8126A_3},
|
||||
};
|
||||
@@ -706,6 +708,7 @@ MODULE_FIRMWARE(FIRMWARE_8107E_2);
|
||||
MODULE_FIRMWARE(FIRMWARE_8125A_3);
|
||||
MODULE_FIRMWARE(FIRMWARE_8125B_2);
|
||||
MODULE_FIRMWARE(FIRMWARE_8125D_1);
|
||||
+MODULE_FIRMWARE(FIRMWARE_8125D_2);
|
||||
MODULE_FIRMWARE(FIRMWARE_8126A_2);
|
||||
MODULE_FIRMWARE(FIRMWARE_8126A_3);
|
||||
|
||||
@@ -2259,6 +2262,7 @@ static enum mac_version rtl8169_get_mac_
|
||||
{ 0x7cf, 0x649, RTL_GIGA_MAC_VER_70 },
|
||||
|
||||
/* 8125D family. */
|
||||
+ { 0x7cf, 0x689, RTL_GIGA_MAC_VER_65 },
|
||||
{ 0x7cf, 0x688, RTL_GIGA_MAC_VER_64 },
|
||||
|
||||
/* 8125B family. */
|
||||
@@ -3839,6 +3843,7 @@ static void rtl_hw_config(struct rtl8169
|
||||
[RTL_GIGA_MAC_VER_61] = rtl_hw_start_8125a_2,
|
||||
[RTL_GIGA_MAC_VER_63] = rtl_hw_start_8125b,
|
||||
[RTL_GIGA_MAC_VER_64] = rtl_hw_start_8125d,
|
||||
+ [RTL_GIGA_MAC_VER_65] = rtl_hw_start_8125d,
|
||||
[RTL_GIGA_MAC_VER_70] = rtl_hw_start_8126a,
|
||||
[RTL_GIGA_MAC_VER_71] = rtl_hw_start_8126a,
|
||||
};
|
||||
@@ -3857,6 +3862,7 @@ static void rtl_hw_start_8125(struct rtl
|
||||
switch (tp->mac_version) {
|
||||
case RTL_GIGA_MAC_VER_61:
|
||||
case RTL_GIGA_MAC_VER_64:
|
||||
+ case RTL_GIGA_MAC_VER_65:
|
||||
for (i = 0xa00; i < 0xb00; i += 4)
|
||||
RTL_W32(tp, i, 0);
|
||||
break;
|
||||
--- a/drivers/net/ethernet/realtek/r8169_phy_config.c
|
||||
+++ b/drivers/net/ethernet/realtek/r8169_phy_config.c
|
||||
@@ -1162,6 +1162,7 @@ void r8169_hw_phy_config(struct rtl8169_
|
||||
[RTL_GIGA_MAC_VER_61] = rtl8125a_2_hw_phy_config,
|
||||
[RTL_GIGA_MAC_VER_63] = rtl8125b_hw_phy_config,
|
||||
[RTL_GIGA_MAC_VER_64] = rtl8125d_hw_phy_config,
|
||||
+ [RTL_GIGA_MAC_VER_65] = rtl8125d_hw_phy_config,
|
||||
[RTL_GIGA_MAC_VER_70] = rtl8126a_hw_phy_config,
|
||||
[RTL_GIGA_MAC_VER_71] = rtl8126a_hw_phy_config,
|
||||
};
|
|
@ -0,0 +1,184 @@
|
|||
From b11bff90f2ad52c5c55c822ecd20326619a73898 Mon Sep 17 00:00:00 2001
|
||||
From: ChunHao Lin <hau@realtek.com>
|
||||
Date: Tue, 7 Jan 2025 14:43:55 +0800
|
||||
Subject: [PATCH] r8169: add support for RTL8125BP rev.b
|
||||
|
||||
Add support for RTL8125BP rev.b. Its XID is 0x689. This chip supports
|
||||
DASH and its dash type is "RTL_DASH_25_BP".
|
||||
|
||||
Signed-off-by: ChunHao Lin <hau@realtek.com>
|
||||
Reviewed-by: Heiner Kallweit <hkallweit1@gmail.com>
|
||||
Link: https://patch.msgid.link/20250107064355.104711-1-hau@realtek.com
|
||||
Signed-off-by: Paolo Abeni <pabeni@redhat.com>
|
||||
---
|
||||
drivers/net/ethernet/realtek/r8169.h | 1 +
|
||||
drivers/net/ethernet/realtek/r8169_main.c | 30 +++++++++++++++++++
|
||||
.../net/ethernet/realtek/r8169_phy_config.c | 23 ++++++++++++++
|
||||
3 files changed, 54 insertions(+)
|
||||
|
||||
--- a/drivers/net/ethernet/realtek/r8169.h
|
||||
+++ b/drivers/net/ethernet/realtek/r8169.h
|
||||
@@ -70,6 +70,7 @@ enum mac_version {
|
||||
RTL_GIGA_MAC_VER_63,
|
||||
RTL_GIGA_MAC_VER_64,
|
||||
RTL_GIGA_MAC_VER_65,
|
||||
+ RTL_GIGA_MAC_VER_66,
|
||||
RTL_GIGA_MAC_VER_70,
|
||||
RTL_GIGA_MAC_VER_71,
|
||||
RTL_GIGA_MAC_NONE
|
||||
--- a/drivers/net/ethernet/realtek/r8169_main.c
|
||||
+++ b/drivers/net/ethernet/realtek/r8169_main.c
|
||||
@@ -57,6 +57,7 @@
|
||||
#define FIRMWARE_8125B_2 "rtl_nic/rtl8125b-2.fw"
|
||||
#define FIRMWARE_8125D_1 "rtl_nic/rtl8125d-1.fw"
|
||||
#define FIRMWARE_8125D_2 "rtl_nic/rtl8125d-2.fw"
|
||||
+#define FIRMWARE_8125BP_2 "rtl_nic/rtl8125bp-2.fw"
|
||||
#define FIRMWARE_8126A_2 "rtl_nic/rtl8126a-2.fw"
|
||||
#define FIRMWARE_8126A_3 "rtl_nic/rtl8126a-3.fw"
|
||||
|
||||
@@ -141,6 +142,7 @@ static const struct {
|
||||
[RTL_GIGA_MAC_VER_63] = {"RTL8125B", FIRMWARE_8125B_2},
|
||||
[RTL_GIGA_MAC_VER_64] = {"RTL8125D", FIRMWARE_8125D_1},
|
||||
[RTL_GIGA_MAC_VER_65] = {"RTL8125D", FIRMWARE_8125D_2},
|
||||
+ [RTL_GIGA_MAC_VER_66] = {"RTL8125BP", FIRMWARE_8125BP_2},
|
||||
[RTL_GIGA_MAC_VER_70] = {"RTL8126A", FIRMWARE_8126A_2},
|
||||
[RTL_GIGA_MAC_VER_71] = {"RTL8126A", FIRMWARE_8126A_3},
|
||||
};
|
||||
@@ -632,6 +634,7 @@ enum rtl_dash_type {
|
||||
RTL_DASH_NONE,
|
||||
RTL_DASH_DP,
|
||||
RTL_DASH_EP,
|
||||
+ RTL_DASH_25_BP,
|
||||
};
|
||||
|
||||
struct rtl8169_private {
|
||||
@@ -709,6 +712,7 @@ MODULE_FIRMWARE(FIRMWARE_8125A_3);
|
||||
MODULE_FIRMWARE(FIRMWARE_8125B_2);
|
||||
MODULE_FIRMWARE(FIRMWARE_8125D_1);
|
||||
MODULE_FIRMWARE(FIRMWARE_8125D_2);
|
||||
+MODULE_FIRMWARE(FIRMWARE_8125BP_2);
|
||||
MODULE_FIRMWARE(FIRMWARE_8126A_2);
|
||||
MODULE_FIRMWARE(FIRMWARE_8126A_3);
|
||||
|
||||
@@ -1361,10 +1365,19 @@ static void rtl8168ep_driver_start(struc
|
||||
rtl_loop_wait_high(tp, &rtl_ep_ocp_read_cond, 10000, 30);
|
||||
}
|
||||
|
||||
+static void rtl8125bp_driver_start(struct rtl8169_private *tp)
|
||||
+{
|
||||
+ r8168ep_ocp_write(tp, 0x01, 0x14, OOB_CMD_DRIVER_START);
|
||||
+ r8168ep_ocp_write(tp, 0x01, 0x18, 0x00);
|
||||
+ r8168ep_ocp_write(tp, 0x01, 0x10, 0x01);
|
||||
+}
|
||||
+
|
||||
static void rtl8168_driver_start(struct rtl8169_private *tp)
|
||||
{
|
||||
if (tp->dash_type == RTL_DASH_DP)
|
||||
rtl8168dp_driver_start(tp);
|
||||
+ else if (tp->dash_type == RTL_DASH_25_BP)
|
||||
+ rtl8125bp_driver_start(tp);
|
||||
else
|
||||
rtl8168ep_driver_start(tp);
|
||||
}
|
||||
@@ -1385,10 +1398,19 @@ static void rtl8168ep_driver_stop(struct
|
||||
rtl_loop_wait_low(tp, &rtl_ep_ocp_read_cond, 10000, 10);
|
||||
}
|
||||
|
||||
+static void rtl8125bp_driver_stop(struct rtl8169_private *tp)
|
||||
+{
|
||||
+ r8168ep_ocp_write(tp, 0x01, 0x14, OOB_CMD_DRIVER_STOP);
|
||||
+ r8168ep_ocp_write(tp, 0x01, 0x18, 0x00);
|
||||
+ r8168ep_ocp_write(tp, 0x01, 0x10, 0x01);
|
||||
+}
|
||||
+
|
||||
static void rtl8168_driver_stop(struct rtl8169_private *tp)
|
||||
{
|
||||
if (tp->dash_type == RTL_DASH_DP)
|
||||
rtl8168dp_driver_stop(tp);
|
||||
+ else if (tp->dash_type == RTL_DASH_25_BP)
|
||||
+ rtl8125bp_driver_stop(tp);
|
||||
else
|
||||
rtl8168ep_driver_stop(tp);
|
||||
}
|
||||
@@ -1411,6 +1433,7 @@ static bool rtl_dash_is_enabled(struct r
|
||||
case RTL_DASH_DP:
|
||||
return r8168dp_check_dash(tp);
|
||||
case RTL_DASH_EP:
|
||||
+ case RTL_DASH_25_BP:
|
||||
return r8168ep_check_dash(tp);
|
||||
default:
|
||||
return false;
|
||||
@@ -1425,6 +1448,8 @@ static enum rtl_dash_type rtl_get_dash_t
|
||||
return RTL_DASH_DP;
|
||||
case RTL_GIGA_MAC_VER_51 ... RTL_GIGA_MAC_VER_53:
|
||||
return RTL_DASH_EP;
|
||||
+ case RTL_GIGA_MAC_VER_66:
|
||||
+ return RTL_DASH_25_BP;
|
||||
default:
|
||||
return RTL_DASH_NONE;
|
||||
}
|
||||
@@ -2261,6 +2286,9 @@ static enum mac_version rtl8169_get_mac_
|
||||
{ 0x7cf, 0x64a, RTL_GIGA_MAC_VER_71 },
|
||||
{ 0x7cf, 0x649, RTL_GIGA_MAC_VER_70 },
|
||||
|
||||
+ /* 8125BP family. */
|
||||
+ { 0x7cf, 0x681, RTL_GIGA_MAC_VER_66 },
|
||||
+
|
||||
/* 8125D family. */
|
||||
{ 0x7cf, 0x689, RTL_GIGA_MAC_VER_65 },
|
||||
{ 0x7cf, 0x688, RTL_GIGA_MAC_VER_64 },
|
||||
@@ -3844,6 +3872,7 @@ static void rtl_hw_config(struct rtl8169
|
||||
[RTL_GIGA_MAC_VER_63] = rtl_hw_start_8125b,
|
||||
[RTL_GIGA_MAC_VER_64] = rtl_hw_start_8125d,
|
||||
[RTL_GIGA_MAC_VER_65] = rtl_hw_start_8125d,
|
||||
+ [RTL_GIGA_MAC_VER_66] = rtl_hw_start_8125d,
|
||||
[RTL_GIGA_MAC_VER_70] = rtl_hw_start_8126a,
|
||||
[RTL_GIGA_MAC_VER_71] = rtl_hw_start_8126a,
|
||||
};
|
||||
@@ -3863,6 +3892,7 @@ static void rtl_hw_start_8125(struct rtl
|
||||
case RTL_GIGA_MAC_VER_61:
|
||||
case RTL_GIGA_MAC_VER_64:
|
||||
case RTL_GIGA_MAC_VER_65:
|
||||
+ case RTL_GIGA_MAC_VER_66:
|
||||
for (i = 0xa00; i < 0xb00; i += 4)
|
||||
RTL_W32(tp, i, 0);
|
||||
break;
|
||||
--- a/drivers/net/ethernet/realtek/r8169_phy_config.c
|
||||
+++ b/drivers/net/ethernet/realtek/r8169_phy_config.c
|
||||
@@ -1102,6 +1102,28 @@ static void rtl8125d_hw_phy_config(struc
|
||||
rtl8125_config_eee_phy(phydev);
|
||||
}
|
||||
|
||||
+static void rtl8125bp_hw_phy_config(struct rtl8169_private *tp,
|
||||
+ struct phy_device *phydev)
|
||||
+{
|
||||
+ r8169_apply_firmware(tp);
|
||||
+ rtl8168g_enable_gphy_10m(phydev);
|
||||
+
|
||||
+ r8168g_phy_param(phydev, 0x8010, 0x0800, 0x0000);
|
||||
+
|
||||
+ phy_write(phydev, 0x1f, 0x0b87);
|
||||
+ phy_write(phydev, 0x16, 0x8088);
|
||||
+ phy_modify(phydev, 0x17, 0xff00, 0x9000);
|
||||
+ phy_write(phydev, 0x16, 0x808f);
|
||||
+ phy_modify(phydev, 0x17, 0xff00, 0x9000);
|
||||
+ phy_write(phydev, 0x1f, 0x0000);
|
||||
+
|
||||
+ r8168g_phy_param(phydev, 0x8174, 0x2000, 0x1800);
|
||||
+
|
||||
+ rtl8125_legacy_force_mode(phydev);
|
||||
+ rtl8168g_disable_aldps(phydev);
|
||||
+ rtl8125_config_eee_phy(phydev);
|
||||
+}
|
||||
+
|
||||
static void rtl8126a_hw_phy_config(struct rtl8169_private *tp,
|
||||
struct phy_device *phydev)
|
||||
{
|
||||
@@ -1163,6 +1185,7 @@ void r8169_hw_phy_config(struct rtl8169_
|
||||
[RTL_GIGA_MAC_VER_63] = rtl8125b_hw_phy_config,
|
||||
[RTL_GIGA_MAC_VER_64] = rtl8125d_hw_phy_config,
|
||||
[RTL_GIGA_MAC_VER_65] = rtl8125d_hw_phy_config,
|
||||
+ [RTL_GIGA_MAC_VER_66] = rtl8125bp_hw_phy_config,
|
||||
[RTL_GIGA_MAC_VER_70] = rtl8126a_hw_phy_config,
|
||||
[RTL_GIGA_MAC_VER_71] = rtl8126a_hw_phy_config,
|
||||
};
|
|
@ -0,0 +1,136 @@
|
|||
From f87a17ed3b51fba4dfdd8f8b643b5423a85fc551 Mon Sep 17 00:00:00 2001
|
||||
From: Heiner Kallweit <hkallweit1@gmail.com>
|
||||
Date: Tue, 15 Oct 2024 07:47:14 +0200
|
||||
Subject: [PATCH] net: phy: realtek: merge the drivers for internal NBase-T
|
||||
PHY's
|
||||
|
||||
The Realtek RTL8125/RTL8126 NBase-T MAC/PHY chips have internal PHY's
|
||||
which are register-compatible, at least for the registers we use here.
|
||||
So let's use just one PHY driver to support all of them.
|
||||
These internal PHY's exist also as external C45 PHY's, but on the
|
||||
internal PHY's no access to MMD registers is possible. This can be
|
||||
used to differentiate between the internal and external version.
|
||||
|
||||
As a side effect the drivers for two now external-only drivers don't
|
||||
require read_mmd/write_mmd hooks any longer.
|
||||
|
||||
Signed-off-by: Heiner Kallweit <hkallweit1@gmail.com>
|
||||
Link: https://patch.msgid.link/c57081a6-811f-4571-ab35-34f4ca6de9af@gmail.com
|
||||
Signed-off-by: Paolo Abeni <pabeni@redhat.com>
|
||||
---
|
||||
drivers/net/phy/realtek.c | 53 +++++++++++++++++++++++++++++++--------
|
||||
1 file changed, 43 insertions(+), 10 deletions(-)
|
||||
|
||||
--- a/drivers/net/phy/realtek.c
|
||||
+++ b/drivers/net/phy/realtek.c
|
||||
@@ -95,6 +95,7 @@
|
||||
|
||||
#define RTL_GENERIC_PHYID 0x001cc800
|
||||
#define RTL_8211FVD_PHYID 0x001cc878
|
||||
+#define RTL_8221B 0x001cc840
|
||||
#define RTL_8221B_VB_CG 0x001cc849
|
||||
#define RTL_8221B_VN_CG 0x001cc84a
|
||||
#define RTL_8251B 0x001cc862
|
||||
@@ -1077,6 +1078,23 @@ static bool rtlgen_supports_2_5gbps(stru
|
||||
return val >= 0 && val & MDIO_PMA_SPEED_2_5G;
|
||||
}
|
||||
|
||||
+/* On internal PHY's MMD reads over C22 always return 0.
|
||||
+ * Check a MMD register which is known to be non-zero.
|
||||
+ */
|
||||
+static bool rtlgen_supports_mmd(struct phy_device *phydev)
|
||||
+{
|
||||
+ int val;
|
||||
+
|
||||
+ phy_lock_mdio_bus(phydev);
|
||||
+ __phy_write(phydev, MII_MMD_CTRL, MDIO_MMD_PCS);
|
||||
+ __phy_write(phydev, MII_MMD_DATA, MDIO_PCS_EEE_ABLE);
|
||||
+ __phy_write(phydev, MII_MMD_CTRL, MDIO_MMD_PCS | MII_MMD_CTRL_NOINCR);
|
||||
+ val = __phy_read(phydev, MII_MMD_DATA);
|
||||
+ phy_unlock_mdio_bus(phydev);
|
||||
+
|
||||
+ return val > 0;
|
||||
+}
|
||||
+
|
||||
static int rtlgen_match_phy_device(struct phy_device *phydev)
|
||||
{
|
||||
return phydev->phy_id == RTL_GENERIC_PHYID &&
|
||||
@@ -1086,7 +1104,8 @@ static int rtlgen_match_phy_device(struc
|
||||
static int rtl8226_match_phy_device(struct phy_device *phydev)
|
||||
{
|
||||
return phydev->phy_id == RTL_GENERIC_PHYID &&
|
||||
- rtlgen_supports_2_5gbps(phydev);
|
||||
+ rtlgen_supports_2_5gbps(phydev) &&
|
||||
+ rtlgen_supports_mmd(phydev);
|
||||
}
|
||||
|
||||
static int rtlgen_is_c45_match(struct phy_device *phydev, unsigned int id,
|
||||
@@ -1098,6 +1117,11 @@ static int rtlgen_is_c45_match(struct ph
|
||||
return !is_c45 && (id == phydev->phy_id);
|
||||
}
|
||||
|
||||
+static int rtl8221b_match_phy_device(struct phy_device *phydev)
|
||||
+{
|
||||
+ return phydev->phy_id == RTL_8221B && rtlgen_supports_mmd(phydev);
|
||||
+}
|
||||
+
|
||||
static int rtl8221b_vb_cg_c22_match_phy_device(struct phy_device *phydev)
|
||||
{
|
||||
return rtlgen_is_c45_match(phydev, RTL_8221B_VB_CG, false);
|
||||
@@ -1118,9 +1142,21 @@ static int rtl8221b_vn_cg_c45_match_phy_
|
||||
return rtlgen_is_c45_match(phydev, RTL_8221B_VN_CG, true);
|
||||
}
|
||||
|
||||
-static int rtl8251b_c22_match_phy_device(struct phy_device *phydev)
|
||||
+static int rtl_internal_nbaset_match_phy_device(struct phy_device *phydev)
|
||||
{
|
||||
- return rtlgen_is_c45_match(phydev, RTL_8251B, false);
|
||||
+ if (phydev->is_c45)
|
||||
+ return false;
|
||||
+
|
||||
+ switch (phydev->phy_id) {
|
||||
+ case RTL_GENERIC_PHYID:
|
||||
+ case RTL_8221B:
|
||||
+ case RTL_8251B:
|
||||
+ break;
|
||||
+ default:
|
||||
+ return false;
|
||||
+ }
|
||||
+
|
||||
+ return rtlgen_supports_2_5gbps(phydev) && !rtlgen_supports_mmd(phydev);
|
||||
}
|
||||
|
||||
static int rtl8251b_c45_match_phy_device(struct phy_device *phydev)
|
||||
@@ -1382,10 +1418,8 @@ static struct phy_driver realtek_drvs[]
|
||||
.resume = rtlgen_resume,
|
||||
.read_page = rtl821x_read_page,
|
||||
.write_page = rtl821x_write_page,
|
||||
- .read_mmd = rtl822x_read_mmd,
|
||||
- .write_mmd = rtl822x_write_mmd,
|
||||
}, {
|
||||
- PHY_ID_MATCH_EXACT(0x001cc840),
|
||||
+ .match_phy_device = rtl8221b_match_phy_device,
|
||||
.name = "RTL8226B_RTL8221B 2.5Gbps PHY",
|
||||
.get_features = rtl822x_get_features,
|
||||
.config_aneg = rtl822x_config_aneg,
|
||||
@@ -1396,8 +1430,6 @@ static struct phy_driver realtek_drvs[]
|
||||
.resume = rtlgen_resume,
|
||||
.read_page = rtl821x_read_page,
|
||||
.write_page = rtl821x_write_page,
|
||||
- .read_mmd = rtl822x_read_mmd,
|
||||
- .write_mmd = rtl822x_write_mmd,
|
||||
}, {
|
||||
PHY_ID_MATCH_EXACT(0x001cc838),
|
||||
.name = "RTL8226-CG 2.5Gbps PHY",
|
||||
@@ -1475,8 +1507,9 @@ static struct phy_driver realtek_drvs[]
|
||||
.read_page = rtl821x_read_page,
|
||||
.write_page = rtl821x_write_page,
|
||||
}, {
|
||||
- .match_phy_device = rtl8251b_c22_match_phy_device,
|
||||
- .name = "RTL8126A-internal 5Gbps PHY",
|
||||
+ .match_phy_device = rtl_internal_nbaset_match_phy_device,
|
||||
+ .name = "Realtek Internal NBASE-T PHY",
|
||||
+ .flags = PHY_IS_INTERNAL,
|
||||
.get_features = rtl822x_get_features,
|
||||
.config_aneg = rtl822x_config_aneg,
|
||||
.read_status = rtl822x_read_status,
|
|
@ -0,0 +1,29 @@
|
|||
From 8989bad541133c43550bff2b80edbe37b8fb9659 Mon Sep 17 00:00:00 2001
|
||||
From: Heiner Kallweit <hkallweit1@gmail.com>
|
||||
Date: Thu, 17 Oct 2024 18:01:13 +0200
|
||||
Subject: [PATCH] net: phy: realtek: add RTL8125D-internal PHY
|
||||
|
||||
The first boards show up with Realtek's RTL8125D. This MAC/PHY chip
|
||||
comes with an integrated 2.5Gbps PHY with ID 0x001cc841. It's not
|
||||
clear yet whether there's an external version of this PHY and how
|
||||
Realtek calls it, therefore use the numeric id for now.
|
||||
|
||||
Link: https://lore.kernel.org/netdev/2ada65e1-5dfa-456c-9334-2bc51272e9da@gmail.com/T/
|
||||
Signed-off-by: Heiner Kallweit <hkallweit1@gmail.com>
|
||||
Message-ID: <7d2924de-053b-44d2-a479-870dc3878170@gmail.com>
|
||||
Reviewed-by: Andrew Lunn <andrew@lunn.ch>
|
||||
Signed-off-by: Andrew Lunn <andrew@lunn.ch>
|
||||
---
|
||||
drivers/net/phy/realtek.c | 1 +
|
||||
1 file changed, 1 insertion(+)
|
||||
|
||||
--- a/drivers/net/phy/realtek.c
|
||||
+++ b/drivers/net/phy/realtek.c
|
||||
@@ -1151,6 +1151,7 @@ static int rtl_internal_nbaset_match_phy
|
||||
case RTL_GENERIC_PHYID:
|
||||
case RTL_8221B:
|
||||
case RTL_8251B:
|
||||
+ case 0x001cc841:
|
||||
break;
|
||||
default:
|
||||
return false;
|
|
@ -0,0 +1,52 @@
|
|||
From 34d5a86ff7bbe225fba3ad91f9b4dc85fb408e18 Mon Sep 17 00:00:00 2001
|
||||
From: Daniel Golle <daniel@makrotopia.org>
|
||||
Date: Wed, 15 Jan 2025 14:43:35 +0000
|
||||
Subject: [PATCH] net: phy: realtek: clear 1000Base-T lpa if link is down
|
||||
|
||||
Only read 1000Base-T link partner advertisement if autonegotiation has
|
||||
completed and otherwise 1000Base-T link partner advertisement bits.
|
||||
|
||||
This fixes bogus 1000Base-T link partner advertisement after link goes
|
||||
down (eg. by disconnecting the wire).
|
||||
Fixes: 5cb409b3960e ("net: phy: realtek: clear 1000Base-T link partner advertisement")
|
||||
Signed-off-by: Daniel Golle <daniel@makrotopia.org>
|
||||
Reviewed-by: Michal Swiatkowski <michal.swiatkowski@linux.intel.com>
|
||||
Signed-off-by: David S. Miller <davem@davemloft.net>
|
||||
---
|
||||
drivers/net/phy/realtek.c | 19 ++++++++-----------
|
||||
1 file changed, 8 insertions(+), 11 deletions(-)
|
||||
|
||||
--- a/drivers/net/phy/realtek.c
|
||||
+++ b/drivers/net/phy/realtek.c
|
||||
@@ -1023,23 +1023,20 @@ static int rtl822x_c45_read_status(struc
|
||||
{
|
||||
int ret, val;
|
||||
|
||||
- ret = genphy_c45_read_status(phydev);
|
||||
- if (ret < 0)
|
||||
- return ret;
|
||||
-
|
||||
- if (phydev->autoneg == AUTONEG_DISABLE ||
|
||||
- !genphy_c45_aneg_done(phydev))
|
||||
- mii_stat1000_mod_linkmode_lpa_t(phydev->lp_advertising, 0);
|
||||
-
|
||||
/* Vendor register as C45 has no standardized support for 1000BaseT */
|
||||
- if (phydev->autoneg == AUTONEG_ENABLE) {
|
||||
+ if (phydev->autoneg == AUTONEG_ENABLE && genphy_c45_aneg_done(phydev)) {
|
||||
val = phy_read_mmd(phydev, MDIO_MMD_VEND2,
|
||||
RTL822X_VND2_GANLPAR);
|
||||
if (val < 0)
|
||||
return val;
|
||||
-
|
||||
- mii_stat1000_mod_linkmode_lpa_t(phydev->lp_advertising, val);
|
||||
+ } else {
|
||||
+ val = 0;
|
||||
}
|
||||
+ mii_stat1000_mod_linkmode_lpa_t(phydev->lp_advertising, val);
|
||||
+
|
||||
+ ret = genphy_c45_read_status(phydev);
|
||||
+ if (ret < 0)
|
||||
+ return ret;
|
||||
|
||||
if (!phydev->link)
|
||||
return 0;
|
|
@ -0,0 +1,35 @@
|
|||
From ea8318cb33e593bbfc59d637eae45a69732c5387 Mon Sep 17 00:00:00 2001
|
||||
From: Daniel Golle <daniel@makrotopia.org>
|
||||
Date: Wed, 15 Jan 2025 14:43:43 +0000
|
||||
Subject: [PATCH] net: phy: realtek: clear master_slave_state if link is down
|
||||
|
||||
rtlgen_decode_physr() which sets master_slave_state isn't called in case
|
||||
the link is down and other than rtlgen_read_status(),
|
||||
rtl822x_c45_read_status() doesn't implicitely clear master_slave_state.
|
||||
|
||||
Avoid stale master_slave_state by always setting it to
|
||||
MASTER_SLAVE_STATE_UNKNOWN in rtl822x_c45_read_status() in case the link
|
||||
is down.
|
||||
|
||||
Fixes: 081c9c0265c9 ("net: phy: realtek: read duplex and gbit master from PHYSR register")
|
||||
Signed-off-by: Daniel Golle <daniel@makrotopia.org>
|
||||
Reviewed-by: Michal Swiatkowski <michal.swiatkowski@linux.intel.com>
|
||||
Signed-off-by: David S. Miller <davem@davemloft.net>
|
||||
---
|
||||
drivers/net/phy/realtek.c | 4 +++-
|
||||
1 file changed, 3 insertions(+), 1 deletion(-)
|
||||
|
||||
--- a/drivers/net/phy/realtek.c
|
||||
+++ b/drivers/net/phy/realtek.c
|
||||
@@ -1038,8 +1038,10 @@ static int rtl822x_c45_read_status(struc
|
||||
if (ret < 0)
|
||||
return ret;
|
||||
|
||||
- if (!phydev->link)
|
||||
+ if (!phydev->link) {
|
||||
+ phydev->master_slave_state = MASTER_SLAVE_STATE_UNKNOWN;
|
||||
return 0;
|
||||
+ }
|
||||
|
||||
/* Read actual speed from vendor register. */
|
||||
val = phy_read_mmd(phydev, MDIO_MMD_VEND2, RTL_VND2_PHYSR);
|
|
@ -0,0 +1,42 @@
|
|||
From d3eb58549842c60ed46f37da7f4da969e3d6ecd3 Mon Sep 17 00:00:00 2001
|
||||
From: Daniel Golle <daniel@makrotopia.org>
|
||||
Date: Wed, 15 Jan 2025 14:45:00 +0000
|
||||
Subject: [PATCH] net: phy: realtek: always clear NBase-T lpa
|
||||
|
||||
Clear NBase-T link partner advertisement before calling
|
||||
rtlgen_read_status() to avoid phy_resolve_aneg_linkmode() wrongly
|
||||
setting speed and duplex.
|
||||
|
||||
This fixes bogus 2.5G/5G/10G link partner advertisement and thus
|
||||
speed and duplex being set by phy_resolve_aneg_linkmode() due to stale
|
||||
NBase-T lpa.
|
||||
|
||||
Fixes: 68d5cd09e891 ("net: phy: realtek: change order of calls in C22 read_status()")
|
||||
Signed-off-by: Daniel Golle <daniel@makrotopia.org>
|
||||
Reviewed-by: Michal Swiatkowski <michal.swiatkowski@linux.intel.com>
|
||||
Signed-off-by: David S. Miller <davem@davemloft.net>
|
||||
---
|
||||
drivers/net/phy/realtek.c | 6 +++---
|
||||
1 file changed, 3 insertions(+), 3 deletions(-)
|
||||
|
||||
--- a/drivers/net/phy/realtek.c
|
||||
+++ b/drivers/net/phy/realtek.c
|
||||
@@ -952,15 +952,15 @@ static int rtl822x_read_status(struct ph
|
||||
{
|
||||
int lpadv, ret;
|
||||
|
||||
+ mii_10gbt_stat_mod_linkmode_lpa_t(phydev->lp_advertising, 0);
|
||||
+
|
||||
ret = rtlgen_read_status(phydev);
|
||||
if (ret < 0)
|
||||
return ret;
|
||||
|
||||
if (phydev->autoneg == AUTONEG_DISABLE ||
|
||||
- !phydev->autoneg_complete) {
|
||||
- mii_10gbt_stat_mod_linkmode_lpa_t(phydev->lp_advertising, 0);
|
||||
+ !phydev->autoneg_complete)
|
||||
return 0;
|
||||
- }
|
||||
|
||||
lpadv = phy_read_paged(phydev, 0xa5d, 0x13);
|
||||
if (lpadv < 0)
|
|
@ -0,0 +1,47 @@
|
|||
From 3d483a10327f38595f714f9f9e9dde43a622cb0f Mon Sep 17 00:00:00 2001
|
||||
From: Heiner Kallweit <hkallweit1@gmail.com>
|
||||
Date: Sat, 11 Jan 2025 21:49:31 +0100
|
||||
Subject: [PATCH] net: phy: realtek: add support for reading MDIO_MMD_VEND2
|
||||
regs on RTL8125/RTL8126
|
||||
|
||||
RTL8125/RTL8126 don't support MMD access to the internal PHY, but
|
||||
provide a mechanism to access at least all MDIO_MMD_VEND2 registers.
|
||||
By exposing this mechanism standard MMD access functions can be used
|
||||
to access the MDIO_MMD_VEND2 registers.
|
||||
|
||||
Signed-off-by: Heiner Kallweit <hkallweit1@gmail.com>
|
||||
Reviewed-by: Andrew Lunn <andrew@lunn.ch>
|
||||
Link: https://patch.msgid.link/e821b302-5fe6-49ab-aabd-05da500581c0@gmail.com
|
||||
Signed-off-by: Jakub Kicinski <kuba@kernel.org>
|
||||
---
|
||||
drivers/net/phy/realtek.c | 12 ++++++++++--
|
||||
1 file changed, 10 insertions(+), 2 deletions(-)
|
||||
|
||||
--- a/drivers/net/phy/realtek.c
|
||||
+++ b/drivers/net/phy/realtek.c
|
||||
@@ -736,7 +736,11 @@ static int rtlgen_read_mmd(struct phy_de
|
||||
{
|
||||
int ret;
|
||||
|
||||
- if (devnum == MDIO_MMD_PCS && regnum == MDIO_PCS_EEE_ABLE) {
|
||||
+ if (devnum == MDIO_MMD_VEND2) {
|
||||
+ rtl821x_write_page(phydev, regnum >> 4);
|
||||
+ ret = __phy_read(phydev, 0x10 + ((regnum & 0xf) >> 1));
|
||||
+ rtl821x_write_page(phydev, 0);
|
||||
+ } else if (devnum == MDIO_MMD_PCS && regnum == MDIO_PCS_EEE_ABLE) {
|
||||
rtl821x_write_page(phydev, 0xa5c);
|
||||
ret = __phy_read(phydev, 0x12);
|
||||
rtl821x_write_page(phydev, 0);
|
||||
@@ -760,7 +764,11 @@ static int rtlgen_write_mmd(struct phy_d
|
||||
{
|
||||
int ret;
|
||||
|
||||
- if (devnum == MDIO_MMD_AN && regnum == MDIO_AN_EEE_ADV) {
|
||||
+ if (devnum == MDIO_MMD_VEND2) {
|
||||
+ rtl821x_write_page(phydev, regnum >> 4);
|
||||
+ ret = __phy_write(phydev, 0x10 + ((regnum & 0xf) >> 1), val);
|
||||
+ rtl821x_write_page(phydev, 0);
|
||||
+ } else if (devnum == MDIO_MMD_AN && regnum == MDIO_AN_EEE_ADV) {
|
||||
rtl821x_write_page(phydev, 0xa5d);
|
||||
ret = __phy_write(phydev, 0x10, val);
|
||||
rtl821x_write_page(phydev, 0);
|
File diff suppressed because it is too large
Load diff
|
@ -0,0 +1,180 @@
|
|||
From 33700ca45b7d2e1655d4cad95e25671e8a94e2f0 Mon Sep 17 00:00:00 2001
|
||||
From: Heiner Kallweit <hkallweit1@gmail.com>
|
||||
Date: Sat, 11 Jan 2025 21:51:24 +0100
|
||||
Subject: [PATCH] net: phy: realtek: add hwmon support for temp sensor on
|
||||
RTL822x
|
||||
|
||||
This adds hwmon support for the temperature sensor on RTL822x.
|
||||
It's available on the standalone versions of the PHY's, and on
|
||||
the integrated PHY's in RTL8125B/RTL8125D/RTL8126.
|
||||
|
||||
Signed-off-by: Heiner Kallweit <hkallweit1@gmail.com>
|
||||
Reviewed-by: Andrew Lunn <andrew@lunn.ch>
|
||||
Link: https://patch.msgid.link/ad6bfe9f-6375-4a00-84b4-bfb38a21bd71@gmail.com
|
||||
Signed-off-by: Jakub Kicinski <kuba@kernel.org>
|
||||
---
|
||||
drivers/net/phy/realtek/Kconfig | 6 ++
|
||||
drivers/net/phy/realtek/Makefile | 1 +
|
||||
drivers/net/phy/realtek/realtek.h | 10 ++++
|
||||
drivers/net/phy/realtek/realtek_hwmon.c | 79 +++++++++++++++++++++++++
|
||||
drivers/net/phy/realtek/realtek_main.c | 12 ++++
|
||||
5 files changed, 108 insertions(+)
|
||||
create mode 100644 drivers/net/phy/realtek/realtek.h
|
||||
create mode 100644 drivers/net/phy/realtek/realtek_hwmon.c
|
||||
|
||||
--- a/drivers/net/phy/realtek/Kconfig
|
||||
+++ b/drivers/net/phy/realtek/Kconfig
|
||||
@@ -3,3 +3,9 @@ config REALTEK_PHY
|
||||
tristate "Realtek PHYs"
|
||||
help
|
||||
Currently supports RTL821x/RTL822x and fast ethernet PHYs
|
||||
+
|
||||
+config REALTEK_PHY_HWMON
|
||||
+ def_bool REALTEK_PHY && HWMON
|
||||
+ depends on !(REALTEK_PHY=y && HWMON=m)
|
||||
+ help
|
||||
+ Optional hwmon support for the temperature sensor
|
||||
--- a/drivers/net/phy/realtek/Makefile
|
||||
+++ b/drivers/net/phy/realtek/Makefile
|
||||
@@ -1,3 +1,4 @@
|
||||
# SPDX-License-Identifier: GPL-2.0
|
||||
realtek-y += realtek_main.o
|
||||
+realtek-$(CONFIG_REALTEK_PHY_HWMON) += realtek_hwmon.o
|
||||
obj-$(CONFIG_REALTEK_PHY) += realtek.o
|
||||
--- /dev/null
|
||||
+++ b/drivers/net/phy/realtek/realtek.h
|
||||
@@ -0,0 +1,10 @@
|
||||
+/* SPDX-License-Identifier: GPL-2.0 */
|
||||
+
|
||||
+#ifndef REALTEK_H
|
||||
+#define REALTEK_H
|
||||
+
|
||||
+#include <linux/phy.h>
|
||||
+
|
||||
+int rtl822x_hwmon_init(struct phy_device *phydev);
|
||||
+
|
||||
+#endif /* REALTEK_H */
|
||||
--- /dev/null
|
||||
+++ b/drivers/net/phy/realtek/realtek_hwmon.c
|
||||
@@ -0,0 +1,86 @@
|
||||
+// SPDX-License-Identifier: GPL-2.0+
|
||||
+/*
|
||||
+ * HWMON support for Realtek PHY's
|
||||
+ *
|
||||
+ * Author: Heiner Kallweit <hkallweit1@gmail.com>
|
||||
+ */
|
||||
+
|
||||
+#include <linux/hwmon.h>
|
||||
+#include <linux/phy.h>
|
||||
+
|
||||
+#include "realtek.h"
|
||||
+
|
||||
+#define RTL822X_VND2_TSALRM 0xa662
|
||||
+#define RTL822X_VND2_TSRR 0xbd84
|
||||
+#define RTL822X_VND2_TSSR 0xb54c
|
||||
+
|
||||
+static umode_t rtl822x_hwmon_is_visible(const void *drvdata,
|
||||
+ enum hwmon_sensor_types type,
|
||||
+ u32 attr, int channel)
|
||||
+{
|
||||
+ return 0444;
|
||||
+}
|
||||
+
|
||||
+static int rtl822x_hwmon_get_temp(int raw)
|
||||
+{
|
||||
+ if (raw >= 512)
|
||||
+ raw -= 1024;
|
||||
+
|
||||
+ return 1000 * raw / 2;
|
||||
+}
|
||||
+
|
||||
+static int rtl822x_hwmon_read(struct device *dev, enum hwmon_sensor_types type,
|
||||
+ u32 attr, int channel, long *val)
|
||||
+{
|
||||
+ struct phy_device *phydev = dev_get_drvdata(dev);
|
||||
+ int raw;
|
||||
+
|
||||
+ switch (attr) {
|
||||
+ case hwmon_temp_input:
|
||||
+ raw = phy_read_mmd(phydev, MDIO_MMD_VEND2, RTL822X_VND2_TSRR) & 0x3ff;
|
||||
+ *val = rtl822x_hwmon_get_temp(raw);
|
||||
+ break;
|
||||
+ case hwmon_temp_max:
|
||||
+ /* Chip reduces speed to 1G if threshold is exceeded */
|
||||
+ raw = phy_read_mmd(phydev, MDIO_MMD_VEND2, RTL822X_VND2_TSSR) >> 6;
|
||||
+ *val = rtl822x_hwmon_get_temp(raw);
|
||||
+ break;
|
||||
+ default:
|
||||
+ return -EINVAL;
|
||||
+ }
|
||||
+
|
||||
+ return 0;
|
||||
+}
|
||||
+
|
||||
+static const struct hwmon_ops rtl822x_hwmon_ops = {
|
||||
+ .is_visible = rtl822x_hwmon_is_visible,
|
||||
+ .read = rtl822x_hwmon_read,
|
||||
+};
|
||||
+
|
||||
+static const struct hwmon_channel_info * const rtl822x_hwmon_info[] = {
|
||||
+ HWMON_CHANNEL_INFO(temp, HWMON_T_INPUT | HWMON_T_MAX),
|
||||
+ NULL
|
||||
+};
|
||||
+
|
||||
+static const struct hwmon_chip_info rtl822x_hwmon_chip_info = {
|
||||
+ .ops = &rtl822x_hwmon_ops,
|
||||
+ .info = rtl822x_hwmon_info,
|
||||
+};
|
||||
+
|
||||
+int rtl822x_hwmon_init(struct phy_device *phydev)
|
||||
+{
|
||||
+ struct device *hwdev, *dev = &phydev->mdio.dev;
|
||||
+ const char *name;
|
||||
+
|
||||
+ /* Ensure over-temp alarm is reset. */
|
||||
+ phy_clear_bits_mmd(phydev, MDIO_MMD_VEND2, RTL822X_VND2_TSALRM, 3);
|
||||
+
|
||||
+ name = devm_hwmon_sanitize_name(dev, dev_name(dev));
|
||||
+ if (IS_ERR(name))
|
||||
+ return PTR_ERR(name);
|
||||
+
|
||||
+ hwdev = devm_hwmon_device_register_with_info(dev, name, phydev,
|
||||
+ &rtl822x_hwmon_chip_info,
|
||||
+ NULL);
|
||||
+ return PTR_ERR_OR_ZERO(hwdev);
|
||||
+}
|
||||
--- a/drivers/net/phy/realtek/realtek_main.c
|
||||
+++ b/drivers/net/phy/realtek/realtek_main.c
|
||||
@@ -14,6 +14,8 @@
|
||||
#include <linux/delay.h>
|
||||
#include <linux/clk.h>
|
||||
|
||||
+#include "realtek.h"
|
||||
+
|
||||
#define RTL821x_PHYSR 0x11
|
||||
#define RTL821x_PHYSR_DUPLEX BIT(13)
|
||||
#define RTL821x_PHYSR_SPEED GENMASK(15, 14)
|
||||
@@ -820,6 +822,15 @@ static int rtl822x_write_mmd(struct phy_
|
||||
return ret;
|
||||
}
|
||||
|
||||
+static int rtl822x_probe(struct phy_device *phydev)
|
||||
+{
|
||||
+ if (IS_ENABLED(CONFIG_REALTEK_PHY_HWMON) &&
|
||||
+ phydev->phy_id != RTL_GENERIC_PHYID)
|
||||
+ return rtl822x_hwmon_init(phydev);
|
||||
+
|
||||
+ return 0;
|
||||
+}
|
||||
+
|
||||
static int rtl822xb_config_init(struct phy_device *phydev)
|
||||
{
|
||||
bool has_2500, has_sgmii;
|
||||
@@ -1518,6 +1529,7 @@ static struct phy_driver realtek_drvs[]
|
||||
.match_phy_device = rtl_internal_nbaset_match_phy_device,
|
||||
.name = "Realtek Internal NBASE-T PHY",
|
||||
.flags = PHY_IS_INTERNAL,
|
||||
+ .probe = rtl822x_probe,
|
||||
.get_features = rtl822x_get_features,
|
||||
.config_aneg = rtl822x_config_aneg,
|
||||
.read_status = rtl822x_read_status,
|
|
@ -0,0 +1,64 @@
|
|||
From 64ff63aeefb03139ae27454bd4208244579ae88e Mon Sep 17 00:00:00 2001
|
||||
From: Aleksander Jan Bajkowski <olek2@wp.pl>
|
||||
Date: Fri, 17 Jan 2025 23:24:21 +0100
|
||||
Subject: [PATCH] net: phy: realtek: HWMON support for standalone versions of
|
||||
RTL8221B and RTL8251
|
||||
|
||||
HWMON support has been added for the RTL8221/8251 PHYs integrated together
|
||||
with the MAC inside the RTL8125/8126 chips. This patch extends temperature
|
||||
reading support for standalone variants of the mentioned PHYs.
|
||||
|
||||
I don't know whether the earlier revisions of the RTL8226 also have a
|
||||
built-in temperature sensor, so they have been skipped for now.
|
||||
|
||||
Tested on RTL8221B-VB-CG.
|
||||
|
||||
Signed-off-by: Aleksander Jan Bajkowski <olek2@wp.pl>
|
||||
Reviewed-by: Andrew Lunn <andrew@lunn.ch>
|
||||
Signed-off-by: David S. Miller <davem@davemloft.net>
|
||||
---
|
||||
drivers/net/phy/realtek/realtek_main.c | 5 +++++
|
||||
1 file changed, 5 insertions(+)
|
||||
|
||||
--- a/drivers/net/phy/realtek/realtek_main.c
|
||||
+++ b/drivers/net/phy/realtek/realtek_main.c
|
||||
@@ -1474,6 +1474,7 @@ static struct phy_driver realtek_drvs[]
|
||||
}, {
|
||||
.match_phy_device = rtl8221b_vb_cg_c22_match_phy_device,
|
||||
.name = "RTL8221B-VB-CG 2.5Gbps PHY (C22)",
|
||||
+ .probe = rtl822x_probe,
|
||||
.get_features = rtl822x_get_features,
|
||||
.config_aneg = rtl822x_config_aneg,
|
||||
.config_init = rtl822xb_config_init,
|
||||
@@ -1486,6 +1487,7 @@ static struct phy_driver realtek_drvs[]
|
||||
}, {
|
||||
.match_phy_device = rtl8221b_vb_cg_c45_match_phy_device,
|
||||
.name = "RTL8221B-VB-CG 2.5Gbps PHY (C45)",
|
||||
+ .probe = rtl822x_probe,
|
||||
.config_init = rtl822xb_config_init,
|
||||
.get_rate_matching = rtl822xb_get_rate_matching,
|
||||
.get_features = rtl822x_c45_get_features,
|
||||
@@ -1496,6 +1498,7 @@ static struct phy_driver realtek_drvs[]
|
||||
}, {
|
||||
.match_phy_device = rtl8221b_vn_cg_c22_match_phy_device,
|
||||
.name = "RTL8221B-VM-CG 2.5Gbps PHY (C22)",
|
||||
+ .probe = rtl822x_probe,
|
||||
.get_features = rtl822x_get_features,
|
||||
.config_aneg = rtl822x_config_aneg,
|
||||
.config_init = rtl822xb_config_init,
|
||||
@@ -1508,6 +1511,7 @@ static struct phy_driver realtek_drvs[]
|
||||
}, {
|
||||
.match_phy_device = rtl8221b_vn_cg_c45_match_phy_device,
|
||||
.name = "RTL8221B-VN-CG 2.5Gbps PHY (C45)",
|
||||
+ .probe = rtl822x_probe,
|
||||
.config_init = rtl822xb_config_init,
|
||||
.get_rate_matching = rtl822xb_get_rate_matching,
|
||||
.get_features = rtl822x_c45_get_features,
|
||||
@@ -1518,6 +1522,7 @@ static struct phy_driver realtek_drvs[]
|
||||
}, {
|
||||
.match_phy_device = rtl8251b_c45_match_phy_device,
|
||||
.name = "RTL8251B 5Gbps PHY",
|
||||
+ .probe = rtl822x_probe,
|
||||
.get_features = rtl822x_get_features,
|
||||
.config_aneg = rtl822x_config_aneg,
|
||||
.read_status = rtl822x_read_status,
|
|
@ -0,0 +1,30 @@
|
|||
From b0fa00fe38f673c986633c11087274deeb7ce7b0 Mon Sep 17 00:00:00 2001
|
||||
From: Sander Vanheule <sander@svanheule.net>
|
||||
Date: Tue, 7 Jan 2025 21:16:20 +0100
|
||||
Subject: [PATCH] gpio: regmap: Use generic request/free ops
|
||||
|
||||
Set the gpiochip request and free ops to the generic implementations.
|
||||
This way a user can provide a gpio-ranges property defined for a pinmux,
|
||||
easing muxing of gpio functions. Provided that the pin controller
|
||||
implementents the pinmux op .gpio_request_enable(), pins will
|
||||
automatically be muxed to their GPIO function when requested.
|
||||
|
||||
Signed-off-by: Sander Vanheule <sander@svanheule.net>
|
||||
Acked-by: Michael Walle <mwalle@kernel.org>
|
||||
Link: https://lore.kernel.org/r/20250107201621.12467-1-sander@svanheule.net
|
||||
Signed-off-by: Bartosz Golaszewski <bartosz.golaszewski@linaro.org>
|
||||
---
|
||||
drivers/gpio/gpio-regmap.c | 2 ++
|
||||
1 file changed, 2 insertions(+)
|
||||
|
||||
--- a/drivers/gpio/gpio-regmap.c
|
||||
+++ b/drivers/gpio/gpio-regmap.c
|
||||
@@ -262,6 +262,8 @@ struct gpio_regmap *gpio_regmap_register
|
||||
chip->label = config->label ?: dev_name(config->parent);
|
||||
chip->can_sleep = regmap_might_sleep(config->regmap);
|
||||
|
||||
+ chip->request = gpiochip_generic_request;
|
||||
+ chip->free = gpiochip_generic_free;
|
||||
chip->get = gpio_regmap_get;
|
||||
if (gpio->reg_set_base && gpio->reg_clr_base)
|
||||
chip->set = gpio_regmap_set_with_clear;
|
Loading…
Add table
Add a link
Reference in a new issue