mirror of
https://github.com/Ysurac/openmptcprouter.git
synced 2025-03-09 15:40:20 +00:00
Add DTS for all RUTX devices
This commit is contained in:
Ycarus (Yannick Chabanois)
parent
66f5476919
commit
4e050c1468
26 changed files with 1837 additions and 325 deletions
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@ -20,7 +20,7 @@ Signed-off-by: Robert Marko <robert.marko@sartura.hr>
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/ {
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#address-cells = <1>;
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@@ -726,22 +727,38 @@
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@@ -598,22 +599,39 @@
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ethphy0: ethernet-phy@0 {
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reg = <0>;
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@ -56,6 +56,7 @@ Signed-off-by: Robert Marko <robert.marko@sartura.hr>
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+ reg = <5>;
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+
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+ qcom,tx-driver-strength = <PSGMII_QSGMII_TX_DRIVER_300MV>;
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+ qcom,psgmii-az;
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};
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};
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@ -0,0 +1,158 @@
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--- a/arch/arm/boot/dts/qcom-ipq4019-ap.dk01.1.dtsi
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+++ b/arch/arm/boot/dts/qcom-ipq4019-ap.dk01.1.dtsi
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@@ -15,6 +15,7 @@
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*/
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#include "qcom-ipq4019.dtsi"
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+#include <dt-bindings/soc/qcom,tcsr.h>
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/ {
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model = "Qualcomm Technologies, Inc. IPQ4019/AP-DK01.1";
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@@ -29,6 +30,32 @@
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};
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soc {
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+ tcsr@194b000 {
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+ /* select hostmode */
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+ compatible = "qcom,tcsr";
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+ reg = <0x194b000 0x100>;
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+ qcom,usb-hsphy-mode-select = <TCSR_USB_HSPHY_HOST_MODE>;
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+ status = "okay";
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+ };
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+
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+ ess_tcsr@1953000 {
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+ compatible = "qcom,tcsr";
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+ reg = <0x1953000 0x1000>;
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+ qcom,ess-interface-select = <TCSR_ESS_PSGMII>;
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+ };
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+
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+ tcsr@1949000 {
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+ compatible = "qcom,tcsr";
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+ reg = <0x1949000 0x100>;
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+ qcom,wifi_glb_cfg = <TCSR_WIFI_GLB_CFG>;
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+ };
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+
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+ tcsr@1957000 {
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+ compatible = "qcom,tcsr";
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+ reg = <0x1957000 0x100>;
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+ qcom,wifi_noc_memtype_m0_m2 = <TCSR_WIFI_NOC_MEMTYPE_M0_M2>;
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+ };
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+
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rng@22000 {
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status = "ok";
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};
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@@ -74,14 +101,6 @@
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pinctrl-names = "default";
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status = "okay";
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cs-gpios = <&tlmm 54 GPIO_ACTIVE_HIGH>;
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-
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- mx25l25635e@0 {
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- #address-cells = <1>;
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- #size-cells = <1>;
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- reg = <0>;
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- compatible = "mx25l25635e";
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- spi-max-frequency = <24000000>;
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- };
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};
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serial@78af000 {
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@@ -109,5 +128,22 @@
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wifi@a800000 {
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status = "ok";
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};
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+
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+ mdio@90000 {
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+ status = "okay";
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+ };
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+
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+ ess-switch@c000000 {
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+ status = "okay";
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+ };
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+
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+ ess-psgmii@98000 {
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+ status = "okay";
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+ };
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+
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+ edma@c080000 {
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+ status = "okay";
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+ };
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+
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};
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};
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--- a/arch/arm/boot/dts/qcom-ipq4019-ap.dk01.1-c1.dts
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+++ b/arch/arm/boot/dts/qcom-ipq4019-ap.dk01.1-c1.dts
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@@ -18,5 +18,73 @@
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/ {
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model = "Qualcomm Technologies, Inc. IPQ40xx/AP-DK01.1-C1";
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- compatible = "qcom,ipq4019-ap-dk01.1-c1", "qcom,ipq4019";
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+ compatible = "qcom,ipq4019-ap-dk01.1-c1", "qcom,ipq4019", "qcom,ap-dk01.1-c1", "qcom,ap-dk01.2-c1";
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+
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+ memory {
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+ device_type = "memory";
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+ reg = <0x80000000 0x10000000>;
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+ };
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+};
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+
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+&blsp1_spi1 {
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+ mx25l25635f@0 {
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+ compatible = "mx25l25635f", "jedec,spi-nor";
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+ #address-cells = <1>;
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+ #size-cells = <1>;
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+ reg = <0>;
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+ spi-max-frequency = <24000000>;
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+
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+ SBL1@0 {
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+ label = "SBL1";
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+ reg = <0x0 0x40000>;
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+ read-only;
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+ };
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+ MIBIB@40000 {
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+ label = "MIBIB";
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+ reg = <0x40000 0x20000>;
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+ read-only;
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+ };
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+ QSEE@60000 {
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+ label = "QSEE";
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+ reg = <0x60000 0x60000>;
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+ read-only;
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+ };
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+ CDT@c0000 {
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+ label = "CDT";
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+ reg = <0xc0000 0x10000>;
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+ read-only;
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+ };
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+ DDRPARAMS@d0000 {
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+ label = "DDRPARAMS";
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+ reg = <0xd0000 0x10000>;
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+ read-only;
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+ };
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+ APPSBLENV@e0000 {
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+ label = "APPSBLENV";
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+ reg = <0xe0000 0x10000>;
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+ read-only;
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+ };
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+ APPSBL@f0000 {
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+ label = "APPSBL";
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+ reg = <0xf0000 0x80000>;
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+ read-only;
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+ };
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+ ART@170000 {
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+ label = "ART";
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+ reg = <0x170000 0x10000>;
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+ read-only;
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+ };
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+ kernel@180000 {
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+ label = "kernel";
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+ reg = <0x180000 0x400000>;
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+ };
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+ rootfs@580000 {
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+ label = "rootfs";
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+ reg = <0x580000 0x1600000>;
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+ };
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+ firmware@180000 {
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+ label = "firmware";
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+ reg = <0x180000 0x1a00000>;
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+ };
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+ };
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};
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@ -0,0 +1,129 @@
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--- a/arch/arm/boot/dts/qcom-ipq4019-ap.dk04.1.dtsi
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+++ b/arch/arm/boot/dts/qcom-ipq4019-ap.dk04.1.dtsi
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@@ -17,53 +17,79 @@
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stdout-path = "serial0:115200n8";
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};
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- memory {
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- device_type = "memory";
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- reg = <0x80000000 0x10000000>; /* 256MB */
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- };
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-
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soc {
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+ rng@22000 {
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+ status = "okay";
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+ };
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+
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pinctrl@1000000 {
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serial_0_pins: serial0-pinmux {
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- pins = "gpio16", "gpio17";
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- function = "blsp_uart0";
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- bias-disable;
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+ mux {
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+ pins = "gpio16", "gpio17";
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+ function = "blsp_uart0";
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+ bias-disable;
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+ };
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};
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serial_1_pins: serial1-pinmux {
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- pins = "gpio8", "gpio9",
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- "gpio10", "gpio11";
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- function = "blsp_uart1";
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- bias-disable;
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+ mux {
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+ pins = "gpio8", "gpio9";
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+ function = "blsp_uart1";
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+ bias-disable;
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+ };
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};
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spi_0_pins: spi-0-pinmux {
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pinmux {
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function = "blsp_spi0";
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pins = "gpio13", "gpio14", "gpio15";
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- bias-disable;
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};
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pinmux_cs {
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function = "gpio";
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pins = "gpio12";
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+ };
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+ pinconf {
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+ pins = "gpio13", "gpio14", "gpio15";
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+ drive-strength = <12>;
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+ bias-disable;
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+ };
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+ pinconf_cs {
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+ pins = "gpio12";
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+ drive-strength = <2>;
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bias-disable;
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output-high;
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};
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};
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i2c_0_pins: i2c-0-pinmux {
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- pins = "gpio20", "gpio21";
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- function = "blsp_i2c0";
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- bias-disable;
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+ pinmux {
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+ function = "blsp_i2c0";
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+ pins = "gpio10", "gpio11";
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+ };
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+ pinconf {
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+ pins = "gpio10", "gpio11";
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+ drive-strength = <16>;
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+ bias-disable;
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+ };
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};
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nand_pins: nand-pins {
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- pins = "gpio53", "gpio55", "gpio56",
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- "gpio57", "gpio58", "gpio59",
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- "gpio60", "gpio62", "gpio63",
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- "gpio64", "gpio65", "gpio66",
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- "gpio67", "gpio68", "gpio69";
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- function = "qpic";
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+ pullups {
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+ pins = "gpio52", "gpio53", "gpio58",
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+ "gpio59";
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+ function = "qpic";
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+ bias-pull-up;
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+ };
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+
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+ pulldowns {
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+ pins = "gpio54", "gpio55", "gpio56",
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+ "gpio57", "gpio60", "gpio61",
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+ "gpio62", "gpio63", "gpio64",
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+ "gpio65", "gpio66", "gpio67",
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+ "gpio68", "gpio69";
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+ function = "qpic";
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+ bias-pull-down;
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+ };
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};
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};
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@@ -103,9 +129,24 @@
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perst-gpio = <&tlmm 38 0x1>;
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};
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+ i2c0: i2c@78b7000 { /* BLSP1 QUP2 */
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+ pinctrl-0 = <&i2c_0_pins>;
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+ pinctrl-names = "default";
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+
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+ status = "okay";
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+ };
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+
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qpic-nand@79b0000 {
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pinctrl-0 = <&nand_pins>;
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pinctrl-names = "default";
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};
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+
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+ crypto@8e3a000 {
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+ status = "okay";
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+ };
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+
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+ watchdog@b017000 {
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+ status = "okay";
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+ };
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};
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};
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