From 500812f93c64f6ee50262bdee5f2ec80e3730205 Mon Sep 17 00:00:00 2001
From: suyuan168 <175338101@qq.com>
Date: Mon, 4 Jul 2022 11:44:24 +0800
Subject: [PATCH] Update qcom-ipq4019-nhx4019.dts

---
 .../arm/boot/dts/qcom-ipq4019-nhx4019.dts     | 74 +++++++++++++------
 1 file changed, 53 insertions(+), 21 deletions(-)

diff --git a/root/target/linux/ipq40xx/files/arch/arm/boot/dts/qcom-ipq4019-nhx4019.dts b/root/target/linux/ipq40xx/files/arch/arm/boot/dts/qcom-ipq4019-nhx4019.dts
index e898f427..2d0dab35 100755
--- a/root/target/linux/ipq40xx/files/arch/arm/boot/dts/qcom-ipq4019-nhx4019.dts
+++ b/root/target/linux/ipq40xx/files/arch/arm/boot/dts/qcom-ipq4019-nhx4019.dts
@@ -137,27 +137,6 @@
 			label = "nhx:xnet";
 			gpio = <&tlmm 0 GPIO_ACTIVE_HIGH>;
 		};
-
-	    m2power {
-			label = "m2power";
-			gpio = <&tlmm 48 GPIO_ACTIVE_LOW>;
-		};
-
-
-		m2dcpower {
-		    label = "m2dcpower";
-			gpio = <&tlmm 51 GPIO_ACTIVE_HIGH>;
-		};
-
-		pcie1dcpower {
-			 label = "pcie1dcpower";
-			gpio = <&tlmm 50 GPIO_ACTIVE_HIGH>;
-		};
-
-		pcie2dcpower {
-			label = "pcie2dcpower";
-			gpio = <&tlmm 46 GPIO_ACTIVE_HIGH>;
-		};
 	};
 
 	keys {
@@ -169,6 +148,59 @@
 			linux,code = <KEY_RESTART>;
 		};
 	};
+	
+	
+	gpio_export {
+		compatible = "gpio-export";
+		#size-cells = <0>;
+
+		3vpower {
+			gpio-export,name = "3v-power";
+			gpio-export,output = <1>;
+			gpio = <&tlmm 19 GPIO_ACTIVE_HIGH>;
+		};
+
+		m2power {
+			gpio-export,name = "m2-power";
+			gpio-export,output = <0>;
+			gpio = <&tlmm 48 GPIO_ACTIVE_LOW>;
+		};
+
+		m2reset {
+			gpio-export,name = "m2-reset";
+			gpio-export,output = <0>;
+			gpio = <&tlmm 49 GPIO_ACTIVE_LOW>;
+		};
+
+		m2dcpower {
+			gpio-export,name = "m2dc-power";
+			gpio-export,output = <1>;
+			gpio = <&tlmm 51 GPIO_ACTIVE_HIGH>;
+		};
+
+		pcie1dcpower {
+			gpio-export,name = "pcie1dc-power";
+			gpio-export,output = <1>;
+			gpio = <&tlmm 50 GPIO_ACTIVE_HIGH>;
+		};
+
+		pcie1rst {
+			gpio-export,name = "pcie1-rst";
+			gpio-export,output = <0>;
+			gpio = <&tlmm 42 GPIO_ACTIVE_LOW>;
+		};
+
+		pcie2dcpower {
+			gpio-export,name = "pcie2dc-power";
+			gpio-export,output = <1>;
+			gpio = <&tlmm 46 GPIO_ACTIVE_HIGH>;
+		};
+		pcie2rst {
+			gpio-export,name = "pcie2-rst";
+			gpio-export,output = <0>;
+			gpio = <&tlmm 43 GPIO_ACTIVE_LOW>;
+		};
+	};
 };
 
 &blsp_dma {