mirror of
https://github.com/Ysurac/openmptcprouter.git
synced 2025-03-09 15:40:20 +00:00
Fix for RUTX platform
This commit is contained in:
Ycarus (Yannick Chabanois)
parent
ccdb64ad45
commit
59bc57d5d5
7254 changed files with 1810270 additions and 7 deletions
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#
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# (C) Copyright 2003-2008
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# Wolfgang Denk, DENX Software Engineering, wd@denx.de.
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#
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# (C) Copyright 2009-2012
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# Jens Scharsig <esw@bus-elekronik.de>
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# BuS Elektronik GmbH & Co. KG
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#
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# See file CREDITS for list of people who contributed to this
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# project.
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#
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# This program is free software; you can redistribute it and/or
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# modify it under the terms of the GNU General Public License as
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# published by the Free Software Foundation; either version 2 of
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# the License, or (at your option) any later version.
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#
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# This program is distributed in the hope that it will be useful,
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# but WITHOUT ANY WARRANTY; without even the implied warranty of
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# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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# GNU General Public License for more details.
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#
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# You should have received a copy of the GNU General Public License
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# along with this program; if not, write to the Free Software
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# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
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# MA 02111-1307 USA
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#
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include $(TOPDIR)/config.mk
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LIB = $(obj)lib$(BOARD).o
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COBJS += vl_ma2sc.o
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SRCS := $(SOBJS:.o=.S) $(COBJS:.o=.c)
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OBJS := $(addprefix $(obj),$(COBJS))
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SOBJS := $(addprefix $(obj),$(SOBJS))
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$(LIB): $(obj).depend $(OBJS) $(SOBJS)
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$(call cmd_link_o_target, $(OBJS) $(SOBJS))
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#########################################################################
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# defines $(obj).depend target
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include $(SRCTREE)/rules.mk
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sinclude $(obj).depend
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#########################################################################
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@ -0,0 +1,551 @@
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/*
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* (C) Copyright 2009-2012
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* Jens Scharsig <esw@bus-elekronik.de>
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* BuS Elektronik GmbH & Co. KG
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*
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* See file CREDITS for list of people who contributed to this
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* project.
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*
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* This program is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License as
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* published by the Free Software Foundation; either version 2 of
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* the License, or (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, Inc., 59 Temple Place, Suite 330, Boston,
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* MA 02111-1307 USA
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*/
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#include <config.h>
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#include <common.h>
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#include <asm/sizes.h>
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#include <asm/io.h>
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#include <asm/arch/hardware.h>
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#include <asm/arch/clk.h>
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#include <asm/arch/at91_matrix.h>
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#include <asm/arch/at91sam9_smc.h>
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#include <asm/arch/at91_pmc.h>
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#include <asm/arch/at91_pio.h>
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#include <asm/arch/at91_rstc.h>
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#include <asm/arch/at91sam9263.h>
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#include <asm/arch/gpio.h>
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#include <asm/arch/at91_common.h>
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#include <lcd.h>
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#include <i2c.h>
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#include <atmel_lcdc.h>
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#if defined(CONFIG_RESET_PHY_R) && defined(CONFIG_MACB)
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#include <net.h>
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#endif
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#include <netdev.h>
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DECLARE_GLOBAL_DATA_PTR;
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#ifdef CONFIG_CMD_NAND
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static void vl_ma2sc_nand_hw_init(void)
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{
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unsigned long csa;
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at91_smc_t *smc = (at91_smc_t *) ATMEL_BASE_SMC0;
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at91_matrix_t *matrix = (at91_matrix_t *) ATMEL_BASE_MATRIX;
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at91_pmc_t *pmc = (at91_pmc_t *) ATMEL_BASE_PMC;
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at91_set_pio_output(AT91_PIO_PORTA, 13, 1); /* CAN_TX -> H */
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at91_set_pio_output(AT91_PIO_PORTA, 12, 1); /* CAN_STB -> H */
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at91_set_pio_output(AT91_PIO_PORTA, 11, 1); /* CAN_EN -> H */
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/* Enable CS3 */
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csa = readl(&matrix->csa[0]) | AT91_MATRIX_CSA_EBI_CS3A;
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writel(csa, &matrix->csa[0]);
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/* Configure SMC CS3 for NAND/SmartMedia */
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writel(AT91_SMC_SETUP_NWE(1) | AT91_SMC_SETUP_NCS_WR(0) |
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AT91_SMC_SETUP_NRD(1) | AT91_SMC_SETUP_NCS_RD(0),
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&smc->cs[3].setup);
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writel(AT91_SMC_PULSE_NWE(3) | AT91_SMC_PULSE_NCS_WR(3) |
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AT91_SMC_PULSE_NRD(3) | AT91_SMC_PULSE_NCS_RD(3),
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&smc->cs[3].pulse);
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writel(AT91_SMC_CYCLE_NWE(5) | AT91_SMC_CYCLE_NRD(5),
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&smc->cs[3].cycle);
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writel(AT91_SMC_MODE_RM_NRD | AT91_SMC_MODE_WM_NWE |
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AT91_SMC_MODE_DBW_8 |
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AT91_SMC_MODE_TDF_CYCLE(2),
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&smc->cs[3].mode);
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writel((1 << ATMEL_ID_PIOB) | (1 << ATMEL_ID_PIOCDE),
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&pmc->pcer);
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/* Configure RDY/BSY */
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#ifdef CONFIG_SYS_NAND_READY_PIN
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at91_set_pio_input(CONFIG_SYS_NAND_READY_PIN, 1);
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#endif
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/* Enable NandFlash */
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at91_set_pio_output(CONFIG_SYS_NAND_ENABLE_PIN, 1);
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}
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#endif
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#ifdef CONFIG_MACB
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static void vl_ma2sc_macb_hw_init(void)
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{
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unsigned long erstl;
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at91_pmc_t *pmc = (at91_pmc_t *) ATMEL_BASE_PMC;
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at91_rstc_t *rstc = (at91_rstc_t *) ATMEL_BASE_RSTC;
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/* Enable clock */
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writel(1 << ATMEL_ID_EMAC, &pmc->pcer);
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erstl = readl(&rstc->mr) & AT91_RSTC_MR_ERSTL_MASK;
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/* Need to reset PHY -> 500ms reset */
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writel(AT91_RSTC_KEY | AT91_RSTC_MR_ERSTL(0x0D) |
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AT91_RSTC_MR_URSTEN, &rstc->mr);
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writel(AT91_RSTC_KEY | AT91_RSTC_CR_EXTRST, &rstc->cr);
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/* Wait for end hardware reset */
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while (!(readl(&rstc->sr) & AT91_RSTC_SR_NRSTL))
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;
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/* Restore NRST value */
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writel(AT91_RSTC_KEY | erstl | AT91_RSTC_MR_URSTEN, &rstc->mr);
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at91_macb_hw_init();
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}
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#endif
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#ifdef CONFIG_LCD
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vidinfo_t panel_info = {
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.vl_col = 320,
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.vl_row = 240,
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.vl_clk = 6500000,
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.vl_sync = ATMEL_LCDC_INVDVAL_INVERTED |
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ATMEL_LCDC_INVLINE_INVERTED |
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ATMEL_LCDC_INVVD_INVERTED |
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ATMEL_LCDC_INVFRAME_INVERTED,
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.vl_bpix = (ATMEL_LCDC_PIXELSIZE_8 >> 5),
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.vl_tft = 1,
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.vl_hsync_len = 5, /* Horiz Sync Pulse Width */
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.vl_left_margin = 68, /* horiz back porch */
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.vl_right_margin = 20, /* horiz front porch */
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.vl_vsync_len = 2, /* vert Sync Pulse Width */
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.vl_upper_margin = 18, /* vert back porch */
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.vl_lower_margin = 4, /* vert front porch */
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.mmio = ATMEL_BASE_LCDC,
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};
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void lcd_enable(void)
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{
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}
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void lcd_disable(void)
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{
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}
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static void vl_ma2sc_lcd_hw_init(void)
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{
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at91_pmc_t *pmc = (at91_pmc_t *) ATMEL_BASE_PMC;
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at91_set_a_periph(AT91_PIO_PORTC, 0, 0); /* LCDVSYNC */
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at91_set_a_periph(AT91_PIO_PORTC, 1, 0); /* LCDHSYNC */
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at91_set_a_periph(AT91_PIO_PORTC, 2, 0); /* LCDDOTCK */
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at91_set_a_periph(AT91_PIO_PORTC, 3, 0); /* LCDDEN */
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at91_set_b_periph(AT91_PIO_PORTB, 9, 0); /* LCDCC */
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at91_set_a_periph(AT91_PIO_PORTC, 4, 0); /* LCDD0 */
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at91_set_a_periph(AT91_PIO_PORTC, 5, 0); /* LCDD1 */
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at91_set_a_periph(AT91_PIO_PORTC, 6, 0); /* LCDD2 */
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at91_set_a_periph(AT91_PIO_PORTC, 7, 0); /* LCDD3 */
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at91_set_a_periph(AT91_PIO_PORTC, 8, 0); /* LCDD4 */
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at91_set_a_periph(AT91_PIO_PORTC, 9, 0); /* LCDD5 */
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at91_set_a_periph(AT91_PIO_PORTC, 10, 0); /* LCDD6 */
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at91_set_a_periph(AT91_PIO_PORTC, 11, 0); /* LCDD7 */
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at91_set_a_periph(AT91_PIO_PORTC, 13, 0); /* LCDD9 */
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at91_set_a_periph(AT91_PIO_PORTC, 14, 0); /* LCDD10 */
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at91_set_a_periph(AT91_PIO_PORTC, 15, 0); /* LCDD11 */
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at91_set_a_periph(AT91_PIO_PORTC, 16, 0); /* LCDD12 */
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at91_set_b_periph(AT91_PIO_PORTC, 12, 0); /* LCDD13 */
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at91_set_a_periph(AT91_PIO_PORTC, 18, 0); /* LCDD14 */
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at91_set_a_periph(AT91_PIO_PORTC, 19, 0); /* LCDD15 */
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at91_set_a_periph(AT91_PIO_PORTC, 20, 0); /* LCDD26 */
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at91_set_a_periph(AT91_PIO_PORTC, 21, 0); /* LCDD17 */
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at91_set_a_periph(AT91_PIO_PORTC, 22, 0); /* LCDD18 */
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at91_set_a_periph(AT91_PIO_PORTC, 23, 0); /* LCDD19 */
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at91_set_a_periph(AT91_PIO_PORTC, 24, 0); /* LCDD20 */
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at91_set_b_periph(AT91_PIO_PORTC, 17, 0); /* LCDD21 */
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at91_set_a_periph(AT91_PIO_PORTC, 26, 0); /* LCDD22 */
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at91_set_a_periph(AT91_PIO_PORTC, 27, 0); /* LCDD23 */
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at91_set_pio_output(AT91_PIO_PORTE, 0, 0); /* LCD QXH */
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at91_set_pio_output(AT91_PIO_PORTE, 2, 0); /* LCD SHUT */
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at91_set_pio_output(AT91_PIO_PORTE, 3, 1); /* LCD TopBottom */
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at91_set_pio_output(AT91_PIO_PORTE, 4, 0); /* LCD REV */
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at91_set_pio_output(AT91_PIO_PORTE, 5, 1); /* LCD RightLeft */
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at91_set_pio_output(AT91_PIO_PORTE, 6, 0); /* LCD Color Mode CM */
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at91_set_pio_output(AT91_PIO_PORTE, 7, 0); /* LCD BGR */
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at91_set_pio_output(AT91_PIO_PORTB, 9, 0); /* LCD CC */
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writel(1 << ATMEL_ID_LCDC, &pmc->pcer);
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gd->fb_base = ATMEL_BASE_SRAM0;
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}
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#endif /* Config LCD */
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#ifdef CONFIG_BOARD_EARLY_INIT_F
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int board_early_init_f(void)
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{
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struct at91_pmc *pmc = (struct at91_pmc *)ATMEL_BASE_PMC;
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/* Enable clocks for all PIOs */
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writel((1 << ATMEL_ID_PIOA) | (1 << ATMEL_ID_PIOB) |
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(1 << ATMEL_ID_PIOCDE),
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&pmc->pcer);
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at91_seriald_hw_init();
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return 0;
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}
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#endif
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int board_init(void)
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{
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at91_smc_t *smc = (at91_smc_t *) ATMEL_BASE_SMC0;
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at91_pio_t *pio = (at91_pio_t *) ATMEL_BASE_PIO;
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u32 pin;
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pin = 0x1F000001;
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writel(pin, &pio->pioa.idr);
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writel(pin, &pio->pioa.pudr);
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writel(pin, &pio->pioa.per);
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writel(pin, &pio->pioa.oer);
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writel(pin, &pio->pioa.sodr);
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writel((1 << 25), &pio->pioa.codr);
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pin = 0x1F000100;
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writel(pin, &pio->piob.idr);
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writel(pin, &pio->piob.pudr);
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writel(pin, &pio->piob.per);
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writel(pin, &pio->piob.oer);
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writel(pin, &pio->piob.codr);
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writel((1 << 24), &pio->piob.sodr);
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pin = 0x40000000; /* Pullup DRxD enbable */
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writel(pin, &pio->pioc.puer);
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pin = 0x0000000F; /* HWversion als Input */
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writel(pin, &pio->piod.idr);
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writel(pin, &pio->piod.puer);
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writel(pin, &pio->piod.per);
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writel(pin, &pio->piod.odr);
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writel(pin, &pio->piod.owdr);
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/* Enable Ctrlc */
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console_init_f();
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gd->bd->bi_arch_number = MACH_TYPE_VL_MA2SC;
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/* adress of boot parameters */
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gd->bd->bi_boot_params = CONFIG_SYS_SDRAM_BASE + 0x100;
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writel(CONFIG_SYS_SMC0_MODE0_VAL, &smc->cs[0].setup);
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writel(CONFIG_SYS_SMC0_CYCLE0_VAL, &smc->cs[0].cycle);
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writel(CONFIG_SYS_SMC0_PULSE0_VAL, &smc->cs[0].pulse);
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writel(CONFIG_SYS_SMC0_SETUP0_VAL, &smc->cs[0].setup);
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#ifdef CONFIG_CMD_NAND
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vl_ma2sc_nand_hw_init();
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#endif
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#ifdef CONFIG_MACB
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vl_ma2sc_macb_hw_init();
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#endif
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#ifdef CONFIG_USB_OHCI_NEW
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at91_uhp_hw_init();
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#endif
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#ifdef CONFIG_LCD
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vl_ma2sc_lcd_hw_init();
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#endif
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return 0;
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}
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#ifdef CONFIG_MISC_INIT_R
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int misc_init_r(void)
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{
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uchar buffer[8];
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at91_pio_t *pio = (at91_pio_t *) ATMEL_BASE_PIO;
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u32 pin;
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buffer[0] = 0x04;
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buffer[1] = 0x00;
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if (i2c_write(0x68, 0x0E, 1, buffer, 2) != 0)
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puts("error reseting rtc clock\n\0");
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/* read hardware version */
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pin = (readl(&pio->piod.pdsr) & 0x0F) + 0x44;
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printf("Board: revision %c\n", pin);
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buffer[0] = pin;
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buffer[1] = 0;
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setenv("revision", (char *) buffer);
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pin = 0x40000000; /* Pullup DRxD enbable */
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writel(pin, &pio->pioc.puer);
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return 0;
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}
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#endif
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int dram_init(void)
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{
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gd->ram_size = get_ram_size((long *) CONFIG_SYS_SDRAM_BASE,
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CONFIG_SYS_SDRAM_SIZE);
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return 0;
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}
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#ifdef CONFIG_RESET_PHY_R
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void reset_phy(void)
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{
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#ifdef CONFIG_MACB
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/*
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* Initialize ethernet HW addr prior to starting Linux,
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* needed for nfsroot
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*/
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eth_init(gd->bd);
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#endif
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}
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#endif
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int board_eth_init(bd_t *bis)
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{
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int rc = 0;
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#ifdef CONFIG_MACB
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rc = macb_eth_initialize(0, (void *) ATMEL_BASE_EMAC, 0x01);
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#endif
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return rc;
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}
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#ifdef CONFIG_SOFT_I2C
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void i2c_init_board(void)
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{
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u32 pin;
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at91_pmc_t *pmc = (at91_pmc_t *) ATMEL_BASE_PMC;
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at91_pio_t *pio = (at91_pio_t *) ATMEL_BASE_PIO;
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u8 sda = (1<<4);
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u8 scl = (1<<5);
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writel(1 << ATMEL_ID_PIOB, &pmc->pcer);
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pin = sda | scl;
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writel(pin, &pio->piob.idr); /* Disable Interupt */
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writel(pin, &pio->piob.pudr);
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writel(pin, &pio->piob.per);
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writel(pin, &pio->piob.oer);
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writel(pin, &pio->piob.sodr);
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}
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#endif
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void watchdog_reset(void)
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{
|
||||
at91_pio_t *pio = (at91_pio_t *) ATMEL_BASE_PIO;
|
||||
u32 pin = 0x1; /* PA0 */
|
||||
|
||||
if ((readl(&pio->pioa.odsr) & pin) > 0)
|
||||
writel(pin, &pio->pioa.codr);
|
||||
else
|
||||
writel(pin, &pio->pioa.sodr);
|
||||
}
|
||||
|
||||
void enable_caches(void)
|
||||
{
|
||||
#ifndef CONFIG_SYS_DCACHE_OFF
|
||||
dcache_enable();
|
||||
#endif
|
||||
}
|
||||
|
||||
/*---------------------------------------------------------------------------*/
|
||||
|
||||
int do_ledtest(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
|
||||
{
|
||||
int rcode = 1;
|
||||
int row;
|
||||
int col;
|
||||
u32 pinz;
|
||||
u32 pins;
|
||||
at91_pio_t *pio = (at91_pio_t *) ATMEL_BASE_PIO;
|
||||
|
||||
at91_set_pio_output(AT91_PIO_PORTB, 8, 0); /* LCD DIM */
|
||||
|
||||
pins = 0x1F000000;
|
||||
writel(pins, &pio->pioa.idr);
|
||||
writel(pins, &pio->pioa.pudr);
|
||||
writel(pins, &pio->pioa.per);
|
||||
writel(pins, &pio->pioa.oer);
|
||||
writel(pins, &pio->pioa.sodr);
|
||||
|
||||
pinz = 0x1F000000;
|
||||
writel(pinz, &pio->piob.idr);
|
||||
writel(pinz, &pio->piob.pudr);
|
||||
writel(pinz, &pio->piob.per);
|
||||
writel(pinz, &pio->piob.oer);
|
||||
writel(pinz, &pio->piob.sodr);
|
||||
|
||||
for (row = 0; row < 5; row++) {
|
||||
for (col = 0; col < 5; col++) {
|
||||
writel((0x01000000 << col), &pio->piob.sodr);
|
||||
writel((0x01000000 << row), &pio->pioa.codr);
|
||||
printf("LED Test %d x %d\n", row, col);
|
||||
udelay(1000000);
|
||||
writel(pinz, &pio->piob.codr);
|
||||
writel(pins, &pio->pioa.sodr);
|
||||
}
|
||||
}
|
||||
return rcode;
|
||||
}
|
||||
|
||||
void poweroff(void)
|
||||
{
|
||||
watchdog_reset();
|
||||
at91_set_pio_output(AT91_PIO_PORTA, 13, 1); /* CAN_TX -> H */
|
||||
udelay(100);
|
||||
at91_set_pio_output(AT91_PIO_PORTA, 12, 0); /* CAN_STB -> L */
|
||||
udelay(100);
|
||||
at91_set_pio_output(AT91_PIO_PORTA, 11, 0); /* CAN_EN -> L */
|
||||
udelay(100);
|
||||
while (1)
|
||||
watchdog_reset();
|
||||
}
|
||||
|
||||
int do_poweroff(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
|
||||
{
|
||||
int rcode = 1;
|
||||
poweroff();
|
||||
return rcode;
|
||||
}
|
||||
|
||||
int do_beep(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
|
||||
{
|
||||
int i;
|
||||
u32 freq;
|
||||
u32 durate;
|
||||
int rcode = 1;
|
||||
|
||||
freq = 1000;
|
||||
durate = 2;
|
||||
switch (argc) {
|
||||
case 3:
|
||||
durate = simple_strtoul(argv[2], NULL, 10);
|
||||
case 2:
|
||||
freq = simple_strtoul(argv[1], NULL, 10);
|
||||
case 1:
|
||||
break;
|
||||
default:
|
||||
cmd_usage(cmdtp);
|
||||
rcode = 1;
|
||||
break;
|
||||
}
|
||||
durate = durate * freq;
|
||||
freq = 500000 / freq;
|
||||
for (i = 0; i < durate; i++) {
|
||||
at91_set_pio_output(AT91_PIO_PORTB, 29, 1); /* Sound On*/
|
||||
udelay(freq);
|
||||
at91_set_pio_output(AT91_PIO_PORTB, 29, 0); /* Sound Off*/
|
||||
udelay(freq);
|
||||
}
|
||||
at91_set_pio_output(AT91_PIO_PORTB, 29, 0); /* Sound Off*/
|
||||
return rcode;
|
||||
}
|
||||
|
||||
int do_keytest(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
|
||||
{
|
||||
int rcode = 1;
|
||||
int row;
|
||||
u32 col;
|
||||
u32 pinz;
|
||||
u32 pins;
|
||||
at91_pio_t *pio = (at91_pio_t *) ATMEL_BASE_PIO;
|
||||
at91_pmc_t *pmc = (at91_pmc_t *) ATMEL_BASE_PMC;
|
||||
|
||||
writel((1 << ATMEL_ID_PIOA), &pmc->pcer);
|
||||
|
||||
pins = 0x001F0000;
|
||||
writel(pins, &pio->pioa.idr);
|
||||
writel(pins, &pio->pioa.pudr);
|
||||
writel(pins, &pio->pioa.per);
|
||||
writel(pins, &pio->pioa.odr);
|
||||
|
||||
pinz = 0x000F0000;
|
||||
writel(pinz, &pio->piob.idr);
|
||||
writel(pinz, &pio->piob.pudr);
|
||||
writel(pinz, &pio->piob.per);
|
||||
writel(pinz, &pio->piob.oer);
|
||||
writel(pinz, &pio->piob.codr);
|
||||
|
||||
while (1) {
|
||||
col = 0;
|
||||
for (row = 0; row < 4; row++) {
|
||||
writel((0x00010000 << row), &pio->piob.sodr);
|
||||
udelay(10000);
|
||||
col <<= 4;
|
||||
col |= ((readl(&pio->pioa.pdsr) >> 16) & 0xF) ^ 0xF ;
|
||||
writel(pinz, &pio->piob.codr);
|
||||
}
|
||||
printf("Matix: ");
|
||||
for (row = 0; row < 16; row++) {
|
||||
printf("%1.1d", col & 1);
|
||||
col >>= 1;
|
||||
}
|
||||
printf(" SP %d\r ",
|
||||
1 ^ (1 & (readl(&pio->piob.pdsr) >> 20)));
|
||||
if ((1 & (readl(&pio->pioa.pdsr) >> 1)) == 0) {
|
||||
/* SHUTDOWN */
|
||||
row = 0;
|
||||
while (row < 1000) {
|
||||
if ((1 & (readl(&pio->pioa.pdsr) >> 1)) == 0)
|
||||
row++;
|
||||
udelay(100);
|
||||
}
|
||||
udelay(100000);
|
||||
row = 0;
|
||||
while (row < 1000) {
|
||||
if ((1 & (readl(&pio->pioa.pdsr) >> 1)) > 0) {
|
||||
row++;
|
||||
udelay(1000);
|
||||
}
|
||||
}
|
||||
poweroff();
|
||||
while (1)
|
||||
;
|
||||
}
|
||||
}
|
||||
return rcode;
|
||||
}
|
||||
|
||||
/*****************************************************************************/
|
||||
|
||||
U_BOOT_CMD(
|
||||
ledtest, 1, 0, do_ledtest,
|
||||
"test ledmatrix",
|
||||
"\n"
|
||||
);
|
||||
|
||||
U_BOOT_CMD(
|
||||
keytest, 1, 0, do_keytest,
|
||||
"test keymatix and special keys, poweroff on pressing ON key",
|
||||
"\n"
|
||||
);
|
||||
|
||||
U_BOOT_CMD(
|
||||
poweroff, 1, 0, do_poweroff,
|
||||
"power off",
|
||||
"\n"
|
||||
);
|
||||
|
||||
U_BOOT_CMD(
|
||||
beep, 3, 0, do_beep,
|
||||
"[freq [duration]]",
|
||||
"freq frequence of beep\nduration duration of beep\n"
|
||||
);
|
||||
|
||||
/*****************************************************************************/
|
||||
Loading…
Add table
Add a link
Reference in a new issue