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Fix for RUTX platform

This commit is contained in:
Ycarus (Yannick Chabanois) 2022-03-28 18:17:07 +02:00
parent ccdb64ad45
commit 59bc57d5d5
7254 changed files with 1810270 additions and 7 deletions

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# Copyright (c) 2011 The Chromium OS Authors.
# See file CREDITS for list of people who contributed to this
# project.
#
# This program is free software; you can redistribute it and/or
# modify it under the terms of the GNU General Public License as
# published by the Free Software Foundation; either version 2 of
# the License, or (at your option) any later version.
#
# This program is distributed in the hope that it will be useful,
# but WITHOUT ANY WARRANTY; without even the implied warranty of
# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
# GNU General Public License for more details.
#
# You should have received a copy of the GNU General Public License
# along with this program; if not, write to the Free Software
# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
# MA 02111-1307 USA
include $(TOPDIR)/config.mk
ifneq ($(OBJTREE),$(SRCTREE))
$(shell mkdir -p $(obj)board/$(VENDOR)/common)
endif
LIB = $(obj)lib$(VENDOR).o
COBJS-y += board.o
COBJS-$(CONFIG_SPI_UART_SWITCH) += uart-spi-switch.o
COBJS-$(CONFIG_TEGRA_CLOCK_SCALING) += emc.o
COBJS := $(COBJS-y)
SRCS := $(SOBJS:.o=.S) $(COBJS:.o=.c)
OBJS := $(addprefix $(obj),$(COBJS))
SOBJS := $(addprefix $(obj),$(SOBJS))
all: $(LIB)
$(LIB): $(obj).depend $(OBJS) $(SOBJS)
$(call cmd_link_o_target, $(OBJS) $(SOBJS))
#########################################################################
# This is for $(obj).depend target
include $(SRCTREE)/rules.mk
sinclude $(obj).depend
#########################################################################

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/*
* (C) Copyright 2010,2011
* NVIDIA Corporation <www.nvidia.com>
*
* See file CREDITS for list of people who contributed to this
* project.
*
* This program is free software; you can redistribute it and/or
* modify it under the terms of the GNU General Public License as
* published by the Free Software Foundation; either version 2 of
* the License, or (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 59 Temple Place, Suite 330, Boston,
* MA 02111-1307 USA
*/
#include <common.h>
#include <ns16550.h>
#include <linux/compiler.h>
#include <asm/io.h>
#include <asm/arch/tegra2.h>
#include <asm/arch/sys_proto.h>
#include <asm/arch/board.h>
#include <asm/arch/clk_rst.h>
#include <asm/arch/clock.h>
#include <asm/arch/emc.h>
#include <asm/arch/pinmux.h>
#include <asm/arch/pmc.h>
#include <asm/arch/pmu.h>
#include <asm/arch/uart.h>
#include <asm/arch/warmboot.h>
#include <spi.h>
#include <asm/arch/usb.h>
#include <i2c.h>
#include "board.h"
#include "emc.h"
DECLARE_GLOBAL_DATA_PTR;
const struct tegra2_sysinfo sysinfo = {
CONFIG_TEGRA2_BOARD_STRING
};
/*
* Routine: timer_init
* Description: init the timestamp and lastinc value
*/
int timer_init(void)
{
return 0;
}
void __pin_mux_usb(void)
{
}
void pin_mux_usb(void) __attribute__((weak, alias("__pin_mux_usb")));
void __pin_mux_spi(void)
{
}
void pin_mux_spi(void) __attribute__((weak, alias("__pin_mux_spi")));
/*
* Routine: power_det_init
* Description: turn off power detects
*/
static void power_det_init(void)
{
#if defined(CONFIG_TEGRA2)
struct pmc_ctlr *const pmc = (struct pmc_ctlr *)TEGRA2_PMC_BASE;
/* turn off power detects */
writel(0, &pmc->pmc_pwr_det_latch);
writel(0, &pmc->pmc_pwr_det);
#endif
}
/*
* Routine: board_init
* Description: Early hardware init.
*/
int board_init(void)
{
__maybe_unused int err;
/* Do clocks and UART first so that printf() works */
clock_init();
clock_verify();
#ifdef CONFIG_SPI_UART_SWITCH
gpio_config_uart();
#endif
#ifdef CONFIG_TEGRA_SPI
pin_mux_spi();
spi_init();
#endif
/* boot param addr */
gd->bd->bi_boot_params = (NV_PA_SDRAM_BASE + 0x100);
power_det_init();
#ifdef CONFIG_TEGRA_I2C
#ifndef CONFIG_SYS_I2C_INIT_BOARD
#error "You must define CONFIG_SYS_I2C_INIT_BOARD to use i2c on Nvidia boards"
#endif
i2c_init_board();
# ifdef CONFIG_TEGRA_PMU
if (pmu_set_nominal())
debug("Failed to select nominal voltages\n");
# ifdef CONFIG_TEGRA_CLOCK_SCALING
err = board_emc_init();
if (err)
debug("Memory controller init failed: %d\n", err);
# endif
# endif /* CONFIG_TEGRA_PMU */
#endif /* CONFIG_TEGRA_I2C */
#ifdef CONFIG_USB_EHCI_TEGRA
pin_mux_usb();
board_usb_init(gd->fdt_blob);
#endif
#ifdef CONFIG_TEGRA2_LP0
/* prepare the WB code to LP0 location */
warmboot_prepare_code(TEGRA_LP0_ADDR, TEGRA_LP0_SIZE);
#endif
return 0;
}
#ifdef CONFIG_BOARD_EARLY_INIT_F
static void __gpio_early_init(void)
{
}
void gpio_early_init(void) __attribute__((weak, alias("__gpio_early_init")));
int board_early_init_f(void)
{
board_init_uart_f();
/* Initialize periph GPIOs */
gpio_early_init();
#ifdef CONFIG_SPI_UART_SWITCH
gpio_early_init_uart();
#else
gpio_config_uart();
#endif
return 0;
}
#endif /* EARLY_INIT */

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/*
* (C) Copyright 2010,2011
* NVIDIA Corporation <www.nvidia.com>
*
* See file CREDITS for list of people who contributed to this
* project.
*
* This program is free software; you can redistribute it and/or
* modify it under the terms of the GNU General Public License as
* published by the Free Software Foundation; either version 2 of
* the License, or (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 59 Temple Place, Suite 330, Boston,
* MA 02111-1307 USA
*/
#ifndef _BOARD_H_
#define _BOARD_H_
void gpio_config_uart(void);
void gpio_early_init(void);
void gpio_early_init_uart(void);
/*
* Set up any pin muxing needed for USB (for now, since fdt doesn't support
* it). Boards can overwrite the default fucction which does nothing.
*/
void pin_mux_usb(void);
#endif /* BOARD_H */

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/*
* Copyright (c) 2011 The Chromium OS Authors.
*
* See file CREDITS for list of people who contributed to this
* project.
*
* This program is free software; you can redistribute it and/or
* modify it under the terms of the GNU General Public License as
* published by the Free Software Foundation; either version 2 of
* the License, or (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 59 Temple Place, Suite 330, Boston,
* MA 02111-1307 USA
*/
#include <common.h>
#include <asm/io.h>
#include <asm/arch/ap20.h>
#include <asm/arch/clk_rst.h>
#include <asm/arch/clock.h>
#include <asm/arch/emc.h>
#include <asm/arch/pmu.h>
#include <asm/arch/sys_proto.h>
#include <asm/arch/tegra2.h>
DECLARE_GLOBAL_DATA_PTR;
/* These rates are hard-coded for now, until fdt provides them */
#define EMC_SDRAM_RATE_T20 (333000 * 2 * 1000)
#define EMC_SDRAM_RATE_T25 (380000 * 2 * 1000)
int board_emc_init(void)
{
unsigned rate;
switch (tegra_get_chip_type()) {
default:
case TEGRA_SOC_T20:
rate = EMC_SDRAM_RATE_T20;
break;
case TEGRA_SOC_T25:
rate = EMC_SDRAM_RATE_T25;
break;
}
return tegra_set_emc(gd->fdt_blob, rate);
}

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/*
* Copyright (c) 2011 The Chromium OS Authors.
* (C) Copyright 2010,2011 NVIDIA Corporation <www.nvidia.com>
*
* See file CREDITS for list of people who contributed to this
* project.
*
* This program is free software; you can redistribute it and/or
* modify it under the terms of the GNU General Public License as
* published by the Free Software Foundation; either version 2 of
* the License, or (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 59 Temple Place, Suite 330, Boston,
* MA 02111-1307 USA
*/
#ifndef _NVIDIA_EMC_H_
#define _NVIDIA_EMC_H_
int board_emc_init(void);
#endif

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/*
* Copyright (c) 2011 The Chromium OS Authors.
*
* See file CREDITS for list of people who contributed to this
* project.
*
* This program is free software; you can redistribute it and/or
* modify it under the terms of the GNU General Public License as
* published by the Free Software Foundation; either version 2 of
* the License, or (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 59 Temple Place, Suite 330, Boston,
* MA 02111-1307 USA
*/
#include <common.h>
#include <asm/gpio.h>
#include <asm/arch/pinmux.h>
#include <asm/arch/uart-spi-switch.h>
#include <asm/arch/tegra2.h>
#include <asm/arch/tegra_spi.h>
/* position of the UART/SPI select switch */
enum spi_uart_switch {
SWITCH_UNKNOWN,
SWITCH_SPI,
SWITCH_UART,
SWITCH_BOTH
};
/* Information about the spi/uart switch */
struct spi_uart {
int gpio; /* GPIO to control switch */
u32 port; /* Port number of UART affected */
};
static struct spi_uart local;
static enum spi_uart_switch switch_pos; /* Current switch position */
static void get_config(struct spi_uart *config)
{
#if defined CONFIG_SPI_CORRUPTS_UART
config->gpio = CONFIG_UART_DISABLE_GPIO;
config->port = CONFIG_SPI_CORRUPTS_UART_NR;
#else
config->gpio = -1;
#endif
}
/*
* Init the UART / SPI switch. This can be called before relocation so we must
* not access BSS.
*/
void gpio_early_init_uart(void)
{
struct spi_uart config;
get_config(&config);
if (config.gpio != -1) {
/* Cannot provide a label prior to relocation */
gpio_request(config.gpio, NULL);
gpio_direction_output(config.gpio, 0);
}
}
/*
* Configure the UART / SPI switch.
*/
void gpio_config_uart(void)
{
get_config(&local);
if (local.gpio != -1) {
gpio_direction_output(local.gpio, 0);
switch_pos = SWITCH_UART;
} else {
/*
* If we're here we don't have a SPI switch; go ahead and
* enable the SPI now. We didn't in spi_init() so we wouldn't
* kill the UART.
*/
pinmux_set_func(PINGRP_GMC, PMUX_FUNC_SFLASH);
switch_pos = SWITCH_BOTH;
}
}
static void spi_uart_switch(struct spi_uart *config,
enum spi_uart_switch new_pos)
{
if (switch_pos == SWITCH_BOTH || new_pos == switch_pos)
return;
/* pre-delay, allow SPI/UART to settle, FIFO to empty, etc. */
udelay(CONFIG_SPI_CORRUPTS_UART_DLY);
/* We need to dynamically change the pinmux, shared w/UART RXD/CTS */
pinmux_set_func(PINGRP_GMC, new_pos == SWITCH_SPI ?
PMUX_FUNC_SFLASH : PMUX_FUNC_UARTD);
/*
* On Seaboard, MOSI/MISO are shared w/UART.
* Use GPIO I3 (UART_DISABLE) to tristate UART during SPI activity.
* Enable UART later (cs_deactivate) so we can use it for U-Boot comms.
*/
gpio_direction_output(config->gpio, new_pos == SWITCH_SPI);
switch_pos = new_pos;
}
void pinmux_select_uart(void)
{
spi_uart_switch(&local, SWITCH_UART);
}
void pinmux_select_spi(void)
{
spi_uart_switch(&local, SWITCH_SPI);
}

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/dts-v1/;
/include/ ARCH_CPU_DTS
/ {
model = "NVIDIA Tegra2 Harmony evaluation board";
compatible = "nvidia,harmony", "nvidia,tegra20";
aliases {
usb0 = "/usb@c5008000";
};
memory {
reg = <0x00000000 0x40000000>;
};
clocks {
clk_32k: clk_32k {
clock-frequency = <32000>;
};
osc {
clock-frequency = <12000000>;
};
};
clock@60006000 {
clocks = <&clk_32k &osc>;
};
serial@70006300 {
clock-frequency = < 216000000 >;
};
i2c@7000c000 {
status = "disabled";
};
i2c@7000c400 {
status = "disabled";
};
i2c@7000c500 {
status = "disabled";
};
i2c@7000d000 {
status = "disabled";
};
usb@c5000000 {
status = "disabled";
};
usb@c5004000 {
status = "disabled";
};
};

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/dts-v1/;
/memreserve/ 0x1c000000 0x04000000;
/include/ ARCH_CPU_DTS
/ {
model = "NVIDIA Seaboard";
compatible = "nvidia,seaboard", "nvidia,tegra20";
chosen {
bootargs = "vmalloc=192M video=tegrafb console=ttyS0,115200n8 root=/dev/mmcblk1p3 rw rootwait";
};
aliases {
/* This defines the order of our USB ports */
usb0 = "/usb@c5008000";
usb1 = "/usb@c5000000";
i2c0 = "/i2c@7000d000";
i2c1 = "/i2c@7000c000";
i2c2 = "/i2c@7000c400";
i2c3 = "/i2c@7000c500";
};
memory {
device_type = "memory";
reg = < 0x00000000 0x40000000 >;
};
/* This is not used in U-Boot, but is expected to be in kernel .dts */
i2c@7000d000 {
clock-frequency = <100000>;
pmic@34 {
compatible = "ti,tps6586x";
reg = <0x34>;
clk_32k: clock {
compatible = "fixed-clock";
/*
* leave out for now due to CPP:
* #clock-cells = <0>;
*/
clock-frequency = <32768>;
};
};
};
clocks {
osc {
clock-frequency = <12000000>;
};
};
clock@60006000 {
clocks = <&clk_32k &osc>;
};
serial@70006300 {
clock-frequency = < 216000000 >;
};
sdhci@c8000400 {
cd-gpios = <&gpio 69 0>; /* gpio PI5 */
wp-gpios = <&gpio 57 0>; /* gpio PH1 */
power-gpios = <&gpio 70 0>; /* gpio PI6 */
};
sdhci@c8000600 {
support-8bit;
};
usb@c5000000 {
nvidia,vbus-gpio = <&gpio 24 0>; /* PD0 */
dr_mode = "otg";
};
usb@c5004000 {
status = "disabled";
};
i2c@7000c000 {
clock-frequency = <100000>;
};
i2c@7000c400 {
status = "disabled";
};
i2c@7000c500 {
clock-frequency = <100000>;
};
emc@7000f400 {
emc-table@190000 {
reg = < 190000 >;
compatible = "nvidia,tegra20-emc-table";
clock-frequency = < 190000 >;
nvidia,emc-registers = < 0x0000000c 0x00000026
0x00000009 0x00000003 0x00000004 0x00000004
0x00000002 0x0000000c 0x00000003 0x00000003
0x00000002 0x00000001 0x00000004 0x00000005
0x00000004 0x00000009 0x0000000d 0x0000059f
0x00000000 0x00000003 0x00000003 0x00000003
0x00000003 0x00000001 0x0000000b 0x000000c8
0x00000003 0x00000007 0x00000004 0x0000000f
0x00000002 0x00000000 0x00000000 0x00000002
0x00000000 0x00000000 0x00000083 0xa06204ae
0x007dc010 0x00000000 0x00000000 0x00000000
0x00000000 0x00000000 0x00000000 0x00000000 >;
};
emc-table@380000 {
reg = < 380000 >;
compatible = "nvidia,tegra20-emc-table";
clock-frequency = < 380000 >;
nvidia,emc-registers = < 0x00000017 0x0000004b
0x00000012 0x00000006 0x00000004 0x00000005
0x00000003 0x0000000c 0x00000006 0x00000006
0x00000003 0x00000001 0x00000004 0x00000005
0x00000004 0x00000009 0x0000000d 0x00000b5f
0x00000000 0x00000003 0x00000003 0x00000006
0x00000006 0x00000001 0x00000011 0x000000c8
0x00000003 0x0000000e 0x00000007 0x0000000f
0x00000002 0x00000000 0x00000000 0x00000002
0x00000000 0x00000000 0x00000083 0xe044048b
0x007d8010 0x00000000 0x00000000 0x00000000
0x00000000 0x00000000 0x00000000 0x00000000 >;
};
};
kbc@7000e200 {
linux,keymap = <0x00020011 0x0003001f 0x0004001e 0x0005002c
0x000701d0 0x0107007d 0x02060064 0x02070038 0x03000006
0x03010005 0x03020013 0x03030012 0x03040021 0x03050020
0x0306002d 0x04000008 0x04010007 0x04020014 0x04030023
0x04040022 0x0405002f 0x0406002e 0x04070039 0x0500000a
0x05010009 0x05020016 0x05030015 0x05040024 0x05050031
0x05060030 0x0507002b 0x0600000c 0x0601000b 0x06020018
0x06030017 0x06040026 0x06050025 0x06060033 0x06070032
0x0701000d 0x0702001b 0x0703001c 0x0707008b 0x08040036
0x0805002a 0x09050061 0x0907001d 0x0b00001a 0x0b010019
0x0b020028 0x0b030027 0x0b040035 0x0b050034 0x0c000044
0x0c010043 0x0c02000e 0x0c030004 0x0c040003 0x0c050067
0x0c0600d2 0x0c070077 0x0d00006e 0x0d01006f 0x0d030068
0x0d04006d 0x0d05006a 0x0d06006c 0x0d070069 0x0e000057
0x0e010058 0x0e020042 0x0e030010 0x0e04003e 0x0e05003d
0x0e060002 0x0e070041 0x0f000001 0x0f010029 0x0f02003f
0x0f03000f 0x0f04003b 0x0f05003c 0x0f06003a 0x0f070040
0x14000047 0x15000049 0x15010048 0x1502004b 0x1504004f
0x16010062 0x1602004d 0x1603004c 0x16040051 0x16050050
0x16070052 0x1b010037 0x1b03004a 0x1b04004e 0x1b050053
0x1c050073 0x1d030066 0x1d04006b 0x1d0500e0 0x1d060072
0x1d0700e1 0x1e000045 0x1e010046 0x1e020071
0x1f04008a>;
linux,fn-keymap = <0x05040002>;
};
};

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/dts-v1/;
/include/ ARCH_CPU_DTS
/ {
model = "NVIDIA Tegra2 Ventana evaluation board";
compatible = "nvidia,ventana", "nvidia,tegra20";
aliases {
usb0 = "/usb@c5008000";
};
memory {
reg = <0x00000000 0x40000000>;
};
clocks {
clk_32k: clk_32k {
clock-frequency = <32000>;
};
osc {
clock-frequency = <12000000>;
};
};
clock@60006000 {
clocks = <&clk_32k &osc>;
};
serial@70006300 {
clock-frequency = < 216000000 >;
};
i2c@7000c000 {
status = "disabled";
};
i2c@7000c400 {
status = "disabled";
};
i2c@7000c500 {
status = "disabled";
};
i2c@7000d000 {
status = "disabled";
};
usb@c5000000 {
status = "disabled";
};
usb@c5004000 {
status = "disabled";
};
};

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/dts-v1/;
/include/ ARCH_CPU_DTS
/ {
model = "NVIDIA Tegra2 Whistler evaluation board";
compatible = "nvidia,whistler", "nvidia,tegra20";
aliases {
i2c0 = "/i2c@7000d000";
usb0 = "/usb@c5008000";
usb1 = "/usb@c5000000";
};
memory {
device_type = "memory";
reg = < 0x00000000 0x20000000 >;
};
clocks {
osc {
clock-frequency = <12000000>;
};
};
clock@60006000 {
clocks = <&clk_32k &osc>;
};
serial@70006000 {
clock-frequency = < 216000000 >;
};
i2c@7000c000 {
status = "disabled";
};
i2c@7000c400 {
status = "disabled";
};
i2c@7000c500 {
status = "disabled";
};
i2c@7000d000 {
clock-frequency = <100000>;
pmic@3c {
compatible = "maxim,max8907b";
reg = <0x3c>;
clk_32k: clock {
compatible = "fixed-clock";
/*
* leave out for now due to CPP:
* #clock-cells = <0>;
*/
clock-frequency = <32768>;
};
};
};
usb@c5004000 {
status = "disabled";
};
};

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#
# (C) Copyright 2010,2011
# NVIDIA Corporation <www.nvidia.com>
#
#
# See file CREDITS for list of people who contributed to this
# project.
#
# This program is free software; you can redistribute it and/or
# modify it under the terms of the GNU General Public License as
# published by the Free Software Foundation; either version 2 of
# the License, or (at your option) any later version.
#
# This program is distributed in the hope that it will be useful,
# but WITHOUT ANY WARRANTY; without even the implied warranty of
# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
# GNU General Public License for more details.
#
# You should have received a copy of the GNU General Public License
# along with this program; if not, write to the Free Software
# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
# MA 02111-1307 USA
#
include $(TOPDIR)/config.mk
ifneq ($(OBJTREE),$(SRCTREE))
$(shell mkdir -p $(obj)../common)
endif
LIB = $(obj)lib$(BOARD).o
COBJS := $(BOARD).o
SRCS := $(COBJS:.o=.c)
OBJS := $(addprefix $(obj),$(COBJS))
$(LIB): $(obj).depend $(OBJS)
$(call cmd_link_o_target, $(OBJS))
#########################################################################
# defines $(obj).depend target
include $(SRCTREE)/rules.mk
sinclude $(obj).depend
#########################################################################

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/*
* (C) Copyright 2010,2011
* NVIDIA Corporation <www.nvidia.com>
*
* See file CREDITS for list of people who contributed to this
* project.
*
* This program is free software; you can redistribute it and/or
* modify it under the terms of the GNU General Public License as
* published by the Free Software Foundation; either version 2 of
* the License, or (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 59 Temple Place, Suite 330, Boston,
* MA 02111-1307 USA
*/
#include <common.h>
#include <asm/io.h>
#include <asm/arch/tegra2.h>
#include <asm/arch/clock.h>
#include <asm/arch/funcmux.h>
#include <asm/arch/pinmux.h>
#include <asm/arch/mmc.h>
#include <asm/gpio.h>
#ifdef CONFIG_TEGRA_MMC
#include <mmc.h>
#endif
/*
* Routine: gpio_config_uart
* Description: Does nothing on Harmony - no conflict w/SPI.
*/
void gpio_config_uart(void)
{
}
#ifdef CONFIG_TEGRA_MMC
/*
* Routine: pin_mux_mmc
* Description: setup the pin muxes/tristate values for the SDMMC(s)
*/
static void pin_mux_mmc(void)
{
funcmux_select(PERIPH_ID_SDMMC4, FUNCMUX_SDMMC4_ATB_GMA_GME_8_BIT);
funcmux_select(PERIPH_ID_SDMMC2, FUNCMUX_SDMMC2_DTA_DTD_8BIT);
/* For power GPIO PI6 */
pinmux_tristate_disable(PINGRP_ATA);
/* For CD GPIO PH2 */
pinmux_tristate_disable(PINGRP_ATD);
/* For power GPIO PT3 */
pinmux_tristate_disable(PINGRP_DTB);
/* For CD GPIO PI5 */
pinmux_tristate_disable(PINGRP_ATC);
}
/* this is a weak define that we are overriding */
int board_mmc_init(bd_t *bd)
{
debug("board_mmc_init called\n");
/* Enable muxes, etc. for SDMMC controllers */
pin_mux_mmc();
debug("board_mmc_init: init SD slot J26\n");
/* init dev 0, SD slot J26, with 4-bit bus */
/* The board has an 8-bit bus, but 8-bit doesn't work yet */
tegra2_mmc_init(0, 4, GPIO_PI6, GPIO_PH2);
debug("board_mmc_init: init SD slot J5\n");
/* init dev 2, SD slot J5, with 4-bit bus */
tegra2_mmc_init(2, 4, GPIO_PT3, GPIO_PI5);
return 0;
}
#endif

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#
# (C) Copyright 2010,2011
# NVIDIA Corporation <www.nvidia.com>
#
#
# See file CREDITS for list of people who contributed to this
# project.
#
# This program is free software; you can redistribute it and/or
# modify it under the terms of the GNU General Public License as
# published by the Free Software Foundation; either version 2 of
# the License, or (at your option) any later version.
#
# This program is distributed in the hope that it will be useful,
# but WITHOUT ANY WARRANTY; without even the implied warranty of
# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
# GNU General Public License for more details.
#
# You should have received a copy of the GNU General Public License
# along with this program; if not, write to the Free Software
# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
# MA 02111-1307 USA
#
include $(TOPDIR)/config.mk
ifneq ($(OBJTREE),$(SRCTREE))
$(shell mkdir -p $(obj)../common)
endif
LIB = $(obj)lib$(BOARD).o
COBJS := $(BOARD).o
SRCS := $(COBJS:.o=.c)
OBJS := $(addprefix $(obj),$(COBJS))
$(LIB): $(obj).depend $(OBJS)
$(call cmd_link_o_target, $(OBJS))
#########################################################################
# defines $(obj).depend target
include $(SRCTREE)/rules.mk
sinclude $(obj).depend
#########################################################################

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/*
* (C) Copyright 2010,2011
* NVIDIA Corporation <www.nvidia.com>
*
* See file CREDITS for list of people who contributed to this
* project.
*
* This program is free software; you can redistribute it and/or
* modify it under the terms of the GNU General Public License as
* published by the Free Software Foundation; either version 2 of
* the License, or (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 59 Temple Place, Suite 330, Boston,
* MA 02111-1307 USA
*/
#include <common.h>
#include <asm/io.h>
#include <asm/arch/tegra2.h>
#include <asm/arch/clock.h>
#include <asm/arch/funcmux.h>
#include <asm/arch/pinmux.h>
#include <asm/arch/mmc.h>
#include <asm/gpio.h>
#ifdef CONFIG_TEGRA_MMC
#include <mmc.h>
#endif
/* TODO: Remove this code when the SPI switch is working */
#ifndef CONFIG_SPI_UART_SWITCH
/*
* Routine: gpio_config_uart_seaboard
* Description: Force GPIO_PI3 low on Seaboard so UART4 works.
*/
static void gpio_config_uart_seaboard(void)
{
/* Enable UART via GPIO_PI3 (port 8, bit 3) so serial console works */
gpio_request(GPIO_PI3, NULL);
gpio_direction_output(GPIO_PI3, 0);
}
void gpio_config_uart(void)
{
if (machine_is_ventana())
return;
gpio_config_uart_seaboard();
}
#endif
#ifdef CONFIG_TEGRA_MMC
/*
* Routine: pin_mux_mmc
* Description: setup the pin muxes/tristate values for the SDMMC(s)
*/
static void pin_mux_mmc(void)
{
funcmux_select(PERIPH_ID_SDMMC4, FUNCMUX_SDMMC4_ATB_GMA_GME_8_BIT);
funcmux_select(PERIPH_ID_SDMMC3, FUNCMUX_SDMMC3_SDB_4BIT);
/* For power GPIO PI6 */
pinmux_tristate_disable(PINGRP_ATA);
/* For CD GPIO PI5 */
pinmux_tristate_disable(PINGRP_ATC);
}
/* this is a weak define that we are overriding */
int board_mmc_init(bd_t *bd)
{
debug("board_mmc_init called\n");
/* Enable muxes, etc. for SDMMC controllers */
pin_mux_mmc();
debug("board_mmc_init: init eMMC\n");
/* init dev 0, eMMC chip, with 4-bit bus */
/* The board has an 8-bit bus, but 8-bit doesn't work yet */
tegra2_mmc_init(0, 4, -1, -1);
debug("board_mmc_init: init SD slot\n");
/* init dev 1, SD slot, with 4-bit bus */
tegra2_mmc_init(1, 4, GPIO_PI6, GPIO_PI5);
return 0;
}
#endif
void pin_mux_usb(void)
{
/* For USB's GPIO PD0. For now, since we have no pinmux in fdt */
pinmux_tristate_disable(PINGRP_SLXK);
}

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#
# (C) Copyright 2010,2011
# NVIDIA Corporation <www.nvidia.com>
#
#
# See file CREDITS for list of people who contributed to this
# project.
#
# This program is free software; you can redistribute it and/or
# modify it under the terms of the GNU General Public License as
# published by the Free Software Foundation; either version 2 of
# the License, or (at your option) any later version.
#
# This program is distributed in the hope that it will be useful,
# but WITHOUT ANY WARRANTY; without even the implied warranty of
# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
# GNU General Public License for more details.
#
# You should have received a copy of the GNU General Public License
# along with this program; if not, write to the Free Software
# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
# MA 02111-1307 USA
#
include $(TOPDIR)/config.mk
ifneq ($(OBJTREE),$(SRCTREE))
$(shell mkdir -p $(obj)../common $(obj)../seaboard)
endif
LIB = $(obj)lib$(BOARD).o
COBJS = ../seaboard/seaboard.o
SRCS := $(COBJS:.o=.c)
OBJS := $(addprefix $(obj),$(COBJS))
$(LIB): $(obj).depend $(OBJS)
$(call cmd_link_o_target, $(OBJS))
#########################################################################
# defines $(obj).depend target
include $(SRCTREE)/rules.mk
sinclude $(obj).depend
#########################################################################

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#
# (C) Copyright 2010-2012
# NVIDIA Corporation <www.nvidia.com>
#
#
# See file CREDITS for list of people who contributed to this
# project.
#
# This program is free software; you can redistribute it and/or
# modify it under the terms of the GNU General Public License as
# published by the Free Software Foundation; either version 2 of
# the License, or (at your option) any later version.
#
# This program is distributed in the hope that it will be useful,
# but WITHOUT ANY WARRANTY; without even the implied warranty of
# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
# GNU General Public License for more details.
#
# You should have received a copy of the GNU General Public License
# along with this program; if not, write to the Free Software
# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
# MA 02111-1307 USA
#
include $(TOPDIR)/config.mk
ifneq ($(OBJTREE),$(SRCTREE))
$(shell mkdir -p $(obj)../common)
endif
LIB = $(obj)lib$(BOARD).o
COBJS := $(BOARD).o
SRCS := $(COBJS:.o=.c)
OBJS := $(addprefix $(obj),$(COBJS))
$(LIB): $(obj).depend $(OBJS)
$(call cmd_link_o_target, $(OBJS))
#########################################################################
# defines $(obj).depend target
include $(SRCTREE)/rules.mk
sinclude $(obj).depend
#########################################################################

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/*
* (C) Copyright 2010-2012
* NVIDIA Corporation <www.nvidia.com>
*
* See file CREDITS for list of people who contributed to this
* project.
*
* This program is free software; you can redistribute it and/or
* modify it under the terms of the GNU General Public License as
* published by the Free Software Foundation; either version 2 of
* the License, or (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 59 Temple Place, Suite 330, Boston,
* MA 02111-1307 USA
*/
#include <common.h>
#include <i2c.h>
#include <asm/io.h>
#include <asm/arch/tegra2.h>
#include <asm/arch/clock.h>
#include <asm/arch/funcmux.h>
#include <asm/arch/pinmux.h>
#include <asm/arch/mmc.h>
#include <asm/gpio.h>
#ifdef CONFIG_TEGRA_MMC
#include <mmc.h>
#endif
/*
* Routine: gpio_config_uart
* Description: Does nothing on Whistler - no UART-related GPIOs.
*/
void gpio_config_uart(void)
{
}
/*
* Routine: pin_mux_mmc
* Description: setup the pin muxes/tristate values for the SDMMC(s)
*/
static void pin_mux_mmc(void)
{
funcmux_select(PERIPH_ID_SDMMC3, FUNCMUX_SDMMC3_SDB_SLXA_8BIT);
funcmux_select(PERIPH_ID_SDMMC4, FUNCMUX_SDMMC4_ATC_ATD_8BIT);
}
/* this is a weak define that we are overriding */
int board_mmc_init(bd_t *bd)
{
uchar val;
int ret;
debug("board_mmc_init called\n");
/* Turn on MAX8907B LDO12 to 2.8V for J40 power */
ret = i2c_set_bus_num(0);
if (ret)
printf("i2c_set_bus_num failed: %d\n", ret);
val = 0x29;
ret = i2c_write(0x3c, 0x46, 1, &val, 1);
if (ret)
printf("i2c_write 0 0x3c 0x46 failed: %d\n", ret);
val = 0x00;
ret = i2c_write(0x3c, 0x45, 1, &val, 1);
if (ret)
printf("i2c_write 0 0x3c 0x45 failed: %d\n", ret);
val = 0x1f;
ret = i2c_write(0x3c, 0x44, 1, &val, 1);
if (ret)
printf("i2c_write 0 0x3c 0x44 failed: %d\n", ret);
/* Enable muxes, etc. for SDMMC controllers */
pin_mux_mmc();
/* init dev 0 (SDMMC4), (J29 "HSMMC") with 8-bit bus */
tegra2_mmc_init(0, 8, -1, -1);
/* init dev 1 (SDMMC3), (J40 "SDIO3") with 8-bit bus */
tegra2_mmc_init(1, 8, -1, -1);
return 0;
}
/* this is a weak define that we are overriding */
void pin_mux_usb(void)
{
uchar val;
int ret;
/*
* This is a hack. This should be represented in DT using the
* vbus-gpio property. However, U-Boot's DT support doesn't
* support any GPIO controller other than the Tegra's yet.
*/
/* Turn on TAC6416's GPIO 0+1 for USB1/3's VBUS */
ret = i2c_set_bus_num(0);
if (ret)
printf("i2c_set_bus_num failed: %d\n", ret);
val = 0x03;
ret = i2c_write(0x20, 2, 1, &val, 1);
if (ret)
printf("i2c_write 0 0x20 2 failed: %d\n", ret);
val = 0xfc;
ret = i2c_write(0x20, 6, 1, &val, 1);
if (ret)
printf("i2c_write 0 0x20 6 failed: %d\n", ret);
}