Fix merge

2025-03-09 15:40:20 +00:00 · 2020-08-21 14:14:37 +02:00 · 2020-08-21 14:14:37 +02:00 · 61b3e06b2b
commit 61b3e06b2b
parent 304dbdde70 d576c72253
85 changed files with 35270 additions and 6208 deletions
--- a/root/target/linux/generic/config-5.4
+++ b/root/target/linux/generic/config-5.4
--- a/root/target/linux/generic/hack-4.14/690-mptcp_v0.94.patch
+++ b/root/target/linux/generic/hack-4.14/690-mptcp_v0.94.patch
--- a/root/target/linux/generic/hack-5.4/690-mptcp_trunk.patch
+++ b/root/target/linux/generic/hack-5.4/690-mptcp_trunk.patch
--- a/root/target/linux/generic/hack-5.4/692-tcp_nanqinlang.patch
+++ b/root/target/linux/generic/hack-5.4/692-tcp_nanqinlang.patch
--- a/root/target/linux/generic/hack-5.4/998-ndpi-netfilter.patch
+++ b/root/target/linux/generic/hack-5.4/998-ndpi-netfilter.patch
@ -0,0 +1,116 @@
+diff --git a/include/net/netfilter/nf_conntrack_extend.h b/include/net/netfilter/nf_conntrack_extend.h
+index 21f887c..59980ec 100644
+--- a/include/net/netfilter/nf_conntrack_extend.h
+++ b/include/net/netfilter/nf_conntrack_extend.h
+@@ -28,7 +28,8 @@ enum nf_ct_ext_id {
+ #if IS_ENABLED(CONFIG_NETFILTER_SYNPROXY)
+ 	NF_CT_EXT_SYNPROXY,
+ #endif
+-	NF_CT_EXT_NUM,
+	NF_CT_EXT_CUSTOM,
+	NF_CT_EXT_NUM=NF_CT_EXT_CUSTOM+CONFIG_NF_CONNTRACK_CUSTOM,
+ };
+ 
+ #define NF_CT_EXT_HELPER_TYPE struct nf_conn_help
+@@ -96,5 +97,6 @@ struct nf_ct_ext_type {
+ };
+ 
+ int nf_ct_extend_register(const struct nf_ct_ext_type *type);
+int nf_ct_extend_custom_register(struct nf_ct_ext_type *type,unsigned long int cid);
+ void nf_ct_extend_unregister(const struct nf_ct_ext_type *type);
+ #endif /* _NF_CONNTRACK_EXTEND_H */
+diff --git a/net/netfilter/Kconfig b/net/netfilter/Kconfig
+index 7581e82..30a11eb 100644
+--- a/net/netfilter/Kconfig
+++ b/net/netfilter/Kconfig
+@@ -85,6 +85,16 @@ config NF_CONNTRACK_SECMARK
+ 
+ 	  If unsure, say 'N'.
+ 
+config NF_CONNTRACK_CUSTOM
+	int "Number of custom extend"
+	range 0 8
+	depends on NETFILTER_ADVANCED
+	default "2"
+	help
+	  This parameter specifies how many custom extensions can be registered.
+
+	  The default value is 2.
+
+ config NF_CONNTRACK_ZONES
+ 	bool  'Connection tracking zones'
+ 	depends on NETFILTER_ADVANCED
+diff --git a/net/netfilter/nf_conntrack_core.c b/net/netfilter/nf_conntrack_core.c
+index 85f643c..44e2fdd 100644
+--- a/net/netfilter/nf_conntrack_core.c
+++ b/net/netfilter/nf_conntrack_core.c
+@@ -1971,7 +1971,7 @@ int nf_conntrack_set_hashsize(const char *val, const struct kernel_param *kp)
+ static __always_inline unsigned int total_extension_size(void)
+ {
+ 	/* remember to add new extensions below */
+-	BUILD_BUG_ON(NF_CT_EXT_NUM > 9);
+	BUILD_BUG_ON(NF_CT_EXT_NUM > 12);
+ 
+ 	return sizeof(struct nf_ct_ext) +
+ 	       sizeof(struct nf_conn_help)
+diff --git a/net/netfilter/nf_conntrack_extend.c b/net/netfilter/nf_conntrack_extend.c
+index 9fe0ddc..5a9054e 100644
+--- a/net/netfilter/nf_conntrack_extend.c
+++ b/net/netfilter/nf_conntrack_extend.c
+@@ -108,11 +108,56 @@ int nf_ct_extend_register(const struct nf_ct_ext_type *type)
+ }
+ EXPORT_SYMBOL_GPL(nf_ct_extend_register);
+ 
+static unsigned long int nf_ct_ext_cust_id[CONFIG_NF_CONNTRACK_CUSTOM];
+static enum nf_ct_ext_id 
+nf_ct_extend_get_custom_id(unsigned long int ext_id);
+
+int nf_ct_extend_custom_register(struct nf_ct_ext_type *type,
+				 unsigned long int cid)
+{
+	int ret;
+	enum nf_ct_ext_id new_id = nf_ct_extend_get_custom_id(cid);
+	if(!new_id)
+		return -EBUSY;
+	type->id = new_id;
+	ret = nf_ct_extend_register(type);
+	if(ret < 0) {
+		mutex_lock(&nf_ct_ext_type_mutex);
+		nf_ct_ext_cust_id[new_id - NF_CT_EXT_CUSTOM] = 0;
+		mutex_unlock(&nf_ct_ext_type_mutex);
+	}
+	return ret;
+}
+EXPORT_SYMBOL_GPL(nf_ct_extend_custom_register);
+
+static enum nf_ct_ext_id 
+nf_ct_extend_get_custom_id(unsigned long int ext_id)
+{
+	enum nf_ct_ext_id ret = 0;
+	int i;
+	mutex_lock(&nf_ct_ext_type_mutex);
+	for(i = 0; i < CONFIG_NF_CONNTRACK_CUSTOM; i++) {
+		if(!nf_ct_ext_cust_id[i]) {
+			nf_ct_ext_cust_id[i] = ext_id;
+			ret = i+NF_CT_EXT_CUSTOM;
+			break;
+		}
+		if(nf_ct_ext_cust_id[i] == ext_id) {
+			ret = i+NF_CT_EXT_CUSTOM;
+			break;
+		}
+	}
+	mutex_unlock(&nf_ct_ext_type_mutex);
+	return ret;
+}
+
+ /* This MUST be called in process context. */
+ void nf_ct_extend_unregister(const struct nf_ct_ext_type *type)
+ {
+ 	mutex_lock(&nf_ct_ext_type_mutex);
+ 	RCU_INIT_POINTER(nf_ct_ext_types[type->id], NULL);
+	if(type->id >= NF_CT_EXT_CUSTOM && type->id < NF_CT_EXT_NUM)
+		nf_ct_ext_cust_id[type->id-NF_CT_EXT_CUSTOM] = 0;
+ 	mutex_unlock(&nf_ct_ext_type_mutex);
+ 	synchronize_rcu();
+ }
--- a/root/target/linux/generic/hack-5.4/999-stop-promiscuous-info.patch
+++ b/root/target/linux/generic/hack-5.4/999-stop-promiscuous-info.patch
@ -0,0 +1,14 @@
+--- a/net/core/dev.c	2018-08-10 10:31:41.199494561 +0200
+++ b/net/core/dev.c	2018-08-10 10:32:03.635272509 +0200
+@@ -6613,9 +6613,11 @@
+ 		}
+ 	}
+ 	if (dev->flags != old_flags) {
+		/*
+ 		pr_info("device %s %s promiscuous mode\n",
+ 			dev->name,
+ 			dev->flags & IFF_PROMISC ? "entered" : "left");
+		*/
+ 		if (audit_enabled) {
+ 			current_uid_gid(&uid, &gid);
+ 			audit_log(current->audit_context, GFP_ATOMIC,
--- a/root/target/linux/mediatek/Makefile
+++ b/root/target/linux/mediatek/Makefile
@ -0,0 +1,19 @@
+# Copyright (c) 2015 OpenWrt.org
+#
+include $(TOPDIR)/rules.mk
+
+ARCH:=arm
+BOARD:=mediatek
+BOARDNAME:=MediaTek Ralink ARM
+SUBTARGETS:=mt7622 mt7623 mt7629
+FEATURES:=squashfs nand ramdisk fpu ext4 usb
+
+KERNEL_PATCHVER:=5.4
+KERNEL_TESTING_PATCHVER:=5.4
+
+include $(INCLUDE_DIR)/target.mk
+DEFAULT_PACKAGES += \
+	kmod-leds-gpio kmod-gpio-button-hotplug \
+	wpad-mini uboot-envtools partx-utils e2fsprogs
+
+$(eval $(call BuildTarget))
--- a/root/target/linux/mediatek/image/Makefile
+++ b/root/target/linux/mediatek/image/Makefile
@ -1,104 +0,0 @@
-#
-# Copyright (C) 2012-2015 OpenWrt.org
-# Copyright (C) 2016-2017 LEDE project
-#
-# This is free software, licensed under the GNU General Public License v2.
-# See /LICENSE for more information.
-#
-include $(TOPDIR)/rules.mk
-include $(INCLUDE_DIR)/image.mk
-
-# for arm
-KERNEL_LOADADDR := 0x80008000
-
-# for arm64
-ifeq ($(SUBTARGET),mt7622)
-KERNEL_LOADADDR = 0x41080000
-endif
-
-ifndef $(CONFIG_TARGET_ROOTFS_PARTSIZE)
-    CONFIG_TARGET_ROOTFS_PARTSIZE := 512
-endif
-
-ifndef $(CONFIG_TARGET_KERNEL_PARTSIZE)
-    CONFIG_TARGET_KERNEL_PARTSIZE := 64
-endif
-
-FAT32_BLOCK_SIZE=1024
-FAT32_BLOCKS=$(shell echo $$(($(CONFIG_TARGET_KERNEL_PARTSIZE)*1024*1024/$(FAT32_BLOCK_SIZE))))
-
-define Build/mediatek-sdcard
-    rm -f $@.boot
-    mkfs.fat $@.boot -C $(FAT32_BLOCKS)
-    mcopy -i $@.boot $(STAGING_DIR_IMAGE)/$(DEVICE_NAME)-uEnv.txt ::uEnv.txt
-    mcopy -i $@.boot $(IMAGE_KERNEL) ::uImage
-    ./gen_mediatek_sdcard_img.sh $@ \
-            $(STAGING_DIR_IMAGE)/bpi-r2-preloader.bin \
-            $(STAGING_DIR_IMAGE)/$(DEVICE_NAME)-uboot-mediatek.bin \
-            $@.boot \
-            $(IMAGE_ROOTFS) \
-            $(CONFIG_TARGET_KERNEL_PARTSIZE) \
-            $(CONFIG_TARGET_ROOTFS_PARTSIZE)
-    rm -f $@.boot
-endef
-
-define Build/sysupgrade-emmc
-  rm -f $@.recovery
-  mkfs.fat -C $@.recovery 3070
-
-  dd bs="512" of="$@" if="$(IMAGE_KERNEL)"
-  dd bs="512" of="$@" if="$@.recovery" seek="67072"
-  dd bs="512" of="$@" if="$(IMAGE_ROOTFS)" seek="87552"
-  dd if=/dev/zero of="$@" bs=128k count=1 oflag=append conv=notrunc
-endef
-
-define Build/sysupgrade-bpi-r2-sd
-  dd bs="1024" if="$(STAGING_DIR_IMAGE)/mtk-bpi-r2-preloader-sd.bin" of="$@" seek="0"
-  dd bs="1024" if="$(STAGING_DIR_IMAGE)/mtk-bpi-r2-uboot.bin" of="$@" seek="320"
-  dd bs="1024" if="$(IMAGE_KERNEL)" of="$@" seek="2048"
-  dd bs="1024" if="$(IMAGE_ROOTFS)" of="$@" seek="67584"
-endef
-define Build/sysupgrade-bpi-r2-emmc
-  dd bs="1024" if="$(STAGING_DIR_IMAGE)/mtk-bpi-r2-preloader-emmc.bin" of="$@" seek="0"
-  dd bs="1024" if="$(STAGING_DIR_IMAGE)/mtk-bpi-r2-uboot.bin" of="$@" seek="320"
-  dd bs="1024" if="$(IMAGE_KERNEL)" of="$@" seek="2048"
-  dd bs="1024" if="$(IMAGE_ROOTFS)" of="$@" seek="67584"
-endef
-
-# default all platform image(fit) build 
-define Device/Default
-  PROFILES = Default $$(DEVICE_NAME)
-  KERNEL_NAME := zImage
-#  FILESYSTEMS := squashfs
-  DEVICE_DTS_DIR := $(DTS_DIR)
-  IMAGES := sysupgrade.bin
-  IMAGE/sysupgrade.bin := append-kernel | append-rootfs | pad-rootfs | append-metadata 
-ifeq ($(SUBTARGET),mt7623)
-  DEVICE_VARS := MEDIATEK_UBOOT
-  KERNEL_NAME := zImage
-  KERNEL := kernel-bin | append-dtb | uImage none
-  KERNEL_INITRAMFS := kernel-bin | append-dtb | uImage none
-  FILESYSTEMS := ext4
-endif
-ifeq ($(SUBTARGET),mt7622)
-  FILESYSTEMS := squashfs
-  KERNEL_NAME := Image
-  KERNEL = kernel-bin | lzma | fit lzma $$(KDIR)/image-$$(firstword $$(DEVICE_DTS)).dtb
-  KERNEL_INITRAMFS = kernel-bin | lzma | fit lzma $$(KDIR)/image-$$(firstword $$(DEVICE_DTS)).dtb
-endif
-endef
-
-ifeq ($(SUBTARGET),mt7622)
-include mt7622.mk
-endif
-
-ifeq ($(SUBTARGET),mt7623)
-include mt7623.mk
-endif
-
-define Image/Build
-	$(call Image/Build/$(1),$(1))
-endef
-
-$(eval $(call BuildImage))
-
--- a/root/target/linux/mediatek/image/gen_mediatek_sdcard_img.sh
+++ b/root/target/linux/mediatek/image/gen_mediatek_sdcard_img.sh
@ -1,48 +0,0 @@
-#!/usr/bin/env bash
-#
-# Copyright (C) 2013 OpenWrt.org
-#
-# This is free software, licensed under the GNU General Public License v2.
-# See /LICENSE for more information.
-#
-
-set -e
-[ $# -eq 7 ] || {
-    echo "SYNTAX: $0 <file> <preloader image> <u-boot image> <bootfs image> <rootfs image> <bootfs size> <rootfs size>"
-    exit 1
-}
-
-OUTPUT="$1"
-PRELOADER="$2"
-UBOOT="$3"
-BOOTFS="$4"
-ROOTFS="$5"
-BOOTFSSIZE="$6"
-ROOTFSSIZE="$7"
-
-head=4
-sect=63
-
-set `ptgen -o $OUTPUT -h $head -s $sect -l 1024 -t c -p ${BOOTFSSIZE}M -t 83 -p ${ROOTFSSIZE}M -a 0`
-
-BOOT_OFFSET="$(($1 / 512))"
-BOOT_SIZE="$(($2 / 512))"
-ROOTFS_OFFSET="$(($3 / 512))"
-ROOTFS_SIZE="$(($4 / 512))"
-
-PRELOADER_OFFSET=2     # 2KB
-UBOOT_OFFSET=320       # 320KB
-
-SDMMC_BOOT="SDMMC_BOOT\x00\x00\x01\x00\x00\x00\x00\x02\x00\x00"
-BRLYT="\
-BRLYT\x00\x00\x00\x01\x00\x00\x00\x00\x08\x00\x00\
-\x00\x08\x00\x00\x42\x42\x42\x42\x08\x00\x01\x00\x00\x08\x00\x00\
-\x00\x08\x00\x00\x01\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00"
-
-echo -en "${SDMMC_BOOT}" | dd bs=1 of="${OUTPUT}" seek=0   conv=notrunc
-echo -en "${BRLYT}"      | dd bs=1 of="${OUTPUT}" seek=512 conv=notrunc
-
-dd bs=1024 if="${PRELOADER}" of="${OUTPUT}" seek="${PRELOADER_OFFSET}" conv=notrunc
-dd bs=1024 if="${UBOOT}"     of="${OUTPUT}" seek="${UBOOT_OFFSET}"     conv=notrunc
-dd bs=512  if="${BOOTFS}"    of="${OUTPUT}" seek="${BOOT_OFFSET}"      conv=notrunc
-dd bs=512  if="${ROOTFS}"    of="${OUTPUT}" seek="${ROOTFS_OFFSET}"    conv=notrunc
--- a/root/target/linux/mediatek/image/mt7623.mk
+++ b/root/target/linux/mediatek/image/mt7623.mk
@ -1,26 +0,0 @@
-define Device/7623a-unielec-u7623-02-emmc-512m
-  DEVICE_TITLE := MTK7623a UniElec U7623-02 (eMMC/512MB RAM)
-  DEVICE_DTS := mt7623a-unielec-u7623-02-emmc-512M
-  DEVICE_PACKAGES := mkf2fs e2fsprogs kmod-fs-vfat kmod-nls-cp437 kmod-nls-iso8859-1 kmod-mmc
-  SUPPORTED_DEVICES := unielec,u7623-02-emmc-512m
-  IMAGES := sysupgrade-emmc.bin.gz
-  IMAGE/sysupgrade-emmc.bin.gz := sysupgrade-emmc | gzip | append-metadata
-endef
-
-TARGET_DEVICES += 7623a-unielec-u7623-02-emmc-512m
-
-define Device/7623n-bananapi-bpi-r2
-  DEVICE_TITLE := MTK7623n BananaPi R2
-  DEVICE_DTS := mt7623n-bananapi-bpi-r2
-#  DEVICE_PACKAGES := wmt uboot-mtk-bpi-r2 kmod-crypto-hw-mtk kmod-nat-hw-mtk
-  DEVICE_PACKAGES := wmt uboot-mtk-bpi-r2 kmod-crypto-hw-mtk kmod-mt6625l-wlan-gen2 kmod-usb-core kmod-ata-core kmod-usb3 kmod-usb2 kmod-usb-ohci mt7623n-preloader
-  SUPPORTED_DEVICES := bananapi,bpi-r2
-  IMAGES := sysupgrade.tar sysupgrade-sd.img.gz sysupgrade-emmc.img.gz sdcard.img.gz
-#  IMAGES := sdcard.img.gz
-  IMAGE/sysupgrade.tar := sysupgrade-tar | append-metadata
-  IMAGE/sysupgrade-sd.img.gz := sysupgrade-bpi-r2-sd | gzip | append-metadata
-  IMAGE/sysupgrade-emmc.img.gz := sysupgrade-bpi-r2-emmc | gzip | append-metadata
-  IMAGE/sdcard.img.gz := mediatek-sdcard | gzip | append-metadata
-endef
-
-TARGET_DEVICES += 7623n-bananapi-bpi-r2
--- a/root/target/linux/mediatek/modules.mk
+++ b/root/target/linux/mediatek/modules.mk
@ -6,7 +6,7 @@ define KernelPackage/ata-ahci-mtk
 	$(LINUX_DIR)/drivers/ata/libahci_platform.ko
  AUTOLOAD:=$(call AutoLoad,40,libahci libahci_platform ahci_mtk,1)
  $(call AddDepends/ata)
-  DEPENDS+=@TARGET_mediatek_mt7622
+  DEPENDS+=@(TARGET_mediatek_mt7622||TARGET_mediatek_mt7623)
 endef

 define KernelPackage/ata-ahci-mtk/description
@ -49,38 +49,3 @@ define KernelPackage/crypto-hw-mtk/description
 endef

 $(eval $(call KernelPackage,crypto-hw-mtk))
-
-define KernelPackage/nat-hw-mtk
-  TITLE:= MediaTek's hardware NAT module
-  DEPENDS:=@TARGET_mediatek @!LINUX_4_19
-  KCONFIG:= \
-	CONFIG_NET_MEDIATEK_HNAT=y
-  FILES:=$(LINUX_DIR)/drivers/net/ethernet/mediatek/mtk_hnat/mtkhnat.ko
-  AUTOLOAD:=$(call AutoLoad,90,mtkhnat)
-endef
-
-define KernelPackage/nat-hw-mtk/description
-  MediaTek's hardware NAT driver.
-endef
-
-$(eval $(call KernelPackage,nat-hw-mtk))
-
-define KernelPackage/mt6625l-wlan-gen2
-  SUBMENU:=$(NETWORK_DEVICES_MENU)
-  TITLE:=Mediatek mt66xx wlan_gen2 driver
-  DEPENDS:=@TARGET_mediatek +kmod-mac80211 +@DRIVER_11N_SUPPORT
-  KCONFIG:= \
-    CONFIG_MTK_WAPI_SUPPORT=y \
-    CONFIG_MTK_PASSPOINT_R1_SUPPORT=y \
-    CONFIG_MTK_PASSPOINT_R2_SUPPORT=y \
-    CONFIG_MTK_WIFI_MCC_SUPPORT=y \
-    CONFIG_MTK_COMBO_WIFI
-  FILES:=$(LINUX_DIR)/drivers/misc/mediatek/connectivity/wlan/gen2/wlan_gen2.ko
-  AUTOLOAD:=$(call AutoProbe,wlan_gen2)
-endef
-
-define KernelPackage/wlan-gen2/description
- This package contains the Mediatek mt66xx wlan_gen2 kernel module
-endef
-
-$(eval $(call KernelPackage,mt6625l-wlan-gen2))
--- a/root/target/linux/mediatek/mt7623/base-files/etc/board.d/02_network
+++ b/root/target/linux/mediatek/mt7623/base-files/etc/board.d/02_network
@ -9,13 +9,9 @@ mediatek_setup_interfaces()
 	local board="$1"

 	case $board in
-	'mediatek,mt7623a-rfb-emmc')
-		ucidef_set_interface_lan "lan0 lan1 lan2 lan3"
-		ucidef_set_interface_wan eth1
-		;;
-	'bananapi,bpi-r2'|\
-	"unielec,u7623"*)
-		ucidef_set_interface_lan "lan"
+	bananapi,bpi-r2|\
+	unielec,u7623-02-emmc-512m)
+		ucidef_set_interfaces_lan_wan "wan1 wan2 wan3 wan4" "lan"
 		;;
 	esac
 }
@ -25,9 +21,8 @@ mediatek_setup_macs()
 	local board="$1"

 	case $board in
-	"unielec,u7623"*)
-		mac=$(cat /sys/class/net/wan/address)
-		ucidef_set_interface_macaddr "lan" $mac
+	unielec,u7623-02-emmc-512m)
+		ucidef_set_interface_macaddr "lan" "$(cat /sys/class/net/lan/address)"
 		;;
 	esac
 }
--- a/root/target/linux/mediatek/mt7623/base-files/lib/preinit/07_set_iface_mac
+++ b/root/target/linux/mediatek/mt7623/base-files/lib/preinit/07_set_iface_mac
@ -0,0 +1,47 @@
+#!/bin/sh
+# Copyright (C) 2018 OpenWrt.org
+
+RECOVERY_PART=/dev/mmcblk0p1
+
+preinit_set_mac_address() {
+	local mac
+
+	. /lib/functions.sh
+	. /lib/functions/system.sh
+
+	case $(board_name) in
+	unielec,u7623-02-emmc-512m)
+		if [ -b $RECOVERY_PART ]; then
+			insmod nls_cp437
+			insmod nls_iso8859-1
+			insmod fat
+			insmod vfat
+			mkdir -p /tmp/recovery
+			mount -o rw,noatime $RECOVERY_PART /tmp/recovery
+
+			if [ -f "/tmp/recovery/mac_addr" ];
+			then
+				mac=$(cat /tmp/recovery/mac_addr)
+			else
+				mac=$(cat /sys/class/net/eth0/address)
+				echo "$mac" > /tmp/recovery/mac_addr
+			fi
+
+			sync
+			umount /tmp/recovery
+			rm -rf /tmp/recovery
+		fi
+
+		ip link set dev lan address $mac 2> /dev/null
+
+		mac=$(macaddr_add $mac 1)
+
+		ip link set dev wan1 address $mac 2>/dev/null
+		ip link set dev wan2 address $mac 2>/dev/null
+		ip link set dev wan3 address $mac 2>/dev/null
+		ip link set dev wan4 address $mac 2>/dev/null
+		;;
+	esac
+}
+
+boot_hook_add preinit_main preinit_set_mac_address
--- a/root/target/linux/mediatek/mt7623/base-files/lib/preinit/79_move_config
+++ b/root/target/linux/mediatek/mt7623/base-files/lib/preinit/79_move_config
@ -0,0 +1,19 @@
+#!/bin/sh
+# Copyright (C) 2012-2015 OpenWrt.org
+
+move_config() {
+	local partdev
+
+	. /lib/upgrade/common.sh
+
+	if export_bootdevice && export_partdevice partdev -1; then
+		if mount -t vfat -o rw,noatime "/dev/$partdev" /mnt; then
+			if [ -f /mnt/sysupgrade.tgz ]; then
+				mv -f /mnt/sysupgrade.tgz /
+			fi
+			umount /mnt
+		fi
+	fi
+}
+
+boot_hook_add preinit_mount_root move_config
--- a/root/target/linux/mediatek/mt7623/base-files/lib/upgrade/platform.sh
+++ b/root/target/linux/mediatek/mt7623/base-files/lib/upgrade/platform.sh
@ -0,0 +1,154 @@
+platform_do_upgrade() {
+	local board=$(board_name)
+
+	case "$board" in
+	unielec,u7623-02-emmc-512m)
+		#Keep the persisten random mac address (if it exists)
+		mkdir -p /tmp/recovery
+		mount -o rw,noatime /dev/mmcblk0p1 /tmp/recovery
+		[ -f "/tmp/recovery/mac_addr" ] && \
+			mv -f /tmp/recovery/mac_addr /tmp/
+		umount /tmp/recovery
+
+		#1310720 is the offset in bytes from the start of eMMC and to
+		#the location of the kernel (2560 512 byte sectors)
+		get_image "$1" | dd of=/dev/mmcblk0 bs=1310720 seek=1 conv=fsync
+
+		mount -o rw,noatime /dev/mmcblk0p1 /tmp/recovery
+		[ -f "/tmp/mac_addr" ] && mv -f /tmp/mac_addr /tmp/recovery
+		sync
+		umount /tmp/recovery
+		;;
+	bananapi,bpi-r2)
+		local diskdev partdev diff
+
+		export_bootdevice && export_partdevice diskdev -2 || {
+			echo "Unable to determine upgrade device"
+			return 1
+		}
+
+		sync
+
+		if [ "$SAVE_PARTITIONS" = "1" ]; then
+			get_partitions "/dev/$diskdev" bootdisk
+
+			#extract the boot sector from the image
+			get_image "$@" | dd of=/tmp/image.bs count=1 bs=512b
+
+			get_partitions /tmp/image.bs image
+
+			#compare tables
+			diff="$(grep -F -x -v -f /tmp/partmap.bootdisk /tmp/partmap.image)"
+		else
+			diff=1
+		fi
+
+		if [ -n "$diff" ]; then
+			get_image "$@" | dd of="/dev/$diskdev" bs=4096 conv=fsync
+
+			# Separate removal and addtion is necessary; otherwise, partition 1
+			# will be missing if it overlaps with the old partition 2
+			partx -d - "/dev/$diskdev"
+			partx -a - "/dev/$diskdev"
+
+			return 0
+		fi
+
+		#write uboot image
+		get_image "$@" | dd of="$diskdev" bs=1024 skip=320 seek=320 count=700 conv=fsync
+		#iterate over each partition from the image and write it to the boot disk
+		while read part start size; do
+			part="$(($part - 2))"
+			if export_partdevice partdev $part; then
+				echo "Writing image to /dev/$partdev..."
+				get_image "$@" | dd of="/dev/$partdev" ibs="512" obs=1M skip="$start" count="$size" conv=fsync
+			else
+				echo "Unable to find partition $part device, skipped."
+			fi
+		done < /tmp/partmap.image
+
+		#copy partition uuid
+		echo "Writing new UUID to /dev/$diskdev..."
+		get_image "$@" | dd of="/dev/$diskdev" bs=1 skip=440 count=4 seek=440 conv=fsync
+		;;
+	*)
+		default_do_upgrade "$1"
+		;;
+	esac
+}
+
+PART_NAME=firmware
+
+platform_check_image() {
+	local board=$(board_name)
+	local magic="$(get_magic_long "$1")"
+
+	[ "$#" -gt 1 ] && return 1
+
+	case "$board" in
+	unielec,u7623-02-emmc-512m)
+		[ "$magic" != "27051956" ] && {
+			echo "Invalid image type."
+			return 1
+		}
+		return 0
+		;;
+	bananapi,bpi-r2)
+		local diskdev partdev diff
+
+		export_bootdevice && export_partdevice diskdev -2 || {
+			echo "Unable to determine upgrade device"
+			return 1
+		}
+
+		get_partitions "/dev/$diskdev" bootdisk
+
+		#extract the boot sector from the image
+		get_image "$@" | dd of=/tmp/image.bs count=1 bs=512b 2>/dev/null
+
+		get_partitions /tmp/image.bs image
+
+		#compare tables
+		diff="$(grep -F -x -v -f /tmp/partmap.bootdisk /tmp/partmap.image)"
+
+		rm -f /tmp/image.bs /tmp/partmap.bootdisk /tmp/partmap.image
+
+		if [ -n "$diff" ]; then
+			echo "Partition layout has changed. Full image will be written."
+			ask_bool 0 "Abort" && exit 1
+			return 0
+		fi
+		;;
+	*)
+		echo "Sysupgrade is not supported on your board yet."
+		return 1
+		;;
+	esac
+
+	return 0
+}
+
+platform_copy_config_emmc() {
+	mkdir -p /recovery
+	mount -o rw,noatime /dev/mmcblk0p1 /recovery
+	cp -af "$UPGRADE_BACKUP" "/recovery/$BACKUP_FILE"
+	sync
+	umount /recovery
+}
+
+platform_copy_config() {
+	case "$(board_name)" in
+	unielec,u7623-02-emmc-512m)
+		platform_copy_config_emmc
+		;;
+	bananapi,bpi-r2)
+		local partdev
+
+		if export_partdevice partdev -1; then
+			mount -t vfat -o rw,noatime "/dev/$partdev" /mnt
+			cp -af "$CONF_TAR" /mnt/
+			umount /mnt
+		fi
+		;;
+	esac
+}
--- a/root/target/linux/mediatek/mt7623/config-5.4
+++ b/root/target/linux/mediatek/mt7623/config-5.4
@ -0,0 +1,561 @@
+# CONFIG_AIO is not set
+CONFIG_ALIGNMENT_TRAP=y
+CONFIG_ARCH_32BIT_OFF_T=y
+CONFIG_ARCH_CLOCKSOURCE_DATA=y
+CONFIG_ARCH_HAS_BINFMT_FLAT=y
+CONFIG_ARCH_HAS_DEBUG_VIRTUAL=y
+CONFIG_ARCH_HAS_ELF_RANDOMIZE=y
+CONFIG_ARCH_HAS_FORTIFY_SOURCE=y
+CONFIG_ARCH_HAS_GCOV_PROFILE_ALL=y
+CONFIG_ARCH_HAS_KCOV=y
+CONFIG_ARCH_HAS_KEEPINITRD=y
+CONFIG_ARCH_HAS_MEMBARRIER_SYNC_CORE=y
+CONFIG_ARCH_HAS_PHYS_TO_DMA=y
+CONFIG_ARCH_HAS_SETUP_DMA_OPS=y
+CONFIG_ARCH_HAS_SET_MEMORY=y
+CONFIG_ARCH_HAS_STRICT_KERNEL_RWX=y
+CONFIG_ARCH_HAS_STRICT_MODULE_RWX=y
+CONFIG_ARCH_HAS_TEARDOWN_DMA_OPS=y
+CONFIG_ARCH_HAS_TICK_BROADCAST=y
+CONFIG_ARCH_HAVE_CUSTOM_GPIO_H=y
+CONFIG_ARCH_HIBERNATION_POSSIBLE=y
+CONFIG_ARCH_KEEP_MEMBLOCK=y
+CONFIG_ARCH_MEDIATEK=y
+CONFIG_ARCH_MIGHT_HAVE_PC_PARPORT=y
+# CONFIG_ARCH_MILBEAUT is not set
+CONFIG_ARCH_MULTIPLATFORM=y
+CONFIG_ARCH_MULTI_V6_V7=y
+CONFIG_ARCH_MULTI_V7=y
+CONFIG_ARCH_NR_GPIO=0
+CONFIG_ARCH_OPTIONAL_KERNEL_RWX=y
+CONFIG_ARCH_OPTIONAL_KERNEL_RWX_DEFAULT=y
+# CONFIG_ARCH_RDA is not set
+CONFIG_ARCH_SUPPORTS_ATOMIC_RMW=y
+CONFIG_ARCH_SUPPORTS_UPROBES=y
+CONFIG_ARCH_SUSPEND_POSSIBLE=y
+CONFIG_ARCH_USE_BUILTIN_BSWAP=y
+CONFIG_ARCH_USE_CMPXCHG_LOCKREF=y
+CONFIG_ARCH_WANT_DEFAULT_TOPDOWN_MMAP_LAYOUT=y
+CONFIG_ARCH_WANT_GENERAL_HUGETLB=y
+CONFIG_ARCH_WANT_IPC_PARSE_VERSION=y
+CONFIG_ARM=y
+CONFIG_ARM_APPENDED_DTB=y
+CONFIG_ARM_ARCH_TIMER=y
+CONFIG_ARM_ARCH_TIMER_EVTSTREAM=y
+# CONFIG_ARM_ATAG_DTB_COMPAT is not set
+CONFIG_ARM_CPU_SUSPEND=y
+# CONFIG_ARM_CPU_TOPOLOGY is not set
+# CONFIG_ARM_ERRATA_814220 is not set
+# CONFIG_ARM_ERRATA_857271 is not set
+# CONFIG_ARM_ERRATA_857272 is not set
+CONFIG_ARM_GIC=y
+CONFIG_ARM_HAS_SG_CHAIN=y
+CONFIG_ARM_L1_CACHE_SHIFT=6
+CONFIG_ARM_L1_CACHE_SHIFT_6=y
+# CONFIG_ARM_LPAE is not set
+CONFIG_ARM_MEDIATEK_CPUFREQ=y
+CONFIG_ARM_PATCH_IDIV=y
+CONFIG_ARM_PATCH_PHYS_VIRT=y
+# CONFIG_ARM_SMMU is not set
+CONFIG_ARM_THUMB=y
+CONFIG_ARM_THUMBEE=y
+CONFIG_ARM_UNWIND=y
+CONFIG_ARM_VIRT_EXT=y
+CONFIG_ATAGS=y
+CONFIG_AUTO_ZRELADDR=y
+# CONFIG_BACKLIGHT_CLASS_DEVICE is not set
+CONFIG_BINFMT_FLAT_ARGVP_ENVP_ON_STACK=y
+CONFIG_BLK_DEV_LOOP=y
+CONFIG_BLK_MQ_PCI=y
+CONFIG_BLK_PM=y
+CONFIG_BOUNCE=y
+# CONFIG_CACHE_L2X0 is not set
+CONFIG_CC_CAN_LINK=y
+CONFIG_CC_HAS_ASM_INLINE=y
+CONFIG_CC_HAS_KASAN_GENERIC=y
+CONFIG_CC_HAS_WARN_MAYBE_UNINITIALIZED=y
+CONFIG_CLEANCACHE=y
+CONFIG_CLKDEV_LOOKUP=y
+CONFIG_CLKSRC_MMIO=y
+CONFIG_CLONE_BACKWARDS=y
+CONFIG_CMDLINE="earlyprintk console=ttyS0,115200 rootfstype=squashfs,jffs2"
+CONFIG_CMDLINE_FROM_BOOTLOADER=y
+CONFIG_COMMON_CLK=y
+CONFIG_COMMON_CLK_MEDIATEK=y
+CONFIG_COMMON_CLK_MT2701=y
+# CONFIG_COMMON_CLK_MT2701_AUDSYS is not set
+CONFIG_COMMON_CLK_MT2701_BDPSYS=y
+CONFIG_COMMON_CLK_MT2701_ETHSYS=y
+# CONFIG_COMMON_CLK_MT2701_G3DSYS is not set
+CONFIG_COMMON_CLK_MT2701_HIFSYS=y
+CONFIG_COMMON_CLK_MT2701_IMGSYS=y
+CONFIG_COMMON_CLK_MT2701_MMSYS=y
+CONFIG_COMMON_CLK_MT2701_VDECSYS=y
+# CONFIG_COMMON_CLK_MT7622 is not set
+# CONFIG_COMMON_CLK_MT7629 is not set
+# CONFIG_COMMON_CLK_MT8135 is not set
+# CONFIG_COMMON_CLK_MT8173 is not set
+CONFIG_COMMON_CLK_MT8516=y
+# CONFIG_COMMON_CLK_MT8516_AUDSYS is not set
+CONFIG_COMPAT_32BIT_TIME=y
+CONFIG_COREDUMP=y
+# CONFIG_CPUFREQ_DT is not set
+CONFIG_CPU_32v6K=y
+CONFIG_CPU_32v7=y
+CONFIG_CPU_ABRT_EV7=y
+# CONFIG_CPU_BPREDICT_DISABLE is not set
+CONFIG_CPU_CACHE_V7=y
+CONFIG_CPU_CACHE_VIPT=y
+CONFIG_CPU_COPY_V6=y
+CONFIG_CPU_CP15=y
+CONFIG_CPU_CP15_MMU=y
+CONFIG_CPU_FREQ=y
+CONFIG_CPU_FREQ_DEFAULT_GOV_PERFORMANCE=y
+CONFIG_CPU_FREQ_GOV_ATTR_SET=y
+CONFIG_CPU_FREQ_GOV_COMMON=y
+CONFIG_CPU_FREQ_GOV_CONSERVATIVE=y
+CONFIG_CPU_FREQ_GOV_ONDEMAND=y
+CONFIG_CPU_FREQ_GOV_PERFORMANCE=y
+CONFIG_CPU_FREQ_GOV_POWERSAVE=y
+# CONFIG_CPU_FREQ_GOV_USERSPACE is not set
+CONFIG_CPU_FREQ_STAT=y
+CONFIG_CPU_HAS_ASID=y
+# CONFIG_CPU_HOTPLUG_STATE_CONTROL is not set
+# CONFIG_CPU_ICACHE_DISABLE is not set
+# CONFIG_CPU_ICACHE_MISMATCH_WORKAROUND is not set
+CONFIG_CPU_PABRT_V7=y
+CONFIG_CPU_PM=y
+CONFIG_CPU_RMAP=y
+CONFIG_CPU_SPECTRE=y
+# CONFIG_CPU_THERMAL is not set
+CONFIG_CPU_THUMB_CAPABLE=y
+CONFIG_CPU_TLB_V7=y
+CONFIG_CPU_V7=y
+CONFIG_CRC16=y
+# CONFIG_CRC32_SARWATE is not set
+CONFIG_CRC32_SLICEBY8=y
+CONFIG_CROSS_MEMORY_ATTACH=y
+CONFIG_CRYPTO_ACOMP2=y
+CONFIG_CRYPTO_AEAD=y
+CONFIG_CRYPTO_AEAD2=y
+CONFIG_CRYPTO_AKCIPHER2=y
+CONFIG_CRYPTO_CRC32=y
+CONFIG_CRYPTO_CRC32C=y
+CONFIG_CRYPTO_CTR=y
+CONFIG_CRYPTO_DEFLATE=y
+CONFIG_CRYPTO_DEV_MEDIATEK=y
+CONFIG_CRYPTO_DRBG=y
+CONFIG_CRYPTO_DRBG_HMAC=y
+CONFIG_CRYPTO_DRBG_MENU=y
+CONFIG_CRYPTO_HASH=y
+CONFIG_CRYPTO_HASH2=y
+CONFIG_CRYPTO_HASH_INFO=y
+CONFIG_CRYPTO_HMAC=y
+CONFIG_CRYPTO_HW=y
+CONFIG_CRYPTO_JITTERENTROPY=y
+CONFIG_CRYPTO_KPP2=y
+CONFIG_CRYPTO_LIB_AES=y
+CONFIG_CRYPTO_LIB_SHA256=y
+CONFIG_CRYPTO_LZO=y
+CONFIG_CRYPTO_MANAGER=y
+CONFIG_CRYPTO_MANAGER2=y
+CONFIG_CRYPTO_NULL=y
+CONFIG_CRYPTO_NULL2=y
+CONFIG_CRYPTO_RNG=y
+CONFIG_CRYPTO_RNG2=y
+CONFIG_CRYPTO_RNG_DEFAULT=y
+CONFIG_CRYPTO_SEQIV=y
+CONFIG_CRYPTO_SHA1=y
+CONFIG_CRYPTO_SHA256=y
+CONFIG_CRYPTO_SHA512=y
+CONFIG_CRYPTO_ZSTD=y
+CONFIG_DCACHE_WORD_ACCESS=y
+CONFIG_DEBUG_ALIGN_RODATA=y
+CONFIG_DEBUG_BUGVERBOSE=y
+CONFIG_DEBUG_GPIO=y
+CONFIG_DEBUG_INFO=y
+CONFIG_DEBUG_LL=y
+CONFIG_DEBUG_LL_INCLUDE="debug/8250.S"
+CONFIG_DEBUG_MISC=y
+CONFIG_DEBUG_MT6589_UART0=y
+# CONFIG_DEBUG_MT8127_UART0 is not set
+# CONFIG_DEBUG_MT8135_UART3 is not set
+CONFIG_DEBUG_PREEMPT=y
+CONFIG_DEBUG_UART_8250=y
+# CONFIG_DEBUG_UART_8250_FLOW_CONTROL is not set
+CONFIG_DEBUG_UART_8250_SHIFT=2
+# CONFIG_DEBUG_UART_8250_WORD is not set
+CONFIG_DEBUG_UART_PHYS=0x11004000
+CONFIG_DEBUG_UART_VIRT=0xf1004000
+CONFIG_DEBUG_UNCOMPRESS=y
+# CONFIG_DEBUG_USER is not set
+CONFIG_DMADEVICES=y
+CONFIG_DMA_ENGINE=y
+CONFIG_DMA_OF=y
+CONFIG_DMA_REMAP=y
+CONFIG_DTC=y
+CONFIG_EARLY_PRINTK=y
+CONFIG_EDAC_ATOMIC_SCRUB=y
+CONFIG_EDAC_SUPPORT=y
+CONFIG_EINT_MTK=y
+CONFIG_ELF_CORE=y
+# CONFIG_ENERGY_MODEL is not set
+CONFIG_EXT4_FS=y
+# CONFIG_F2FS_CHECK_FS is not set
+CONFIG_F2FS_FS=y
+# CONFIG_F2FS_FS_SECURITY is not set
+CONFIG_F2FS_FS_XATTR=y
+CONFIG_F2FS_STAT_FS=y
+CONFIG_FIXED_PHY=y
+CONFIG_FIX_EARLYCON_MEM=y
+CONFIG_FREEZER=y
+# CONFIG_FSL_QDMA is not set
+CONFIG_FS_IOMAP=y
+CONFIG_FS_MBCACHE=y
+CONFIG_FW_LOADER_PAGED_BUF=y
+CONFIG_GENERIC_ALLOCATOR=y
+CONFIG_GENERIC_BUG=y
+CONFIG_GENERIC_CLOCKEVENTS=y
+CONFIG_GENERIC_CLOCKEVENTS_BROADCAST=y
+CONFIG_GENERIC_CPU_AUTOPROBE=y
+CONFIG_GENERIC_EARLY_IOREMAP=y
+CONFIG_GENERIC_IDLE_POLL_SETUP=y
+CONFIG_GENERIC_IRQ_EFFECTIVE_AFF_MASK=y
+CONFIG_GENERIC_IRQ_MIGRATION=y
+CONFIG_GENERIC_IRQ_MULTI_HANDLER=y
+CONFIG_GENERIC_IRQ_SHOW=y
+CONFIG_GENERIC_IRQ_SHOW_LEVEL=y
+CONFIG_GENERIC_MSI_IRQ=y
+CONFIG_GENERIC_MSI_IRQ_DOMAIN=y
+CONFIG_GENERIC_PCI_IOMAP=y
+CONFIG_GENERIC_PHY=y
+CONFIG_GENERIC_PINCONF=y
+CONFIG_GENERIC_PINCTRL_GROUPS=y
+CONFIG_GENERIC_PINMUX_FUNCTIONS=y
+CONFIG_GENERIC_SCHED_CLOCK=y
+CONFIG_GENERIC_SMP_IDLE_THREAD=y
+CONFIG_GENERIC_STRNCPY_FROM_USER=y
+CONFIG_GENERIC_STRNLEN_USER=y
+CONFIG_GPIOLIB=y
+CONFIG_GPIO_SYSFS=y
+# CONFIG_HABANA_AI is not set
+CONFIG_HANDLE_DOMAIN_IRQ=y
+CONFIG_HARDEN_BRANCH_PREDICTOR=y
+CONFIG_HARDIRQS_SW_RESEND=y
+CONFIG_HAS_DMA=y
+CONFIG_HAS_IOMEM=y
+CONFIG_HAS_IOPORT_MAP=y
+CONFIG_HAVE_ARCH_AUDITSYSCALL=y
+CONFIG_HAVE_ARCH_BITREVERSE=y
+CONFIG_HAVE_ARCH_JUMP_LABEL=y
+CONFIG_HAVE_ARCH_KGDB=y
+CONFIG_HAVE_ARCH_PFN_VALID=y
+CONFIG_HAVE_ARCH_SECCOMP_FILTER=y
+CONFIG_HAVE_ARCH_THREAD_STRUCT_WHITELIST=y
+CONFIG_HAVE_ARCH_TRACEHOOK=y
+CONFIG_HAVE_ARM_ARCH_TIMER=y
+CONFIG_HAVE_ARM_SMCCC=y
+CONFIG_HAVE_CLK=y
+CONFIG_HAVE_CLK_PREPARE=y
+CONFIG_HAVE_CONTEXT_TRACKING=y
+CONFIG_HAVE_COPY_THREAD_TLS=y
+CONFIG_HAVE_C_RECORDMCOUNT=y
+CONFIG_HAVE_DEBUG_KMEMLEAK=y
+CONFIG_HAVE_DMA_CONTIGUOUS=y
+CONFIG_HAVE_DYNAMIC_FTRACE=y
+CONFIG_HAVE_DYNAMIC_FTRACE_WITH_REGS=y
+CONFIG_HAVE_EBPF_JIT=y
+CONFIG_HAVE_EFFICIENT_UNALIGNED_ACCESS=y
+CONFIG_HAVE_FTRACE_MCOUNT_RECORD=y
+CONFIG_HAVE_FUNCTION_GRAPH_TRACER=y
+CONFIG_HAVE_FUNCTION_TRACER=y
+CONFIG_HAVE_IDE=y
+CONFIG_HAVE_IRQ_TIME_ACCOUNTING=y
+CONFIG_HAVE_LD_DEAD_CODE_DATA_ELIMINATION=y
+CONFIG_HAVE_MOD_ARCH_SPECIFIC=y
+CONFIG_HAVE_NET_DSA=y
+CONFIG_HAVE_OPROFILE=y
+CONFIG_HAVE_OPTPROBES=y
+CONFIG_HAVE_PCI=y
+CONFIG_HAVE_PERF_EVENTS=y
+CONFIG_HAVE_PERF_REGS=y
+CONFIG_HAVE_PERF_USER_STACK_DUMP=y
+CONFIG_HAVE_PROC_CPU=y
+CONFIG_HAVE_REGS_AND_STACK_ACCESS_API=y
+CONFIG_HAVE_RSEQ=y
+CONFIG_HAVE_SMP=y
+CONFIG_HAVE_SYSCALL_TRACEPOINTS=y
+CONFIG_HAVE_UID16=y
+CONFIG_HAVE_VIRT_CPU_ACCOUNTING_GEN=y
+CONFIG_HIGHMEM=y
+# CONFIG_HIGHPTE is not set
+CONFIG_HOTPLUG_CPU=y
+CONFIG_HWMON=y
+CONFIG_HW_RANDOM=y
+CONFIG_HW_RANDOM_MTK=y
+CONFIG_HZ_FIXED=0
+CONFIG_I2C=y
+CONFIG_I2C_BOARDINFO=y
+CONFIG_I2C_CHARDEV=y
+CONFIG_I2C_MT65XX=y
+# CONFIG_I2C_NVIDIA_GPU is not set
+CONFIG_ICPLUS_PHY=y
+# CONFIG_IGC is not set
+CONFIG_IIO=y
+# CONFIG_IIO_BUFFER is not set
+# CONFIG_IIO_TRIGGER is not set
+CONFIG_INITRAMFS_COMPRESSION=""
+CONFIG_INITRAMFS_ROOT_GID=1000
+CONFIG_INITRAMFS_ROOT_UID=1000
+CONFIG_INITRAMFS_SOURCE="/openwrt/trunk/build_dir/target-arm_cortex-a7_musl-1.1.14_eabi/root-mediatek /openwrt/trunk/target/linux/generic/image/initramfs-base-files.txt"
+CONFIG_INIT_STACK_NONE=y
+# CONFIG_IOMMU_DEBUGFS is not set
+# CONFIG_IOMMU_IO_PGTABLE_ARMV7S is not set
+# CONFIG_IOMMU_IO_PGTABLE_LPAE is not set
+CONFIG_IOMMU_SUPPORT=y
+CONFIG_IO_URING=y
+CONFIG_IRQCHIP=y
+CONFIG_IRQ_DOMAIN=y
+CONFIG_IRQ_DOMAIN_HIERARCHY=y
+CONFIG_IRQ_FORCED_THREADING=y
+CONFIG_IRQ_WORK=y
+CONFIG_JBD2=y
+CONFIG_KALLSYMS=y
+CONFIG_LEDS_MT6323=y
+CONFIG_LIBFDT=y
+CONFIG_LOCK_DEBUGGING_SUPPORT=y
+CONFIG_LOCK_SPIN_ON_OWNER=y
+CONFIG_LZO_COMPRESS=y
+CONFIG_LZO_DECOMPRESS=y
+# CONFIG_MACH_MT2701 is not set
+# CONFIG_MACH_MT6589 is not set
+# CONFIG_MACH_MT6592 is not set
+CONFIG_MACH_MT7623=y
+# CONFIG_MACH_MT7629 is not set
+# CONFIG_MACH_MT8127 is not set
+# CONFIG_MACH_MT8135 is not set
+CONFIG_MAGIC_SYSRQ=y
+CONFIG_MDIO_BITBANG=y
+CONFIG_MDIO_BUS=y
+CONFIG_MDIO_DEVICE=y
+CONFIG_MDIO_GPIO=y
+CONFIG_MEDIATEK_MT6577_AUXADC=y
+CONFIG_MEDIATEK_WATCHDOG=y
+CONFIG_MEMFD_CREATE=y
+CONFIG_MFD_CORE=y
+CONFIG_MFD_MT6397=y
+# CONFIG_MFD_STPMIC1 is not set
+CONFIG_MFD_SYSCON=y
+CONFIG_MIGHT_HAVE_CACHE_L2X0=y
+CONFIG_MIGRATION=y
+# CONFIG_MISC_ALCOR_PCI is not set
+CONFIG_MMC=y
+CONFIG_MMC_BLOCK=y
+CONFIG_MMC_MTK=y
+CONFIG_MMC_SDHCI=y
+# CONFIG_MMC_SDHCI_PCI is not set
+CONFIG_MMC_SDHCI_PLTFM=y
+# CONFIG_MMC_TIFM_SD is not set
+CONFIG_MODULES_USE_ELF_REL=y
+# CONFIG_MT753X_GSW is not set
+CONFIG_MTD_BLOCK2MTD=y
+CONFIG_MTD_CMDLINE_PARTS=y
+CONFIG_MTD_SPI_NOR=y
+CONFIG_MTD_SPLIT_FIRMWARE=y
+CONFIG_MTD_SPLIT_UIMAGE_FW=y
+CONFIG_MTD_UBI=y
+CONFIG_MTD_UBI_BEB_LIMIT=20
+CONFIG_MTD_UBI_BLOCK=y
+# CONFIG_MTD_UBI_FASTMAP is not set
+# CONFIG_MTD_UBI_GLUEBI is not set
+CONFIG_MTD_UBI_WL_THRESHOLD=4096
+# CONFIG_MTK_CMDQ is not set
+# CONFIG_MTK_CQDMA is not set
+CONFIG_MTK_EFUSE=y
+# CONFIG_MTK_HSDMA is not set
+CONFIG_MTK_INFRACFG=y
+# CONFIG_MTK_IOMMU is not set
+# CONFIG_MTK_IOMMU_V1 is not set
+CONFIG_MTK_PMIC_WRAP=y
+CONFIG_MTK_SCPSYS=y
+CONFIG_MTK_THERMAL=y
+CONFIG_MTK_TIMER=y
+# CONFIG_MTK_UART_APDMA is not set
+CONFIG_MUTEX_SPIN_ON_OWNER=y
+CONFIG_NEED_DMA_MAP_STATE=y
+CONFIG_NEON=y
+CONFIG_NET_DEVLINK=y
+CONFIG_NET_DSA=y
+CONFIG_NET_DSA_MT7530=y
+CONFIG_NET_DSA_TAG_MTK=y
+# CONFIG_NET_DSA_TAG_QCA is not set
+CONFIG_NET_FLOW_LIMIT=y
+CONFIG_NET_MEDIATEK_SOC=y
+CONFIG_NET_SWITCHDEV=y
+# CONFIG_NET_VENDOR_AURORA is not set
+CONFIG_NET_VENDOR_MEDIATEK=y
+# CONFIG_NET_VENDOR_WIZNET is not set
+CONFIG_NLS=y
+CONFIG_NO_HZ=y
+CONFIG_NO_HZ_COMMON=y
+CONFIG_NO_HZ_IDLE=y
+CONFIG_NR_CPUS=4
+CONFIG_NVMEM=y
+# CONFIG_NVMEM_REBOOT_MODE is not set
+CONFIG_NVMEM_SYSFS=y
+CONFIG_OF=y
+CONFIG_OF_ADDRESS=y
+CONFIG_OF_EARLY_FLATTREE=y
+CONFIG_OF_FLATTREE=y
+CONFIG_OF_GPIO=y
+CONFIG_OF_IRQ=y
+CONFIG_OF_KOBJ=y
+CONFIG_OF_MDIO=y
+CONFIG_OF_NET=y
+CONFIG_OLD_SIGACTION=y
+CONFIG_OLD_SIGSUSPEND3=y
+CONFIG_PADATA=y
+CONFIG_PAGE_OFFSET=0xC0000000
+CONFIG_PCI=y
+CONFIG_PCIEAER=y
+CONFIG_PCIEPORTBUS=y
+CONFIG_PCIE_MEDIATEK=y
+CONFIG_PCIE_PME=y
+CONFIG_PCI_DOMAINS=y
+CONFIG_PCI_DOMAINS_GENERIC=y
+# CONFIG_PCI_MESON is not set
+CONFIG_PCI_MSI=y
+CONFIG_PCI_MSI_IRQ_DOMAIN=y
+# CONFIG_PCI_V3_SEMI is not set
+CONFIG_PERF_USE_VMALLOC=y
+CONFIG_PGTABLE_LEVELS=2
+CONFIG_PHYLIB=y
+CONFIG_PHYLINK=y
+CONFIG_PHY_MTK_TPHY=y
+# CONFIG_PHY_MTK_UFS is not set
+# CONFIG_PHY_MTK_XSPHY is not set
+CONFIG_PINCTRL=y
+CONFIG_PINCTRL_MT2701=y
+CONFIG_PINCTRL_MT6397=y
+CONFIG_PINCTRL_MT7623=y
+CONFIG_PINCTRL_MTK=y
+CONFIG_PINCTRL_MTK_MOORE=y
+CONFIG_PM=y
+CONFIG_PM_CLK=y
+# CONFIG_PM_DEBUG is not set
+CONFIG_PM_GENERIC_DOMAINS=y
+CONFIG_PM_GENERIC_DOMAINS_OF=y
+CONFIG_PM_GENERIC_DOMAINS_SLEEP=y
+CONFIG_PM_OPP=y
+CONFIG_PM_SLEEP=y
+CONFIG_PM_SLEEP_SMP=y
+CONFIG_POWER_RESET=y
+CONFIG_POWER_SUPPLY=y
+CONFIG_POWER_SUPPLY_HWMON=y
+CONFIG_PREEMPT=y
+CONFIG_PREEMPTION=y
+CONFIG_PREEMPT_COUNT=y
+# CONFIG_PREEMPT_NONE is not set
+CONFIG_PREEMPT_RCU=y
+CONFIG_PRINTK_TIME=y
+CONFIG_PWM=y
+CONFIG_PWM_MEDIATEK=y
+# CONFIG_PWM_MTK_DISP is not set
+CONFIG_PWM_SYSFS=y
+# CONFIG_QCOM_SPMI_ADC5 is not set
+CONFIG_RAS=y
+CONFIG_RATIONAL=y
+CONFIG_RCU_CPU_STALL_TIMEOUT=21
+# CONFIG_RCU_EXPERT is not set
+CONFIG_RCU_NEED_SEGCBLIST=y
+CONFIG_RCU_STALL_COMMON=y
+CONFIG_REFCOUNT_FULL=y
+CONFIG_REGMAP=y
+CONFIG_REGMAP_I2C=y
+CONFIG_REGMAP_MMIO=y
+CONFIG_REGMAP_SPI=y
+CONFIG_REGULATOR=y
+CONFIG_REGULATOR_FIXED_VOLTAGE=y
+CONFIG_REGULATOR_GPIO=y
+CONFIG_REGULATOR_MT6323=y
+# CONFIG_REGULATOR_MT6380 is not set
+# CONFIG_REGULATOR_MT6397 is not set
+# CONFIG_REGULATOR_QCOM_SPMI is not set
+CONFIG_RESET_CONTROLLER=y
+CONFIG_RFS_ACCEL=y
+CONFIG_RPS=y
+CONFIG_RTC_CLASS=y
+# CONFIG_RTC_DRV_MT6397 is not set
+# CONFIG_RTC_DRV_MT7622 is not set
+CONFIG_RTC_I2C_AND_SPI=y
+CONFIG_RWSEM_SPIN_ON_OWNER=y
+# CONFIG_SENSORS_OCC_P8_I2C is not set
+# CONFIG_SERIAL_8250_DMA is not set
+CONFIG_SERIAL_8250_FSL=y
+CONFIG_SERIAL_8250_MT6577=y
+CONFIG_SERIAL_8250_NR_UARTS=4
+CONFIG_SERIAL_8250_RUNTIME_UARTS=4
+CONFIG_SERIAL_MCTRL_GPIO=y
+CONFIG_SGL_ALLOC=y
+CONFIG_SMP=y
+# CONFIG_SMP_ON_UP is not set
+CONFIG_SPARSE_IRQ=y
+CONFIG_SPI=y
+CONFIG_SPI_BITBANG=y
+CONFIG_SPI_MASTER=y
+CONFIG_SPI_MEM=y
+CONFIG_SPI_MT65XX=y
+CONFIG_SPMI=y
+CONFIG_SRCU=y
+# CONFIG_STRIP_ASM_SYMS is not set
+CONFIG_SUSPEND=y
+CONFIG_SUSPEND_FREEZER=y
+CONFIG_SWCONFIG=y
+CONFIG_SWPHY=y
+CONFIG_SWP_EMULATE=y
+CONFIG_SYS_SUPPORTS_APM_EMULATION=y
+CONFIG_TASKS_RCU=y
+CONFIG_THERMAL=y
+CONFIG_THERMAL_DEFAULT_GOV_STEP_WISE=y
+CONFIG_THERMAL_EMERGENCY_POWEROFF_DELAY_MS=0
+CONFIG_THERMAL_GOV_STEP_WISE=y
+CONFIG_THERMAL_OF=y
+# CONFIG_THUMB2_KERNEL is not set
+CONFIG_TICK_CPU_ACCOUNTING=y
+CONFIG_TIMER_OF=y
+CONFIG_TIMER_PROBE=y
+# CONFIG_TI_CPSW_PHY_SEL is not set
+CONFIG_TREE_SRCU=y
+# CONFIG_TRUSTED_FOUNDATIONS is not set
+CONFIG_UBIFS_FS=y
+# CONFIG_UBIFS_FS_ADVANCED_COMPR is not set
+CONFIG_UBIFS_FS_LZO=y
+CONFIG_UBIFS_FS_ZLIB=y
+CONFIG_UBIFS_FS_ZSTD=y
+CONFIG_UEVENT_HELPER_PATH=""
+CONFIG_UNCOMPRESS_INCLUDE="debug/uncompress.h"
+CONFIG_UNINLINE_SPIN_UNLOCK=y
+CONFIG_UNWINDER_ARM=y
+# CONFIG_UNWINDER_FRAME_POINTER is not set
+CONFIG_USB=y
+CONFIG_USB_COMMON=y
+# CONFIG_USB_EHCI_HCD is not set
+CONFIG_USB_SUPPORT=y
+CONFIG_USB_XHCI_HCD=y
+CONFIG_USB_XHCI_MTK=y
+CONFIG_USB_XHCI_PLATFORM=y
+CONFIG_USE_OF=y
+CONFIG_VFP=y
+CONFIG_VFPv3=y
+CONFIG_VM_EVENT_COUNTERS=y
+CONFIG_WATCHDOG_CORE=y
+CONFIG_XPS=y
+CONFIG_XXHASH=y
+CONFIG_XZ_DEC_ARM=y
+CONFIG_XZ_DEC_BCJ=y
+CONFIG_ZBOOT_ROM_BSS=0
+CONFIG_ZBOOT_ROM_TEXT=0
+CONFIG_ZLIB_DEFLATE=y
+CONFIG_ZLIB_INFLATE=y
+CONFIG_ZSTD_COMPRESS=y
+CONFIG_ZSTD_DECOMPRESS=y
--- a/root/target/linux/mediatek/patches-5.4/0004-mediatek-fix-packet-corruption-on-bridged-interface.patch
+++ b/root/target/linux/mediatek/patches-5.4/0004-mediatek-fix-packet-corruption-on-bridged-interface.patch
@ -0,0 +1,51 @@
+From 0593f719ca873722c6ac66604f027a63663c9b64 Mon Sep 17 00:00:00 2001
+From: Alexey Loukianov <lx2@lexa2.ru>
+Date: Fri, 7 Jun 2019 12:33:45 +0300
+Subject: [PATCH 04/12] mediatek: fix packet corruption on bridged interface
+
+    This fixes problem that was reported here:
+    http://forum.banana-pi.org/t/openwrt-18-06-malformed-ip-packets-at-bridged-interface/
+
+    Fix is to set both gmacs to use trgmii mode.
+    This fix is not technically correct as second gmac
+    does not support trgmii mode but current driver
+    implementation seems to handle it somehow and
+    it is the only way to have both gmacs enabled
+    and avoid corruption of the packets on brigded
+    lanX interfaces.
+
+    Signed-off-by: Alexey Loukianov <lx2@lexa2.ru>
+---
+ .../0067-dts-bpi-r2-fix-second-gmac.patch     | 20 +++++++++++++++++++
+ 1 file changed, 20 insertions(+)
+ create mode 100644 target/linux/mediatek/patches-4.14/0067-dts-bpi-r2-fix-second-gmac.patch
+
+diff --git a/target/linux/mediatek/patches-4.14/0067-dts-bpi-r2-fix-second-gmac.patch b/target/linux/mediatek/patches-4.14/0067-dts-bpi-r2-fix-second-gmac.patch
+new file mode 100644
+index 0000000000..145c188972
+--- /dev/null
+++ b/target/linux/mediatek/patches-4.14/0067-dts-bpi-r2-fix-second-gmac.patch
+@@ -0,0 +1,20 @@
+--- a/arch/arm/boot/dts/mt7623n-bananapi-bpi-r2.dts
++++ b/arch/arm/boot/dts/mt7623n-bananapi-bpi-r2.dts
+@@ -141,7 +141,7 @@
+ 	gmac1: mac@1 {
+ 		compatible = "mediatek,eth-mac";
+ 		reg = <1>;
+-		phy-mode = "rgmii";
++		phy-mode = "trgmii";
+ 
+ 		fixed-link {
+ 			speed = <1000>;
+@@ -206,7 +206,7 @@
+ 					reg = <5>;
+ 					label = "cpu";
+ 					ethernet = <&gmac1>;
+-					phy-mode = "rgmii";
++					phy-mode = "trgmii";
+ 
+ 					fixed-link {
+ 						speed = <1000>;
+-- 
+2.23.0
+
--- a/root/target/linux/mediatek/patches-5.4/0006-dts-fix-bpi2-console.patch
+++ b/root/target/linux/mediatek/patches-5.4/0006-dts-fix-bpi2-console.patch
@ -0,0 +1,10 @@
+--- a/arch/arm/boot/dts/mt7623n-bananapi-bpi-r2.dts
+++ b/arch/arm/boot/dts/mt7623n-bananapi-bpi-r2.dts
+@@ -19,6 +19,7 @@
+ 
+ 	chosen {
+ 		stdout-path = "serial2:115200n8";
+		bootargs = "console=ttyS2,115200n8 root=/dev/mmcblk1p2 rootfstype=ext4 rootwait vmalloc=496M";
+ 	};
+ 
+ 	cpus {
--- a/root/target/linux/mediatek/patches-5.4/0100-dts-add-second-gmac.patch
+++ b/root/target/linux/mediatek/patches-5.4/0100-dts-add-second-gmac.patch
@ -0,0 +1,54 @@
+From 97fdec52fff8079d3af104e8723602a3cb9d2a11 Mon Sep 17 00:00:00 2001
+From: Frank Wunderlich <frank-w@public-files.de>
+Date: Thu, 20 Jun 2019 23:06:41 +0200
+Subject: [PATCH] net: dts: add second gmac for bananapi r2
+
+---
+ arch/arm/boot/dts/mt7623n-bananapi-bpi-r2.dts | 18 ++++++++++++++++--
+ 1 file changed, 16 insertions(+), 2 deletions(-)
+
+diff --git a/arch/arm/boot/dts/mt7623n-bananapi-bpi-r2.dts b/arch/arm/boot/dts/mt7623n-bananapi-bpi-r2.dts
+index 2b760f90f38c..fad09608b86c 100644
+--- a/arch/arm/boot/dts/mt7623n-bananapi-bpi-r2.dts
+++ b/arch/arm/boot/dts/mt7623n-bananapi-bpi-r2.dts
+@@ -143,13 +143,25 @@
+ 		};
+ 	};
+ 
+	gmac1: mac@1 {
+		compatible = "mediatek,eth-mac";
+		reg = <1>;
+		label = "wan";
+		phy-mode = "rgmii";
+		phy-handle = <&ephy0>;
+	};
+
+ 	mdio: mdio-bus {
+ 		#address-cells = <1>;
+ 		#size-cells = <0>;
+ 
+-		switch@0 {
+-			compatible = "mediatek,mt7530";
+		ephy0: ethernet-phy@0 {
+ 			reg = <0>;
+		};
+
+		switch@1f {
+			compatible = "mediatek,mt7530";
+			reg = <0x1f>;
+ 			reset-gpios = <&pio 33 0>;
+ 			core-supply = <&mt6323_vpa_reg>;
+ 			io-supply = <&mt6323_vemc3v3_reg>;
+@@ -158,10 +170,12 @@
+ 				#address-cells = <1>;
+ 				#size-cells = <0>;
+ 
+/* Disabled, is now handled by gmac1 (eth1/wan) via phy-handle!
+ 				port@0 {
+ 					reg = <0>;
+ 					label = "wan";
+ 				};
+*/
+ 
+ 				port@1 {
+ 					reg = <1>;
--- a/root/target/linux/mediatek/patches-5.4/0103-net-support-net-labels.patch
+++ b/root/target/linux/mediatek/patches-5.4/0103-net-support-net-labels.patch
@ -0,0 +1,39 @@
+From 934747eba782050ba87a29a3a59f805e36410685 Mon Sep 17 00:00:00 2001
+From: =?UTF-8?q?Ren=C3=A9=20van=20Dorst?= <opensource@vdorst.com>
+Date: Fri, 21 Jun 2019 10:04:05 +0200
+Subject: [PATCH] net: ethernet: mediatek: support net-labels
+MIME-Version: 1.0
+Content-Type: text/plain; charset=UTF-8
+Content-Transfer-Encoding: 8bit
+
+With this patch, device name can be set within dts file in the same way as dsa
+port can.
+Add: label = "wan"; to GMAC node.
+
+Signed-off-by: René van Dorst <opensource@vdorst.com>
+---
+ drivers/net/ethernet/mediatek/mtk_eth_soc.c | 4 ++++
+ 1 file changed, 4 insertions(+)
+
+diff --git a/drivers/net/ethernet/mediatek/mtk_eth_soc.c b/drivers/net/ethernet/mediatek/mtk_eth_soc.c
+index c61069340f4f..87ced6269411 100644
+--- a/drivers/net/ethernet/mediatek/mtk_eth_soc.c
+++ b/drivers/net/ethernet/mediatek/mtk_eth_soc.c
+@@ -2756,6 +2756,7 @@ static const struct net_device_ops mtk_netdev_ops = {
+ 
+ static int mtk_add_mac(struct mtk_eth *eth, struct device_node *np)
+ {
+	const char *name = of_get_property(np, "label", NULL);
+ 	const __be32 *_id = of_get_property(np, "reg", NULL);
+ 	struct phylink *phylink;
+ 	int phy_mode, id, err;
+@@ -2846,6 +2847,9 @@ static int mtk_add_mac(struct mtk_eth *eth, struct device_node *np)
+ 	eth->netdev[id]->irq = eth->irq[0];
+ 	eth->netdev[id]->dev.of_node = np;
+ 
+	if (name)
+		strlcpy(eth->netdev[id]->name, name, IFNAMSIZ);
+
+ 	return 0;
+ 
+ free_netdev:
--- a/root/target/linux/mediatek/patches-5.4/0104-dts-add-pause-to-port6.patch
+++ b/root/target/linux/mediatek/patches-5.4/0104-dts-add-pause-to-port6.patch
@ -0,0 +1,22 @@
+From 3a466fd3d5b921c085fd3c863cab3f1afdb90c9c Mon Sep 17 00:00:00 2001
+From: Frank Wunderlich <frank-w@public-files.de>
+Date: Sun, 12 Jan 2020 16:46:33 +0100
+Subject: [PATCH] arm: dts: add pause to port6 of switch
+
+to be same as gmac0
+---
+ arch/arm/boot/dts/mt7623n-bananapi-bpi-r2.dts | 1 +
+ 1 file changed, 1 insertion(+)
+
+diff --git a/arch/arm/boot/dts/mt7623n-bananapi-bpi-r2.dts b/arch/arm/boot/dts/mt7623n-bananapi-bpi-r2.dts
+index 52343bd76fe5..7b8383af87e0 100644
+--- a/arch/arm/boot/dts/mt7623n-bananapi-bpi-r2.dts
+++ b/arch/arm/boot/dts/mt7623n-bananapi-bpi-r2.dts
+@@ -253,6 +253,7 @@
+ 					fixed-link {
+ 						speed = <1000>;
+ 						full-duplex;
+						pause;
+ 					};
+ 				};
+ 			};
--- a/root/target/linux/mediatek/patches-5.4/0110-rtc-mt6397.patch
+++ b/root/target/linux/mediatek/patches-5.4/0110-rtc-mt6397.patch
@ -0,0 +1,249 @@
+--- a/drivers/rtc/rtc-mt6397.c	2020-03-05 23:43:52.000000000 +0800
+++ b/drivers/rtc/rtc-mt6397.c	2020-03-18 00:54:20.445907453 +0800
+@@ -4,48 +4,18 @@
+ * Author: Tianping.Fang <tianping.fang@mediatek.com>
+ */
+ 
+-#include <linux/delay.h>
+-#include <linux/init.h>
+#include <linux/err.h>
+#include <linux/interrupt.h>
+#include <linux/mfd/mt6397/core.h>
+ #include <linux/module.h>
+#include <linux/mutex.h>
+#include <linux/platform_device.h>
+ #include <linux/regmap.h>
+ #include <linux/rtc.h>
+-#include <linux/irqdomain.h>
+-#include <linux/platform_device.h>
+-#include <linux/of_address.h>
+-#include <linux/of_irq.h>
+-#include <linux/io.h>
+-#include <linux/mfd/mt6397/core.h>
+-
+-#define RTC_BBPU		0x0000
+-#define RTC_BBPU_CBUSY		BIT(6)
+-
+-#define RTC_WRTGR		0x003c
+#include <linux/mfd/mt6397/rtc.h>
+#include <linux/mod_devicetable.h>
+ 
+-#define RTC_IRQ_STA		0x0002
+-#define RTC_IRQ_STA_AL		BIT(0)
+-#define RTC_IRQ_STA_LP		BIT(3)
+-
+-#define RTC_IRQ_EN		0x0004
+-#define RTC_IRQ_EN_AL		BIT(0)
+-#define RTC_IRQ_EN_ONESHOT	BIT(2)
+-#define RTC_IRQ_EN_LP		BIT(3)
+-#define RTC_IRQ_EN_ONESHOT_AL	(RTC_IRQ_EN_ONESHOT | RTC_IRQ_EN_AL)
+-
+-#define RTC_AL_MASK		0x0008
+-#define RTC_AL_MASK_DOW		BIT(4)
+-
+-#define RTC_TC_SEC		0x000a
+-/* Min, Hour, Dom... register offset to RTC_TC_SEC */
+-#define RTC_OFFSET_SEC		0
+-#define RTC_OFFSET_MIN		1
+-#define RTC_OFFSET_HOUR		2
+-#define RTC_OFFSET_DOM		3
+-#define RTC_OFFSET_DOW		4
+-#define RTC_OFFSET_MTH		5
+-#define RTC_OFFSET_YEAR		6
+-#define RTC_OFFSET_COUNT	7
+-
+-#define RTC_AL_SEC		0x0018
+#include <linux/mfd/mt6397/rtc.h>
+ 
+ #define RTC_AL_SEC_MASK		0x003f
+ #define RTC_AL_MIN_MASK		0x003f
+@@ -55,26 +25,8 @@
+ #define RTC_AL_MTH_MASK		0x000f
+ #define RTC_AL_YEA_MASK		0x007f
+ 
+-#define RTC_PDN2		0x002e
+-#define RTC_PDN2_PWRON_ALARM	BIT(4)
+-
+-#define RTC_MIN_YEAR		1968
+-#define RTC_BASE_YEAR		1900
+-#define RTC_NUM_YEARS		128
+-#define RTC_MIN_YEAR_OFFSET	(RTC_MIN_YEAR - RTC_BASE_YEAR)
+-
+-struct mt6397_rtc {
+-	struct device		*dev;
+-	struct rtc_device	*rtc_dev;
+-	struct mutex		lock;
+-	struct regmap		*regmap;
+-	int			irq;
+-	u32			addr_base;
+-};
+-
+ static int mtk_rtc_write_trigger(struct mt6397_rtc *rtc)
+ {
+-	unsigned long timeout = jiffies + HZ;
+ 	int ret;
+ 	u32 data;
+ 
+@@ -82,19 +34,13 @@ static int mtk_rtc_write_trigger(struct
+ 	if (ret < 0)
+ 		return ret;
+ 
+-	while (1) {
+-		ret = regmap_read(rtc->regmap, rtc->addr_base + RTC_BBPU,
+-				  &data);
+-		if (ret < 0)
+-			break;
+-		if (!(data & RTC_BBPU_CBUSY))
+-			break;
+-		if (time_after(jiffies, timeout)) {
+-			ret = -ETIMEDOUT;
+-			break;
+-		}
+-		cpu_relax();
+-	}
+	ret = regmap_read_poll_timeout(rtc->regmap,
+					rtc->addr_base + RTC_BBPU, data,
+					!(data & RTC_BBPU_CBUSY),
+					MTK_RTC_POLL_DELAY_US,
+					MTK_RTC_POLL_TIMEOUT);
+	if (ret < 0)
+		dev_err(rtc->dev, "failed to write WRTGE: %d\n", ret);
+ 
+ 	return ret;
+ }
+@@ -338,19 +284,19 @@ static int mtk_rtc_probe(struct platform
+ 		return rtc->irq;
+ 
+ 	rtc->regmap = mt6397_chip->regmap;
+-	rtc->dev = &pdev->dev;
+ 	mutex_init(&rtc->lock);
+ 
+ 	platform_set_drvdata(pdev, rtc);
+ 
+-	rtc->rtc_dev = devm_rtc_allocate_device(rtc->dev);
+	rtc->rtc_dev = devm_rtc_allocate_device(&pdev->dev);
+ 	if (IS_ERR(rtc->rtc_dev))
+ 		return PTR_ERR(rtc->rtc_dev);
+ 
+-	ret = request_threaded_irq(rtc->irq, NULL,
+-				   mtk_rtc_irq_handler_thread,
+-				   IRQF_ONESHOT | IRQF_TRIGGER_HIGH,
+-				   "mt6397-rtc", rtc);
+	ret = devm_request_threaded_irq(&pdev->dev, rtc->irq, NULL,
+					mtk_rtc_irq_handler_thread,
+					IRQF_ONESHOT | IRQF_TRIGGER_HIGH,
+					"mt6397-rtc", rtc);
+
+ 	if (ret) {
+ 		dev_err(&pdev->dev, "Failed to request alarm IRQ: %d: %d\n",
+ 			rtc->irq, ret);
+@@ -372,15 +318,6 @@ out_free_irq:
+ 	return ret;
+ }
+ 
+-static int mtk_rtc_remove(struct platform_device *pdev)
+-{
+-	struct mt6397_rtc *rtc = platform_get_drvdata(pdev);
+-
+-	free_irq(rtc->irq, rtc);
+-
+-	return 0;
+-}
+-
+ #ifdef CONFIG_PM_SLEEP
+ static int mt6397_rtc_suspend(struct device *dev)
+ {
+@@ -407,6 +344,7 @@ static SIMPLE_DEV_PM_OPS(mt6397_pm_ops,
+ 			mt6397_rtc_resume);
+ 
+ static const struct of_device_id mt6397_rtc_of_match[] = {
+	{ .compatible = "mediatek,mt6323-rtc", },
+ 	{ .compatible = "mediatek,mt6397-rtc", },
+ 	{ }
+ };
+@@ -419,7 +357,6 @@ static struct platform_driver mtk_rtc_dr
+ 		.pm = &mt6397_pm_ops,
+ 	},
+ 	.probe	= mtk_rtc_probe,
+-	.remove = mtk_rtc_remove,
+ };
+ 
+ module_platform_driver(mtk_rtc_driver);
+diff --git a/include/linux/mfd/mt6397/rtc.h b/include/linux/mfd/mt6397/rtc.h
+new file mode 100644
+index 000000000000..f84b9163c0ee
+--- /dev/null
+++ b/include/linux/mfd/mt6397/rtc.h
+@@ -0,0 +1,71 @@
+/* SPDX-License-Identifier: GPL-2.0 */
+/*
+ * Copyright (C) 2014-2019 MediaTek Inc.
+ *
+ * Author: Tianping.Fang <tianping.fang@mediatek.com>
+ *        Sean Wang <sean.wang@mediatek.com>
+ */
+
+#ifndef _LINUX_MFD_MT6397_RTC_H_
+#define _LINUX_MFD_MT6397_RTC_H_
+
+#include <linux/jiffies.h>
+#include <linux/mutex.h>
+#include <linux/regmap.h>
+#include <linux/rtc.h>
+
+#define RTC_BBPU               0x0000
+#define RTC_BBPU_CBUSY         BIT(6)
+#define RTC_BBPU_KEY            (0x43 << 8)
+
+#define RTC_WRTGR              0x003c
+
+#define RTC_IRQ_STA            0x0002
+#define RTC_IRQ_STA_AL         BIT(0)
+#define RTC_IRQ_STA_LP         BIT(3)
+
+#define RTC_IRQ_EN             0x0004
+#define RTC_IRQ_EN_AL          BIT(0)
+#define RTC_IRQ_EN_ONESHOT     BIT(2)
+#define RTC_IRQ_EN_LP          BIT(3)
+#define RTC_IRQ_EN_ONESHOT_AL  (RTC_IRQ_EN_ONESHOT | RTC_IRQ_EN_AL)
+
+#define RTC_AL_MASK            0x0008
+#define RTC_AL_MASK_DOW                BIT(4)
+
+#define RTC_TC_SEC             0x000a
+/* Min, Hour, Dom... register offset to RTC_TC_SEC */
+#define RTC_OFFSET_SEC         0
+#define RTC_OFFSET_MIN         1
+#define RTC_OFFSET_HOUR                2
+#define RTC_OFFSET_DOM         3
+#define RTC_OFFSET_DOW         4
+#define RTC_OFFSET_MTH         5
+#define RTC_OFFSET_YEAR                6
+#define RTC_OFFSET_COUNT       7
+
+#define RTC_AL_SEC             0x0018
+
+#define RTC_PDN2               0x002e
+#define RTC_PDN2_PWRON_ALARM   BIT(4)
+
+#define RTC_MIN_YEAR           1968
+#define RTC_BASE_YEAR          1900
+#define RTC_NUM_YEARS          128
+#define RTC_MIN_YEAR_OFFSET    (RTC_MIN_YEAR - RTC_BASE_YEAR)
+
+#define MTK_RTC_POLL_DELAY_US  10
+#define MTK_RTC_POLL_TIMEOUT   (jiffies_to_usecs(HZ))
+
+struct mt6397_rtc {
+	struct device           *dev;
+	struct rtc_device       *rtc_dev;
+
+	/* Protect register access from multiple tasks */
+	struct mutex            lock;
+	struct regmap           *regmap;
+	int                     irq;
+	u32                     addr_base;
+};
+
+#endif /* _LINUX_MFD_MT6397_RTC_H_ */
+
--- a/root/target/linux/mediatek/patches-5.4/0111-mt6323-poweroff.patch
+++ b/root/target/linux/mediatek/patches-5.4/0111-mt6323-poweroff.patch
@ -0,0 +1,160 @@
+From 559614ab0ae2c85596218226f095be36c12cf0fa Mon Sep 17 00:00:00 2001
+From: Josef Friedl <josef.friedl@speed.at>
+Date: Wed, 3 Jul 2019 12:24:52 +0200
+Subject: [PATCH] power: reset: add driver for mt6323 poweroff
+
+add poweroff driver for mt6323 and make Makefile and Kconfig-Entries
+
+Suggested-by: Frank Wunderlich <frank-w@public-files.de>
+Signed-off-by: Josef Friedl <josef.friedl@speed.at>
+Signed-off-by: Frank Wunderlich <frank-w@public-files.de>
+Acked-by: Sebastian Reichel <sebastian.reichel@collabora.com>
+---
+changes since v6: none
+changes since v5: split out mfd/mt6397/core.h
+changes since v4: none
+changes since v3: none
+changes since v2: none (=v2 part 5)
+---
+ drivers/power/reset/Kconfig           | 10 +++
+ drivers/power/reset/Makefile          |  1 +
+ drivers/power/reset/mt6323-poweroff.c | 97 +++++++++++++++++++++++++++
+ 3 files changed, 108 insertions(+)
+ create mode 100644 drivers/power/reset/mt6323-poweroff.c
+
+diff --git a/drivers/power/reset/Kconfig b/drivers/power/reset/Kconfig
+index a564237278ff..c721939767eb 100644
+--- a/drivers/power/reset/Kconfig
+++ b/drivers/power/reset/Kconfig
+@@ -140,6 +140,16 @@ config POWER_RESET_LTC2952
+ 	  This driver supports an external powerdown trigger and board power
+ 	  down via the LTC2952. Bindings are made in the device tree.
+ 
+config POWER_RESET_MT6323
+       bool "MediaTek MT6323 power-off driver"
+       depends on MFD_MT6397
+       help
+         The power-off driver is responsible for externally shutdown down
+         the power of a remote MediaTek SoC MT6323 is connected to through
+         controlling a tiny circuit BBPU inside MT6323 RTC.
+
+         Say Y if you have a board where MT6323 could be found.
+
+ config POWER_RESET_QNAP
+ 	bool "QNAP power-off driver"
+ 	depends on OF_GPIO && PLAT_ORION
+diff --git a/drivers/power/reset/Makefile b/drivers/power/reset/Makefile
+index 85da3198e4e0..da37f8b851dc 100644
+--- a/drivers/power/reset/Makefile
+++ b/drivers/power/reset/Makefile
+@@ -11,6 +11,7 @@ obj-$(CONFIG_POWER_RESET_GPIO) += gpio-poweroff.o
+ obj-$(CONFIG_POWER_RESET_GPIO_RESTART) += gpio-restart.o
+ obj-$(CONFIG_POWER_RESET_HISI) += hisi-reboot.o
+ obj-$(CONFIG_POWER_RESET_MSM) += msm-poweroff.o
+obj-$(CONFIG_POWER_RESET_MT6323) += mt6323-poweroff.o
+ obj-$(CONFIG_POWER_RESET_QCOM_PON) += qcom-pon.o
+ obj-$(CONFIG_POWER_RESET_OCELOT_RESET) += ocelot-reset.o
+ obj-$(CONFIG_POWER_RESET_PIIX4_POWEROFF) += piix4-poweroff.o
+diff --git a/drivers/power/reset/mt6323-poweroff.c b/drivers/power/reset/mt6323-poweroff.c
+new file mode 100644
+index 000000000000..1caf43d9e46d
+--- /dev/null
+++ b/drivers/power/reset/mt6323-poweroff.c
+@@ -0,0 +1,97 @@
+// SPDX-License-Identifier: GPL-2.0
+/*
+ * Power off through MediaTek PMIC
+ *
+ * Copyright (C) 2018 MediaTek Inc.
+ *
+ * Author: Sean Wang <sean.wang@mediatek.com>
+ *
+ */
+
+#include <linux/err.h>
+#include <linux/module.h>
+#include <linux/of.h>
+#include <linux/platform_device.h>
+#include <linux/mfd/mt6397/core.h>
+#include <linux/mfd/mt6397/rtc.h>
+
+struct mt6323_pwrc {
+	struct device *dev;
+	struct regmap *regmap;
+	u32 base;
+};
+
+static struct mt6323_pwrc *mt_pwrc;
+
+static void mt6323_do_pwroff(void)
+{
+	struct mt6323_pwrc *pwrc = mt_pwrc;
+	unsigned int val;
+	int ret;
+
+	regmap_write(pwrc->regmap, pwrc->base + RTC_BBPU, RTC_BBPU_KEY);
+	regmap_write(pwrc->regmap, pwrc->base + RTC_WRTGR, 1);
+
+	ret = regmap_read_poll_timeout(pwrc->regmap,
+					pwrc->base + RTC_BBPU, val,
+					!(val & RTC_BBPU_CBUSY),
+					MTK_RTC_POLL_DELAY_US,
+					MTK_RTC_POLL_TIMEOUT);
+	if (ret)
+		dev_err(pwrc->dev, "failed to write BBPU: %d\n", ret);
+
+	/* Wait some time until system down, otherwise, notice with a warn */
+	mdelay(1000);
+
+	WARN_ONCE(1, "Unable to power off system\n");
+}
+
+static int mt6323_pwrc_probe(struct platform_device *pdev)
+{
+	struct mt6397_chip *mt6397_chip = dev_get_drvdata(pdev->dev.parent);
+	struct mt6323_pwrc *pwrc;
+	struct resource *res;
+
+	pwrc = devm_kzalloc(&pdev->dev, sizeof(*pwrc), GFP_KERNEL);
+	if (!pwrc)
+		return -ENOMEM;
+
+	res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
+	pwrc->base = res->start;
+	pwrc->regmap = mt6397_chip->regmap;
+	pwrc->dev = &pdev->dev;
+	mt_pwrc = pwrc;
+
+	pm_power_off = &mt6323_do_pwroff;
+
+	return 0;
+}
+
+static int mt6323_pwrc_remove(struct platform_device *pdev)
+{
+	if (pm_power_off == &mt6323_do_pwroff)
+		pm_power_off = NULL;
+
+	return 0;
+}
+
+static const struct of_device_id mt6323_pwrc_dt_match[] = {
+	{ .compatible = "mediatek,mt6323-pwrc" },
+	{},
+};
+MODULE_DEVICE_TABLE(of, mt6323_pwrc_dt_match);
+
+static struct platform_driver mt6323_pwrc_driver = {
+	.probe          = mt6323_pwrc_probe,
+	.remove         = mt6323_pwrc_remove,
+	.driver         = {
+		.name   = "mt6323-pwrc",
+		.of_match_table = mt6323_pwrc_dt_match,
+	},
+};
+
+module_platform_driver(mt6323_pwrc_driver);
+
+MODULE_DESCRIPTION("Poweroff driver for MT6323 PMIC");
+MODULE_AUTHOR("Sean Wang <sean.wang@mediatek.com>");
+MODULE_LICENSE("GPL v2");
--- a/root/target/linux/mediatek/patches-5.4/0112-dts-mt6323-add-key-rtc-power.patch
+++ b/root/target/linux/mediatek/patches-5.4/0112-dts-mt6323-add-key-rtc-power.patch
@ -0,0 +1,57 @@
+From c3db4c1163cc20ab0a456086a15c00acb022a67d Mon Sep 17 00:00:00 2001
+From: Josef Friedl <josef.friedl@speed.at>
+Date: Thu, 20 Dec 2018 18:27:17 +0100
+Subject: [PATCH] arm: dts: mt6323: add keys, power-controller, rtc and codec
+
+support poweroff and power-related keys on bpi-r2
+
+Suggested-by: Frank Wunderlich <frank-w@public-files.de>
+Signed-off-by: Josef Friedl <josef.friedl@speed.at>
+Signed-off-by: Frank Wunderlich <frank-w@public-files.de>
+---
+changes since v6: none
+changes since v5: none
+changes since v4: none
+changes since v3: none
+changes since v2: none (=v2 part 7)
+---
+ arch/arm/boot/dts/mt6323.dtsi | 27 +++++++++++++++++++++++++++
+ 1 file changed, 27 insertions(+)
+
+diff --git a/arch/arm/boot/dts/mt6323.dtsi b/arch/arm/boot/dts/mt6323.dtsi
+index ba397407c1dd..7fda40ab5fe8 100644
+--- a/arch/arm/boot/dts/mt6323.dtsi
+++ b/arch/arm/boot/dts/mt6323.dtsi
+@@ -238,5 +238,32 @@
+ 				regulator-enable-ramp-delay = <216>;
+ 			};
+ 		};
+
+		mt6323keys: mt6323keys {
+			compatible = "mediatek,mt6323-keys";
+			mediatek,long-press-mode = <1>;
+			power-off-time-sec = <0>;
+
+			power {
+				linux,keycodes = <116>;
+				wakeup-source;
+			};
+
+			home {
+				linux,keycodes = <114>;
+			};
+		};
+
+		codec: mt6397codec {
+			compatible = "mediatek,mt6397-codec";
+		};
+
+		power-controller {
+			compatible = "mediatek,mt6323-pwrc";
+		};
+
+		rtc {
+			compatible = "mediatek,mt6323-rtc";
+		};
+ 	};
+ };
--- a/root/target/linux/mediatek/patches-5.4/0170-dts-mt7623-add-display.patch
+++ b/root/target/linux/mediatek/patches-5.4/0170-dts-mt7623-add-display.patch
@ -0,0 +1,500 @@
+From ae7a8d61a108bb58af8c3ecb16d8e95aad0b1975 Mon Sep 17 00:00:00 2001
+From: Ryder Lee <ryder.lee@mediatek.com>
+Date: Wed, 5 Sep 2018 22:09:27 +0800
+Subject: [PATCH] arm: dts: mt7623: add display subsystem related device nodes
+
+Add display subsystem related device nodes for MT7623.
+
+Cc: CK Hu <ck.hu@mediatek.com>
+Signed-off-by: chunhui dai <chunhui.dai@mediatek.com>
+Signed-off-by: Bibby Hsieh <bibby.hsieh@mediatek.com>
+Signed-off-by: Ryder Lee <ryder.lee@mediatek.com>
+
+additional fixes:
+
+[hdmi,dts] fixed dts-warnings
+author: Bibby Hsieh <bibby.hsieh@mediatek.com>
+
+[dtsi] fix dpi0-node
+author: Ryder Lee <ryder.lee@mediatek.com>
+
+Signed-off-by: Frank Wunderlich <frank-w@public-files.de>
+Tested-by: Frank Wunderlich <frank-w@public-files.de>
+---
+ arch/arm/boot/dts/mt7623.dtsi                 | 177 ++++++++++++++++++
+ arch/arm/boot/dts/mt7623n-bananapi-bpi-r2.dts |  85 +++++++++
+ arch/arm/boot/dts/mt7623n-rfb-emmc.dts        |  85 +++++++++
+ 3 files changed, 347 insertions(+)
+
+diff --git a/arch/arm/boot/dts/mt7623.dtsi b/arch/arm/boot/dts/mt7623.dtsi
+index 59e69f3dffa2..f1880ff04193 100644
+--- a/arch/arm/boot/dts/mt7623.dtsi
+++ b/arch/arm/boot/dts/mt7623.dtsi
+@@ -23,6 +23,11 @@
+ 	#address-cells = <2>;
+ 	#size-cells = <2>;
+ 
+	aliases {
+		rdma0 = &rdma0;
+		rdma1 = &rdma1;
+	};
+
+ 	cpu_opp_table: opp-table {
+ 		compatible = "operating-points-v2";
+ 		opp-shared;
+@@ -320,6 +325,25 @@
+ 		clock-names = "spi", "wrap";
+ 	};
+ 
+	mipi_tx0: mipi-dphy@10010000 {
+		compatible = "mediatek,mt7623-mipi-tx",
+			     "mediatek,mt2701-mipi-tx";
+		reg = <0 0x10010000 0 0x90>;
+		clocks = <&clk26m>;
+		clock-output-names = "mipi_tx0_pll";
+		#clock-cells = <0>;
+		#phy-cells = <0>;
+	};
+
+	cec: cec@10012000 {
+		compatible = "mediatek,mt7623-cec",
+			     "mediatek,mt8173-cec";
+		reg = <0 0x10012000 0 0xbc>;
+		interrupts = <GIC_SPI 182 IRQ_TYPE_LEVEL_LOW>;
+		clocks = <&infracfg CLK_INFRA_CEC>;
+		status = "disabled";
+	};
+
+ 	cir: cir@10013000 {
+ 		compatible = "mediatek,mt7623-cir";
+ 		reg = <0 0x10013000 0 0x1000>;
+@@ -368,6 +392,18 @@
+ 		#clock-cells = <1>;
+ 	};
+ 
+	hdmi_phy: phy@10209100 {
+		compatible = "mediatek,mt7623-hdmi-phy",
+			     "mediatek,mt2701-hdmi-phy";
+		reg = <0 0x10209100 0 0x24>;
+		clocks = <&apmixedsys CLK_APMIXED_HDMI_REF>;
+		clock-names = "pll_ref";
+		clock-output-names = "hdmitx_dig_cts";
+		#clock-cells = <0>;
+		#phy-cells = <0>;
+		status = "disabled";
+	};
+
+ 	rng: rng@1020f000 {
+ 		compatible = "mediatek,mt7623-rng";
+ 		reg = <0 0x1020f000 0 0x1000>;
+@@ -567,6 +603,16 @@
+ 		status = "disabled";
+ 	};
+ 
+	hdmiddc0: i2c@11013000 {
+		compatible = "mediatek,mt7623-hdmi-ddc",
+			     "mediatek,mt8173-hdmi-ddc";
+		interrupts = <GIC_SPI 81 IRQ_TYPE_LEVEL_LOW>;
+		reg = <0 0x11013000 0 0x1C>;
+		clocks = <&pericfg CLK_PERI_I2C3>;
+		clock-names = "ddc-i2c";
+		status = "disabled";
+	};
+
+ 	nor_flash: spi@11014000 {
+ 		compatible = "mediatek,mt7623-nor",
+ 			     "mediatek,mt8173-nor";
+@@ -741,6 +787,84 @@
+ 		#clock-cells = <1>;
+ 	};
+ 
+	display_components: dispsys@14000000 {
+		compatible = "mediatek,mt7623-mmsys",
+			     "mediatek,mt2701-mmsys";
+		reg = <0 0x14000000 0 0x1000>;
+		power-domains = <&scpsys MT2701_POWER_DOMAIN_DISP>;
+	};
+
+	ovl@14007000 {
+		compatible = "mediatek,mt7623-disp-ovl",
+			     "mediatek,mt2701-disp-ovl";
+		reg = <0 0x14007000 0 0x1000>;
+		interrupts = <GIC_SPI 153 IRQ_TYPE_LEVEL_LOW>;
+		clocks = <&mmsys CLK_MM_DISP_OVL>;
+		iommus = <&iommu MT2701_M4U_PORT_DISP_OVL_0>;
+		mediatek,larb = <&larb0>;
+	};
+
+	rdma0: rdma@14008000 {
+		compatible = "mediatek,mt7623-disp-rdma",
+			     "mediatek,mt2701-disp-rdma";
+		reg = <0 0x14008000 0 0x1000>;
+		interrupts = <GIC_SPI 152 IRQ_TYPE_LEVEL_LOW>;
+		clocks = <&mmsys CLK_MM_DISP_RDMA>;
+		iommus = <&iommu MT2701_M4U_PORT_DISP_RDMA>;
+		mediatek,larb = <&larb0>;
+	};
+
+	wdma@14009000 {
+		compatible = "mediatek,mt7623-disp-wdma",
+			     "mediatek,mt2701-disp-wdma";
+		reg = <0 0x14009000 0 0x1000>;
+		interrupts = <GIC_SPI 154 IRQ_TYPE_LEVEL_LOW>;
+		clocks = <&mmsys CLK_MM_DISP_WDMA>;
+		iommus = <&iommu MT2701_M4U_PORT_DISP_WDMA>;
+		mediatek,larb = <&larb0>;
+	};
+
+	bls: pwm@1400a000 {
+		compatible = "mediatek,mt7623-disp-pwm",
+			     "mediatek,mt2701-disp-pwm";
+		reg = <0 0x1400a000 0 0x1000>;
+		#pwm-cells = <2>;
+		clocks = <&mmsys CLK_MM_MDP_BLS_26M>,
+			 <&mmsys CLK_MM_DISP_BLS>;
+		clock-names = "main", "mm";
+		status = "disabled";
+	};
+
+	color@1400b000 {
+		compatible = "mediatek,mt7623-disp-color",
+			     "mediatek,mt2701-disp-color";
+		reg = <0 0x1400b000 0 0x1000>;
+		interrupts = <GIC_SPI 156 IRQ_TYPE_LEVEL_LOW>;
+		clocks = <&mmsys CLK_MM_DISP_COLOR>;
+	};
+
+	dsi: dsi@1400c000 {
+		compatible = "mediatek,mt7623-dsi",
+			     "mediatek,mt2701-dsi";
+		reg = <0 0x1400c000 0 0x1000>;
+		interrupts = <GIC_SPI 157 IRQ_TYPE_LEVEL_LOW>;
+		clocks = <&mmsys CLK_MM_DSI_ENGINE>,
+			 <&mmsys CLK_MM_DSI_DIG>,
+			 <&mipi_tx0>;
+		clock-names = "engine", "digital", "hs";
+		phys = <&mipi_tx0>;
+		phy-names = "dphy";
+		status = "disabled";
+	};
+
+	mutex: mutex@1400e000 {
+		compatible = "mediatek,mt7623-disp-mutex",
+			     "mediatek,mt2701-disp-mutex";
+		reg = <0 0x1400e000 0 0x1000>;
+		interrupts = <GIC_SPI 161 IRQ_TYPE_LEVEL_LOW>;
+		clocks = <&mmsys CLK_MM_MUTEX_32K>;
+	};
+
+ 	larb0: larb@14010000 {
+ 		compatible = "mediatek,mt7623-smi-larb",
+ 			     "mediatek,mt2701-smi-larb";
+@@ -753,6 +877,44 @@
+ 		power-domains = <&scpsys MT2701_POWER_DOMAIN_DISP>;
+ 	};
+ 
+	rdma1: rdma@14012000 {
+		compatible = "mediatek,mt7623-disp-rdma",
+			     "mediatek,mt2701-disp-rdma";
+		reg = <0 0x14012000 0 0x1000>;
+		interrupts = <GIC_SPI 164 IRQ_TYPE_LEVEL_LOW>;
+		clocks = <&mmsys CLK_MM_DISP_RDMA1>;
+		iommus = <&iommu MT2701_M4U_PORT_DISP_RDMA1>;
+		mediatek,larb = <&larb0>;
+	};
+
+	dpi0: dpi@14014000 {
+		compatible = "mediatek,mt7623-dpi",
+			     "mediatek,mt2701-dpi";
+		reg = <0 0x14014000 0 0x1000>;
+		interrupts = <GIC_SPI 194 IRQ_TYPE_LEVEL_LOW>;
+		clocks = <&mmsys CLK_MM_DPI1_DIGL>,
+			 <&mmsys CLK_MM_DPI1_ENGINE>,
+			 <&apmixedsys CLK_APMIXED_TVDPLL>;
+		clock-names = "pixel", "engine", "pll";
+		status = "disabled";
+	};
+
+	hdmi0: hdmi@14015000 {
+		compatible = "mediatek,mt7623-hdmi",
+			     "mediatek,mt8173-hdmi";
+		reg = <0 0x14015000 0 0x400>;
+		clocks = <&mmsys CLK_MM_HDMI_PIXEL>,
+			 <&mmsys CLK_MM_HDMI_PLL>,
+			 <&mmsys CLK_MM_HDMI_AUDIO>,
+			 <&mmsys CLK_MM_HDMI_SPDIF>;
+		clock-names = "pixel", "pll", "bclk", "spdif";
+		phys = <&hdmi_phy>;
+		phy-names = "hdmi";
+		mediatek,syscon-hdmi = <&mmsys 0x900>;
+		cec = <&cec>;
+		status = "disabled";
+	};
+
+ 	imgsys: syscon@15000000 {
+ 		compatible = "mediatek,mt7623-imgsys",
+ 			     "mediatek,mt2701-imgsys",
+@@ -1077,6 +1239,21 @@
+ 		};
+ 	};
+ 
+	hdmi_pins_a: hdmi-default {
+		pins-hdmi {
+			pinmux = <MT7623_PIN_123_HTPLG_FUNC_HTPLG>;
+			input-enable;
+			bias-pull-down;
+		};
+	};
+
+	hdmi_ddc_pins_a: hdmi_ddc-default {
+		pins-hdmi-ddc {
+			pinmux = <MT7623_PIN_124_GPIO124_FUNC_HDMISCK>,
+				 <MT7623_PIN_125_GPIO125_FUNC_HDMISD>;
+		};
+	};
+
+ 	i2c0_pins_a: i2c0-default {
+ 		pins-i2c0 {
+ 			pinmux = <MT7623_PIN_75_SDA0_FUNC_SDA0>,
+diff --git a/arch/arm/boot/dts/mt7623n-bananapi-bpi-r2.dts b/arch/arm/boot/dts/mt7623n-bananapi-bpi-r2.dts
+index 2b760f90f38c..7a1763472018 100644
+--- a/arch/arm/boot/dts/mt7623n-bananapi-bpi-r2.dts
+++ b/arch/arm/boot/dts/mt7623n-bananapi-bpi-r2.dts
+@@ -21,6 +21,19 @@
+ 		stdout-path = "serial2:115200n8";
+ 	};
+ 
+	connector {
+		compatible = "hdmi-connector";
+		label = "hdmi";
+		type = "d";
+		ddc-i2c-bus = <&hdmiddc0>;
+
+		port {
+			hdmi_connector_in: endpoint {
+				remote-endpoint = <&hdmi0_out>;
+			};
+		};
+	};
+
+ 	cpus {
+ 		cpu@0 {
+ 			proc-supply = <&mt6323_vproc_reg>;
+@@ -114,10 +127,24 @@
+ 	};
+ };
+ 
+&bls {
+	status = "okay";
+
+	port {
+		bls_out: endpoint {
+			remote-endpoint = <&dpi0_in>;
+		};
+	};
+};
+
+ &btif {
+ 	status = "okay";
+ };
+ 
+&cec {
+	status = "okay";
+};
+
+ &cir {
+ 	pinctrl-names = "default";
+ 	pinctrl-0 = <&cir_pins_a>;
+@@ -128,6 +155,28 @@
+ 	status = "okay";
+ };
+ 
+&dpi0 {
+	status = "okay";
+
+	ports {
+		#address-cells = <1>;
+		#size-cells = <0>;
+		port@0 {
+			reg = <0>;
+			dpi0_out: endpoint {
+				remote-endpoint = <&hdmi0_in>;
+			};
+		};
+
+		port@1 {
+			reg = <1>;
+			dpi0_in: endpoint {
+				remote-endpoint = <&bls_out>;
+			};
+		};
+	};
+};
+
+ &eth {
+ 	status = "okay";
+ 
+@@ -199,6 +248,42 @@
+ 	};
+ };
+ 
+&hdmi0 {
+	pinctrl-names = "default";
+	pinctrl-0 = <&hdmi_pins_a>;
+	status = "okay";
+
+	ports {
+		#address-cells = <1>;
+		#size-cells = <0>;
+		port@0 {
+			reg = <0>;
+			hdmi0_in: endpoint {
+				remote-endpoint = <&dpi0_out>;
+			};
+		};
+
+		port@1 {
+			reg = <1>;
+			hdmi0_out: endpoint {
+				remote-endpoint = <&hdmi_connector_in>;
+			};
+		};
+	};
+};
+
+&hdmiddc0 {
+	pinctrl-names = "default";
+	pinctrl-0 = <&hdmi_ddc_pins_a>;
+	status = "okay";
+};
+
+&hdmi_phy {
+	mediatek,ibias = <0xa>;
+	mediatek,ibias_up = <0x1c>;
+	status = "okay";
+};
+
+ &i2c0 {
+ 	pinctrl-names = "default";
+ 	pinctrl-0 = <&i2c0_pins_a>;
+diff --git a/arch/arm/boot/dts/mt7623n-rfb-emmc.dts b/arch/arm/boot/dts/mt7623n-rfb-emmc.dts
+index b7606130ade9..3e5911d8d6bc 100644
+--- a/arch/arm/boot/dts/mt7623n-rfb-emmc.dts
+++ b/arch/arm/boot/dts/mt7623n-rfb-emmc.dts
+@@ -24,6 +24,19 @@
+ 		stdout-path = "serial2:115200n8";
+ 	};
+ 
+	connector {
+		compatible = "hdmi-connector";
+		label = "hdmi";
+		type = "d";
+		ddc-i2c-bus = <&hdmiddc0>;
+
+		port {
+			hdmi_connector_in: endpoint {
+				remote-endpoint = <&hdmi0_out>;
+			};
+		};
+	};
+
+ 	cpus {
+ 		cpu@0 {
+ 			proc-supply = <&mt6323_vproc_reg>;
+@@ -106,10 +119,24 @@
+ 	};
+ };
+ 
+&bls {
+	status = "okay";
+
+	port {
+		bls_out: endpoint {
+			remote-endpoint = <&dpi0_in>;
+		};
+	};
+};
+
+ &btif {
+ 	status = "okay";
+ };
+ 
+&cec {
+	status = "okay";
+};
+
+ &cir {
+ 	pinctrl-names = "default";
+ 	pinctrl-0 = <&cir_pins_a>;
+@@ -120,6 +147,28 @@
+ 	status = "okay";
+ };
+ 
+&dpi0 {
+	status = "okay";
+
+	ports {
+		#address-cells = <1>;
+		#size-cells = <0>;
+		port@0 {
+			reg = <0>;
+			dpi0_out: endpoint {
+				remote-endpoint = <&hdmi0_in>;
+			};
+		};
+
+		port@1 {
+			reg = <1>;
+			dpi0_in: endpoint {
+				remote-endpoint = <&bls_out>;
+			};
+		};
+	};
+};
+
+ &eth {
+ 	status = "okay";
+ 
+@@ -202,6 +251,42 @@
+ 	};
+ };
+ 
+&hdmi0 {
+	pinctrl-names = "default";
+	pinctrl-0 = <&hdmi_pins_a>;
+	status = "okay";
+
+	ports {
+		#address-cells = <1>;
+		#size-cells = <0>;
+		port@0 {
+			reg = <0>;
+			hdmi0_in: endpoint {
+				remote-endpoint = <&dpi0_out>;
+			};
+		};
+
+		port@1 {
+			reg = <1>;
+			hdmi0_out: endpoint {
+				remote-endpoint = <&hdmi_connector_in>;
+			};
+		};
+	};
+};
+
+&hdmiddc0 {
+	pinctrl-names = "default";
+	pinctrl-0 = <&hdmi_ddc_pins_a>;
+	status = "okay";
+};
+
+&hdmi_phy {
+	mediatek,ibias = <0xa>;
+	mediatek,ibias_up = <0x1c>;
+	status = "okay";
+};
+
+ &i2c0 {
+ 	pinctrl-names = "default";
+ 	pinctrl-0 = <&i2c0_pins_a>;
--- a/root/target/linux/mediatek/patches-5.4/0171-dts-mt7623-add-mali450.patch
+++ b/root/target/linux/mediatek/patches-5.4/0171-dts-mt7623-add-mali450.patch
@ -0,0 +1,77 @@
+From 6468d187f12604f38f0a3acde430fdc5c5390771 Mon Sep 17 00:00:00 2001
+From: Ryder Lee <ryder.lee@mediatek.com>
+Date: Tue, 23 Jul 2019 11:32:50 +0800
+Subject: [PATCH] arm: dts: mt7623: add Mali-450 device nodes
+
+Add nodes for Mali-450 and iommu larb3.
+
+Signed-off-by: Sean Wang <sean.wang@mediatek.com>
+Signed-off-by: Ryder Lee <ryder.lee@mediatek.com>
+---
+ arch/arm/boot/dts/mt7623.dtsi | 39 ++++++++++++++++++++++++++++++++++-
+ 1 file changed, 38 insertions(+), 1 deletion(-)
+
+diff --git a/arch/arm/boot/dts/mt7623.dtsi b/arch/arm/boot/dts/mt7623.dtsi
+index 8d0807fd9460..f7905561b30e 100644
+--- a/arch/arm/boot/dts/mt7623.dtsi
+++ b/arch/arm/boot/dts/mt7623.dtsi
+@@ -3,6 +3,7 @@
+  * Copyright (c) 2017-2018 MediaTek Inc.
+  * Author: John Crispin <john@phrozen.org>
+  *	   Sean Wang <sean.wang@mediatek.com>
+ *	   Ryder Lee <ryder.lee@mediatek.com>
+  *
+  */
+ 
+@@ -371,7 +372,7 @@
+ 		interrupts = <GIC_SPI 106 IRQ_TYPE_LEVEL_LOW>;
+ 		clocks = <&infracfg CLK_INFRA_M4U>;
+ 		clock-names = "bclk";
+-		mediatek,larbs = <&larb0 &larb1 &larb2>;
+		mediatek,larbs = <&larb0 &larb1 &larb2 &larb3>;
+ 		#iommu-cells = <1>;
+ 	};
+ 
+@@ -794,6 +795,42 @@
+ 		#reset-cells = <1>;
+ 	};
+ 
+	larb3: larb@13010000 {
+		compatible = "mediatek,mt7623-smi-larb",
+			     "mediatek,mt2701-smi-larb";
+		reg = <0 0x13010000 0 0x1000>;
+		mediatek,smi = <&smi_common>;
+		mediatek,larb-id = <3>;
+		clocks = <&clk26m>, <&clk26m>;
+		clock-names = "apb", "smi";
+		power-domains = <&scpsys MT2701_POWER_DOMAIN_MFG>;
+	};
+
+	mali: gpu@13040000 {
+		compatible = "mediatek,mt7623-mali", "arm,mali-450";
+		reg = <0 0x13040000 0 0x30000>;
+		interrupts = <GIC_SPI 170 IRQ_TYPE_LEVEL_LOW>,
+			     <GIC_SPI 171 IRQ_TYPE_LEVEL_LOW>,
+			     <GIC_SPI 172 IRQ_TYPE_LEVEL_LOW>,
+			     <GIC_SPI 173 IRQ_TYPE_LEVEL_LOW>,
+			     <GIC_SPI 174 IRQ_TYPE_LEVEL_LOW>,
+			     <GIC_SPI 175 IRQ_TYPE_LEVEL_LOW>,
+			     <GIC_SPI 176 IRQ_TYPE_LEVEL_LOW>,
+			     <GIC_SPI 177 IRQ_TYPE_LEVEL_LOW>,
+			     <GIC_SPI 178 IRQ_TYPE_LEVEL_LOW>,
+			     <GIC_SPI 179 IRQ_TYPE_LEVEL_LOW>,
+			     <GIC_SPI 180 IRQ_TYPE_LEVEL_LOW>;
+		interrupt-names = "gp", "gpmmu", "pp0", "ppmmu0", "pp1",
+				  "ppmmu1", "pp2", "ppmmu2", "pp3", "ppmmu3",
+				  "pp";
+		clocks = <&topckgen CLK_TOP_MMPLL>,
+			 <&g3dsys CLK_G3DSYS_CORE>;
+		clock-names = "bus", "core";
+		power-domains = <&scpsys MT2701_POWER_DOMAIN_MFG>;
+		mediatek,larb = <&larb3>;
+		resets = <&g3dsys MT2701_G3DSYS_CORE_RST>;
+	};
+
+ 	mmsys: syscon@14000000 {
+ 		compatible = "mediatek,mt7623-mmsys",
+ 			     "mediatek,mt2701-mmsys",
--- a/root/target/linux/mediatek/patches-5.4/0180-lima-power-on-off.patch
+++ b/root/target/linux/mediatek/patches-5.4/0180-lima-power-on-off.patch
@ -0,0 +1,68 @@
+From d87e1a23e51158f9c2923f6213a42d5e942a4091 Mon Sep 17 00:00:00 2001
+From: Frank Wunderlich <frank-w@public-files.de>
+Date: Thu, 23 Jan 2020 07:16:30 +0100
+Subject: [PATCH] lima: power on/off via register (function)
+
+---
+ drivers/gpu/drm/lima/lima_device.c | 31 ++++++++++++++++++++++++++++++
+ 1 file changed, 31 insertions(+)
+
+diff --git a/drivers/gpu/drm/lima/lima_device.c b/drivers/gpu/drm/lima/lima_device.c
+index d86b8d81a483..7d5d45e176f2 100644
+--- a/drivers/gpu/drm/lima/lima_device.c
+++ b/drivers/gpu/drm/lima/lima_device.c
+@@ -6,6 +6,7 @@
+ #include <linux/clk.h>
+ #include <linux/dma-mapping.h>
+ #include <linux/platform_device.h>
+#include <linux/pm_runtime.h>
+ 
+ #include "lima_device.h"
+ #include "lima_gp.h"
+@@ -287,11 +288,33 @@ static void lima_fini_pp_pipe(struct lima_device *dev)
+ 	lima_sched_pipe_fini(pipe);
+ }
+ 
+void mtk_set_power(bool on)
+{
+	if (on) {
+		void __iomem *wakeup_register;
+		wakeup_register = ioremap(0x10003014 , 0x04);
+		writel(0x00000001,wakeup_register); // this may be wrong, may need bitbang 0th bit to 1
+		iounmap(wakeup_register);
+	}else {
+		void __iomem *powerdown_register;
+		powerdown_register = ioremap(0x1000300C , 0x04); // powerdown register
+		writel(0x00000001,powerdown_register); // this may be wrong, may need bitbang 0th bit to 1
+		iounmap(powerdown_register);
+	}
+}
+
+ int lima_device_init(struct lima_device *ldev)
+ {
+ 	int err, i;
+ 	struct resource *res;
+ 
+	#ifdef CONFIG_MTK_COMBO_CHIP_CONSYS_7623
+	mtk_set_power(true);
+	pm_runtime_enable(ldev->dev);
+	pm_runtime_set_active(ldev->dev);
+	pm_runtime_get_sync(ldev->dev);
+	#endif
+
+ 	dma_set_coherent_mask(ldev->dev, DMA_BIT_MASK(32));
+ 
+ 	err = lima_clk_init(ldev);
+@@ -385,4 +408,12 @@ void lima_device_fini(struct lima_device *ldev)
+ 	lima_regulator_fini(ldev);
+ 
+ 	lima_clk_fini(ldev);
+
+	#ifdef CONFIG_MTK_COMBO_CHIP_CONSYS_7623
+	pm_runtime_set_suspended(ldev->dev);
+	pm_runtime_put_noidle(ldev->dev);
+	pm_runtime_disable(ldev->dev);
+
+	mtk_set_power(false);
+	#endif
+ }
--- a/root/target/linux/mediatek/patches-5.4/0181-drm-Add-get_possible_crtc.patch
+++ b/root/target/linux/mediatek/patches-5.4/0181-drm-Add-get_possible_crtc.patch
@ -0,0 +1,84 @@
+From 452b508468a46ef0fe7357fab6b000c52fd047d3 Mon Sep 17 00:00:00 2001
+From: Stu Hsieh <stu.hsieh@mediatek.com>
+Date: Fri, 16 Nov 2018 16:33:00 +0100
+Subject: [PATCH] drm: Add get_possible_crtc API for dpi, dsi
+
+Test: build pass and run ok
+
+Signed-off-by: Stu Hsieh <stu.hsieh@mediatek.com>
+---
+ drivers/gpu/drm/mediatek/mtk_drm_ddp_comp.c | 40 +++++++++++++++++++++
+ drivers/gpu/drm/mediatek/mtk_drm_ddp_comp.h |  2 ++
+ 2 files changed, 42 insertions(+)
+
+diff --git a/drivers/gpu/drm/mediatek/mtk_drm_ddp_comp.c b/drivers/gpu/drm/mediatek/mtk_drm_ddp_comp.c
+index efa85973e46b..29796e78b26a 100644
+--- a/drivers/gpu/drm/mediatek/mtk_drm_ddp_comp.c
+++ b/drivers/gpu/drm/mediatek/mtk_drm_ddp_comp.c
+@@ -237,6 +237,22 @@ static const struct mtk_ddp_comp_match mtk_ddp_matches[DDP_COMPONENT_ID_MAX] = {
+ 	[DDP_COMPONENT_WDMA1]	= { MTK_DISP_WDMA,	1, NULL },
+ };
+ 
+static bool mtk_drm_find_comp_in_ddp(struct mtk_ddp_comp ddp_comp,
+					 const enum mtk_ddp_comp_id *path,
+					 unsigned int path_len)
+{
+	unsigned int i;
+
+	if (path == NULL)
+		return false;
+
+	for (i = 0U; i < path_len; i++)
+		if (ddp_comp.id == path[i])
+			return true;
+
+	return false;
+}
+
+ int mtk_ddp_comp_get_id(struct device_node *node,
+ 			enum mtk_ddp_comp_type comp_type)
+ {
+@@ -252,6 +268,30 @@ int mtk_ddp_comp_get_id(struct device_node *node,
+ 	return -EINVAL;
+ }
+ 
+unsigned int mtk_drm_find_possible_crtc_by_comp(struct drm_device *drm,
+						struct mtk_ddp_comp ddp_comp)
+{
+	struct mtk_drm_private *private = drm->dev_private;
+	unsigned int ret;
+
+	if (mtk_drm_find_comp_in_ddp(ddp_comp, private->data->main_path,
+		private->data->main_len) == true) {
+		ret = BIT(0);
+	} else if (mtk_drm_find_comp_in_ddp(ddp_comp,
+		private->data->ext_path,
+		private->data->ext_len) == true) {
+		ret = BIT(1);
+	} else if (mtk_drm_find_comp_in_ddp(ddp_comp,
+		private->data->third_path,
+		private->data->third_len) == true) {
+		ret = BIT(2);
+	} else {
+		DRM_INFO("Failed to find comp in ddp table\n");
+		ret = 0;
+	}
+	return ret;
+}
+
+ int mtk_ddp_comp_init(struct device *dev, struct device_node *node,
+ 		      struct mtk_ddp_comp *comp, enum mtk_ddp_comp_id comp_id,
+ 		      const struct mtk_ddp_comp_funcs *funcs)
+diff --git a/drivers/gpu/drm/mediatek/mtk_drm_ddp_comp.h b/drivers/gpu/drm/mediatek/mtk_drm_ddp_comp.h
+index 0ad287f427cc..97be111c3e52 100644
+--- a/drivers/gpu/drm/mediatek/mtk_drm_ddp_comp.h
+++ b/drivers/gpu/drm/mediatek/mtk_drm_ddp_comp.h
+@@ -160,6 +160,8 @@ static inline void mtk_ddp_gamma_set(struct mtk_ddp_comp *comp,
+ 
+ int mtk_ddp_comp_get_id(struct device_node *node,
+ 			enum mtk_ddp_comp_type comp_type);
+unsigned int mtk_drm_find_possible_crtc_by_comp(struct drm_device *drm,
+						struct mtk_ddp_comp ddp_comp);
+ int mtk_ddp_comp_init(struct device *dev, struct device_node *comp_node,
+ 		      struct mtk_ddp_comp *comp, enum mtk_ddp_comp_id comp_id,
+ 		      const struct mtk_ddp_comp_funcs *funcs);
--- a/root/target/linux/mediatek/patches-5.4/0182-drm-change-possible_crtc.patch
+++ b/root/target/linux/mediatek/patches-5.4/0182-drm-change-possible_crtc.patch
@ -0,0 +1,45 @@
+From f4ca44932ccf088f225062aafef04d2bd629b2c4 Mon Sep 17 00:00:00 2001
+From: Jitao Shi <jitao.shi@mediatek.com>
+Date: Fri, 3 May 2019 17:16:19 +0200
+Subject: [PATCH] drm/mediatek: dpi/dsi: change the getting possible_crtc way
+
+[Detail]
+dpi/dsi get the possible_crtc by
+mtk_drm_find_possible_crtc_by_comp(*drm_dev, ddp_comp)
+
+Test: build pass and boot to logo
+
+Signed-off-by: Jitao Shi <jitao.shi@mediatek.com>
+---
+ drivers/gpu/drm/mediatek/mtk_dpi.c | 3 ++-
+ drivers/gpu/drm/mediatek/mtk_dsi.c | 3 ++-
+ 2 files changed, 4 insertions(+), 2 deletions(-)
+
+diff --git a/drivers/gpu/drm/mediatek/mtk_dpi.c b/drivers/gpu/drm/mediatek/mtk_dpi.c
+index be6d95c5ff25..00d31b5aa09f 100644
+--- a/drivers/gpu/drm/mediatek/mtk_dpi.c
+++ b/drivers/gpu/drm/mediatek/mtk_dpi.c
+@@ -604,7 +604,8 @@ static int mtk_dpi_bind(struct device *dev, struct device *master, void *data)
+ 	drm_encoder_helper_add(&dpi->encoder, &mtk_dpi_encoder_helper_funcs);
+ 
+ 	/* Currently DPI0 is fixed to be driven by OVL1 */
+-	dpi->encoder.possible_crtcs = BIT(1);
+	dpi->encoder.possible_crtcs =
+		mtk_drm_find_possible_crtc_by_comp(drm_dev, dpi->ddp_comp);
+ 
+ 	ret = drm_bridge_attach(&dpi->encoder, dpi->bridge, NULL);
+ 	if (ret) {
+diff --git a/drivers/gpu/drm/mediatek/mtk_dsi.c b/drivers/gpu/drm/mediatek/mtk_dsi.c
+index 224afb666881..2c2d3643f3e8 100644
+--- a/drivers/gpu/drm/mediatek/mtk_dsi.c
+++ b/drivers/gpu/drm/mediatek/mtk_dsi.c
+@@ -817,7 +817,8 @@ static int mtk_dsi_create_conn_enc(struct drm_device *drm, struct mtk_dsi *dsi)
+ 	 * Currently display data paths are statically assigned to a crtc each.
+ 	 * crtc 0 is OVL0 -> COLOR0 -> AAL -> OD -> RDMA0 -> UFOE -> DSI0
+ 	 */
+-	dsi->encoder.possible_crtcs = 1;
+	dsi->encoder.possible_crtcs =
+		mtk_drm_find_possible_crtc_by_comp(drm, dsi->ddp_comp);
+ 
+ 	/* If there's a bridge, attach to it and let it create the connector */
+ 	if (dsi->bridge) {
--- a/root/target/linux/mediatek/patches-5.4/0183-drm-fix-DRM_INFO.patch
+++ b/root/target/linux/mediatek/patches-5.4/0183-drm-fix-DRM_INFO.patch
@ -0,0 +1,21 @@
+From 34dd2a86c9e3b3ad1a3a00add409edda2b2ed776 Mon Sep 17 00:00:00 2001
+From: Frank Wunderlich <frank-w@public-files.de>
+Date: Tue, 1 Oct 2019 11:21:03 +0200
+Subject: [PATCH] drm: fix implicit declaration of function 'DRM_INFO'
+
+---
+ drivers/gpu/drm/mediatek/mtk_drm_ddp_comp.c | 1 +
+ 1 file changed, 1 insertion(+)
+
+diff --git a/drivers/gpu/drm/mediatek/mtk_drm_ddp_comp.c b/drivers/gpu/drm/mediatek/mtk_drm_ddp_comp.c
+index 29796e78b26a..e65d83267563 100644
+--- a/drivers/gpu/drm/mediatek/mtk_drm_ddp_comp.c
+++ b/drivers/gpu/drm/mediatek/mtk_drm_ddp_comp.c
+@@ -12,6 +12,7 @@
+ #include <linux/of_irq.h>
+ #include <linux/of_platform.h>
+ #include <linux/platform_device.h>
+#include <drm/drm_print.h>
+ 
+ #include "mtk_drm_drv.h"
+ #include "mtk_drm_plane.h"
--- a/root/target/linux/mediatek/patches-5.4/0184-drm-config-component-output.patch
+++ b/root/target/linux/mediatek/patches-5.4/0184-drm-config-component-output.patch
@ -0,0 +1,146 @@
+From 6e3f7375acdcf714d1fcbae1238cd39cc9391560 Mon Sep 17 00:00:00 2001
+From: Bibby Hsieh <bibby.hsieh@mediatek.com>
+Date: Fri, 21 Sep 2018 11:28:22 +0800
+Subject: [PATCH] drm/mediatek: config component output by device node port
+
+We can select output component by decive node port.
+Main path default output component is DSI.
+External path default output component is DPI.
+
+Signed-off-by: Bibby Hsieh <bibby.hsieh@mediatek.com>
+
+added small fixes for warnings
+
+Signed-off-by: Frank Wunderlich <frank-w@public-files.de>
+Tested-by: Frank Wunderlich <frank-w@public-files.de>
+---
+ drivers/gpu/drm/mediatek/mtk_drm_drv.c | 46 ++++++++++++++++++++++----
+ drivers/gpu/drm/mediatek/mtk_drm_drv.h |  4 +--
+ 2 files changed, 42 insertions(+), 8 deletions(-)
+
+diff --git a/drivers/gpu/drm/mediatek/mtk_drm_drv.c b/drivers/gpu/drm/mediatek/mtk_drm_drv.c
+index 352b81a7a670..33511c77b800 100644
+--- a/drivers/gpu/drm/mediatek/mtk_drm_drv.c
+++ b/drivers/gpu/drm/mediatek/mtk_drm_drv.c
+@@ -21,6 +21,13 @@
+ #include <drm/drm_of.h>
+ #include <drm/drm_probe_helper.h>
+ #include <drm/drm_vblank.h>
+#include <linux/component.h>
+#include <linux/iommu.h>
+#include <linux/of.h>
+#include <linux/of_address.h>
+#include <linux/of_graph.h>
+#include <linux/of_platform.h>
+#include <linux/pm_runtime.h>
+ 
+ #include "mtk_drm_crtc.h"
+ #include "mtk_drm_ddp.h"
+@@ -121,7 +128,7 @@ static const struct drm_mode_config_funcs mtk_drm_mode_config_funcs = {
+ 	.atomic_commit = mtk_atomic_commit,
+ };
+ 
+-static const enum mtk_ddp_comp_id mt2701_mtk_ddp_main[] = {
+static enum mtk_ddp_comp_id mt2701_mtk_ddp_main[] = {
+ 	DDP_COMPONENT_OVL0,
+ 	DDP_COMPONENT_RDMA0,
+ 	DDP_COMPONENT_COLOR0,
+@@ -129,12 +136,12 @@ static const enum mtk_ddp_comp_id mt2701_mtk_ddp_main[] = {
+ 	DDP_COMPONENT_DSI0,
+ };
+ 
+-static const enum mtk_ddp_comp_id mt2701_mtk_ddp_ext[] = {
+static enum mtk_ddp_comp_id mt2701_mtk_ddp_ext[] = {
+ 	DDP_COMPONENT_RDMA1,
+ 	DDP_COMPONENT_DPI0,
+ };
+ 
+-static const enum mtk_ddp_comp_id mt2712_mtk_ddp_main[] = {
+static enum mtk_ddp_comp_id mt2712_mtk_ddp_main[] = {
+ 	DDP_COMPONENT_OVL0,
+ 	DDP_COMPONENT_COLOR0,
+ 	DDP_COMPONENT_AAL0,
+@@ -144,7 +151,7 @@ static const enum mtk_ddp_comp_id mt2712_mtk_ddp_main[] = {
+ 	DDP_COMPONENT_PWM0,
+ };
+ 
+-static const enum mtk_ddp_comp_id mt2712_mtk_ddp_ext[] = {
+static enum mtk_ddp_comp_id mt2712_mtk_ddp_ext[] = {
+ 	DDP_COMPONENT_OVL1,
+ 	DDP_COMPONENT_COLOR1,
+ 	DDP_COMPONENT_AAL1,
+@@ -160,7 +167,7 @@ static const enum mtk_ddp_comp_id mt2712_mtk_ddp_third[] = {
+ 	DDP_COMPONENT_PWM2,
+ };
+ 
+-static const enum mtk_ddp_comp_id mt8173_mtk_ddp_main[] = {
+static enum mtk_ddp_comp_id mt8173_mtk_ddp_main[] = {
+ 	DDP_COMPONENT_OVL0,
+ 	DDP_COMPONENT_COLOR0,
+ 	DDP_COMPONENT_AAL0,
+@@ -171,7 +178,7 @@ static const enum mtk_ddp_comp_id mt8173_mtk_ddp_main[] = {
+ 	DDP_COMPONENT_PWM0,
+ };
+ 
+-static const enum mtk_ddp_comp_id mt8173_mtk_ddp_ext[] = {
+static enum mtk_ddp_comp_id mt8173_mtk_ddp_ext[] = {
+ 	DDP_COMPONENT_OVL1,
+ 	DDP_COMPONENT_COLOR1,
+ 	DDP_COMPONENT_GAMMA,
+@@ -510,6 +517,7 @@ static int mtk_drm_probe(struct platform_device *pdev)
+ 
+ 	/* Iterate over sibling DISP function blocks */
+ 	for_each_child_of_node(dev->of_node->parent, node) {
+		struct device_node *port, *ep, *remote;
+ 		const struct of_device_id *of_id;
+ 		enum mtk_ddp_comp_type comp_type;
+ 		int comp_id;
+@@ -572,6 +580,32 @@ static int mtk_drm_probe(struct platform_device *pdev)
+ 
+ 			private->ddp_comp[comp_id] = comp;
+ 		}
+
+		if (comp_type != MTK_DSI && comp_type != MTK_DPI) {
+			port = of_graph_get_port_by_id(node, 0);
+			if (!port)
+				continue;
+			ep = of_get_child_by_name(port, "endpoint");
+			of_node_put(port);
+			if (!ep)
+				continue;
+			remote = of_graph_get_remote_port_parent(ep);
+			of_node_put(ep);
+			if (!remote)
+				continue;
+			of_id = of_match_node(mtk_ddp_comp_dt_ids, remote);
+			if (!of_id)
+				continue;
+			comp_type = (enum mtk_ddp_comp_type)of_id->data;
+			for (i = 0; i < private->data->main_len - 1; i++)
+				if (private->data->main_path[i] == comp_id)
+					private->data->main_path[i + 1] =
+					mtk_ddp_comp_get_id(node, comp_type);
+			for (i = 0; i < private->data->ext_len - 1; i++)
+				if (private->data->ext_path[i] == comp_id)
+					private->data->ext_path[i + 1] =
+					mtk_ddp_comp_get_id(node, comp_type);
+		}
+ 	}
+ 
+ 	if (!private->mutex_node) {
+diff --git a/drivers/gpu/drm/mediatek/mtk_drm_drv.h b/drivers/gpu/drm/mediatek/mtk_drm_drv.h
+index e03fea12ff59..5fb723415ff6 100644
+--- a/drivers/gpu/drm/mediatek/mtk_drm_drv.h
+++ b/drivers/gpu/drm/mediatek/mtk_drm_drv.h
+@@ -21,9 +21,9 @@ struct drm_property;
+ struct regmap;
+ 
+ struct mtk_mmsys_driver_data {
+-	const enum mtk_ddp_comp_id *main_path;
+	enum mtk_ddp_comp_id *main_path;
+ 	unsigned int main_len;
+-	const enum mtk_ddp_comp_id *ext_path;
+	enum mtk_ddp_comp_id *ext_path;
+ 	unsigned int ext_len;
+ 	const enum mtk_ddp_comp_id *third_path;
+ 	unsigned int third_len;
--- a/root/target/linux/mediatek/patches-5.4/0185-drm-fix-boot-up.patch
+++ b/root/target/linux/mediatek/patches-5.4/0185-drm-fix-boot-up.patch
@ -0,0 +1,55 @@
+From ba9c6527b05d294bdda7910db224e327f1460166 Mon Sep 17 00:00:00 2001
+From: chunhui dai <chunhui.dai@mediatek.com>
+Date: Wed, 31 Oct 2018 16:59:34 +0800
+Subject: [PATCH] drm/mediatek: fix boot up for 720 and 480 but 1080
+
+- 1080 plg in/out with ng/ok
+- support other resolutions like 1280x1024
+
+Signed-off-by: chunhui dai <chunhui.dai@mediatek.com>
+Signed-off-by: Frank Wunderlich <frank-w@public-files.de>
+Tested-by: Frank Wunderlich <frank-w@public-files.de>
+---
+ drivers/gpu/drm/mediatek/mtk_hdmi_phy.c        | 3 +++
+ drivers/gpu/drm/mediatek/mtk_hdmi_phy.h        | 1 +
+ drivers/gpu/drm/mediatek/mtk_mt2701_hdmi_phy.c | 1 +
+ 3 files changed, 5 insertions(+)
+
+diff --git a/drivers/gpu/drm/mediatek/mtk_hdmi_phy.c b/drivers/gpu/drm/mediatek/mtk_hdmi_phy.c
+index 5223498502c4..edadb7a700f1 100644
+--- a/drivers/gpu/drm/mediatek/mtk_hdmi_phy.c
+++ b/drivers/gpu/drm/mediatek/mtk_hdmi_phy.c
+@@ -184,6 +184,9 @@ static int mtk_hdmi_phy_probe(struct platform_device *pdev)
+ 		return PTR_ERR(phy_provider);
+ 	}
+ 
+	if (hdmi_phy->conf->pll_default_off)
+		hdmi_phy->conf->hdmi_phy_disable_tmds(hdmi_phy);
+
+ 	return of_clk_add_provider(dev->of_node, of_clk_src_simple_get,
+ 				   hdmi_phy->pll);
+ }
+diff --git a/drivers/gpu/drm/mediatek/mtk_hdmi_phy.h b/drivers/gpu/drm/mediatek/mtk_hdmi_phy.h
+index 2d8b3182470d..f472fdeb63dc 100644
+--- a/drivers/gpu/drm/mediatek/mtk_hdmi_phy.h
+++ b/drivers/gpu/drm/mediatek/mtk_hdmi_phy.h
+@@ -22,6 +22,7 @@ struct mtk_hdmi_phy;
+ struct mtk_hdmi_phy_conf {
+ 	bool tz_disabled;
+ 	unsigned long flags;
+	bool pll_default_off;
+ 	const struct clk_ops *hdmi_phy_clk_ops;
+ 	void (*hdmi_phy_enable_tmds)(struct mtk_hdmi_phy *hdmi_phy);
+ 	void (*hdmi_phy_disable_tmds)(struct mtk_hdmi_phy *hdmi_phy);
+diff --git a/drivers/gpu/drm/mediatek/mtk_mt2701_hdmi_phy.c b/drivers/gpu/drm/mediatek/mtk_mt2701_hdmi_phy.c
+index d3cc4022e988..6fbedacfc1e8 100644
+--- a/drivers/gpu/drm/mediatek/mtk_mt2701_hdmi_phy.c
+++ b/drivers/gpu/drm/mediatek/mtk_mt2701_hdmi_phy.c
+@@ -239,6 +239,7 @@ static void mtk_hdmi_phy_disable_tmds(struct mtk_hdmi_phy *hdmi_phy)
+ struct mtk_hdmi_phy_conf mtk_hdmi_phy_2701_conf = {
+ 	.tz_disabled = true,
+ 	.flags = CLK_SET_RATE_GATE,
+	.pll_default_off = true,
+ 	.hdmi_phy_clk_ops = &mtk_hdmi_phy_pll_ops,
+ 	.hdmi_phy_enable_tmds = mtk_hdmi_phy_enable_tmds,
+ 	.hdmi_phy_disable_tmds = mtk_hdmi_phy_disable_tmds,
--- a/root/target/linux/mediatek/patches-5.4/0190-thermal-add-sensor.patch
+++ b/root/target/linux/mediatek/patches-5.4/0190-thermal-add-sensor.patch
@ -0,0 +1,56 @@
+From aa97a44297179ab6ba1aa8f59e781541a320066b Mon Sep 17 00:00:00 2001
+From: Frank Wunderlich <frank-w@public-files.de>
+Date: Fri, 31 Jan 2020 17:28:04 +0100
+Subject: [PATCH] thermal: mediatek: add sensors-support
+
+---
+ drivers/thermal/mtk_thermal.c | 22 ++++++++++++++++++++++
+ 1 file changed, 22 insertions(+)
+
+diff --git a/drivers/thermal/mtk_thermal.c b/drivers/thermal/mtk_thermal.c
+index d1b066383c45..8cf3a69bfa46 100644
+--- a/drivers/thermal/mtk_thermal.c
+++ b/drivers/thermal/mtk_thermal.c
+@@ -23,6 +23,8 @@
+ #include <linux/reset.h>
+ #include <linux/types.h>
+ 
+#include "thermal_hwmon.h"
+
+ /* AUXADC Registers */
+ #define AUXADC_CON1_SET_V	0x008
+ #define AUXADC_CON1_CLR_V	0x00c
+@@ -990,6 +992,13 @@ static void mtk_thermal_release_periodic_ts(struct mtk_thermal *mt,
+ 	writel((tmp & (~0x10e)), mt->thermal_base + TEMP_MSRCTL1);
+ }
+ 
+static void mtk_thermal_hwmon_action(void *data)
+{
+	struct thermal_zone_device *zone = data;
+
+	thermal_remove_hwmon_sysfs(zone);
+}
+
+ static int mtk_thermal_probe(struct platform_device *pdev)
+ {
+ 	int ret, i, ctrl_id;
+@@ -1094,6 +1103,19 @@ static int mtk_thermal_probe(struct platform_device *pdev)
+ 		goto err_disable_clk_peri_therm;
+ 	}
+ 
+	tzdev->tzp->no_hwmon = false;
+	ret = thermal_add_hwmon_sysfs(tzdev);
+	if (ret)
+		dev_err(&pdev->dev,"error in thermal_add_hwmon_sysfs");
+		//goto err_disable_clk_peri_therm;
+
+	ret = devm_add_action(&pdev->dev, mtk_thermal_hwmon_action, tzdev);
+	if (ret) {
+		dev_err(&pdev->dev,"error in devm_add_action");
+		mtk_thermal_hwmon_action(tzdev);
+		//goto err_disable_clk_peri_therm;
+	}
+
+ 	return 0;
+ 
+ err_disable_clk_peri_therm:
--- a/root/target/linux/mediatek/patches-5.4/0191-thermal.patch
+++ b/root/target/linux/mediatek/patches-5.4/0191-thermal.patch
@ -0,0 +1,35 @@
+From 9847677bda4920bbba15499f28009ce095f02c99 Mon Sep 17 00:00:00 2001
+From: Frank Wunderlich <frank-w@public-files.de>
+Date: Fri, 31 Jan 2020 18:49:56 +0100
+Subject: [PATCH] thermal: mediatek: execute hwmon-code only if hwmon_thermal
+ is set
+
+---
+ drivers/thermal/mtk_thermal.c | 4 ++--
+ 1 file changed, 2 insertions(+), 2 deletions(-)
+
+diff --git a/drivers/thermal/mtk_thermal.c b/drivers/thermal/mtk_thermal.c
+index 8cf3a69bfa46..3a646b88f587 100644
+--- a/drivers/thermal/mtk_thermal.c
+++ b/drivers/thermal/mtk_thermal.c
+@@ -1103,18 +1103,18 @@ static int mtk_thermal_probe(struct platform_device *pdev)
+ 		goto err_disable_clk_peri_therm;
+ 	}
+ 
+#ifdef CONFIG_THERMAL_HWMON
+ 	tzdev->tzp->no_hwmon = false;
+ 	ret = thermal_add_hwmon_sysfs(tzdev);
+ 	if (ret)
+ 		dev_err(&pdev->dev,"error in thermal_add_hwmon_sysfs");
+-		//goto err_disable_clk_peri_therm;
+ 
+ 	ret = devm_add_action(&pdev->dev, mtk_thermal_hwmon_action, tzdev);
+ 	if (ret) {
+ 		dev_err(&pdev->dev,"error in devm_add_action");
+ 		mtk_thermal_hwmon_action(tzdev);
+-		//goto err_disable_clk_peri_therm;
+ 	}
+#endif
+ 
+ 	return 0;
+ 
--- a/root/target/linux/mediatek/patches-5.4/0230-pthread.patch
+++ b/root/target/linux/mediatek/patches-5.4/0230-pthread.patch
@ -0,0 +1,14 @@
+--- a/scripts/Makefile	2020-03-21 22:28:13.290800484 +0800
+++ b/scripts/Makefile	2020-03-21 22:28:26.230870790 +0800
+@@ -23,8 +23,8 @@ hostprogs-$(CONFIG_SYSTEM_EXTRA_CERTIFIC
+ 
+ HOSTCFLAGS_sortextable.o = -I$(srctree)/tools/include
+ HOSTCFLAGS_asn1_compiler.o = -I$(srctree)/include
+-HOSTLDLIBS_sign-file = -lcrypto
+-HOSTLDLIBS_extract-cert = -lcrypto
+HOSTLDLIBS_sign-file = -lcrypto -lpthread
+HOSTLDLIBS_extract-cert = -lcrypto -lpthread
+ 
+ always		:= $(hostprogs-y) $(hostprogs-m)
+ 
+
--- a/root/target/linux/mediatek/patches-5.4/0999-lan-to-wan.patch
+++ b/root/target/linux/mediatek/patches-5.4/0999-lan-to-wan.patch
@ -0,0 +1,49 @@
+--- a/arch/arm/boot/dts/mt7623n-bananapi-bpi-r2.dts	2020-04-19 11:02:56.505715879 +0200
+++ b/arch/arm/boot/dts/mt7623n-bananapi-bpi-r2.dts	2020-04-19 11:03:53.620780390 +0200
+@@ -196,7 +196,7 @@
+ 	gmac1: mac@1 {
+ 		compatible = "mediatek,eth-mac";
+ 		reg = <1>;
+-		label = "wan";
+		label = "lan";
+ 		phy-mode = "rgmii";
+ 		phy-handle = <&ephy0>;
+ 		local-mac-address = [00 0a 35 00 00 02];
+@@ -221,31 +221,31 @@
+ 				#address-cells = <1>;
+ 				#size-cells = <0>;
+ 
+-/* Disabled, is now handled by gmac1 (eth1/wan) via phy-handle!
+/* Disabled, is now handled by gmac1 (eth1/lan) via phy-handle!
+ 				port@0 {
+ 					reg = <0>;
+-					label = "wan";
+					label = "lan";
+ 				};
+ */
+ 
+ 				port@1 {
+ 					reg = <1>;
+-					label = "lan0";
+					label = "wan1";
+ 				};
+ 
+ 				port@2 {
+ 					reg = <2>;
+-					label = "lan1";
+					label = "wan2";
+ 				};
+ 
+ 				port@3 {
+ 					reg = <3>;
+-					label = "lan2";
+					label = "wan3";
+ 				};
+ 
+ 				port@4 {
+ 					reg = <4>;
+-					label = "lan3";
+					label = "wan4";
+ 				};
+ 
+ 				port@6 {