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Fix several RUTX issues

This commit is contained in:
Ycarus (Yannick Chabanois) 2022-03-23 14:51:06 +01:00
parent 41f999557f
commit 66eed314b7
8 changed files with 1424 additions and 0 deletions

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set_state() {
local label="$1"
local disable
[ -e "/sys/class/gpio/${label}_power/value" ] || return
config_get disable ${label} disable
[ "${disable}" -eq 1 ] && \
/sbin/mctl -s -m "${label}" || \
/sbin/mctl -p -m "${label}"
}
do_power_modem() {
[ -z "$(uci -q get system.modem.disable)" ] && /sbin/mctl -p || {
config_load system
config_foreach set_state mctl
}
}
boot_hook_add preinit_main do_power_modem

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#!/bin/sh
. /usr/share/libubox/jshn.sh
PS_ON=1
PS_OFF=2
MPS=0
MLBL="modem"
modem_reset() {
local label="$1"
[ -e "/sys/class/gpio/${label}_reset/value" ] || return
echo 1 > "/sys/class/gpio/${label}_reset/value"
sleep 1
echo 0 > "/sys/class/gpio/${label}_reset/value"
}
modem_off() {
local label="$1"
[ -e "/sys/class/gpio/${label}_reset/value" ] || return
echo 1 > "/sys/class/gpio/${label}_reset/value"
}
modem_power() {
local label="$1"
[ -e "/sys/class/gpio/${label}_power/value" ] || return
# simulate power press
echo 1 > "/sys/class/gpio/${label}_power/value"
sleep 1
echo 0 > "/sys/class/gpio/${label}_power/value"
}
modem_list() {
local list="modem"
local label
[ "$(modem_fetch_primary)" -eq 0 ] && {
echo "${list}"
return
}
for m in /sys/class/gpio/modem*_power; do
label="$(basename $m | awk -F_ '{print $1}')"
[ "${label}" != "modem" ] && list="${list},${label}"
done
echo "${list}"
}
modem_fetch_primary() {
local modem modems primary
json_init
json_load_file "/etc/board.json"
json_get_keys modems modems
json_select modems
for modem in $modems; do
json_select "$modem"
json_get_vars primary
[ -n "$primary" ] && {
echo 1
return
}
json_select ..
done
echo 0
}
modem_is_available() {
local label="$1"
[ -e "/sys/class/gpio/${label}_power/value" ]
}
usage() {
cat <<EOF
Usage $0 <option>
Control modem power state.
Options:
-p, --power-on power on modem
-s, --shutdown shutdown modem
-r, --reboot reboot modem
-m, --modem <label> use specified modem instead of default one
Available modem labels:
$(modem_list)
EOF
exit 1
}
while [ -n "$1" ]; do
case "$1" in
-p | --power-on) MPS="${PS_ON}";;
-s | --shutdown) MPS="${PS_OFF}";;
-r | --reboot) MPS="${PS_ON}";;
-m | --modem) MLBL="$2"; shift;;
-*) echo "Invalid option: $1"; usage;;
*) break;;
esac
shift
done
[ "${MPS}" -eq 0 ] && usage
modem_is_available "${MLBL}" || usage
case "${MPS}" in
"${PS_ON}") modem_reset "${MLBL}"; sleep 1; modem_power "${MLBL}";;
"${PS_OFF}") modem_off "${MLBL}";;
esac

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// SPDX-License-Identifier: GPL-2.0-or-later
/*
* Copyright (c) 2020 Sartura Ltd.
*
* Author: Robert Marko <robert.marko@sartura.hr>
*
* Qualcomm QCA8072 and QCA8075 PHY driver
*/
#include <linux/version.h>
#include <linux/module.h>
#include <linux/of.h>
#include <linux/phy.h>
#include <linux/bitfield.h>
#if LINUX_VERSION_CODE >= KERNEL_VERSION(5,8,0)
#include <linux/ethtool_netlink.h>
#endif
#include <linux/gpio.h>
#include <linux/sfp.h>
#include <dt-bindings/net/qcom-qca807x.h>
#define PHY_ID_QCA8072 0x004dd0b2
#define PHY_ID_QCA8075 0x004dd0b1
#define PHY_ID_QCA807X_PSGMII 0x06820805
/* Downshift */
#define QCA807X_SMARTSPEED_EN BIT(5)
#define QCA807X_SMARTSPEED_RETRY_LIMIT_MASK GENMASK(4, 2)
#define QCA807X_SMARTSPEED_RETRY_LIMIT_DEFAULT 5
#define QCA807X_SMARTSPEED_RETRY_LIMIT_MIN 2
#define QCA807X_SMARTSPEED_RETRY_LIMIT_MAX 9
/* Cable diagnostic test (CDT) */
#define QCA807X_CDT 0x16
#define QCA807X_CDT_ENABLE BIT(15)
#define QCA807X_CDT_ENABLE_INTER_PAIR_SHORT BIT(13)
#define QCA807X_CDT_STATUS BIT(11)
#define QCA807X_CDT_MMD3_STATUS 0x8064
#define QCA807X_CDT_MDI0_STATUS_MASK GENMASK(15, 12)
#define QCA807X_CDT_MDI1_STATUS_MASK GENMASK(11, 8)
#define QCA807X_CDT_MDI2_STATUS_MASK GENMASK(7, 4)
#define QCA807X_CDT_MDI3_STATUS_MASK GENMASK(3, 0)
#define QCA807X_CDT_RESULTS_INVALID 0x0
#define QCA807X_CDT_RESULTS_OK 0x1
#define QCA807X_CDT_RESULTS_OPEN 0x2
#define QCA807X_CDT_RESULTS_SAME_SHORT 0x3
#define QCA807X_CDT_RESULTS_CROSS_SHORT_WITH_MDI1_SAME_OK 0x4
#define QCA807X_CDT_RESULTS_CROSS_SHORT_WITH_MDI2_SAME_OK 0x8
#define QCA807X_CDT_RESULTS_CROSS_SHORT_WITH_MDI3_SAME_OK 0xc
#define QCA807X_CDT_RESULTS_CROSS_SHORT_WITH_MDI1_SAME_OPEN 0x6
#define QCA807X_CDT_RESULTS_CROSS_SHORT_WITH_MDI2_SAME_OPEN 0xa
#define QCA807X_CDT_RESULTS_CROSS_SHORT_WITH_MDI3_SAME_OPEN 0xe
#define QCA807X_CDT_RESULTS_CROSS_SHORT_WITH_MDI1_SAME_SHORT 0x7
#define QCA807X_CDT_RESULTS_CROSS_SHORT_WITH_MDI2_SAME_SHORT 0xb
#define QCA807X_CDT_RESULTS_CROSS_SHORT_WITH_MDI3_SAME_SHORT 0xf
#define QCA807X_CDT_RESULTS_BUSY 0x9
#define QCA807X_CDT_MMD3_MDI0_LENGTH 0x8065
#define QCA807X_CDT_MMD3_MDI1_LENGTH 0x8066
#define QCA807X_CDT_MMD3_MDI2_LENGTH 0x8067
#define QCA807X_CDT_MMD3_MDI3_LENGTH 0x8068
#define QCA807X_CDT_SAME_SHORT_LENGTH_MASK GENMASK(15, 8)
#define QCA807X_CDT_CROSS_SHORT_LENGTH_MASK GENMASK(7, 0)
#define QCA807X_CHIP_CONFIGURATION 0x1f
#define QCA807X_BT_BX_REG_SEL BIT(15)
#define QCA807X_CHIP_CONFIGURATION_MODE_CFG_MASK GENMASK(3, 0)
#define QCA807X_CHIP_CONFIGURATION_MODE_QSGMII_SGMII 4
#define QCA807X_CHIP_CONFIGURATION_MODE_PSGMII_FIBER 3
#define QCA807X_CHIP_CONFIGURATION_MODE_PSGMII_ALL_COPPER 0
#define QCA807X_MEDIA_SELECT_STATUS 0x1a
#define QCA807X_MEDIA_DETECTED_COPPER BIT(5)
#define QCA807X_MEDIA_DETECTED_1000_BASE_X BIT(4)
#define QCA807X_MEDIA_DETECTED_100_BASE_FX BIT(3)
#define QCA807X_MMD7_FIBER_MODE_AUTO_DETECTION 0x807e
#define QCA807X_MMD7_FIBER_MODE_AUTO_DETECTION_EN BIT(0)
#define QCA807X_MMD7_1000BASE_T_POWER_SAVE_PER_CABLE_LENGTH 0x801a
#define QCA807X_CONTROL_DAC_MASK GENMASK(2, 0)
#define QCA807X_MMD7_LED_100N_1 0x8074
#define QCA807X_MMD7_LED_100N_2 0x8075
#define QCA807X_MMD7_LED_1000N_1 0x8076
#define QCA807X_MMD7_LED_1000N_2 0x8077
#define QCA807X_LED_TXACT_BLK_EN_2 BIT(10)
#define QCA807X_LED_RXACT_BLK_EN_2 BIT(9)
#define QCA807X_LED_GT_ON_EN_2 BIT(6)
#define QCA807X_LED_HT_ON_EN_2 BIT(5)
#define QCA807X_LED_BT_ON_EN_2 BIT(4)
#define QCA807X_GPIO_FORCE_EN BIT(15)
#define QCA807X_GPIO_FORCE_MODE_MASK GENMASK(14, 13)
#define QCA807X_INTR_ENABLE 0x12
#define QCA807X_INTR_STATUS 0x13
#define QCA807X_INTR_ENABLE_AUTONEG_ERR BIT(15)
#define QCA807X_INTR_ENABLE_SPEED_CHANGED BIT(14)
#define QCA807X_INTR_ENABLE_DUPLEX_CHANGED BIT(13)
#define QCA807X_INTR_ENABLE_LINK_FAIL BIT(11)
#define QCA807X_INTR_ENABLE_LINK_SUCCESS BIT(10)
#define QCA807X_FUNCTION_CONTROL 0x10
#define QCA807X_FC_MDI_CROSSOVER_MODE_MASK GENMASK(6, 5)
#define QCA807X_FC_MDI_CROSSOVER_AUTO 3
#define QCA807X_FC_MDI_CROSSOVER_MANUAL_MDIX 1
#define QCA807X_FC_MDI_CROSSOVER_MANUAL_MDI 0
#define QCA807X_PHY_SPECIFIC_STATUS 0x11
#define QCA807X_SS_SPEED_AND_DUPLEX_RESOLVED BIT(11)
#define QCA807X_SS_SPEED_MASK GENMASK(15, 14)
#define QCA807X_SS_SPEED_1000 2
#define QCA807X_SS_SPEED_100 1
#define QCA807X_SS_SPEED_10 0
#define QCA807X_SS_DUPLEX BIT(13)
#define QCA807X_SS_MDIX BIT(6)
/* PSGMII PHY specific */
#define PSGMII_QSGMII_DRIVE_CONTROL_1 0xb
#define PSGMII_QSGMII_TX_DRIVER_MASK GENMASK(7, 4)
#define PSGMII_MODE_CTRL 0x6d
#define PSGMII_MODE_CTRL_AZ_WORKAROUND_MASK GENMASK(3, 0)
#define PSGMII_MMD3_SERDES_CONTROL 0x805a
struct qca807x_gpio_priv {
struct phy_device *phy;
};
static int qca807x_get_downshift(struct phy_device *phydev, u8 *data)
{
int val, cnt, enable;
val = phy_read(phydev, MII_NWAYTEST);
if (val < 0)
return val;
enable = FIELD_GET(QCA807X_SMARTSPEED_EN, val);
cnt = FIELD_GET(QCA807X_SMARTSPEED_RETRY_LIMIT_MASK, val) + 2;
*data = enable ? cnt : DOWNSHIFT_DEV_DISABLE;
return 0;
}
static int qca807x_set_downshift(struct phy_device *phydev, u8 cnt)
{
int ret, val;
if (cnt > QCA807X_SMARTSPEED_RETRY_LIMIT_MAX ||
(cnt < QCA807X_SMARTSPEED_RETRY_LIMIT_MIN && cnt != DOWNSHIFT_DEV_DISABLE))
return -EINVAL;
if (!cnt) {
ret = phy_clear_bits(phydev, MII_NWAYTEST, QCA807X_SMARTSPEED_EN);
} else {
val = QCA807X_SMARTSPEED_EN;
val |= FIELD_PREP(QCA807X_SMARTSPEED_RETRY_LIMIT_MASK, cnt - 2);
phy_modify(phydev, MII_NWAYTEST,
QCA807X_SMARTSPEED_EN |
QCA807X_SMARTSPEED_RETRY_LIMIT_MASK,
val);
}
ret = genphy_soft_reset(phydev);
return ret;
}
static int qca807x_get_tunable(struct phy_device *phydev,
struct ethtool_tunable *tuna, void *data)
{
switch (tuna->id) {
case ETHTOOL_PHY_DOWNSHIFT:
return qca807x_get_downshift(phydev, data);
default:
return -EOPNOTSUPP;
}
}
static int qca807x_set_tunable(struct phy_device *phydev,
struct ethtool_tunable *tuna, const void *data)
{
switch (tuna->id) {
case ETHTOOL_PHY_DOWNSHIFT:
return qca807x_set_downshift(phydev, *(const u8 *)data);
default:
return -EOPNOTSUPP;
}
}
#if LINUX_VERSION_CODE >= KERNEL_VERSION(5,8,0)
static bool qca807x_distance_valid(int result)
{
switch (result) {
case QCA807X_CDT_RESULTS_OPEN:
case QCA807X_CDT_RESULTS_SAME_SHORT:
case QCA807X_CDT_RESULTS_CROSS_SHORT_WITH_MDI1_SAME_OK:
case QCA807X_CDT_RESULTS_CROSS_SHORT_WITH_MDI2_SAME_OK:
case QCA807X_CDT_RESULTS_CROSS_SHORT_WITH_MDI3_SAME_OK:
case QCA807X_CDT_RESULTS_CROSS_SHORT_WITH_MDI1_SAME_OPEN:
case QCA807X_CDT_RESULTS_CROSS_SHORT_WITH_MDI2_SAME_OPEN:
case QCA807X_CDT_RESULTS_CROSS_SHORT_WITH_MDI3_SAME_OPEN:
case QCA807X_CDT_RESULTS_CROSS_SHORT_WITH_MDI1_SAME_SHORT:
case QCA807X_CDT_RESULTS_CROSS_SHORT_WITH_MDI2_SAME_SHORT:
case QCA807X_CDT_RESULTS_CROSS_SHORT_WITH_MDI3_SAME_SHORT:
return true;
}
return false;
}
static int qca807x_report_length(struct phy_device *phydev,
int pair, int result)
{
int length;
int ret;
ret = phy_read_mmd(phydev, MDIO_MMD_PCS, QCA807X_CDT_MMD3_MDI0_LENGTH + pair);
if (ret < 0)
return ret;
switch (result) {
case ETHTOOL_A_CABLE_RESULT_CODE_SAME_SHORT:
length = (FIELD_GET(QCA807X_CDT_SAME_SHORT_LENGTH_MASK, ret) * 800) / 10;
break;
case ETHTOOL_A_CABLE_RESULT_CODE_OPEN:
case ETHTOOL_A_CABLE_RESULT_CODE_CROSS_SHORT:
length = (FIELD_GET(QCA807X_CDT_CROSS_SHORT_LENGTH_MASK, ret) * 800) / 10;
break;
}
ethnl_cable_test_fault_length(phydev, pair, length);
return 0;
}
static int qca807x_cable_test_report_trans(int result)
{
switch (result) {
case QCA807X_CDT_RESULTS_OK:
return ETHTOOL_A_CABLE_RESULT_CODE_OK;
case QCA807X_CDT_RESULTS_OPEN:
return ETHTOOL_A_CABLE_RESULT_CODE_OPEN;
case QCA807X_CDT_RESULTS_SAME_SHORT:
return ETHTOOL_A_CABLE_RESULT_CODE_SAME_SHORT;
case QCA807X_CDT_RESULTS_CROSS_SHORT_WITH_MDI1_SAME_OK:
case QCA807X_CDT_RESULTS_CROSS_SHORT_WITH_MDI2_SAME_OK:
case QCA807X_CDT_RESULTS_CROSS_SHORT_WITH_MDI3_SAME_OK:
case QCA807X_CDT_RESULTS_CROSS_SHORT_WITH_MDI1_SAME_OPEN:
case QCA807X_CDT_RESULTS_CROSS_SHORT_WITH_MDI2_SAME_OPEN:
case QCA807X_CDT_RESULTS_CROSS_SHORT_WITH_MDI3_SAME_OPEN:
case QCA807X_CDT_RESULTS_CROSS_SHORT_WITH_MDI1_SAME_SHORT:
case QCA807X_CDT_RESULTS_CROSS_SHORT_WITH_MDI2_SAME_SHORT:
case QCA807X_CDT_RESULTS_CROSS_SHORT_WITH_MDI3_SAME_SHORT:
return ETHTOOL_A_CABLE_RESULT_CODE_CROSS_SHORT;
default:
return ETHTOOL_A_CABLE_RESULT_CODE_UNSPEC;
}
}
static int qca807x_cable_test_report(struct phy_device *phydev)
{
int pair0, pair1, pair2, pair3;
int ret;
ret = phy_read_mmd(phydev, MDIO_MMD_PCS, QCA807X_CDT_MMD3_STATUS);
if (ret < 0)
return ret;
pair0 = FIELD_GET(QCA807X_CDT_MDI0_STATUS_MASK, ret);
pair1 = FIELD_GET(QCA807X_CDT_MDI1_STATUS_MASK, ret);
pair2 = FIELD_GET(QCA807X_CDT_MDI2_STATUS_MASK, ret);
pair3 = FIELD_GET(QCA807X_CDT_MDI3_STATUS_MASK, ret);
ethnl_cable_test_result(phydev, ETHTOOL_A_CABLE_PAIR_A,
qca807x_cable_test_report_trans(pair0));
ethnl_cable_test_result(phydev, ETHTOOL_A_CABLE_PAIR_B,
qca807x_cable_test_report_trans(pair1));
ethnl_cable_test_result(phydev, ETHTOOL_A_CABLE_PAIR_C,
qca807x_cable_test_report_trans(pair2));
ethnl_cable_test_result(phydev, ETHTOOL_A_CABLE_PAIR_D,
qca807x_cable_test_report_trans(pair3));
if (qca807x_distance_valid(pair0))
qca807x_report_length(phydev, 0, qca807x_cable_test_report_trans(pair0));
if (qca807x_distance_valid(pair1))
qca807x_report_length(phydev, 1, qca807x_cable_test_report_trans(pair1));
if (qca807x_distance_valid(pair2))
qca807x_report_length(phydev, 2, qca807x_cable_test_report_trans(pair2));
if (qca807x_distance_valid(pair3))
qca807x_report_length(phydev, 3, qca807x_cable_test_report_trans(pair3));
return 0;
}
static int qca807x_cable_test_get_status(struct phy_device *phydev,
bool *finished)
{
int val;
*finished = false;
val = phy_read(phydev, QCA807X_CDT);
if (!((val & QCA807X_CDT_ENABLE) && (val & QCA807X_CDT_STATUS))) {
*finished = true;
return qca807x_cable_test_report(phydev);
}
return 0;
}
static int qca807x_cable_test_start(struct phy_device *phydev)
{
int val, ret;
val = phy_read(phydev, QCA807X_CDT);
/* Enable inter-pair short check as well */
val &= ~QCA807X_CDT_ENABLE_INTER_PAIR_SHORT;
val |= QCA807X_CDT_ENABLE;
ret = phy_write(phydev, QCA807X_CDT, val);
return ret;
}
#endif
#ifdef CONFIG_GPIOLIB
static int qca807x_gpio_get_direction(struct gpio_chip *gc, unsigned int offset)
{
#if LINUX_VERSION_CODE >= KERNEL_VERSION(5,5,0)
return GPIO_LINE_DIRECTION_OUT;
#else
return GPIOF_DIR_OUT;
#endif
}
static int qca807x_gpio_get_reg(unsigned int offset)
{
return QCA807X_MMD7_LED_100N_2 + (offset % 2) * 2;
}
static int qca807x_gpio_get(struct gpio_chip *gc, unsigned int offset)
{
struct qca807x_gpio_priv *priv = gpiochip_get_data(gc);
int val;
val = phy_read_mmd(priv->phy, MDIO_MMD_AN, qca807x_gpio_get_reg(offset));
return FIELD_GET(QCA807X_GPIO_FORCE_MODE_MASK, val);
}
static void qca807x_gpio_set(struct gpio_chip *gc, unsigned int offset, int value)
{
struct qca807x_gpio_priv *priv = gpiochip_get_data(gc);
int val;
val = phy_read_mmd(priv->phy, MDIO_MMD_AN, qca807x_gpio_get_reg(offset));
val &= ~QCA807X_GPIO_FORCE_MODE_MASK;
val |= QCA807X_GPIO_FORCE_EN;
val |= FIELD_PREP(QCA807X_GPIO_FORCE_MODE_MASK, value);
phy_write_mmd(priv->phy, MDIO_MMD_AN, qca807x_gpio_get_reg(offset), val);
}
static int qca807x_gpio_dir_out(struct gpio_chip *gc, unsigned int offset, int value)
{
qca807x_gpio_set(gc, offset, value);
return 0;
}
static int qca807x_gpio(struct phy_device *phydev)
{
struct device *dev = &phydev->mdio.dev;
struct qca807x_gpio_priv *priv;
struct gpio_chip *gc;
priv = devm_kzalloc(dev, sizeof(*priv), GFP_KERNEL);
if (!priv)
return -ENOMEM;
priv->phy = phydev;
gc = devm_kzalloc(dev, sizeof(*gc), GFP_KERNEL);
if (!gc)
return -ENOMEM;
gc->label = dev_name(dev);
gc->base = -1;
gc->ngpio = 2;
gc->parent = dev;
gc->owner = THIS_MODULE;
gc->can_sleep = true;
gc->get_direction = qca807x_gpio_get_direction;
gc->direction_output = qca807x_gpio_dir_out;
gc->get = qca807x_gpio_get;
gc->set = qca807x_gpio_set;
return devm_gpiochip_add_data(dev, gc, priv);
}
#endif
static int qca807x_read_copper_status(struct phy_device *phydev, bool combo_port)
{
int ss, err, page, old_link = phydev->link;
/* Only combo port has dual pages */
if (combo_port) {
/* Check whether copper page is set and set if needed */
page = phy_read(phydev, QCA807X_CHIP_CONFIGURATION);
if (!(page & QCA807X_BT_BX_REG_SEL)) {
page |= QCA807X_BT_BX_REG_SEL;
phy_write(phydev, QCA807X_CHIP_CONFIGURATION, page);
}
}
/* Update the link, but return if there was an error */
err = genphy_update_link(phydev);
if (err)
return err;
/* why bother the PHY if nothing can have changed */
if (phydev->autoneg == AUTONEG_ENABLE && old_link && phydev->link)
return 0;
phydev->speed = SPEED_UNKNOWN;
phydev->duplex = DUPLEX_UNKNOWN;
phydev->pause = 0;
phydev->asym_pause = 0;
err = genphy_read_lpa(phydev);
if (err < 0)
return err;
/* Read the QCA807x PHY-Specific Status register copper page,
* which indicates the speed and duplex that the PHY is actually
* using, irrespective of whether we are in autoneg mode or not.
*/
ss = phy_read(phydev, QCA807X_PHY_SPECIFIC_STATUS);
if (ss < 0)
return ss;
if (ss & QCA807X_SS_SPEED_AND_DUPLEX_RESOLVED) {
int sfc;
sfc = phy_read(phydev, QCA807X_FUNCTION_CONTROL);
if (sfc < 0)
return sfc;
switch (FIELD_GET(QCA807X_SS_SPEED_MASK, ss)) {
case QCA807X_SS_SPEED_10:
phydev->speed = SPEED_10;
break;
case QCA807X_SS_SPEED_100:
phydev->speed = SPEED_100;
break;
case QCA807X_SS_SPEED_1000:
phydev->speed = SPEED_1000;
break;
}
if (ss & QCA807X_SS_DUPLEX)
phydev->duplex = DUPLEX_FULL;
else
phydev->duplex = DUPLEX_HALF;
if (ss & QCA807X_SS_MDIX)
phydev->mdix = ETH_TP_MDI_X;
else
phydev->mdix = ETH_TP_MDI;
switch (FIELD_GET(QCA807X_FC_MDI_CROSSOVER_MODE_MASK, sfc)) {
case QCA807X_FC_MDI_CROSSOVER_MANUAL_MDI:
phydev->mdix_ctrl = ETH_TP_MDI;
break;
case QCA807X_FC_MDI_CROSSOVER_MANUAL_MDIX:
phydev->mdix_ctrl = ETH_TP_MDI_X;
break;
case QCA807X_FC_MDI_CROSSOVER_AUTO:
phydev->mdix_ctrl = ETH_TP_MDI_AUTO;
break;
}
}
if (phydev->autoneg == AUTONEG_ENABLE && phydev->autoneg_complete)
phy_resolve_aneg_pause(phydev);
return 0;
}
static int qca807x_read_fiber_status(struct phy_device *phydev, bool combo_port)
{
int ss, err, page, lpa, old_link = phydev->link;
/* Check whether fiber page is set and set if needed */
page = phy_read(phydev, QCA807X_CHIP_CONFIGURATION);
if (page & QCA807X_BT_BX_REG_SEL) {
page &= ~QCA807X_BT_BX_REG_SEL;
phy_write(phydev, QCA807X_CHIP_CONFIGURATION, page);
}
/* Update the link, but return if there was an error */
err = genphy_update_link(phydev);
if (err)
return err;
/* why bother the PHY if nothing can have changed */
if (phydev->autoneg == AUTONEG_ENABLE && old_link && phydev->link)
return 0;
phydev->speed = SPEED_UNKNOWN;
phydev->duplex = DUPLEX_UNKNOWN;
phydev->pause = 0;
phydev->asym_pause = 0;
if (phydev->autoneg == AUTONEG_ENABLE && phydev->autoneg_complete) {
lpa = phy_read(phydev, MII_LPA);
if (lpa < 0)
return lpa;
linkmode_mod_bit(ETHTOOL_LINK_MODE_Autoneg_BIT,
phydev->lp_advertising, lpa & LPA_LPACK);
linkmode_mod_bit(ETHTOOL_LINK_MODE_1000baseX_Full_BIT,
phydev->lp_advertising, lpa & LPA_1000XFULL);
linkmode_mod_bit(ETHTOOL_LINK_MODE_Pause_BIT,
phydev->lp_advertising, lpa & LPA_1000XPAUSE);
linkmode_mod_bit(ETHTOOL_LINK_MODE_Asym_Pause_BIT,
phydev->lp_advertising,
lpa & LPA_1000XPAUSE_ASYM);
phy_resolve_aneg_linkmode(phydev);
}
/* Read the QCA807x PHY-Specific Status register fiber page,
* which indicates the speed and duplex that the PHY is actually
* using, irrespective of whether we are in autoneg mode or not.
*/
ss = phy_read(phydev, QCA807X_PHY_SPECIFIC_STATUS);
if (ss < 0)
return ss;
if (ss & QCA807X_SS_SPEED_AND_DUPLEX_RESOLVED) {
switch (FIELD_GET(QCA807X_SS_SPEED_MASK, ss)) {
case QCA807X_SS_SPEED_100:
phydev->speed = SPEED_100;
break;
case QCA807X_SS_SPEED_1000:
phydev->speed = SPEED_1000;
break;
}
if (ss & QCA807X_SS_DUPLEX)
phydev->duplex = DUPLEX_FULL;
else
phydev->duplex = DUPLEX_HALF;
}
return 0;
}
static int qca807x_read_status(struct phy_device *phydev)
{
int val;
/* Check for Combo port */
if (phy_read(phydev, QCA807X_CHIP_CONFIGURATION)) {
/* Check for fiber mode first */
if (linkmode_test_bit(ETHTOOL_LINK_MODE_FIBRE_BIT, phydev->supported)) {
/* Check for actual detected media */
val = phy_read(phydev, QCA807X_MEDIA_SELECT_STATUS);
if (val & QCA807X_MEDIA_DETECTED_COPPER) {
qca807x_read_copper_status(phydev, true);
} else if ((val & QCA807X_MEDIA_DETECTED_1000_BASE_X) ||
(val & QCA807X_MEDIA_DETECTED_100_BASE_FX)) {
qca807x_read_fiber_status(phydev, true);
}
} else {
qca807x_read_copper_status(phydev, true);
}
} else {
qca807x_read_copper_status(phydev, false);
}
return 0;
}
static int qca807x_config_intr(struct phy_device *phydev)
{
int ret, val;
val = phy_read(phydev, QCA807X_INTR_ENABLE);
if (phydev->interrupts == PHY_INTERRUPT_ENABLED) {
/* Check for combo port as it has fewer interrupts */
if (phy_read(phydev, QCA807X_CHIP_CONFIGURATION)) {
val |= QCA807X_INTR_ENABLE_SPEED_CHANGED;
val |= QCA807X_INTR_ENABLE_LINK_FAIL;
val |= QCA807X_INTR_ENABLE_LINK_SUCCESS;
} else {
val |= QCA807X_INTR_ENABLE_AUTONEG_ERR;
val |= QCA807X_INTR_ENABLE_SPEED_CHANGED;
val |= QCA807X_INTR_ENABLE_DUPLEX_CHANGED;
val |= QCA807X_INTR_ENABLE_LINK_FAIL;
val |= QCA807X_INTR_ENABLE_LINK_SUCCESS;
}
ret = phy_write(phydev, QCA807X_INTR_ENABLE, val);
} else {
ret = phy_write(phydev, QCA807X_INTR_ENABLE, 0);
}
return ret;
}
#if LINUX_VERSION_CODE < KERNEL_VERSION(5,12,0)
static int qca807x_ack_intr(struct phy_device *phydev)
{
int ret;
ret = phy_read(phydev, QCA807X_INTR_STATUS);
return (ret < 0) ? ret : 0;
}
#else
static irqreturn_t qca807x_handle_interrupt(struct phy_device *phydev)
{
int irq_status, int_enabled;
irq_status = phy_read(phydev, QCA807X_INTR_STATUS);
if (irq_status < 0) {
phy_error(phydev);
return IRQ_NONE;
}
/* Read the current enabled interrupts */
int_enabled = phy_read(phydev, QCA807X_INTR_ENABLE);
if (int_enabled < 0) {
phy_error(phydev);
return IRQ_NONE;
}
/* See if this was one of our enabled interrupts */
if (!(irq_status & int_enabled))
return IRQ_NONE;
phy_trigger_machine(phydev);
return IRQ_HANDLED;
}
#endif
static int qca807x_led_config(struct phy_device *phydev)
{
struct device_node *node = phydev->mdio.dev.of_node;
bool led_config = false;
int val;
val = phy_read_mmd(phydev, MDIO_MMD_AN, QCA807X_MMD7_LED_1000N_1);
if (val < 0)
return val;
if (of_property_read_bool(node, "qcom,single-led-1000")) {
val |= QCA807X_LED_TXACT_BLK_EN_2;
val |= QCA807X_LED_RXACT_BLK_EN_2;
val |= QCA807X_LED_GT_ON_EN_2;
led_config = true;
}
if (of_property_read_bool(node, "qcom,single-led-100")) {
val |= QCA807X_LED_HT_ON_EN_2;
led_config = true;
}
if (of_property_read_bool(node, "qcom,single-led-10")) {
val |= QCA807X_LED_BT_ON_EN_2;
led_config = true;
}
if (led_config)
return phy_write_mmd(phydev, MDIO_MMD_AN, QCA807X_MMD7_LED_1000N_1, val);
else
return 0;
}
static const struct sfp_upstream_ops qca807x_sfp_ops = {
.attach = phy_sfp_attach,
.detach = phy_sfp_detach,
};
static int qca807x_config(struct phy_device *phydev)
{
struct device_node *node = phydev->mdio.dev.of_node;
int control_dac, ret = 0;
u32 of_control_dac;
/* Check for Combo port */
if (phy_read(phydev, QCA807X_CHIP_CONFIGURATION)) {
int fiber_mode_autodect;
int psgmii_serdes;
int chip_config;
if (of_property_read_bool(node, "qcom,fiber-enable")) {
/* Enable fiber mode autodection (1000Base-X or 100Base-FX) */
fiber_mode_autodect = phy_read_mmd(phydev, MDIO_MMD_AN,
QCA807X_MMD7_FIBER_MODE_AUTO_DETECTION);
fiber_mode_autodect |= QCA807X_MMD7_FIBER_MODE_AUTO_DETECTION_EN;
phy_write_mmd(phydev, MDIO_MMD_AN, QCA807X_MMD7_FIBER_MODE_AUTO_DETECTION,
fiber_mode_autodect);
/* Enable 4 copper + combo port mode */
chip_config = phy_read(phydev, QCA807X_CHIP_CONFIGURATION);
chip_config &= ~QCA807X_CHIP_CONFIGURATION_MODE_CFG_MASK;
chip_config |= FIELD_PREP(QCA807X_CHIP_CONFIGURATION_MODE_CFG_MASK,
QCA807X_CHIP_CONFIGURATION_MODE_PSGMII_FIBER);
phy_write(phydev, QCA807X_CHIP_CONFIGURATION, chip_config);
linkmode_set_bit(ETHTOOL_LINK_MODE_FIBRE_BIT, phydev->supported);
linkmode_set_bit(ETHTOOL_LINK_MODE_FIBRE_BIT, phydev->advertising);
}
/* Prevent PSGMII going into hibernation via PSGMII self test */
psgmii_serdes = phy_read_mmd(phydev, MDIO_MMD_PCS, PSGMII_MMD3_SERDES_CONTROL);
psgmii_serdes &= ~BIT(1);
ret = phy_write_mmd(phydev, MDIO_MMD_PCS,
PSGMII_MMD3_SERDES_CONTROL,
psgmii_serdes);
}
if (!of_property_read_u32(node, "qcom,control-dac", &of_control_dac)) {
control_dac = phy_read_mmd(phydev, MDIO_MMD_AN,
QCA807X_MMD7_1000BASE_T_POWER_SAVE_PER_CABLE_LENGTH);
control_dac &= ~QCA807X_CONTROL_DAC_MASK;
control_dac |= FIELD_PREP(QCA807X_CONTROL_DAC_MASK, of_control_dac);
ret = phy_write_mmd(phydev, MDIO_MMD_AN,
QCA807X_MMD7_1000BASE_T_POWER_SAVE_PER_CABLE_LENGTH,
control_dac);
}
/* Optionally configure LED-s */
if (IS_ENABLED(CONFIG_GPIOLIB)) {
/* Check whether PHY-s pins are used as GPIO-s */
if (!of_property_read_bool(node, "gpio-controller"))
ret = qca807x_led_config(phydev);
} else {
ret = qca807x_led_config(phydev);
}
return ret;
}
static int qca807x_probe(struct phy_device *phydev)
{
struct device_node *node = phydev->mdio.dev.of_node;
int ret = 0;
if (IS_ENABLED(CONFIG_GPIOLIB)) {
/* Do not register a GPIO controller unless flagged for it */
if (of_property_read_bool(node, "gpio-controller"))
ret = qca807x_gpio(phydev);
}
/* Attach SFP bus on combo port*/
if (of_property_read_bool(node, "qcom,fiber-enable")) {
if (phy_read(phydev, QCA807X_CHIP_CONFIGURATION))
ret = phy_sfp_probe(phydev, &qca807x_sfp_ops);
}
return ret;
}
static int qca807x_psgmii_config(struct phy_device *phydev)
{
struct device_node *node = phydev->mdio.dev.of_node;
int psgmii_az, tx_amp, ret = 0;
u32 tx_driver_strength;
/* Workaround to enable AZ transmitting ability */
if (of_property_read_bool(node, "qcom,psgmii-az")) {
psgmii_az = phy_read_mmd(phydev, MDIO_MMD_PMAPMD, PSGMII_MODE_CTRL);
psgmii_az &= ~PSGMII_MODE_CTRL_AZ_WORKAROUND_MASK;
psgmii_az |= FIELD_PREP(PSGMII_MODE_CTRL_AZ_WORKAROUND_MASK, 0xc);
ret = phy_write_mmd(phydev, MDIO_MMD_PMAPMD, PSGMII_MODE_CTRL, psgmii_az);
psgmii_az = phy_read_mmd(phydev, MDIO_MMD_PMAPMD, PSGMII_MODE_CTRL);
}
/* PSGMII/QSGMII TX amp set to DT defined value instead of default 600mV */
if (!of_property_read_u32(node, "qcom,tx-driver-strength", &tx_driver_strength)) {
tx_amp = phy_read(phydev, PSGMII_QSGMII_DRIVE_CONTROL_1);
tx_amp &= ~PSGMII_QSGMII_TX_DRIVER_MASK;
tx_amp |= FIELD_PREP(PSGMII_QSGMII_TX_DRIVER_MASK, tx_driver_strength);
ret = phy_write(phydev, PSGMII_QSGMII_DRIVE_CONTROL_1, tx_amp);
}
return ret;
}
static struct phy_driver qca807x_drivers[] = {
{
PHY_ID_MATCH_EXACT(PHY_ID_QCA8072),
.name = "Qualcomm QCA8072",
#if LINUX_VERSION_CODE >= KERNEL_VERSION(5,8,0)
.flags = PHY_POLL_CABLE_TEST,
#endif
/* PHY_GBIT_FEATURES */
.probe = qca807x_probe,
.config_init = qca807x_config,
.read_status = qca807x_read_status,
.config_intr = qca807x_config_intr,
#if LINUX_VERSION_CODE < KERNEL_VERSION(5,12,0)
.ack_interrupt = qca807x_ack_intr,
#else
.handle_interrupt = qca807x_handle_interrupt,
#endif
.soft_reset = genphy_soft_reset,
.get_tunable = qca807x_get_tunable,
.set_tunable = qca807x_set_tunable,
#if LINUX_VERSION_CODE >= KERNEL_VERSION(5,8,0)
.cable_test_start = qca807x_cable_test_start,
.cable_test_get_status = qca807x_cable_test_get_status,
#endif
},
{
PHY_ID_MATCH_EXACT(PHY_ID_QCA8075),
.name = "Qualcomm QCA8075",
#if LINUX_VERSION_CODE >= KERNEL_VERSION(5,8,0)
.flags = PHY_POLL_CABLE_TEST,
#endif
/* PHY_GBIT_FEATURES */
.probe = qca807x_probe,
.config_init = qca807x_config,
.read_status = qca807x_read_status,
.config_intr = qca807x_config_intr,
#if LINUX_VERSION_CODE < KERNEL_VERSION(5,12,0)
.ack_interrupt = qca807x_ack_intr,
#else
.handle_interrupt = qca807x_handle_interrupt,
#endif
.soft_reset = genphy_soft_reset,
.get_tunable = qca807x_get_tunable,
.set_tunable = qca807x_set_tunable,
#if LINUX_VERSION_CODE >= KERNEL_VERSION(5,8,0)
.cable_test_start = qca807x_cable_test_start,
.cable_test_get_status = qca807x_cable_test_get_status,
#endif
},
{
PHY_ID_MATCH_EXACT(PHY_ID_QCA807X_PSGMII),
.name = "Qualcomm QCA807x PSGMII",
.probe = qca807x_psgmii_config,
},
};
module_phy_driver(qca807x_drivers);
static struct mdio_device_id __maybe_unused qca807x_tbl[] = {
{ PHY_ID_MATCH_EXACT(PHY_ID_QCA8072) },
{ PHY_ID_MATCH_EXACT(PHY_ID_QCA8075) },
{ PHY_ID_MATCH_MODEL(PHY_ID_QCA807X_PSGMII) },
{ }
};
MODULE_AUTHOR("Robert Marko");
MODULE_DESCRIPTION("Qualcomm QCA807x PHY driver");
MODULE_DEVICE_TABLE(mdio, qca807x_tbl);
MODULE_LICENSE("GPL");

View file

@ -0,0 +1,16 @@
Index: linux-5.4.124/arch/arm/boot/dts/qcom-ipq4019.dtsi
===================================================================
--- linux-5.4.124.orig/arch/arm/boot/dts/qcom-ipq4019.dtsi
+++ linux-5.4.124/arch/arm/boot/dts/qcom-ipq4019.dtsi
@@ -140,9 +140,9 @@
};
clocks {
- sleep_clk: sleep_clk {
+ sleep_clk: gcc_sleep_clk_src {
compatible = "fixed-clock";
- clock-frequency = <32768>;
+ clock-frequency = <32000>;
#clock-cells = <0>;
};

View file

@ -0,0 +1,53 @@
--- a/fs/jffs2/writev.c
+++ b/fs/jffs2/writev.c
@@ -16,9 +16,18 @@
int jffs2_flash_direct_writev(struct jffs2_sb_info *c, const struct kvec *vecs,
unsigned long count, loff_t to, size_t *retlen)
{
+ int ret;
+
+ ret = mtd_writev(c->mtd, vecs, count, to, retlen);
+
if (!jffs2_is_writebuffered(c)) {
if (jffs2_sum_active()) {
int res;
+
+ if (ret ||
+ *retlen != iov_length((struct iovec *) vecs, count))
+ return ret;
+
res = jffs2_sum_add_kvec(c, vecs, count, (uint32_t) to);
if (res) {
return res;
@@ -26,18 +35,22 @@
}
}
- return mtd_writev(c->mtd, vecs, count, to, retlen);
+ return ret;
}
int jffs2_flash_direct_write(struct jffs2_sb_info *c, loff_t ofs, size_t len,
size_t *retlen, const u_char *buf)
{
int ret;
+
ret = mtd_write(c->mtd, ofs, len, retlen, buf);
if (jffs2_sum_active()) {
struct kvec vecs[1];
int res;
+
+ if (ret || *retlen != len)
+ return ret;
vecs[0].iov_base = (unsigned char *) buf;
vecs[0].iov_len = len;
@@ -47,5 +60,6 @@
return res;
}
}
+
return ret;
}

View file

@ -0,0 +1,210 @@
--- a/drivers/net/phy/qca807x.c
+++ b/drivers/net/phy/qca807x.c
@@ -122,9 +122,24 @@
#define PSGMII_MODE_CTRL_AZ_WORKAROUND_MASK GENMASK(3, 0)
#define PSGMII_MMD3_SERDES_CONTROL 0x805a
+#define QCA8075_PHY4_PREFER_FIBER 0x400
+
struct qca807x_gpio_priv {
struct phy_device *phy;
};
+
+/* Phy medium type */
+typedef enum {
+ QCA8075_PHY_MEDIUM_COPPER = 0,
+ QCA8075_PHY_MEDIUM_FIBER = 1, /**< Fiber */
+ QCA8075_PHY_MEDIUM_NULL = 2 /**< NULL */
+} qca8075_phy_medium_t;
+
+static qca8075_phy_medium_t last_phy_medium = QCA8075_PHY_MEDIUM_NULL;
+static int last_phydev_link_state = -1;
+static int copper_link = 0;
+static int fiber_link = 0;
+static int report_last_status = 0;
static int qca807x_get_downshift(struct phy_device *phydev, u8 *data)
{
@@ -400,6 +415,142 @@
}
#endif
+static qca8075_phy_medium_t phy_prefer_medium_get(struct phy_device *phydev)
+{
+ int val;
+ val = phy_read(phydev, QCA807X_CHIP_CONFIGURATION);
+
+ return ((val & QCA8075_PHY4_PREFER_FIBER) ?
+ QCA8075_PHY_MEDIUM_FIBER : QCA8075_PHY_MEDIUM_COPPER);
+}
+
+static qca8075_phy_medium_t phy_active_medium_get(struct phy_device *phydev) {
+ int val;
+ val = phy_read(phydev, QCA807X_MEDIA_SELECT_STATUS);
+
+ if (val & QCA807X_MEDIA_DETECTED_COPPER) {
+ return QCA8075_PHY_MEDIUM_COPPER;
+ } else if ((val & QCA807X_MEDIA_DETECTED_1000_BASE_X) ||
+ (val & QCA807X_MEDIA_DETECTED_100_BASE_FX)) {
+ return QCA8075_PHY_MEDIUM_FIBER;
+ } else {
+ return phy_prefer_medium_get(phydev);
+ }
+}
+
+static int ar40xx_update_link(struct phy_device *phydev)
+{
+ int status = 0, bmcr;
+ qca8075_phy_medium_t phy_medium;
+
+ phy_medium = phy_active_medium_get(phydev);
+
+ /* Do a fake read */
+ bmcr = phy_read(phydev, MII_BMSR);
+ if (bmcr < 0)
+ return bmcr;
+
+ /* Autoneg is being started, therefore disregard BMSR value and
+ * report link as down.
+ */
+ if (bmcr & BMCR_ANRESTART)
+ goto done;
+
+ /* The link state is latched low so that momentary link
+ * drops can be detected. Do not double-read the status
+ * in polling mode to detect such short link drops except
+ * the link was already down.
+ */
+ if (!phy_polling_mode(phydev) || !phydev->link) {
+ status = phy_read(phydev, MII_BMSR);
+ if (status < 0)
+ return status;
+ else if (status & BMSR_LSTATUS)
+ goto done;
+ }
+
+ /* Read link and autonegotiation status */
+ status = phy_read(phydev, MII_BMSR);
+ if (status < 0)
+ return status;
+done:
+ if ( report_last_status > 0 ) {
+ report_last_status = 0;
+ phydev->link = last_phydev_link_state;
+ return 0;
+ }
+ /* reporting copper/fiber link state to netdev */
+ if ((status & BMSR_LSTATUS) == 0) {
+ phydev->link = 0;
+ if (last_phy_medium == phy_medium) { /* medium not changed */
+ if(phydev->link != last_phydev_link_state)
+ report_last_status++;
+ if (phy_medium == QCA8075_PHY_MEDIUM_FIBER)
+ fiber_link = 0;
+ else
+ copper_link = 0;
+ } else { /* medium changed, check current medium*/
+ if (phy_medium == QCA8075_PHY_MEDIUM_FIBER) { /* fiber active*/
+ if (copper_link == 1) { /* copper active, but not preferred*/
+ if(phydev->link == last_phydev_link_state) {
+ phydev->link = !phydev->link; /* toggle link state */
+ report_last_status++;
+ }
+ }
+ fiber_link = 0;
+ } else { /* copper active*/
+ if (fiber_link == 1) { /* fiber active, preferred*/
+ if(phydev->link == last_phydev_link_state) {
+ phydev->link = !phydev->link; /* toggle link state */
+ report_last_status++;
+ }
+ }
+ copper_link = 0;
+ }
+ }
+ } else {
+ phydev->link = 1;
+ if (last_phy_medium == phy_medium){
+ if (phy_medium == QCA8075_PHY_MEDIUM_FIBER)
+ fiber_link = 1;
+ else
+ copper_link = 1;
+ }
+ else {
+ if (phy_medium == QCA8075_PHY_MEDIUM_FIBER) { /* fiber active*/
+ if (copper_link == 1) { /* copper active, but not preferred*/
+ if(phydev->link == last_phydev_link_state) {
+ phydev->link = !phydev->link;
+ report_last_status++;
+ }
+ }
+ fiber_link = 1;
+ } else { /* copper active*/
+ if (fiber_link == 1) { /* fiber active, preferred*/
+ if(phydev->link == last_phydev_link_state) {
+ phydev->link = !phydev->link;
+ report_last_status++;
+ }
+ }
+ copper_link = 1;
+ }
+ }
+ }
+
+ phydev->autoneg_complete = status & BMSR_ANEGCOMPLETE ? 1 : 0;
+
+ /* Consider the case that autoneg was started and "aneg complete"
+ * bit has been reset, but "link up" bit not yet.
+ */
+ if (phydev->autoneg == AUTONEG_ENABLE && !phydev->autoneg_complete)
+ phydev->link = 0;
+
+ last_phy_medium = phy_medium;
+ last_phydev_link_state = phydev->link;
+
+ return 0;
+}
+
static int qca807x_read_copper_status(struct phy_device *phydev, bool combo_port)
{
int ss, err, page, old_link = phydev->link;
@@ -415,7 +566,7 @@
}
/* Update the link, but return if there was an error */
- err = genphy_update_link(phydev);
+ err = ar40xx_update_link(phydev);
if (err)
return err;
@@ -499,7 +650,7 @@
}
/* Update the link, but return if there was an error */
- err = genphy_update_link(phydev);
+ err = ar40xx_update_link(phydev);
if (err)
return err;
@@ -559,7 +710,7 @@
static int qca807x_read_status(struct phy_device *phydev)
{
- int val;
+ int val, err;
/* Check for Combo port */
if (phy_read(phydev, QCA807X_CHIP_CONFIGURATION)) {
@@ -572,6 +723,11 @@
} else if ((val & QCA807X_MEDIA_DETECTED_1000_BASE_X) ||
(val & QCA807X_MEDIA_DETECTED_100_BASE_FX)) {
qca807x_read_fiber_status(phydev, true);
+ } else {
+ /* Update the link, but return if there was an error */
+ err = ar40xx_update_link(phydev);
+ if (err)
+ return err;
}
} else {
qca807x_read_copper_status(phydev, true);

View file

@ -0,0 +1,35 @@
Index: linux-5.4.137/drivers/usb/serial/option.c
===================================================================
--- linux-5.4.137.orig/drivers/usb/serial/option.c
+++ linux-5.4.137/drivers/usb/serial/option.c
@@ -241,6 +241,8 @@ static void option_instat_callback(struc
#define UBLOX_PRODUCT_R6XX 0x90fa
/* These Yuga products use Qualcomm's vendor ID */
#define YUGA_PRODUCT_CLM920_NC5 0x9625
+/* These Meiglink products use Qualcomm's vendor ID */
+#define MEIGLINK_PRODUCT_SLM750 0xf601
#define QUECTEL_VENDOR_ID 0x2c7c
/* These Quectel products use Quectel's vendor ID */
@@ -1102,6 +1104,9 @@ static const struct usb_device_id option
/* u-blox products using Qualcomm vendor ID */
{ USB_DEVICE(QUALCOMM_VENDOR_ID, UBLOX_PRODUCT_R410M),
.driver_info = RSVD(1) | RSVD(3) },
+ /* Meiglink products using Qualcomm vendor ID */
+ // Works OK in case of some issues check macros that are used by Quectel Products
+ { USB_DEVICE(QUALCOMM_VENDOR_ID, MEIGLINK_PRODUCT_SLM750)},
{ USB_DEVICE(QUALCOMM_VENDOR_ID, UBLOX_PRODUCT_R6XX),
.driver_info = RSVD(3) },
/* Quectel products using Quectel vendor ID */
Index: linux-5.4.137/drivers/net/usb/qmi_wwan.c
===================================================================
--- linux-5.4.137.orig/drivers/net/usb/qmi_wwan.c
+++ linux-5.4.137/drivers/net/usb/qmi_wwan.c
@@ -1171,6 +1171,7 @@ static const struct usb_device_id produc
{QMI_FIXED_INTF(0x05c6, 0x9079, 6)},
{QMI_FIXED_INTF(0x05c6, 0x9079, 7)},
{QMI_FIXED_INTF(0x05c6, 0x9079, 8)},
+ {QMI_MATCH_FF_FF_FF(0x05c6, 0xf601)}, /* Meiglink SLM750 (in case of issues check if DTR flag setting is enough) */
{QMI_FIXED_INTF(0x05c6, 0x9080, 5)},
{QMI_FIXED_INTF(0x05c6, 0x9080, 6)},
{QMI_FIXED_INTF(0x05c6, 0x9080, 7)},

View file

@ -0,0 +1,105 @@
--- a/drivers/spi/spi-qup.c
+++ b/drivers/spi/spi-qup.c
@@ -273,9 +273,6 @@
writel_relaxed(QUP_OP_IN_SERVICE_FLAG,
controller->base + QUP_OPERATIONAL);
- if (!remainder)
- goto exit;
-
if (is_block_mode) {
num_words = (remainder > words_per_block) ?
words_per_block : remainder;
@@ -305,13 +302,11 @@
* to refresh opflags value because MAX_INPUT_DONE_FLAG may now be
* present and this is used to determine if transaction is complete
*/
-exit:
- if (!remainder) {
- *opflags = readl_relaxed(controller->base + QUP_OPERATIONAL);
- if (is_block_mode && *opflags & QUP_OP_MAX_INPUT_DONE_FLAG)
- writel_relaxed(QUP_OP_IN_SERVICE_FLAG,
- controller->base + QUP_OPERATIONAL);
- }
+ *opflags = readl_relaxed(controller->base + QUP_OPERATIONAL);
+ if (is_block_mode && *opflags & QUP_OP_MAX_INPUT_DONE_FLAG)
+ writel_relaxed(QUP_OP_IN_SERVICE_FLAG,
+ controller->base + QUP_OPERATIONAL);
+
}
static void spi_qup_write_to_fifo(struct spi_qup *controller, u32 num_words)
@@ -358,10 +353,6 @@
/* ACK by clearing service flag */
writel_relaxed(QUP_OP_OUT_SERVICE_FLAG,
controller->base + QUP_OPERATIONAL);
-
- /* make sure the interrupt is valid */
- if (!remainder)
- return;
if (is_block_mode) {
num_words = (remainder > words_per_block) ?
@@ -576,24 +567,10 @@
return 0;
}
-static bool spi_qup_data_pending(struct spi_qup *controller)
-{
- unsigned int remainder_tx, remainder_rx;
-
- remainder_tx = DIV_ROUND_UP(spi_qup_len(controller) -
- controller->tx_bytes, controller->w_size);
-
- remainder_rx = DIV_ROUND_UP(spi_qup_len(controller) -
- controller->rx_bytes, controller->w_size);
-
- return remainder_tx || remainder_rx;
-}
-
static irqreturn_t spi_qup_qup_irq(int irq, void *dev_id)
{
struct spi_qup *controller = dev_id;
u32 opflags, qup_err, spi_err;
- unsigned long flags;
int error = 0;
qup_err = readl_relaxed(controller->base + QUP_ERROR_FLAGS);
@@ -625,11 +602,6 @@
error = -EIO;
}
- spin_lock_irqsave(&controller->lock, flags);
- if (!controller->error)
- controller->error = error;
- spin_unlock_irqrestore(&controller->lock, flags);
-
if (spi_qup_is_dma_xfer(controller->mode)) {
writel_relaxed(opflags, controller->base + QUP_OPERATIONAL);
} else {
@@ -638,21 +610,10 @@
if (opflags & QUP_OP_OUT_SERVICE_FLAG)
spi_qup_write(controller);
-
- if (!spi_qup_data_pending(controller))
- complete(&controller->done);
- }
-
- if (error)
+ }
+
+ if ((opflags & QUP_OP_MAX_INPUT_DONE_FLAG) || error)
complete(&controller->done);
-
- if (opflags & QUP_OP_MAX_INPUT_DONE_FLAG) {
- if (!spi_qup_is_dma_xfer(controller->mode)) {
- if (spi_qup_data_pending(controller))
- return IRQ_HANDLED;
- }
- complete(&controller->done);
- }
return IRQ_HANDLED;
}