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Remove bcm27xx 6.6 patches, it's now available upstream

This commit is contained in:
Ycarus (Yannick Chabanois) 2024-06-28 17:55:05 +02:00
parent 7bcffe1438
commit 752138e659
992 changed files with 0 additions and 320415 deletions

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@ -1,391 +0,0 @@
# CONFIG_AIO is not set
CONFIG_ALIGNMENT_TRAP=y
CONFIG_APERTURE_HELPERS=y
CONFIG_ARCH_32BIT_OFF_T=y
CONFIG_ARCH_BCM=y
CONFIG_ARCH_BCM2835=y
CONFIG_ARCH_HIBERNATION_POSSIBLE=y
CONFIG_ARCH_KEEP_MEMBLOCK=y
CONFIG_ARCH_MIGHT_HAVE_PC_PARPORT=y
CONFIG_ARCH_MULTIPLATFORM=y
CONFIG_ARCH_MULTI_V6=y
CONFIG_ARCH_MULTI_V6_V7=y
CONFIG_ARCH_NR_GPIO=0
CONFIG_ARCH_OPTIONAL_KERNEL_RWX=y
CONFIG_ARCH_SELECT_MEMORY_MODEL=y
CONFIG_ARCH_SPARSEMEM_ENABLE=y
CONFIG_ARCH_SUSPEND_POSSIBLE=y
CONFIG_ARM=y
CONFIG_ARM_AMBA=y
CONFIG_ARM_CPU_SUSPEND=y
CONFIG_ARM_ERRATA_411920=y
CONFIG_ARM_HAS_GROUP_RELOCS=y
CONFIG_ARM_L1_CACHE_SHIFT=5
# CONFIG_ARM_MHU_V2 is not set
CONFIG_ARM_PATCH_PHYS_VIRT=y
CONFIG_ARM_RASPBERRYPI_CPUFREQ=y
CONFIG_ARM_THUMB=y
CONFIG_ARM_TIMER_SP804=y
CONFIG_ARM_UNWIND=y
CONFIG_AUTO_ZRELADDR=y
CONFIG_BCM2708_VCMEM=y
# CONFIG_BCM2711_THERMAL is not set
CONFIG_BCM2835_FAST_MEMCPY=y
CONFIG_BCM2835_MBOX=y
CONFIG_BCM2835_POWER=y
# CONFIG_BCM2835_SMI is not set
CONFIG_BCM2835_THERMAL=y
CONFIG_BCM2835_TIMER=y
CONFIG_BCM2835_VCHIQ=y
# CONFIG_BCM2835_VCHIQ_MMAL is not set
CONFIG_BCM2835_WDT=y
CONFIG_BCM_VCIO=y
# CONFIG_BCM_VC_SM_CMA is not set
CONFIG_BCM_VIDEOCORE=y
CONFIG_BINFMT_FLAT_ARGVP_ENVP_ON_STACK=y
# CONFIG_BLK_DEV_INITRD is not set
CONFIG_BLK_DEV_LOOP=y
CONFIG_BLK_DEV_RAM=y
CONFIG_BLK_DEV_RAM_COUNT=16
CONFIG_BLK_DEV_RAM_SIZE=4096
CONFIG_BLK_DEV_SD=y
CONFIG_BLK_PM=y
CONFIG_BRCMSTB_L2_IRQ=y
CONFIG_BRCM_CHAR_DRIVERS=y
# CONFIG_CACHE_L2X0 is not set
CONFIG_CC_HAVE_STACKPROTECTOR_TLS=y
CONFIG_CC_IMPLICIT_FALLTHROUGH="-Wimplicit-fallthrough=5"
CONFIG_CC_NO_ARRAY_BOUNDS=y
CONFIG_CLKSRC_MMIO=y
CONFIG_CLK_BCM2711_DVP=y
CONFIG_CLK_BCM2835=y
CONFIG_CLK_RASPBERRYPI=y
CONFIG_CLONE_BACKWARDS=y
CONFIG_CMA=y
CONFIG_CMA_ALIGNMENT=8
CONFIG_CMA_AREAS=7
# CONFIG_CMA_DEBUG is not set
# CONFIG_CMA_DEBUGFS is not set
CONFIG_CMA_SIZE_MBYTES=5
# CONFIG_CMA_SIZE_SEL_MAX is not set
CONFIG_CMA_SIZE_SEL_MBYTES=y
# CONFIG_CMA_SIZE_SEL_MIN is not set
# CONFIG_CMA_SIZE_SEL_PERCENTAGE is not set
# CONFIG_CMA_SYSFS is not set
CONFIG_COMMON_CLK=y
CONFIG_COMPACT_UNEVICTABLE_DEFAULT=1
CONFIG_COMPAT_32BIT_TIME=y
CONFIG_CONFIGFS_FS=y
CONFIG_CONSOLE_TRANSLATIONS=y
CONFIG_CONTIG_ALLOC=y
CONFIG_CPUFREQ_DT=y
CONFIG_CPUFREQ_DT_PLATDEV=y
CONFIG_CPU_32v6=y
CONFIG_CPU_32v6K=y
CONFIG_CPU_ABRT_EV6=y
CONFIG_CPU_CACHE_V6=y
CONFIG_CPU_CACHE_VIPT=y
CONFIG_CPU_COPY_V6=y
CONFIG_CPU_CP15=y
CONFIG_CPU_CP15_MMU=y
CONFIG_CPU_FREQ=y
CONFIG_CPU_FREQ_DEFAULT_GOV_ONDEMAND=y
# CONFIG_CPU_FREQ_DEFAULT_GOV_PERFORMANCE is not set
CONFIG_CPU_FREQ_GOV_ATTR_SET=y
CONFIG_CPU_FREQ_GOV_COMMON=y
CONFIG_CPU_FREQ_GOV_CONSERVATIVE=y
CONFIG_CPU_FREQ_GOV_ONDEMAND=y
CONFIG_CPU_FREQ_GOV_PERFORMANCE=y
CONFIG_CPU_FREQ_GOV_POWERSAVE=y
CONFIG_CPU_FREQ_GOV_USERSPACE=y
CONFIG_CPU_FREQ_STAT=y
CONFIG_CPU_HAS_ASID=y
CONFIG_CPU_IDLE=y
CONFIG_CPU_IDLE_GOV_LADDER=y
CONFIG_CPU_IDLE_GOV_MENU=y
CONFIG_CPU_LITTLE_ENDIAN=y
CONFIG_CPU_PABRT_V6=y
CONFIG_CPU_PM=y
CONFIG_CPU_THUMB_CAPABLE=y
CONFIG_CPU_TLB_V6=y
CONFIG_CPU_V6K=y
CONFIG_CRC16=y
CONFIG_CRYPTO_CRC32=y
CONFIG_CRYPTO_CRC32C=y
CONFIG_CRYPTO_LIB_BLAKE2S_GENERIC=y
CONFIG_CRYPTO_LIB_SHA1=y
CONFIG_CRYPTO_LIB_UTILS=y
CONFIG_CRYPTO_RNG2=y
CONFIG_CURRENT_POINTER_IN_TPIDRURO=y
CONFIG_DCACHE_WORD_ACCESS=y
CONFIG_DEBUG_BUGVERBOSE=y
CONFIG_DEBUG_INFO=y
CONFIG_DEBUG_LL_INCLUDE="mach/debug-macro.S"
CONFIG_DMABUF_HEAPS=y
CONFIG_DMABUF_HEAPS_CMA=y
CONFIG_DMABUF_HEAPS_SYSTEM=y
CONFIG_DMADEVICES=y
CONFIG_DMA_BCM2708=y
CONFIG_DMA_BCM2835=y
CONFIG_DMA_CMA=y
CONFIG_DMA_ENGINE=y
CONFIG_DMA_OF=y
CONFIG_DMA_OPS=y
CONFIG_DMA_SHARED_BUFFER=y
CONFIG_DMA_VIRTUAL_CHANNELS=y
CONFIG_DNOTIFY=y
CONFIG_DTC=y
CONFIG_DUMMY_CONSOLE=y
CONFIG_EDAC_ATOMIC_SCRUB=y
CONFIG_EDAC_SUPPORT=y
CONFIG_EXCLUSIVE_SYSTEM_RAM=y
CONFIG_EXT4_FS=y
CONFIG_EXT4_FS_POSIX_ACL=y
CONFIG_EXT4_FS_SECURITY=y
CONFIG_EXTCON=y
CONFIG_F2FS_FS=y
CONFIG_FB=y
CONFIG_FB_BCM2708=y
CONFIG_FB_CFB_COPYAREA=y
CONFIG_FB_CFB_FILLRECT=y
CONFIG_FB_CFB_IMAGEBLIT=y
CONFIG_FB_CMDLINE=y
CONFIG_FB_SIMPLE=y
CONFIG_FIQ=y
CONFIG_FIXED_PHY=y
CONFIG_FIX_EARLYCON_MEM=y
CONFIG_FONT_8x16=y
CONFIG_FONT_8x8=y
CONFIG_FONT_SUPPORT=y
CONFIG_FRAMEBUFFER_CONSOLE=y
# CONFIG_FRAMEBUFFER_CONSOLE_DETECT_PRIMARY is not set
CONFIG_FRAMEBUFFER_CONSOLE_ROTATION=y
CONFIG_FREEZER=y
CONFIG_FS_IOMAP=y
CONFIG_FS_MBCACHE=y
CONFIG_FS_POSIX_ACL=y
CONFIG_FWNODE_MDIO=y
CONFIG_FW_CACHE=y
CONFIG_FW_LOADER_PAGED_BUF=y
CONFIG_FW_LOADER_SYSFS=y
CONFIG_GCC11_NO_ARRAY_BOUNDS=y
CONFIG_GENERIC_ALLOCATOR=y
CONFIG_GENERIC_BUG=y
CONFIG_GENERIC_CLOCKEVENTS=y
CONFIG_GENERIC_CPU_AUTOPROBE=y
CONFIG_GENERIC_EARLY_IOREMAP=y
CONFIG_GENERIC_IDLE_POLL_SETUP=y
CONFIG_GENERIC_IRQ_CHIP=y
CONFIG_GENERIC_IRQ_MULTI_HANDLER=y
CONFIG_GENERIC_IRQ_SHOW=y
CONFIG_GENERIC_IRQ_SHOW_LEVEL=y
CONFIG_GENERIC_LIB_DEVMEM_IS_ALLOWED=y
CONFIG_GENERIC_PCI_IOMAP=y
CONFIG_GENERIC_PINCONF=y
CONFIG_GENERIC_PINCTRL_GROUPS=y
CONFIG_GENERIC_PINMUX_FUNCTIONS=y
CONFIG_GENERIC_SCHED_CLOCK=y
CONFIG_GENERIC_SMP_IDLE_THREAD=y
CONFIG_GENERIC_STRNCPY_FROM_USER=y
CONFIG_GENERIC_STRNLEN_USER=y
CONFIG_GPIOLIB_IRQCHIP=y
# CONFIG_GPIO_BCM_VIRT is not set
CONFIG_GPIO_CDEV=y
# CONFIG_GPIO_FSM is not set
CONFIG_GPIO_RASPBERRYPI_EXP=y
CONFIG_HARDIRQS_SW_RESEND=y
CONFIG_HAS_DMA=y
CONFIG_HAS_IOMEM=y
CONFIG_HAS_IOPORT_MAP=y
CONFIG_HW_CONSOLE=y
CONFIG_HW_RANDOM=y
CONFIG_HW_RANDOM_BCM2835=y
CONFIG_HZ_FIXED=0
CONFIG_I2C=y
# CONFIG_I2C_BCM2708 is not set
CONFIG_I2C_BOARDINFO=y
CONFIG_INPUT=y
CONFIG_INPUT_MOUSEDEV=y
# CONFIG_INPUT_MOUSEDEV_PSAUX is not set
CONFIG_INPUT_MOUSEDEV_SCREEN_X=1024
CONFIG_INPUT_MOUSEDEV_SCREEN_Y=768
CONFIG_IRQCHIP=y
CONFIG_IRQSTACKS=y
CONFIG_IRQ_DOMAIN=y
CONFIG_IRQ_FORCED_THREADING=y
CONFIG_IRQ_WORK=y
CONFIG_JBD2=y
CONFIG_KERNEL_GZIP=y
# CONFIG_KERNEL_XZ is not set
CONFIG_LEDS_GPIO=y
CONFIG_LEDS_PWM=y
CONFIG_LEDS_TRIGGER_ACTPWR=y
CONFIG_LEDS_TRIGGER_INPUT=y
CONFIG_LIBFDT=y
CONFIG_LOCK_DEBUGGING_SUPPORT=y
CONFIG_LOGO=y
CONFIG_LOGO_LINUX_CLUT224=y
# CONFIG_LOGO_LINUX_MONO is not set
# CONFIG_LOGO_LINUX_VGA16 is not set
CONFIG_MAC_PARTITION=y
CONFIG_MAGIC_SYSRQ=y
CONFIG_MAILBOX=y
# CONFIG_MAILBOX_TEST is not set
CONFIG_MDIO_BUS=y
CONFIG_MDIO_DEVICE=y
CONFIG_MDIO_DEVRES=y
CONFIG_MEDIA_CAMERA_SUPPORT=y
CONFIG_MEDIA_CONTROLLER=y
CONFIG_MEDIA_PLATFORM_DRIVERS=y
CONFIG_MEDIA_PLATFORM_SUPPORT=y
CONFIG_MEDIA_SUPPORT=y
CONFIG_MEDIA_SUPPORT_FILTER=y
CONFIG_MEMFD_CREATE=y
CONFIG_MEMORY_ISOLATION=y
CONFIG_MFD_CORE=y
CONFIG_MFD_SYSCON=y
CONFIG_MIGHT_HAVE_CACHE_L2X0=y
CONFIG_MIGRATION=y
CONFIG_MMC=y
# CONFIG_MMC_BCM2835 is not set
CONFIG_MMC_BCM2835_DMA=y
CONFIG_MMC_BCM2835_MMC=y
CONFIG_MMC_BCM2835_PIO_DMA_BARRIER=2
CONFIG_MMC_BCM2835_SDHOST=y
CONFIG_MMC_BLOCK=y
CONFIG_MMC_BLOCK_MINORS=32
CONFIG_MMC_SDHCI=y
CONFIG_MMC_SDHCI_PLTFM=y
CONFIG_MODULES_USE_ELF_REL=y
# CONFIG_MTD is not set
CONFIG_NEED_DMA_MAP_STATE=y
CONFIG_NEED_PER_CPU_KM=y
CONFIG_NET_SELFTESTS=y
CONFIG_NLS=y
CONFIG_NLS_ASCII=y
CONFIG_NOP_USB_XCEIV=y
CONFIG_NO_HZ=y
CONFIG_NO_HZ_COMMON=y
CONFIG_NO_HZ_IDLE=y
CONFIG_NVMEM=y
CONFIG_NVMEM_LAYOUTS=y
CONFIG_OF=y
CONFIG_OF_ADDRESS=y
CONFIG_OF_CONFIGFS=y
CONFIG_OF_DYNAMIC=y
CONFIG_OF_EARLY_FLATTREE=y
CONFIG_OF_FLATTREE=y
CONFIG_OF_GPIO=y
CONFIG_OF_IRQ=y
CONFIG_OF_KOBJ=y
CONFIG_OF_MDIO=y
CONFIG_OF_OVERLAY=y
CONFIG_OF_RESOLVE=y
CONFIG_OLD_SIGACTION=y
CONFIG_OLD_SIGSUSPEND3=y
CONFIG_PAGE_OFFSET=0xC0000000
CONFIG_PAGE_POOL=y
CONFIG_PAGE_SIZE_LESS_THAN_256KB=y
CONFIG_PAGE_SIZE_LESS_THAN_64KB=y
CONFIG_PERF_USE_VMALLOC=y
CONFIG_PGTABLE_LEVELS=2
CONFIG_PHYLIB=y
CONFIG_PINCTRL=y
CONFIG_PINCTRL_BCM2835=y
CONFIG_PM=y
CONFIG_PM_CLK=y
CONFIG_PM_GENERIC_DOMAINS=y
CONFIG_PM_GENERIC_DOMAINS_OF=y
CONFIG_PM_GENERIC_DOMAINS_SLEEP=y
CONFIG_PM_OPP=y
CONFIG_PM_SLEEP=y
CONFIG_POWER_SUPPLY=y
CONFIG_PREEMPT_NONE_BUILD=y
CONFIG_PRINTK_TIME=y
CONFIG_PTP_1588_CLOCK_OPTIONAL=y
CONFIG_PWM=y
CONFIG_PWM_BCM2835=y
CONFIG_PWM_SYSFS=y
CONFIG_RANDSTRUCT_NONE=y
CONFIG_RASPBERRYPI_FIRMWARE=y
CONFIG_RASPBERRYPI_GPIOMEM=y
CONFIG_RASPBERRYPI_POWER=y
CONFIG_RATIONAL=y
# CONFIG_RAVE_SP_CORE is not set
CONFIG_REGMAP=y
CONFIG_REGMAP_MMIO=y
CONFIG_REGULATOR=y
CONFIG_REGULATOR_FIXED_VOLTAGE=y
CONFIG_RESET_CONTROLLER=y
# CONFIG_RESET_RASPBERRYPI is not set
CONFIG_RESET_SIMPLE=y
# CONFIG_RPIVID_MEM is not set
# CONFIG_RPI_POE_POWER is not set
CONFIG_SCSI=y
CONFIG_SCSI_COMMON=y
# CONFIG_SCSI_LOWLEVEL is not set
# CONFIG_SCSI_PROC_FS is not set
CONFIG_SERIAL_8250_BCM2835AUX=y
# CONFIG_SERIAL_8250_DMA is not set
CONFIG_SERIAL_8250_EXTENDED=y
CONFIG_SERIAL_8250_FSL=y
CONFIG_SERIAL_8250_NR_UARTS=1
CONFIG_SERIAL_8250_RUNTIME_UARTS=0
CONFIG_SERIAL_8250_SHARE_IRQ=y
CONFIG_SERIAL_AMBA_PL011=y
CONFIG_SERIAL_AMBA_PL011_CONSOLE=y
CONFIG_SERIAL_DEV_BUS=y
# CONFIG_SERIAL_DEV_CTRL_TTYPORT is not set
CONFIG_SERIAL_MCTRL_GPIO=y
CONFIG_SERIAL_OF_PLATFORM=y
CONFIG_SG_POOL=y
CONFIG_SMSC_PHY=y
CONFIG_SOFTIRQ_ON_OWN_STACK=y
CONFIG_SPARSE_IRQ=y
CONFIG_SRCU=y
# CONFIG_STRIP_ASM_SYMS is not set
CONFIG_SUSPEND=y
CONFIG_SUSPEND_FREEZER=y
CONFIG_SWPHY=y
CONFIG_SYS_SUPPORTS_APM_EMULATION=y
# CONFIG_TEXTSEARCH is not set
CONFIG_THERMAL=y
CONFIG_THERMAL_DEFAULT_GOV_STEP_WISE=y
CONFIG_THERMAL_EMERGENCY_POWEROFF_DELAY_MS=0
CONFIG_THERMAL_GOV_STEP_WISE=y
CONFIG_THERMAL_OF=y
CONFIG_THREAD_INFO_IN_TASK=y
CONFIG_TICK_CPU_ACCOUNTING=y
CONFIG_TIMER_OF=y
CONFIG_TIMER_PROBE=y
CONFIG_TINY_SRCU=y
CONFIG_TMPFS_POSIX_ACL=y
CONFIG_UEVENT_HELPER_PATH=""
# CONFIG_UID16 is not set
CONFIG_UNCOMPRESS_INCLUDE="debug/uncompress.h"
CONFIG_UNWINDER_ARM=y
CONFIG_USB=y
CONFIG_USB_ANNOUNCE_NEW_DEVICES=y
CONFIG_USB_COMMON=y
CONFIG_USB_DWCOTG=y
CONFIG_USB_NET_DRIVERS=y
CONFIG_USB_NET_SMSC95XX=y
CONFIG_USB_PHY=y
CONFIG_USB_STORAGE=y
CONFIG_USB_SUPPORT=y
CONFIG_USB_UAS=y
CONFIG_USB_USBNET=y
CONFIG_USE_OF=y
CONFIG_VCHIQ_CDEV=y
CONFIG_VFP=y
CONFIG_VIDEO_DEV=y
CONFIG_VIDEO_V4L2_I2C=y
CONFIG_VT=y
CONFIG_VT_CONSOLE=y
CONFIG_VT_CONSOLE_SLEEP=y
CONFIG_VT_HW_CONSOLE_BINDING=y
CONFIG_WATCHDOG_CORE=y
CONFIG_XZ_DEC_ARM=y
CONFIG_XZ_DEC_BCJ=y
CONFIG_ZBOOT_ROM_BSS=0x0
CONFIG_ZBOOT_ROM_TEXT=0x0

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@ -1,493 +0,0 @@
# CONFIG_AIO is not set
CONFIG_ALIGNMENT_TRAP=y
CONFIG_APERTURE_HELPERS=y
CONFIG_ARCH_32BIT_OFF_T=y
CONFIG_ARCH_BCM=y
CONFIG_ARCH_BCM2835=y
CONFIG_ARCH_DMA_ADDR_T_64BIT=y
CONFIG_ARCH_HIBERNATION_POSSIBLE=y
CONFIG_ARCH_KEEP_MEMBLOCK=y
CONFIG_ARCH_MIGHT_HAVE_PC_PARPORT=y
CONFIG_ARCH_MULTIPLATFORM=y
CONFIG_ARCH_MULTI_V6_V7=y
CONFIG_ARCH_MULTI_V7=y
CONFIG_ARCH_NR_GPIO=0
CONFIG_ARCH_OPTIONAL_KERNEL_RWX=y
CONFIG_ARCH_OPTIONAL_KERNEL_RWX_DEFAULT=y
CONFIG_ARCH_SELECT_MEMORY_MODEL=y
CONFIG_ARCH_SPARSEMEM_ENABLE=y
CONFIG_ARCH_SUSPEND_POSSIBLE=y
CONFIG_ARM=y
CONFIG_ARM_AMBA=y
CONFIG_ARM_ARCH_TIMER=y
CONFIG_ARM_ARCH_TIMER_EVTSTREAM=y
CONFIG_ARM_CPU_SUSPEND=y
CONFIG_ARM_GIC=y
CONFIG_ARM_HAS_GROUP_RELOCS=y
CONFIG_ARM_L1_CACHE_SHIFT=6
CONFIG_ARM_L1_CACHE_SHIFT_6=y
CONFIG_ARM_LPAE=y
# CONFIG_ARM_MHU_V2 is not set
CONFIG_ARM_PATCH_IDIV=y
CONFIG_ARM_PATCH_PHYS_VIRT=y
CONFIG_ARM_RASPBERRYPI_CPUFREQ=y
CONFIG_ARM_THUMB=y
CONFIG_ARM_TIMER_SP804=y
CONFIG_ARM_UNWIND=y
CONFIG_ARM_VIRT_EXT=y
CONFIG_ASSOCIATIVE_ARRAY=y
CONFIG_AUTO_ZRELADDR=y
CONFIG_BCM2708_VCMEM=y
CONFIG_BCM2711_THERMAL=y
CONFIG_BCM2835_MBOX=y
CONFIG_BCM2835_POWER=y
# CONFIG_BCM2835_SMI is not set
CONFIG_BCM2835_THERMAL=y
CONFIG_BCM2835_TIMER=y
CONFIG_BCM2835_VCHIQ=y
# CONFIG_BCM2835_VCHIQ_MMAL is not set
CONFIG_BCM2835_WDT=y
CONFIG_BCM7XXX_PHY=y
CONFIG_BCMGENET=y
CONFIG_BCM_NET_PHYLIB=y
CONFIG_BCM_VCIO=y
# CONFIG_BCM_VC_SM_CMA is not set
CONFIG_BCM_VIDEOCORE=y
CONFIG_BINFMT_FLAT_ARGVP_ENVP_ON_STACK=y
# CONFIG_BLK_DEV_INITRD is not set
CONFIG_BLK_DEV_LOOP=y
CONFIG_BLK_DEV_RAM=y
CONFIG_BLK_DEV_RAM_COUNT=16
CONFIG_BLK_DEV_RAM_SIZE=4096
CONFIG_BLK_DEV_SD=y
CONFIG_BLK_MQ_PCI=y
CONFIG_BLK_PM=y
CONFIG_BOUNCE=y
CONFIG_BRCMSTB_L2_IRQ=y
CONFIG_BRCM_CHAR_DRIVERS=y
CONFIG_BROADCOM_PHY=y
# CONFIG_CACHE_L2X0 is not set
CONFIG_CC_HAVE_STACKPROTECTOR_TLS=y
CONFIG_CC_IMPLICIT_FALLTHROUGH="-Wimplicit-fallthrough=5"
CONFIG_CC_NO_ARRAY_BOUNDS=y
CONFIG_CLKSRC_MMIO=y
CONFIG_CLK_BCM2711_DVP=y
CONFIG_CLK_BCM2835=y
CONFIG_CLK_RASPBERRYPI=y
CONFIG_CLONE_BACKWARDS=y
CONFIG_CMA=y
CONFIG_CMA_ALIGNMENT=8
CONFIG_CMA_AREAS=7
# CONFIG_CMA_DEBUG is not set
# CONFIG_CMA_DEBUGFS is not set
CONFIG_CMA_SIZE_MBYTES=5
# CONFIG_CMA_SIZE_SEL_MAX is not set
CONFIG_CMA_SIZE_SEL_MBYTES=y
# CONFIG_CMA_SIZE_SEL_MIN is not set
# CONFIG_CMA_SIZE_SEL_PERCENTAGE is not set
# CONFIG_CMA_SYSFS is not set
CONFIG_COMMON_CLK=y
CONFIG_COMPACT_UNEVICTABLE_DEFAULT=1
CONFIG_COMPAT_32BIT_TIME=y
CONFIG_CONFIGFS_FS=y
CONFIG_CONSOLE_TRANSLATIONS=y
CONFIG_CONTEXT_TRACKING=y
CONFIG_CONTEXT_TRACKING_IDLE=y
CONFIG_CONTIG_ALLOC=y
CONFIG_CPUFREQ_DT=y
CONFIG_CPUFREQ_DT_PLATDEV=y
CONFIG_CPU_32v6K=y
CONFIG_CPU_32v7=y
CONFIG_CPU_ABRT_EV7=y
CONFIG_CPU_CACHE_V7=y
CONFIG_CPU_CACHE_VIPT=y
CONFIG_CPU_COPY_V6=y
CONFIG_CPU_CP15=y
CONFIG_CPU_CP15_MMU=y
CONFIG_CPU_FREQ=y
CONFIG_CPU_FREQ_DEFAULT_GOV_ONDEMAND=y
# CONFIG_CPU_FREQ_DEFAULT_GOV_PERFORMANCE is not set
CONFIG_CPU_FREQ_GOV_ATTR_SET=y
CONFIG_CPU_FREQ_GOV_COMMON=y
CONFIG_CPU_FREQ_GOV_CONSERVATIVE=y
CONFIG_CPU_FREQ_GOV_ONDEMAND=y
CONFIG_CPU_FREQ_GOV_PERFORMANCE=y
CONFIG_CPU_FREQ_GOV_POWERSAVE=y
CONFIG_CPU_FREQ_GOV_SCHEDUTIL=y
CONFIG_CPU_FREQ_GOV_USERSPACE=y
CONFIG_CPU_FREQ_STAT=y
CONFIG_CPU_HAS_ASID=y
CONFIG_CPU_IDLE=y
CONFIG_CPU_IDLE_GOV_LADDER=y
CONFIG_CPU_IDLE_GOV_MENU=y
CONFIG_CPU_LITTLE_ENDIAN=y
CONFIG_CPU_PABRT_V7=y
CONFIG_CPU_PM=y
CONFIG_CPU_RMAP=y
CONFIG_CPU_SPECTRE=y
CONFIG_CPU_THUMB_CAPABLE=y
CONFIG_CPU_TLB_V7=y
CONFIG_CPU_V7=y
CONFIG_CRC16=y
CONFIG_CRYPTO_CBC=y
CONFIG_CRYPTO_CRC32=y
CONFIG_CRYPTO_CRC32C=y
CONFIG_CRYPTO_CTS=y
CONFIG_CRYPTO_DRBG=y
CONFIG_CRYPTO_DRBG_HMAC=y
CONFIG_CRYPTO_DRBG_MENU=y
CONFIG_CRYPTO_ECB=y
CONFIG_CRYPTO_HMAC=y
CONFIG_CRYPTO_JITTERENTROPY=y
CONFIG_CRYPTO_LIB_BLAKE2S_GENERIC=y
CONFIG_CRYPTO_LIB_SHA1=y
CONFIG_CRYPTO_LIB_SHA256=y
CONFIG_CRYPTO_LIB_UTILS=y
CONFIG_CRYPTO_RNG=y
CONFIG_CRYPTO_RNG2=y
CONFIG_CRYPTO_RNG_DEFAULT=y
CONFIG_CRYPTO_SEQIV=y
CONFIG_CRYPTO_SHA256=y
CONFIG_CRYPTO_SHA512=y
CONFIG_CRYPTO_XTS=y
CONFIG_CURRENT_POINTER_IN_TPIDRURO=y
CONFIG_DCACHE_WORD_ACCESS=y
CONFIG_DEBUG_BUGVERBOSE=y
CONFIG_DEBUG_INFO=y
CONFIG_DEBUG_LL_INCLUDE="mach/debug-macro.S"
CONFIG_DIMLIB=y
CONFIG_DMABUF_HEAPS=y
CONFIG_DMABUF_HEAPS_CMA=y
CONFIG_DMABUF_HEAPS_SYSTEM=y
CONFIG_DMADEVICES=y
CONFIG_DMA_BCM2708=y
CONFIG_DMA_BCM2835=y
CONFIG_DMA_CMA=y
CONFIG_DMA_ENGINE=y
CONFIG_DMA_OF=y
CONFIG_DMA_OPS=y
CONFIG_DMA_SHARED_BUFFER=y
CONFIG_DMA_VIRTUAL_CHANNELS=y
CONFIG_DNOTIFY=y
CONFIG_DTC=y
CONFIG_DUMMY_CONSOLE=y
CONFIG_EDAC_ATOMIC_SCRUB=y
CONFIG_EDAC_SUPPORT=y
CONFIG_EXCLUSIVE_SYSTEM_RAM=y
CONFIG_EXT4_FS=y
CONFIG_EXT4_FS_POSIX_ACL=y
CONFIG_EXT4_FS_SECURITY=y
CONFIG_EXTCON=y
CONFIG_F2FS_FS=y
CONFIG_FB=y
CONFIG_FB_BCM2708=y
CONFIG_FB_CFB_COPYAREA=y
CONFIG_FB_CFB_FILLRECT=y
CONFIG_FB_CFB_IMAGEBLIT=y
CONFIG_FB_CMDLINE=y
CONFIG_FB_SIMPLE=y
CONFIG_FIQ=y
CONFIG_FIXED_PHY=y
CONFIG_FIX_EARLYCON_MEM=y
CONFIG_FONT_8x16=y
CONFIG_FONT_8x8=y
CONFIG_FONT_SUPPORT=y
CONFIG_FRAMEBUFFER_CONSOLE=y
# CONFIG_FRAMEBUFFER_CONSOLE_DETECT_PRIMARY is not set
CONFIG_FRAMEBUFFER_CONSOLE_ROTATION=y
CONFIG_FREEZER=y
CONFIG_FS_ENCRYPTION=y
CONFIG_FS_ENCRYPTION_ALGS=y
CONFIG_FS_IOMAP=y
CONFIG_FS_MBCACHE=y
CONFIG_FS_POSIX_ACL=y
CONFIG_FWNODE_MDIO=y
CONFIG_FW_CACHE=y
CONFIG_FW_LOADER_PAGED_BUF=y
CONFIG_FW_LOADER_SYSFS=y
CONFIG_GCC11_NO_ARRAY_BOUNDS=y
CONFIG_GENERIC_ALLOCATOR=y
CONFIG_GENERIC_ARCH_TOPOLOGY=y
CONFIG_GENERIC_BUG=y
CONFIG_GENERIC_CLOCKEVENTS=y
CONFIG_GENERIC_CLOCKEVENTS_BROADCAST=y
CONFIG_GENERIC_CPU_AUTOPROBE=y
CONFIG_GENERIC_CPU_VULNERABILITIES=y
CONFIG_GENERIC_EARLY_IOREMAP=y
CONFIG_GENERIC_GETTIMEOFDAY=y
CONFIG_GENERIC_IDLE_POLL_SETUP=y
CONFIG_GENERIC_IRQ_CHIP=y
CONFIG_GENERIC_IRQ_EFFECTIVE_AFF_MASK=y
CONFIG_GENERIC_IRQ_MIGRATION=y
CONFIG_GENERIC_IRQ_MULTI_HANDLER=y
CONFIG_GENERIC_IRQ_SHOW=y
CONFIG_GENERIC_IRQ_SHOW_LEVEL=y
CONFIG_GENERIC_LIB_DEVMEM_IS_ALLOWED=y
CONFIG_GENERIC_MSI_IRQ=y
CONFIG_GENERIC_MSI_IRQ_DOMAIN=y
CONFIG_GENERIC_PCI_IOMAP=y
CONFIG_GENERIC_PHY=y
CONFIG_GENERIC_PINCONF=y
CONFIG_GENERIC_PINCTRL_GROUPS=y
CONFIG_GENERIC_PINMUX_FUNCTIONS=y
CONFIG_GENERIC_SCHED_CLOCK=y
CONFIG_GENERIC_SMP_IDLE_THREAD=y
CONFIG_GENERIC_STRNCPY_FROM_USER=y
CONFIG_GENERIC_STRNLEN_USER=y
CONFIG_GENERIC_TIME_VSYSCALL=y
CONFIG_GENERIC_VDSO_32=y
CONFIG_GPIOLIB_IRQCHIP=y
CONFIG_GPIO_BCM_VIRT=y
CONFIG_GPIO_CDEV=y
# CONFIG_GPIO_FSM is not set
CONFIG_GPIO_RASPBERRYPI_EXP=y
# CONFIG_HARDEN_BRANCH_HISTORY is not set
# CONFIG_HARDEN_BRANCH_PREDICTOR is not set
CONFIG_HARDIRQS_SW_RESEND=y
CONFIG_HAS_DMA=y
CONFIG_HAS_IOMEM=y
CONFIG_HAS_IOPORT_MAP=y
CONFIG_HAVE_SMP=y
CONFIG_HIGHMEM=y
CONFIG_HIGHPTE=y
CONFIG_HOTPLUG_CPU=y
CONFIG_HW_CONSOLE=y
CONFIG_HW_RANDOM=y
CONFIG_HW_RANDOM_BCM2835=y
CONFIG_HW_RANDOM_IPROC_RNG200=y
CONFIG_HZ_FIXED=0
CONFIG_I2C=y
# CONFIG_I2C_BCM2708 is not set
CONFIG_I2C_BOARDINFO=y
CONFIG_INPUT=y
CONFIG_INPUT_MOUSEDEV=y
# CONFIG_INPUT_MOUSEDEV_PSAUX is not set
CONFIG_INPUT_MOUSEDEV_SCREEN_X=1024
CONFIG_INPUT_MOUSEDEV_SCREEN_Y=768
CONFIG_IRQCHIP=y
CONFIG_IRQSTACKS=y
CONFIG_IRQ_DOMAIN=y
CONFIG_IRQ_DOMAIN_HIERARCHY=y
CONFIG_IRQ_FORCED_THREADING=y
CONFIG_IRQ_WORK=y
CONFIG_JBD2=y
CONFIG_KEYS=y
CONFIG_KMAP_LOCAL=y
CONFIG_KMAP_LOCAL_NON_LINEAR_PTE_ARRAY=y
CONFIG_LEDS_GPIO=y
CONFIG_LEDS_PWM=y
CONFIG_LEDS_TRIGGER_ACTPWR=y
CONFIG_LEDS_TRIGGER_INPUT=y
CONFIG_LIBFDT=y
CONFIG_LOCK_DEBUGGING_SUPPORT=y
CONFIG_LOCK_SPIN_ON_OWNER=y
CONFIG_LOGO=y
CONFIG_LOGO_LINUX_CLUT224=y
# CONFIG_LOGO_LINUX_MONO is not set
# CONFIG_LOGO_LINUX_VGA16 is not set
CONFIG_MAC_PARTITION=y
CONFIG_MAGIC_SYSRQ=y
CONFIG_MAILBOX=y
# CONFIG_MAILBOX_TEST is not set
CONFIG_MDIO_BCM_UNIMAC=y
CONFIG_MDIO_BUS=y
CONFIG_MDIO_DEVICE=y
CONFIG_MDIO_DEVRES=y
CONFIG_MEDIA_CAMERA_SUPPORT=y
CONFIG_MEDIA_CONTROLLER=y
CONFIG_MEDIA_PLATFORM_DRIVERS=y
CONFIG_MEDIA_PLATFORM_SUPPORT=y
CONFIG_MEDIA_SUPPORT=y
CONFIG_MEDIA_SUPPORT_FILTER=y
CONFIG_MEMFD_CREATE=y
CONFIG_MEMORY_ISOLATION=y
CONFIG_MFD_CORE=y
CONFIG_MFD_SYSCON=y
CONFIG_MICROCHIP_PHY=y
CONFIG_MIGHT_HAVE_CACHE_L2X0=y
CONFIG_MIGRATION=y
CONFIG_MMC=y
# CONFIG_MMC_BCM2835 is not set
CONFIG_MMC_BCM2835_DMA=y
CONFIG_MMC_BCM2835_MMC=y
CONFIG_MMC_BCM2835_PIO_DMA_BARRIER=2
CONFIG_MMC_BCM2835_SDHOST=y
CONFIG_MMC_BLOCK=y
CONFIG_MMC_BLOCK_MINORS=32
CONFIG_MMC_SDHCI=y
CONFIG_MMC_SDHCI_IO_ACCESSORS=y
CONFIG_MMC_SDHCI_IPROC=y
# CONFIG_MMC_SDHCI_PCI is not set
CONFIG_MMC_SDHCI_PLTFM=y
CONFIG_MODULES_USE_ELF_REL=y
# CONFIG_MTD is not set
CONFIG_MUTEX_SPIN_ON_OWNER=y
CONFIG_NEED_DMA_MAP_STATE=y
CONFIG_NEON=y
CONFIG_NET_FLOW_LIMIT=y
CONFIG_NET_PTP_CLASSIFY=y
CONFIG_NET_SELFTESTS=y
CONFIG_NLS=y
CONFIG_NLS_ASCII=y
CONFIG_NOP_USB_XCEIV=y
CONFIG_NO_HZ=y
CONFIG_NO_HZ_COMMON=y
CONFIG_NO_HZ_IDLE=y
CONFIG_NR_CPUS=4
CONFIG_NVMEM=y
CONFIG_NVMEM_LAYOUTS=y
CONFIG_OF=y
CONFIG_OF_ADDRESS=y
CONFIG_OF_CONFIGFS=y
CONFIG_OF_DYNAMIC=y
CONFIG_OF_EARLY_FLATTREE=y
CONFIG_OF_FLATTREE=y
CONFIG_OF_GPIO=y
CONFIG_OF_IRQ=y
CONFIG_OF_KOBJ=y
CONFIG_OF_MDIO=y
CONFIG_OF_OVERLAY=y
CONFIG_OF_RESOLVE=y
CONFIG_OLD_SIGACTION=y
CONFIG_OLD_SIGSUSPEND3=y
CONFIG_PADATA=y
CONFIG_PAGE_OFFSET=0xC0000000
CONFIG_PAGE_POOL=y
CONFIG_PAGE_SIZE_LESS_THAN_256KB=y
CONFIG_PAGE_SIZE_LESS_THAN_64KB=y
CONFIG_PCI=y
CONFIG_PCIEAER=y
CONFIG_PCIEPORTBUS=y
CONFIG_PCIE_BRCMSTB=y
CONFIG_PCIE_PME=y
CONFIG_PCI_DOMAINS=y
CONFIG_PCI_DOMAINS_GENERIC=y
CONFIG_PCI_MSI=y
CONFIG_PCI_MSI_IRQ_DOMAIN=y
CONFIG_PERF_USE_VMALLOC=y
CONFIG_PGTABLE_LEVELS=3
CONFIG_PHYLIB=y
CONFIG_PHYS_ADDR_T_64BIT=y
CONFIG_PINCTRL=y
CONFIG_PINCTRL_BCM2835=y
CONFIG_PM=y
CONFIG_PM_CLK=y
CONFIG_PM_GENERIC_DOMAINS=y
CONFIG_PM_GENERIC_DOMAINS_OF=y
CONFIG_PM_GENERIC_DOMAINS_SLEEP=y
CONFIG_PM_OPP=y
CONFIG_PM_SLEEP=y
CONFIG_PM_SLEEP_SMP=y
CONFIG_POWER_SUPPLY=y
CONFIG_PPS=y
CONFIG_PREEMPT_NONE_BUILD=y
CONFIG_PRINTK_TIME=y
CONFIG_PTP_1588_CLOCK=y
CONFIG_PTP_1588_CLOCK_OPTIONAL=y
CONFIG_PWM=y
CONFIG_PWM_BCM2835=y
CONFIG_PWM_SYSFS=y
CONFIG_RANDSTRUCT_NONE=y
CONFIG_RAS=y
CONFIG_RASPBERRYPI_FIRMWARE=y
CONFIG_RASPBERRYPI_GPIOMEM=y
CONFIG_RASPBERRYPI_POWER=y
CONFIG_RATIONAL=y
# CONFIG_RAVE_SP_CORE is not set
CONFIG_REGMAP=y
CONFIG_REGMAP_MMIO=y
CONFIG_REGULATOR=y
CONFIG_REGULATOR_FIXED_VOLTAGE=y
CONFIG_REGULATOR_GPIO=y
CONFIG_RESET_CONTROLLER=y
CONFIG_RESET_RASPBERRYPI=y
CONFIG_RESET_SIMPLE=y
CONFIG_RFS_ACCEL=y
# CONFIG_RPIVID_MEM is not set
# CONFIG_RPI_POE_POWER is not set
CONFIG_RPS=y
CONFIG_RWSEM_SPIN_ON_OWNER=y
CONFIG_SCSI=y
CONFIG_SCSI_COMMON=y
# CONFIG_SCSI_LOWLEVEL is not set
# CONFIG_SCSI_PROC_FS is not set
CONFIG_SERIAL_8250_BCM2835AUX=y
# CONFIG_SERIAL_8250_DMA is not set
CONFIG_SERIAL_8250_EXTENDED=y
CONFIG_SERIAL_8250_FSL=y
CONFIG_SERIAL_8250_NR_UARTS=1
CONFIG_SERIAL_8250_RUNTIME_UARTS=0
CONFIG_SERIAL_8250_SHARE_IRQ=y
CONFIG_SERIAL_AMBA_PL011=y
CONFIG_SERIAL_AMBA_PL011_CONSOLE=y
CONFIG_SERIAL_DEV_BUS=y
# CONFIG_SERIAL_DEV_CTRL_TTYPORT is not set
CONFIG_SERIAL_MCTRL_GPIO=y
CONFIG_SERIAL_OF_PLATFORM=y
CONFIG_SG_POOL=y
CONFIG_SMP=y
CONFIG_SMP_ON_UP=y
CONFIG_SMSC_PHY=y
CONFIG_SOCK_RX_QUEUE_MAPPING=y
CONFIG_SOFTIRQ_ON_OWN_STACK=y
CONFIG_SPARSE_IRQ=y
CONFIG_SRCU=y
# CONFIG_STRIP_ASM_SYMS is not set
CONFIG_SUSPEND=y
CONFIG_SUSPEND_FREEZER=y
CONFIG_SWIOTLB=y
CONFIG_SWPHY=y
CONFIG_SWP_EMULATE=y
CONFIG_SYS_SUPPORTS_APM_EMULATION=y
# CONFIG_TEXTSEARCH is not set
CONFIG_THERMAL=y
CONFIG_THERMAL_DEFAULT_GOV_STEP_WISE=y
CONFIG_THERMAL_EMERGENCY_POWEROFF_DELAY_MS=0
CONFIG_THERMAL_GOV_STEP_WISE=y
CONFIG_THERMAL_OF=y
CONFIG_THREAD_INFO_IN_TASK=y
CONFIG_TICK_CPU_ACCOUNTING=y
CONFIG_TIMER_OF=y
CONFIG_TIMER_PROBE=y
CONFIG_TMPFS_POSIX_ACL=y
CONFIG_TREE_RCU=y
CONFIG_TREE_SRCU=y
# CONFIG_UCLAMP_TASK is not set
CONFIG_UEVENT_HELPER_PATH=""
# CONFIG_UID16 is not set
CONFIG_UNCOMPRESS_INCLUDE="debug/uncompress.h"
CONFIG_UNWINDER_ARM=y
CONFIG_USB=y
CONFIG_USB_ANNOUNCE_NEW_DEVICES=y
CONFIG_USB_COMMON=y
CONFIG_USB_DWCOTG=y
CONFIG_USB_GADGET=y
CONFIG_USB_LAN78XX=y
CONFIG_USB_NET_DRIVERS=y
CONFIG_USB_NET_SMSC95XX=y
CONFIG_USB_PCI=y
CONFIG_USB_PHY=y
CONFIG_USB_STORAGE=y
CONFIG_USB_SUPPORT=y
CONFIG_USB_UAS=y
# CONFIG_USB_UHCI_HCD is not set
CONFIG_USB_USBNET=y
CONFIG_USB_XHCI_HCD=y
CONFIG_USB_XHCI_PCI=y
CONFIG_USB_XHCI_PLATFORM=y
CONFIG_USE_OF=y
CONFIG_VCHIQ_CDEV=y
CONFIG_VFP=y
CONFIG_VFPv3=y
CONFIG_VIDEO_DEV=y
CONFIG_VIDEO_V4L2_I2C=y
CONFIG_VT=y
CONFIG_VT_CONSOLE=y
CONFIG_VT_CONSOLE_SLEEP=y
CONFIG_VT_HW_CONSOLE_BINDING=y
CONFIG_WATCHDOG_CORE=y
CONFIG_XPS=y
CONFIG_XZ_DEC_ARM=y
CONFIG_XZ_DEC_BCJ=y
CONFIG_ZBOOT_ROM_BSS=0
CONFIG_ZBOOT_ROM_TEXT=0

View file

@ -1,479 +0,0 @@
CONFIG_64BIT=y
# CONFIG_AIO is not set
CONFIG_APERTURE_HELPERS=y
CONFIG_ARCH_BCM=y
CONFIG_ARCH_BCM2835=y
CONFIG_ARCH_BINFMT_ELF_EXTRA_PHDRS=y
CONFIG_ARCH_CORRECT_STACKTRACE_ON_KRETPROBE=y
CONFIG_ARCH_DMA_ADDR_T_64BIT=y
CONFIG_ARCH_HIBERNATION_POSSIBLE=y
CONFIG_ARCH_KEEP_MEMBLOCK=y
CONFIG_ARCH_MHP_MEMMAP_ON_MEMORY_ENABLE=y
CONFIG_ARCH_MMAP_RND_BITS=18
CONFIG_ARCH_MMAP_RND_BITS_MAX=24
CONFIG_ARCH_MMAP_RND_BITS_MIN=18
CONFIG_ARCH_MMAP_RND_COMPAT_BITS_MIN=11
CONFIG_ARCH_NR_GPIO=0
CONFIG_ARCH_PROC_KCORE_TEXT=y
CONFIG_ARCH_SPARSEMEM_ENABLE=y
CONFIG_ARCH_STACKWALK=y
CONFIG_ARCH_SUSPEND_POSSIBLE=y
CONFIG_ARCH_WANTS_NO_INSTR=y
CONFIG_ARCH_WANTS_THP_SWAP=y
CONFIG_ARM64=y
CONFIG_ARM64_4K_PAGES=y
CONFIG_ARM64_CNP=y
CONFIG_ARM64_EPAN=y
CONFIG_ARM64_ERRATUM_819472=y
CONFIG_ARM64_ERRATUM_824069=y
CONFIG_ARM64_ERRATUM_826319=y
CONFIG_ARM64_ERRATUM_827319=y
CONFIG_ARM64_ERRATUM_832075=y
CONFIG_ARM64_ERRATUM_843419=y
CONFIG_ARM64_HW_AFDBM=y
CONFIG_ARM64_LD_HAS_FIX_ERRATUM_843419=y
CONFIG_ARM64_PAGE_SHIFT=12
CONFIG_ARM64_PAN=y
CONFIG_ARM64_PA_BITS=48
CONFIG_ARM64_PA_BITS_48=y
CONFIG_ARM64_PTR_AUTH=y
CONFIG_ARM64_PTR_AUTH_KERNEL=y
CONFIG_ARM64_SVE=y
CONFIG_ARM64_TAGGED_ADDR_ABI=y
CONFIG_ARM64_VA_BITS=39
CONFIG_ARM64_VA_BITS_39=y
CONFIG_ARM64_WORKAROUND_CLEAN_CACHE=y
CONFIG_ARM_AMBA=y
CONFIG_ARM_ARCH_TIMER=y
CONFIG_ARM_ARCH_TIMER_EVTSTREAM=y
CONFIG_ARM_ARCH_TIMER_OOL_WORKAROUND=y
CONFIG_ARM_GIC=y
CONFIG_ARM_GIC_V2M=y
CONFIG_ARM_GIC_V3=y
CONFIG_ARM_GIC_V3_ITS=y
CONFIG_ARM_GIC_V3_ITS_PCI=y
# CONFIG_ARM_MHU_V2 is not set
CONFIG_ARM_PSCI_FW=y
CONFIG_ARM_RASPBERRYPI_CPUFREQ=y
CONFIG_ARM_TIMER_SP804=y
CONFIG_ASSOCIATIVE_ARRAY=y
CONFIG_AUDIT_ARCH_COMPAT_GENERIC=y
CONFIG_BCM2708_VCMEM=y
# CONFIG_BCM2711_THERMAL is not set
CONFIG_BCM2835_MBOX=y
CONFIG_BCM2835_POWER=y
# CONFIG_BCM2835_SMI is not set
CONFIG_BCM2835_THERMAL=y
CONFIG_BCM2835_VCHIQ=y
# CONFIG_BCM2835_VCHIQ_MMAL is not set
CONFIG_BCM2835_WDT=y
CONFIG_BCM_VCIO=y
# CONFIG_BCM_VC_SM_CMA is not set
CONFIG_BCM_VIDEOCORE=y
# CONFIG_BLK_DEV_INITRD is not set
CONFIG_BLK_DEV_LOOP=y
CONFIG_BLK_DEV_RAM=y
CONFIG_BLK_DEV_RAM_COUNT=16
CONFIG_BLK_DEV_RAM_SIZE=4096
CONFIG_BLK_DEV_SD=y
CONFIG_BLK_MQ_PCI=y
CONFIG_BLK_PM=y
CONFIG_BRCMSTB_L2_IRQ=y
CONFIG_BRCM_CHAR_DRIVERS=y
CONFIG_CAVIUM_ERRATUM_22375=y
CONFIG_CAVIUM_ERRATUM_23154=y
CONFIG_CAVIUM_ERRATUM_27456=y
CONFIG_CC_HAVE_SHADOW_CALL_STACK=y
CONFIG_CC_HAVE_STACKPROTECTOR_SYSREG=y
CONFIG_CC_IMPLICIT_FALLTHROUGH="-Wimplicit-fallthrough=5"
CONFIG_CC_NO_ARRAY_BOUNDS=y
CONFIG_CLKSRC_MMIO=y
CONFIG_CLK_BCM2711_DVP=y
CONFIG_CLK_BCM2835=y
CONFIG_CLK_RASPBERRYPI=y
CONFIG_CLONE_BACKWARDS=y
CONFIG_CMA=y
CONFIG_CMA_ALIGNMENT=8
CONFIG_CMA_AREAS=7
# CONFIG_CMA_DEBUG is not set
# CONFIG_CMA_DEBUGFS is not set
CONFIG_CMA_SIZE_MBYTES=5
# CONFIG_CMA_SIZE_SEL_MAX is not set
CONFIG_CMA_SIZE_SEL_MBYTES=y
# CONFIG_CMA_SIZE_SEL_MIN is not set
# CONFIG_CMA_SIZE_SEL_PERCENTAGE is not set
# CONFIG_CMA_SYSFS is not set
CONFIG_COMMON_CLK=y
CONFIG_COMMON_CLK_XGENE=y
CONFIG_COMPACT_UNEVICTABLE_DEFAULT=1
# CONFIG_COMPAT_32BIT_TIME is not set
CONFIG_CONFIGFS_FS=y
CONFIG_CONSOLE_TRANSLATIONS=y
CONFIG_CONTEXT_TRACKING=y
CONFIG_CONTEXT_TRACKING_IDLE=y
CONFIG_CONTIG_ALLOC=y
CONFIG_CPUFREQ_DT=y
CONFIG_CPUFREQ_DT_PLATDEV=y
CONFIG_CPU_FREQ=y
CONFIG_CPU_FREQ_DEFAULT_GOV_ONDEMAND=y
# CONFIG_CPU_FREQ_DEFAULT_GOV_PERFORMANCE is not set
CONFIG_CPU_FREQ_GOV_ATTR_SET=y
CONFIG_CPU_FREQ_GOV_COMMON=y
CONFIG_CPU_FREQ_GOV_CONSERVATIVE=y
CONFIG_CPU_FREQ_GOV_ONDEMAND=y
CONFIG_CPU_FREQ_GOV_PERFORMANCE=y
CONFIG_CPU_FREQ_GOV_POWERSAVE=y
CONFIG_CPU_FREQ_GOV_SCHEDUTIL=y
CONFIG_CPU_FREQ_GOV_USERSPACE=y
CONFIG_CPU_FREQ_STAT=y
CONFIG_CPU_IDLE=y
CONFIG_CPU_IDLE_GOV_LADDER=y
CONFIG_CPU_IDLE_GOV_MENU=y
CONFIG_CPU_LITTLE_ENDIAN=y
CONFIG_CPU_PM=y
CONFIG_CPU_RMAP=y
CONFIG_CRC16=y
CONFIG_CRYPTO_AES_ARM64=y
CONFIG_CRYPTO_AES_ARM64_BS=y
CONFIG_CRYPTO_AES_ARM64_NEON_BLK=y
CONFIG_CRYPTO_CBC=y
CONFIG_CRYPTO_CRC32=y
CONFIG_CRYPTO_CRC32C=y
CONFIG_CRYPTO_CRYPTD=y
CONFIG_CRYPTO_CTS=y
CONFIG_CRYPTO_DRBG=y
CONFIG_CRYPTO_DRBG_HMAC=y
CONFIG_CRYPTO_DRBG_MENU=y
CONFIG_CRYPTO_ECB=y
CONFIG_CRYPTO_HMAC=y
CONFIG_CRYPTO_JITTERENTROPY=y
CONFIG_CRYPTO_LIB_BLAKE2S_GENERIC=y
CONFIG_CRYPTO_LIB_SHA1=y
CONFIG_CRYPTO_LIB_SHA256=y
CONFIG_CRYPTO_LIB_UTILS=y
CONFIG_CRYPTO_RNG=y
CONFIG_CRYPTO_RNG2=y
CONFIG_CRYPTO_RNG_DEFAULT=y
CONFIG_CRYPTO_SEQIV=y
CONFIG_CRYPTO_SHA256=y
CONFIG_CRYPTO_SHA256_ARM64=y
CONFIG_CRYPTO_SHA512=y
CONFIG_CRYPTO_SHA512_ARM64=y
CONFIG_CRYPTO_XTS=y
CONFIG_DCACHE_WORD_ACCESS=y
CONFIG_DEBUG_BUGVERBOSE=y
CONFIG_DEBUG_INFO=y
CONFIG_DMABUF_HEAPS=y
CONFIG_DMABUF_HEAPS_CMA=y
CONFIG_DMABUF_HEAPS_SYSTEM=y
CONFIG_DMADEVICES=y
CONFIG_DMA_BCM2708=y
CONFIG_DMA_BCM2835=y
CONFIG_DMA_CMA=y
CONFIG_DMA_DIRECT_REMAP=y
CONFIG_DMA_ENGINE=y
CONFIG_DMA_OF=y
CONFIG_DMA_SHARED_BUFFER=y
CONFIG_DMA_VIRTUAL_CHANNELS=y
CONFIG_DNOTIFY=y
CONFIG_DTC=y
CONFIG_DUMMY_CONSOLE=y
CONFIG_EDAC_SUPPORT=y
CONFIG_EXCLUSIVE_SYSTEM_RAM=y
CONFIG_EXT4_FS=y
CONFIG_EXT4_FS_POSIX_ACL=y
CONFIG_EXT4_FS_SECURITY=y
CONFIG_EXTCON=y
CONFIG_F2FS_FS=y
CONFIG_FB=y
CONFIG_FB_BCM2708=y
CONFIG_FB_CFB_COPYAREA=y
CONFIG_FB_CFB_FILLRECT=y
CONFIG_FB_CFB_IMAGEBLIT=y
CONFIG_FB_CMDLINE=y
CONFIG_FB_SIMPLE=y
CONFIG_FIXED_PHY=y
CONFIG_FIX_EARLYCON_MEM=y
CONFIG_FONT_8x16=y
CONFIG_FONT_8x8=y
CONFIG_FONT_SUPPORT=y
CONFIG_FRAMEBUFFER_CONSOLE=y
# CONFIG_FRAMEBUFFER_CONSOLE_DETECT_PRIMARY is not set
CONFIG_FRAMEBUFFER_CONSOLE_ROTATION=y
CONFIG_FRAME_POINTER=y
CONFIG_FREEZER=y
CONFIG_FSL_ERRATUM_A008585=y
CONFIG_FS_ENCRYPTION=y
CONFIG_FS_ENCRYPTION_ALGS=y
CONFIG_FS_IOMAP=y
CONFIG_FS_MBCACHE=y
CONFIG_FS_POSIX_ACL=y
CONFIG_FWNODE_MDIO=y
CONFIG_FW_CACHE=y
CONFIG_FW_LOADER_PAGED_BUF=y
CONFIG_FW_LOADER_SYSFS=y
CONFIG_GCC11_NO_ARRAY_BOUNDS=y
CONFIG_GCC_SUPPORTS_DYNAMIC_FTRACE_WITH_REGS=y
CONFIG_GENERIC_ALLOCATOR=y
CONFIG_GENERIC_ARCH_TOPOLOGY=y
CONFIG_GENERIC_BUG=y
CONFIG_GENERIC_BUG_RELATIVE_POINTERS=y
CONFIG_GENERIC_CLOCKEVENTS=y
CONFIG_GENERIC_CLOCKEVENTS_BROADCAST=y
CONFIG_GENERIC_CPU_AUTOPROBE=y
CONFIG_GENERIC_CPU_VULNERABILITIES=y
CONFIG_GENERIC_CSUM=y
CONFIG_GENERIC_EARLY_IOREMAP=y
CONFIG_GENERIC_GETTIMEOFDAY=y
CONFIG_GENERIC_IDLE_POLL_SETUP=y
CONFIG_GENERIC_IOREMAP=y
CONFIG_GENERIC_IRQ_CHIP=y
CONFIG_GENERIC_IRQ_EFFECTIVE_AFF_MASK=y
CONFIG_GENERIC_IRQ_MIGRATION=y
CONFIG_GENERIC_IRQ_SHOW=y
CONFIG_GENERIC_IRQ_SHOW_LEVEL=y
CONFIG_GENERIC_LIB_DEVMEM_IS_ALLOWED=y
CONFIG_GENERIC_MSI_IRQ=y
CONFIG_GENERIC_MSI_IRQ_DOMAIN=y
CONFIG_GENERIC_PCI_IOMAP=y
CONFIG_GENERIC_PINCONF=y
CONFIG_GENERIC_PINCTRL_GROUPS=y
CONFIG_GENERIC_PINMUX_FUNCTIONS=y
CONFIG_GENERIC_SCHED_CLOCK=y
CONFIG_GENERIC_SMP_IDLE_THREAD=y
CONFIG_GENERIC_STRNCPY_FROM_USER=y
CONFIG_GENERIC_STRNLEN_USER=y
CONFIG_GENERIC_TIME_VSYSCALL=y
CONFIG_GPIOLIB_IRQCHIP=y
CONFIG_GPIO_BCM_VIRT=y
CONFIG_GPIO_CDEV=y
# CONFIG_GPIO_FSM is not set
CONFIG_GPIO_RASPBERRYPI_EXP=y
CONFIG_HARDIRQS_SW_RESEND=y
CONFIG_HAS_DMA=y
CONFIG_HAS_IOMEM=y
CONFIG_HAS_IOPORT_MAP=y
CONFIG_HOTPLUG_CPU=y
CONFIG_HW_CONSOLE=y
CONFIG_HW_RANDOM=y
CONFIG_HW_RANDOM_BCM2835=y
CONFIG_I2C=y
# CONFIG_I2C_BCM2708 is not set
CONFIG_I2C_BOARDINFO=y
CONFIG_ILLEGAL_POINTER_VALUE=0xdead000000000000
CONFIG_INPUT=y
CONFIG_INPUT_MOUSEDEV=y
# CONFIG_INPUT_MOUSEDEV_PSAUX is not set
CONFIG_INPUT_MOUSEDEV_SCREEN_X=1024
CONFIG_INPUT_MOUSEDEV_SCREEN_Y=768
CONFIG_IRQCHIP=y
CONFIG_IRQ_DOMAIN=y
CONFIG_IRQ_DOMAIN_HIERARCHY=y
CONFIG_IRQ_FORCED_THREADING=y
CONFIG_IRQ_WORK=y
CONFIG_JBD2=y
CONFIG_KEYS=y
CONFIG_LEDS_GPIO=y
CONFIG_LEDS_PWM=y
CONFIG_LEDS_TRIGGER_ACTPWR=y
CONFIG_LEDS_TRIGGER_INPUT=y
CONFIG_LIBFDT=y
CONFIG_LOCK_DEBUGGING_SUPPORT=y
CONFIG_LOCK_SPIN_ON_OWNER=y
CONFIG_LOGO=y
CONFIG_LOGO_LINUX_CLUT224=y
# CONFIG_LOGO_LINUX_MONO is not set
# CONFIG_LOGO_LINUX_VGA16 is not set
CONFIG_MAC_PARTITION=y
CONFIG_MAGIC_SYSRQ=y
CONFIG_MAILBOX=y
# CONFIG_MAILBOX_TEST is not set
CONFIG_MDIO_BUS=y
CONFIG_MDIO_DEVICE=y
CONFIG_MDIO_DEVRES=y
CONFIG_MEDIA_CAMERA_SUPPORT=y
CONFIG_MEDIA_CONTROLLER=y
CONFIG_MEDIA_PLATFORM_DRIVERS=y
CONFIG_MEDIA_PLATFORM_SUPPORT=y
CONFIG_MEDIA_SUPPORT=y
CONFIG_MEDIA_SUPPORT_FILTER=y
CONFIG_MEMFD_CREATE=y
CONFIG_MEMORY_ISOLATION=y
CONFIG_MFD_CORE=y
CONFIG_MFD_SYSCON=y
CONFIG_MICROCHIP_PHY=y
CONFIG_MIGRATION=y
# CONFIG_MITIGATE_SPECTRE_BRANCH_HISTORY is not set
CONFIG_MMC=y
# CONFIG_MMC_BCM2835 is not set
CONFIG_MMC_BCM2835_DMA=y
CONFIG_MMC_BCM2835_MMC=y
CONFIG_MMC_BCM2835_PIO_DMA_BARRIER=2
CONFIG_MMC_BCM2835_SDHOST=y
CONFIG_MMC_BLOCK=y
CONFIG_MMC_BLOCK_MINORS=32
CONFIG_MMC_SDHCI=y
CONFIG_MMC_SDHCI_IO_ACCESSORS=y
CONFIG_MMC_SDHCI_IPROC=y
# CONFIG_MMC_SDHCI_PCI is not set
CONFIG_MMC_SDHCI_PLTFM=y
CONFIG_MODULES_USE_ELF_RELA=y
# CONFIG_MTD is not set
CONFIG_MUTEX_SPIN_ON_OWNER=y
CONFIG_NEED_DMA_MAP_STATE=y
CONFIG_NEED_SG_DMA_LENGTH=y
CONFIG_NET_FLOW_LIMIT=y
CONFIG_NET_SELFTESTS=y
CONFIG_NLS=y
CONFIG_NLS_ASCII=y
CONFIG_NOP_USB_XCEIV=y
CONFIG_NO_HZ=y
CONFIG_NO_HZ_COMMON=y
CONFIG_NO_HZ_IDLE=y
CONFIG_NR_CPUS=4
CONFIG_NVMEM=y
CONFIG_NVMEM_LAYOUTS=y
CONFIG_OF=y
CONFIG_OF_ADDRESS=y
CONFIG_OF_CONFIGFS=y
CONFIG_OF_DYNAMIC=y
CONFIG_OF_EARLY_FLATTREE=y
CONFIG_OF_FLATTREE=y
CONFIG_OF_GPIO=y
CONFIG_OF_IRQ=y
CONFIG_OF_KOBJ=y
CONFIG_OF_MDIO=y
CONFIG_OF_OVERLAY=y
CONFIG_OF_RESOLVE=y
CONFIG_PADATA=y
CONFIG_PAGE_POOL=y
CONFIG_PAGE_SIZE_LESS_THAN_256KB=y
CONFIG_PAGE_SIZE_LESS_THAN_64KB=y
CONFIG_PARTITION_PERCPU=y
CONFIG_PCI=y
# CONFIG_PCIE_BRCMSTB is not set
CONFIG_PCI_DOMAINS=y
CONFIG_PCI_DOMAINS_GENERIC=y
CONFIG_PCI_MSI=y
CONFIG_PCI_MSI_IRQ_DOMAIN=y
CONFIG_PGTABLE_LEVELS=3
CONFIG_PHYLIB=y
CONFIG_PHYS_ADDR_T_64BIT=y
CONFIG_PINCTRL=y
CONFIG_PINCTRL_BCM2835=y
CONFIG_PM=y
CONFIG_PM_CLK=y
CONFIG_PM_GENERIC_DOMAINS=y
CONFIG_PM_GENERIC_DOMAINS_OF=y
CONFIG_PM_GENERIC_DOMAINS_SLEEP=y
CONFIG_PM_OPP=y
CONFIG_PM_SLEEP=y
CONFIG_PM_SLEEP_SMP=y
CONFIG_POSIX_CPU_TIMERS_TASK_WORK=y
CONFIG_POWER_RESET=y
CONFIG_POWER_SUPPLY=y
CONFIG_PREEMPT_NONE_BUILD=y
CONFIG_PRINTK_TIME=y
CONFIG_PTP_1588_CLOCK_OPTIONAL=y
CONFIG_PWM=y
CONFIG_PWM_BCM2835=y
CONFIG_PWM_SYSFS=y
CONFIG_QUEUED_RWLOCKS=y
CONFIG_QUEUED_SPINLOCKS=y
CONFIG_RANDSTRUCT_NONE=y
CONFIG_RASPBERRYPI_FIRMWARE=y
CONFIG_RASPBERRYPI_GPIOMEM=y
CONFIG_RASPBERRYPI_POWER=y
CONFIG_RATIONAL=y
# CONFIG_RAVE_SP_CORE is not set
CONFIG_REGMAP=y
CONFIG_REGMAP_MMIO=y
CONFIG_REGULATOR=y
CONFIG_REGULATOR_FIXED_VOLTAGE=y
CONFIG_REGULATOR_GPIO=y
CONFIG_RESET_CONTROLLER=y
# CONFIG_RESET_RASPBERRYPI is not set
CONFIG_RESET_SIMPLE=y
CONFIG_RFS_ACCEL=y
CONFIG_RODATA_FULL_DEFAULT_ENABLED=y
# CONFIG_RPIVID_MEM is not set
# CONFIG_RPI_POE_POWER is not set
CONFIG_RPS=y
CONFIG_RWSEM_SPIN_ON_OWNER=y
CONFIG_SCSI=y
CONFIG_SCSI_COMMON=y
# CONFIG_SCSI_LOWLEVEL is not set
# CONFIG_SCSI_PROC_FS is not set
CONFIG_SERIAL_8250_BCM2835AUX=y
# CONFIG_SERIAL_8250_DMA is not set
CONFIG_SERIAL_8250_EXTENDED=y
CONFIG_SERIAL_8250_FSL=y
CONFIG_SERIAL_8250_NR_UARTS=1
CONFIG_SERIAL_8250_RUNTIME_UARTS=0
CONFIG_SERIAL_8250_SHARE_IRQ=y
CONFIG_SERIAL_AMBA_PL011=y
CONFIG_SERIAL_AMBA_PL011_CONSOLE=y
CONFIG_SERIAL_DEV_BUS=y
# CONFIG_SERIAL_DEV_CTRL_TTYPORT is not set
CONFIG_SERIAL_MCTRL_GPIO=y
CONFIG_SERIAL_OF_PLATFORM=y
CONFIG_SG_POOL=y
CONFIG_SMP=y
CONFIG_SMSC_PHY=y
CONFIG_SOCK_RX_QUEUE_MAPPING=y
CONFIG_SOFTIRQ_ON_OWN_STACK=y
CONFIG_SPARSEMEM=y
CONFIG_SPARSEMEM_EXTREME=y
CONFIG_SPARSEMEM_VMEMMAP=y
CONFIG_SPARSEMEM_VMEMMAP_ENABLE=y
CONFIG_SPARSE_IRQ=y
CONFIG_SRCU=y
# CONFIG_STRIP_ASM_SYMS is not set
CONFIG_SUSPEND=y
CONFIG_SUSPEND_FREEZER=y
CONFIG_SWIOTLB=y
CONFIG_SWPHY=y
CONFIG_SYSCTL_EXCEPTION_TRACE=y
# CONFIG_TEXTSEARCH is not set
CONFIG_THERMAL=y
CONFIG_THERMAL_DEFAULT_GOV_STEP_WISE=y
CONFIG_THERMAL_EMERGENCY_POWEROFF_DELAY_MS=0
CONFIG_THERMAL_GOV_STEP_WISE=y
CONFIG_THERMAL_OF=y
CONFIG_THERMAL_WRITABLE_TRIPS=y
CONFIG_THREAD_INFO_IN_TASK=y
CONFIG_TICK_CPU_ACCOUNTING=y
CONFIG_TIMER_OF=y
CONFIG_TIMER_PROBE=y
CONFIG_TMPFS_POSIX_ACL=y
CONFIG_TRACE_IRQFLAGS_NMI_SUPPORT=y
CONFIG_TREE_RCU=y
CONFIG_TREE_SRCU=y
# CONFIG_UCLAMP_TASK is not set
CONFIG_UEVENT_HELPER_PATH=""
CONFIG_UNMAP_KERNEL_AT_EL0=y
CONFIG_USB=y
CONFIG_USB_ANNOUNCE_NEW_DEVICES=y
CONFIG_USB_COMMON=y
CONFIG_USB_DWCOTG=y
CONFIG_USB_LAN78XX=y
CONFIG_USB_NET_DRIVERS=y
CONFIG_USB_NET_SMSC95XX=y
CONFIG_USB_PHY=y
CONFIG_USB_STORAGE=y
CONFIG_USB_SUPPORT=y
CONFIG_USB_UAS=y
CONFIG_USB_USBNET=y
CONFIG_VCHIQ_CDEV=y
CONFIG_VIDEO_DEV=y
CONFIG_VIDEO_V4L2_I2C=y
CONFIG_VMAP_STACK=y
CONFIG_VT=y
CONFIG_VT_CONSOLE=y
CONFIG_VT_CONSOLE_SLEEP=y
CONFIG_VT_HW_CONSOLE_BINDING=y
CONFIG_WATCHDOG_CORE=y
CONFIG_XPS=y
CONFIG_XZ_DEC_ARM=y
CONFIG_XZ_DEC_BCJ=y
CONFIG_ZONE_DMA32=y

View file

@ -1,487 +0,0 @@
CONFIG_64BIT=y
# CONFIG_AIO is not set
CONFIG_APERTURE_HELPERS=y
CONFIG_ARCH_BCM=y
CONFIG_ARCH_BCM2835=y
CONFIG_ARCH_BINFMT_ELF_EXTRA_PHDRS=y
CONFIG_ARCH_CORRECT_STACKTRACE_ON_KRETPROBE=y
CONFIG_ARCH_DMA_ADDR_T_64BIT=y
CONFIG_ARCH_HIBERNATION_POSSIBLE=y
CONFIG_ARCH_KEEP_MEMBLOCK=y
CONFIG_ARCH_MHP_MEMMAP_ON_MEMORY_ENABLE=y
CONFIG_ARCH_MMAP_RND_BITS=18
CONFIG_ARCH_MMAP_RND_BITS_MAX=24
CONFIG_ARCH_MMAP_RND_BITS_MIN=18
CONFIG_ARCH_MMAP_RND_COMPAT_BITS_MIN=11
CONFIG_ARCH_NR_GPIO=0
CONFIG_ARCH_PROC_KCORE_TEXT=y
CONFIG_ARCH_SPARSEMEM_ENABLE=y
CONFIG_ARCH_STACKWALK=y
CONFIG_ARCH_SUSPEND_POSSIBLE=y
CONFIG_ARCH_WANTS_NO_INSTR=y
CONFIG_ARCH_WANTS_THP_SWAP=y
CONFIG_ARM64=y
CONFIG_ARM64_4K_PAGES=y
CONFIG_ARM64_CNP=y
CONFIG_ARM64_EPAN=y
CONFIG_ARM64_ERRATUM_1319367=y
CONFIG_ARM64_HW_AFDBM=y
CONFIG_ARM64_LD_HAS_FIX_ERRATUM_843419=y
CONFIG_ARM64_PAGE_SHIFT=12
CONFIG_ARM64_PAN=y
CONFIG_ARM64_PA_BITS=48
CONFIG_ARM64_PA_BITS_48=y
CONFIG_ARM64_PTR_AUTH=y
CONFIG_ARM64_PTR_AUTH_KERNEL=y
CONFIG_ARM64_SVE=y
CONFIG_ARM64_TAGGED_ADDR_ABI=y
CONFIG_ARM64_VA_BITS=39
CONFIG_ARM64_VA_BITS_39=y
CONFIG_ARM64_WORKAROUND_SPECULATIVE_AT=y
CONFIG_ARM_AMBA=y
CONFIG_ARM_ARCH_TIMER=y
CONFIG_ARM_ARCH_TIMER_EVTSTREAM=y
CONFIG_ARM_ARCH_TIMER_OOL_WORKAROUND=y
CONFIG_ARM_GIC=y
CONFIG_ARM_GIC_V2M=y
CONFIG_ARM_GIC_V3=y
CONFIG_ARM_GIC_V3_ITS=y
CONFIG_ARM_GIC_V3_ITS_PCI=y
# CONFIG_ARM_MHU_V2 is not set
CONFIG_ARM_PSCI_FW=y
CONFIG_ARM_RASPBERRYPI_CPUFREQ=y
CONFIG_ARM_TIMER_SP804=y
CONFIG_ASSOCIATIVE_ARRAY=y
CONFIG_AUDIT_ARCH_COMPAT_GENERIC=y
CONFIG_BCM2708_VCMEM=y
CONFIG_BCM2711_THERMAL=y
CONFIG_BCM2835_MBOX=y
CONFIG_BCM2835_POWER=y
# CONFIG_BCM2835_SMI is not set
# CONFIG_BCM2835_THERMAL is not set
CONFIG_BCM2835_VCHIQ=y
# CONFIG_BCM2835_VCHIQ_MMAL is not set
CONFIG_BCM2835_WDT=y
CONFIG_BCM7XXX_PHY=y
CONFIG_BCMGENET=y
CONFIG_BCM_NET_PHYLIB=y
CONFIG_BCM_VCIO=y
# CONFIG_BCM_VC_SM_CMA is not set
CONFIG_BCM_VIDEOCORE=y
# CONFIG_BLK_DEV_INITRD is not set
CONFIG_BLK_DEV_LOOP=y
CONFIG_BLK_DEV_RAM=y
CONFIG_BLK_DEV_RAM_COUNT=16
CONFIG_BLK_DEV_RAM_SIZE=4096
CONFIG_BLK_DEV_SD=y
CONFIG_BLK_MQ_PCI=y
CONFIG_BLK_PM=y
CONFIG_BRCMSTB_L2_IRQ=y
CONFIG_BRCM_CHAR_DRIVERS=y
CONFIG_BROADCOM_PHY=y
CONFIG_CAVIUM_ERRATUM_22375=y
CONFIG_CAVIUM_ERRATUM_23154=y
CONFIG_CAVIUM_ERRATUM_27456=y
CONFIG_CC_HAVE_SHADOW_CALL_STACK=y
CONFIG_CC_HAVE_STACKPROTECTOR_SYSREG=y
CONFIG_CC_IMPLICIT_FALLTHROUGH="-Wimplicit-fallthrough=5"
CONFIG_CC_NO_ARRAY_BOUNDS=y
CONFIG_CLKSRC_MMIO=y
CONFIG_CLK_BCM2711_DVP=y
CONFIG_CLK_BCM2835=y
CONFIG_CLK_RASPBERRYPI=y
CONFIG_CLONE_BACKWARDS=y
CONFIG_CMA=y
CONFIG_CMA_ALIGNMENT=8
CONFIG_CMA_AREAS=7
# CONFIG_CMA_DEBUG is not set
# CONFIG_CMA_DEBUGFS is not set
CONFIG_CMA_SIZE_MBYTES=5
# CONFIG_CMA_SIZE_SEL_MAX is not set
CONFIG_CMA_SIZE_SEL_MBYTES=y
# CONFIG_CMA_SIZE_SEL_MIN is not set
# CONFIG_CMA_SIZE_SEL_PERCENTAGE is not set
# CONFIG_CMA_SYSFS is not set
CONFIG_COMMON_CLK=y
CONFIG_COMMON_CLK_XGENE=y
CONFIG_COMPACT_UNEVICTABLE_DEFAULT=1
# CONFIG_COMPAT_32BIT_TIME is not set
CONFIG_CONFIGFS_FS=y
CONFIG_CONSOLE_TRANSLATIONS=y
CONFIG_CONTEXT_TRACKING=y
CONFIG_CONTEXT_TRACKING_IDLE=y
CONFIG_CONTIG_ALLOC=y
CONFIG_CPUFREQ_DT=y
CONFIG_CPUFREQ_DT_PLATDEV=y
CONFIG_CPU_FREQ=y
CONFIG_CPU_FREQ_DEFAULT_GOV_ONDEMAND=y
# CONFIG_CPU_FREQ_DEFAULT_GOV_PERFORMANCE is not set
CONFIG_CPU_FREQ_GOV_ATTR_SET=y
CONFIG_CPU_FREQ_GOV_COMMON=y
CONFIG_CPU_FREQ_GOV_CONSERVATIVE=y
CONFIG_CPU_FREQ_GOV_ONDEMAND=y
CONFIG_CPU_FREQ_GOV_PERFORMANCE=y
CONFIG_CPU_FREQ_GOV_POWERSAVE=y
CONFIG_CPU_FREQ_GOV_SCHEDUTIL=y
CONFIG_CPU_FREQ_GOV_USERSPACE=y
CONFIG_CPU_FREQ_STAT=y
CONFIG_CPU_IDLE=y
CONFIG_CPU_IDLE_GOV_LADDER=y
CONFIG_CPU_IDLE_GOV_MENU=y
CONFIG_CPU_LITTLE_ENDIAN=y
CONFIG_CPU_PM=y
CONFIG_CPU_RMAP=y
CONFIG_CRC16=y
CONFIG_CRYPTO_AES_ARM64=y
CONFIG_CRYPTO_AES_ARM64_BS=y
CONFIG_CRYPTO_AES_ARM64_NEON_BLK=y
CONFIG_CRYPTO_CBC=y
CONFIG_CRYPTO_CRC32=y
CONFIG_CRYPTO_CRC32C=y
CONFIG_CRYPTO_CRYPTD=y
CONFIG_CRYPTO_CTS=y
CONFIG_CRYPTO_DRBG=y
CONFIG_CRYPTO_DRBG_HMAC=y
CONFIG_CRYPTO_DRBG_MENU=y
CONFIG_CRYPTO_ECB=y
CONFIG_CRYPTO_HMAC=y
CONFIG_CRYPTO_JITTERENTROPY=y
CONFIG_CRYPTO_LIB_BLAKE2S_GENERIC=y
CONFIG_CRYPTO_LIB_SHA1=y
CONFIG_CRYPTO_LIB_SHA256=y
CONFIG_CRYPTO_LIB_UTILS=y
CONFIG_CRYPTO_RNG=y
CONFIG_CRYPTO_RNG2=y
CONFIG_CRYPTO_RNG_DEFAULT=y
CONFIG_CRYPTO_SEQIV=y
CONFIG_CRYPTO_SHA256=y
CONFIG_CRYPTO_SHA256_ARM64=y
CONFIG_CRYPTO_SHA512=y
CONFIG_CRYPTO_SHA512_ARM64=y
CONFIG_CRYPTO_XTS=y
CONFIG_DCACHE_WORD_ACCESS=y
CONFIG_DEBUG_BUGVERBOSE=y
CONFIG_DEBUG_INFO=y
CONFIG_DIMLIB=y
CONFIG_DMABUF_HEAPS=y
CONFIG_DMABUF_HEAPS_CMA=y
CONFIG_DMABUF_HEAPS_SYSTEM=y
CONFIG_DMADEVICES=y
CONFIG_DMA_BCM2708=y
CONFIG_DMA_BCM2835=y
CONFIG_DMA_CMA=y
CONFIG_DMA_DIRECT_REMAP=y
CONFIG_DMA_ENGINE=y
CONFIG_DMA_OF=y
CONFIG_DMA_SHARED_BUFFER=y
CONFIG_DMA_VIRTUAL_CHANNELS=y
CONFIG_DNOTIFY=y
CONFIG_DTC=y
CONFIG_DUMMY_CONSOLE=y
CONFIG_EDAC_SUPPORT=y
CONFIG_EXCLUSIVE_SYSTEM_RAM=y
CONFIG_EXT4_FS=y
CONFIG_EXT4_FS_POSIX_ACL=y
CONFIG_EXT4_FS_SECURITY=y
CONFIG_EXTCON=y
CONFIG_F2FS_FS=y
CONFIG_FB=y
CONFIG_FB_BCM2708=y
CONFIG_FB_CFB_COPYAREA=y
CONFIG_FB_CFB_FILLRECT=y
CONFIG_FB_CFB_IMAGEBLIT=y
CONFIG_FB_CMDLINE=y
CONFIG_FB_SIMPLE=y
CONFIG_FIXED_PHY=y
CONFIG_FIX_EARLYCON_MEM=y
CONFIG_FONT_8x16=y
CONFIG_FONT_8x8=y
CONFIG_FONT_SUPPORT=y
CONFIG_FRAMEBUFFER_CONSOLE=y
# CONFIG_FRAMEBUFFER_CONSOLE_DETECT_PRIMARY is not set
CONFIG_FRAMEBUFFER_CONSOLE_ROTATION=y
CONFIG_FRAME_POINTER=y
CONFIG_FREEZER=y
CONFIG_FSL_ERRATUM_A008585=y
CONFIG_FS_ENCRYPTION=y
CONFIG_FS_ENCRYPTION_ALGS=y
CONFIG_FS_IOMAP=y
CONFIG_FS_MBCACHE=y
CONFIG_FS_POSIX_ACL=y
CONFIG_FWNODE_MDIO=y
CONFIG_FW_CACHE=y
CONFIG_FW_LOADER_PAGED_BUF=y
CONFIG_FW_LOADER_SYSFS=y
CONFIG_GCC11_NO_ARRAY_BOUNDS=y
CONFIG_GCC_SUPPORTS_DYNAMIC_FTRACE_WITH_REGS=y
CONFIG_GENERIC_ALLOCATOR=y
CONFIG_GENERIC_ARCH_TOPOLOGY=y
CONFIG_GENERIC_BUG=y
CONFIG_GENERIC_BUG_RELATIVE_POINTERS=y
CONFIG_GENERIC_CLOCKEVENTS=y
CONFIG_GENERIC_CLOCKEVENTS_BROADCAST=y
CONFIG_GENERIC_CPU_AUTOPROBE=y
CONFIG_GENERIC_CPU_VULNERABILITIES=y
CONFIG_GENERIC_CSUM=y
CONFIG_GENERIC_EARLY_IOREMAP=y
CONFIG_GENERIC_GETTIMEOFDAY=y
CONFIG_GENERIC_IDLE_POLL_SETUP=y
CONFIG_GENERIC_IOREMAP=y
CONFIG_GENERIC_IRQ_CHIP=y
CONFIG_GENERIC_IRQ_EFFECTIVE_AFF_MASK=y
CONFIG_GENERIC_IRQ_MIGRATION=y
CONFIG_GENERIC_IRQ_SHOW=y
CONFIG_GENERIC_IRQ_SHOW_LEVEL=y
CONFIG_GENERIC_LIB_DEVMEM_IS_ALLOWED=y
CONFIG_GENERIC_MSI_IRQ=y
CONFIG_GENERIC_MSI_IRQ_DOMAIN=y
CONFIG_GENERIC_PCI_IOMAP=y
CONFIG_GENERIC_PHY=y
CONFIG_GENERIC_PINCONF=y
CONFIG_GENERIC_PINCTRL_GROUPS=y
CONFIG_GENERIC_PINMUX_FUNCTIONS=y
CONFIG_GENERIC_SCHED_CLOCK=y
CONFIG_GENERIC_SMP_IDLE_THREAD=y
CONFIG_GENERIC_STRNCPY_FROM_USER=y
CONFIG_GENERIC_STRNLEN_USER=y
CONFIG_GENERIC_TIME_VSYSCALL=y
CONFIG_GPIOLIB_IRQCHIP=y
CONFIG_GPIO_BCM_VIRT=y
CONFIG_GPIO_CDEV=y
# CONFIG_GPIO_FSM is not set
CONFIG_GPIO_RASPBERRYPI_EXP=y
CONFIG_HARDIRQS_SW_RESEND=y
CONFIG_HAS_DMA=y
CONFIG_HAS_IOMEM=y
CONFIG_HAS_IOPORT_MAP=y
CONFIG_HOTPLUG_CPU=y
CONFIG_HW_CONSOLE=y
CONFIG_HW_RANDOM=y
CONFIG_HW_RANDOM_IPROC_RNG200=y
CONFIG_I2C=y
# CONFIG_I2C_BCM2708 is not set
CONFIG_I2C_BOARDINFO=y
CONFIG_ILLEGAL_POINTER_VALUE=0xdead000000000000
CONFIG_INPUT=y
CONFIG_INPUT_MOUSEDEV=y
# CONFIG_INPUT_MOUSEDEV_PSAUX is not set
CONFIG_INPUT_MOUSEDEV_SCREEN_X=1024
CONFIG_INPUT_MOUSEDEV_SCREEN_Y=768
CONFIG_IRQCHIP=y
CONFIG_IRQ_DOMAIN=y
CONFIG_IRQ_DOMAIN_HIERARCHY=y
CONFIG_IRQ_FORCED_THREADING=y
CONFIG_IRQ_WORK=y
CONFIG_JBD2=y
CONFIG_KEYS=y
CONFIG_LEDS_GPIO=y
CONFIG_LEDS_PWM=y
CONFIG_LEDS_TRIGGER_ACTPWR=y
CONFIG_LEDS_TRIGGER_INPUT=y
CONFIG_LIBFDT=y
CONFIG_LOCK_DEBUGGING_SUPPORT=y
CONFIG_LOCK_SPIN_ON_OWNER=y
CONFIG_LOGO=y
CONFIG_LOGO_LINUX_CLUT224=y
# CONFIG_LOGO_LINUX_MONO is not set
# CONFIG_LOGO_LINUX_VGA16 is not set
CONFIG_MAC_PARTITION=y
CONFIG_MAGIC_SYSRQ=y
CONFIG_MAILBOX=y
# CONFIG_MAILBOX_TEST is not set
CONFIG_MDIO_BCM_UNIMAC=y
CONFIG_MDIO_BUS=y
CONFIG_MDIO_DEVICE=y
CONFIG_MDIO_DEVRES=y
CONFIG_MEDIA_CAMERA_SUPPORT=y
CONFIG_MEDIA_CONTROLLER=y
CONFIG_MEDIA_PLATFORM_DRIVERS=y
CONFIG_MEDIA_PLATFORM_SUPPORT=y
CONFIG_MEDIA_SUPPORT=y
CONFIG_MEDIA_SUPPORT_FILTER=y
CONFIG_MEMFD_CREATE=y
CONFIG_MEMORY_ISOLATION=y
CONFIG_MFD_CORE=y
CONFIG_MFD_SYSCON=y
CONFIG_MIGRATION=y
CONFIG_MMC=y
# CONFIG_MMC_BCM2835 is not set
CONFIG_MMC_BCM2835_DMA=y
CONFIG_MMC_BCM2835_MMC=y
CONFIG_MMC_BCM2835_PIO_DMA_BARRIER=2
CONFIG_MMC_BCM2835_SDHOST=y
CONFIG_MMC_BLOCK=y
CONFIG_MMC_BLOCK_MINORS=32
CONFIG_MMC_SDHCI=y
CONFIG_MMC_SDHCI_IO_ACCESSORS=y
CONFIG_MMC_SDHCI_IPROC=y
# CONFIG_MMC_SDHCI_PCI is not set
CONFIG_MMC_SDHCI_PLTFM=y
CONFIG_MODULES_USE_ELF_RELA=y
# CONFIG_MTD is not set
CONFIG_MUTEX_SPIN_ON_OWNER=y
CONFIG_NEED_DMA_MAP_STATE=y
CONFIG_NEED_SG_DMA_LENGTH=y
CONFIG_NET_FLOW_LIMIT=y
CONFIG_NET_PTP_CLASSIFY=y
CONFIG_NET_SELFTESTS=y
CONFIG_NLS=y
CONFIG_NLS_ASCII=y
CONFIG_NOP_USB_XCEIV=y
CONFIG_NO_HZ=y
CONFIG_NO_HZ_COMMON=y
CONFIG_NO_HZ_IDLE=y
CONFIG_NR_CPUS=4
CONFIG_NVMEM=y
CONFIG_NVMEM_LAYOUTS=y
CONFIG_OF=y
CONFIG_OF_ADDRESS=y
CONFIG_OF_CONFIGFS=y
CONFIG_OF_DYNAMIC=y
CONFIG_OF_EARLY_FLATTREE=y
CONFIG_OF_FLATTREE=y
CONFIG_OF_GPIO=y
CONFIG_OF_IRQ=y
CONFIG_OF_KOBJ=y
CONFIG_OF_MDIO=y
CONFIG_OF_OVERLAY=y
CONFIG_OF_RESOLVE=y
CONFIG_PADATA=y
CONFIG_PAGE_POOL=y
CONFIG_PAGE_SIZE_LESS_THAN_256KB=y
CONFIG_PAGE_SIZE_LESS_THAN_64KB=y
CONFIG_PARTITION_PERCPU=y
CONFIG_PCI=y
CONFIG_PCIEAER=y
CONFIG_PCIEPORTBUS=y
CONFIG_PCIE_BRCMSTB=y
CONFIG_PCIE_PME=y
CONFIG_PCI_DOMAINS=y
CONFIG_PCI_DOMAINS_GENERIC=y
CONFIG_PCI_MSI=y
CONFIG_PCI_MSI_IRQ_DOMAIN=y
CONFIG_PGTABLE_LEVELS=3
CONFIG_PHYLIB=y
CONFIG_PHYS_ADDR_T_64BIT=y
CONFIG_PINCTRL=y
CONFIG_PINCTRL_BCM2835=y
CONFIG_PM=y
CONFIG_PM_CLK=y
CONFIG_PM_GENERIC_DOMAINS=y
CONFIG_PM_GENERIC_DOMAINS_OF=y
CONFIG_PM_GENERIC_DOMAINS_SLEEP=y
CONFIG_PM_OPP=y
CONFIG_PM_SLEEP=y
CONFIG_PM_SLEEP_SMP=y
CONFIG_POSIX_CPU_TIMERS_TASK_WORK=y
CONFIG_POWER_RESET=y
CONFIG_POWER_SUPPLY=y
CONFIG_PPS=y
CONFIG_PREEMPT_NONE_BUILD=y
CONFIG_PRINTK_TIME=y
CONFIG_PTP_1588_CLOCK=y
CONFIG_PTP_1588_CLOCK_OPTIONAL=y
CONFIG_PWM=y
CONFIG_PWM_BCM2835=y
CONFIG_PWM_SYSFS=y
CONFIG_QUEUED_RWLOCKS=y
CONFIG_QUEUED_SPINLOCKS=y
CONFIG_RANDSTRUCT_NONE=y
CONFIG_RAS=y
CONFIG_RASPBERRYPI_FIRMWARE=y
CONFIG_RASPBERRYPI_GPIOMEM=y
CONFIG_RASPBERRYPI_POWER=y
CONFIG_RATIONAL=y
# CONFIG_RAVE_SP_CORE is not set
CONFIG_REGMAP=y
CONFIG_REGMAP_MMIO=y
CONFIG_REGULATOR=y
CONFIG_REGULATOR_FIXED_VOLTAGE=y
CONFIG_REGULATOR_GPIO=y
CONFIG_RESET_CONTROLLER=y
CONFIG_RESET_RASPBERRYPI=y
CONFIG_RESET_SIMPLE=y
CONFIG_RFS_ACCEL=y
CONFIG_RODATA_FULL_DEFAULT_ENABLED=y
# CONFIG_RPIVID_MEM is not set
# CONFIG_RPI_POE_POWER is not set
CONFIG_RPS=y
CONFIG_RWSEM_SPIN_ON_OWNER=y
CONFIG_SCSI=y
CONFIG_SCSI_COMMON=y
# CONFIG_SCSI_LOWLEVEL is not set
# CONFIG_SCSI_PROC_FS is not set
CONFIG_SERIAL_8250_BCM2835AUX=y
# CONFIG_SERIAL_8250_DMA is not set
CONFIG_SERIAL_8250_EXTENDED=y
CONFIG_SERIAL_8250_FSL=y
CONFIG_SERIAL_8250_NR_UARTS=1
CONFIG_SERIAL_8250_RUNTIME_UARTS=0
CONFIG_SERIAL_8250_SHARE_IRQ=y
CONFIG_SERIAL_AMBA_PL011=y
CONFIG_SERIAL_AMBA_PL011_CONSOLE=y
CONFIG_SERIAL_DEV_BUS=y
# CONFIG_SERIAL_DEV_CTRL_TTYPORT is not set
CONFIG_SERIAL_MCTRL_GPIO=y
CONFIG_SERIAL_OF_PLATFORM=y
CONFIG_SG_POOL=y
CONFIG_SMP=y
CONFIG_SOCK_RX_QUEUE_MAPPING=y
CONFIG_SOFTIRQ_ON_OWN_STACK=y
CONFIG_SPARSEMEM=y
CONFIG_SPARSEMEM_EXTREME=y
CONFIG_SPARSEMEM_VMEMMAP=y
CONFIG_SPARSEMEM_VMEMMAP_ENABLE=y
CONFIG_SPARSE_IRQ=y
CONFIG_SRCU=y
# CONFIG_STRIP_ASM_SYMS is not set
CONFIG_SUSPEND=y
CONFIG_SUSPEND_FREEZER=y
CONFIG_SWIOTLB=y
CONFIG_SWPHY=y
CONFIG_SYSCTL_EXCEPTION_TRACE=y
# CONFIG_TEXTSEARCH is not set
CONFIG_THERMAL=y
CONFIG_THERMAL_DEFAULT_GOV_STEP_WISE=y
CONFIG_THERMAL_EMERGENCY_POWEROFF_DELAY_MS=0
CONFIG_THERMAL_GOV_STEP_WISE=y
CONFIG_THERMAL_OF=y
CONFIG_THERMAL_WRITABLE_TRIPS=y
CONFIG_THREAD_INFO_IN_TASK=y
CONFIG_TICK_CPU_ACCOUNTING=y
CONFIG_TIMER_OF=y
CONFIG_TIMER_PROBE=y
CONFIG_TMPFS_POSIX_ACL=y
CONFIG_TRACE_IRQFLAGS_NMI_SUPPORT=y
CONFIG_TREE_RCU=y
CONFIG_TREE_SRCU=y
# CONFIG_UCLAMP_TASK is not set
CONFIG_UEVENT_HELPER_PATH=""
CONFIG_UNMAP_KERNEL_AT_EL0=y
CONFIG_USB=y
CONFIG_USB_ANNOUNCE_NEW_DEVICES=y
CONFIG_USB_COMMON=y
CONFIG_USB_DWCOTG=y
CONFIG_USB_GADGET=y
CONFIG_USB_PCI=y
CONFIG_USB_PHY=y
CONFIG_USB_STORAGE=y
CONFIG_USB_SUPPORT=y
CONFIG_USB_UAS=y
# CONFIG_USB_UHCI_HCD is not set
CONFIG_USB_XHCI_HCD=y
CONFIG_USB_XHCI_PCI=y
CONFIG_USB_XHCI_PLATFORM=y
CONFIG_VCHIQ_CDEV=y
CONFIG_VIDEO_DEV=y
CONFIG_VIDEO_V4L2_I2C=y
CONFIG_VMAP_STACK=y
CONFIG_VT=y
CONFIG_VT_CONSOLE=y
CONFIG_VT_CONSOLE_SLEEP=y
CONFIG_VT_HW_CONSOLE_BINDING=y
CONFIG_WATCHDOG_CORE=y
CONFIG_XPS=y
CONFIG_XZ_DEC_ARM=y
CONFIG_XZ_DEC_BCJ=y
CONFIG_ZONE_DMA32=y

View file

@ -1,612 +0,0 @@
CONFIG_64BIT=y
# CONFIG_AIO is not set
CONFIG_APERTURE_HELPERS=y
CONFIG_ARCH_BCM=y
CONFIG_ARCH_BCM2835=y
CONFIG_ARCH_BINFMT_ELF_EXTRA_PHDRS=y
CONFIG_ARCH_BRCMSTB=y
CONFIG_ARCH_CORRECT_STACKTRACE_ON_KRETPROBE=y
CONFIG_ARCH_DMA_ADDR_T_64BIT=y
CONFIG_ARCH_HIBERNATION_POSSIBLE=y
CONFIG_ARCH_KEEP_MEMBLOCK=y
CONFIG_ARCH_MHP_MEMMAP_ON_MEMORY_ENABLE=y
CONFIG_ARCH_MMAP_RND_BITS=18
CONFIG_ARCH_MMAP_RND_BITS_MAX=24
CONFIG_ARCH_MMAP_RND_BITS_MIN=18
CONFIG_ARCH_MMAP_RND_COMPAT_BITS_MIN=11
CONFIG_ARCH_NR_GPIO=0
CONFIG_ARCH_PROC_KCORE_TEXT=y
CONFIG_ARCH_SPARSEMEM_ENABLE=y
CONFIG_ARCH_STACKWALK=y
CONFIG_ARCH_SUSPEND_POSSIBLE=y
CONFIG_ARCH_WANTS_NO_INSTR=y
CONFIG_ARCH_WANTS_THP_SWAP=y
CONFIG_ARM64=y
CONFIG_ARM64_4K_PAGES=y
CONFIG_ARM64_CNP=y
CONFIG_ARM64_EPAN=y
CONFIG_ARM64_ERRATUM_1165522=y
CONFIG_ARM64_ERRATUM_1286807=y
CONFIG_ARM64_ERRATUM_1463225=y
CONFIG_ARM64_HW_AFDBM=y
CONFIG_ARM64_LD_HAS_FIX_ERRATUM_843419=y
CONFIG_ARM64_PAGE_SHIFT=12
CONFIG_ARM64_PAN=y
CONFIG_ARM64_PA_BITS=48
CONFIG_ARM64_PA_BITS_48=y
CONFIG_ARM64_PTR_AUTH=y
CONFIG_ARM64_PTR_AUTH_KERNEL=y
CONFIG_ARM64_SVE=y
CONFIG_ARM64_TAGGED_ADDR_ABI=y
CONFIG_ARM64_VA_BITS=39
CONFIG_ARM64_VA_BITS_39=y
CONFIG_ARM64_WORKAROUND_REPEAT_TLBI=y
CONFIG_ARM64_WORKAROUND_SPECULATIVE_AT=y
CONFIG_ARM_AMBA=y
CONFIG_ARM_ARCH_TIMER=y
CONFIG_ARM_ARCH_TIMER_EVTSTREAM=y
CONFIG_ARM_ARCH_TIMER_OOL_WORKAROUND=y
CONFIG_ARM_BRCMSTB_AVS_CPUFREQ=y
CONFIG_ARM_GIC=y
CONFIG_ARM_GIC_V2M=y
CONFIG_ARM_GIC_V3=y
CONFIG_ARM_GIC_V3_ITS=y
CONFIG_ARM_GIC_V3_ITS_PCI=y
# CONFIG_ARM_MHU_V2 is not set
# CONFIG_ARM_PL172_MPMC is not set
CONFIG_ARM_PSCI_FW=y
CONFIG_ARM_RASPBERRYPI_CPUFREQ=y
# CONFIG_ARM_SMMU is not set
# CONFIG_ARM_SMMU_V3 is not set
CONFIG_ARM_TIMER_SP804=y
CONFIG_ASSOCIATIVE_ARRAY=y
CONFIG_AUDIT_ARCH_COMPAT_GENERIC=y
CONFIG_BCM2708_VCMEM=y
CONFIG_BCM2711_THERMAL=y
CONFIG_BCM2712_IOMMU=y
CONFIG_BCM2712_MIP=y
CONFIG_BCM2835_MBOX=y
CONFIG_BCM2835_POWER=y
CONFIG_BCM2835_SMI=y
CONFIG_BCM2835_SMI_DEV=m
CONFIG_BCM2835_THERMAL=y
CONFIG_BCM2835_VCHIQ=y
# CONFIG_BCM2835_VCHIQ_MMAL is not set
CONFIG_BCM2835_WDT=y
CONFIG_BCM7038_L1_IRQ=y
CONFIG_BCM7120_L2_IRQ=y
CONFIG_BCM7XXX_PHY=y
CONFIG_BCMA=y
CONFIG_BCMA_BLOCKIO=y
# CONFIG_BCMA_DEBUG is not set
# CONFIG_BCMA_DRIVER_GMAC_CMN is not set
CONFIG_BCMA_DRIVER_PCI=y
CONFIG_BCMA_FALLBACK_SPROM=y
CONFIG_BCMA_HOST_PCI=y
CONFIG_BCMA_HOST_PCI_POSSIBLE=y
# CONFIG_BCMA_HOST_SOC is not set
CONFIG_BCMGENET=y
CONFIG_BCM_NET_PHYLIB=y
CONFIG_BCM_VCIO=y
# CONFIG_BCM_VC_SM_CMA is not set
CONFIG_BCM_VIDEOCORE=y
# CONFIG_BLK_DEV_INITRD is not set
CONFIG_BLK_DEV_LOOP=y
CONFIG_BLK_DEV_NVME=y
CONFIG_BLK_DEV_RAM=y
CONFIG_BLK_DEV_RAM_COUNT=16
CONFIG_BLK_DEV_RAM_SIZE=4096
CONFIG_BLK_DEV_SD=y
CONFIG_BLK_MQ_PCI=y
CONFIG_BLK_PM=y
CONFIG_BRCMSTB_DPFE=y
CONFIG_BRCMSTB_L2_IRQ=y
CONFIG_BRCMSTB_MEMC=y
CONFIG_BRCMSTB_PM=y
# CONFIG_BRCMSTB_THERMAL is not set
CONFIG_BRCM_CHAR_DRIVERS=y
CONFIG_BRCM_USB_PINMAP=y
CONFIG_BROADCOM_PHY=y
CONFIG_CC_HAVE_SHADOW_CALL_STACK=y
CONFIG_CC_HAVE_STACKPROTECTOR_SYSREG=y
CONFIG_CC_IMPLICIT_FALLTHROUGH="-Wimplicit-fallthrough=5"
CONFIG_CC_NO_ARRAY_BOUNDS=y
CONFIG_CLKSRC_MMIO=y
CONFIG_CLK_BCM2711_DVP=y
CONFIG_CLK_BCM2835=y
CONFIG_CLK_RASPBERRYPI=y
CONFIG_CLONE_BACKWARDS=y
CONFIG_CMA=y
CONFIG_CMA_ALIGNMENT=8
CONFIG_CMA_AREAS=7
# CONFIG_CMA_DEBUG is not set
# CONFIG_CMA_DEBUGFS is not set
CONFIG_CMA_SIZE_MBYTES=5
# CONFIG_CMA_SIZE_SEL_MAX is not set
CONFIG_CMA_SIZE_SEL_MBYTES=y
# CONFIG_CMA_SIZE_SEL_MIN is not set
# CONFIG_CMA_SIZE_SEL_PERCENTAGE is not set
# CONFIG_CMA_SYSFS is not set
CONFIG_COMMON_CLK=y
CONFIG_COMMON_CLK_RP1=y
# CONFIG_COMMON_CLK_RP1_SDIO is not set
CONFIG_COMMON_CLK_XGENE=y
CONFIG_COMPACT_UNEVICTABLE_DEFAULT=1
# CONFIG_COMPAT_32BIT_TIME is not set
CONFIG_CONFIGFS_FS=y
CONFIG_CONSOLE_TRANSLATIONS=y
CONFIG_CONTEXT_TRACKING=y
CONFIG_CONTEXT_TRACKING_IDLE=y
CONFIG_CONTIG_ALLOC=y
CONFIG_CPUFREQ_DT=y
CONFIG_CPUFREQ_DT_PLATDEV=y
CONFIG_CPU_FREQ=y
CONFIG_CPU_FREQ_DEFAULT_GOV_ONDEMAND=y
# CONFIG_CPU_FREQ_DEFAULT_GOV_PERFORMANCE is not set
CONFIG_CPU_FREQ_GOV_ATTR_SET=y
CONFIG_CPU_FREQ_GOV_COMMON=y
CONFIG_CPU_FREQ_GOV_CONSERVATIVE=y
CONFIG_CPU_FREQ_GOV_ONDEMAND=y
CONFIG_CPU_FREQ_GOV_PERFORMANCE=y
CONFIG_CPU_FREQ_GOV_POWERSAVE=y
CONFIG_CPU_FREQ_GOV_SCHEDUTIL=y
CONFIG_CPU_FREQ_GOV_USERSPACE=y
CONFIG_CPU_FREQ_STAT=y
CONFIG_CPU_IDLE=y
CONFIG_CPU_IDLE_GOV_LADDER=y
CONFIG_CPU_IDLE_GOV_MENU=y
CONFIG_CPU_LITTLE_ENDIAN=y
CONFIG_CPU_PM=y
CONFIG_CPU_RMAP=y
CONFIG_CRC16=y
CONFIG_CRYPTO_AES_ARM64=y
CONFIG_CRYPTO_AES_ARM64_BS=y
CONFIG_CRYPTO_AES_ARM64_CE=y
CONFIG_CRYPTO_AES_ARM64_CE_BLK=y
CONFIG_CRYPTO_AES_ARM64_CE_CCM=y
CONFIG_CRYPTO_AES_ARM64_NEON_BLK=y
CONFIG_CRYPTO_CBC=y
CONFIG_CRYPTO_CRC32=y
CONFIG_CRYPTO_CRC32C=y
CONFIG_CRYPTO_CRYPTD=y
CONFIG_CRYPTO_CTS=y
CONFIG_CRYPTO_DRBG=y
CONFIG_CRYPTO_DRBG_HMAC=y
CONFIG_CRYPTO_DRBG_MENU=y
CONFIG_CRYPTO_ECB=y
CONFIG_CRYPTO_GHASH_ARM64_CE=y
CONFIG_CRYPTO_HMAC=y
CONFIG_CRYPTO_JITTERENTROPY=y
CONFIG_CRYPTO_LIB_BLAKE2S_GENERIC=y
CONFIG_CRYPTO_LIB_SHA1=y
CONFIG_CRYPTO_LIB_SHA256=y
CONFIG_CRYPTO_LIB_UTILS=y
CONFIG_CRYPTO_RNG=y
CONFIG_CRYPTO_RNG2=y
CONFIG_CRYPTO_RNG_DEFAULT=y
CONFIG_CRYPTO_SEQIV=y
CONFIG_CRYPTO_SHA1=y
CONFIG_CRYPTO_SHA1_ARM64_CE=y
CONFIG_CRYPTO_SHA256=y
CONFIG_CRYPTO_SHA256_ARM64=y
CONFIG_CRYPTO_SHA2_ARM64_CE=y
CONFIG_CRYPTO_SHA3=y
CONFIG_CRYPTO_SHA3_ARM64=y
CONFIG_CRYPTO_SHA512=y
CONFIG_CRYPTO_SHA512_ARM64=y
CONFIG_CRYPTO_SHA512_ARM64_CE=y
CONFIG_CRYPTO_SM3=y
CONFIG_CRYPTO_SM3_ARM64_CE=y
CONFIG_CRYPTO_SM4=y
CONFIG_CRYPTO_SM4_ARM64_CE=y
CONFIG_CRYPTO_SM4_ARM64_CE_BLK=y
CONFIG_CRYPTO_XTS=y
CONFIG_DCACHE_WORD_ACCESS=y
CONFIG_DEBUG_BUGVERBOSE=y
CONFIG_DEBUG_INFO=y
CONFIG_DIMLIB=y
CONFIG_DMABUF_HEAPS=y
CONFIG_DMABUF_HEAPS_CMA=y
CONFIG_DMABUF_HEAPS_SYSTEM=y
CONFIG_DMADEVICES=y
CONFIG_DMA_BCM2708=y
CONFIG_DMA_BCM2835=y
CONFIG_DMA_CMA=y
CONFIG_DMA_DIRECT_REMAP=y
CONFIG_DMA_ENGINE=y
CONFIG_DMA_OF=y
CONFIG_DMA_OPS=y
CONFIG_DMA_SHARED_BUFFER=y
CONFIG_DMA_VIRTUAL_CHANNELS=y
CONFIG_DNOTIFY=y
CONFIG_DTC=y
CONFIG_DUMMY_CONSOLE=y
CONFIG_EDAC_SUPPORT=y
CONFIG_EXCLUSIVE_SYSTEM_RAM=y
CONFIG_EXT4_FS=y
CONFIG_EXT4_FS_POSIX_ACL=y
CONFIG_EXT4_FS_SECURITY=y
CONFIG_EXTCON=y
CONFIG_F2FS_FS=y
CONFIG_FB=y
CONFIG_FB_BCM2708=y
CONFIG_FB_CFB_COPYAREA=y
CONFIG_FB_CFB_FILLRECT=y
CONFIG_FB_CFB_IMAGEBLIT=y
CONFIG_FB_CMDLINE=y
CONFIG_FB_SIMPLE=y
CONFIG_FIXED_PHY=y
CONFIG_FIX_EARLYCON_MEM=y
CONFIG_FONT_8x16=y
CONFIG_FONT_8x8=y
CONFIG_FONT_SUPPORT=y
CONFIG_FRAMEBUFFER_CONSOLE=y
# CONFIG_FRAMEBUFFER_CONSOLE_DETECT_PRIMARY is not set
CONFIG_FRAMEBUFFER_CONSOLE_ROTATION=y
CONFIG_FRAME_POINTER=y
CONFIG_FREEZER=y
CONFIG_FSL_ERRATUM_A008585=y
CONFIG_FS_ENCRYPTION=y
CONFIG_FS_ENCRYPTION_ALGS=y
CONFIG_FS_IOMAP=y
CONFIG_FS_MBCACHE=y
CONFIG_FS_POSIX_ACL=y
CONFIG_FWNODE_MDIO=y
CONFIG_FW_CACHE=y
CONFIG_FW_LOADER_PAGED_BUF=y
CONFIG_FW_LOADER_SYSFS=y
CONFIG_GCC11_NO_ARRAY_BOUNDS=y
CONFIG_GCC_SUPPORTS_DYNAMIC_FTRACE_WITH_REGS=y
CONFIG_GENERIC_ALLOCATOR=y
CONFIG_GENERIC_ARCH_TOPOLOGY=y
CONFIG_GENERIC_BUG=y
CONFIG_GENERIC_BUG_RELATIVE_POINTERS=y
CONFIG_GENERIC_CLOCKEVENTS=y
CONFIG_GENERIC_CLOCKEVENTS_BROADCAST=y
CONFIG_GENERIC_CPU_AUTOPROBE=y
CONFIG_GENERIC_CPU_VULNERABILITIES=y
CONFIG_GENERIC_CSUM=y
CONFIG_GENERIC_EARLY_IOREMAP=y
CONFIG_GENERIC_GETTIMEOFDAY=y
CONFIG_GENERIC_IDLE_POLL_SETUP=y
CONFIG_GENERIC_IOREMAP=y
CONFIG_GENERIC_IRQ_CHIP=y
CONFIG_GENERIC_IRQ_EFFECTIVE_AFF_MASK=y
CONFIG_GENERIC_IRQ_INJECTION=y
CONFIG_GENERIC_IRQ_MIGRATION=y
CONFIG_GENERIC_IRQ_SHOW=y
CONFIG_GENERIC_IRQ_SHOW_LEVEL=y
CONFIG_GENERIC_LIB_DEVMEM_IS_ALLOWED=y
CONFIG_GENERIC_MSI_IRQ=y
CONFIG_GENERIC_MSI_IRQ_DOMAIN=y
CONFIG_GENERIC_PCI_IOMAP=y
CONFIG_GENERIC_PHY=y
CONFIG_GENERIC_PINCONF=y
CONFIG_GENERIC_PINCTRL_GROUPS=y
CONFIG_GENERIC_PINMUX_FUNCTIONS=y
CONFIG_GENERIC_SCHED_CLOCK=y
CONFIG_GENERIC_SMP_IDLE_THREAD=y
CONFIG_GENERIC_STRNCPY_FROM_USER=y
CONFIG_GENERIC_STRNLEN_USER=y
CONFIG_GENERIC_TIME_VSYSCALL=y
CONFIG_GLOB=y
CONFIG_GPIOLIB_IRQCHIP=y
CONFIG_GPIO_BCM_VIRT=y
CONFIG_GPIO_BRCMSTB=y
CONFIG_GPIO_CDEV=y
# CONFIG_GPIO_FSM is not set
CONFIG_GPIO_GENERIC=y
CONFIG_GPIO_RASPBERRYPI_EXP=y
CONFIG_HARDIRQS_SW_RESEND=y
CONFIG_HAS_DMA=y
CONFIG_HAS_IOMEM=y
CONFIG_HAS_IOPORT_MAP=y
CONFIG_HOTPLUG_CPU=y
CONFIG_HOTPLUG_PCI=y
# CONFIG_HOTPLUG_PCI_CPCI is not set
# CONFIG_HOTPLUG_PCI_PCIE is not set
CONFIG_HOTPLUG_PCI_SHPC=y
CONFIG_HWMON=y
CONFIG_HW_CONSOLE=y
CONFIG_HW_RANDOM=y
CONFIG_HW_RANDOM_IPROC_RNG200=y
CONFIG_I2C=y
CONFIG_I2C_ALGOBIT=y
# CONFIG_I2C_BCM2708 is not set
CONFIG_I2C_BCM2835=y
CONFIG_I2C_BOARDINFO=y
CONFIG_I2C_BRCMSTB=y
CONFIG_I2C_DESIGNWARE_CORE=y
CONFIG_I2C_DESIGNWARE_PLATFORM=y
CONFIG_ILLEGAL_POINTER_VALUE=0xdead000000000000
CONFIG_INPUT=y
CONFIG_INPUT_MOUSEDEV=y
# CONFIG_INPUT_MOUSEDEV_PSAUX is not set
CONFIG_INPUT_MOUSEDEV_SCREEN_X=1024
CONFIG_INPUT_MOUSEDEV_SCREEN_Y=768
CONFIG_INPUT_RASPBERRYPI_BUTTON=y
CONFIG_IOMMU_API=y
# CONFIG_IOMMU_DEBUGFS is not set
# CONFIG_IOMMU_DEFAULT_DMA_LAZY is not set
CONFIG_IOMMU_DEFAULT_DMA_STRICT=y
# CONFIG_IOMMU_DEFAULT_PASSTHROUGH is not set
CONFIG_IOMMU_DMA=y
CONFIG_IOMMU_IOVA=y
# CONFIG_IOMMU_IO_PGTABLE_ARMV7S is not set
# CONFIG_IOMMU_IO_PGTABLE_DART is not set
# CONFIG_IOMMU_IO_PGTABLE_LPAE is not set
CONFIG_IOMMU_SUPPORT=y
CONFIG_IRQCHIP=y
CONFIG_IRQ_DOMAIN=y
CONFIG_IRQ_DOMAIN_HIERARCHY=y
CONFIG_IRQ_FORCED_THREADING=y
CONFIG_IRQ_MSI_IOMMU=y
CONFIG_IRQ_WORK=y
CONFIG_JBD2=y
CONFIG_KEYS=y
CONFIG_LEDS_GPIO=y
CONFIG_LEDS_PWM=y
CONFIG_LEDS_TRIGGER_ACTPWR=y
CONFIG_LEDS_TRIGGER_INPUT=y
CONFIG_LIBFDT=y
CONFIG_LOCK_DEBUGGING_SUPPORT=y
CONFIG_LOCK_SPIN_ON_OWNER=y
CONFIG_LOGO=y
CONFIG_LOGO_LINUX_CLUT224=y
# CONFIG_LOGO_LINUX_MONO is not set
# CONFIG_LOGO_LINUX_VGA16 is not set
CONFIG_MACB=y
CONFIG_MACB_PCI=y
CONFIG_MACB_USE_HWSTAMP=y
CONFIG_MAC_PARTITION=y
CONFIG_MAGIC_SYSRQ=y
CONFIG_MAILBOX=y
# CONFIG_MAILBOX_TEST is not set
CONFIG_MDIO_BCM_UNIMAC=y
CONFIG_MDIO_BUS=y
CONFIG_MDIO_DEVICE=y
CONFIG_MDIO_DEVRES=y
CONFIG_MEDIA_CAMERA_SUPPORT=y
CONFIG_MEDIA_CONTROLLER=y
CONFIG_MEDIA_PLATFORM_DRIVERS=y
CONFIG_MEDIA_PLATFORM_SUPPORT=y
CONFIG_MEDIA_SUPPORT=y
CONFIG_MEDIA_SUPPORT_FILTER=y
CONFIG_MEMFD_CREATE=y
CONFIG_MEMORY=y
CONFIG_MEMORY_ISOLATION=y
CONFIG_MFD_CORE=y
CONFIG_MFD_RP1=y
CONFIG_MFD_SYSCON=y
CONFIG_MICROCHIP_PHY=y
CONFIG_MIGRATION=y
CONFIG_MMC=y
# CONFIG_MMC_BCM2835 is not set
CONFIG_MMC_BCM2835_DMA=y
CONFIG_MMC_BCM2835_MMC=y
CONFIG_MMC_BCM2835_PIO_DMA_BARRIER=2
CONFIG_MMC_BCM2835_SDHOST=y
CONFIG_MMC_BLOCK=y
CONFIG_MMC_BLOCK_MINORS=32
CONFIG_MMC_CQHCI=y
CONFIG_MMC_SDHCI=y
CONFIG_MMC_SDHCI_BRCMSTB=y
CONFIG_MMC_SDHCI_IO_ACCESSORS=y
CONFIG_MMC_SDHCI_IPROC=y
CONFIG_MMC_SDHCI_OF_DWCMSHC=y
# CONFIG_MMC_SDHCI_PCI is not set
CONFIG_MMC_SDHCI_PLTFM=y
CONFIG_MODULES_USE_ELF_RELA=y
CONFIG_MUTEX_SPIN_ON_OWNER=y
CONFIG_NEED_DMA_MAP_STATE=y
CONFIG_NEED_SG_DMA_LENGTH=y
CONFIG_NET_FLOW_LIMIT=y
CONFIG_NET_PTP_CLASSIFY=y
CONFIG_NET_SELFTESTS=y
CONFIG_NLS=y
CONFIG_NLS_ASCII=y
CONFIG_NOP_USB_XCEIV=y
CONFIG_NO_HZ=y
CONFIG_NO_HZ_COMMON=y
CONFIG_NO_HZ_IDLE=y
CONFIG_NR_CPUS=4
CONFIG_NVMEM=y
CONFIG_NVMEM_LAYOUTS=y
CONFIG_NVME_CORE=y
# CONFIG_NVME_HWMON is not set
# CONFIG_NVME_MULTIPATH is not set
CONFIG_OF=y
CONFIG_OF_ADDRESS=y
CONFIG_OF_CONFIGFS=y
CONFIG_OF_DYNAMIC=y
CONFIG_OF_EARLY_FLATTREE=y
CONFIG_OF_FLATTREE=y
CONFIG_OF_GPIO=y
CONFIG_OF_IOMMU=y
CONFIG_OF_IRQ=y
CONFIG_OF_KOBJ=y
CONFIG_OF_MDIO=y
CONFIG_OF_OVERLAY=y
CONFIG_OF_RESOLVE=y
CONFIG_PADATA=y
CONFIG_PAGE_POOL=y
CONFIG_PAGE_SIZE_LESS_THAN_256KB=y
CONFIG_PAGE_SIZE_LESS_THAN_64KB=y
CONFIG_PARTITION_PERCPU=y
CONFIG_PCI=y
CONFIG_PCIEAER=y
CONFIG_PCIEAER_INJECT=y
CONFIG_PCIEASPM=y
# CONFIG_PCIEASPM_DEFAULT is not set
# CONFIG_PCIEASPM_PERFORMANCE is not set
CONFIG_PCIEASPM_POWERSAVE=y
# CONFIG_PCIEASPM_POWER_SUPERSAVE is not set
CONFIG_PCIEPORTBUS=y
CONFIG_PCIE_BRCMSTB=y
CONFIG_PCIE_DPC=y
CONFIG_PCIE_DW=y
CONFIG_PCIE_DW_HOST=y
CONFIG_PCIE_DW_PLAT=y
CONFIG_PCIE_DW_PLAT_HOST=y
CONFIG_PCIE_MICROCHIP_HOST=y
CONFIG_PCIE_PME=y
CONFIG_PCI_DOMAINS=y
CONFIG_PCI_DOMAINS_GENERIC=y
CONFIG_PCI_ECAM=y
CONFIG_PCI_HOST_COMMON=y
CONFIG_PCI_HOST_GENERIC=y
CONFIG_PCI_MSI=y
CONFIG_PCI_MSI_IRQ_DOMAIN=y
CONFIG_PCI_STUB=y
CONFIG_PGTABLE_LEVELS=3
CONFIG_PHYLIB=y
CONFIG_PHYLINK=y
CONFIG_PHYS_ADDR_T_64BIT=y
# CONFIG_PHY_BRCM_SATA is not set
CONFIG_PHY_BRCM_USB=y
CONFIG_PINCTRL=y
CONFIG_PINCTRL_BCM2712=y
CONFIG_PINCTRL_BCM2835=y
CONFIG_PINCTRL_RP1=y
CONFIG_PM=y
CONFIG_PM_CLK=y
CONFIG_PM_GENERIC_DOMAINS=y
CONFIG_PM_GENERIC_DOMAINS_OF=y
CONFIG_PM_GENERIC_DOMAINS_SLEEP=y
CONFIG_PM_OPP=y
CONFIG_PM_SLEEP=y
CONFIG_PM_SLEEP_SMP=y
CONFIG_POSIX_CPU_TIMERS_TASK_WORK=y
CONFIG_POWER_RESET=y
CONFIG_POWER_RESET_GPIO=y
CONFIG_POWER_SUPPLY=y
CONFIG_PPS=y
CONFIG_PREEMPT_NONE_BUILD=y
CONFIG_PRINTK_TIME=y
CONFIG_PTP_1588_CLOCK=y
CONFIG_PTP_1588_CLOCK_OPTIONAL=y
CONFIG_PWM=y
CONFIG_PWM_BCM2835=y
CONFIG_PWM_BRCMSTB=y
CONFIG_PWM_RP1=y
CONFIG_PWM_SYSFS=y
CONFIG_QUEUED_RWLOCKS=y
CONFIG_QUEUED_SPINLOCKS=y
CONFIG_RANDSTRUCT_NONE=y
CONFIG_RAS=y
CONFIG_RASPBERRYPI_FIRMWARE=y
CONFIG_RASPBERRYPI_GPIOMEM=y
CONFIG_RASPBERRYPI_POWER=y
CONFIG_RATIONAL=y
# CONFIG_RAVE_SP_CORE is not set
CONFIG_REGMAP=y
CONFIG_REGMAP_MMIO=y
CONFIG_REGULATOR=y
CONFIG_REGULATOR_FIXED_VOLTAGE=y
CONFIG_REGULATOR_GPIO=y
CONFIG_RESET_BRCMSTB=y
CONFIG_RESET_BRCMSTB_RESCAL=y
CONFIG_RESET_CONTROLLER=y
CONFIG_RESET_RASPBERRYPI=y
CONFIG_RESET_SIMPLE=y
CONFIG_RFS_ACCEL=y
CONFIG_RODATA_FULL_DEFAULT_ENABLED=y
# CONFIG_RPIVID_MEM is not set
# CONFIG_RPI_POE_POWER is not set
CONFIG_RPS=y
CONFIG_RTC_CLASS=y
CONFIG_RTC_DRV_BRCMSTB=y
CONFIG_RTC_DRV_RPI=y
CONFIG_RTC_I2C_AND_SPI=y
CONFIG_RWSEM_SPIN_ON_OWNER=y
CONFIG_SCSI=y
CONFIG_SCSI_COMMON=y
# CONFIG_SCSI_LOWLEVEL is not set
# CONFIG_SCSI_PROC_FS is not set
CONFIG_SENSORS_RASPBERRYPI_HWMON=y
CONFIG_SENSORS_RP1_ADC=y
CONFIG_SERIAL_8250_BCM2835AUX=y
CONFIG_SERIAL_8250_BCM7271=y
# CONFIG_SERIAL_8250_DMA is not set
CONFIG_SERIAL_8250_EXTENDED=y
CONFIG_SERIAL_8250_FSL=y
CONFIG_SERIAL_8250_NR_UARTS=1
CONFIG_SERIAL_8250_RUNTIME_UARTS=0
CONFIG_SERIAL_8250_SHARE_IRQ=y
CONFIG_SERIAL_AMBA_PL011=y
CONFIG_SERIAL_AMBA_PL011_CONSOLE=y
CONFIG_SERIAL_DEV_BUS=y
# CONFIG_SERIAL_DEV_CTRL_TTYPORT is not set
CONFIG_SERIAL_MCTRL_GPIO=y
CONFIG_SERIAL_OF_PLATFORM=y
CONFIG_SG_POOL=y
CONFIG_SMP=y
CONFIG_SMSC_PHY=y
CONFIG_SOCK_RX_QUEUE_MAPPING=y
CONFIG_SOC_BRCMSTB=y
CONFIG_SOC_BUS=y
CONFIG_SOFTIRQ_ON_OWN_STACK=y
CONFIG_SPARSEMEM=y
CONFIG_SPARSEMEM_EXTREME=y
CONFIG_SPARSEMEM_VMEMMAP=y
CONFIG_SPARSEMEM_VMEMMAP_ENABLE=y
CONFIG_SPARSE_IRQ=y
CONFIG_SRCU=y
# CONFIG_STRIP_ASM_SYMS is not set
CONFIG_SUSPEND=y
CONFIG_SUSPEND_FREEZER=y
CONFIG_SWIOTLB=y
CONFIG_SWPHY=y
CONFIG_SYSCTL_EXCEPTION_TRACE=y
# CONFIG_TEXTSEARCH is not set
CONFIG_THERMAL=y
CONFIG_THERMAL_DEFAULT_GOV_STEP_WISE=y
CONFIG_THERMAL_EMERGENCY_POWEROFF_DELAY_MS=0
CONFIG_THERMAL_GOV_STEP_WISE=y
CONFIG_THERMAL_OF=y
CONFIG_THERMAL_WRITABLE_TRIPS=y
CONFIG_THREAD_INFO_IN_TASK=y
CONFIG_TICK_CPU_ACCOUNTING=y
CONFIG_TIMER_OF=y
CONFIG_TIMER_PROBE=y
CONFIG_TMPFS_POSIX_ACL=y
CONFIG_TRACE_IRQFLAGS_NMI_SUPPORT=y
CONFIG_TREE_RCU=y
CONFIG_TREE_SRCU=y
# CONFIG_UACCE is not set
# CONFIG_UCLAMP_TASK is not set
CONFIG_UEVENT_HELPER_PATH=""
CONFIG_UNMAP_KERNEL_AT_EL0=y
CONFIG_USB=y
CONFIG_USB_ANNOUNCE_NEW_DEVICES=y
# CONFIG_USB_BRCMSTB is not set
CONFIG_USB_COMMON=y
CONFIG_USB_DWC3=y
# CONFIG_USB_DWC3_DUAL_ROLE is not set
# CONFIG_USB_DWC3_GADGET is not set
CONFIG_USB_DWC3_HOST=y
CONFIG_USB_DWCOTG=y
CONFIG_USB_GADGET=y
# CONFIG_USB_HCD_BCMA is not set
CONFIG_USB_PCI=y
CONFIG_USB_PHY=y
CONFIG_USB_STORAGE=y
CONFIG_USB_SUPPORT=y
CONFIG_USB_UAS=y
# CONFIG_USB_UHCI_HCD is not set
CONFIG_USB_XHCI_HCD=y
CONFIG_USB_XHCI_PCI=y
CONFIG_USB_XHCI_PLATFORM=y
CONFIG_VCHIQ_CDEV=y
CONFIG_VIDEO_DEV=y
CONFIG_VIDEO_V4L2_I2C=y
CONFIG_VMAP_STACK=y
CONFIG_VT=y
CONFIG_VT_CONSOLE=y
CONFIG_VT_CONSOLE_SLEEP=y
CONFIG_VT_HW_CONSOLE_BINDING=y
CONFIG_WATCHDOG_CORE=y
CONFIG_XPS=y
CONFIG_XZ_DEC_ARM=y
CONFIG_XZ_DEC_BCJ=y
CONFIG_ZONE_DMA32=y

View file

@ -1,107 +0,0 @@
From e2726f05782135e15537575e95faea46c40a88a2 Mon Sep 17 00:00:00 2001
From: Dom Cobley <popcornmix@gmail.com>
Date: Thu, 7 Apr 2022 18:23:07 +0100
Subject: [PATCH 0003/1002] raspberrypi-firmware: Update mailbox commands
Signed-off-by: Dom Cobley <popcornmix@gmail.com>
---
include/soc/bcm2835/raspberrypi-firmware.h | 28 +++++++++++++++++++++-
1 file changed, 27 insertions(+), 1 deletion(-)
diff --git a/include/soc/bcm2835/raspberrypi-firmware.h b/include/soc/bcm2835/raspberrypi-firmware.h
index 73cac8d0287e..c93c98e09299 100644
--- a/include/soc/bcm2835/raspberrypi-firmware.h
+++ b/include/soc/bcm2835/raspberrypi-firmware.h
@@ -36,6 +36,8 @@ struct rpi_firmware_property_tag_header {
enum rpi_firmware_property_tag {
RPI_FIRMWARE_PROPERTY_END = 0,
RPI_FIRMWARE_GET_FIRMWARE_REVISION = 0x00000001,
+ RPI_FIRMWARE_GET_FIRMWARE_VARIANT = 0x00000002,
+ RPI_FIRMWARE_GET_FIRMWARE_HASH = 0x00000003,
RPI_FIRMWARE_SET_CURSOR_INFO = 0x00008010,
RPI_FIRMWARE_SET_CURSOR_STATE = 0x00008011,
@@ -71,6 +73,7 @@ enum rpi_firmware_property_tag {
RPI_FIRMWARE_GET_DISPMANX_RESOURCE_MEM_HANDLE = 0x00030014,
RPI_FIRMWARE_GET_EDID_BLOCK = 0x00030020,
RPI_FIRMWARE_GET_CUSTOMER_OTP = 0x00030021,
+ RPI_FIRMWARE_GET_EDID_BLOCK_DISPLAY = 0x00030023,
RPI_FIRMWARE_GET_DOMAIN_STATE = 0x00030030,
RPI_FIRMWARE_GET_THROTTLED = 0x00030046,
RPI_FIRMWARE_GET_CLOCK_MEASURED = 0x00030047,
@@ -89,8 +92,11 @@ enum rpi_firmware_property_tag {
RPI_FIRMWARE_GET_PERIPH_REG = 0x00030045,
RPI_FIRMWARE_SET_PERIPH_REG = 0x00038045,
RPI_FIRMWARE_GET_POE_HAT_VAL = 0x00030049,
- RPI_FIRMWARE_SET_POE_HAT_VAL = 0x00030050,
+ RPI_FIRMWARE_SET_POE_HAT_VAL = 0x00038049,
+ RPI_FIRMWARE_SET_POE_HAT_VAL_OLD = 0x00030050,
RPI_FIRMWARE_NOTIFY_XHCI_RESET = 0x00030058,
+ RPI_FIRMWARE_GET_REBOOT_FLAGS = 0x00030064,
+ RPI_FIRMWARE_SET_REBOOT_FLAGS = 0x00038064,
RPI_FIRMWARE_NOTIFY_DISPLAY_DONE = 0x00030066,
/* Dispmanx TAGS */
@@ -105,9 +111,16 @@ enum rpi_firmware_property_tag {
RPI_FIRMWARE_FRAMEBUFFER_GET_VIRTUAL_OFFSET = 0x00040009,
RPI_FIRMWARE_FRAMEBUFFER_GET_OVERSCAN = 0x0004000a,
RPI_FIRMWARE_FRAMEBUFFER_GET_PALETTE = 0x0004000b,
+ RPI_FIRMWARE_FRAMEBUFFER_GET_LAYER = 0x0004000c,
+ RPI_FIRMWARE_FRAMEBUFFER_GET_TRANSFORM = 0x0004000d,
+ RPI_FIRMWARE_FRAMEBUFFER_GET_VSYNC = 0x0004000e,
RPI_FIRMWARE_FRAMEBUFFER_GET_TOUCHBUF = 0x0004000f,
RPI_FIRMWARE_FRAMEBUFFER_GET_GPIOVIRTBUF = 0x00040010,
RPI_FIRMWARE_FRAMEBUFFER_RELEASE = 0x00048001,
+ RPI_FIRMWARE_FRAMEBUFFER_GET_DISPLAY_ID = 0x00040016,
+ RPI_FIRMWARE_FRAMEBUFFER_SET_DISPLAY_NUM = 0x00048013,
+ RPI_FIRMWARE_FRAMEBUFFER_GET_NUM_DISPLAYS = 0x00040013,
+ RPI_FIRMWARE_FRAMEBUFFER_GET_DISPLAY_SETTINGS = 0x00040014,
RPI_FIRMWARE_FRAMEBUFFER_TEST_PHYSICAL_WIDTH_HEIGHT = 0x00044003,
RPI_FIRMWARE_FRAMEBUFFER_TEST_VIRTUAL_WIDTH_HEIGHT = 0x00044004,
RPI_FIRMWARE_FRAMEBUFFER_TEST_DEPTH = 0x00044005,
@@ -116,22 +129,33 @@ enum rpi_firmware_property_tag {
RPI_FIRMWARE_FRAMEBUFFER_TEST_VIRTUAL_OFFSET = 0x00044009,
RPI_FIRMWARE_FRAMEBUFFER_TEST_OVERSCAN = 0x0004400a,
RPI_FIRMWARE_FRAMEBUFFER_TEST_PALETTE = 0x0004400b,
+ RPI_FIRMWARE_FRAMEBUFFER_TEST_LAYER = 0x0004400c,
+ RPI_FIRMWARE_FRAMEBUFFER_TEST_TRANSFORM = 0x0004400d,
RPI_FIRMWARE_FRAMEBUFFER_TEST_VSYNC = 0x0004400e,
RPI_FIRMWARE_FRAMEBUFFER_SET_PHYSICAL_WIDTH_HEIGHT = 0x00048003,
RPI_FIRMWARE_FRAMEBUFFER_SET_VIRTUAL_WIDTH_HEIGHT = 0x00048004,
RPI_FIRMWARE_FRAMEBUFFER_SET_DEPTH = 0x00048005,
RPI_FIRMWARE_FRAMEBUFFER_SET_PIXEL_ORDER = 0x00048006,
RPI_FIRMWARE_FRAMEBUFFER_SET_ALPHA_MODE = 0x00048007,
+ RPI_FIRMWARE_FRAMEBUFFER_SET_PITCH = 0x00048008,
RPI_FIRMWARE_FRAMEBUFFER_SET_VIRTUAL_OFFSET = 0x00048009,
RPI_FIRMWARE_FRAMEBUFFER_SET_OVERSCAN = 0x0004800a,
RPI_FIRMWARE_FRAMEBUFFER_SET_PALETTE = 0x0004800b,
+
RPI_FIRMWARE_FRAMEBUFFER_SET_TOUCHBUF = 0x0004801f,
RPI_FIRMWARE_FRAMEBUFFER_SET_GPIOVIRTBUF = 0x00048020,
RPI_FIRMWARE_FRAMEBUFFER_SET_VSYNC = 0x0004800e,
+ RPI_FIRMWARE_FRAMEBUFFER_SET_LAYER = 0x0004800c,
+ RPI_FIRMWARE_FRAMEBUFFER_SET_TRANSFORM = 0x0004800d,
RPI_FIRMWARE_FRAMEBUFFER_SET_BACKLIGHT = 0x0004800f,
RPI_FIRMWARE_VCHIQ_INIT = 0x00048010,
+ RPI_FIRMWARE_SET_PLANE = 0x00048015,
+ RPI_FIRMWARE_GET_DISPLAY_TIMING = 0x00040017,
+ RPI_FIRMWARE_SET_TIMING = 0x00048017,
+ RPI_FIRMWARE_GET_DISPLAY_CFG = 0x00040018,
+ RPI_FIRMWARE_SET_DISPLAY_POWER = 0x00048019,
RPI_FIRMWARE_GET_COMMAND_LINE = 0x00050001,
RPI_FIRMWARE_GET_DMA_CHANNELS = 0x00060001,
};
@@ -155,6 +179,8 @@ enum rpi_firmware_clk_id {
RPI_FIRMWARE_NUM_CLK_ID,
};
+#define GET_DISPLAY_SETTINGS_PAYLOAD_SIZE 64
+
/**
* struct rpi_firmware_clk_rate_request - Firmware Request for a rate
* @id: ID of the clock being queried
--
2.44.0

View file

@ -1,32 +0,0 @@
From 719d68c874bde83f2410dc41a34c3ddf6d71bda9 Mon Sep 17 00:00:00 2001
From: Dave Stevenson <dave.stevenson@raspberrypi.com>
Date: Tue, 19 May 2020 16:20:30 +0100
Subject: [PATCH 0004/1002] drm/vc4: Add FKMS as an acceptable node for dma
ranges.
Under FKMS, the firmware (via FKMS) also requires the VideoCore cache
aliases for image planes, as defined by the dma-ranges under /soc.
Add rpi-firmware-kms to the list of acceptable nodes to look for
to copy dma config from.
Signed-off-by: Dave Stevenson <dave.stevenson@raspberrypi.com>
---
drivers/gpu/drm/vc4/vc4_drv.c | 1 +
1 file changed, 1 insertion(+)
diff --git a/drivers/gpu/drm/vc4/vc4_drv.c b/drivers/gpu/drm/vc4/vc4_drv.c
index 1b3531374967..6913e10023fa 100644
--- a/drivers/gpu/drm/vc4/vc4_drv.c
+++ b/drivers/gpu/drm/vc4/vc4_drv.c
@@ -276,6 +276,7 @@ static void vc4_component_unbind_all(void *ptr)
static const struct of_device_id vc4_dma_range_matches[] = {
{ .compatible = "brcm,bcm2711-hvs" },
{ .compatible = "brcm,bcm2835-hvs" },
+ { .compatible = "raspberrypi,rpi-firmware-kms" },
{ .compatible = "brcm,bcm2835-v3d" },
{ .compatible = "brcm,cygnus-v3d" },
{ .compatible = "brcm,vc4-v3d" },
--
2.44.0

View file

@ -1,30 +0,0 @@
From de213e0c7477e4c1be9a80cd9ebf97227ed75dbe Mon Sep 17 00:00:00 2001
From: Dave Stevenson <dave.stevenson@raspberrypi.com>
Date: Thu, 7 Jan 2021 16:30:55 +0000
Subject: [PATCH 0005/1002] drm/atomic: Don't fixup modes that haven't been
reset
Signed-off-by: Dave Stevenson <dave.stevenson@raspberrypi.com>
---
drivers/gpu/drm/drm_atomic_helper.c | 5 +++++
1 file changed, 5 insertions(+)
diff --git a/drivers/gpu/drm/drm_atomic_helper.c b/drivers/gpu/drm/drm_atomic_helper.c
index 554d4468aa7c..3f23927c9162 100644
--- a/drivers/gpu/drm/drm_atomic_helper.c
+++ b/drivers/gpu/drm/drm_atomic_helper.c
@@ -443,6 +443,11 @@ mode_fixup(struct drm_atomic_state *state)
new_crtc_state =
drm_atomic_get_new_crtc_state(state, new_conn_state->crtc);
+ if (!new_crtc_state->mode_changed &&
+ !new_crtc_state->connectors_changed) {
+ continue;
+ }
+
/*
* Each encoder has at most one connector (since we always steal
* it away), so we won't call ->mode_fixup twice.
--
2.44.0

View file

@ -1,215 +0,0 @@
From 4fac21e3a4d37667a86c762064dad5f76c42c235 Mon Sep 17 00:00:00 2001
From: Mateusz Kwiatkowski <kfyatek+publicgit@gmail.com>
Date: Thu, 15 Jul 2021 01:08:01 +0200
Subject: [PATCH 0006/1002] drm/vc4: Allow setting the TV norm via module
parameter
Similar to the ch7006 and nouveau drivers, introduce a "tv_mode" module
parameter that allow setting the TV norm by specifying vc4.tv_norm= on
the kernel command line.
If that is not specified, try inferring one of the most popular norms
(PAL or NTSC) from the video mode specified on the command line. On
Raspberry Pis, this causes the most common cases of the sdtv_mode
setting in config.txt to be respected.
Signed-off-by: Mateusz Kwiatkowski <kfyatek+publicgit@gmail.com>
---
drivers/gpu/drm/vc4/vc4_vec.c | 108 +++++++++++++++++++++++++---------
1 file changed, 81 insertions(+), 27 deletions(-)
diff --git a/drivers/gpu/drm/vc4/vc4_vec.c b/drivers/gpu/drm/vc4/vc4_vec.c
index 268f18b10ee0..83c2d6f94c8d 100644
--- a/drivers/gpu/drm/vc4/vc4_vec.c
+++ b/drivers/gpu/drm/vc4/vc4_vec.c
@@ -67,7 +67,7 @@
#define VEC_CONFIG0_YCDELAY BIT(4)
#define VEC_CONFIG0_RAMPEN BIT(2)
#define VEC_CONFIG0_YCDIS BIT(2)
-#define VEC_CONFIG0_STD_MASK GENMASK(1, 0)
+#define VEC_CONFIG0_STD_MASK (VEC_CONFIG0_SECAM_STD | GENMASK(1, 0))
#define VEC_CONFIG0_NTSC_STD 0
#define VEC_CONFIG0_PAL_BDGHI_STD 1
#define VEC_CONFIG0_PAL_M_STD 2
@@ -186,6 +186,8 @@
#define VEC_DAC_MISC_DAC_RST_N BIT(0)
+static char *vc4_vec_tv_norm;
+
struct vc4_vec_variant {
u32 dac_config;
};
@@ -353,6 +355,33 @@ static const struct drm_prop_enum_list legacy_tv_mode_names[] = {
{ VC4_VEC_TV_MODE_SECAM, "SECAM", },
};
+enum drm_connector_tv_mode
+vc4_vec_get_default_mode(struct drm_connector *connector)
+{
+ if (vc4_vec_tv_norm) {
+ int ret;
+
+ ret = drm_get_tv_mode_from_name(vc4_vec_tv_norm, strlen(vc4_vec_tv_norm));
+ if (ret >= 0)
+ return ret;
+ } else if (connector->cmdline_mode.specified &&
+ ((connector->cmdline_mode.refresh_specified &&
+ (connector->cmdline_mode.refresh == 25 ||
+ connector->cmdline_mode.refresh == 50)) ||
+ (!connector->cmdline_mode.refresh_specified &&
+ (connector->cmdline_mode.yres == 288 ||
+ connector->cmdline_mode.yres == 576)))) {
+ /*
+ * no explicitly specified TV norm; use PAL if a mode that
+ * looks like PAL has been specified on the command line
+ */
+ return DRM_MODE_TV_MODE_PAL;
+ }
+
+ /* in all other cases, default to NTSC */
+ return DRM_MODE_TV_MODE_NTSC;
+}
+
static enum drm_connector_status
vc4_vec_connector_detect(struct drm_connector *connector, bool force)
{
@@ -363,6 +392,10 @@ static void vc4_vec_connector_reset(struct drm_connector *connector)
{
drm_atomic_helper_connector_reset(connector);
drm_atomic_helper_connector_tv_reset(connector);
+
+ /* preserve TV standard */
+ if (connector->state)
+ connector->state->tv.mode = vc4_vec_get_default_mode(connector);
}
static int
@@ -414,48 +447,52 @@ vc4_vec_connector_set_property(struct drm_connector *connector,
}
static int
-vc4_vec_connector_get_property(struct drm_connector *connector,
- const struct drm_connector_state *state,
- struct drm_property *property,
- uint64_t *val)
+vc4_vec_generic_tv_mode_to_legacy(enum drm_connector_tv_mode tv_mode)
{
- struct vc4_vec *vec = connector_to_vc4_vec(connector);
-
- if (property != vec->legacy_tv_mode_property)
- return -EINVAL;
-
- switch (state->tv.mode) {
+ switch (tv_mode) {
case DRM_MODE_TV_MODE_NTSC:
- *val = VC4_VEC_TV_MODE_NTSC;
- break;
+ return VC4_VEC_TV_MODE_NTSC;
case DRM_MODE_TV_MODE_NTSC_443:
- *val = VC4_VEC_TV_MODE_NTSC_443;
- break;
+ return VC4_VEC_TV_MODE_NTSC_443;
case DRM_MODE_TV_MODE_NTSC_J:
- *val = VC4_VEC_TV_MODE_NTSC_J;
- break;
+ return VC4_VEC_TV_MODE_NTSC_J;
case DRM_MODE_TV_MODE_PAL:
- *val = VC4_VEC_TV_MODE_PAL;
- break;
+ return VC4_VEC_TV_MODE_PAL;
case DRM_MODE_TV_MODE_PAL_M:
- *val = VC4_VEC_TV_MODE_PAL_M;
- break;
+ return VC4_VEC_TV_MODE_PAL_M;
case DRM_MODE_TV_MODE_PAL_N:
- *val = VC4_VEC_TV_MODE_PAL_N;
- break;
+ return VC4_VEC_TV_MODE_PAL_N;
case DRM_MODE_TV_MODE_SECAM:
- *val = VC4_VEC_TV_MODE_SECAM;
- break;
+ return VC4_VEC_TV_MODE_SECAM;
default:
return -EINVAL;
}
+}
+
+static int
+vc4_vec_connector_get_property(struct drm_connector *connector,
+ const struct drm_connector_state *state,
+ struct drm_property *property,
+ uint64_t *val)
+{
+ struct vc4_vec *vec = connector_to_vc4_vec(connector);
+ enum vc4_vec_tv_mode_id legacy_mode;
+
+ if (property != vec->legacy_tv_mode_property)
+ return -EINVAL;
+
+ legacy_mode = vc4_vec_generic_tv_mode_to_legacy(state->tv.mode);
+ if (legacy_mode < 0)
+ return legacy_mode;
+
+ *val = legacy_mode;
return 0;
}
@@ -478,6 +515,8 @@ static const struct drm_connector_helper_funcs vc4_vec_connector_helper_funcs =
static int vc4_vec_connector_init(struct drm_device *dev, struct vc4_vec *vec)
{
struct drm_connector *connector = &vec->connector;
+ enum vc4_vec_tv_mode_id legacy_default_mode;
+ enum drm_connector_tv_mode default_mode;
struct drm_property *prop;
int ret;
@@ -490,9 +529,17 @@ static int vc4_vec_connector_init(struct drm_device *dev, struct vc4_vec *vec)
drm_connector_helper_add(connector, &vc4_vec_connector_helper_funcs);
+ default_mode = vc4_vec_get_default_mode(connector);
+ if (default_mode < 0)
+ return default_mode;
+
drm_object_attach_property(&connector->base,
dev->mode_config.tv_mode_property,
- DRM_MODE_TV_MODE_NTSC);
+ default_mode);
+
+ legacy_default_mode = vc4_vec_generic_tv_mode_to_legacy(default_mode);
+ if (legacy_default_mode < 0)
+ return legacy_default_mode;
prop = drm_property_create_enum(dev, 0, "mode",
legacy_tv_mode_names,
@@ -501,7 +548,7 @@ static int vc4_vec_connector_init(struct drm_device *dev, struct vc4_vec *vec)
return -ENOMEM;
vec->legacy_tv_mode_property = prop;
- drm_object_attach_property(&connector->base, prop, VC4_VEC_TV_MODE_NTSC);
+ drm_object_attach_property(&connector->base, prop, legacy_default_mode);
drm_connector_attach_encoder(connector, &vec->encoder.base);
@@ -825,3 +872,10 @@ struct platform_driver vc4_vec_driver = {
.of_match_table = vc4_vec_dt_match,
},
};
+
+module_param_named(tv_norm, vc4_vec_tv_norm, charp, 0600);
+MODULE_PARM_DESC(tv_norm, "Default TV norm.\n"
+ "\t\tSupported: NTSC, NTSC-J, NTSC-443, PAL, PAL-M, PAL-N,\n"
+ "\t\t\tPAL60, SECAM.\n"
+ "\t\tDefault: PAL if a 50 Hz mode has been set via video=,\n"
+ "\t\t\tNTSC otherwise");
--
2.44.0

View file

@ -1,287 +0,0 @@
From efed9f6403c125e56b9852b81f81632e85feb2eb Mon Sep 17 00:00:00 2001
From: Dave Stevenson <dave.stevenson@raspberrypi.com>
Date: Tue, 27 Apr 2021 14:24:21 +0200
Subject: [PATCH 0008/1002] drm/vc4: Add support for gamma on BCM2711
BCM2711 changes from a 256 entry lookup table to a 16 point
piecewise linear function as the pipeline bitdepth has increased
to make a LUT unwieldy.
Implement a simple conversion from a 256 entry LUT that userspace
is likely to expect to 16 evenly spread points in the PWL. This
could be improved with curve fitting at a later date.
Co-developed-by: Juerg Haefliger <juergh@canonical.com>
Signed-off-by: Juerg Haefliger <juergh@canonical.com>
Signed-off-by: Dave Stevenson <dave.stevenson@raspberrypi.com>
Signed-off-by: Maxime Ripard <maxime@cerno.tech>
---
drivers/gpu/drm/vc4/vc4_crtc.c | 35 ++++++++++---
drivers/gpu/drm/vc4/vc4_drv.h | 28 +++++++++--
drivers/gpu/drm/vc4/vc4_hvs.c | 89 ++++++++++++++++++++++++++++++++--
drivers/gpu/drm/vc4/vc4_regs.h | 22 +++++++++
4 files changed, 162 insertions(+), 12 deletions(-)
diff --git a/drivers/gpu/drm/vc4/vc4_crtc.c b/drivers/gpu/drm/vc4/vc4_crtc.c
index 8b5a7e5eb146..8be9502d3b53 100644
--- a/drivers/gpu/drm/vc4/vc4_crtc.c
+++ b/drivers/gpu/drm/vc4/vc4_crtc.c
@@ -1340,19 +1340,42 @@ int __vc4_crtc_init(struct drm_device *drm,
if (!vc4->is_vc5) {
drm_mode_crtc_set_gamma_size(crtc, ARRAY_SIZE(vc4_crtc->lut_r));
+ } else {
+ /* This is a lie for hvs5 which uses a 16 point PWL, but it
+ * allows for something smarter than just 16 linearly spaced
+ * segments. Conversion is done in vc5_hvs_update_gamma_lut.
+ */
+ drm_mode_crtc_set_gamma_size(crtc, 256);
+ }
- drm_crtc_enable_color_mgmt(crtc, 0, false, crtc->gamma_size);
+ drm_crtc_enable_color_mgmt(crtc, 0, false, crtc->gamma_size);
+ if (!vc4->is_vc5) {
/* We support CTM, but only for one CRTC at a time. It's therefore
* implemented as private driver state in vc4_kms, not here.
*/
drm_crtc_enable_color_mgmt(crtc, 0, true, crtc->gamma_size);
- }
- for (i = 0; i < crtc->gamma_size; i++) {
- vc4_crtc->lut_r[i] = i;
- vc4_crtc->lut_g[i] = i;
- vc4_crtc->lut_b[i] = i;
+ /* Initialize the VC4 gamma LUTs */
+ for (i = 0; i < crtc->gamma_size; i++) {
+ vc4_crtc->lut_r[i] = i;
+ vc4_crtc->lut_g[i] = i;
+ vc4_crtc->lut_b[i] = i;
+ }
+ } else {
+ /* Initialize the VC5 gamma PWL entries. Assume 12-bit pipeline,
+ * evenly spread over full range.
+ */
+ for (i = 0; i < SCALER5_DSPGAMMA_NUM_POINTS; i++) {
+ vc4_crtc->pwl_r[i] =
+ VC5_HVS_SET_GAMMA_ENTRY(i << 8, i << 12, 1 << 8);
+ vc4_crtc->pwl_g[i] =
+ VC5_HVS_SET_GAMMA_ENTRY(i << 8, i << 12, 1 << 8);
+ vc4_crtc->pwl_b[i] =
+ VC5_HVS_SET_GAMMA_ENTRY(i << 8, i << 12, 1 << 8);
+ vc4_crtc->pwl_a[i] =
+ VC5_HVS_SET_GAMMA_ENTRY(i << 8, i << 12, 1 << 8);
+ }
}
return 0;
diff --git a/drivers/gpu/drm/vc4/vc4_drv.h b/drivers/gpu/drm/vc4/vc4_drv.h
index c15afa708a67..e73b05b3b04c 100644
--- a/drivers/gpu/drm/vc4/vc4_drv.h
+++ b/drivers/gpu/drm/vc4/vc4_drv.h
@@ -22,6 +22,7 @@
#include <kunit/test-bug.h>
#include "uapi/drm/vc4_drm.h"
+#include "vc4_regs.h"
struct drm_device;
struct drm_gem_object;
@@ -494,6 +495,17 @@ struct drm_encoder *vc4_find_encoder_by_type(struct drm_device *drm,
return NULL;
}
+struct vc5_gamma_entry {
+ u32 x_c_terms;
+ u32 grad_term;
+};
+
+#define VC5_HVS_SET_GAMMA_ENTRY(x, c, g) (struct vc5_gamma_entry){ \
+ .x_c_terms = VC4_SET_FIELD((x), SCALER5_DSPGAMMA_OFF_X) | \
+ VC4_SET_FIELD((c), SCALER5_DSPGAMMA_OFF_C), \
+ .grad_term = (g) \
+}
+
struct vc4_crtc_data {
const char *name;
@@ -538,9 +550,19 @@ struct vc4_crtc {
/* Timestamp at start of vblank irq - unaffected by lock delays. */
ktime_t t_vblank;
- u8 lut_r[256];
- u8 lut_g[256];
- u8 lut_b[256];
+ union {
+ struct { /* VC4 gamma LUT */
+ u8 lut_r[256];
+ u8 lut_g[256];
+ u8 lut_b[256];
+ };
+ struct { /* VC5 gamma PWL entries */
+ struct vc5_gamma_entry pwl_r[SCALER5_DSPGAMMA_NUM_POINTS];
+ struct vc5_gamma_entry pwl_g[SCALER5_DSPGAMMA_NUM_POINTS];
+ struct vc5_gamma_entry pwl_b[SCALER5_DSPGAMMA_NUM_POINTS];
+ struct vc5_gamma_entry pwl_a[SCALER5_DSPGAMMA_NUM_POINTS];
+ };
+ };
struct drm_pending_vblank_event *event;
diff --git a/drivers/gpu/drm/vc4/vc4_hvs.c b/drivers/gpu/drm/vc4/vc4_hvs.c
index 04af672caacb..2f49412c9b68 100644
--- a/drivers/gpu/drm/vc4/vc4_hvs.c
+++ b/drivers/gpu/drm/vc4/vc4_hvs.c
@@ -243,7 +243,8 @@ static void vc4_hvs_lut_load(struct vc4_hvs *hvs,
static void vc4_hvs_update_gamma_lut(struct vc4_hvs *hvs,
struct vc4_crtc *vc4_crtc)
{
- struct drm_crtc_state *crtc_state = vc4_crtc->base.state;
+ struct drm_crtc *crtc = &vc4_crtc->base;
+ struct drm_crtc_state *crtc_state = crtc->state;
struct drm_color_lut *lut = crtc_state->gamma_lut->data;
u32 length = drm_color_lut_size(crtc_state->gamma_lut);
u32 i;
@@ -257,6 +258,81 @@ static void vc4_hvs_update_gamma_lut(struct vc4_hvs *hvs,
vc4_hvs_lut_load(hvs, vc4_crtc);
}
+static void vc5_hvs_write_gamma_entry(struct vc4_hvs *hvs,
+ u32 offset,
+ struct vc5_gamma_entry *gamma)
+{
+ HVS_WRITE(offset, gamma->x_c_terms);
+ HVS_WRITE(offset + 4, gamma->grad_term);
+}
+
+static void vc5_hvs_lut_load(struct vc4_hvs *hvs,
+ struct vc4_crtc *vc4_crtc)
+{
+ struct drm_crtc *crtc = &vc4_crtc->base;
+ struct drm_crtc_state *crtc_state = crtc->state;
+ struct vc4_crtc_state *vc4_state = to_vc4_crtc_state(crtc_state);
+ u32 i;
+ u32 offset = SCALER5_DSPGAMMA_START +
+ vc4_state->assigned_channel * SCALER5_DSPGAMMA_CHAN_OFFSET;
+
+ for (i = 0; i < SCALER5_DSPGAMMA_NUM_POINTS; i++, offset += 8)
+ vc5_hvs_write_gamma_entry(hvs, offset, &vc4_crtc->pwl_r[i]);
+ for (i = 0; i < SCALER5_DSPGAMMA_NUM_POINTS; i++, offset += 8)
+ vc5_hvs_write_gamma_entry(hvs, offset, &vc4_crtc->pwl_g[i]);
+ for (i = 0; i < SCALER5_DSPGAMMA_NUM_POINTS; i++, offset += 8)
+ vc5_hvs_write_gamma_entry(hvs, offset, &vc4_crtc->pwl_b[i]);
+
+ if (vc4_state->assigned_channel == 2) {
+ /* Alpha only valid on channel 2 */
+ for (i = 0; i < SCALER5_DSPGAMMA_NUM_POINTS; i++, offset += 8)
+ vc5_hvs_write_gamma_entry(hvs, offset, &vc4_crtc->pwl_a[i]);
+ }
+}
+
+static void vc5_hvs_update_gamma_lut(struct vc4_hvs *hvs,
+ struct vc4_crtc *vc4_crtc)
+{
+ struct drm_crtc *crtc = &vc4_crtc->base;
+ struct drm_color_lut *lut = crtc->state->gamma_lut->data;
+ unsigned int step, i;
+ u32 start, end;
+
+#define VC5_HVS_UPDATE_GAMMA_ENTRY_FROM_LUT(pwl, chan) \
+ start = drm_color_lut_extract(lut[i * step].chan, 12); \
+ end = drm_color_lut_extract(lut[(i + 1) * step - 1].chan, 12); \
+ \
+ /* Negative gradients not permitted by the hardware, so \
+ * flatten such points out. \
+ */ \
+ if (end < start) \
+ end = start; \
+ \
+ /* Assume 12bit pipeline. \
+ * X evenly spread over full range (12 bit). \
+ * C as U12.4 format. \
+ * Gradient as U4.8 format. \
+ */ \
+ vc4_crtc->pwl[i] = \
+ VC5_HVS_SET_GAMMA_ENTRY(i << 8, start << 4, \
+ ((end - start) << 4) / (step - 1))
+
+ /* HVS5 has a 16 point piecewise linear function for each colour
+ * channel (including alpha on channel 2) on each display channel.
+ *
+ * Currently take a crude subsample of the gamma LUT, but this could
+ * be improved to implement curve fitting.
+ */
+ step = crtc->gamma_size / SCALER5_DSPGAMMA_NUM_POINTS;
+ for (i = 0; i < SCALER5_DSPGAMMA_NUM_POINTS; i++) {
+ VC5_HVS_UPDATE_GAMMA_ENTRY_FROM_LUT(pwl_r, red);
+ VC5_HVS_UPDATE_GAMMA_ENTRY_FROM_LUT(pwl_g, green);
+ VC5_HVS_UPDATE_GAMMA_ENTRY_FROM_LUT(pwl_b, blue);
+ }
+
+ vc5_hvs_lut_load(hvs, vc4_crtc);
+}
+
u8 vc4_hvs_get_fifo_frame_count(struct vc4_hvs *hvs, unsigned int fifo)
{
struct drm_device *drm = &hvs->vc4->base;
@@ -400,7 +476,10 @@ static int vc4_hvs_init_channel(struct vc4_hvs *hvs, struct drm_crtc *crtc,
/* Reload the LUT, since the SRAMs would have been disabled if
* all CRTCs had SCALER_DISPBKGND_GAMMA unset at once.
*/
- vc4_hvs_lut_load(hvs, vc4_crtc);
+ if (!vc4->is_vc5)
+ vc4_hvs_lut_load(hvs, vc4_crtc);
+ else
+ vc5_hvs_lut_load(hvs, vc4_crtc);
drm_dev_exit(idx);
@@ -646,7 +725,11 @@ void vc4_hvs_atomic_flush(struct drm_crtc *crtc,
u32 dispbkgndx = HVS_READ(SCALER_DISPBKGNDX(channel));
if (crtc->state->gamma_lut) {
- vc4_hvs_update_gamma_lut(hvs, vc4_crtc);
+ if (!vc4->is_vc5)
+ vc4_hvs_update_gamma_lut(hvs, vc4_crtc);
+ else
+ vc5_hvs_update_gamma_lut(hvs, vc4_crtc);
+
dispbkgndx |= SCALER_DISPBKGND_GAMMA;
} else {
/* Unsetting DISPBKGND_GAMMA skips the gamma lut step
diff --git a/drivers/gpu/drm/vc4/vc4_regs.h b/drivers/gpu/drm/vc4/vc4_regs.h
index f3763bd600f6..098173290411 100644
--- a/drivers/gpu/drm/vc4/vc4_regs.h
+++ b/drivers/gpu/drm/vc4/vc4_regs.h
@@ -512,6 +512,28 @@
#define SCALER_DLIST_START 0x00002000
#define SCALER_DLIST_SIZE 0x00004000
+/* Gamma PWL for each channel. 16 points for each of 4 colour channels (alpha
+ * only on channel 2). 8 bytes per entry, offsets first, then gradient:
+ * Y = GRAD * X + C
+ *
+ * Values for X and C are left justified, and vary depending on the width of
+ * the HVS channel:
+ * 8-bit pipeline: X uses [31:24], C is U8.8 format, and GRAD is U4.8.
+ * 12-bit pipeline: X uses [31:20], C is U12.4 format, and GRAD is U4.8.
+ *
+ * The 3 HVS channels start at 0x400 offsets (ie chan 1 starts at 0x2400, and
+ * chan 2 at 0x2800).
+ */
+#define SCALER5_DSPGAMMA_NUM_POINTS 16
+#define SCALER5_DSPGAMMA_START 0x00002000
+#define SCALER5_DSPGAMMA_CHAN_OFFSET 0x400
+# define SCALER5_DSPGAMMA_OFF_X_MASK VC4_MASK(31, 20)
+# define SCALER5_DSPGAMMA_OFF_X_SHIFT 20
+# define SCALER5_DSPGAMMA_OFF_C_MASK VC4_MASK(15, 0)
+# define SCALER5_DSPGAMMA_OFF_C_SHIFT 0
+# define SCALER5_DSPGAMMA_GRAD_MASK VC4_MASK(11, 0)
+# define SCALER5_DSPGAMMA_GRAD_SHIFT 0
+
#define SCALER5_DLIST_START 0x00004000
# define VC4_HDMI_SW_RESET_FORMAT_DETECT BIT(1)
--
2.44.0

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@ -1,127 +0,0 @@
From 3931aecb383046dab3f43a4530fe527f7c50a4d5 Mon Sep 17 00:00:00 2001
From: Dave Stevenson <dave.stevenson@raspberrypi.com>
Date: Wed, 28 Apr 2021 12:32:10 +0200
Subject: [PATCH 0009/1002] drm/vc4: Add debugfs node that dumps the vc5 gamma
PWL entries
This helps with debugging the conversion from a 256 point gamma LUT to
16 point PWL entries as used by the BCM2711.
Co-developed-by: Juerg Haefliger <juergh@canonical.com>
Signed-off-by: Juerg Haefliger <juergh@canonical.com>
Signed-off-by: Dave Stevenson <dave.stevenson@raspberrypi.com>
Signed-off-by: Maxime Ripard <maxime@cerno.tech>
---
drivers/gpu/drm/vc4/vc4_hvs.c | 85 ++++++++++++++++++++++++++++++++++-
1 file changed, 84 insertions(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/vc4/vc4_hvs.c b/drivers/gpu/drm/vc4/vc4_hvs.c
index 2f49412c9b68..3ba2bca6bb48 100644
--- a/drivers/gpu/drm/vc4/vc4_hvs.c
+++ b/drivers/gpu/drm/vc4/vc4_hvs.c
@@ -143,6 +143,85 @@ static int vc4_hvs_debugfs_dlist(struct seq_file *m, void *data)
return 0;
}
+static int vc5_hvs_debugfs_gamma(struct seq_file *m, void *data)
+{
+ struct drm_info_node *node = m->private;
+ struct drm_device *dev = node->minor->dev;
+ struct vc4_dev *vc4 = to_vc4_dev(dev);
+ struct vc4_hvs *hvs = vc4->hvs;
+ struct drm_printer p = drm_seq_file_printer(m);
+ unsigned int i, chan;
+ u32 dispstat, dispbkgndx;
+
+ for (chan = 0; chan < SCALER_CHANNELS_COUNT; chan++) {
+ u32 x_c, grad;
+ u32 offset = SCALER5_DSPGAMMA_START +
+ chan * SCALER5_DSPGAMMA_CHAN_OFFSET;
+
+ dispstat = VC4_GET_FIELD(HVS_READ(SCALER_DISPSTATX(chan)),
+ SCALER_DISPSTATX_MODE);
+ if (dispstat == SCALER_DISPSTATX_MODE_DISABLED ||
+ dispstat == SCALER_DISPSTATX_MODE_EOF) {
+ drm_printf(&p, "HVS channel %u: Channel disabled\n", chan);
+ continue;
+ }
+
+ dispbkgndx = HVS_READ(SCALER_DISPBKGNDX(chan));
+ if (!(dispbkgndx & SCALER_DISPBKGND_GAMMA)) {
+ drm_printf(&p, "HVS channel %u: Gamma disabled\n", chan);
+ continue;
+ }
+
+ drm_printf(&p, "HVS channel %u:\n", chan);
+ drm_printf(&p, " red:\n");
+ for (i = 0; i < SCALER5_DSPGAMMA_NUM_POINTS; i++, offset += 8) {
+ x_c = HVS_READ(offset);
+ grad = HVS_READ(offset + 4);
+ drm_printf(&p, " %08x %08x - x %u, c %u, grad %u\n",
+ x_c, grad,
+ VC4_GET_FIELD(x_c, SCALER5_DSPGAMMA_OFF_X),
+ VC4_GET_FIELD(x_c, SCALER5_DSPGAMMA_OFF_C),
+ grad);
+ }
+ drm_printf(&p, " green:\n");
+ for (i = 0; i < SCALER5_DSPGAMMA_NUM_POINTS; i++, offset += 8) {
+ x_c = HVS_READ(offset);
+ grad = HVS_READ(offset + 4);
+ drm_printf(&p, " %08x %08x - x %u, c %u, grad %u\n",
+ x_c, grad,
+ VC4_GET_FIELD(x_c, SCALER5_DSPGAMMA_OFF_X),
+ VC4_GET_FIELD(x_c, SCALER5_DSPGAMMA_OFF_C),
+ grad);
+ }
+ drm_printf(&p, " blue:\n");
+ for (i = 0; i < SCALER5_DSPGAMMA_NUM_POINTS; i++, offset += 8) {
+ x_c = HVS_READ(offset);
+ grad = HVS_READ(offset + 4);
+ drm_printf(&p, " %08x %08x - x %u, c %u, grad %u\n",
+ x_c, grad,
+ VC4_GET_FIELD(x_c, SCALER5_DSPGAMMA_OFF_X),
+ VC4_GET_FIELD(x_c, SCALER5_DSPGAMMA_OFF_C),
+ grad);
+ }
+
+ /* Alpha only valid on channel 2 */
+ if (chan != 2)
+ continue;
+
+ drm_printf(&p, " alpha:\n");
+ for (i = 0; i < SCALER5_DSPGAMMA_NUM_POINTS; i++, offset += 8) {
+ x_c = HVS_READ(offset);
+ grad = HVS_READ(offset + 4);
+ drm_printf(&p, " %08x %08x - x %u, c %u, grad %u\n",
+ x_c, grad,
+ VC4_GET_FIELD(x_c, SCALER5_DSPGAMMA_OFF_X),
+ VC4_GET_FIELD(x_c, SCALER5_DSPGAMMA_OFF_C),
+ grad);
+ }
+ }
+ return 0;
+}
+
/* The filter kernel is composed of dwords each containing 3 9-bit
* signed integers packed next to each other.
*/
@@ -850,11 +929,15 @@ int vc4_hvs_debugfs_init(struct drm_minor *minor)
if (!vc4->hvs)
return -ENODEV;
- if (!vc4->is_vc5)
+ if (!vc4->is_vc5) {
debugfs_create_bool("hvs_load_tracker", S_IRUGO | S_IWUSR,
minor->debugfs_root,
&vc4->load_tracker_enabled);
+ drm_debugfs_add_file(drm, "hvs_gamma", vc5_hvs_debugfs_gamma,
+ NULL);
+ }
+
drm_debugfs_add_file(drm, "hvs_dlists", vc4_hvs_debugfs_dlist, NULL);
drm_debugfs_add_file(drm, "hvs_underrun", vc4_hvs_debugfs_underrun, NULL);
--
2.44.0

View file

@ -1,114 +0,0 @@
From 50a879cfdb87baad4edb50f7b443177a592998ed Mon Sep 17 00:00:00 2001
From: Maxime Ripard <maxime@cerno.tech>
Date: Mon, 14 Jun 2021 15:28:30 +0200
Subject: [PATCH 0010/1002] drm/vc4: hvs: Force modeset on gamma lut change
The HVS Gamma block can only be updated when idle, so we need to disable
the HVS channel when the gamma property is set in an atomic commit.
Since the pixelvalve cannot have its assigned channel halted without
stalling unless it's disabled as well, in our case that means forcing a
full disable / enable cycle on the pipeline.
Signed-off-by: Maxime Ripard <maxime@cerno.tech>
---
drivers/gpu/drm/vc4/vc4_crtc.c | 17 +++++++++++++++++
drivers/gpu/drm/vc4/vc4_drv.h | 3 +++
drivers/gpu/drm/vc4/vc4_hvs.c | 32 +++++++++++++++++++++++++++++++-
3 files changed, 51 insertions(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/vc4/vc4_crtc.c b/drivers/gpu/drm/vc4/vc4_crtc.c
index 8be9502d3b53..f35187ef3232 100644
--- a/drivers/gpu/drm/vc4/vc4_crtc.c
+++ b/drivers/gpu/drm/vc4/vc4_crtc.c
@@ -303,6 +303,23 @@ struct drm_encoder *vc4_get_crtc_encoder(struct drm_crtc *crtc,
return NULL;
}
+#define drm_for_each_connector_mask(connector, dev, connector_mask) \
+ list_for_each_entry((connector), &(dev)->mode_config.connector_list, head) \
+ for_each_if ((connector_mask) & drm_connector_mask(connector))
+
+struct drm_connector *vc4_get_crtc_connector(struct drm_crtc *crtc,
+ struct drm_crtc_state *state)
+{
+ struct drm_connector *connector;
+
+ WARN_ON(hweight32(state->connector_mask) > 1);
+
+ drm_for_each_connector_mask(connector, crtc->dev, state->connector_mask)
+ return connector;
+
+ return NULL;
+}
+
static void vc4_crtc_pixelvalve_reset(struct drm_crtc *crtc)
{
struct vc4_crtc *vc4_crtc = to_vc4_crtc(crtc);
diff --git a/drivers/gpu/drm/vc4/vc4_drv.h b/drivers/gpu/drm/vc4/vc4_drv.h
index e73b05b3b04c..61a6f58e2d7c 100644
--- a/drivers/gpu/drm/vc4/vc4_drv.h
+++ b/drivers/gpu/drm/vc4/vc4_drv.h
@@ -613,6 +613,9 @@ vc4_crtc_to_vc4_pv_data(const struct vc4_crtc *crtc)
return container_of_const(data, struct vc4_pv_data, base);
}
+struct drm_connector *vc4_get_crtc_connector(struct drm_crtc *crtc,
+ struct drm_crtc_state *state);
+
struct drm_encoder *vc4_get_crtc_encoder(struct drm_crtc *crtc,
struct drm_crtc_state *state);
diff --git a/drivers/gpu/drm/vc4/vc4_hvs.c b/drivers/gpu/drm/vc4/vc4_hvs.c
index 3ba2bca6bb48..7ff341aceba7 100644
--- a/drivers/gpu/drm/vc4/vc4_hvs.c
+++ b/drivers/gpu/drm/vc4/vc4_hvs.c
@@ -596,6 +596,36 @@ void vc4_hvs_stop_channel(struct vc4_hvs *hvs, unsigned int chan)
drm_dev_exit(idx);
}
+static int vc4_hvs_gamma_check(struct drm_crtc *crtc,
+ struct drm_atomic_state *state)
+{
+ struct drm_crtc_state *crtc_state = drm_atomic_get_new_crtc_state(state, crtc);
+ struct drm_connector_state *conn_state;
+ struct drm_connector *connector;
+ struct drm_device *dev = crtc->dev;
+ struct vc4_dev *vc4 = to_vc4_dev(dev);
+
+ if (!vc4->is_vc5)
+ return 0;
+
+ if (!crtc_state->color_mgmt_changed)
+ return 0;
+
+ connector = vc4_get_crtc_connector(crtc, crtc_state);
+ if (!connector)
+ return -EINVAL;
+
+ if (!(connector->connector_type == DRM_MODE_CONNECTOR_HDMIA))
+ return 0;
+
+ conn_state = drm_atomic_get_connector_state(state, connector);
+ if (!conn_state)
+ return -EINVAL;
+
+ crtc_state->mode_changed = true;
+ return 0;
+}
+
int vc4_hvs_atomic_check(struct drm_crtc *crtc, struct drm_atomic_state *state)
{
struct drm_crtc_state *crtc_state = drm_atomic_get_new_crtc_state(state, crtc);
@@ -626,7 +656,7 @@ int vc4_hvs_atomic_check(struct drm_crtc *crtc, struct drm_atomic_state *state)
if (ret)
return ret;
- return 0;
+ return vc4_hvs_gamma_check(crtc, state);
}
static void vc4_hvs_install_dlist(struct drm_crtc *crtc)
--
2.44.0

View file

@ -1,61 +0,0 @@
From 099d0ffd5baa82d113f9731369603a1410cf8877 Mon Sep 17 00:00:00 2001
From: Mateusz Kwiatkowski <kfyatek+publicgit@gmail.com>
Date: Thu, 15 Jul 2021 01:08:08 +0200
Subject: [PATCH 0011/1002] drm/vc4: Relax VEC modeline requirements and add
progressive mode support
Make vc4_vec_encoder_atomic_check() accept arbitrary modelines, as long
as they result in somewhat sane output from the VEC. The bounds have
been determined empirically. Additionally, add support for the
progressive 262-line and 312-line modes.
Signed-off-by: Mateusz Kwiatkowski <kfyatek+publicgit@gmail.com>
---
drivers/gpu/drm/vc4/vc4_vec.c | 24 ++++++++++++++++++++++++
1 file changed, 24 insertions(+)
diff --git a/drivers/gpu/drm/vc4/vc4_vec.c b/drivers/gpu/drm/vc4/vc4_vec.c
index 83c2d6f94c8d..a6702acd6b9e 100644
--- a/drivers/gpu/drm/vc4/vc4_vec.c
+++ b/drivers/gpu/drm/vc4/vc4_vec.c
@@ -721,6 +721,18 @@ static int vc4_vec_encoder_atomic_check(struct drm_encoder *encoder,
if ((mode->crtc_vtotal - mode->crtc_vsync_end) < 4)
return -EINVAL;
+ if ((mode->flags & DRM_MODE_FLAG_INTERLACE) &&
+ (mode->vdisplay % 2 != 0 ||
+ mode->vsync_start % 2 != 1 ||
+ mode->vsync_end % 2 != 1 ||
+ mode->vtotal % 2 != 1))
+ return -EINVAL;
+
+ /* progressive mode is hard-wired to 262 total lines */
+ if (!(mode->flags & DRM_MODE_FLAG_INTERLACE) &&
+ mode->crtc_vtotal != 262)
+ return -EINVAL;
+
break;
/* PAL/SECAM */
@@ -740,6 +752,18 @@ static int vc4_vec_encoder_atomic_check(struct drm_encoder *encoder,
if ((mode->crtc_vtotal - mode->crtc_vsync_end) < 2)
return -EINVAL;
+ if ((mode->flags & DRM_MODE_FLAG_INTERLACE) &&
+ (mode->vdisplay % 2 != 0 ||
+ mode->vsync_start % 2 != 0 ||
+ mode->vsync_end % 2 != 0 ||
+ mode->vtotal % 2 != 1))
+ return -EINVAL;
+
+ /* progressive mode is hard-wired to 312 total lines */
+ if (!(mode->flags & DRM_MODE_FLAG_INTERLACE) &&
+ mode->crtc_vtotal != 312)
+ return -EINVAL;
+
break;
default:
--
2.44.0

View file

@ -1,73 +0,0 @@
From 2f04da8b66d1124c4cf9c1fd9733821801a01a5d Mon Sep 17 00:00:00 2001
From: Mateusz Kwiatkowski <kfyatek+publicgit@gmail.com>
Date: Thu, 15 Jul 2021 01:08:11 +0200
Subject: [PATCH 0012/1002] drm/vc4: Make VEC progressive modes readily
accessible
Add predefined modelines for the 240p (NTSC) and 288p (PAL) progressive
modes, and report them through vc4_vec_connector_get_modes().
Signed-off-by: Mateusz Kwiatkowski <kfyatek+publicgit@gmail.com>
---
drivers/gpu/drm/vc4/vc4_vec.c | 36 ++++++++++++++++++++++++++++++++++-
1 file changed, 35 insertions(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/vc4/vc4_vec.c b/drivers/gpu/drm/vc4/vc4_vec.c
index a6702acd6b9e..e77eef980354 100644
--- a/drivers/gpu/drm/vc4/vc4_vec.c
+++ b/drivers/gpu/drm/vc4/vc4_vec.c
@@ -273,6 +273,18 @@ static const struct debugfs_reg32 vec_regs[] = {
VC4_REG32(VEC_DAC_MISC),
};
+static const struct drm_display_mode drm_mode_240p = {
+ DRM_MODE("720x240", DRM_MODE_TYPE_DRIVER, 13500,
+ 720, 720 + 14, 720 + 14 + 64, 720 + 14 + 64 + 60, 0,
+ 240, 240 + 3, 240 + 3 + 3, 262, 0, 0)
+};
+
+static const struct drm_display_mode drm_mode_288p = {
+ DRM_MODE("720x288", DRM_MODE_TYPE_DRIVER, 13500,
+ 720, 720 + 20, 720 + 20 + 64, 720 + 20 + 64 + 60, 0,
+ 288, 288 + 2, 288 + 2 + 3, 312, 0, 0)
+};
+
static const struct vc4_vec_tv_mode vc4_vec_tv_modes[] = {
{
.mode = DRM_MODE_TV_MODE_NTSC,
@@ -507,9 +519,31 @@ static const struct drm_connector_funcs vc4_vec_connector_funcs = {
.atomic_set_property = vc4_vec_connector_set_property,
};
+static int vc4_vec_connector_get_modes(struct drm_connector *connector)
+{
+ struct drm_display_mode *mode;
+ int count = drm_connector_helper_tv_get_modes(connector);
+
+ mode = drm_mode_duplicate(connector->dev, &drm_mode_240p);
+ if (!mode)
+ return -ENOMEM;
+
+ drm_mode_probed_add(connector, mode);
+ count++;
+
+ mode = drm_mode_duplicate(connector->dev, &drm_mode_288p);
+ if (!mode)
+ return -ENOMEM;
+
+ drm_mode_probed_add(connector, mode);
+ count++;
+
+ return count;
+}
+
static const struct drm_connector_helper_funcs vc4_vec_connector_helper_funcs = {
.atomic_check = drm_atomic_helper_connector_tv_check,
- .get_modes = drm_connector_helper_tv_get_modes,
+ .get_modes = vc4_vec_connector_get_modes,
};
static int vc4_vec_connector_init(struct drm_device *dev, struct vc4_vec *vec)
--
2.44.0

View file

@ -1,35 +0,0 @@
From 8101479299dec8b984ee1cef2224d67c8ae9921f Mon Sep 17 00:00:00 2001
From: Dave Stevenson <dave.stevenson@raspberrypi.com>
Date: Tue, 2 Nov 2021 16:01:36 +0000
Subject: [PATCH 0013/1002] drm: Check whether the gamma lut has changed before
updating
drm_crtc_legacy_gamma_set updates the gamma_lut blob unconditionally,
which leads to unnecessary reprogramming of hardware.
Check whether the blob contents has actually changed before
signalling that it has been updated.
Signed-off-by: Dave Stevenson <dave.stevenson@raspberrypi.com>
---
drivers/gpu/drm/drm_color_mgmt.c | 4 +++-
1 file changed, 3 insertions(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/drm_color_mgmt.c b/drivers/gpu/drm/drm_color_mgmt.c
index d021497841b8..996f12438016 100644
--- a/drivers/gpu/drm/drm_color_mgmt.c
+++ b/drivers/gpu/drm/drm_color_mgmt.c
@@ -330,7 +330,9 @@ static int drm_crtc_legacy_gamma_set(struct drm_crtc *crtc,
replaced = drm_property_replace_blob(&crtc_state->degamma_lut,
use_gamma_lut ? NULL : blob);
replaced |= drm_property_replace_blob(&crtc_state->ctm, NULL);
- replaced |= drm_property_replace_blob(&crtc_state->gamma_lut,
+ if (!crtc_state->gamma_lut || !crtc_state->gamma_lut->data ||
+ memcmp(crtc_state->gamma_lut->data, blob_data, blob->length))
+ replaced |= drm_property_replace_blob(&crtc_state->gamma_lut,
use_gamma_lut ? blob : NULL);
crtc_state->color_mgmt_changed |= replaced;
--
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@ -1,71 +0,0 @@
From c0e4a6b67c9e9c1be98e9e83708b04ca7ed34989 Mon Sep 17 00:00:00 2001
From: Dave Stevenson <dave.stevenson@raspberrypi.com>
Date: Mon, 8 Nov 2021 17:32:45 +0000
Subject: [PATCH 0014/1002] drm/vc4: Enable gamma block only when required.
With HVS5 the gamma block is now only reprogrammed with
a disable/enable. Loading the table from vc4_hvs_init_channel
(called from vc4_hvs_atomic_enable) appears to be at an
invalid point in time and so isn't applied.
Switch to enabling and disabling the gamma table instead. This
isn't safe if the pipeline is running, but it isn't now.
For HVS4 it is safe to enable and disable dynamically, so
adopt that approach there too.
Signed-off-by: Dave Stevenson <dave.stevenson@raspberrypi.com>
---
drivers/gpu/drm/vc4/vc4_hvs.c | 22 ++++++++++++++++------
1 file changed, 16 insertions(+), 6 deletions(-)
diff --git a/drivers/gpu/drm/vc4/vc4_hvs.c b/drivers/gpu/drm/vc4/vc4_hvs.c
index 7ff341aceba7..f787634df5f1 100644
--- a/drivers/gpu/drm/vc4/vc4_hvs.c
+++ b/drivers/gpu/drm/vc4/vc4_hvs.c
@@ -548,8 +548,11 @@ static int vc4_hvs_init_channel(struct vc4_hvs *hvs, struct drm_crtc *crtc,
dispbkgndx &= ~SCALER_DISPBKGND_GAMMA;
dispbkgndx &= ~SCALER_DISPBKGND_INTERLACE;
+ if (crtc->state->gamma_lut)
+ /* Enable gamma on if required */
+ dispbkgndx |= SCALER_DISPBKGND_GAMMA;
+
HVS_WRITE(SCALER_DISPBKGNDX(chan), dispbkgndx |
- ((!vc4->is_vc5) ? SCALER_DISPBKGND_GAMMA : 0) |
(interlace ? SCALER_DISPBKGND_INTERLACE : 0));
/* Reload the LUT, since the SRAMs would have been disabled if
@@ -834,18 +837,25 @@ void vc4_hvs_atomic_flush(struct drm_crtc *crtc,
u32 dispbkgndx = HVS_READ(SCALER_DISPBKGNDX(channel));
if (crtc->state->gamma_lut) {
- if (!vc4->is_vc5)
+ if (!vc4->is_vc5) {
vc4_hvs_update_gamma_lut(hvs, vc4_crtc);
- else
+ dispbkgndx |= SCALER_DISPBKGND_GAMMA;
+ } else {
vc5_hvs_update_gamma_lut(hvs, vc4_crtc);
-
- dispbkgndx |= SCALER_DISPBKGND_GAMMA;
+ }
} else {
/* Unsetting DISPBKGND_GAMMA skips the gamma lut step
* in hardware, which is the same as a linear lut that
* DRM expects us to use in absence of a user lut.
+ *
+ * Do NOT change state dynamically for hvs5 as it
+ * inserts a delay in the pipeline that will cause
+ * stalls if enabled/disabled whilst running. The other
+ * should already be disabling/enabling the pipeline
+ * when gamma changes.
*/
- dispbkgndx &= ~SCALER_DISPBKGND_GAMMA;
+ if (!vc4->is_vc5)
+ dispbkgndx &= ~SCALER_DISPBKGND_GAMMA;
}
HVS_WRITE(SCALER_DISPBKGNDX(channel), dispbkgndx);
}
--
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@ -1,31 +0,0 @@
From 57ec5c418588c6dd23a4ce7d0f0cb76667ec155f Mon Sep 17 00:00:00 2001
From: Dave Stevenson <dave.stevenson@raspberrypi.com>
Date: Mon, 8 Nov 2021 18:25:49 +0000
Subject: [PATCH 0015/1002] drm/vc4: Only add gamma properties once.
Two calls were made to drm_crtc_enable_color_mgmt to add gamma
and CTM, however they were both set to add the gamma properties,
so they ended up added twice.
Fixes: 766cc6b1f7fc "drm/vc4: Add CTM support"
Signed-off-by: Dave Stevenson <dave.stevenson@raspberrypi.com>
---
drivers/gpu/drm/vc4/vc4_crtc.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/vc4/vc4_crtc.c b/drivers/gpu/drm/vc4/vc4_crtc.c
index f35187ef3232..250f3f636972 100644
--- a/drivers/gpu/drm/vc4/vc4_crtc.c
+++ b/drivers/gpu/drm/vc4/vc4_crtc.c
@@ -1371,7 +1371,7 @@ int __vc4_crtc_init(struct drm_device *drm,
/* We support CTM, but only for one CRTC at a time. It's therefore
* implemented as private driver state in vc4_kms, not here.
*/
- drm_crtc_enable_color_mgmt(crtc, 0, true, crtc->gamma_size);
+ drm_crtc_enable_color_mgmt(crtc, 0, true, 0);
/* Initialize the VC4 gamma LUTs */
for (i = 0; i < crtc->gamma_size; i++) {
--
2.44.0

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@ -1,37 +0,0 @@
From 67157d16a97a0dc896d5a70245ba8f9f360112c8 Mon Sep 17 00:00:00 2001
From: Dave Stevenson <dave.stevenson@raspberrypi.com>
Date: Wed, 10 Nov 2021 16:36:12 +0000
Subject: [PATCH 0016/1002] drm/vc4: Validate the size of the gamma_lut
Add a check to vc4_hvs_gamma_check to ensure a new non-empty
gamma LUT is of the correct length before accepting it.
Signed-off-by: Dave Stevenson <dave.stevenson@raspberrypi.com>
---
drivers/gpu/drm/vc4/vc4_hvs.c | 10 ++++++++++
1 file changed, 10 insertions(+)
diff --git a/drivers/gpu/drm/vc4/vc4_hvs.c b/drivers/gpu/drm/vc4/vc4_hvs.c
index f787634df5f1..97842917c09a 100644
--- a/drivers/gpu/drm/vc4/vc4_hvs.c
+++ b/drivers/gpu/drm/vc4/vc4_hvs.c
@@ -614,6 +614,16 @@ static int vc4_hvs_gamma_check(struct drm_crtc *crtc,
if (!crtc_state->color_mgmt_changed)
return 0;
+ if (crtc_state->gamma_lut) {
+ unsigned int len = drm_color_lut_size(crtc_state->gamma_lut);
+
+ if (len != crtc->gamma_size) {
+ DRM_DEBUG_KMS("Invalid LUT size; got %u, expected %u\n",
+ len, crtc->gamma_size);
+ return -EINVAL;
+ }
+ }
+
connector = vc4_get_crtc_connector(crtc, crtc_state);
if (!connector)
return -EINVAL;
--
2.44.0

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@ -1,41 +0,0 @@
From 1a8c3424507c67088915f2136edfba381c2fa4b9 Mon Sep 17 00:00:00 2001
From: Dave Stevenson <dave.stevenson@raspberrypi.com>
Date: Thu, 13 Jan 2022 11:30:42 +0000
Subject: [PATCH 0017/1002] drm/vc4: Disable Gamma control on HVS5 due to
issues writing the table
Still under investigation, but the conditions under which the HVS
will accept values written to the gamma PWL are not straightforward.
Disable gamma on HVS5 again until it can be resolved to avoid
gamma being enabled with an incorrect table.
Signed-off-by: Dave Stevenson <dave.stevenson@raspberrypi.com>
---
drivers/gpu/drm/vc4/vc4_crtc.c | 8 +-------
1 file changed, 1 insertion(+), 7 deletions(-)
diff --git a/drivers/gpu/drm/vc4/vc4_crtc.c b/drivers/gpu/drm/vc4/vc4_crtc.c
index 250f3f636972..8f5ac282b450 100644
--- a/drivers/gpu/drm/vc4/vc4_crtc.c
+++ b/drivers/gpu/drm/vc4/vc4_crtc.c
@@ -1357,15 +1357,9 @@ int __vc4_crtc_init(struct drm_device *drm,
if (!vc4->is_vc5) {
drm_mode_crtc_set_gamma_size(crtc, ARRAY_SIZE(vc4_crtc->lut_r));
- } else {
- /* This is a lie for hvs5 which uses a 16 point PWL, but it
- * allows for something smarter than just 16 linearly spaced
- * segments. Conversion is done in vc5_hvs_update_gamma_lut.
- */
- drm_mode_crtc_set_gamma_size(crtc, 256);
+ drm_crtc_enable_color_mgmt(crtc, 0, false, crtc->gamma_size);
}
- drm_crtc_enable_color_mgmt(crtc, 0, false, crtc->gamma_size);
if (!vc4->is_vc5) {
/* We support CTM, but only for one CRTC at a time. It's therefore
--
2.44.0

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@ -1,81 +0,0 @@
From cfd0ecb25ac9aecd0e6401d951a41988b7672776 Mon Sep 17 00:00:00 2001
From: Dave Stevenson <dave.stevenson@raspberrypi.com>
Date: Fri, 17 Dec 2021 13:36:52 +0000
Subject: [PATCH 0018/1002] drm/dsi: Document the meaning and spec references
for MIPI_DSI_MODE_*
The MIPI_DSI_MODE_* flags have fairly terse descriptions and no reference
to the DSI specification as to their exact meaning. Usage has therefore
been rather fluid.
Extend the descriptions and provide references to the part of the
MIPI DSI specification regarding what they mean.
Signed-off-by: Dave Stevenson <dave.stevenson@raspberrypi.com>
---
include/drm/drm_mipi_dsi.h | 38 ++++++++++++++++++++++++++------------
1 file changed, 26 insertions(+), 12 deletions(-)
diff --git a/include/drm/drm_mipi_dsi.h b/include/drm/drm_mipi_dsi.h
index c0aec0d4d664..4c44d3ed89b8 100644
--- a/include/drm/drm_mipi_dsi.h
+++ b/include/drm/drm_mipi_dsi.h
@@ -113,29 +113,43 @@ struct mipi_dsi_host *of_find_mipi_dsi_host_by_node(struct device_node *node);
/* DSI mode flags */
-/* video mode */
+/* Video mode display.
+ * Not set denotes a command mode display.
+ */
#define MIPI_DSI_MODE_VIDEO BIT(0)
-/* video burst mode */
+/* Video burst mode.
+ * Link frequency to be configured via platform configuration.
+ * This should always be set in conjunction with MIPI_DSI_MODE_VIDEO.
+ * (DSI spec V1.1 8.11.4)
+ */
#define MIPI_DSI_MODE_VIDEO_BURST BIT(1)
-/* video pulse mode */
+/* Video pulse mode.
+ * Not set denotes sync event mode. (DSI spec V1.1 8.11.2)
+ */
#define MIPI_DSI_MODE_VIDEO_SYNC_PULSE BIT(2)
-/* enable auto vertical count mode */
+/* Enable auto vertical count mode */
#define MIPI_DSI_MODE_VIDEO_AUTO_VERT BIT(3)
-/* enable hsync-end packets in vsync-pulse and v-porch area */
+/* Enable hsync-end packets in vsync-pulse and v-porch area */
#define MIPI_DSI_MODE_VIDEO_HSE BIT(4)
-/* disable hfront-porch area */
+/* Transmit NULL packets or LP mode during hfront-porch area.
+ * Not set denotes sending a blanking packet instead. (DSI spec V1.1 8.11.1)
+ */
#define MIPI_DSI_MODE_VIDEO_NO_HFP BIT(5)
-/* disable hback-porch area */
+/* Transmit NULL packets or LP mode during hback-porch area.
+ * Not set denotes sending a blanking packet instead. (DSI spec V1.1 8.11.1)
+ */
#define MIPI_DSI_MODE_VIDEO_NO_HBP BIT(6)
-/* disable hsync-active area */
+/* Transmit NULL packets or LP mode during hsync-active area.
+ * Not set denotes sending a blanking packet instead. (DSI spec V1.1 8.11.1)
+ */
#define MIPI_DSI_MODE_VIDEO_NO_HSA BIT(7)
-/* flush display FIFO on vsync pulse */
+/* Flush display FIFO on vsync pulse */
#define MIPI_DSI_MODE_VSYNC_FLUSH BIT(8)
-/* disable EoT packets in HS mode */
+/* Disable EoT packets in HS mode. (DSI spec V1.1 8.1) */
#define MIPI_DSI_MODE_NO_EOT_PACKET BIT(9)
-/* device supports non-continuous clock behavior (DSI spec 5.6.1) */
+/* Device supports non-continuous clock behavior (DSI spec V1.1 5.6.1) */
#define MIPI_DSI_CLOCK_NON_CONTINUOUS BIT(10)
-/* transmit data in low power */
+/* Transmit data in low power */
#define MIPI_DSI_MODE_LPM BIT(11)
/* transmit data ending at the same time for all lanes within one hsync */
#define MIPI_DSI_HS_PKT_END_ALIGNED BIT(12)
--
2.44.0

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@ -1,30 +0,0 @@
From 00e306d9dd4855b6a6da682b934bbc513e7cbcd5 Mon Sep 17 00:00:00 2001
From: Dave Stevenson <dave.stevenson@raspberrypi.com>
Date: Thu, 20 Jan 2022 17:29:36 +0000
Subject: [PATCH 0019/1002] drm/bridge: tc358762: Ignore EPROBE_DEFER when
logging errors
mipi_dsi_attach can fail due to resources not being available
yet, therefore do not log error messages should they occur.
Signed-off-by: Dave Stevenson <dave.stevenson@raspberrypi.com>
---
drivers/gpu/drm/bridge/tc358762.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/bridge/tc358762.c b/drivers/gpu/drm/bridge/tc358762.c
index 46198af9eebb..8b856bc2ed5b 100644
--- a/drivers/gpu/drm/bridge/tc358762.c
+++ b/drivers/gpu/drm/bridge/tc358762.c
@@ -294,7 +294,7 @@ static int tc358762_probe(struct mipi_dsi_device *dsi)
ret = mipi_dsi_attach(dsi);
if (ret < 0) {
drm_bridge_remove(&ctx->bridge);
- dev_err(dev, "failed to attach dsi\n");
+ dev_err_probe(dev, ret, "failed to attach dsi\n");
}
return ret;
--
2.44.0

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@ -1,219 +0,0 @@
From 1e18d70635d275e4c6a9ac63fa79a461ed50eac2 Mon Sep 17 00:00:00 2001
From: Dom Cobley <popcornmix@gmail.com>
Date: Mon, 14 Mar 2022 17:56:10 +0000
Subject: [PATCH 0020/1002] vc4/drm: vc4_plane: Keep fractional source coords
inside state
Signed-off-by: Dom Cobley <popcornmix@gmail.com>
---
drivers/gpu/drm/vc4/vc4_drv.h | 2 +-
drivers/gpu/drm/vc4/vc4_plane.c | 68 ++++++++++++++++-----------------
2 files changed, 34 insertions(+), 36 deletions(-)
diff --git a/drivers/gpu/drm/vc4/vc4_drv.h b/drivers/gpu/drm/vc4/vc4_drv.h
index 61a6f58e2d7c..7880fa1951e2 100644
--- a/drivers/gpu/drm/vc4/vc4_drv.h
+++ b/drivers/gpu/drm/vc4/vc4_drv.h
@@ -408,7 +408,7 @@ struct vc4_plane_state {
/* Clipped coordinates of the plane on the display. */
int crtc_x, crtc_y, crtc_w, crtc_h;
- /* Clipped area being scanned from in the FB. */
+ /* Clipped area being scanned from in the FB in u16.16 format */
u32 src_x, src_y;
u32 src_w[2], src_h[2];
diff --git a/drivers/gpu/drm/vc4/vc4_plane.c b/drivers/gpu/drm/vc4/vc4_plane.c
index 00e713faecd5..55b936c628fb 100644
--- a/drivers/gpu/drm/vc4/vc4_plane.c
+++ b/drivers/gpu/drm/vc4/vc4_plane.c
@@ -251,9 +251,9 @@ static const struct hvs_format *vc4_get_hvs_format(u32 drm_format)
static enum vc4_scaling_mode vc4_get_scaling_mode(u32 src, u32 dst)
{
- if (dst == src)
+ if (dst == src >> 16)
return VC4_SCALING_NONE;
- if (3 * dst >= 2 * src)
+ if (3 * dst >= 2 * (src >> 16))
return VC4_SCALING_PPF;
else
return VC4_SCALING_TPZ;
@@ -462,15 +462,10 @@ static int vc4_plane_setup_clipping_and_scaling(struct drm_plane_state *state)
vc4_state->offsets[i] = bo->dma_addr + fb->offsets[i];
}
- /*
- * We don't support subpixel source positioning for scaling,
- * but fractional coordinates can be generated by clipping
- * so just round for now
- */
- vc4_state->src_x = DIV_ROUND_CLOSEST(state->src.x1, 1 << 16);
- vc4_state->src_y = DIV_ROUND_CLOSEST(state->src.y1, 1 << 16);
- vc4_state->src_w[0] = DIV_ROUND_CLOSEST(state->src.x2, 1 << 16) - vc4_state->src_x;
- vc4_state->src_h[0] = DIV_ROUND_CLOSEST(state->src.y2, 1 << 16) - vc4_state->src_y;
+ vc4_state->src_x = state->src.x1;
+ vc4_state->src_y = state->src.y1;
+ vc4_state->src_w[0] = state->src.x2 - vc4_state->src_x;
+ vc4_state->src_h[0] = state->src.y2 - vc4_state->src_y;
vc4_state->crtc_x = state->dst.x1;
vc4_state->crtc_y = state->dst.y1;
@@ -523,7 +518,7 @@ static void vc4_write_tpz(struct vc4_plane_state *vc4_state, u32 src, u32 dst)
{
u32 scale, recip;
- scale = (1 << 16) * src / dst;
+ scale = src / dst;
/* The specs note that while the reciprocal would be defined
* as (1<<32)/scale, ~0 is close enough.
@@ -569,7 +564,7 @@ static u32 vc4_lbm_size(struct drm_plane_state *state)
if (vc4_state->x_scaling[0] == VC4_SCALING_TPZ)
pix_per_line = vc4_state->crtc_w;
else
- pix_per_line = vc4_state->src_w[0];
+ pix_per_line = vc4_state->src_w[0] >> 16;
if (!vc4_state->is_yuv) {
if (vc4_state->y_scaling[0] == VC4_SCALING_TPZ)
@@ -660,7 +655,8 @@ static void vc4_plane_calc_load(struct drm_plane_state *state)
for (i = 0; i < fb->format->num_planes; i++) {
/* Even if the bandwidth/plane required for a single frame is
*
- * vc4_state->src_w[i] * vc4_state->src_h[i] * cpp * vrefresh
+ * (vc4_state->src_w[i] >> 16) * (vc4_state->src_h[i] >> 16) *
+ * cpp * vrefresh
*
* when downscaling, we have to read more pixels per line in
* the time frame reserved for a single line, so the bandwidth
@@ -669,11 +665,11 @@ static void vc4_plane_calc_load(struct drm_plane_state *state)
* load by this number. We're likely over-estimating the read
* demand, but that's better than under-estimating it.
*/
- vscale_factor = DIV_ROUND_UP(vc4_state->src_h[i],
+ vscale_factor = DIV_ROUND_UP(vc4_state->src_h[i] >> 16,
vc4_state->crtc_h);
- vc4_state->membus_load += vc4_state->src_w[i] *
- vc4_state->src_h[i] * vscale_factor *
- fb->format->cpp[i];
+ vc4_state->membus_load += (vc4_state->src_w[i] >> 16) *
+ (vc4_state->src_h[i] >> 16) *
+ vscale_factor * fb->format->cpp[i];
vc4_state->hvs_load += vc4_state->crtc_h * vc4_state->crtc_w;
}
@@ -826,7 +822,8 @@ static int vc4_plane_mode_set(struct drm_plane *plane,
bool mix_plane_alpha;
bool covers_screen;
u32 scl0, scl1, pitch0;
- u32 tiling, src_y;
+ u32 tiling, src_x, src_y;
+ u32 width, height;
u32 hvs_format = format->hvs;
unsigned int rotation;
int ret, i;
@@ -838,6 +835,9 @@ static int vc4_plane_mode_set(struct drm_plane *plane,
if (ret)
return ret;
+ width = vc4_state->src_w[0] >> 16;
+ height = vc4_state->src_h[0] >> 16;
+
/* SCL1 is used for Cb/Cr scaling of planar formats. For RGB
* and 4:4:4, scl1 should be set to scl0 so both channels of
* the scaler do the same thing. For YUV, the Y plane needs
@@ -858,9 +858,11 @@ static int vc4_plane_mode_set(struct drm_plane *plane,
DRM_MODE_REFLECT_Y);
/* We must point to the last line when Y reflection is enabled. */
- src_y = vc4_state->src_y;
+ src_y = vc4_state->src_y >> 16;
if (rotation & DRM_MODE_REFLECT_Y)
- src_y += vc4_state->src_h[0] - 1;
+ src_y += height - 1;
+
+ src_x = vc4_state->src_x >> 16;
switch (base_format_mod) {
case DRM_FORMAT_MOD_LINEAR:
@@ -875,7 +877,7 @@ static int vc4_plane_mode_set(struct drm_plane *plane,
(i ? v_subsample : 1) *
fb->pitches[i];
- vc4_state->offsets[i] += vc4_state->src_x /
+ vc4_state->offsets[i] += src_x /
(i ? h_subsample : 1) *
fb->format->cpp[i];
}
@@ -898,7 +900,7 @@ static int vc4_plane_mode_set(struct drm_plane *plane,
* pitch * tile_h == tile_size * tiles_per_row
*/
u32 tiles_w = fb->pitches[0] >> (tile_size_shift - tile_h_shift);
- u32 tiles_l = vc4_state->src_x >> tile_w_shift;
+ u32 tiles_l = src_x >> tile_w_shift;
u32 tiles_r = tiles_w - tiles_l;
u32 tiles_t = src_y >> tile_h_shift;
/* Intra-tile offsets, which modify the base address (the
@@ -908,7 +910,7 @@ static int vc4_plane_mode_set(struct drm_plane *plane,
u32 tile_y = (src_y >> 4) & 1;
u32 subtile_y = (src_y >> 2) & 3;
u32 utile_y = src_y & 3;
- u32 x_off = vc4_state->src_x & tile_w_mask;
+ u32 x_off = src_x & tile_w_mask;
u32 y_off = src_y & tile_h_mask;
/* When Y reflection is requested we must set the
@@ -1004,7 +1006,7 @@ static int vc4_plane_mode_set(struct drm_plane *plane,
* of the 12-pixels in that 128-bit word is the
* first pixel to be used
*/
- u32 remaining_pixels = vc4_state->src_x % 96;
+ u32 remaining_pixels = src_x % 96;
u32 aligned = remaining_pixels / 12;
u32 last_bits = remaining_pixels % 12;
@@ -1026,12 +1028,12 @@ static int vc4_plane_mode_set(struct drm_plane *plane,
return -EINVAL;
}
pix_per_tile = tile_w / fb->format->cpp[0];
- x_off = (vc4_state->src_x % pix_per_tile) /
+ x_off = (src_x % pix_per_tile) /
(i ? h_subsample : 1) *
fb->format->cpp[i];
}
- tile = vc4_state->src_x / pix_per_tile;
+ tile = src_x / pix_per_tile;
vc4_state->offsets[i] += param * tile_w * tile;
vc4_state->offsets[i] += src_y /
@@ -1092,10 +1094,8 @@ static int vc4_plane_mode_set(struct drm_plane *plane,
vc4_dlist_write(vc4_state,
(mix_plane_alpha ? SCALER_POS2_ALPHA_MIX : 0) |
vc4_hvs4_get_alpha_blend_mode(state) |
- VC4_SET_FIELD(vc4_state->src_w[0],
- SCALER_POS2_WIDTH) |
- VC4_SET_FIELD(vc4_state->src_h[0],
- SCALER_POS2_HEIGHT));
+ VC4_SET_FIELD(width, SCALER_POS2_WIDTH) |
+ VC4_SET_FIELD(height, SCALER_POS2_HEIGHT));
/* Position Word 3: Context. Written by the HVS. */
vc4_dlist_write(vc4_state, 0xc0c0c0c0);
@@ -1148,10 +1148,8 @@ static int vc4_plane_mode_set(struct drm_plane *plane,
/* Position Word 2: Source Image Size */
vc4_state->pos2_offset = vc4_state->dlist_count;
vc4_dlist_write(vc4_state,
- VC4_SET_FIELD(vc4_state->src_w[0],
- SCALER5_POS2_WIDTH) |
- VC4_SET_FIELD(vc4_state->src_h[0],
- SCALER5_POS2_HEIGHT));
+ VC4_SET_FIELD(width, SCALER5_POS2_WIDTH) |
+ VC4_SET_FIELD(height, SCALER5_POS2_HEIGHT));
/* Position Word 3: Context. Written by the HVS. */
vc4_dlist_write(vc4_state, 0xc0c0c0c0);
--
2.44.0

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@ -1,110 +0,0 @@
From 082526e9709190ec5e035266a33a7a4858ad7a79 Mon Sep 17 00:00:00 2001
From: Dom Cobley <popcornmix@gmail.com>
Date: Fri, 9 Apr 2021 15:00:40 +0100
Subject: [PATCH 0021/1002] vc4/drm: Handle fractional coordinates using the
phase field
Signed-off-by: Dom Cobley <popcornmix@gmail.com>
---
drivers/gpu/drm/vc4/vc4_plane.c | 61 ++++++++++++++++++++++++++++++---
1 file changed, 56 insertions(+), 5 deletions(-)
diff --git a/drivers/gpu/drm/vc4/vc4_plane.c b/drivers/gpu/drm/vc4/vc4_plane.c
index 55b936c628fb..bc56bf37e185 100644
--- a/drivers/gpu/drm/vc4/vc4_plane.c
+++ b/drivers/gpu/drm/vc4/vc4_plane.c
@@ -532,14 +532,47 @@ static void vc4_write_tpz(struct vc4_plane_state *vc4_state, u32 src, u32 dst)
VC4_SET_FIELD(recip, SCALER_TPZ1_RECIP));
}
-static void vc4_write_ppf(struct vc4_plane_state *vc4_state, u32 src, u32 dst)
+/* phase magnitude bits */
+#define PHASE_BITS 6
+
+static void vc4_write_ppf(struct vc4_plane_state *vc4_state, u32 src, u32 dst, u32 xy, int channel)
{
- u32 scale = (1 << 16) * src / dst;
+ u32 scale = src / dst;
+ s32 offset, offset2;
+ s32 phase;
+
+ /* Start the phase at 1/2 pixel from the 1st pixel at src_x.
+ 1/4 pixel for YUV. */
+ if (channel) {
+ /* the phase is relative to scale_src->x, so shift it for display list's x value */
+ offset = (xy & 0x1ffff) >> (16 - PHASE_BITS) >> 1;
+ offset += -(1 << PHASE_BITS >> 2);
+ } else {
+ /* the phase is relative to scale_src->x, so shift it for display list's x value */
+ offset = (xy & 0xffff) >> (16 - PHASE_BITS);
+ offset += -(1 << PHASE_BITS >> 1);
+
+ /* This is a kludge to make sure the scaling factors are consitent with YUV's luma scaling.
+ we lose 1bit precision because of this. */
+ scale &= ~1;
+ }
+
+ /* There may be a also small error introduced by precision of scale.
+ Add half of that as a compromise */
+ offset2 = src - dst * scale;
+ offset2 >>= 16 - PHASE_BITS;
+ phase = offset + (offset2 >> 1);
+
+ /* Ensure +ve values don't touch the sign bit, then truncate negative values */
+ if (phase >= 1 << PHASE_BITS)
+ phase = (1 << PHASE_BITS) - 1;
+
+ phase &= SCALER_PPF_IPHASE_MASK;
vc4_dlist_write(vc4_state,
SCALER_PPF_AGC |
VC4_SET_FIELD(scale, SCALER_PPF_SCALE) |
- VC4_SET_FIELD(0, SCALER_PPF_IPHASE));
+ VC4_SET_FIELD(phase, SCALER_PPF_IPHASE));
}
static u32 vc4_lbm_size(struct drm_plane_state *state)
@@ -598,13 +631,13 @@ static void vc4_write_scaling_parameters(struct drm_plane_state *state,
/* Ch0 H-PPF Word 0: Scaling Parameters */
if (vc4_state->x_scaling[channel] == VC4_SCALING_PPF) {
vc4_write_ppf(vc4_state,
- vc4_state->src_w[channel], vc4_state->crtc_w);
+ vc4_state->src_w[channel], vc4_state->crtc_w, vc4_state->src_x, channel);
}
/* Ch0 V-PPF Words 0-1: Scaling Parameters, Context */
if (vc4_state->y_scaling[channel] == VC4_SCALING_PPF) {
vc4_write_ppf(vc4_state,
- vc4_state->src_h[channel], vc4_state->crtc_h);
+ vc4_state->src_h[channel], vc4_state->crtc_h, vc4_state->src_y, channel);
vc4_dlist_write(vc4_state, 0xc0c0c0c0);
}
@@ -1052,6 +1085,24 @@ static int vc4_plane_mode_set(struct drm_plane *plane,
return -EINVAL;
}
+ /* fetch an extra pixel if we don't actually line up with the left edge. */
+ if ((vc4_state->src_x & 0xffff) && vc4_state->src_x < (state->fb->width << 16))
+ width++;
+
+ /* same for the right side */
+ if (((vc4_state->src_x + vc4_state->src_w[0]) & 0xffff) &&
+ vc4_state->src_x + vc4_state->src_w[0] < (state->fb->width << 16))
+ width++;
+
+ /* now for the top */
+ if ((vc4_state->src_y & 0xffff) && vc4_state->src_y < (state->fb->height << 16))
+ height++;
+
+ /* and the bottom */
+ if (((vc4_state->src_y + vc4_state->src_h[0]) & 0xffff) &&
+ vc4_state->src_y + vc4_state->src_h[0] < (state->fb->height << 16))
+ height++;
+
/* Don't waste cycles mixing with plane alpha if the set alpha
* is opaque or there is no per-pixel alpha information.
* In any case we use the alpha property value as the fixed alpha.
--
2.44.0

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@ -1,183 +0,0 @@
From ab6920df43e7b33afb5aa0552c61f8485e1a60da Mon Sep 17 00:00:00 2001
From: Dom Cobley <popcornmix@gmail.com>
Date: Wed, 26 Jan 2022 15:58:13 +0000
Subject: [PATCH 0022/1002] drm: Add chroma siting properties
Signed-off-by: Dom Cobley <popcornmix@gmail.com>
---
drivers/gpu/drm/drm_atomic_state_helper.c | 14 +++++++++
drivers/gpu/drm/drm_atomic_uapi.c | 8 +++++
drivers/gpu/drm/drm_color_mgmt.c | 36 +++++++++++++++++++++++
include/drm/drm_color_mgmt.h | 3 ++
include/drm/drm_plane.h | 36 +++++++++++++++++++++++
5 files changed, 97 insertions(+)
diff --git a/drivers/gpu/drm/drm_atomic_state_helper.c b/drivers/gpu/drm/drm_atomic_state_helper.c
index 784e63d70a42..d7c761d9fb72 100644
--- a/drivers/gpu/drm/drm_atomic_state_helper.c
+++ b/drivers/gpu/drm/drm_atomic_state_helper.c
@@ -267,6 +267,20 @@ void __drm_atomic_helper_plane_state_reset(struct drm_plane_state *plane_state,
plane_state->color_range = val;
}
+ if (plane->chroma_siting_h_property) {
+ if (!drm_object_property_get_default_value(&plane->base,
+ plane->chroma_siting_h_property,
+ &val))
+ plane_state->chroma_siting_h = val;
+ }
+
+ if (plane->chroma_siting_v_property) {
+ if (!drm_object_property_get_default_value(&plane->base,
+ plane->chroma_siting_v_property,
+ &val))
+ plane_state->chroma_siting_v = val;
+ }
+
if (plane->zpos_property) {
if (!drm_object_property_get_default_value(&plane->base,
plane->zpos_property,
diff --git a/drivers/gpu/drm/drm_atomic_uapi.c b/drivers/gpu/drm/drm_atomic_uapi.c
index 98d3b10c08ae..9fd2c64a82ba 100644
--- a/drivers/gpu/drm/drm_atomic_uapi.c
+++ b/drivers/gpu/drm/drm_atomic_uapi.c
@@ -580,6 +580,10 @@ static int drm_atomic_plane_set_property(struct drm_plane *plane,
state->color_encoding = val;
} else if (property == plane->color_range_property) {
state->color_range = val;
+ } else if (property == plane->chroma_siting_h_property) {
+ state->chroma_siting_h = val;
+ } else if (property == plane->chroma_siting_v_property) {
+ state->chroma_siting_v = val;
} else if (property == config->prop_fb_damage_clips) {
ret = drm_atomic_replace_property_blob_from_id(dev,
&state->fb_damage_clips,
@@ -646,6 +650,10 @@ drm_atomic_plane_get_property(struct drm_plane *plane,
*val = state->color_encoding;
} else if (property == plane->color_range_property) {
*val = state->color_range;
+ } else if (property == plane->chroma_siting_h_property) {
+ *val = state->chroma_siting_h;
+ } else if (property == plane->chroma_siting_v_property) {
+ *val = state->chroma_siting_v;
} else if (property == config->prop_fb_damage_clips) {
*val = (state->fb_damage_clips) ?
state->fb_damage_clips->base.id : 0;
diff --git a/drivers/gpu/drm/drm_color_mgmt.c b/drivers/gpu/drm/drm_color_mgmt.c
index 996f12438016..973c6aeff8a1 100644
--- a/drivers/gpu/drm/drm_color_mgmt.c
+++ b/drivers/gpu/drm/drm_color_mgmt.c
@@ -590,6 +590,42 @@ int drm_plane_create_color_properties(struct drm_plane *plane,
}
EXPORT_SYMBOL(drm_plane_create_color_properties);
+/**
+ * drm_plane_create_chroma_siting_properties - chroma siting related plane properties
+ * @plane: plane object
+ *
+ * Create and attach plane specific CHROMA_SITING
+ * properties to @plane.
+ */
+int drm_plane_create_chroma_siting_properties(struct drm_plane *plane,
+ int32_t default_chroma_siting_h,
+ int32_t default_chroma_siting_v)
+{
+ struct drm_device *dev = plane->dev;
+ struct drm_property *prop;
+
+ prop = drm_property_create_range(dev, 0, "CHROMA_SITING_H",
+ 0, 1<<16);
+ if (!prop)
+ return -ENOMEM;
+ plane->chroma_siting_h_property = prop;
+ drm_object_attach_property(&plane->base, prop, default_chroma_siting_h);
+
+ prop = drm_property_create_range(dev, 0, "CHROMA_SITING_V",
+ 0, 1<<16);
+ if (!prop)
+ return -ENOMEM;
+ plane->chroma_siting_v_property = prop;
+ drm_object_attach_property(&plane->base, prop, default_chroma_siting_v);
+
+ if (plane->state) {
+ plane->state->chroma_siting_h = default_chroma_siting_h;
+ plane->state->chroma_siting_v = default_chroma_siting_v;
+ }
+ return 0;
+}
+EXPORT_SYMBOL(drm_plane_create_chroma_siting_properties);
+
/**
* drm_color_lut_check - check validity of lookup table
* @lut: property blob containing LUT to check
diff --git a/include/drm/drm_color_mgmt.h b/include/drm/drm_color_mgmt.h
index 6b5eec10c3db..5810aa8a9d87 100644
--- a/include/drm/drm_color_mgmt.h
+++ b/include/drm/drm_color_mgmt.h
@@ -94,6 +94,9 @@ int drm_plane_create_color_properties(struct drm_plane *plane,
enum drm_color_encoding default_encoding,
enum drm_color_range default_range);
+int drm_plane_create_chroma_siting_properties(struct drm_plane *plane,
+ int32_t default_chroma_siting_h, int32_t default_chroma_siting_v);
+
/**
* enum drm_color_lut_tests - hw-specific LUT tests to perform
*
diff --git a/include/drm/drm_plane.h b/include/drm/drm_plane.h
index fef775200a81..e4000d2f148d 100644
--- a/include/drm/drm_plane.h
+++ b/include/drm/drm_plane.h
@@ -177,6 +177,24 @@ struct drm_plane_state {
*/
enum drm_color_range color_range;
+ /**
+ * @chroma_siting_h:
+ *
+ * Location of chroma samples horizontally compared to luma
+ * 0 means chroma is sited with left luma
+ * 0x8000 is interstitial. 0x10000 is sited with right luma
+ */
+ int32_t chroma_siting_h;
+
+ /**
+ * @chroma_siting_v:
+ *
+ * Location of chroma samples vertically compared to luma
+ * 0 means chroma is sited with top luma
+ * 0x8000 is interstitial. 0x10000 is sited with bottom luma
+ */
+ int32_t chroma_siting_v;
+
/**
* @fb_damage_clips:
*
@@ -758,6 +776,24 @@ struct drm_plane {
* scaling.
*/
struct drm_property *scaling_filter_property;
+
+ /**
+ * @chroma_siting_h_property:
+ *
+ * Optional "CHROMA_SITING_H" property for specifying
+ * chroma siting for YUV formats.
+ * See drm_plane_create_chroma_siting_properties().
+ */
+ struct drm_property *chroma_siting_h_property;
+
+ /**
+ * @chroma_siting_v_property:
+ *
+ * Optional "CHROMA_SITING_V" property for specifying
+ * chroma siting for YUV formats.
+ * See drm_plane_create_chroma_siting_properties().
+ */
+ struct drm_property *chroma_siting_v_property;
};
#define obj_to_plane(x) container_of(x, struct drm_plane, base)
--
2.44.0

View file

@ -1,65 +0,0 @@
From 58d65d7d1c7b86291acaddea1606d884d5736ff0 Mon Sep 17 00:00:00 2001
From: Dom Cobley <popcornmix@gmail.com>
Date: Thu, 27 Jan 2022 15:32:04 +0000
Subject: [PATCH 0023/1002] vc4/drm:plane: Make use of chroma siting parameter
Signed-off-by: Dom Cobley <popcornmix@gmail.com>
---
drivers/gpu/drm/vc4/vc4_plane.c | 13 +++++++++----
1 file changed, 9 insertions(+), 4 deletions(-)
diff --git a/drivers/gpu/drm/vc4/vc4_plane.c b/drivers/gpu/drm/vc4/vc4_plane.c
index bc56bf37e185..25515ac44604 100644
--- a/drivers/gpu/drm/vc4/vc4_plane.c
+++ b/drivers/gpu/drm/vc4/vc4_plane.c
@@ -535,17 +535,18 @@ static void vc4_write_tpz(struct vc4_plane_state *vc4_state, u32 src, u32 dst)
/* phase magnitude bits */
#define PHASE_BITS 6
-static void vc4_write_ppf(struct vc4_plane_state *vc4_state, u32 src, u32 dst, u32 xy, int channel)
+static void vc4_write_ppf(struct vc4_plane_state *vc4_state, u32 src, u32 dst, u32 xy, int channel, int chroma_offset)
{
u32 scale = src / dst;
s32 offset, offset2;
s32 phase;
/* Start the phase at 1/2 pixel from the 1st pixel at src_x.
- 1/4 pixel for YUV. */
+ 1/4 pixel for YUV, plus the offset for chroma siting */
if (channel) {
/* the phase is relative to scale_src->x, so shift it for display list's x value */
offset = (xy & 0x1ffff) >> (16 - PHASE_BITS) >> 1;
+ offset -= chroma_offset >> (17 - PHASE_BITS);
offset += -(1 << PHASE_BITS >> 2);
} else {
/* the phase is relative to scale_src->x, so shift it for display list's x value */
@@ -631,13 +632,15 @@ static void vc4_write_scaling_parameters(struct drm_plane_state *state,
/* Ch0 H-PPF Word 0: Scaling Parameters */
if (vc4_state->x_scaling[channel] == VC4_SCALING_PPF) {
vc4_write_ppf(vc4_state,
- vc4_state->src_w[channel], vc4_state->crtc_w, vc4_state->src_x, channel);
+ vc4_state->src_w[channel], vc4_state->crtc_w, vc4_state->src_x, channel,
+ state->chroma_siting_h);
}
/* Ch0 V-PPF Words 0-1: Scaling Parameters, Context */
if (vc4_state->y_scaling[channel] == VC4_SCALING_PPF) {
vc4_write_ppf(vc4_state,
- vc4_state->src_h[channel], vc4_state->crtc_h, vc4_state->src_y, channel);
+ vc4_state->src_h[channel], vc4_state->crtc_h, vc4_state->src_y, channel,
+ state->chroma_siting_v);
vc4_dlist_write(vc4_state, 0xc0c0c0c0);
}
@@ -1721,6 +1724,8 @@ struct drm_plane *vc4_plane_init(struct drm_device *dev,
DRM_COLOR_YCBCR_BT709,
DRM_COLOR_YCBCR_LIMITED_RANGE);
+ drm_plane_create_chroma_siting_properties(plane, 0, 0);
+
if (type == DRM_PLANE_TYPE_PRIMARY)
drm_plane_create_zpos_immutable_property(plane, 0);
--
2.44.0

View file

@ -1,65 +0,0 @@
From c12bd0136e9772e955b5637185415d413d8d5b5c Mon Sep 17 00:00:00 2001
From: Dave Stevenson <dave.stevenson@raspberrypi.com>
Date: Fri, 1 Apr 2022 11:31:38 +0100
Subject: [PATCH 0024/1002] drm/vc4: Force trigger of dlist update on margins
change
When the margins are changed, the dlist needs to be regenerated
with the changed updated dest regions for each of the planes.
Setting the zpos_changed flag is sufficient to trigger that
without doing a full modeset, therefore set it should the
margins be changed.
Signed-off-by: Dave Stevenson <dave.stevenson@raspberrypi.com>
---
drivers/gpu/drm/vc4/vc4_crtc.c | 14 ++++++++++----
drivers/gpu/drm/vc4/vc4_drv.h | 7 +------
2 files changed, 11 insertions(+), 10 deletions(-)
diff --git a/drivers/gpu/drm/vc4/vc4_crtc.c b/drivers/gpu/drm/vc4/vc4_crtc.c
index 8f5ac282b450..0b0c2bdfe3d0 100644
--- a/drivers/gpu/drm/vc4/vc4_crtc.c
+++ b/drivers/gpu/drm/vc4/vc4_crtc.c
@@ -752,10 +752,16 @@ int vc4_crtc_atomic_check(struct drm_crtc *crtc,
if (conn_state->crtc != crtc)
continue;
- vc4_state->margins.left = conn_state->tv.margins.left;
- vc4_state->margins.right = conn_state->tv.margins.right;
- vc4_state->margins.top = conn_state->tv.margins.top;
- vc4_state->margins.bottom = conn_state->tv.margins.bottom;
+ if (memcmp(&vc4_state->margins, &conn_state->tv.margins,
+ sizeof(vc4_state->margins))) {
+ memcpy(&vc4_state->margins, &conn_state->tv.margins,
+ sizeof(vc4_state->margins));
+
+ /* Need to force the dlist entries for all planes to be
+ * updated so that the dest rectangles are changed.
+ */
+ crtc_state->zpos_changed = true;
+ }
break;
}
diff --git a/drivers/gpu/drm/vc4/vc4_drv.h b/drivers/gpu/drm/vc4/vc4_drv.h
index 7880fa1951e2..9485b58ad926 100644
--- a/drivers/gpu/drm/vc4/vc4_drv.h
+++ b/drivers/gpu/drm/vc4/vc4_drv.h
@@ -626,12 +626,7 @@ struct vc4_crtc_state {
bool txp_armed;
unsigned int assigned_channel;
- struct {
- unsigned int left;
- unsigned int right;
- unsigned int top;
- unsigned int bottom;
- } margins;
+ struct drm_connector_tv_margins margins;
unsigned long hvs_load;
--
2.44.0

View file

@ -1,131 +0,0 @@
From 268e65023226cc59363dd9c9d9ad56a11588f4c3 Mon Sep 17 00:00:00 2001
From: Daniel Vetter <daniel.vetter@ffwll.ch>
Date: Fri, 23 Oct 2020 14:39:23 +0200
Subject: [PATCH 0025/1002] drm/atomic-helpers: remove legacy_cursor_update
hacks
MIME-Version: 1.0
Content-Type: text/plain; charset=UTF-8
Content-Transfer-Encoding: 8bit
The stuff never really worked, and leads to lots of fun because it
out-of-order frees atomic states. Which upsets KASAN, among other
things.
For async updates we now have a more solid solution with the
->atomic_async_check and ->atomic_async_commit hooks. Support for that
for msm and vc4 landed. nouveau and i915 have their own commit
routines, doing something similar.
For everyone else it's probably better to remove the use-after-free
bug, and encourage folks to use the async support instead. The
affected drivers which register a legacy cursor plane and don't either
use the new async stuff or their own commit routine are: amdgpu,
atmel, mediatek, qxl, rockchip, sti, sun4i, tegra, virtio, and vmwgfx.
Inspired by an amdgpu bug report.
v2: Drop RFC, I think with amdgpu converted over to use
atomic_async_check/commit done in
commit 674e78acae0dfb4beb56132e41cbae5b60f7d662
Author: Nicholas Kazlauskas <nicholas.kazlauskas@amd.com>
Date: Wed Dec 5 14:59:07 2018 -0500
drm/amd/display: Add fast path for cursor plane updates
we don't have any driver anymore where we have userspace expecting
solid legacy cursor support _and_ they are using the atomic helpers in
their fully glory. So we can retire this.
v3: Paper over msm and i915 regression. The complete_all is the only
thing missing afaict.
v4: Rebased on recent kernel, added extra link for vc4 bug.
Link: https://bugzilla.kernel.org/show_bug.cgi?id=199425
Link: https://lore.kernel.org/all/20220221134155.125447-9-maxime@cerno.tech/
Cc: mikita.lipski@amd.com
Cc: Michel Dänzer <michel@daenzer.net>
Cc: harry.wentland@amd.com
Cc: Rob Clark <robdclark@gmail.com>
Cc: "Kazlauskas, Nicholas" <nicholas.kazlauskas@amd.com>
Tested-by: Maxime Ripard <maxime@cerno.tech>
Signed-off-by: Daniel Vetter <daniel.vetter@intel.com>
Signed-off-by: Maxime Ripard <maxime@cerno.tech>
---
drivers/gpu/drm/drm_atomic_helper.c | 13 -------------
drivers/gpu/drm/i915/display/intel_display.c | 13 +++++++++++++
drivers/gpu/drm/msm/msm_atomic.c | 2 ++
3 files changed, 15 insertions(+), 13 deletions(-)
diff --git a/drivers/gpu/drm/drm_atomic_helper.c b/drivers/gpu/drm/drm_atomic_helper.c
index 3f23927c9162..d759c5ebd410 100644
--- a/drivers/gpu/drm/drm_atomic_helper.c
+++ b/drivers/gpu/drm/drm_atomic_helper.c
@@ -1653,13 +1653,6 @@ drm_atomic_helper_wait_for_vblanks(struct drm_device *dev,
int i, ret;
unsigned int crtc_mask = 0;
- /*
- * Legacy cursor ioctls are completely unsynced, and userspace
- * relies on that (by doing tons of cursor updates).
- */
- if (old_state->legacy_cursor_update)
- return;
-
for_each_oldnew_crtc_in_state(old_state, crtc, old_crtc_state, new_crtc_state, i) {
if (!new_crtc_state->active)
continue;
@@ -2310,12 +2303,6 @@ int drm_atomic_helper_setup_commit(struct drm_atomic_state *state,
continue;
}
- /* Legacy cursor updates are fully unsynced. */
- if (state->legacy_cursor_update) {
- complete_all(&commit->flip_done);
- continue;
- }
-
if (!new_crtc_state->event) {
commit->event = kzalloc(sizeof(*commit->event),
GFP_KERNEL);
diff --git a/drivers/gpu/drm/i915/display/intel_display.c b/drivers/gpu/drm/i915/display/intel_display.c
index a072fbb9872a..066a3cd74df1 100644
--- a/drivers/gpu/drm/i915/display/intel_display.c
+++ b/drivers/gpu/drm/i915/display/intel_display.c
@@ -7267,6 +7267,19 @@ int intel_atomic_commit(struct drm_device *dev, struct drm_atomic_state *_state,
state->base.legacy_cursor_update = false;
}
+ /*
+ * FIXME: Cut over to (async) commit helpers instead of hand-rolling
+ * everything.
+ */
+ if (state->base.legacy_cursor_update) {
+ struct intel_crtc_state *new_crtc_state;
+ struct intel_crtc *crtc;
+ int i;
+
+ for_each_new_intel_crtc_in_state(state, crtc, new_crtc_state, i)
+ complete_all(&new_crtc_state->uapi.commit->flip_done);
+ }
+
ret = intel_atomic_prepare_commit(state);
if (ret) {
drm_dbg_atomic(&dev_priv->drm,
diff --git a/drivers/gpu/drm/msm/msm_atomic.c b/drivers/gpu/drm/msm/msm_atomic.c
index 9c45d641b521..5c8e5611304f 100644
--- a/drivers/gpu/drm/msm/msm_atomic.c
+++ b/drivers/gpu/drm/msm/msm_atomic.c
@@ -242,6 +242,8 @@ void msm_atomic_commit_tail(struct drm_atomic_state *state)
/* async updates are limited to single-crtc updates: */
WARN_ON(crtc_mask != drm_crtc_mask(async_crtc));
+ complete_all(&async_crtc->state->commit->flip_done);
+
/*
* Start timer if we don't already have an update pending
* on this crtc:
--
2.44.0

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@ -1,65 +0,0 @@
From f6d8271436e2589629ed6f3a8a85c3bde53353d6 Mon Sep 17 00:00:00 2001
From: Dave Stevenson <dave.stevenson@raspberrypi.com>
Date: Fri, 1 Apr 2022 17:10:37 +0100
Subject: [PATCH 0026/1002] drm/atomic: If margins are updated, update all
planes.
Margins may be implemented by scaling the planes, but as there
is no way of intercepting the set_property for a standard property,
and all planes are checked in drm_atomic_check_only before the
connectors, there's now way to add the planes into the state
from the driver.
If the margin properties change, add all corresponding planes to
the state.
Signed-off-by: Dave Stevenson <dave.stevenson@raspberrypi.com>
---
drivers/gpu/drm/drm_atomic_uapi.c | 11 +++++++++++
1 file changed, 11 insertions(+)
diff --git a/drivers/gpu/drm/drm_atomic_uapi.c b/drivers/gpu/drm/drm_atomic_uapi.c
index 9fd2c64a82ba..1e7c35b36a39 100644
--- a/drivers/gpu/drm/drm_atomic_uapi.c
+++ b/drivers/gpu/drm/drm_atomic_uapi.c
@@ -701,6 +701,7 @@ static int drm_atomic_connector_set_property(struct drm_connector *connector,
{
struct drm_device *dev = connector->dev;
struct drm_mode_config *config = &dev->mode_config;
+ bool margins_updated = false;
bool replaced = false;
int ret;
@@ -729,12 +730,16 @@ static int drm_atomic_connector_set_property(struct drm_connector *connector,
state->tv.subconnector = val;
} else if (property == config->tv_left_margin_property) {
state->tv.margins.left = val;
+ margins_updated = true;
} else if (property == config->tv_right_margin_property) {
state->tv.margins.right = val;
+ margins_updated = true;
} else if (property == config->tv_top_margin_property) {
state->tv.margins.top = val;
+ margins_updated = true;
} else if (property == config->tv_bottom_margin_property) {
state->tv.margins.bottom = val;
+ margins_updated = true;
} else if (property == config->legacy_tv_mode_property) {
state->tv.legacy_mode = val;
} else if (property == config->tv_mode_property) {
@@ -817,6 +822,12 @@ static int drm_atomic_connector_set_property(struct drm_connector *connector,
return -EINVAL;
}
+ if (margins_updated && state->crtc) {
+ ret = drm_atomic_add_affected_planes(state->state, state->crtc);
+
+ return ret;
+ }
+
return 0;
}
--
2.44.0

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@ -1,30 +0,0 @@
From 8bfb80d65ef2ee6434517f5224d895c8f8eb57e6 Mon Sep 17 00:00:00 2001
From: Maxime Ripard <maxime@cerno.tech>
Date: Mon, 11 Jul 2022 10:38:25 +0200
Subject: [PATCH 0027/1002] drm/vc4: hvs: Skip DebugFS Registration for FKMS
FKMS doesn't have an HVS and it's expected. Return from the debugfs init
function immediately if we're running with fkms.
Signed-off-by: Maxime Ripard <maxime@cerno.tech>
---
drivers/gpu/drm/vc4/vc4_hvs.c | 3 +++
1 file changed, 3 insertions(+)
diff --git a/drivers/gpu/drm/vc4/vc4_hvs.c b/drivers/gpu/drm/vc4/vc4_hvs.c
index 97842917c09a..5fee63e2fccc 100644
--- a/drivers/gpu/drm/vc4/vc4_hvs.c
+++ b/drivers/gpu/drm/vc4/vc4_hvs.c
@@ -976,6 +976,9 @@ int vc4_hvs_debugfs_init(struct drm_minor *minor)
struct vc4_dev *vc4 = to_vc4_dev(drm);
struct vc4_hvs *hvs = vc4->hvs;
+ if (vc4->firmware_kms)
+ return 0;
+
if (!vc4->hvs)
return -ENODEV;
--
2.44.0

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@ -1,63 +0,0 @@
From b67f05e1c4b2027b4950661b118c91850e747ee7 Mon Sep 17 00:00:00 2001
From: Dom Cobley <popcornmix@gmail.com>
Date: Wed, 1 Jun 2022 15:43:51 +0100
Subject: [PATCH 0028/1002] drm/vc4_hdmi: Allow hotplug detect to be forced
See: https://forum.libreelec.tv/thread/24783-tv-avr-turns-back-on-right-after-turning-them-off
While the kernel provides a :D flag for assuming device is connected,
it doesn't stop this function from being called and generating a cec_phys_addr_invalidate
message when hotplug is deasserted.
That message provokes a flurry of CEC messages which for many users results in the TV
switching back on again and it's very hard to get it to stay switched off.
It seems to only occur with an AVR and TV connected but has been observed across a
number of manufacturers.
The issue started with https://github.com/raspberrypi/linux/pull/4371
and this provides an optional way of getting back the old behaviour
Signed-off-by: Dom Cobley <popcornmix@gmail.com>
---
drivers/gpu/drm/vc4/vc4_hdmi.c | 10 +++++++++-
1 file changed, 9 insertions(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/vc4/vc4_hdmi.c b/drivers/gpu/drm/vc4/vc4_hdmi.c
index 25c9c71256d3..4bfd2880d31b 100644
--- a/drivers/gpu/drm/vc4/vc4_hdmi.c
+++ b/drivers/gpu/drm/vc4/vc4_hdmi.c
@@ -41,6 +41,8 @@
#include <linux/component.h>
#include <linux/gpio/consumer.h>
#include <linux/i2c.h>
+#include <linux/module.h>
+#include <linux/moduleparam.h>
#include <linux/of.h>
#include <linux/of_address.h>
#include <linux/pm_runtime.h>
@@ -109,6 +111,10 @@
#define HDMI_14_MAX_TMDS_CLK (340 * 1000 * 1000)
+/* bit field to force hotplug detection. bit0 = HDMI0 */
+static int force_hotplug = 0;
+module_param(force_hotplug, int, 0644);
+
static const char * const output_format_str[] = {
[VC4_HDMI_OUTPUT_RGB] = "RGB",
[VC4_HDMI_OUTPUT_YUV420] = "YUV 4:2:0",
@@ -472,7 +478,9 @@ static int vc4_hdmi_connector_detect_ctx(struct drm_connector *connector,
WARN_ON(pm_runtime_resume_and_get(&vc4_hdmi->pdev->dev));
- if (vc4_hdmi->hpd_gpio) {
+ if (force_hotplug & BIT(vc4_hdmi->encoder.type - VC4_ENCODER_TYPE_HDMI0))
+ status = connector_status_connected;
+ else if (vc4_hdmi->hpd_gpio) {
if (gpiod_get_value_cansleep(vc4_hdmi->hpd_gpio))
status = connector_status_connected;
} else {
--
2.44.0

View file

@ -1,46 +0,0 @@
From 7508b889b8c8058e53ceeec90a1e3cc998897e16 Mon Sep 17 00:00:00 2001
From: Dom Cobley <popcornmix@gmail.com>
Date: Tue, 6 Dec 2022 15:05:56 +0000
Subject: [PATCH 0029/1002] vc4_hdmi: Avoid log spam for audio start failure
We regularly get dmesg error reports of:
[ 18.184066] hdmi-audio-codec hdmi-audio-codec.3.auto: ASoC: error at snd_soc_dai_startup on i2s-hifi: -19
[ 18.184098] MAI: soc_pcm_open() failed (-19)
Currently I get 30 of these when booting to desktop.
We always say, ignore they are harmless, but removing them would be good.
A bit of investigation shows, for me, the errors are all generated by second, unused hdmi interface.
It shows as an alsa device, and pulseaudio attempts to open it (numerous times), generating a kernel
error message each time.
systemctl --user restart pulseaudio.service generates 6 additional error messages.
The error messages all come through:
https://github.com/raspberrypi/linux/blob/a009a9c0d79dfec114ee5102ec3d3325a172c952/sound/soc/soc-pcm.c#L39
which suggests returning ENOTSUPP, rather that ENODEV will be quiet. And indeed it is.
Note: earlier kernels do not have the quiet ENOTSUPP, so additional cherry-picks will be needed to backport
Signed-off-by: Dom Cobley <popcornmix@gmail.com>
---
drivers/gpu/drm/vc4/vc4_hdmi.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/vc4/vc4_hdmi.c b/drivers/gpu/drm/vc4/vc4_hdmi.c
index 4bfd2880d31b..350174233a16 100644
--- a/drivers/gpu/drm/vc4/vc4_hdmi.c
+++ b/drivers/gpu/drm/vc4/vc4_hdmi.c
@@ -2394,7 +2394,7 @@ static int vc4_hdmi_audio_startup(struct device *dev, void *data)
}
if (!vc4_hdmi_audio_can_stream(vc4_hdmi)) {
- ret = -ENODEV;
+ ret = -ENOTSUPP;
goto out_dev_exit;
}
--
2.44.0

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@ -1,410 +0,0 @@
From bd8bb0ed9c5908f84502ee76a152370291727eef Mon Sep 17 00:00:00 2001
From: Maxime Ripard <maxime@cerno.tech>
Date: Thu, 16 Dec 2021 14:54:54 +0100
Subject: [PATCH 0030/1002] drm/vc4: hvs: Defer dlist slots deallocation
During normal operations, the cursor position update is done through an
asynchronous plane update, which on the vc4 driver basically just
modifies the right dlist word to move the plane to the new coordinates.
However, when we have the overscan margins setup, we fall back to a
regular commit when we are next to the edges. And since that commit
happens to be on a cursor plane, it's considered a legacy cursor update
by KMS.
The main difference it makes is that it won't wait for its completion
(ie, next vblank) before returning. This means if we have multiple
commits happening in rapid succession, we can have several of them
happening before the next vblank.
In parallel, our dlist allocation is tied to a CRTC state, and each time
we do a commit we end up with a new CRTC state, with the previous one
being freed. This means that we free our previous dlist entry (but don't
clear it though) every time a new one is being committed.
Now, if we were to have two commits happening before the next vblank, we
could end up freeing reusing the same dlist entries before the next
vblank.
Indeed, we would start from an initial state taking, for example, the
dlist entries 10 to 20, then start a commit taking the entries 20 to 30
and setting the dlist pointer to 20, and freeing the dlist entries 10 to
20. However, since we haven't reach vblank yet, the HVS is still using
the entries 10 to 20.
If we were to make a new commit now, chances are the allocator are going
to give the 10 to 20 entries back, and we would change their content to
match the new state. If vblank hasn't happened yet, we just corrupted
the active dlist entries.
A first attempt to solve this was made by creating an intermediate dlist
buffer to store the current (ie, as of the last commit) dlist content,
that we would update each time the HVS is done with a frame. However, if
the interrupt handler missed the vblank window, we would end up copying
our intermediate dlist to the hardware one during the composition,
essentially creating the same issue.
Since making sure that our interrupt handler runs within a fixed,
constrained, time window would require to make Linux a real-time kernel,
this seems a bit out of scope.
Instead, we can work around our original issue by keeping the dlist
slots allocation longer. That way, we won't reuse a dlist slot while
it's still in flight. In order to achieve this, instead of freeing the
dlist slot when its associated CRTC state is destroyed, we'll queue it
in a list.
A naive implementation would free the buffers in that queue when we get
our end of frame interrupt. However, there's still a race since, just
like in the shadow dlist case, we don't control when the handler for
that interrupt is going to run. Thus, we can end up with a commit adding
an old dlist allocation to our queue during the window between our
actual interrupt and when our handler will run. And since that buffer is
still being used for the composition of the current frame, we can't free
it right away, exposing us to the original bug.
Fortunately for us, the hardware provides a frame counter that is
increased each time the first line of a frame is being generated.
Associating the frame counter the image is supposed to go away to the
allocation, and then only deallocate buffers that have a counter below
or equal to the one we see when the deallocation code should prevent the
above race from occuring.
Signed-off-by: Maxime Ripard <maxime@cerno.tech>
---
drivers/gpu/drm/vc4/vc4_crtc.c | 10 +-
drivers/gpu/drm/vc4/vc4_drv.h | 15 ++-
drivers/gpu/drm/vc4/vc4_hvs.c | 184 ++++++++++++++++++++++++++++++---
3 files changed, 186 insertions(+), 23 deletions(-)
diff --git a/drivers/gpu/drm/vc4/vc4_crtc.c b/drivers/gpu/drm/vc4/vc4_crtc.c
index 0b0c2bdfe3d0..449653591905 100644
--- a/drivers/gpu/drm/vc4/vc4_crtc.c
+++ b/drivers/gpu/drm/vc4/vc4_crtc.c
@@ -1097,14 +1097,8 @@ void vc4_crtc_destroy_state(struct drm_crtc *crtc,
struct vc4_dev *vc4 = to_vc4_dev(crtc->dev);
struct vc4_crtc_state *vc4_state = to_vc4_crtc_state(state);
- if (drm_mm_node_allocated(&vc4_state->mm)) {
- unsigned long flags;
-
- spin_lock_irqsave(&vc4->hvs->mm_lock, flags);
- drm_mm_remove_node(&vc4_state->mm);
- spin_unlock_irqrestore(&vc4->hvs->mm_lock, flags);
-
- }
+ vc4_hvs_mark_dlist_entry_stale(vc4->hvs, vc4_state->mm);
+ vc4_state->mm = NULL;
drm_atomic_helper_crtc_destroy_state(crtc, state);
}
diff --git a/drivers/gpu/drm/vc4/vc4_drv.h b/drivers/gpu/drm/vc4/vc4_drv.h
index 9485b58ad926..3aebb34455b4 100644
--- a/drivers/gpu/drm/vc4/vc4_drv.h
+++ b/drivers/gpu/drm/vc4/vc4_drv.h
@@ -332,6 +332,9 @@ struct vc4_hvs {
struct drm_mm lbm_mm;
spinlock_t mm_lock;
+ struct list_head stale_dlist_entries;
+ struct work_struct free_dlist_work;
+
struct drm_mm_node mitchell_netravali_filter;
struct debugfs_regset32 regset;
@@ -619,10 +622,16 @@ struct drm_connector *vc4_get_crtc_connector(struct drm_crtc *crtc,
struct drm_encoder *vc4_get_crtc_encoder(struct drm_crtc *crtc,
struct drm_crtc_state *state);
+struct vc4_hvs_dlist_allocation {
+ struct list_head node;
+ struct drm_mm_node mm_node;
+ unsigned int channel;
+ u8 target_frame_count;
+};
+
struct vc4_crtc_state {
struct drm_crtc_state base;
- /* Dlist area for this CRTC configuration. */
- struct drm_mm_node mm;
+ struct vc4_hvs_dlist_allocation *mm;
bool txp_armed;
unsigned int assigned_channel;
@@ -1032,6 +1041,8 @@ struct vc4_hvs *__vc4_hvs_alloc(struct vc4_dev *vc4, struct platform_device *pde
void vc4_hvs_stop_channel(struct vc4_hvs *hvs, unsigned int output);
int vc4_hvs_get_fifo_from_output(struct vc4_hvs *hvs, unsigned int output);
u8 vc4_hvs_get_fifo_frame_count(struct vc4_hvs *hvs, unsigned int fifo);
+void vc4_hvs_mark_dlist_entry_stale(struct vc4_hvs *hvs,
+ struct vc4_hvs_dlist_allocation *alloc);
int vc4_hvs_atomic_check(struct drm_crtc *crtc, struct drm_atomic_state *state);
void vc4_hvs_atomic_begin(struct drm_crtc *crtc, struct drm_atomic_state *state);
void vc4_hvs_atomic_enable(struct drm_crtc *crtc, struct drm_atomic_state *state);
diff --git a/drivers/gpu/drm/vc4/vc4_hvs.c b/drivers/gpu/drm/vc4/vc4_hvs.c
index 5fee63e2fccc..984dcb55a71e 100644
--- a/drivers/gpu/drm/vc4/vc4_hvs.c
+++ b/drivers/gpu/drm/vc4/vc4_hvs.c
@@ -412,6 +412,152 @@ static void vc5_hvs_update_gamma_lut(struct vc4_hvs *hvs,
vc5_hvs_lut_load(hvs, vc4_crtc);
}
+static void vc4_hvs_irq_enable_eof(const struct vc4_hvs *hvs,
+ unsigned int channel)
+{
+ struct vc4_dev *vc4 = hvs->vc4;
+ u32 irq_mask = vc4->is_vc5 ?
+ SCALER5_DISPCTRL_DSPEIEOF(channel) :
+ SCALER_DISPCTRL_DSPEIEOF(channel);
+
+ HVS_WRITE(SCALER_DISPCTRL,
+ HVS_READ(SCALER_DISPCTRL) | irq_mask);
+}
+
+static void vc4_hvs_irq_clear_eof(const struct vc4_hvs *hvs,
+ unsigned int channel)
+{
+ struct vc4_dev *vc4 = hvs->vc4;
+ u32 irq_mask = vc4->is_vc5 ?
+ SCALER5_DISPCTRL_DSPEIEOF(channel) :
+ SCALER_DISPCTRL_DSPEIEOF(channel);
+
+ HVS_WRITE(SCALER_DISPCTRL,
+ HVS_READ(SCALER_DISPCTRL) & ~irq_mask);
+}
+
+static struct vc4_hvs_dlist_allocation *
+vc4_hvs_alloc_dlist_entry(struct vc4_hvs *hvs,
+ unsigned int channel,
+ size_t dlist_count)
+{
+ struct vc4_hvs_dlist_allocation *alloc;
+ unsigned long flags;
+ int ret;
+
+ if (channel == VC4_HVS_CHANNEL_DISABLED)
+ return NULL;
+
+ alloc = kzalloc(sizeof(*alloc), GFP_KERNEL);
+ if (!alloc)
+ return ERR_PTR(-ENOMEM);
+
+ spin_lock_irqsave(&hvs->mm_lock, flags);
+ ret = drm_mm_insert_node(&hvs->dlist_mm, &alloc->mm_node,
+ dlist_count);
+ spin_unlock_irqrestore(&hvs->mm_lock, flags);
+ if (ret)
+ return ERR_PTR(ret);
+
+ alloc->channel = channel;
+
+ return alloc;
+}
+
+void vc4_hvs_mark_dlist_entry_stale(struct vc4_hvs *hvs,
+ struct vc4_hvs_dlist_allocation *alloc)
+{
+ unsigned long flags;
+ u8 frcnt;
+
+ if (!alloc)
+ return;
+
+ if (!drm_mm_node_allocated(&alloc->mm_node))
+ return;
+
+ frcnt = vc4_hvs_get_fifo_frame_count(hvs, alloc->channel);
+ alloc->target_frame_count = (frcnt + 1) & ((1 << 6) - 1);
+
+ spin_lock_irqsave(&hvs->mm_lock, flags);
+
+ list_add_tail(&alloc->node, &hvs->stale_dlist_entries);
+
+ HVS_WRITE(SCALER_DISPSTAT, SCALER_DISPSTAT_EOF(alloc->channel));
+ vc4_hvs_irq_enable_eof(hvs, alloc->channel);
+
+ spin_unlock_irqrestore(&hvs->mm_lock, flags);
+}
+
+static void vc4_hvs_schedule_dlist_sweep(struct vc4_hvs *hvs,
+ unsigned int channel)
+{
+ unsigned long flags;
+
+ spin_lock_irqsave(&hvs->mm_lock, flags);
+
+ if (!list_empty(&hvs->stale_dlist_entries))
+ queue_work(system_unbound_wq, &hvs->free_dlist_work);
+
+ vc4_hvs_irq_clear_eof(hvs, channel);
+
+ spin_unlock_irqrestore(&hvs->mm_lock, flags);
+}
+
+/*
+ * Frame counts are essentially sequence numbers over 6 bits, and we
+ * thus can use sequence number arithmetic and follow the RFC1982 to
+ * implement proper comparison between them.
+ */
+static bool vc4_hvs_frcnt_lte(u8 cnt1, u8 cnt2)
+{
+ return (s8)((cnt1 << 2) - (cnt2 << 2)) <= 0;
+}
+
+/*
+ * Some atomic commits (legacy cursor updates, mostly) will not wait for
+ * the next vblank and will just return once the commit has been pushed
+ * to the hardware.
+ *
+ * On the hardware side, our HVS stores the planes parameters in its
+ * context RAM, and will use part of the RAM to store data during the
+ * frame rendering.
+ *
+ * This interacts badly if we get multiple commits before the next
+ * vblank since we could end up overwriting the DLIST entries used by
+ * previous commits if our dlist allocation reuses that entry. In such a
+ * case, we would overwrite the data currently being used by the
+ * hardware, resulting in a corrupted frame.
+ *
+ * In order to work around this, we'll queue the dlist entries in a list
+ * once the associated CRTC state is destroyed. The HVS only allows us
+ * to know which entry is being active, but not which one are no longer
+ * being used, so in order to avoid freeing entries that are still used
+ * by the hardware we add a guesstimate of the frame count where our
+ * entry will no longer be used, and thus will only free those entries
+ * when we will have reached that frame count.
+ */
+static void vc4_hvs_dlist_free_work(struct work_struct *work)
+{
+ struct vc4_hvs *hvs = container_of(work, struct vc4_hvs, free_dlist_work);
+ struct vc4_hvs_dlist_allocation *cur, *next;
+ unsigned long flags;
+
+ spin_lock_irqsave(&hvs->mm_lock, flags);
+ list_for_each_entry_safe(cur, next, &hvs->stale_dlist_entries, node) {
+ u8 frcnt;
+
+ frcnt = vc4_hvs_get_fifo_frame_count(hvs, cur->channel);
+ if (!vc4_hvs_frcnt_lte(cur->target_frame_count, frcnt))
+ continue;
+
+ list_del(&cur->node);
+ drm_mm_remove_node(&cur->mm_node);
+ kfree(cur);
+ }
+ spin_unlock_irqrestore(&hvs->mm_lock, flags);
+}
+
u8 vc4_hvs_get_fifo_frame_count(struct vc4_hvs *hvs, unsigned int fifo)
{
struct drm_device *drm = &hvs->vc4->base;
@@ -643,13 +789,12 @@ int vc4_hvs_atomic_check(struct drm_crtc *crtc, struct drm_atomic_state *state)
{
struct drm_crtc_state *crtc_state = drm_atomic_get_new_crtc_state(state, crtc);
struct vc4_crtc_state *vc4_state = to_vc4_crtc_state(crtc_state);
+ struct vc4_hvs_dlist_allocation *alloc;
struct drm_device *dev = crtc->dev;
struct vc4_dev *vc4 = to_vc4_dev(dev);
struct drm_plane *plane;
- unsigned long flags;
const struct drm_plane_state *plane_state;
u32 dlist_count = 0;
- int ret;
/* The pixelvalve can only feed one encoder (and encoders are
* 1:1 with connectors.)
@@ -662,12 +807,11 @@ int vc4_hvs_atomic_check(struct drm_crtc *crtc, struct drm_atomic_state *state)
dlist_count++; /* Account for SCALER_CTL0_END. */
- spin_lock_irqsave(&vc4->hvs->mm_lock, flags);
- ret = drm_mm_insert_node(&vc4->hvs->dlist_mm, &vc4_state->mm,
- dlist_count);
- spin_unlock_irqrestore(&vc4->hvs->mm_lock, flags);
- if (ret)
- return ret;
+ alloc = vc4_hvs_alloc_dlist_entry(vc4->hvs, vc4_state->assigned_channel, dlist_count);
+ if (IS_ERR(alloc))
+ return PTR_ERR(alloc);
+
+ vc4_state->mm = alloc;
return vc4_hvs_gamma_check(crtc, state);
}
@@ -683,8 +827,9 @@ static void vc4_hvs_install_dlist(struct drm_crtc *crtc)
if (!drm_dev_enter(dev, &idx))
return;
+ WARN_ON(!vc4_state->mm);
HVS_WRITE(SCALER_DISPLISTX(vc4_state->assigned_channel),
- vc4_state->mm.start);
+ vc4_state->mm->mm_node.start);
drm_dev_exit(idx);
}
@@ -711,8 +856,10 @@ static void vc4_hvs_update_dlist(struct drm_crtc *crtc)
spin_unlock_irqrestore(&dev->event_lock, flags);
}
+ WARN_ON(!vc4_state->mm);
+
spin_lock_irqsave(&vc4_crtc->irq_lock, flags);
- vc4_crtc->current_dlist = vc4_state->mm.start;
+ vc4_crtc->current_dlist = vc4_state->mm->mm_node.start;
spin_unlock_irqrestore(&vc4_crtc->irq_lock, flags);
}
@@ -769,8 +916,7 @@ void vc4_hvs_atomic_flush(struct drm_crtc *crtc,
struct vc4_plane_state *vc4_plane_state;
bool debug_dump_regs = false;
bool enable_bg_fill = false;
- u32 __iomem *dlist_start = vc4->hvs->dlist + vc4_state->mm.start;
- u32 __iomem *dlist_next = dlist_start;
+ u32 __iomem *dlist_start, *dlist_next;
unsigned int zpos = 0;
bool found = false;
int idx;
@@ -788,6 +934,9 @@ void vc4_hvs_atomic_flush(struct drm_crtc *crtc,
vc4_hvs_dump_state(hvs);
}
+ dlist_start = vc4->hvs->dlist + vc4_state->mm->mm_node.start;
+ dlist_next = dlist_start;
+
/* Copy all the active planes' dlist contents to the hardware dlist. */
do {
found = false;
@@ -821,7 +970,8 @@ void vc4_hvs_atomic_flush(struct drm_crtc *crtc,
writel(SCALER_CTL0_END, dlist_next);
dlist_next++;
- WARN_ON_ONCE(dlist_next - dlist_start != vc4_state->mm.size);
+ WARN_ON(!vc4_state->mm);
+ WARN_ON_ONCE(dlist_next - dlist_start != vc4_state->mm->mm_node.size);
if (enable_bg_fill)
/* This sets a black background color fill, as is the case
@@ -960,6 +1110,11 @@ static irqreturn_t vc4_hvs_irq_handler(int irq, void *data)
irqret = IRQ_HANDLED;
}
+
+ if (status & SCALER_DISPSTAT_EOF(channel)) {
+ vc4_hvs_schedule_dlist_sweep(hvs, channel);
+ irqret = IRQ_HANDLED;
+ }
}
/* Clear every per-channel interrupt flag. */
@@ -1014,6 +1169,9 @@ struct vc4_hvs *__vc4_hvs_alloc(struct vc4_dev *vc4, struct platform_device *pde
spin_lock_init(&hvs->mm_lock);
+ INIT_LIST_HEAD(&hvs->stale_dlist_entries);
+ INIT_WORK(&hvs->free_dlist_work, vc4_hvs_dlist_free_work);
+
/* Set up the HVS display list memory manager. We never
* overwrite the setup from the bootloader (just 128b out of
* our 16K), since we don't want to scramble the screen when
--
2.44.0

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@ -1,35 +0,0 @@
From bc1c5829ecc698e41379f461f1fd7e8d600b879f Mon Sep 17 00:00:00 2001
From: Maxime Ripard <maxime@cerno.tech>
Date: Wed, 25 Jan 2023 12:38:37 +0100
Subject: [PATCH 0031/1002] drm/vc4: hvs: Initialize the dlist allocation list
entry
The vc4_hvs_dlist_allocation structure has a list that we don't
initialize when we allocate a new instance.
This makes any call reading the list structure (such as list_empty) fail
with a NULL pointer dereference.
Let's make sure our list is always initialized.
Signed-off-by: Maxime Ripard <maxime@cerno.tech>
---
drivers/gpu/drm/vc4/vc4_hvs.c | 2 ++
1 file changed, 2 insertions(+)
diff --git a/drivers/gpu/drm/vc4/vc4_hvs.c b/drivers/gpu/drm/vc4/vc4_hvs.c
index 984dcb55a71e..36591b5bf5f6 100644
--- a/drivers/gpu/drm/vc4/vc4_hvs.c
+++ b/drivers/gpu/drm/vc4/vc4_hvs.c
@@ -452,6 +452,8 @@ vc4_hvs_alloc_dlist_entry(struct vc4_hvs *hvs,
if (!alloc)
return ERR_PTR(-ENOMEM);
+ INIT_LIST_HEAD(&alloc->node);
+
spin_lock_irqsave(&hvs->mm_lock, flags);
ret = drm_mm_insert_node(&hvs->dlist_mm, &alloc->mm_node,
dlist_count);
--
2.44.0

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@ -1,51 +0,0 @@
From 9e2b5f6b8d74b18c96521c3e9ddd3f7fc75d917f Mon Sep 17 00:00:00 2001
From: Maxime Ripard <maxime@cerno.tech>
Date: Wed, 25 Jan 2023 12:54:36 +0100
Subject: [PATCH 0032/1002] drm/vc4: hvs: Move the dlist allocation destruction
to a function
We'll need to destroy a dlist allocation in multiple code paths, so
let's move it to a separate function.
Signed-off-by: Maxime Ripard <maxime@cerno.tech>
---
drivers/gpu/drm/vc4/vc4_hvs.c | 16 +++++++++++++---
1 file changed, 13 insertions(+), 3 deletions(-)
diff --git a/drivers/gpu/drm/vc4/vc4_hvs.c b/drivers/gpu/drm/vc4/vc4_hvs.c
index 36591b5bf5f6..cfeef2f2c948 100644
--- a/drivers/gpu/drm/vc4/vc4_hvs.c
+++ b/drivers/gpu/drm/vc4/vc4_hvs.c
@@ -466,6 +466,18 @@ vc4_hvs_alloc_dlist_entry(struct vc4_hvs *hvs,
return alloc;
}
+static void vc4_hvs_free_dlist_entry_locked(struct vc4_hvs *hvs,
+ struct vc4_hvs_dlist_allocation *alloc)
+{
+ lockdep_assert_held(&hvs->mm_lock);
+
+ if (!list_empty(&alloc->node))
+ list_del(&alloc->node);
+
+ drm_mm_remove_node(&alloc->mm_node);
+ kfree(alloc);
+}
+
void vc4_hvs_mark_dlist_entry_stale(struct vc4_hvs *hvs,
struct vc4_hvs_dlist_allocation *alloc)
{
@@ -553,9 +565,7 @@ static void vc4_hvs_dlist_free_work(struct work_struct *work)
if (!vc4_hvs_frcnt_lte(cur->target_frame_count, frcnt))
continue;
- list_del(&cur->node);
- drm_mm_remove_node(&cur->mm_node);
- kfree(cur);
+ vc4_hvs_free_dlist_entry_locked(hvs, cur);
}
spin_unlock_irqrestore(&hvs->mm_lock, flags);
}
--
2.44.0

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@ -1,53 +0,0 @@
From e546f85606dcf2cdff94ff32a0756e2541bccb05 Mon Sep 17 00:00:00 2001
From: Maxime Ripard <maxime@cerno.tech>
Date: Wed, 25 Jan 2023 13:05:26 +0100
Subject: [PATCH 0033/1002] drm/vc4: hvs: Destroy dlist allocations immediately
when running a test
When running a kunit test, the driver runs with a mock device. As such,
any attempt to read or write to a hardware register will fail the
current test immediately.
The dlist allocation management recently introduced will read the
current frame count from the HVS to defer its destruction until a
subsequent frame has been output. This obviously involves a register
read that fails the Kunit tests.
Change the destruction deferral function to destroy the allocation
immediately if we run under kunit. This is essentially harmless since
the main reason for that deferall is to prevent any access to the
hardware dlist while a frame described by that list is rendered. On our
mock driver, we have neither a hardware dlist nor a rendering, so it
doesn't matter.
Signed-off-by: Maxime Ripard <maxime@cerno.tech>
---
drivers/gpu/drm/vc4/vc4_hvs.c | 12 ++++++++++++
1 file changed, 12 insertions(+)
diff --git a/drivers/gpu/drm/vc4/vc4_hvs.c b/drivers/gpu/drm/vc4/vc4_hvs.c
index cfeef2f2c948..c0ece21571fa 100644
--- a/drivers/gpu/drm/vc4/vc4_hvs.c
+++ b/drivers/gpu/drm/vc4/vc4_hvs.c
@@ -490,6 +490,18 @@ void vc4_hvs_mark_dlist_entry_stale(struct vc4_hvs *hvs,
if (!drm_mm_node_allocated(&alloc->mm_node))
return;
+ /*
+ * Kunit tests run with a mock device and we consider any hardware
+ * access a test failure. Let's free the dlist allocation right away if
+ * we're running under kunit, we won't risk a dlist corruption anyway.
+ */
+ if (kunit_get_current_test()) {
+ spin_lock_irqsave(&hvs->mm_lock, flags);
+ vc4_hvs_free_dlist_entry_locked(hvs, alloc);
+ spin_unlock_irqrestore(&hvs->mm_lock, flags);
+ return;
+ }
+
frcnt = vc4_hvs_get_fifo_frame_count(hvs, alloc->channel);
alloc->target_frame_count = (frcnt + 1) & ((1 << 6) - 1);
--
2.44.0

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@ -1,58 +0,0 @@
From fb2081692fb040f6260e008272c9f6cb155c9a77 Mon Sep 17 00:00:00 2001
From: Dom Cobley <popcornmix@gmail.com>
Date: Tue, 31 Jan 2023 15:14:32 +0000
Subject: [PATCH 0034/1002] drm/vc4_plane: Add support for YUV444 formats
Support displaying DRM_FORMAT_YUV444 and DRM_FORMAT_YVU444 formats.
Tested with kmstest and kodi. e.g.
kmstest -r 1920x1080@60 -f 400x300-YU24
Note: without the shift of width, only half the chroma is fetched,
resulting in correct left half of image and corrupt colours on right half.
The increase in width shouldn't affect fetching of Y data,
as the hardware will clamp at dest width.
Signed-off-by: Dom Cobley <popcornmix@gmail.com>
---
drivers/gpu/drm/vc4/vc4_plane.c | 16 ++++++++++++++++
1 file changed, 16 insertions(+)
diff --git a/drivers/gpu/drm/vc4/vc4_plane.c b/drivers/gpu/drm/vc4/vc4_plane.c
index 25515ac44604..d99e2c56bf41 100644
--- a/drivers/gpu/drm/vc4/vc4_plane.c
+++ b/drivers/gpu/drm/vc4/vc4_plane.c
@@ -109,6 +109,18 @@ static const struct hvs_format {
.pixel_order = HVS_PIXEL_ORDER_XYCRCB,
.pixel_order_hvs5 = HVS_PIXEL_ORDER_XYCRCB,
},
+ {
+ .drm = DRM_FORMAT_YUV444,
+ .hvs = HVS_PIXEL_FORMAT_YCBCR_YUV422_3PLANE,
+ .pixel_order = HVS_PIXEL_ORDER_XYCBCR,
+ .pixel_order_hvs5 = HVS_PIXEL_ORDER_XYCBCR,
+ },
+ {
+ .drm = DRM_FORMAT_YVU444,
+ .hvs = HVS_PIXEL_FORMAT_YCBCR_YUV422_3PLANE,
+ .pixel_order = HVS_PIXEL_ORDER_XYCRCB,
+ .pixel_order_hvs5 = HVS_PIXEL_ORDER_XYCRCB,
+ },
{
.drm = DRM_FORMAT_YUV420,
.hvs = HVS_PIXEL_FORMAT_YCBCR_YUV420_3PLANE,
@@ -1106,6 +1118,10 @@ static int vc4_plane_mode_set(struct drm_plane *plane,
vc4_state->src_y + vc4_state->src_h[0] < (state->fb->height << 16))
height++;
+ /* for YUV444 hardware wants double the width, otherwise it doesn't fetch full width of chroma */
+ if (format->drm == DRM_FORMAT_YUV444 || format->drm == DRM_FORMAT_YVU444)
+ width <<= 1;
+
/* Don't waste cycles mixing with plane alpha if the set alpha
* is opaque or there is no per-pixel alpha information.
* In any case we use the alpha property value as the fixed alpha.
--
2.44.0

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@ -1,34 +0,0 @@
From 57fe034a5020aca4a7d1558b21c31737c2abc15e Mon Sep 17 00:00:00 2001
From: Matthias Reichl <hias@horus.com>
Date: Sat, 14 Jan 2023 16:24:39 +0100
Subject: [PATCH 0035/1002] drm/vc4: Calculate bpc based on max_requested_bpc
This aligns vc4 with Intel, AMD and Synopsis drivers and fixes max bpc
connector property not working as expected on monitors with YCbCr 4:2:2
support but not deep color support.
max_bpc in connector state is clamped at max_bpc from display info and
the latter only takes deep color modes into account so it will always
be 8, even if the display can do 4:2:2 12-bit output.
Signed-off-by: Matthias Reichl <hias@horus.com>
---
drivers/gpu/drm/vc4/vc4_hdmi.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/vc4/vc4_hdmi.c b/drivers/gpu/drm/vc4/vc4_hdmi.c
index 350174233a16..330dae413734 100644
--- a/drivers/gpu/drm/vc4/vc4_hdmi.c
+++ b/drivers/gpu/drm/vc4/vc4_hdmi.c
@@ -2126,7 +2126,7 @@ vc4_hdmi_encoder_compute_config(const struct vc4_hdmi *vc4_hdmi,
{
struct drm_device *dev = vc4_hdmi->connector.dev;
struct drm_connector_state *conn_state = &vc4_state->base;
- unsigned int max_bpc = clamp_t(unsigned int, conn_state->max_bpc, 8, 12);
+ unsigned int max_bpc = clamp_t(unsigned int, conn_state->max_requested_bpc, 8, 12);
unsigned int bpc;
int ret;
--
2.44.0

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@ -1,44 +0,0 @@
From 78a1315a44243385c57289a2c30f3b25de87b603 Mon Sep 17 00:00:00 2001
From: Dave Stevenson <dave.stevenson@raspberrypi.com>
Date: Thu, 11 Aug 2022 13:59:34 +0100
Subject: [PATCH 0036/1002] drm/vc4: Set AXI panic modes for the HVS
The HVS can change AXI request mode based on how full the COB
FIFOs are.
Until now the vc4 driver has been relying on the firmware to
have set these to sensible values.
With HVS channel 2 now being used for live video, change the
panic mode for all channels to be explicitly set by the driver,
and the same for all channels.
Signed-off-by: Dave Stevenson <dave.stevenson@raspberrypi.com>
---
drivers/gpu/drm/vc4/vc4_hvs.c | 11 +++++++++++
1 file changed, 11 insertions(+)
diff --git a/drivers/gpu/drm/vc4/vc4_hvs.c b/drivers/gpu/drm/vc4/vc4_hvs.c
index c0ece21571fa..b3634cd5d785 100644
--- a/drivers/gpu/drm/vc4/vc4_hvs.c
+++ b/drivers/gpu/drm/vc4/vc4_hvs.c
@@ -1352,6 +1352,17 @@ static int vc4_hvs_bind(struct device *dev, struct device *master, void *data)
SCALER_DISPCTRL_SCLEIRQ);
+ /* Set AXI panic mode.
+ * VC4 panics when < 2 lines in FIFO.
+ * VC5 panics when less than 1 line in the FIFO.
+ */
+ dispctrl &= ~(SCALER_DISPCTRL_PANIC0_MASK |
+ SCALER_DISPCTRL_PANIC1_MASK |
+ SCALER_DISPCTRL_PANIC2_MASK);
+ dispctrl |= VC4_SET_FIELD(2, SCALER_DISPCTRL_PANIC0);
+ dispctrl |= VC4_SET_FIELD(2, SCALER_DISPCTRL_PANIC1);
+ dispctrl |= VC4_SET_FIELD(2, SCALER_DISPCTRL_PANIC2);
+
/* Set AXI panic mode.
* VC4 panics when < 2 lines in FIFO.
* VC5 panics when less than 1 line in the FIFO.
--
2.44.0

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@ -1,42 +0,0 @@
From 4b89e6e55f5c04f836b92ffbeef7c4c8a545adfd Mon Sep 17 00:00:00 2001
From: Matthias Reichl <hias@horus.com>
Date: Sat, 11 Mar 2023 22:41:17 +0100
Subject: [PATCH 0037/1002] drm/vc4: drop unnecessary and harmful HDMI RGB
format check
RGB is a mandatory format for all DVI and HDMI monitors so there's
no need to check for presence of the DRM_COLOR_FORMAT_RGB444 bit in
color_formats.
More importantly this checks breaks working around EDID issues with
eg video=HDMI-A-1:1024x768D or drm.edid_firmware=edid/1024x768.bin
as the RGB444 bit is only set when a valid EDID with digital bit set in
the input byte is present - which isn't the case when no EDID can be
read from the display device at all or with the in-built kernel EDIDs,
which mimic analog (VGA) displays without the digital bit set.
So drop the check, if we output video on the HDMI connector we can
assume that the display can accept 8bit RGB.
Signed-off-by: Matthias Reichl <hias@horus.com>
---
drivers/gpu/drm/vc4/vc4_hdmi.c | 3 ---
1 file changed, 3 deletions(-)
diff --git a/drivers/gpu/drm/vc4/vc4_hdmi.c b/drivers/gpu/drm/vc4/vc4_hdmi.c
index 330dae413734..97e40e3f7ce5 100644
--- a/drivers/gpu/drm/vc4/vc4_hdmi.c
+++ b/drivers/gpu/drm/vc4/vc4_hdmi.c
@@ -1952,9 +1952,6 @@ vc4_hdmi_sink_supports_format_bpc(const struct vc4_hdmi *vc4_hdmi,
case VC4_HDMI_OUTPUT_RGB:
drm_dbg(dev, "RGB Format, checking the constraints.\n");
- if (!(info->color_formats & DRM_COLOR_FORMAT_RGB444))
- return false;
-
if (bpc == 10 && !(info->edid_hdmi_rgb444_dc_modes & DRM_EDID_HDMI_DC_30)) {
drm_dbg(dev, "10 BPC but sink doesn't support Deep Color 30.\n");
return false;
--
2.44.0

View file

@ -1,42 +0,0 @@
From accb4b40a97c432b8a83f6fedf12b015aebb711d Mon Sep 17 00:00:00 2001
From: Dave Stevenson <dave.stevenson@raspberrypi.com>
Date: Mon, 24 Apr 2023 18:32:45 +0100
Subject: [PATCH 0038/1002] drm/vc4: Limit max_bpc to 8 on Pi0-3
Pi 0-3 have no deep colour support and only 24bpp output,
so max_bpc should remain as 8.
Signed-off-by: Dave Stevenson <dave.stevenson@raspberrypi.com>
---
drivers/gpu/drm/vc4/vc4_hdmi.c | 7 +++++--
1 file changed, 5 insertions(+), 2 deletions(-)
diff --git a/drivers/gpu/drm/vc4/vc4_hdmi.c b/drivers/gpu/drm/vc4/vc4_hdmi.c
index 97e40e3f7ce5..b2c1e637d27a 100644
--- a/drivers/gpu/drm/vc4/vc4_hdmi.c
+++ b/drivers/gpu/drm/vc4/vc4_hdmi.c
@@ -756,7 +756,6 @@ static int vc4_hdmi_connector_init(struct drm_device *dev,
drm_connector_attach_colorspace_property(connector);
drm_connector_attach_tv_margin_properties(connector);
- drm_connector_attach_max_bpc_property(connector, 8, 12);
connector->polled = (DRM_CONNECTOR_POLL_CONNECT |
DRM_CONNECTOR_POLL_DISCONNECT);
@@ -765,8 +764,12 @@ static int vc4_hdmi_connector_init(struct drm_device *dev,
connector->doublescan_allowed = 0;
connector->stereo_allowed = 1;
- if (vc4_hdmi->variant->supports_hdr)
+ if (vc4_hdmi->variant->supports_hdr) {
+ drm_connector_attach_max_bpc_property(connector, 8, 12);
drm_connector_attach_hdr_output_metadata_property(connector);
+ } else {
+ drm_connector_attach_max_bpc_property(connector, 8, 8);
+ }
vc4_hdmi_attach_broadcast_rgb_property(dev, vc4_hdmi);
--
2.44.0

View file

@ -1,29 +0,0 @@
From e51e9120a35d0b1600e4337e6ecbd020c074af80 Mon Sep 17 00:00:00 2001
From: Maxime Ripard <maxime@cerno.tech>
Date: Mon, 6 Jun 2022 11:02:16 +0200
Subject: [PATCH 0039/1002] arm64: setup: Fix build warning
Signed-off-by: Maxime Ripard <maxime@cerno.tech>
---
arch/arm64/kernel/setup.c | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/arch/arm64/kernel/setup.c b/arch/arm64/kernel/setup.c
index 417a8a86b2db..f1d0bde0a3d2 100644
--- a/arch/arm64/kernel/setup.c
+++ b/arch/arm64/kernel/setup.c
@@ -225,9 +225,9 @@ static void __init request_standard_resources(void)
size_t res_size;
kernel_code.start = __pa_symbol(_stext);
- kernel_code.end = __pa_symbol(__init_begin - 1);
+ kernel_code.end = __pa_symbol(__init_begin) - 1;
kernel_data.start = __pa_symbol(_sdata);
- kernel_data.end = __pa_symbol(_end - 1);
+ kernel_data.end = __pa_symbol(_end) - 1;
insert_resource(&iomem_resource, &kernel_code);
insert_resource(&iomem_resource, &kernel_data);
--
2.44.0

View file

@ -1,27 +0,0 @@
From 7cdd917ff28317a362935cbcd12e5ec98e22368c Mon Sep 17 00:00:00 2001
From: Dom Cobley <popcornmix@gmail.com>
Date: Tue, 12 Apr 2022 20:07:20 +0100
Subject: [PATCH 0042/1002] clk-raspberrypi: Add ISP to exported clocks
Signed-off-by: Dom Cobley <popcornmix@gmail.com>
---
drivers/clk/bcm/clk-raspberrypi.c | 3 +++
1 file changed, 3 insertions(+)
diff --git a/drivers/clk/bcm/clk-raspberrypi.c b/drivers/clk/bcm/clk-raspberrypi.c
index 829406dc44a2..c9da6be02467 100644
--- a/drivers/clk/bcm/clk-raspberrypi.c
+++ b/drivers/clk/bcm/clk-raspberrypi.c
@@ -118,6 +118,9 @@ raspberrypi_clk_variants[RPI_FIRMWARE_NUM_CLK_ID] = {
[RPI_FIRMWARE_HEVC_CLK_ID] = {
.export = true,
},
+ [RPI_FIRMWARE_ISP_CLK_ID] = {
+ .export = true,
+ },
[RPI_FIRMWARE_PIXEL_BVB_CLK_ID] = {
.export = true,
},
--
2.44.0

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@ -1,50 +0,0 @@
From 23472156777a9baa8724add831088560001b0d67 Mon Sep 17 00:00:00 2001
From: Martin Sperl <kernel@martin.sperl.org>
Date: Fri, 2 Sep 2016 16:45:27 +0100
Subject: [PATCH 0043/1002] Register the clocks early during the boot process,
so that special/critical clocks can get enabled early on in the boot process
avoiding the risk of disabling a clock, pll_divider or pll when a claiming
driver fails to install propperly - maybe it needs to defer.
Signed-off-by: Martin Sperl <kernel@martin.sperl.org>
---
drivers/clk/bcm/clk-bcm2835.c | 15 +++++++++++++--
1 file changed, 13 insertions(+), 2 deletions(-)
diff --git a/drivers/clk/bcm/clk-bcm2835.c b/drivers/clk/bcm/clk-bcm2835.c
index fb04734afc80..58f4594d5668 100644
--- a/drivers/clk/bcm/clk-bcm2835.c
+++ b/drivers/clk/bcm/clk-bcm2835.c
@@ -2319,8 +2319,15 @@ static int bcm2835_clk_probe(struct platform_device *pdev)
if (ret)
return ret;
- return of_clk_add_hw_provider(dev->of_node, of_clk_hw_onecell_get,
+ ret = of_clk_add_hw_provider(dev->of_node, of_clk_hw_onecell_get,
&cprman->onecell);
+ if (ret)
+ return ret;
+
+ /* note that we have registered all the clocks */
+ dev_dbg(dev, "registered %d clocks\n", asize);
+
+ return 0;
}
static const struct cprman_plat_data cprman_bcm2835_plat_data = {
@@ -2346,7 +2353,11 @@ static struct platform_driver bcm2835_clk_driver = {
.probe = bcm2835_clk_probe,
};
-builtin_platform_driver(bcm2835_clk_driver);
+static int __init __bcm2835_clk_driver_init(void)
+{
+ return platform_driver_register(&bcm2835_clk_driver);
+}
+core_initcall(__bcm2835_clk_driver_init);
MODULE_AUTHOR("Eric Anholt <eric@anholt.net>");
MODULE_DESCRIPTION("BCM2835 clock driver");
--
2.44.0

View file

@ -1,33 +0,0 @@
From 424a8ed7304489b35342229a6acddc9d1b9ed29f Mon Sep 17 00:00:00 2001
From: Phil Elwell <phil@raspberrypi.org>
Date: Mon, 13 Feb 2017 17:20:08 +0000
Subject: [PATCH 0044/1002] clk-bcm2835: Mark used PLLs and dividers CRITICAL
The VPU configures and relies on several PLLs and dividers. Mark all
enabled dividers and their PLLs as CRITICAL to prevent the kernel from
switching them off.
Signed-off-by: Phil Elwell <phil@raspberrypi.org>
---
drivers/clk/bcm/clk-bcm2835.c | 5 +++++
1 file changed, 5 insertions(+)
diff --git a/drivers/clk/bcm/clk-bcm2835.c b/drivers/clk/bcm/clk-bcm2835.c
index 58f4594d5668..d12d2324f7d4 100644
--- a/drivers/clk/bcm/clk-bcm2835.c
+++ b/drivers/clk/bcm/clk-bcm2835.c
@@ -1407,6 +1407,11 @@ bcm2835_register_pll_divider(struct bcm2835_cprman *cprman,
divider->div.hw.init = &init;
divider->div.table = NULL;
+ if (!(cprman_read(cprman, divider_data->cm_reg) & divider_data->hold_mask)) {
+ init.flags |= CLK_IS_CRITICAL;
+ divider->div.flags |= CLK_IS_CRITICAL;
+ }
+
divider->cprman = cprman;
divider->data = divider_data;
--
2.44.0

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@ -1,123 +0,0 @@
From a3e8abeba9c63145d98dfc1cf859a2a2796ea7c0 Mon Sep 17 00:00:00 2001
From: Phil Elwell <phil@raspberrypi.org>
Date: Mon, 13 Feb 2017 17:20:08 +0000
Subject: [PATCH 0045/1002] clk-bcm2835: Add claim-clocks property
The claim-clocks property can be used to prevent PLLs and dividers
from being marked as critical. It contains a vector of clock IDs,
as defined by dt-bindings/clock/bcm2835.h.
Use this mechanism to claim PLLD_DSI0, PLLD_DSI1, PLLH_AUX and
PLLH_PIX for the vc4_kms_v3d driver.
Signed-off-by: Phil Elwell <phil@raspberrypi.org>
---
drivers/clk/bcm/clk-bcm2835.c | 43 +++++++++++++++++++++++++++++++++--
1 file changed, 41 insertions(+), 2 deletions(-)
diff --git a/drivers/clk/bcm/clk-bcm2835.c b/drivers/clk/bcm/clk-bcm2835.c
index d12d2324f7d4..b8f0579fcfa9 100644
--- a/drivers/clk/bcm/clk-bcm2835.c
+++ b/drivers/clk/bcm/clk-bcm2835.c
@@ -1335,6 +1335,8 @@ static const struct clk_ops bcm2835_vpu_clock_clk_ops = {
.debug_init = bcm2835_clock_debug_init,
};
+static bool bcm2835_clk_is_claimed(const char *name);
+
static struct clk_hw *bcm2835_register_pll(struct bcm2835_cprman *cprman,
const void *data)
{
@@ -1352,6 +1354,9 @@ static struct clk_hw *bcm2835_register_pll(struct bcm2835_cprman *cprman,
init.ops = &bcm2835_pll_clk_ops;
init.flags = pll_data->flags | CLK_IGNORE_UNUSED;
+ if (!bcm2835_clk_is_claimed(pll_data->name))
+ init.flags |= CLK_IS_CRITICAL;
+
pll = kzalloc(sizeof(*pll), GFP_KERNEL);
if (!pll)
return NULL;
@@ -1408,8 +1413,10 @@ bcm2835_register_pll_divider(struct bcm2835_cprman *cprman,
divider->div.table = NULL;
if (!(cprman_read(cprman, divider_data->cm_reg) & divider_data->hold_mask)) {
- init.flags |= CLK_IS_CRITICAL;
- divider->div.flags |= CLK_IS_CRITICAL;
+ if (!bcm2835_clk_is_claimed(divider_data->source_pll))
+ init.flags |= CLK_IS_CRITICAL;
+ if (!bcm2835_clk_is_claimed(divider_data->name))
+ divider->div.flags |= CLK_IS_CRITICAL;
}
divider->cprman = cprman;
@@ -1465,6 +1472,15 @@ static struct clk_hw *bcm2835_register_clock(struct bcm2835_cprman *cprman,
init.name = clock_data->name;
init.flags = clock_data->flags | CLK_IGNORE_UNUSED;
+ /*
+ * Some GPIO clocks for ethernet/wifi PLLs are marked as
+ * critical (since some platforms use them), but if the
+ * firmware didn't have them turned on then they clearly
+ * aren't actually critical.
+ */
+ if ((cprman_read(cprman, clock_data->ctl_reg) & CM_ENABLE) == 0)
+ init.flags &= ~CLK_IS_CRITICAL;
+
/*
* Pass the CLK_SET_RATE_PARENT flag if we are allowed to propagate
* rate changes on at least of the parents.
@@ -2245,6 +2261,8 @@ static const struct bcm2835_clk_desc clk_desc_array[] = {
.ctl_reg = CM_PERIICTL),
};
+static bool bcm2835_clk_claimed[ARRAY_SIZE(clk_desc_array)];
+
/*
* Permanently take a reference on the parent of the SDRAM clock.
*
@@ -2264,6 +2282,19 @@ static int bcm2835_mark_sdc_parent_critical(struct clk *sdc)
return clk_prepare_enable(parent);
}
+static bool bcm2835_clk_is_claimed(const char *name)
+{
+ int i;
+
+ for (i = 0; i < ARRAY_SIZE(clk_desc_array); i++) {
+ const char *clk_name = *(const char **)(clk_desc_array[i].data);
+ if (!strcmp(name, clk_name))
+ return bcm2835_clk_claimed[i];
+ }
+
+ return false;
+}
+
static int bcm2835_clk_probe(struct platform_device *pdev)
{
struct device *dev = &pdev->dev;
@@ -2273,6 +2304,7 @@ static int bcm2835_clk_probe(struct platform_device *pdev)
const size_t asize = ARRAY_SIZE(clk_desc_array);
const struct cprman_plat_data *pdata;
size_t i;
+ u32 clk_id;
int ret;
pdata = of_device_get_match_data(&pdev->dev);
@@ -2291,6 +2323,13 @@ static int bcm2835_clk_probe(struct platform_device *pdev)
if (IS_ERR(cprman->regs))
return PTR_ERR(cprman->regs);
+ memset(bcm2835_clk_claimed, 0, sizeof(bcm2835_clk_claimed));
+ for (i = 0;
+ !of_property_read_u32_index(pdev->dev.of_node, "claim-clocks",
+ i, &clk_id);
+ i++)
+ bcm2835_clk_claimed[clk_id]= true;
+
memcpy(cprman->real_parent_names, cprman_parent_names,
sizeof(cprman_parent_names));
of_clk_parent_fill(dev->of_node, cprman->real_parent_names,
--
2.44.0

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@ -1,120 +0,0 @@
From 7029b92f5fdba739ad2698dc9546e7be03002c51 Mon Sep 17 00:00:00 2001
From: Phil Elwell <phil@raspberrypi.org>
Date: Mon, 6 Mar 2017 09:06:18 +0000
Subject: [PATCH 0046/1002] clk-bcm2835: Read max core clock from firmware
The VPU is responsible for managing the core clock, usually under
direction from the bcm2835-cpufreq driver but not via the clk-bcm2835
driver. Since the core frequency can change without warning, it is
safer to report the maximum clock rate to users of the core clock -
I2C, SPI and the mini UART - to err on the safe side when calculating
clock divisors.
If the DT node for the clock driver includes a reference to the
firmware node, use the firmware API to query the maximum core clock
instead of reading the divider registers.
Prior to this patch, a "100KHz" I2C bus was sometimes clocked at about
160KHz. In particular, switching to the 4.9 kernel was likely to break
SenseHAT usage on a Pi3.
Signed-off-by: Phil Elwell <phil@raspberrypi.org>
---
drivers/clk/bcm/clk-bcm2835.c | 39 ++++++++++++++++++++++++++++++++++-
1 file changed, 38 insertions(+), 1 deletion(-)
diff --git a/drivers/clk/bcm/clk-bcm2835.c b/drivers/clk/bcm/clk-bcm2835.c
index b8f0579fcfa9..a4be87c862b9 100644
--- a/drivers/clk/bcm/clk-bcm2835.c
+++ b/drivers/clk/bcm/clk-bcm2835.c
@@ -36,6 +36,7 @@
#include <linux/platform_device.h>
#include <linux/slab.h>
#include <dt-bindings/clock/bcm2835.h>
+#include <soc/bcm2835/raspberrypi-firmware.h>
#define CM_PASSWORD 0x5a000000
@@ -296,6 +297,8 @@
#define SOC_BCM2711 BIT(1)
#define SOC_ALL (SOC_BCM2835 | SOC_BCM2711)
+#define VCMSG_ID_CORE_CLOCK 4
+
/*
* Names of clocks used within the driver that need to be replaced
* with an external parent's name. This array is in the order that
@@ -314,6 +317,7 @@ static const char *const cprman_parent_names[] = {
struct bcm2835_cprman {
struct device *dev;
void __iomem *regs;
+ struct rpi_firmware *fw;
spinlock_t regs_lock; /* spinlock for all clocks */
unsigned int soc;
@@ -1039,6 +1043,30 @@ static unsigned long bcm2835_clock_get_rate(struct clk_hw *hw,
return rate;
}
+static unsigned long bcm2835_clock_get_rate_vpu(struct clk_hw *hw,
+ unsigned long parent_rate)
+{
+ struct bcm2835_clock *clock = bcm2835_clock_from_hw(hw);
+ struct bcm2835_cprman *cprman = clock->cprman;
+
+ if (cprman->fw) {
+ struct {
+ u32 id;
+ u32 val;
+ } packet;
+
+ packet.id = VCMSG_ID_CORE_CLOCK;
+ packet.val = 0;
+
+ if (!rpi_firmware_property(cprman->fw,
+ RPI_FIRMWARE_GET_MAX_CLOCK_RATE,
+ &packet, sizeof(packet)))
+ return packet.val;
+ }
+
+ return bcm2835_clock_get_rate(hw, parent_rate);
+}
+
static void bcm2835_clock_wait_busy(struct bcm2835_clock *clock)
{
struct bcm2835_cprman *cprman = clock->cprman;
@@ -1327,7 +1355,7 @@ static int bcm2835_vpu_clock_is_on(struct clk_hw *hw)
*/
static const struct clk_ops bcm2835_vpu_clock_clk_ops = {
.is_prepared = bcm2835_vpu_clock_is_on,
- .recalc_rate = bcm2835_clock_get_rate,
+ .recalc_rate = bcm2835_clock_get_rate_vpu,
.set_rate = bcm2835_clock_set_rate,
.determine_rate = bcm2835_clock_determine_rate,
.set_parent = bcm2835_clock_set_parent,
@@ -2303,6 +2331,7 @@ static int bcm2835_clk_probe(struct platform_device *pdev)
const struct bcm2835_clk_desc *desc;
const size_t asize = ARRAY_SIZE(clk_desc_array);
const struct cprman_plat_data *pdata;
+ struct device_node *fw_node;
size_t i;
u32 clk_id;
int ret;
@@ -2323,6 +2352,14 @@ static int bcm2835_clk_probe(struct platform_device *pdev)
if (IS_ERR(cprman->regs))
return PTR_ERR(cprman->regs);
+ fw_node = of_parse_phandle(dev->of_node, "firmware", 0);
+ if (fw_node) {
+ struct rpi_firmware *fw = rpi_firmware_get(NULL);
+ if (!fw)
+ return -EPROBE_DEFER;
+ cprman->fw = fw;
+ }
+
memset(bcm2835_clk_claimed, 0, sizeof(bcm2835_clk_claimed));
for (i = 0;
!of_property_read_u32_index(pdev->dev.of_node, "claim-clocks",
--
2.44.0

View file

@ -1,29 +0,0 @@
From f6ba78e08ca1e76ad4a8ac1007dd511d9ae31857 Mon Sep 17 00:00:00 2001
From: Dave Stevenson <dave.stevenson@raspberrypi.org>
Date: Thu, 24 Jan 2019 15:09:28 +0000
Subject: [PATCH 0047/1002] clk: clk-bcm2835: Use %zd when printing size_t
The debug text for how many clocks have been registered
uses "%d" with a size_t. Correct it to "%zd".
Signed-off-by: Dave Stevenson <dave.stevenson@raspberrypi.org>
---
drivers/clk/bcm/clk-bcm2835.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/clk/bcm/clk-bcm2835.c b/drivers/clk/bcm/clk-bcm2835.c
index a4be87c862b9..47402623d3b1 100644
--- a/drivers/clk/bcm/clk-bcm2835.c
+++ b/drivers/clk/bcm/clk-bcm2835.c
@@ -2406,7 +2406,7 @@ static int bcm2835_clk_probe(struct platform_device *pdev)
return ret;
/* note that we have registered all the clocks */
- dev_dbg(dev, "registered %d clocks\n", asize);
+ dev_dbg(dev, "registered %zd clocks\n", asize);
return 0;
}
--
2.44.0

View file

@ -1,43 +0,0 @@
From 1f4814d8f97794fce825b1dfb98c7e3d2e6a58b1 Mon Sep 17 00:00:00 2001
From: Phil Elwell <phil@raspberrypi.org>
Date: Wed, 23 Jan 2019 16:11:50 +0000
Subject: [PATCH 0048/1002] clk-bcm2835: Don't wait for pllh lock
Signed-off-by: Phil Elwell <phil@raspberrypi.org>
---
drivers/clk/bcm/clk-bcm2835.c | 18 ++++++++++--------
1 file changed, 10 insertions(+), 8 deletions(-)
diff --git a/drivers/clk/bcm/clk-bcm2835.c b/drivers/clk/bcm/clk-bcm2835.c
index 47402623d3b1..ffcdcd4e04af 100644
--- a/drivers/clk/bcm/clk-bcm2835.c
+++ b/drivers/clk/bcm/clk-bcm2835.c
@@ -647,15 +647,17 @@ static int bcm2835_pll_on(struct clk_hw *hw)
spin_unlock(&cprman->regs_lock);
/* Wait for the PLL to lock. */
- timeout = ktime_add_ns(ktime_get(), LOCK_TIMEOUT_NS);
- while (!(cprman_read(cprman, CM_LOCK) & data->lock_mask)) {
- if (ktime_after(ktime_get(), timeout)) {
- dev_err(cprman->dev, "%s: couldn't lock PLL\n",
- clk_hw_get_name(hw));
- return -ETIMEDOUT;
+ if (strcmp(data->name, "pllh")) {
+ timeout = ktime_add_ns(ktime_get(), LOCK_TIMEOUT_NS);
+ while (!(cprman_read(cprman, CM_LOCK) & data->lock_mask)) {
+ if (ktime_after(ktime_get(), timeout)) {
+ dev_err(cprman->dev, "%s: couldn't lock PLL\n",
+ clk_hw_get_name(hw));
+ return -ETIMEDOUT;
+ }
+
+ cpu_relax();
}
-
- cpu_relax();
}
cprman_write(cprman, data->a2w_ctrl_reg,
--
2.44.0

View file

@ -1,58 +0,0 @@
From 7b05ff3ae2ddc2ef0e28d721ed3c521ab7b5140a Mon Sep 17 00:00:00 2001
From: Eric Anholt <eric@anholt.net>
Date: Thu, 2 May 2019 15:11:05 -0700
Subject: [PATCH 0049/1002] clk: bcm2835: Add support for setting leaf clock
rates while running.
As long as you wait for !BUSY, you can do glitch-free updates of clock
rate while the clock is running.
Signed-off-by: Eric Anholt <eric@anholt.net>
---
drivers/clk/bcm/clk-bcm2835.c | 22 +++++++++++++---------
1 file changed, 13 insertions(+), 9 deletions(-)
diff --git a/drivers/clk/bcm/clk-bcm2835.c b/drivers/clk/bcm/clk-bcm2835.c
index ffcdcd4e04af..b3fc34853138 100644
--- a/drivers/clk/bcm/clk-bcm2835.c
+++ b/drivers/clk/bcm/clk-bcm2835.c
@@ -1138,15 +1138,19 @@ static int bcm2835_clock_set_rate(struct clk_hw *hw,
spin_lock(&cprman->regs_lock);
- /*
- * Setting up frac support
- *
- * In principle it is recommended to stop/start the clock first,
- * but as we set CLK_SET_RATE_GATE during registration of the
- * clock this requirement should be take care of by the
- * clk-framework.
+ ctl = cprman_read(cprman, data->ctl_reg);
+
+ /* If the clock is running, we have to pause clock generation while
+ * updating the control and div regs. This is glitchless (no clock
+ * signals generated faster than the rate) but each reg access is two
+ * OSC cycles so the clock will slow down for a moment.
*/
- ctl = cprman_read(cprman, data->ctl_reg) & ~CM_FRAC;
+ if (ctl & CM_ENABLE) {
+ cprman_write(cprman, data->ctl_reg, ctl & ~CM_ENABLE);
+ bcm2835_clock_wait_busy(clock);
+ }
+
+ ctl &= ~CM_FRAC;
ctl |= (div & CM_DIV_FRAC_MASK) ? CM_FRAC : 0;
cprman_write(cprman, data->ctl_reg, ctl);
@@ -1522,7 +1526,7 @@ static struct clk_hw *bcm2835_register_clock(struct bcm2835_cprman *cprman,
init.ops = &bcm2835_vpu_clock_clk_ops;
} else {
init.ops = &bcm2835_clock_clk_ops;
- init.flags |= CLK_SET_RATE_GATE | CLK_SET_PARENT_GATE;
+ init.flags |= CLK_SET_PARENT_GATE;
/* If the clock wasn't actually enabled at boot, it's not
* critical.
--
2.44.0

View file

@ -1,76 +0,0 @@
From 13a0d9f6df4ed584a6b927b92373713392d09b81 Mon Sep 17 00:00:00 2001
From: Eric Anholt <eric@anholt.net>
Date: Thu, 2 May 2019 15:24:04 -0700
Subject: [PATCH 0050/1002] clk: bcm2835: Allow reparenting leaf clocks while
they're running.
This falls under the same "we can reprogram glitch-free as long as we
pause generation" rule as updating the div/frac fields. This can be
used for runtime reclocking of V3D to manage power leakage.
Signed-off-by: Eric Anholt <eric@anholt.net>
---
drivers/clk/bcm/clk-bcm2835.c | 19 ++++++++++++++++---
1 file changed, 16 insertions(+), 3 deletions(-)
diff --git a/drivers/clk/bcm/clk-bcm2835.c b/drivers/clk/bcm/clk-bcm2835.c
index b3fc34853138..a8bccd57bfb2 100644
--- a/drivers/clk/bcm/clk-bcm2835.c
+++ b/drivers/clk/bcm/clk-bcm2835.c
@@ -1127,8 +1127,10 @@ static int bcm2835_clock_on(struct clk_hw *hw)
return 0;
}
-static int bcm2835_clock_set_rate(struct clk_hw *hw,
- unsigned long rate, unsigned long parent_rate)
+static int bcm2835_clock_set_rate_and_parent(struct clk_hw *hw,
+ unsigned long rate,
+ unsigned long parent_rate,
+ u8 parent)
{
struct bcm2835_clock *clock = bcm2835_clock_from_hw(hw);
struct bcm2835_cprman *cprman = clock->cprman;
@@ -1150,6 +1152,11 @@ static int bcm2835_clock_set_rate(struct clk_hw *hw,
bcm2835_clock_wait_busy(clock);
}
+ if (parent != 0xff) {
+ ctl &= ~(CM_SRC_MASK << CM_SRC_SHIFT);
+ ctl |= parent << CM_SRC_SHIFT;
+ }
+
ctl &= ~CM_FRAC;
ctl |= (div & CM_DIV_FRAC_MASK) ? CM_FRAC : 0;
cprman_write(cprman, data->ctl_reg, ctl);
@@ -1161,6 +1168,12 @@ static int bcm2835_clock_set_rate(struct clk_hw *hw,
return 0;
}
+static int bcm2835_clock_set_rate(struct clk_hw *hw,
+ unsigned long rate, unsigned long parent_rate)
+{
+ return bcm2835_clock_set_rate_and_parent(hw, rate, parent_rate, 0xff);
+}
+
static bool
bcm2835_clk_is_pllc(struct clk_hw *hw)
{
@@ -1344,6 +1357,7 @@ static const struct clk_ops bcm2835_clock_clk_ops = {
.unprepare = bcm2835_clock_off,
.recalc_rate = bcm2835_clock_get_rate,
.set_rate = bcm2835_clock_set_rate,
+ .set_rate_and_parent = bcm2835_clock_set_rate_and_parent,
.determine_rate = bcm2835_clock_determine_rate,
.set_parent = bcm2835_clock_set_parent,
.get_parent = bcm2835_clock_get_parent,
@@ -1526,7 +1540,6 @@ static struct clk_hw *bcm2835_register_clock(struct bcm2835_cprman *cprman,
init.ops = &bcm2835_vpu_clock_clk_ops;
} else {
init.ops = &bcm2835_clock_clk_ops;
- init.flags |= CLK_SET_PARENT_GATE;
/* If the clock wasn't actually enabled at boot, it's not
* critical.
--
2.44.0

View file

@ -1,34 +0,0 @@
From a1c557d74b66d5f37b68b07ee966d627b9dabe94 Mon Sep 17 00:00:00 2001
From: popcornmix <popcornmix@gmail.com>
Date: Tue, 6 Aug 2019 15:23:14 +0100
Subject: [PATCH 0051/1002] clk-bcm2835: Avoid null pointer exception
clk_desc_array[BCM2835_PLLB] doesn't exist so we dereference null when iterating
Signed-off-by: popcornmix <popcornmix@gmail.com>
---
drivers/clk/bcm/clk-bcm2835.c | 8 +++++---
1 file changed, 5 insertions(+), 3 deletions(-)
diff --git a/drivers/clk/bcm/clk-bcm2835.c b/drivers/clk/bcm/clk-bcm2835.c
index a8bccd57bfb2..1845a732000e 100644
--- a/drivers/clk/bcm/clk-bcm2835.c
+++ b/drivers/clk/bcm/clk-bcm2835.c
@@ -2334,9 +2334,11 @@ static bool bcm2835_clk_is_claimed(const char *name)
int i;
for (i = 0; i < ARRAY_SIZE(clk_desc_array); i++) {
- const char *clk_name = *(const char **)(clk_desc_array[i].data);
- if (!strcmp(name, clk_name))
- return bcm2835_clk_claimed[i];
+ if (clk_desc_array[i].data) {
+ const char *clk_name = *(const char **)(clk_desc_array[i].data);
+ if (!strcmp(name, clk_name))
+ return bcm2835_clk_claimed[i];
+ }
}
return false;
--
2.44.0

View file

@ -1,63 +0,0 @@
From 4178828dd4a72d6cc4ec0572fef4efa23e82869e Mon Sep 17 00:00:00 2001
From: popcornmix <popcornmix@gmail.com>
Date: Tue, 3 Sep 2019 20:28:00 +0100
Subject: [PATCH 0052/1002] clk-bcm2835: Disable v3d clock
This is controlled by firmware, see clk-raspberrypi.c
Signed-off-by: popcornmix <popcornmix@gmail.com>
---
drivers/clk/bcm/clk-bcm2835.c | 30 ++++++++++++------------------
1 file changed, 12 insertions(+), 18 deletions(-)
diff --git a/drivers/clk/bcm/clk-bcm2835.c b/drivers/clk/bcm/clk-bcm2835.c
index 1845a732000e..e1f1c3bfbcaa 100644
--- a/drivers/clk/bcm/clk-bcm2835.c
+++ b/drivers/clk/bcm/clk-bcm2835.c
@@ -1764,16 +1764,12 @@ static const struct bcm2835_clk_desc clk_desc_array[] = {
.hold_mask = CM_PLLA_HOLDCORE,
.fixed_divider = 1,
.flags = CLK_SET_RATE_PARENT),
- [BCM2835_PLLA_PER] = REGISTER_PLL_DIV(
- SOC_ALL,
- .name = "plla_per",
- .source_pll = "plla",
- .cm_reg = CM_PLLA,
- .a2w_reg = A2W_PLLA_PER,
- .load_mask = CM_PLLA_LOADPER,
- .hold_mask = CM_PLLA_HOLDPER,
- .fixed_divider = 1,
- .flags = CLK_SET_RATE_PARENT),
+
+ /*
+ * PLLA_PER is used for gpu clocks. Controlled by firmware, see
+ * clk-raspberrypi.c.
+ */
+
[BCM2835_PLLA_DSI0] = REGISTER_PLL_DIV(
SOC_ALL,
.name = "plla_dsi0",
@@ -2074,14 +2070,12 @@ static const struct bcm2835_clk_desc clk_desc_array[] = {
.int_bits = 6,
.frac_bits = 0,
.tcnt_mux = 3),
- [BCM2835_CLOCK_V3D] = REGISTER_VPU_CLK(
- SOC_ALL,
- .name = "v3d",
- .ctl_reg = CM_V3DCTL,
- .div_reg = CM_V3DDIV,
- .int_bits = 4,
- .frac_bits = 8,
- .tcnt_mux = 4),
+
+ /*
+ * CLOCK_V3D is used for v3d clock. Controlled by firmware, see
+ * clk-raspberrypi.c.
+ */
+
/*
* VPU clock. This doesn't have an enable bit, since it drives
* the bus for everything else, and is special so it doesn't need
--
2.44.0

View file

@ -1,29 +0,0 @@
From f3af6755e55e6681cf25052bdc9cb81cfd412b18 Mon Sep 17 00:00:00 2001
From: Phil Elwell <phil@raspberrypi.com>
Date: Thu, 8 Jul 2021 09:37:10 +0100
Subject: [PATCH 0053/1002] clk: bcm2835: Pass DT node to rpi_firmware_get
The fw_node pointer has already been retrieved, and using it allows
us to remove a downstream patch to the firmware driver.
Signed-off-by: Phil Elwell <phil@raspberrypi.com>
---
drivers/clk/bcm/clk-bcm2835.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/clk/bcm/clk-bcm2835.c b/drivers/clk/bcm/clk-bcm2835.c
index e1f1c3bfbcaa..17b475fc5c58 100644
--- a/drivers/clk/bcm/clk-bcm2835.c
+++ b/drivers/clk/bcm/clk-bcm2835.c
@@ -2369,7 +2369,7 @@ static int bcm2835_clk_probe(struct platform_device *pdev)
fw_node = of_parse_phandle(dev->of_node, "firmware", 0);
if (fw_node) {
- struct rpi_firmware *fw = rpi_firmware_get(NULL);
+ struct rpi_firmware *fw = rpi_firmware_get(fw_node);
if (!fw)
return -EPROBE_DEFER;
cprman->fw = fw;
--
2.44.0

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@ -1,39 +0,0 @@
From 4424723464afdfcab18f76ea9010e908bf4dbda8 Mon Sep 17 00:00:00 2001
From: Dom Cobley <popcornmix@gmail.com>
Date: Tue, 19 Oct 2021 14:14:55 +0100
Subject: [PATCH 0054/1002] clk-bcm2835: Remove VEC clock support
Signed-off-by: Dom Cobley <popcornmix@gmail.com>
---
drivers/clk/bcm/clk-bcm2835.c | 15 ---------------
1 file changed, 15 deletions(-)
diff --git a/drivers/clk/bcm/clk-bcm2835.c b/drivers/clk/bcm/clk-bcm2835.c
index 17b475fc5c58..b39d9f88320e 100644
--- a/drivers/clk/bcm/clk-bcm2835.c
+++ b/drivers/clk/bcm/clk-bcm2835.c
@@ -2238,21 +2238,6 @@ static const struct bcm2835_clk_desc clk_desc_array[] = {
.tcnt_mux = 28,
.round_up = true),
- /* TV encoder clock. Only operating frequency is 108Mhz. */
- [BCM2835_CLOCK_VEC] = REGISTER_PER_CLK(
- SOC_ALL,
- .name = "vec",
- .ctl_reg = CM_VECCTL,
- .div_reg = CM_VECDIV,
- .int_bits = 4,
- .frac_bits = 0,
- /*
- * Allow rate change propagation only on PLLH_AUX which is
- * assigned index 7 in the parent array.
- */
- .set_rate_parent = BIT(7),
- .tcnt_mux = 29),
-
/* dsi clocks */
[BCM2835_CLOCK_DSI0E] = REGISTER_PER_CLK(
SOC_ALL,
--
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@ -1,110 +0,0 @@
From bd7e4336b9f12cf217deeb5778bcd4cf75a5e75e Mon Sep 17 00:00:00 2001
From: Dan Pasanen <dan.pasanen@gmail.com>
Date: Thu, 21 Sep 2017 09:55:42 -0500
Subject: [PATCH 0055/1002] arm: partially revert
702b94bff3c50542a6e4ab9a4f4cef093262fe65
* Re-expose some dmi APIs for use in VCSM
---
arch/arm/include/asm/cacheflush.h | 21 +++++++++++++++++++++
arch/arm/include/asm/glue-cache.h | 2 ++
arch/arm/mm/proc-macros.S | 2 ++
arch/arm/mm/proc-syms.c | 3 +++
4 files changed, 28 insertions(+)
diff --git a/arch/arm/include/asm/cacheflush.h b/arch/arm/include/asm/cacheflush.h
index 1075534b0a2e..34c020563133 100644
--- a/arch/arm/include/asm/cacheflush.h
+++ b/arch/arm/include/asm/cacheflush.h
@@ -91,6 +91,21 @@
* DMA Cache Coherency
* ===================
*
+ * dma_inv_range(start, end)
+ *
+ * Invalidate (discard) the specified virtual address range.
+ * May not write back any entries. If 'start' or 'end'
+ * are not cache line aligned, those lines must be written
+ * back.
+ * - start - virtual start address
+ * - end - virtual end address
+ *
+ * dma_clean_range(start, end)
+ *
+ * Clean (write back) the specified virtual address range.
+ * - start - virtual start address
+ * - end - virtual end address
+ *
* dma_flush_range(start, end)
*
* Clean and invalidate the specified virtual address range.
@@ -112,6 +127,8 @@ struct cpu_cache_fns {
void (*dma_map_area)(const void *, size_t, int);
void (*dma_unmap_area)(const void *, size_t, int);
+ void (*dma_inv_range)(const void *, const void *);
+ void (*dma_clean_range)(const void *, const void *);
void (*dma_flush_range)(const void *, const void *);
} __no_randomize_layout;
@@ -137,6 +154,8 @@ extern struct cpu_cache_fns cpu_cache;
* is visible to DMA, or data written by DMA to system memory is
* visible to the CPU.
*/
+#define dmac_inv_range cpu_cache.dma_inv_range
+#define dmac_clean_range cpu_cache.dma_clean_range
#define dmac_flush_range cpu_cache.dma_flush_range
#else
@@ -156,6 +175,8 @@ extern void __cpuc_flush_dcache_area(void *, size_t);
* is visible to DMA, or data written by DMA to system memory is
* visible to the CPU.
*/
+extern void dmac_inv_range(const void *, const void *);
+extern void dmac_clean_range(const void *, const void *);
extern void dmac_flush_range(const void *, const void *);
#endif
diff --git a/arch/arm/include/asm/glue-cache.h b/arch/arm/include/asm/glue-cache.h
index 724f8dac1e5b..aa74173092dd 100644
--- a/arch/arm/include/asm/glue-cache.h
+++ b/arch/arm/include/asm/glue-cache.h
@@ -155,6 +155,8 @@ static inline void nop_dma_unmap_area(const void *s, size_t l, int f) { }
#define __cpuc_coherent_user_range __glue(_CACHE,_coherent_user_range)
#define __cpuc_flush_dcache_area __glue(_CACHE,_flush_kern_dcache_area)
+#define dmac_inv_range __glue(_CACHE,_dma_inv_range)
+#define dmac_clean_range __glue(_CACHE,_dma_clean_range)
#define dmac_flush_range __glue(_CACHE,_dma_flush_range)
#endif
diff --git a/arch/arm/mm/proc-macros.S b/arch/arm/mm/proc-macros.S
index e43f6d716b4b..05d9b19b6b2e 100644
--- a/arch/arm/mm/proc-macros.S
+++ b/arch/arm/mm/proc-macros.S
@@ -334,6 +334,8 @@ ENTRY(\name\()_cache_fns)
.long \name\()_flush_kern_dcache_area
.long \name\()_dma_map_area
.long \name\()_dma_unmap_area
+ .long \name\()_dma_inv_range
+ .long \name\()_dma_clean_range
.long \name\()_dma_flush_range
.size \name\()_cache_fns, . - \name\()_cache_fns
.endm
diff --git a/arch/arm/mm/proc-syms.c b/arch/arm/mm/proc-syms.c
index e21249548e9f..33e4a9b8f1ba 100644
--- a/arch/arm/mm/proc-syms.c
+++ b/arch/arm/mm/proc-syms.c
@@ -27,6 +27,9 @@ EXPORT_SYMBOL(__cpuc_flush_user_all);
EXPORT_SYMBOL(__cpuc_flush_user_range);
EXPORT_SYMBOL(__cpuc_coherent_kern_range);
EXPORT_SYMBOL(__cpuc_flush_dcache_area);
+EXPORT_SYMBOL(dmac_inv_range);
+EXPORT_SYMBOL(dmac_clean_range);
+EXPORT_SYMBOL(dmac_flush_range);
#else
EXPORT_SYMBOL(cpu_cache);
#endif
--
2.44.0

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@ -1,60 +0,0 @@
From edd661e1298992af02c87d389c1fa2cec366e29a Mon Sep 17 00:00:00 2001
From: popcornmix <popcornmix@gmail.com>
Date: Fri, 25 Aug 2017 19:18:13 +0100
Subject: [PATCH 0056/1002] cache: export clean and invalidate
hack: cache: Fix linker error
---
arch/arm/mm/cache-v6.S | 4 ++--
arch/arm/mm/cache-v7.S | 6 ++++--
2 files changed, 6 insertions(+), 4 deletions(-)
diff --git a/arch/arm/mm/cache-v6.S b/arch/arm/mm/cache-v6.S
index 250c83bf7158..abae7ff5defc 100644
--- a/arch/arm/mm/cache-v6.S
+++ b/arch/arm/mm/cache-v6.S
@@ -200,7 +200,7 @@ ENTRY(v6_flush_kern_dcache_area)
* - start - virtual start address of region
* - end - virtual end address of region
*/
-v6_dma_inv_range:
+ENTRY(v6_dma_inv_range)
#ifdef CONFIG_DMA_CACHE_RWFO
ldrb r2, [r0] @ read for ownership
strb r2, [r0] @ write for ownership
@@ -245,7 +245,7 @@ v6_dma_inv_range:
* - start - virtual start address of region
* - end - virtual end address of region
*/
-v6_dma_clean_range:
+ENTRY(v6_dma_clean_range)
bic r0, r0, #D_CACHE_LINE_SIZE - 1
1:
#ifdef CONFIG_DMA_CACHE_RWFO
diff --git a/arch/arm/mm/cache-v7.S b/arch/arm/mm/cache-v7.S
index 127afe2096ba..6a16d88e2d36 100644
--- a/arch/arm/mm/cache-v7.S
+++ b/arch/arm/mm/cache-v7.S
@@ -361,7 +361,8 @@ ENDPROC(v7_flush_kern_dcache_area)
* - start - virtual start address of region
* - end - virtual end address of region
*/
-v7_dma_inv_range:
+ENTRY(b15_dma_inv_range)
+ENTRY(v7_dma_inv_range)
dcache_line_size r2, r3
sub r3, r2, #1
tst r0, r3
@@ -391,7 +392,8 @@ ENDPROC(v7_dma_inv_range)
* - start - virtual start address of region
* - end - virtual end address of region
*/
-v7_dma_clean_range:
+ENTRY(b15_dma_clean_range)
+ENTRY(v7_dma_clean_range)
dcache_line_size r2, r3
sub r3, r2, #1
bic r0, r0, r3
--
2.44.0

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@ -1,37 +0,0 @@
From 32e719132bbbbe75a380a23423d74fef8c7b83b1 Mon Sep 17 00:00:00 2001
From: Phil Elwell <phil@raspberrypi.com>
Date: Mon, 20 Apr 2020 13:41:10 +0100
Subject: [PATCH 0057/1002] Revert "spi: spidev: Fix CS polarity if GPIO
descriptors are used"
This reverts commit 83b2a8fe43bda0c11981ad6afa5dd0104d78be28.
---
drivers/spi/spidev.c | 5 -----
1 file changed, 5 deletions(-)
diff --git a/drivers/spi/spidev.c b/drivers/spi/spidev.c
index d13dc15cc191..2d5e32c5aa49 100644
--- a/drivers/spi/spidev.c
+++ b/drivers/spi/spidev.c
@@ -424,7 +424,6 @@ spidev_ioctl(struct file *filp, unsigned int cmd, unsigned long arg)
else
retval = get_user(tmp, (u32 __user *)arg);
if (retval == 0) {
- struct spi_controller *ctlr = spi->controller;
u32 save = spi->mode;
if (tmp & ~SPI_MODE_MASK) {
@@ -432,10 +431,6 @@ spidev_ioctl(struct file *filp, unsigned int cmd, unsigned long arg)
break;
}
- if (ctlr->use_gpio_descriptors && ctlr->cs_gpiods &&
- ctlr->cs_gpiods[spi_get_chipselect(spi, 0)])
- tmp |= SPI_CS_HIGH;
-
tmp |= spi->mode & ~SPI_MODE_MASK;
spi->mode = tmp & SPI_MODE_USER_MASK;
retval = spi_setup(spi);
--
2.44.0

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@ -1,50 +0,0 @@
From eaeca896d077e9e42866f7f7caae7b62211a0d0d Mon Sep 17 00:00:00 2001
From: Phil Elwell <phil@raspberrypi.com>
Date: Mon, 1 Mar 2021 09:12:44 +0000
Subject: [PATCH 0058/1002] Revert "Bluetooth: Always request for user
confirmation for Just Works (LE SC)"
This reverts commit ffee202a78c2980688bc5d2f7d56480e69a5e0c9.
The commit "Bluetooth: Always request for user confirmation for Just
Works" prevents BLE devices pairing in (at least) the Raspberry Pi OS
GUI. After reverting it, pairing works again. Although this companion
commit ("... (LE SC)") has not been demonstrated to be problematic,
it follows the same logic and therefore could affect some use cases.
If another solution to the problem is found then this reversion will
be removed.
See: https://github.com/raspberrypi/linux/issues/4139
Signed-off-by: Phil Elwell <phil@raspberrypi.com>
---
net/bluetooth/smp.c | 5 +----
1 file changed, 1 insertion(+), 4 deletions(-)
diff --git a/net/bluetooth/smp.c b/net/bluetooth/smp.c
index 37f95ea8c7db..2882b324f62b 100644
--- a/net/bluetooth/smp.c
+++ b/net/bluetooth/smp.c
@@ -2221,7 +2221,7 @@ static u8 smp_cmd_pairing_random(struct l2cap_conn *conn, struct sk_buff *skb)
if (err)
return SMP_UNSPECIFIED;
- if (smp->method == REQ_OOB) {
+ if (smp->method == JUST_WORKS || smp->method == REQ_OOB) {
if (hcon->out) {
sc_dhkey_check(smp);
SMP_ALLOW_CMD(smp, SMP_CMD_DHKEY_CHECK);
@@ -2236,9 +2236,6 @@ static u8 smp_cmd_pairing_random(struct l2cap_conn *conn, struct sk_buff *skb)
confirm_hint = 0;
confirm:
- if (smp->method == JUST_WORKS)
- confirm_hint = 1;
-
err = mgmt_user_confirm_request(hcon->hdev, &hcon->dst, hcon->type,
hcon->dst_type, passkey, confirm_hint);
if (err)
--
2.44.0

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@ -1,48 +0,0 @@
From d82e1c63ce54621447756dd2430e99bf1124662e Mon Sep 17 00:00:00 2001
From: Phil Elwell <phil@raspberrypi.com>
Date: Mon, 1 Mar 2021 09:14:35 +0000
Subject: [PATCH 0059/1002] Revert "Bluetooth: Always request for user
confirmation for Just Works"
This reverts commit 92516cd97fd4d8ad5b1421a0d51771044f453a5f.
Thi commit "Bluetooth: Always request for user confirmation for Just
Works" prevents BLE devices pairing in (at least) the Raspberry Pi OS
GUI. After reverting it, pairing works again.
If another solution to the problem is found then this reversion will
be removed.
See: https://github.com/raspberrypi/linux/issues/4139
Signed-off-by: Phil Elwell <phil@raspberrypi.com>
---
net/bluetooth/smp.c | 11 ++---------
1 file changed, 2 insertions(+), 9 deletions(-)
diff --git a/net/bluetooth/smp.c b/net/bluetooth/smp.c
index 2882b324f62b..a40808483730 100644
--- a/net/bluetooth/smp.c
+++ b/net/bluetooth/smp.c
@@ -885,16 +885,9 @@ static int tk_request(struct l2cap_conn *conn, u8 remote_oob, u8 auth,
hcon->io_capability == HCI_IO_NO_INPUT_OUTPUT)
smp->method = JUST_WORKS;
- /* If Just Works, Continue with Zero TK and ask user-space for
- * confirmation */
+ /* If Just Works, Continue with Zero TK */
if (smp->method == JUST_WORKS) {
- ret = mgmt_user_confirm_request(hcon->hdev, &hcon->dst,
- hcon->type,
- hcon->dst_type,
- passkey, 1);
- if (ret)
- return ret;
- set_bit(SMP_FLAG_WAIT_USER, &smp->flags);
+ set_bit(SMP_FLAG_TK_VALID, &smp->flags);
return 0;
}
--
2.44.0

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@ -1,34 +0,0 @@
From 7e5ce18f06392dddd65863a221704d2e4e94aaba Mon Sep 17 00:00:00 2001
From: Phil Elwell <phil@raspberrypi.com>
Date: Mon, 7 Mar 2022 16:18:55 +0000
Subject: [PATCH 0060/1002] Revert "net: bcmgenet: Request APD, DLL disable and
IDDQ-SR"
This reverts commit c3a4c69360ab43560f212eed326c9d8bde35b14c, which
broke rebooting when network booting.
See: https://github.com/raspberrypi/rpi-eeprom/issues/417
Signed-off-by: Phil Elwell <phil@raspberrypi.com>
---
drivers/net/ethernet/broadcom/genet/bcmmii.c | 4 +---
1 file changed, 1 insertion(+), 3 deletions(-)
diff --git a/drivers/net/ethernet/broadcom/genet/bcmmii.c b/drivers/net/ethernet/broadcom/genet/bcmmii.c
index 97ea76d443ab..6158d604f811 100644
--- a/drivers/net/ethernet/broadcom/genet/bcmmii.c
+++ b/drivers/net/ethernet/broadcom/genet/bcmmii.c
@@ -299,9 +299,7 @@ int bcmgenet_mii_probe(struct net_device *dev)
struct device_node *dn = kdev->of_node;
phy_interface_t phy_iface = priv->phy_interface;
struct phy_device *phydev;
- u32 phy_flags = PHY_BRCM_AUTO_PWRDWN_ENABLE |
- PHY_BRCM_DIS_TXCRXC_NOENRGY |
- PHY_BRCM_IDDQ_SUSPEND;
+ u32 phy_flags = 0;
int ret;
/* Communicate the integrated PHY revision */
--
2.44.0

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@ -1,78 +0,0 @@
From a956051a926b0a9e0bc587303ce1a2e153707e80 Mon Sep 17 00:00:00 2001
From: Dom Cobley <popcornmix@gmail.com>
Date: Mon, 31 Jul 2023 13:47:10 +0100
Subject: [PATCH 0061/1002] Revert "Revert "xhci: add quirk for host
controllers that don't update endpoint DCS""
This reverts commit 5bef4b3cb95a5b883dfec8b3ffc0d671323d55bb.
We don't agree with upstream revert so undo it.
---
drivers/usb/host/xhci-pci.c | 4 +++-
drivers/usb/host/xhci-ring.c | 25 ++++++++++++++++++++++++-
2 files changed, 27 insertions(+), 2 deletions(-)
diff --git a/drivers/usb/host/xhci-pci.c b/drivers/usb/host/xhci-pci.c
index d6fc08e5db8f..b61e6d79f27e 100644
--- a/drivers/usb/host/xhci-pci.c
+++ b/drivers/usb/host/xhci-pci.c
@@ -479,8 +479,10 @@ static void xhci_pci_quirks(struct device *dev, struct xhci_hcd *xhci)
pdev->device == 0x3432)
xhci->quirks |= XHCI_BROKEN_STREAMS;
- if (pdev->vendor == PCI_VENDOR_ID_VIA && pdev->device == 0x3483)
+ if (pdev->vendor == PCI_VENDOR_ID_VIA && pdev->device == 0x3483) {
xhci->quirks |= XHCI_LPM_SUPPORT;
+ xhci->quirks |= XHCI_EP_CTX_BROKEN_DCS;
+ }
if (pdev->vendor == PCI_VENDOR_ID_ASMEDIA &&
pdev->device == PCI_DEVICE_ID_ASMEDIA_1042_XHCI) {
diff --git a/drivers/usb/host/xhci-ring.c b/drivers/usb/host/xhci-ring.c
index c410a98ed63c..571f24d9361a 100644
--- a/drivers/usb/host/xhci-ring.c
+++ b/drivers/usb/host/xhci-ring.c
@@ -626,8 +626,11 @@ static int xhci_move_dequeue_past_td(struct xhci_hcd *xhci,
struct xhci_ring *ep_ring;
struct xhci_command *cmd;
struct xhci_segment *new_seg;
+ struct xhci_segment *halted_seg = NULL;
union xhci_trb *new_deq;
int new_cycle;
+ union xhci_trb *halted_trb;
+ int index = 0;
dma_addr_t addr;
u64 hw_dequeue;
bool cycle_found = false;
@@ -665,7 +668,27 @@ static int xhci_move_dequeue_past_td(struct xhci_hcd *xhci,
hw_dequeue = xhci_get_hw_deq(xhci, dev, ep_index, stream_id);
new_seg = ep_ring->deq_seg;
new_deq = ep_ring->dequeue;
- new_cycle = hw_dequeue & 0x1;
+
+ /*
+ * Quirk: xHC write-back of the DCS field in the hardware dequeue
+ * pointer is wrong - use the cycle state of the TRB pointed to by
+ * the dequeue pointer.
+ */
+ if (xhci->quirks & XHCI_EP_CTX_BROKEN_DCS &&
+ !(ep->ep_state & EP_HAS_STREAMS))
+ halted_seg = trb_in_td(xhci, td->start_seg,
+ td->first_trb, td->last_trb,
+ hw_dequeue & ~0xf, false);
+ if (halted_seg) {
+ index = ((dma_addr_t)(hw_dequeue & ~0xf) - halted_seg->dma) /
+ sizeof(*halted_trb);
+ halted_trb = &halted_seg->trbs[index];
+ new_cycle = halted_trb->generic.field[3] & 0x1;
+ xhci_dbg(xhci, "Endpoint DCS = %d TRB index = %d cycle = %d\n",
+ (u8)(hw_dequeue & 0x1), index, new_cycle);
+ } else {
+ new_cycle = hw_dequeue & 0x1;
+ }
/*
* We want to find the pointer, segment and cycle state of the new trb
--
2.44.0

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@ -1,48 +0,0 @@
From 52f494474b4713824d5761b22aa368d26fc6e479 Mon Sep 17 00:00:00 2001
From: Sam Nazarko <email@samnazarko.co.uk>
Date: Fri, 1 Apr 2016 17:27:21 +0100
Subject: [PATCH 0063/1002] smsc95xx: Experimental: Enable turbo_mode and
packetsize=2560 by default
See: http://forum.kodi.tv/showthread.php?tid=285288
---
drivers/net/usb/smsc95xx.c | 14 +++++++++-----
1 file changed, 9 insertions(+), 5 deletions(-)
diff --git a/drivers/net/usb/smsc95xx.c b/drivers/net/usb/smsc95xx.c
index af6a5cf81560..d65daf301d0d 100644
--- a/drivers/net/usb/smsc95xx.c
+++ b/drivers/net/usb/smsc95xx.c
@@ -83,6 +83,10 @@ static bool truesize_mode = false;
module_param(truesize_mode, bool, 0644);
MODULE_PARM_DESC(truesize_mode, "Report larger truesize value");
+static int packetsize = 2560;
+module_param(packetsize, int, 0644);
+MODULE_PARM_DESC(packetsize, "Override the RX URB packet size");
+
static int __must_check smsc95xx_read_reg(struct usbnet *dev, u32 index,
u32 *data)
{
@@ -936,13 +940,13 @@ static int smsc95xx_reset(struct usbnet *dev)
if (!turbo_mode) {
burst_cap = 0;
- dev->rx_urb_size = MAX_SINGLE_PACKET_SIZE;
+ dev->rx_urb_size = packetsize ? packetsize : MAX_SINGLE_PACKET_SIZE;
} else if (dev->udev->speed == USB_SPEED_HIGH) {
- burst_cap = DEFAULT_HS_BURST_CAP_SIZE / HS_USB_PKT_SIZE;
- dev->rx_urb_size = DEFAULT_HS_BURST_CAP_SIZE;
+ dev->rx_urb_size = packetsize ? packetsize : DEFAULT_HS_BURST_CAP_SIZE;
+ burst_cap = dev->rx_urb_size / HS_USB_PKT_SIZE;
} else {
- burst_cap = DEFAULT_FS_BURST_CAP_SIZE / FS_USB_PKT_SIZE;
- dev->rx_urb_size = DEFAULT_FS_BURST_CAP_SIZE;
+ dev->rx_urb_size = packetsize ? packetsize : DEFAULT_FS_BURST_CAP_SIZE;
+ burst_cap = dev->rx_urb_size / FS_USB_PKT_SIZE;
}
netif_dbg(dev, ifup, dev->net, "rx_urb_size=%ld\n",
--
2.44.0

View file

@ -1,77 +0,0 @@
From abc515eb9206d0691792e93d78441c03b6b0fcd6 Mon Sep 17 00:00:00 2001
From: popcornmix <popcornmix@gmail.com>
Date: Tue, 26 Mar 2013 17:26:38 +0000
Subject: [PATCH 0064/1002] Allow mac address to be set in smsc95xx
Signed-off-by: popcornmix <popcornmix@gmail.com>
SQUASH: smsc95xx: Use dev_mod_addr to set MAC addr
Since adeef3e32146 ("net: constify netdev->dev_addr") it has been
illegal to write to the dev_addr MAC address field. Later commits
have added explicit checks that it hasn't been modified by nefarious
means. The dev_addr_mod helper function is the accepted way to change
the dev_addr field, so use it.
Squash with 96c1def63ee1 ("Allow mac address to be set in smsc95xx").
Signed-off-by: Phil Elwell <phil@raspberrypi.com>
---
drivers/net/usb/smsc95xx.c | 27 +++++++++++++++++++++++++++
1 file changed, 27 insertions(+)
diff --git a/drivers/net/usb/smsc95xx.c b/drivers/net/usb/smsc95xx.c
index d65daf301d0d..340a877eaf69 100644
--- a/drivers/net/usb/smsc95xx.c
+++ b/drivers/net/usb/smsc95xx.c
@@ -87,6 +87,10 @@ static int packetsize = 2560;
module_param(packetsize, int, 0644);
MODULE_PARM_DESC(packetsize, "Override the RX URB packet size");
+static char *macaddr = ":";
+module_param(macaddr, charp, 0);
+MODULE_PARM_DESC(macaddr, "MAC address");
+
static int __must_check smsc95xx_read_reg(struct usbnet *dev, u32 index,
u32 *data)
{
@@ -809,6 +813,21 @@ static int smsc95xx_ioctl(struct net_device *netdev, struct ifreq *rq, int cmd)
return phy_mii_ioctl(netdev->phydev, rq, cmd);
}
+/* Check the macaddr module parameter for a MAC address */
+static int smsc95xx_macaddr_param(struct usbnet *dev, struct net_device *nd)
+{
+ u8 mtbl[ETH_ALEN];
+
+ if (mac_pton(macaddr, mtbl)) {
+ netif_dbg(dev, ifup, dev->net,
+ "Overriding MAC address with: %pM\n", mtbl);
+ dev_addr_mod(nd, 0, mtbl, ETH_ALEN);
+ return 0;
+ } else {
+ return -EINVAL;
+ }
+}
+
static void smsc95xx_init_mac_address(struct usbnet *dev)
{
u8 addr[ETH_ALEN];
@@ -832,6 +851,14 @@ static void smsc95xx_init_mac_address(struct usbnet *dev)
}
}
+ /* Check module parameters */
+ if (smsc95xx_macaddr_param(dev, dev->net) == 0) {
+ if (is_valid_ether_addr(dev->net->dev_addr)) {
+ netif_dbg(dev, ifup, dev->net, "MAC address read from module parameter\n");
+ return;
+ }
+ }
+
/* no useful static MAC address found. generate a random one */
eth_hw_addr_random(dev->net);
netif_dbg(dev, ifup, dev->net, "MAC address set to eth_random_addr\n");
--
2.44.0

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@ -1,90 +0,0 @@
From 94a23e978235cd35f38075072b34152b2b667e6e Mon Sep 17 00:00:00 2001
From: Phil Elwell <phil@raspberrypi.org>
Date: Mon, 27 Nov 2017 17:14:54 +0000
Subject: [PATCH 0065/1002] cgroup: Disable cgroup "memory" by default
Some Raspberry Pis have limited RAM and most users won't use the
cgroup memory support so it is disabled by default. Enable with:
cgroup_enable=memory
See: https://github.com/raspberrypi/linux/issues/1950
Signed-off-by: Phil Elwell <phil@raspberrypi.org>
---
kernel/cgroup/cgroup.c | 38 ++++++++++++++++++++++++++++++++++++++
1 file changed, 38 insertions(+)
diff --git a/kernel/cgroup/cgroup.c b/kernel/cgroup/cgroup.c
index 518725b57200..5165f5ccd1b4 100644
--- a/kernel/cgroup/cgroup.c
+++ b/kernel/cgroup/cgroup.c
@@ -6051,6 +6051,9 @@ int __init cgroup_init_early(void)
return 0;
}
+static u16 cgroup_enable_mask __initdata;
+static int __init cgroup_disable(char *str);
+
/**
* cgroup_init - cgroup initialization
*
@@ -6084,6 +6087,12 @@ int __init cgroup_init(void)
cgroup_unlock();
+ /*
+ * Apply an implicit disable, knowing that an explicit enable will
+ * prevent if from doing anything.
+ */
+ cgroup_disable("memory");
+
for_each_subsys(ss, ssid) {
if (ss->early_init) {
struct cgroup_subsys_state *css =
@@ -6724,6 +6733,10 @@ static int __init cgroup_disable(char *str)
strcmp(token, ss->legacy_name))
continue;
+ /* An explicit cgroup_enable overrides a disable */
+ if (cgroup_enable_mask & (1 << i))
+ continue;
+
static_branch_disable(cgroup_subsys_enabled_key[i]);
pr_info("Disabling %s control group subsystem\n",
ss->name);
@@ -6742,6 +6755,31 @@ static int __init cgroup_disable(char *str)
}
__setup("cgroup_disable=", cgroup_disable);
+static int __init cgroup_enable(char *str)
+{
+ struct cgroup_subsys *ss;
+ char *token;
+ int i;
+
+ while ((token = strsep(&str, ",")) != NULL) {
+ if (!*token)
+ continue;
+
+ for_each_subsys(ss, i) {
+ if (strcmp(token, ss->name) &&
+ strcmp(token, ss->legacy_name))
+ continue;
+
+ cgroup_enable_mask |= 1 << i;
+ static_branch_enable(cgroup_subsys_enabled_key[i]);
+ pr_info("Enabling %s control group subsystem\n",
+ ss->name);
+ }
+ }
+ return 1;
+}
+__setup("cgroup_enable=", cgroup_enable);
+
void __init __weak enable_debug_cgroup(void) { }
static int __init enable_cgroup_debug(char *str)
--
2.44.0

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@ -1,33 +0,0 @@
From fd4dd0612e2b97840bb5ca1699ff7d779704c4a9 Mon Sep 17 00:00:00 2001
From: Phil Elwell <phil@raspberrypi.org>
Date: Fri, 13 Mar 2015 12:43:36 +0000
Subject: [PATCH 0066/1002] Protect __release_resource against resources
without parents
Without this patch, removing a device tree overlay can crash here.
Signed-off-by: Phil Elwell <phil@raspberrypi.org>
---
kernel/resource.c | 6 ++++++
1 file changed, 6 insertions(+)
diff --git a/kernel/resource.c b/kernel/resource.c
index e3f5680a564c..ded9cf87d603 100644
--- a/kernel/resource.c
+++ b/kernel/resource.c
@@ -200,6 +200,12 @@ static int __release_resource(struct resource *old, bool release_child)
{
struct resource *tmp, **p, *chd;
+ if (!old->parent) {
+ WARN(old->sibling, "sibling but no parent");
+ if (old->sibling)
+ return -EINVAL;
+ return 0;
+ }
p = &old->parent->child;
for (;;) {
tmp = *p;
--
2.44.0

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@ -1,29 +0,0 @@
From 72a7a6b93d9689b911a0117d7e1c627c68444f1c Mon Sep 17 00:00:00 2001
From: Phil Elwell <phil@raspberrypi.org>
Date: Thu, 9 Feb 2017 14:33:30 +0000
Subject: [PATCH 0067/1002] irq-bcm2836: Avoid "Invalid trigger warning"
Initialise the level for each IRQ to avoid a warning from the
arm arch timer code.
Signed-off-by: Phil Elwell <phil@raspberrypi.org>
---
drivers/irqchip/irq-bcm2836.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/irqchip/irq-bcm2836.c b/drivers/irqchip/irq-bcm2836.c
index e5f1059b989f..88734748c7ef 100644
--- a/drivers/irqchip/irq-bcm2836.c
+++ b/drivers/irqchip/irq-bcm2836.c
@@ -128,7 +128,7 @@ static int bcm2836_map(struct irq_domain *d, unsigned int irq,
irq_set_percpu_devid(irq);
irq_domain_set_info(d, irq, hw, chip, d->host_data,
handle_percpu_devid_irq, NULL, NULL);
- irq_set_status_flags(irq, IRQ_NOAUTOEN);
+ irq_set_status_flags(irq, IRQ_NOAUTOEN | IRQ_TYPE_LEVEL_LOW);
return 0;
}
--
2.44.0

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@ -1,134 +0,0 @@
From d323861454899d375d9c6473374f7ce55126577a Mon Sep 17 00:00:00 2001
From: =?UTF-8?q?Noralf=20Tr=C3=B8nnes?= <noralf@tronnes.org>
Date: Fri, 12 Jun 2015 19:01:05 +0200
Subject: [PATCH 0068/1002] irqchip: bcm2835: Add FIQ support
MIME-Version: 1.0
Content-Type: text/plain; charset=UTF-8
Content-Transfer-Encoding: 8bit
Add a duplicate irq range with an offset on the hwirq's so the
driver can detect that enable_fiq() is used.
Tested with downstream dwc_otg USB controller driver.
Signed-off-by: Noralf Trønnes <noralf@tronnes.org>
Reviewed-by: Eric Anholt <eric@anholt.net>
Acked-by: Stephen Warren <swarren@wwwdotorg.org>
---
arch/arm/mach-bcm/Kconfig | 1 +
drivers/irqchip/irq-bcm2835.c | 51 +++++++++++++++++++++++++++++++----
2 files changed, 47 insertions(+), 5 deletions(-)
diff --git a/arch/arm/mach-bcm/Kconfig b/arch/arm/mach-bcm/Kconfig
index 8789d93a7c04..4b2000d9ad05 100644
--- a/arch/arm/mach-bcm/Kconfig
+++ b/arch/arm/mach-bcm/Kconfig
@@ -159,6 +159,7 @@ config ARCH_BCM2835
select ARM_TIMER_SP804
select HAVE_ARM_ARCH_TIMER if ARCH_MULTI_V7
select BCM2835_TIMER
+ select FIQ
select PINCTRL
select PINCTRL_BCM2835
select MFD_CORE
diff --git a/drivers/irqchip/irq-bcm2835.c b/drivers/irqchip/irq-bcm2835.c
index e94e2882286c..c593c4020b61 100644
--- a/drivers/irqchip/irq-bcm2835.c
+++ b/drivers/irqchip/irq-bcm2835.c
@@ -45,7 +45,7 @@
#include <asm/exception.h>
/* Put the bank and irq (32 bits) into the hwirq */
-#define MAKE_HWIRQ(b, n) ((b << 5) | (n))
+#define MAKE_HWIRQ(b, n) (((b) << 5) | (n))
#define HWIRQ_BANK(i) (i >> 5)
#define HWIRQ_BIT(i) BIT(i & 0x1f)
@@ -62,9 +62,13 @@
#define REG_FIQ_CONTROL 0x0c
#define FIQ_CONTROL_ENABLE BIT(7)
+#define REG_FIQ_ENABLE FIQ_CONTROL_ENABLE
+#define REG_FIQ_DISABLE 0
#define NR_BANKS 3
#define IRQS_PER_BANK 32
+#define NUMBER_IRQS MAKE_HWIRQ(NR_BANKS, 0)
+#define FIQ_START (NR_IRQS_BANK0 + MAKE_HWIRQ(NR_BANKS - 1, 0))
static const int reg_pending[] __initconst = { 0x00, 0x04, 0x08 };
static const int reg_enable[] __initconst = { 0x18, 0x10, 0x14 };
@@ -89,14 +93,38 @@ static void __exception_irq_entry bcm2835_handle_irq(
struct pt_regs *regs);
static void bcm2836_chained_handle_irq(struct irq_desc *desc);
+static inline unsigned int hwirq_to_fiq(unsigned long hwirq)
+{
+ hwirq -= NUMBER_IRQS;
+ /*
+ * The hwirq numbering used in this driver is:
+ * BASE (0-7) GPU1 (32-63) GPU2 (64-95).
+ * This differ from the one used in the FIQ register:
+ * GPU1 (0-31) GPU2 (32-63) BASE (64-71)
+ */
+ if (hwirq >= 32)
+ return hwirq - 32;
+
+ return hwirq + 64;
+}
+
static void armctrl_mask_irq(struct irq_data *d)
{
- writel_relaxed(HWIRQ_BIT(d->hwirq), intc.disable[HWIRQ_BANK(d->hwirq)]);
+ if (d->hwirq >= NUMBER_IRQS)
+ writel_relaxed(REG_FIQ_DISABLE, intc.base + REG_FIQ_CONTROL);
+ else
+ writel_relaxed(HWIRQ_BIT(d->hwirq),
+ intc.disable[HWIRQ_BANK(d->hwirq)]);
}
static void armctrl_unmask_irq(struct irq_data *d)
{
- writel_relaxed(HWIRQ_BIT(d->hwirq), intc.enable[HWIRQ_BANK(d->hwirq)]);
+ if (d->hwirq >= NUMBER_IRQS)
+ writel_relaxed(REG_FIQ_ENABLE | hwirq_to_fiq(d->hwirq),
+ intc.base + REG_FIQ_CONTROL);
+ else
+ writel_relaxed(HWIRQ_BIT(d->hwirq),
+ intc.enable[HWIRQ_BANK(d->hwirq)]);
}
static struct irq_chip armctrl_chip = {
@@ -142,8 +170,9 @@ static int __init armctrl_of_init(struct device_node *node,
if (!base)
panic("%pOF: unable to map IC registers\n", node);
- intc.domain = irq_domain_add_linear(node, MAKE_HWIRQ(NR_BANKS, 0),
- &armctrl_ops, NULL);
+ intc.base = base;
+ intc.domain = irq_domain_add_linear(node, NUMBER_IRQS * 2,
+ &armctrl_ops, NULL);
if (!intc.domain)
panic("%pOF: unable to create IRQ domain\n", node);
@@ -186,6 +215,18 @@ static int __init armctrl_of_init(struct device_node *node,
set_handle_irq(bcm2835_handle_irq);
}
+ /* Make a duplicate irq range which is used to enable FIQ */
+ for (b = 0; b < NR_BANKS; b++) {
+ for (i = 0; i < bank_irqs[b]; i++) {
+ irq = irq_create_mapping(intc.domain,
+ MAKE_HWIRQ(b, i) + NUMBER_IRQS);
+ BUG_ON(irq <= 0);
+ irq_set_chip(irq, &armctrl_chip);
+ set_irq_flags(irq, IRQF_VALID | IRQF_PROBE);
+ }
+ }
+ init_FIQ(FIQ_START);
+
return 0;
}
--
2.44.0

View file

@ -1,104 +0,0 @@
From 73fde97789bc341d361e801b254afea33fe45f06 Mon Sep 17 00:00:00 2001
From: =?UTF-8?q?Noralf=20Tr=C3=B8nnes?= <noralf@tronnes.org>
Date: Fri, 23 Oct 2015 16:26:55 +0200
Subject: [PATCH 0069/1002] irqchip: irq-bcm2835: Add 2836 FIQ support
MIME-Version: 1.0
Content-Type: text/plain; charset=UTF-8
Content-Transfer-Encoding: 8bit
Signed-off-by: Noralf Trønnes <noralf@tronnes.org>
---
drivers/irqchip/irq-bcm2835.c | 43 +++++++++++++++++++++++++++++++++--
1 file changed, 41 insertions(+), 2 deletions(-)
diff --git a/drivers/irqchip/irq-bcm2835.c b/drivers/irqchip/irq-bcm2835.c
index c593c4020b61..71994904a3c7 100644
--- a/drivers/irqchip/irq-bcm2835.c
+++ b/drivers/irqchip/irq-bcm2835.c
@@ -41,8 +41,11 @@
#include <linux/of_irq.h>
#include <linux/irqchip.h>
#include <linux/irqdomain.h>
+#include <linux/mfd/syscon.h>
+#include <linux/regmap.h>
#include <asm/exception.h>
+#include <asm/mach/irq.h>
/* Put the bank and irq (32 bits) into the hwirq */
#define MAKE_HWIRQ(b, n) (((b) << 5) | (n))
@@ -60,6 +63,9 @@
#define BANK0_VALID_MASK (BANK0_HWIRQ_MASK | BANK1_HWIRQ | BANK2_HWIRQ \
| SHORTCUT1_MASK | SHORTCUT2_MASK)
+#undef ARM_LOCAL_GPU_INT_ROUTING
+#define ARM_LOCAL_GPU_INT_ROUTING 0x0c
+
#define REG_FIQ_CONTROL 0x0c
#define FIQ_CONTROL_ENABLE BIT(7)
#define REG_FIQ_ENABLE FIQ_CONTROL_ENABLE
@@ -86,6 +92,7 @@ struct armctrl_ic {
void __iomem *enable[NR_BANKS];
void __iomem *disable[NR_BANKS];
struct irq_domain *domain;
+ struct regmap *local_regmap;
};
static struct armctrl_ic intc __read_mostly;
@@ -119,12 +126,35 @@ static void armctrl_mask_irq(struct irq_data *d)
static void armctrl_unmask_irq(struct irq_data *d)
{
- if (d->hwirq >= NUMBER_IRQS)
+ if (d->hwirq >= NUMBER_IRQS) {
+ if (num_online_cpus() > 1) {
+ unsigned int data;
+ int ret;
+
+ if (!intc.local_regmap) {
+ pr_err("FIQ is disabled due to missing regmap\n");
+ return;
+ }
+
+ ret = regmap_read(intc.local_regmap,
+ ARM_LOCAL_GPU_INT_ROUTING, &data);
+ if (ret) {
+ pr_err("Failed to read int routing %d\n", ret);
+ return;
+ }
+
+ data &= ~0xc;
+ data |= (1 << 2);
+ regmap_write(intc.local_regmap,
+ ARM_LOCAL_GPU_INT_ROUTING, data);
+ }
+
writel_relaxed(REG_FIQ_ENABLE | hwirq_to_fiq(d->hwirq),
intc.base + REG_FIQ_CONTROL);
- else
+ } else {
writel_relaxed(HWIRQ_BIT(d->hwirq),
intc.enable[HWIRQ_BANK(d->hwirq)]);
+ }
}
static struct irq_chip armctrl_chip = {
@@ -215,6 +245,15 @@ static int __init armctrl_of_init(struct device_node *node,
set_handle_irq(bcm2835_handle_irq);
}
+ if (is_2836) {
+ intc.local_regmap =
+ syscon_regmap_lookup_by_compatible("brcm,bcm2836-arm-local");
+ if (IS_ERR(intc.local_regmap)) {
+ pr_err("Failed to get local register map. FIQ is disabled for cpus > 1\n");
+ intc.local_regmap = NULL;
+ }
+ }
+
/* Make a duplicate irq range which is used to enable FIQ */
for (b = 0; b < NR_BANKS; b++) {
for (i = 0; i < bank_irqs[b]; i++) {
--
2.44.0

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@ -1,29 +0,0 @@
From 389c8d3272050cd89a464779a47a575dee3e308b Mon Sep 17 00:00:00 2001
From: Dom Cobley <popcornmix@gmail.com>
Date: Mon, 24 Jan 2022 13:41:16 +0000
Subject: [PATCH 0070/1002] spi: spidev: Completely disable the spidev warning
An alternative strategy would be to use "rpi,spidev" instead, but that
would require many Raspberry Pi Device Tree changes.
Signed-off-by: Phil Elwell <phil@raspberrypi.org>
---
drivers/spi/spidev.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/spi/spidev.c b/drivers/spi/spidev.c
index 2d5e32c5aa49..7ea5560a98af 100644
--- a/drivers/spi/spidev.c
+++ b/drivers/spi/spidev.c
@@ -719,7 +719,7 @@ MODULE_DEVICE_TABLE(spi, spidev_spi_ids);
*/
static int spidev_of_check(struct device *dev)
{
- if (device_property_match_string(dev, "compatible", "spidev") < 0)
+ if (1 || device_property_match_string(dev, "compatible", "spidev") < 0)
return 0;
dev_err(dev, "spidev listed directly in DT is not supported\n");
--
2.44.0

View file

@ -1,25 +0,0 @@
From 62cc6444d30992fcb534bb150525eaaa31891a62 Mon Sep 17 00:00:00 2001
From: Phil Elwell <phil@raspberrypi.org>
Date: Wed, 15 Jun 2016 16:48:41 +0100
Subject: [PATCH 0072/1002] rtc: Add SPI alias for pcf2123 driver
Without this alias, Device Tree won't cause the driver
to be loaded.
See: https://github.com/raspberrypi/linux/pull/1510
---
drivers/rtc/rtc-pcf2123.c | 1 +
1 file changed, 1 insertion(+)
diff --git a/drivers/rtc/rtc-pcf2123.c b/drivers/rtc/rtc-pcf2123.c
index e714661e61a9..89cda4dea7f8 100644
--- a/drivers/rtc/rtc-pcf2123.c
+++ b/drivers/rtc/rtc-pcf2123.c
@@ -479,3 +479,4 @@ module_spi_driver(pcf2123_driver);
MODULE_AUTHOR("Chris Verges <chrisv@cyberswitching.com>");
MODULE_DESCRIPTION("NXP PCF2123 RTC driver");
MODULE_LICENSE("GPL");
+MODULE_ALIAS("spi:rtc-pcf2123");
--
2.44.0

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@ -1,107 +0,0 @@
From 45d9fa5c9a92c2b5595f41be8a04752dbdae9001 Mon Sep 17 00:00:00 2001
From: =?UTF-8?q?Noralf=20Tr=C3=B8nnes?= <noralf@tronnes.org>
Date: Fri, 7 Oct 2016 16:50:59 +0200
Subject: [PATCH 0073/1002] watchdog: bcm2835: Support setting reboot partition
MIME-Version: 1.0
Content-Type: text/plain; charset=UTF-8
Content-Transfer-Encoding: 8bit
The Raspberry Pi firmware looks at the RSTS register to know which
partition to boot from. The reboot syscall command
LINUX_REBOOT_CMD_RESTART2 supports passing in a string argument.
Add support for passing in a partition number 0..63 to boot from.
Partition 63 is a special partiton indicating halt.
If the partition doesn't exist, the firmware falls back to partition 0.
Signed-off-by: Noralf Trønnes <noralf@tronnes.org>
---
drivers/watchdog/bcm2835_wdt.c | 49 +++++++++++++++++++---------------
1 file changed, 27 insertions(+), 22 deletions(-)
diff --git a/drivers/watchdog/bcm2835_wdt.c b/drivers/watchdog/bcm2835_wdt.c
index bb001c5d7f17..1931c80e374e 100644
--- a/drivers/watchdog/bcm2835_wdt.c
+++ b/drivers/watchdog/bcm2835_wdt.c
@@ -32,13 +32,7 @@
#define PM_RSTC_WRCFG_SET 0x00000030
#define PM_RSTC_WRCFG_FULL_RESET 0x00000020
#define PM_RSTC_RESET 0x00000102
-
-/*
- * The Raspberry Pi firmware uses the RSTS register to know which partition
- * to boot from. The partition value is spread into bits 0, 2, 4, 6, 8, 10.
- * Partition 63 is a special partition used by the firmware to indicate halt.
- */
-#define PM_RSTS_RASPBERRYPI_HALT 0x555
+#define PM_RSTS_PARTITION_CLR 0xfffffaaa
#define SECS_TO_WDOG_TICKS(x) ((x) << 16)
#define WDOG_TICKS_TO_SECS(x) ((x) >> 16)
@@ -98,9 +92,24 @@ static unsigned int bcm2835_wdt_get_timeleft(struct watchdog_device *wdog)
return WDOG_TICKS_TO_SECS(ret & PM_WDOG_TIME_SET);
}
-static void __bcm2835_restart(struct bcm2835_wdt *wdt)
+/*
+ * The Raspberry Pi firmware uses the RSTS register to know which partiton
+ * to boot from. The partiton value is spread into bits 0, 2, 4, 6, 8, 10.
+ * Partiton 63 is a special partition used by the firmware to indicate halt.
+ */
+
+static void __bcm2835_restart(struct bcm2835_wdt *wdt, u8 partition)
{
- u32 val;
+ u32 val, rsts;
+
+ rsts = (partition & BIT(0)) | ((partition & BIT(1)) << 1) |
+ ((partition & BIT(2)) << 2) | ((partition & BIT(3)) << 3) |
+ ((partition & BIT(4)) << 4) | ((partition & BIT(5)) << 5);
+
+ val = readl_relaxed(wdt->base + PM_RSTS);
+ val &= PM_RSTS_PARTITION_CLR;
+ val |= PM_PASSWORD | rsts;
+ writel_relaxed(val, wdt->base + PM_RSTS);
/* use a timeout of 10 ticks (~150us) */
writel_relaxed(10 | PM_PASSWORD, wdt->base + PM_WDOG);
@@ -118,7 +127,13 @@ static int bcm2835_restart(struct watchdog_device *wdog,
{
struct bcm2835_wdt *wdt = watchdog_get_drvdata(wdog);
- __bcm2835_restart(wdt);
+ unsigned long long val;
+ u8 partition = 0;
+
+ if (data && !kstrtoull(data, 0, &val) && val <= 63)
+ partition = val;
+
+ __bcm2835_restart(wdt, partition);
return 0;
}
@@ -153,19 +168,9 @@ static struct watchdog_device bcm2835_wdt_wdd = {
static void bcm2835_power_off(void)
{
struct bcm2835_wdt *wdt = bcm2835_power_off_wdt;
- u32 val;
-
- /*
- * We set the watchdog hard reset bit here to distinguish this reset
- * from the normal (full) reset. bootcode.bin will not reboot after a
- * hard reset.
- */
- val = readl_relaxed(wdt->base + PM_RSTS);
- val |= PM_PASSWORD | PM_RSTS_RASPBERRYPI_HALT;
- writel_relaxed(val, wdt->base + PM_RSTS);
- /* Continue with normal reset mechanism */
- __bcm2835_restart(wdt);
+ /* Partition 63 tells the firmware that this is a halt */
+ __bcm2835_restart(wdt, 63);
}
static int bcm2835_wdt_probe(struct platform_device *pdev)
--
2.44.0

View file

@ -1,56 +0,0 @@
From 7b4fcaaaf4d7081c4c1be24b4961f59e14e2af6c Mon Sep 17 00:00:00 2001
From: popcornmix <popcornmix@gmail.com>
Date: Tue, 5 Apr 2016 19:40:12 +0100
Subject: [PATCH 0074/1002] reboot: Use power off rather than busy spinning
when halt is requested
reboot: Use power off rather than busy spinning when halt is requested
Busy spinning after halt is dumb
We've previously applied this patch to arch/arm
but it is currenltly missing in arch/arm64
Pi4 after "sudo halt" uses 520mA
Pi4 after "sudo shutdown now" uses 310mA
Make them both use the lower powered option
Signed-off-by: Dom Cobley <popcornmix@gmail.com>
---
arch/arm/kernel/reboot.c | 4 +---
arch/arm64/kernel/process.c | 4 +---
2 files changed, 2 insertions(+), 6 deletions(-)
diff --git a/arch/arm/kernel/reboot.c b/arch/arm/kernel/reboot.c
index 3f0d5c3dae11..cfdbcc9826c0 100644
--- a/arch/arm/kernel/reboot.c
+++ b/arch/arm/kernel/reboot.c
@@ -102,9 +102,7 @@ void machine_shutdown(void)
*/
void machine_halt(void)
{
- local_irq_disable();
- smp_send_stop();
- while (1);
+ machine_power_off();
}
/*
diff --git a/arch/arm64/kernel/process.c b/arch/arm64/kernel/process.c
index 0fcc4eb1a7ab..8af721444fa5 100644
--- a/arch/arm64/kernel/process.c
+++ b/arch/arm64/kernel/process.c
@@ -96,9 +96,7 @@ void machine_shutdown(void)
*/
void machine_halt(void)
{
- local_irq_disable();
- smp_send_stop();
- while (1);
+ machine_power_off();
}
/*
--
2.44.0

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@ -1,24 +0,0 @@
From 32f7b1937744d92fd437ab6c1284ebc89b64d329 Mon Sep 17 00:00:00 2001
From: popcornmix <popcornmix@gmail.com>
Date: Wed, 9 Nov 2016 13:02:52 +0000
Subject: [PATCH 0075/1002] bcm: Make RASPBERRYPI_POWER depend on PM
---
drivers/soc/bcm/Kconfig | 1 +
1 file changed, 1 insertion(+)
diff --git a/drivers/soc/bcm/Kconfig b/drivers/soc/bcm/Kconfig
index f96906795fa6..3856477b14ff 100644
--- a/drivers/soc/bcm/Kconfig
+++ b/drivers/soc/bcm/Kconfig
@@ -17,6 +17,7 @@ config RASPBERRYPI_POWER
bool "Raspberry Pi power domain driver"
depends on ARCH_BCM2835 || (COMPILE_TEST && OF)
depends on RASPBERRYPI_FIRMWARE=y
+ depends on PM
select PM_GENERIC_DOMAINS if PM
help
This enables support for the RPi power domains which can be enabled
--
2.44.0

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@ -1,30 +0,0 @@
From bf03fa485094a2483bad7d27537f532d04e8d860 Mon Sep 17 00:00:00 2001
From: popcornmix <popcornmix@gmail.com>
Date: Tue, 6 Dec 2016 17:05:39 +0000
Subject: [PATCH 0076/1002] bcm2835-rng: Avoid initialising if already enabled
Avoids the 0x40000 cycles of warmup again if firmware has already used it
---
drivers/char/hw_random/bcm2835-rng.c | 6 ++++--
1 file changed, 4 insertions(+), 2 deletions(-)
diff --git a/drivers/char/hw_random/bcm2835-rng.c b/drivers/char/hw_random/bcm2835-rng.c
index 4c08efe7f375..2fc6dd556553 100644
--- a/drivers/char/hw_random/bcm2835-rng.c
+++ b/drivers/char/hw_random/bcm2835-rng.c
@@ -105,8 +105,10 @@ static int bcm2835_rng_init(struct hwrng *rng)
}
/* set warm-up count & enable */
- rng_writel(priv, RNG_WARMUP_COUNT, RNG_STATUS);
- rng_writel(priv, RNG_RBGEN, RNG_CTRL);
+ if (!(rng_readl(priv, RNG_CTRL) & RNG_RBGEN)) {
+ rng_writel(priv, RNG_WARMUP_COUNT, RNG_STATUS);
+ rng_writel(priv, RNG_RBGEN, RNG_CTRL);
+ }
return ret;
}
--
2.44.0

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@ -1,40 +0,0 @@
From fa657603e4de0f034eb9386089d9c0df758a5781 Mon Sep 17 00:00:00 2001
From: Phil Elwell <phil@raspberrypi.org>
Date: Thu, 9 Feb 2017 14:36:44 +0000
Subject: [PATCH 0077/1002] sound: Demote deferral errors to INFO level
At present there is no mechanism to specify driver load order,
which can lead to deferrals and repeated retries until successful.
Since this situation is expected, reduce the dmesg level to
INFO and mention that the operation will be retried.
Signed-off-by: Phil Elwell <phil@raspberrypi.org>
---
sound/soc/soc-core.c | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/sound/soc/soc-core.c b/sound/soc/soc-core.c
index 9de98c01d815..ead54974cf76 100644
--- a/sound/soc/soc-core.c
+++ b/sound/soc/soc-core.c
@@ -1080,7 +1080,7 @@ static int snd_soc_add_pcm_runtime(struct snd_soc_card *card,
for_each_link_cpus(dai_link, i, cpu) {
asoc_rtd_to_cpu(rtd, i) = snd_soc_find_dai(cpu);
if (!asoc_rtd_to_cpu(rtd, i)) {
- dev_info(card->dev, "ASoC: CPU DAI %s not registered\n",
+ dev_info(card->dev, "ASoC: CPU DAI %s not registered - will retry\n",
cpu->dai_name);
goto _err_defer;
}
@@ -1091,7 +1091,7 @@ static int snd_soc_add_pcm_runtime(struct snd_soc_card *card,
for_each_link_codecs(dai_link, i, codec) {
asoc_rtd_to_codec(rtd, i) = snd_soc_find_dai(codec);
if (!asoc_rtd_to_codec(rtd, i)) {
- dev_info(card->dev, "ASoC: CODEC DAI %s not registered\n",
+ dev_info(card->dev, "ASoC: CODEC DAI %s not registered- will retry\n",
codec->dai_name);
goto _err_defer;
}
--
2.44.0

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@ -1,142 +0,0 @@
From 0f89f7ea9f51911ae43d92f06429bb0bc23adeca Mon Sep 17 00:00:00 2001
From: Claggy3 <stephen.maclagan@hotmail.com>
Date: Sat, 11 Feb 2017 14:00:30 +0000
Subject: [PATCH 0078/1002] Update vfpmodule.c
Christopher Alexander Tobias Schulze - May 2, 2015, 11:57 a.m.
This patch fixes a problem with VFP state save and restore related
to exception handling (panic with message "BUG: unsupported FP
instruction in kernel mode") present on VFP11 floating point units
(as used with ARM1176JZF-S CPUs, e.g. on first generation Raspberry
Pi boards). This patch was developed and discussed on
https://github.com/raspberrypi/linux/issues/859
A precondition to see the crashes is that floating point exception
traps are enabled. In this case, the VFP11 might determine that a FPU
operation needs to trap at a point in time when it is not possible to
signal this to the ARM11 core any more. The VFP11 will then set the
FPEXC.EX bit and store the trapped opcode in FPINST. (In some cases,
a second opcode might have been accepted by the VFP11 before the
exception was detected and could be reported to the ARM11 - in this
case, the VFP11 also sets FPEXC.FP2V and stores the second opcode in
FPINST2.)
If FPEXC.EX is set, the VFP11 will "bounce" the next FPU opcode issued
by the ARM11 CPU, which will be seen by the ARM11 as an undefined opcode
trap. The VFP support code examines the FPEXC.EX and FPEXC.FP2V bits
to decide what actions to take, i.e., whether to emulate the opcodes
found in FPINST and FPINST2, and whether to retry the bounced instruction.
If a user space application has left the VFP11 in this "pending trap"
state, the next FPU opcode issued to the VFP11 might actually be the
VSTMIA operation vfp_save_state() uses to store the FPU registers
to memory (in our test cases, when building the signal stack frame).
In this case, the kernel crashes as described above.
This patch fixes the problem by making sure that vfp_save_state() is
always entered with FPEXC.EX cleared. (The current value of FPEXC has
already been saved, so this does not corrupt the context. Clearing
FPEXC.EX has no effects on FPINST or FPINST2. Also note that many
callers already modify FPEXC by setting FPEXC.EN before invoking
vfp_save_state().)
This patch also addresses a second problem related to FPEXC.EX: After
returning from signal handling, the kernel reloads the VFP context
from the user mode stack. However, the current code explicitly clears
both FPEXC.EX and FPEXC.FP2V during reload. As VFP11 requires these
bits to be preserved, this patch disables clearing them for VFP
implementations belonging to architecture 1. There should be no
negative side effects: the user can set both bits by executing FPU
opcodes anyway, and while user code may now place arbitrary values
into FPINST and FPINST2 (e.g., non-VFP ARM opcodes) the VFP support
code knows which instructions can be emulated, and rejects other
opcodes with "unhandled bounce" messages, so there should be no
security impact from allowing reloading FPEXC.EX and FPEXC.FP2V.
Signed-off-by: Christopher Alexander Tobias Schulze <cat.schulze@alice-dsl.net>
---
arch/arm/vfp/vfpmodule.c | 25 +++++++++++++++++++------
1 file changed, 19 insertions(+), 6 deletions(-)
diff --git a/arch/arm/vfp/vfpmodule.c b/arch/arm/vfp/vfpmodule.c
index 7e8773a2d99d..a1ff693e49bf 100644
--- a/arch/arm/vfp/vfpmodule.c
+++ b/arch/arm/vfp/vfpmodule.c
@@ -176,8 +176,11 @@ static int vfp_notifier(struct notifier_block *self, unsigned long cmd, void *v)
* case the thread migrates to a different CPU. The
* restoring is done lazily.
*/
- if ((fpexc & FPEXC_EN) && vfp_current_hw_state[cpu])
+ if ((fpexc & FPEXC_EN) && vfp_current_hw_state[cpu]) {
+ /* vfp_save_state oopses on VFP11 if EX bit set */
+ fmxr(FPEXC, fpexc & ~FPEXC_EX);
vfp_save_state(vfp_current_hw_state[cpu], fpexc);
+ }
#endif
/*
@@ -451,13 +454,16 @@ static int vfp_pm_suspend(void)
/* if vfp is on, then save state for resumption */
if (fpexc & FPEXC_EN) {
pr_debug("%s: saving vfp state\n", __func__);
+ /* vfp_save_state oopses on VFP11 if EX bit set */
+ fmxr(FPEXC, fpexc & ~FPEXC_EX);
vfp_save_state(&ti->vfpstate, fpexc);
/* disable, just in case */
fmxr(FPEXC, fmrx(FPEXC) & ~FPEXC_EN);
} else if (vfp_current_hw_state[ti->cpu]) {
#ifndef CONFIG_SMP
- fmxr(FPEXC, fpexc | FPEXC_EN);
+ /* vfp_save_state oopses on VFP11 if EX bit set */
+ fmxr(FPEXC, (fpexc & ~FPEXC_EX) | FPEXC_EN);
vfp_save_state(vfp_current_hw_state[ti->cpu], fpexc);
fmxr(FPEXC, fpexc);
#endif
@@ -522,7 +528,8 @@ void vfp_sync_hwstate(struct thread_info *thread)
/*
* Save the last VFP state on this CPU.
*/
- fmxr(FPEXC, fpexc | FPEXC_EN);
+ /* vfp_save_state oopses on VFP11 if EX bit set */
+ fmxr(FPEXC, (fpexc & ~FPEXC_EX) | FPEXC_EN);
vfp_save_state(&thread->vfpstate, fpexc | FPEXC_EN);
fmxr(FPEXC, fpexc);
}
@@ -589,6 +596,7 @@ int vfp_restore_user_hwstate(struct user_vfp *ufp, struct user_vfp_exc *ufp_exc)
struct thread_info *thread = current_thread_info();
struct vfp_hard_struct *hwstate = &thread->vfpstate.hard;
unsigned long fpexc;
+ u32 fpsid = fmrx(FPSID);
/* Disable VFP to avoid corrupting the new thread state. */
vfp_flush_hwstate(thread);
@@ -611,8 +619,12 @@ int vfp_restore_user_hwstate(struct user_vfp *ufp, struct user_vfp_exc *ufp_exc)
/* Ensure the VFP is enabled. */
fpexc |= FPEXC_EN;
- /* Ensure FPINST2 is invalid and the exception flag is cleared. */
- fpexc &= ~(FPEXC_EX | FPEXC_FP2V);
+ /* Mask FPXEC_EX and FPEXC_FP2V if not required by VFP arch */
+ if ((fpsid & FPSID_ARCH_MASK) != (1 << FPSID_ARCH_BIT)) {
+ /* Ensure FPINST2 is invalid and the exception flag is cleared. */
+ fpexc &= ~(FPEXC_EX | FPEXC_FP2V);
+ }
+
hwstate->fpexc = fpexc;
hwstate->fpinst = ufp_exc->fpinst;
@@ -830,7 +842,8 @@ void kernel_neon_begin(void)
cpu = __smp_processor_id();
fpexc = fmrx(FPEXC) | FPEXC_EN;
- fmxr(FPEXC, fpexc);
+ /* vfp_save_state oopses on VFP11 if EX bit set */
+ fmxr(FPEXC, fpexc & ~FPEXC_EX);
/*
* Save the userland NEON/VFP state. Under UP,
--
2.44.0

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@ -1,194 +0,0 @@
From 2af7f34c83c900d8bff6a9e4de6d9e33c7997606 Mon Sep 17 00:00:00 2001
From: =?UTF-8?q?Noralf=20Tr=C3=B8nnes?= <noralf@tronnes.org>
Date: Tue, 1 Nov 2016 15:15:41 +0100
Subject: [PATCH 0079/1002] i2c: bcm2835: Add debug support
MIME-Version: 1.0
Content-Type: text/plain; charset=UTF-8
Content-Transfer-Encoding: 8bit
This adds a debug module parameter to aid in debugging transfer issues
by printing info to the kernel log. When enabled, status values are
collected in the interrupt routine and msg info in
bcm2835_i2c_start_transfer(). This is done in a way that tries to avoid
affecting timing. Having printk in the isr can mask issues.
debug values (additive):
1: Print info on error
2: Print info on all transfers
3: Print messages before transfer is started
The value can be changed at runtime:
/sys/module/i2c_bcm2835/parameters/debug
Example output, debug=3:
[ 747.114448] bcm2835_i2c_xfer: msg(1/2) write addr=0x54, len=2 flags= [i2c1]
[ 747.114463] bcm2835_i2c_xfer: msg(2/2) read addr=0x54, len=32 flags= [i2c1]
[ 747.117809] start_transfer: msg(1/2) write addr=0x54, len=2 flags= [i2c1]
[ 747.117825] isr: remain=2, status=0x30000055 : TA TXW TXD TXE [i2c1]
[ 747.117839] start_transfer: msg(2/2) read addr=0x54, len=32 flags= [i2c1]
[ 747.117849] isr: remain=32, status=0xd0000039 : TA RXR TXD RXD [i2c1]
[ 747.117861] isr: remain=20, status=0xd0000039 : TA RXR TXD RXD [i2c1]
[ 747.117870] isr: remain=8, status=0x32 : DONE TXD RXD [i2c1]
Signed-off-by: Noralf Trønnes <noralf@tronnes.org>
---
drivers/i2c/busses/i2c-bcm2835.c | 99 +++++++++++++++++++++++++++++++-
1 file changed, 98 insertions(+), 1 deletion(-)
diff --git a/drivers/i2c/busses/i2c-bcm2835.c b/drivers/i2c/busses/i2c-bcm2835.c
index b92de1944221..a9014cd1d2ad 100644
--- a/drivers/i2c/busses/i2c-bcm2835.c
+++ b/drivers/i2c/busses/i2c-bcm2835.c
@@ -56,6 +56,18 @@
#define BCM2835_I2C_CDIV_MIN 0x0002
#define BCM2835_I2C_CDIV_MAX 0xFFFE
+static unsigned int debug;
+module_param(debug, uint, 0644);
+MODULE_PARM_DESC(debug, "1=err, 2=isr, 3=xfer");
+
+#define BCM2835_DEBUG_MAX 512
+struct bcm2835_debug {
+ struct i2c_msg *msg;
+ int msg_idx;
+ size_t remain;
+ u32 status;
+};
+
struct bcm2835_i2c_dev {
struct device *dev;
void __iomem *regs;
@@ -68,8 +80,78 @@ struct bcm2835_i2c_dev {
u32 msg_err;
u8 *msg_buf;
size_t msg_buf_remaining;
+ struct bcm2835_debug debug[BCM2835_DEBUG_MAX];
+ unsigned int debug_num;
+ unsigned int debug_num_msgs;
};
+static inline void bcm2835_debug_add(struct bcm2835_i2c_dev *i2c_dev, u32 s)
+{
+ if (!i2c_dev->debug_num_msgs || i2c_dev->debug_num >= BCM2835_DEBUG_MAX)
+ return;
+
+ i2c_dev->debug[i2c_dev->debug_num].msg = i2c_dev->curr_msg;
+ i2c_dev->debug[i2c_dev->debug_num].msg_idx =
+ i2c_dev->debug_num_msgs - i2c_dev->num_msgs;
+ i2c_dev->debug[i2c_dev->debug_num].remain = i2c_dev->msg_buf_remaining;
+ i2c_dev->debug[i2c_dev->debug_num].status = s;
+ i2c_dev->debug_num++;
+}
+
+static void bcm2835_debug_print_status(struct bcm2835_i2c_dev *i2c_dev,
+ struct bcm2835_debug *d)
+{
+ u32 s = d->status;
+
+ pr_info("isr: remain=%zu, status=0x%x : %s%s%s%s%s%s%s%s%s%s [i2c%d]\n",
+ d->remain, s,
+ s & BCM2835_I2C_S_TA ? "TA " : "",
+ s & BCM2835_I2C_S_DONE ? "DONE " : "",
+ s & BCM2835_I2C_S_TXW ? "TXW " : "",
+ s & BCM2835_I2C_S_RXR ? "RXR " : "",
+ s & BCM2835_I2C_S_TXD ? "TXD " : "",
+ s & BCM2835_I2C_S_RXD ? "RXD " : "",
+ s & BCM2835_I2C_S_TXE ? "TXE " : "",
+ s & BCM2835_I2C_S_RXF ? "RXF " : "",
+ s & BCM2835_I2C_S_ERR ? "ERR " : "",
+ s & BCM2835_I2C_S_CLKT ? "CLKT " : "",
+ i2c_dev->adapter.nr);
+}
+
+static void bcm2835_debug_print_msg(struct bcm2835_i2c_dev *i2c_dev,
+ struct i2c_msg *msg, int i, int total,
+ const char *fname)
+{
+ pr_info("%s: msg(%d/%d) %s addr=0x%02x, len=%u flags=%s%s%s%s%s%s%s [i2c%d]\n",
+ fname, i, total,
+ msg->flags & I2C_M_RD ? "read" : "write", msg->addr, msg->len,
+ msg->flags & I2C_M_TEN ? "TEN" : "",
+ msg->flags & I2C_M_RECV_LEN ? "RECV_LEN" : "",
+ msg->flags & I2C_M_NO_RD_ACK ? "NO_RD_ACK" : "",
+ msg->flags & I2C_M_IGNORE_NAK ? "IGNORE_NAK" : "",
+ msg->flags & I2C_M_REV_DIR_ADDR ? "REV_DIR_ADDR" : "",
+ msg->flags & I2C_M_NOSTART ? "NOSTART" : "",
+ msg->flags & I2C_M_STOP ? "STOP" : "",
+ i2c_dev->adapter.nr);
+}
+
+static void bcm2835_debug_print(struct bcm2835_i2c_dev *i2c_dev)
+{
+ struct bcm2835_debug *d;
+ unsigned int i;
+
+ for (i = 0; i < i2c_dev->debug_num; i++) {
+ d = &i2c_dev->debug[i];
+ if (d->status == ~0)
+ bcm2835_debug_print_msg(i2c_dev, d->msg, d->msg_idx,
+ i2c_dev->debug_num_msgs, "start_transfer");
+ else
+ bcm2835_debug_print_status(i2c_dev, d);
+ }
+ if (i2c_dev->debug_num >= BCM2835_DEBUG_MAX)
+ pr_info("BCM2835_DEBUG_MAX reached\n");
+}
+
static inline void bcm2835_i2c_writel(struct bcm2835_i2c_dev *i2c_dev,
u32 reg, u32 val)
{
@@ -257,6 +339,7 @@ static void bcm2835_i2c_start_transfer(struct bcm2835_i2c_dev *i2c_dev)
bcm2835_i2c_writel(i2c_dev, BCM2835_I2C_A, msg->addr);
bcm2835_i2c_writel(i2c_dev, BCM2835_I2C_DLEN, msg->len);
bcm2835_i2c_writel(i2c_dev, BCM2835_I2C_C, c);
+ bcm2835_debug_add(i2c_dev, ~0);
}
static void bcm2835_i2c_finish_transfer(struct bcm2835_i2c_dev *i2c_dev)
@@ -283,6 +366,7 @@ static irqreturn_t bcm2835_i2c_isr(int this_irq, void *data)
u32 val, err;
val = bcm2835_i2c_readl(i2c_dev, BCM2835_I2C_S);
+ bcm2835_debug_add(i2c_dev, val);
err = val & (BCM2835_I2C_S_CLKT | BCM2835_I2C_S_ERR);
if (err) {
@@ -349,6 +433,13 @@ static int bcm2835_i2c_xfer(struct i2c_adapter *adap, struct i2c_msg msgs[],
unsigned long time_left;
int i;
+ if (debug)
+ i2c_dev->debug_num_msgs = num;
+
+ if (debug > 2)
+ for (i = 0; i < num; i++)
+ bcm2835_debug_print_msg(i2c_dev, &msgs[i], i + 1, num, __func__);
+
for (i = 0; i < (num - 1); i++)
if (msgs[i].flags & I2C_M_RD) {
dev_warn_once(i2c_dev->dev,
@@ -367,6 +458,10 @@ static int bcm2835_i2c_xfer(struct i2c_adapter *adap, struct i2c_msg msgs[],
bcm2835_i2c_finish_transfer(i2c_dev);
+ if (debug > 1 || (debug && (!time_left || i2c_dev->msg_err)))
+ bcm2835_debug_print(i2c_dev);
+ i2c_dev->debug_num_msgs = 0;
+ i2c_dev->debug_num = 0;
if (!time_left) {
bcm2835_i2c_writel(i2c_dev, BCM2835_I2C_C,
BCM2835_I2C_C_CLEAR);
@@ -377,7 +472,9 @@ static int bcm2835_i2c_xfer(struct i2c_adapter *adap, struct i2c_msg msgs[],
if (!i2c_dev->msg_err)
return num;
- dev_dbg(i2c_dev->dev, "i2c transfer failed: %x\n", i2c_dev->msg_err);
+ if (debug)
+ dev_err(i2c_dev->dev, "i2c transfer failed: %x\n",
+ i2c_dev->msg_err);
if (i2c_dev->msg_err & BCM2835_I2C_S_ERR)
return -EREMOTEIO;
--
2.44.0

View file

@ -1,119 +0,0 @@
From e894a9f9bfde9ec7d49d81ab167180843d4d612e Mon Sep 17 00:00:00 2001
From: Phil Elwell <phil@raspberrypi.org>
Date: Tue, 23 Jan 2018 16:52:45 +0000
Subject: [PATCH 0080/1002] irqchip: irq-bcm2836: Remove regmap and syscon use
The syscon node defines a register range that duplicates that used by
the local_intc node on bcm2836/7. Since irq-bcm2835 and irq-bcm2836 are
built in and always present together (both drivers are enabled by
CONFIG_ARCH_BCM2835), it is possible to replace the syscon usage with a
global variable that simplifies the code. Doing so does lose the
locking provided by regmap, but as only one side is using the regmap
interface (irq-bcm2835 uses readl and write) there is no loss of
atomicity.
See: https://github.com/raspberrypi/firmware/issues/926
Signed-off-by: Phil Elwell <phil@raspberrypi.org>
---
drivers/irqchip/irq-bcm2835.c | 32 ++++++++++++--------------------
drivers/irqchip/irq-bcm2836.c | 5 +++++
2 files changed, 17 insertions(+), 20 deletions(-)
diff --git a/drivers/irqchip/irq-bcm2835.c b/drivers/irqchip/irq-bcm2835.c
index 71994904a3c7..6fa9234da089 100644
--- a/drivers/irqchip/irq-bcm2835.c
+++ b/drivers/irqchip/irq-bcm2835.c
@@ -41,8 +41,6 @@
#include <linux/of_irq.h>
#include <linux/irqchip.h>
#include <linux/irqdomain.h>
-#include <linux/mfd/syscon.h>
-#include <linux/regmap.h>
#include <asm/exception.h>
#include <asm/mach/irq.h>
@@ -92,7 +90,7 @@ struct armctrl_ic {
void __iomem *enable[NR_BANKS];
void __iomem *disable[NR_BANKS];
struct irq_domain *domain;
- struct regmap *local_regmap;
+ void __iomem *local_base;
};
static struct armctrl_ic intc __read_mostly;
@@ -129,24 +127,20 @@ static void armctrl_unmask_irq(struct irq_data *d)
if (d->hwirq >= NUMBER_IRQS) {
if (num_online_cpus() > 1) {
unsigned int data;
- int ret;
- if (!intc.local_regmap) {
- pr_err("FIQ is disabled due to missing regmap\n");
+ if (!intc.local_base) {
+ pr_err("FIQ is disabled due to missing arm_local_intc\n");
return;
}
- ret = regmap_read(intc.local_regmap,
- ARM_LOCAL_GPU_INT_ROUTING, &data);
- if (ret) {
- pr_err("Failed to read int routing %d\n", ret);
- return;
- }
+ data = readl_relaxed(intc.local_base +
+ ARM_LOCAL_GPU_INT_ROUTING);
data &= ~0xc;
data |= (1 << 2);
- regmap_write(intc.local_regmap,
- ARM_LOCAL_GPU_INT_ROUTING, data);
+ writel_relaxed(data,
+ intc.local_base +
+ ARM_LOCAL_GPU_INT_ROUTING);
}
writel_relaxed(REG_FIQ_ENABLE | hwirq_to_fiq(d->hwirq),
@@ -246,12 +240,10 @@ static int __init armctrl_of_init(struct device_node *node,
}
if (is_2836) {
- intc.local_regmap =
- syscon_regmap_lookup_by_compatible("brcm,bcm2836-arm-local");
- if (IS_ERR(intc.local_regmap)) {
- pr_err("Failed to get local register map. FIQ is disabled for cpus > 1\n");
- intc.local_regmap = NULL;
- }
+ extern void __iomem * __attribute__((weak)) arm_local_intc;
+ intc.local_base = arm_local_intc;
+ if (!intc.local_base)
+ pr_err("Failed to get local intc base. FIQ is disabled for cpus > 1\n");
}
/* Make a duplicate irq range which is used to enable FIQ */
diff --git a/drivers/irqchip/irq-bcm2836.c b/drivers/irqchip/irq-bcm2836.c
index 88734748c7ef..8c7ffc39b282 100644
--- a/drivers/irqchip/irq-bcm2836.c
+++ b/drivers/irqchip/irq-bcm2836.c
@@ -22,6 +22,9 @@ struct bcm2836_arm_irqchip_intc {
static struct bcm2836_arm_irqchip_intc intc __read_mostly;
+void __iomem *arm_local_intc;
+EXPORT_SYMBOL_GPL(arm_local_intc);
+
static void bcm2836_arm_irqchip_mask_per_cpu_irq(unsigned int reg_offset,
unsigned int bit,
int cpu)
@@ -320,6 +323,8 @@ static int __init bcm2836_arm_irqchip_l1_intc_of_init(struct device_node *node,
panic("%pOF: unable to map local interrupt registers\n", node);
}
+ arm_local_intc = intc.base;
+
bcm2835_init_local_timer_frequency();
intc.domain = irq_domain_add_linear(node, LAST_IRQ + 1,
--
2.44.0

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@ -1,54 +0,0 @@
From 0c12fba01d3baf5040f6863eff793f1050220435 Mon Sep 17 00:00:00 2001
From: Phil Elwell <phil@raspberrypi.org>
Date: Tue, 17 Oct 2017 15:04:29 +0100
Subject: [PATCH 0081/1002] lan78xx: Enable LEDs and auto-negotiation
For applications of the LAN78xx that don't have valid programmed
EEPROMs or OTPs, enabling both LEDs and auto-negotiation by default
seems reasonable.
Signed-off-by: Phil Elwell <phil@raspberrypi.org>
---
drivers/net/usb/lan78xx.c | 12 ++++++++++++
1 file changed, 12 insertions(+)
diff --git a/drivers/net/usb/lan78xx.c b/drivers/net/usb/lan78xx.c
index 59cde06aa7f6..9e01171261a4 100644
--- a/drivers/net/usb/lan78xx.c
+++ b/drivers/net/usb/lan78xx.c
@@ -2881,6 +2881,11 @@ static int lan78xx_reset(struct lan78xx_net *dev)
int ret;
u32 buf;
u8 sig;
+ bool has_eeprom;
+ bool has_otp;
+
+ has_eeprom = !lan78xx_read_eeprom(dev, 0, 0, NULL);
+ has_otp = !lan78xx_read_otp(dev, 0, 0, NULL);
ret = lan78xx_read_reg(dev, HW_CFG, &buf);
if (ret < 0)
@@ -2945,6 +2950,10 @@ static int lan78xx_reset(struct lan78xx_net *dev)
buf |= HW_CFG_MEF_;
+ /* If no valid EEPROM and no valid OTP, enable the LEDs by default */
+ if (!has_eeprom && !has_otp)
+ buf |= HW_CFG_LED0_EN_ | HW_CFG_LED1_EN_;
+
ret = lan78xx_write_reg(dev, HW_CFG, buf);
if (ret < 0)
return ret;
@@ -3043,6 +3052,9 @@ static int lan78xx_reset(struct lan78xx_net *dev)
buf |= MAC_CR_AUTO_DUPLEX_ | MAC_CR_AUTO_SPEED_;
}
}
+ /* If no valid EEPROM and no valid OTP, enable AUTO negotiation */
+ if (!has_eeprom && !has_otp)
+ buf |= MAC_CR_AUTO_DUPLEX_ | MAC_CR_AUTO_SPEED_;
ret = lan78xx_write_reg(dev, MAC_CR, buf);
if (ret < 0)
return ret;
--
2.44.0

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@ -1,32 +0,0 @@
From 6424aad28c75df704981eb497e8c57379523e929 Mon Sep 17 00:00:00 2001
From: Phil Elwell <phil@raspberrypi.org>
Date: Fri, 29 Sep 2017 10:32:19 +0100
Subject: [PATCH 0082/1002] amba_pl011: Insert mb() for correct FIFO handling
The pl011 register accessor functions use the _relaxed versions of the
standard readl() and writel() functions, meaning that there are no
automatic memory barriers. When polling a FIFO status register to check
for fullness, it is necessary to ensure that any outstanding writes have
completed; otherwise the flags are effectively stale, making it possible
that the next write is to a full FIFO.
Signed-off-by: Phil Elwell <phil@raspberrypi.org>
---
drivers/tty/serial/amba-pl011.c | 1 +
1 file changed, 1 insertion(+)
diff --git a/drivers/tty/serial/amba-pl011.c b/drivers/tty/serial/amba-pl011.c
index 362bbcdece0d..c91299959608 100644
--- a/drivers/tty/serial/amba-pl011.c
+++ b/drivers/tty/serial/amba-pl011.c
@@ -1456,6 +1456,7 @@ static bool pl011_tx_char(struct uart_amba_port *uap, unsigned char c,
return false; /* unable to transmit character */
pl011_write(c, uap, REG_DR);
+ mb();
uap->port.icount.tx++;
return true;
--
2.44.0

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@ -1,57 +0,0 @@
From 8541a70fd40ad2612f1a5471206726dea4e8b8c1 Mon Sep 17 00:00:00 2001
From: Phil Elwell <phil@raspberrypi.org>
Date: Fri, 29 Sep 2017 10:32:19 +0100
Subject: [PATCH 0083/1002] amba_pl011: Add cts-event-workaround DT property
The BCM2835 PL011 implementation seems to have a bug that can lead to a
transmission lockup if CTS changes frequently. A workaround was added to
the driver with a vendor-specific flag to enable it, but this flag is
currently not set for ARM implementations.
Add a "cts-event-workaround" property to Pi DTBs and use the presence
of that property to force the flag to be enabled in the driver.
See: https://github.com/raspberrypi/linux/issues/1280
Signed-off-by: Phil Elwell <phil@raspberrypi.org>
---
Documentation/devicetree/bindings/serial/pl011.yaml | 6 ++++++
drivers/tty/serial/amba-pl011.c | 5 +++++
2 files changed, 11 insertions(+)
diff --git a/Documentation/devicetree/bindings/serial/pl011.yaml b/Documentation/devicetree/bindings/serial/pl011.yaml
index 9571041030b7..f34e2f66d1a3 100644
--- a/Documentation/devicetree/bindings/serial/pl011.yaml
+++ b/Documentation/devicetree/bindings/serial/pl011.yaml
@@ -101,6 +101,12 @@ properties:
on the device.
enum: [1, 4]
+ cts-event-workaround:
+ description:
+ Enables the (otherwise vendor-specific) workaround for the
+ CTS-induced TX lockup.
+ type: boolean
+
required:
- compatible
- reg
diff --git a/drivers/tty/serial/amba-pl011.c b/drivers/tty/serial/amba-pl011.c
index c91299959608..0e69d30e10bb 100644
--- a/drivers/tty/serial/amba-pl011.c
+++ b/drivers/tty/serial/amba-pl011.c
@@ -2808,6 +2808,11 @@ static int pl011_probe(struct amba_device *dev, const struct amba_id *id)
if (IS_ERR(uap->clk))
return PTR_ERR(uap->clk);
+ if (of_property_read_bool(dev->dev.of_node, "cts-event-workaround")) {
+ vendor->cts_event_workaround = true;
+ dev_info(&dev->dev, "cts_event_workaround enabled\n");
+ }
+
uap->reg_offset = vendor->reg_offset;
uap->vendor = vendor;
uap->fifosize = vendor->get_fifosize(dev);
--
2.44.0

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@ -1,47 +0,0 @@
From 0c426d88e4a420dc025ee1cbfbd0ca4e56665f1a Mon Sep 17 00:00:00 2001
From: Phil Elwell <phil@raspberrypi.org>
Date: Wed, 29 Jan 2020 09:35:19 +0000
Subject: [PATCH 0084/1002] tty: amba-pl011: Avoid rare write-when-full error
Under some circumstances on BCM283x processors data loss can be
observed - a single byte missing from the TX output stream. These bytes
are always the last byte of a batch of 8 written from pl011_tx_chars
when from_irq is true, meaning that the FIFO full flag is not checked
before writing.
The transmit optimisation relies on the FIFO being half-empty when the
TX interrupt is raised. Instrumenting the driver further showed that
the failure case correlated with the TX FIFO full flag being set at the
point where the last byte was written to the data register, which
explains the data loss but not how the FIFO appeared to be prematurely
full. A possible explanation is that a FIFO write was in flight at the
time the interrupt was raised, but as yet there is no hypothesis as to
how this might occur.
In the absence of a clear understanding of the failure mechanism, avoid
the problem by checking the FIFO levels before writing the last byte of
the group, which will have minimal performance impact.
Signed-off-by: Phil Elwell <phil@raspberrypi.org>
---
drivers/tty/serial/amba-pl011.c | 4 ++++
1 file changed, 4 insertions(+)
diff --git a/drivers/tty/serial/amba-pl011.c b/drivers/tty/serial/amba-pl011.c
index 0e69d30e10bb..2c1b7e7b70df 100644
--- a/drivers/tty/serial/amba-pl011.c
+++ b/drivers/tty/serial/amba-pl011.c
@@ -1487,6 +1487,10 @@ static bool pl011_tx_chars(struct uart_amba_port *uap, bool from_irq)
if (likely(from_irq) && count-- == 0)
break;
+ if (likely(from_irq) && count == 0 &&
+ pl011_read(uap, REG_FR) & UART01x_FR_TXFF)
+ break;
+
if (!pl011_tx_char(uap, xmit->buf[xmit->tail], from_irq))
break;
--
2.44.0

View file

@ -1,45 +0,0 @@
From 641d4326a40ceb945647ba3daff5fb2cf5360993 Mon Sep 17 00:00:00 2001
From: notro <notro@tronnes.org>
Date: Thu, 10 Jul 2014 13:59:47 +0200
Subject: [PATCH 0085/1002] pinctrl-bcm2835: Set base to 0 give expected gpio
numbering
Signed-off-by: Noralf Tronnes <notro@tronnes.org>
SQUASH: pinctrl: bcm2835: Set base for bcm2711 GPIO to 0
Without this patch GPIOs don't seem to work properly, primarily
noticeable as broken LEDs.
Squash with "pinctrl-bcm2835: Set base to 0 give expected gpio numbering"
Signed-off-by: Phil Elwell <phil@raspberrypi.com>
---
drivers/pinctrl/bcm/pinctrl-bcm2835.c | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/drivers/pinctrl/bcm/pinctrl-bcm2835.c b/drivers/pinctrl/bcm/pinctrl-bcm2835.c
index 1489191a213f..78d04b37d905 100644
--- a/drivers/pinctrl/bcm/pinctrl-bcm2835.c
+++ b/drivers/pinctrl/bcm/pinctrl-bcm2835.c
@@ -391,7 +391,7 @@ static const struct gpio_chip bcm2835_gpio_chip = {
.get = bcm2835_gpio_get,
.set = bcm2835_gpio_set,
.set_config = gpiochip_generic_config,
- .base = -1,
+ .base = 0,
.ngpio = BCM2835_NUM_GPIOS,
.can_sleep = false,
.add_pin_ranges = bcm2835_add_pin_ranges_fallback,
@@ -408,7 +408,7 @@ static const struct gpio_chip bcm2711_gpio_chip = {
.get = bcm2835_gpio_get,
.set = bcm2835_gpio_set,
.set_config = gpiochip_generic_config,
- .base = -1,
+ .base = 0,
.ngpio = BCM2711_NUM_GPIOS,
.can_sleep = false,
.add_pin_ranges = bcm2835_add_pin_ranges_fallback,
--
2.44.0

View file

@ -1,161 +0,0 @@
From 468129d64e78a1415f2fa40946103bbd24a2e367 Mon Sep 17 00:00:00 2001
From: popcornmix <popcornmix@gmail.com>
Date: Sun, 12 May 2013 12:24:19 +0100
Subject: [PATCH 0086/1002] Main bcm2708/bcm2709 linux port
MIME-Version: 1.0
Content-Type: text/plain; charset=UTF-8
Content-Transfer-Encoding: 8bit
Signed-off-by: popcornmix <popcornmix@gmail.com>
Signed-off-by: Noralf Trønnes <noralf@tronnes.org>
bcm2709: Drop platform smp and timer init code
irq-bcm2836 handles this through these functions:
bcm2835_init_local_timer_frequency()
bcm2836_arm_irqchip_smp_init()
Signed-off-by: Noralf Trønnes <noralf@tronnes.org>
bcm270x: Use watchdog for reboot/poweroff
The watchdog driver already has support for reboot/poweroff.
Make use of this and remove the code from the platform files.
Signed-off-by: Noralf Trønnes <noralf@tronnes.org>
board_bcm2835: Remove coherent dma pool increase - API has gone
---
arch/arm/mach-bcm/Kconfig | 1 +
arch/arm/mm/proc-v6.S | 15 ++++++++++++---
drivers/irqchip/irq-bcm2835.c | 7 ++++++-
drivers/mailbox/bcm2835-mailbox.c | 18 ++++++++++++++++--
4 files changed, 35 insertions(+), 6 deletions(-)
diff --git a/arch/arm/mach-bcm/Kconfig b/arch/arm/mach-bcm/Kconfig
index 4b2000d9ad05..780704f29dd4 100644
--- a/arch/arm/mach-bcm/Kconfig
+++ b/arch/arm/mach-bcm/Kconfig
@@ -163,6 +163,7 @@ config ARCH_BCM2835
select PINCTRL
select PINCTRL_BCM2835
select MFD_CORE
+ select MFD_SYSCON if ARCH_MULTI_V7
help
This enables support for the Broadcom BCM2711 and BCM283x SoCs.
This SoC is used in the Raspberry Pi and Roku 2 devices.
diff --git a/arch/arm/mm/proc-v6.S b/arch/arm/mm/proc-v6.S
index 203dff89ab1a..9290ae13a5bb 100644
--- a/arch/arm/mm/proc-v6.S
+++ b/arch/arm/mm/proc-v6.S
@@ -72,10 +72,19 @@ ENDPROC(cpu_v6_reset)
*
* IRQs are already disabled.
*/
+
+/* See jira SW-5991 for details of this workaround */
ENTRY(cpu_v6_do_idle)
- mov r1, #0
- mcr p15, 0, r1, c7, c10, 4 @ DWB - WFI may enter a low-power mode
- mcr p15, 0, r1, c7, c0, 4 @ wait for interrupt
+ .align 5
+ mov r1, #2
+1: subs r1, #1
+ nop
+ mcreq p15, 0, r1, c7, c10, 4 @ DWB - WFI may enter a low-power mode
+ mcreq p15, 0, r1, c7, c0, 4 @ wait for interrupt
+ nop
+ nop
+ nop
+ bne 1b
ret lr
ENTRY(cpu_v6_dcache_clean_area)
diff --git a/drivers/irqchip/irq-bcm2835.c b/drivers/irqchip/irq-bcm2835.c
index 6fa9234da089..9abf6f101663 100644
--- a/drivers/irqchip/irq-bcm2835.c
+++ b/drivers/irqchip/irq-bcm2835.c
@@ -43,7 +43,9 @@
#include <linux/irqdomain.h>
#include <asm/exception.h>
+#ifndef CONFIG_ARM64
#include <asm/mach/irq.h>
+#endif
/* Put the bank and irq (32 bits) into the hwirq */
#define MAKE_HWIRQ(b, n) (((b) << 5) | (n))
@@ -72,6 +74,7 @@
#define NR_BANKS 3
#define IRQS_PER_BANK 32
#define NUMBER_IRQS MAKE_HWIRQ(NR_BANKS, 0)
+#undef FIQ_START
#define FIQ_START (NR_IRQS_BANK0 + MAKE_HWIRQ(NR_BANKS - 1, 0))
static const int reg_pending[] __initconst = { 0x00, 0x04, 0x08 };
@@ -253,10 +256,12 @@ static int __init armctrl_of_init(struct device_node *node,
MAKE_HWIRQ(b, i) + NUMBER_IRQS);
BUG_ON(irq <= 0);
irq_set_chip(irq, &armctrl_chip);
- set_irq_flags(irq, IRQF_VALID | IRQF_PROBE);
+ irq_set_probe(irq);
}
}
+#ifndef CONFIG_ARM64
init_FIQ(FIQ_START);
+#endif
return 0;
}
diff --git a/drivers/mailbox/bcm2835-mailbox.c b/drivers/mailbox/bcm2835-mailbox.c
index fbfd0202047c..7e0d62fbc83e 100644
--- a/drivers/mailbox/bcm2835-mailbox.c
+++ b/drivers/mailbox/bcm2835-mailbox.c
@@ -45,12 +45,15 @@
#define MAIL1_WRT (ARM_0_MAIL1 + 0x00)
#define MAIL1_STA (ARM_0_MAIL1 + 0x18)
+/* On ARCH_BCM270x these come through <linux/interrupt.h> (arm_control.h ) */
+#ifndef ARM_MS_FULL
/* Status register: FIFO state. */
#define ARM_MS_FULL BIT(31)
#define ARM_MS_EMPTY BIT(30)
/* Configuration register: Enable interrupts. */
#define ARM_MC_IHAVEDATAIRQEN BIT(0)
+#endif
struct bcm2835_mbox {
void __iomem *regs;
@@ -144,7 +147,7 @@ static int bcm2835_mbox_probe(struct platform_device *pdev)
return -ENOMEM;
spin_lock_init(&mbox->lock);
- ret = devm_request_irq(dev, irq_of_parse_and_map(dev->of_node, 0),
+ ret = devm_request_irq(dev, platform_get_irq(pdev, 0),
bcm2835_mbox_irq, 0, dev_name(dev), mbox);
if (ret) {
dev_err(dev, "Failed to register a mailbox IRQ handler: %d\n",
@@ -192,7 +195,18 @@ static struct platform_driver bcm2835_mbox_driver = {
},
.probe = bcm2835_mbox_probe,
};
-module_platform_driver(bcm2835_mbox_driver);
+
+static int __init bcm2835_mbox_init(void)
+{
+ return platform_driver_register(&bcm2835_mbox_driver);
+}
+arch_initcall(bcm2835_mbox_init);
+
+static void __init bcm2835_mbox_exit(void)
+{
+ platform_driver_unregister(&bcm2835_mbox_driver);
+}
+module_exit(bcm2835_mbox_exit);
MODULE_AUTHOR("Lubomir Rintel <lkundrak@v3.sk>");
MODULE_DESCRIPTION("BCM2835 mailbox IPC driver");
--
2.44.0

View file

@ -1,782 +0,0 @@
From 63fb0fcc095dcca2e3f8d801b3a8d48bee343e81 Mon Sep 17 00:00:00 2001
From: James Hughes <james.hughes@raspberrypi.org>
Date: Thu, 14 Mar 2019 13:27:54 +0000
Subject: [PATCH 0089/1002] Pulled in the multi frame buffer support from the
Pi3 repo
---
drivers/video/fbdev/bcm2708_fb.c | 457 ++++++++++++++++++++++---------
1 file changed, 324 insertions(+), 133 deletions(-)
diff --git a/drivers/video/fbdev/bcm2708_fb.c b/drivers/video/fbdev/bcm2708_fb.c
index 55c3d62d9a46..16b355e08d72 100644
--- a/drivers/video/fbdev/bcm2708_fb.c
+++ b/drivers/video/fbdev/bcm2708_fb.c
@@ -2,6 +2,7 @@
* linux/drivers/video/bcm2708_fb.c
*
* Copyright (C) 2010 Broadcom
+ * Copyright (C) 2018 Raspberry Pi (Trading) Ltd
*
* This file is subject to the terms and conditions of the GNU General Public
* License. See the file COPYING in the main directory of this archive
@@ -13,6 +14,7 @@
* Copyright 1999-2001 Jeff Garzik <jgarzik@pobox.com>
*
*/
+
#include <linux/module.h>
#include <linux/kernel.h>
#include <linux/errno.h>
@@ -33,6 +35,7 @@
#include <linux/io.h>
#include <linux/dma-mapping.h>
#include <soc/bcm2835/raspberrypi-firmware.h>
+#include <linux/mutex.h>
//#define BCM2708_FB_DEBUG
#define MODULE_NAME "bcm2708_fb"
@@ -79,64 +82,150 @@ struct bcm2708_fb_stats {
u32 dma_irqs;
};
+struct vc4_display_settings_t {
+ u32 display_num;
+ u32 width;
+ u32 height;
+ u32 depth;
+ u32 pitch;
+ u32 virtual_width;
+ u32 virtual_height;
+ u32 virtual_width_offset;
+ u32 virtual_height_offset;
+ unsigned long fb_bus_address;
+};
+
+struct bcm2708_fb_dev;
+
struct bcm2708_fb {
struct fb_info fb;
struct platform_device *dev;
- struct rpi_firmware *fw;
u32 cmap[16];
u32 gpu_cmap[256];
- int dma_chan;
- int dma_irq;
- void __iomem *dma_chan_base;
- void *cb_base; /* DMA control blocks */
- dma_addr_t cb_handle;
struct dentry *debugfs_dir;
- wait_queue_head_t dma_waitq;
- struct bcm2708_fb_stats stats;
+ struct dentry *debugfs_subdir;
unsigned long fb_bus_address;
- bool disable_arm_alloc;
+ struct { u32 base, length; } gpu;
+ struct vc4_display_settings_t display_settings;
+ struct debugfs_regset32 screeninfo_regset;
+ struct bcm2708_fb_dev *fbdev;
unsigned int image_size;
dma_addr_t dma_addr;
void *cpuaddr;
};
+#define MAX_FRAMEBUFFERS 3
+
+struct bcm2708_fb_dev {
+ int firmware_supports_multifb;
+ /* Protects the DMA system from multiple FB access */
+ struct mutex dma_mutex;
+ int dma_chan;
+ int dma_irq;
+ void __iomem *dma_chan_base;
+ wait_queue_head_t dma_waitq;
+ bool disable_arm_alloc;
+ struct bcm2708_fb_stats dma_stats;
+ void *cb_base; /* DMA control blocks */
+ dma_addr_t cb_handle;
+ int instance_count;
+ int num_displays;
+ struct rpi_firmware *fw;
+ struct bcm2708_fb displays[MAX_FRAMEBUFFERS];
+};
+
#define to_bcm2708(info) container_of(info, struct bcm2708_fb, fb)
static void bcm2708_fb_debugfs_deinit(struct bcm2708_fb *fb)
{
- debugfs_remove_recursive(fb->debugfs_dir);
- fb->debugfs_dir = NULL;
+ debugfs_remove_recursive(fb->debugfs_subdir);
+ fb->debugfs_subdir = NULL;
+
+ fb->fbdev->instance_count--;
+
+ if (!fb->fbdev->instance_count) {
+ debugfs_remove_recursive(fb->debugfs_dir);
+ fb->debugfs_dir = NULL;
+ }
}
static int bcm2708_fb_debugfs_init(struct bcm2708_fb *fb)
{
+ char buf[3];
+ struct bcm2708_fb_dev *fbdev = fb->fbdev;
+
static struct debugfs_reg32 stats_registers[] = {
- {
- "dma_copies",
- offsetof(struct bcm2708_fb_stats, dma_copies)
- },
- {
- "dma_irqs",
- offsetof(struct bcm2708_fb_stats, dma_irqs)
- },
+ {"dma_copies", offsetof(struct bcm2708_fb_stats, dma_copies)},
+ {"dma_irqs", offsetof(struct bcm2708_fb_stats, dma_irqs)},
+ };
+
+ static struct debugfs_reg32 screeninfo[] = {
+ {"width", offsetof(struct fb_var_screeninfo, xres)},
+ {"height", offsetof(struct fb_var_screeninfo, yres)},
+ {"bpp", offsetof(struct fb_var_screeninfo, bits_per_pixel)},
+ {"xres_virtual", offsetof(struct fb_var_screeninfo, xres_virtual)},
+ {"yres_virtual", offsetof(struct fb_var_screeninfo, yres_virtual)},
+ {"xoffset", offsetof(struct fb_var_screeninfo, xoffset)},
+ {"yoffset", offsetof(struct fb_var_screeninfo, yoffset)},
};
- fb->debugfs_dir = debugfs_create_dir(DRIVER_NAME, NULL);
+ fb->debugfs_dir = debugfs_lookup(DRIVER_NAME, NULL);
+
+ if (!fb->debugfs_dir)
+ fb->debugfs_dir = debugfs_create_dir(DRIVER_NAME, NULL);
+
if (!fb->debugfs_dir) {
- pr_warn("%s: could not create debugfs entry\n",
- __func__);
+ dev_warn(fb->fb.dev, "%s: could not create debugfs folder\n",
+ __func__);
return -EFAULT;
}
- fb->stats.regset.regs = stats_registers;
- fb->stats.regset.nregs = ARRAY_SIZE(stats_registers);
- fb->stats.regset.base = &fb->stats;
+ snprintf(buf, sizeof(buf), "%u", fb->display_settings.display_num);
+
+ fb->debugfs_subdir = debugfs_create_dir(buf, fb->debugfs_dir);
debugfs_create_regset32("stats", 0444, fb->debugfs_dir,
&fb->stats.regset);
+
+ if (!fb->debugfs_subdir) {
+ dev_warn(fb->fb.dev, "%s: could not create debugfs entry %u\n",
+ __func__, fb->display_settings.display_num);
+ return -EFAULT;
+ }
+
+ fbdev->dma_stats.regset.regs = stats_registers;
+ fbdev->dma_stats.regset.nregs = ARRAY_SIZE(stats_registers);
+ fbdev->dma_stats.regset.base = &fbdev->dma_stats;
+
+ debugfs_create_regset32("dma_stats", 0444, fb->debugfs_subdir,
+ &fbdev->dma_stats.regset);
+
+ fb->screeninfo_regset.regs = screeninfo;
+ fb->screeninfo_regset.nregs = ARRAY_SIZE(screeninfo);
+ fb->screeninfo_regset.base = &fb->fb.var;
+
+ debugfs_create_regset32("screeninfo", 0444, fb->debugfs_subdir,
+ &fb->screeninfo_regset);
+
+ fbdev->instance_count++;
+
return 0;
}
+static void set_display_num(struct bcm2708_fb *fb)
+{
+ if (fb && fb->fbdev && fb->fbdev->firmware_supports_multifb) {
+ u32 tmp = fb->display_settings.display_num;
+
+ if (rpi_firmware_property(fb->fbdev->fw,
+ RPI_FIRMWARE_FRAMEBUFFER_SET_DISPLAY_NUM,
+ &tmp,
+ sizeof(tmp)))
+ dev_warn_once(fb->fb.dev,
+ "Set display number call failed. Old GPU firmware?");
+ }
+}
+
static int bcm2708_fb_set_bitfields(struct fb_var_screeninfo *var)
{
int ret = 0;
@@ -214,11 +303,11 @@ static int bcm2708_fb_check_var(struct fb_var_screeninfo *var,
struct fb_info *info)
{
/* info input, var output */
- print_debug("%s(%p) %dx%d (%dx%d), %d, %d\n",
+ print_debug("%s(%p) %ux%u (%ux%u), %ul, %u\n",
__func__, info, info->var.xres, info->var.yres,
info->var.xres_virtual, info->var.yres_virtual,
- (int)info->screen_size, info->var.bits_per_pixel);
- print_debug("%s(%p) %dx%d (%dx%d), %d\n", __func__, var, var->xres,
+ info->screen_size, info->var.bits_per_pixel);
+ print_debug("%s(%p) %ux%u (%ux%u), %u\n", __func__, var, var->xres,
var->yres, var->xres_virtual, var->yres_virtual,
var->bits_per_pixel);
@@ -281,17 +370,24 @@ static int bcm2708_fb_set_par(struct fb_info *info)
};
int ret, image_size;
-
- print_debug("%s(%p) %dx%d (%dx%d), %d, %d\n", __func__, info,
+ print_debug("%s(%p) %dx%d (%dx%d), %d, %d (display %d)\n", __func__,
+ info,
info->var.xres, info->var.yres, info->var.xres_virtual,
info->var.yres_virtual, (int)info->screen_size,
- info->var.bits_per_pixel);
+ info->var.bits_per_pixel, value);
+
+ /* Need to set the display number to act on first
+ * Cannot do it in the tag list because on older firmware the call
+ * will fail and stop the rest of the list being executed.
+ * We can ignore this call failing as the default at other end is 0
+ */
+ set_display_num(fb);
/* Try allocating our own buffer. We can specify all the parameters */
image_size = ((info->var.xres * info->var.yres) *
info->var.bits_per_pixel) >> 3;
- if (!fb->disable_arm_alloc &&
+ if (!fb->fbdev->disable_arm_alloc &&
(image_size != fb->image_size || !fb->dma_addr)) {
if (fb->dma_addr) {
dma_free_coherent(info->device, fb->image_size,
@@ -306,7 +402,7 @@ static int bcm2708_fb_set_par(struct fb_info *info)
if (!fb->cpuaddr) {
fb->dma_addr = 0;
- fb->disable_arm_alloc = true;
+ fb->fbdev->disable_arm_alloc = true;
} else {
fb->image_size = image_size;
}
@@ -317,7 +413,7 @@ static int bcm2708_fb_set_par(struct fb_info *info)
fbinfo.screen_size = image_size;
fbinfo.pitch = (info->var.xres * info->var.bits_per_pixel) >> 3;
- ret = rpi_firmware_property_list(fb->fw, &fbinfo,
+ ret = rpi_firmware_property_list(fb->fbdev->fw, &fbinfo,
sizeof(fbinfo));
if (ret || fbinfo.base != fb->dma_addr) {
/* Firmware either failed, or assigned a different base
@@ -330,7 +426,7 @@ static int bcm2708_fb_set_par(struct fb_info *info)
fb->image_size = 0;
fb->cpuaddr = NULL;
fb->dma_addr = 0;
- fb->disable_arm_alloc = true;
+ fb->fbdev->disable_arm_alloc = true;
}
} else {
/* Our allocation failed - drop into the old scheme of
@@ -349,7 +445,7 @@ static int bcm2708_fb_set_par(struct fb_info *info)
fbinfo.tag6.tag = RPI_FIRMWARE_FRAMEBUFFER_GET_PITCH;
fbinfo.pitch = 0;
- ret = rpi_firmware_property_list(fb->fw, &fbinfo,
+ ret = rpi_firmware_property_list(fb->fbdev->fw, &fbinfo,
sizeof(fbinfo));
if (ret) {
dev_err(info->device,
@@ -439,7 +535,10 @@ static int bcm2708_fb_setcolreg(unsigned int regno, unsigned int red,
packet->length = regno + 1;
memcpy(packet->cmap, fb->gpu_cmap,
sizeof(packet->cmap));
- ret = rpi_firmware_property(fb->fw,
+
+ set_display_num(fb);
+
+ ret = rpi_firmware_property(fb->fbdev->fw,
RPI_FIRMWARE_FRAMEBUFFER_SET_PALETTE,
packet,
(2 + packet->length) * sizeof(u32));
@@ -478,8 +577,11 @@ static int bcm2708_fb_blank(int blank_mode, struct fb_info *info)
return -EINVAL;
}
- ret = rpi_firmware_property(fb->fw, RPI_FIRMWARE_FRAMEBUFFER_BLANK,
+ set_display_num(fb);
+
+ ret = rpi_firmware_property(fb->fbdev->fw, RPI_FIRMWARE_FRAMEBUFFER_BLANK,
&value, sizeof(value));
+
if (ret)
dev_err(info->device, "%s(%d) failed: %d\n", __func__,
blank_mode, ret);
@@ -496,12 +598,14 @@ static int bcm2708_fb_pan_display(struct fb_var_screeninfo *var,
info->var.yoffset = var->yoffset;
result = bcm2708_fb_set_par(info);
if (result != 0)
- pr_err("%s(%d,%d) returns=%d\n", __func__, var->xoffset,
+ pr_err("%s(%u,%u) returns=%d\n", __func__, var->xoffset,
var->yoffset, result);
return result;
}
static int bcm2708_ioctl(struct fb_info *info, unsigned int cmd, unsigned long arg)
+static int bcm2708_ioctl(struct fb_info *info, unsigned int cmd,
+ unsigned long arg)
{
struct bcm2708_fb *fb = to_bcm2708(info);
u32 dummy = 0;
@@ -509,7 +613,9 @@ static int bcm2708_ioctl(struct fb_info *info, unsigned int cmd, unsigned long a
switch (cmd) {
case FBIO_WAITFORVSYNC:
- ret = rpi_firmware_property(fb->fw,
+ set_display_num(fb);
+
+ ret = rpi_firmware_property(fb->fbdev->fw,
RPI_FIRMWARE_FRAMEBUFFER_SET_VSYNC,
&dummy, sizeof(dummy));
break;
@@ -526,23 +632,22 @@ static int bcm2708_ioctl(struct fb_info *info, unsigned int cmd, unsigned long a
static void bcm2708_fb_fillrect(struct fb_info *info,
const struct fb_fillrect *rect)
{
- /* (is called) print_debug("bcm2708_fb_fillrect\n"); */
cfb_fillrect(info, rect);
}
/* A helper function for configuring dma control block */
static void set_dma_cb(struct bcm2708_dma_cb *cb,
- int burst_size,
- dma_addr_t dst,
- int dst_stride,
- dma_addr_t src,
- int src_stride,
- int w,
- int h)
+ int burst_size,
+ dma_addr_t dst,
+ int dst_stride,
+ dma_addr_t src,
+ int src_stride,
+ int w,
+ int h)
{
cb->info = BCM2708_DMA_BURST(burst_size) | BCM2708_DMA_S_WIDTH |
- BCM2708_DMA_S_INC | BCM2708_DMA_D_WIDTH |
- BCM2708_DMA_D_INC | BCM2708_DMA_TDMODE;
+ BCM2708_DMA_S_INC | BCM2708_DMA_D_WIDTH |
+ BCM2708_DMA_D_INC | BCM2708_DMA_TDMODE;
cb->dst = dst;
cb->src = src;
/*
@@ -560,15 +665,19 @@ static void bcm2708_fb_copyarea(struct fb_info *info,
const struct fb_copyarea *region)
{
struct bcm2708_fb *fb = to_bcm2708(info);
- struct bcm2708_dma_cb *cb = fb->cb_base;
+ struct bcm2708_fb_dev *fbdev = fb->fbdev;
+ struct bcm2708_dma_cb *cb = fbdev->cb_base;
int bytes_per_pixel = (info->var.bits_per_pixel + 7) >> 3;
/* Channel 0 supports larger bursts and is a bit faster */
- int burst_size = (fb->dma_chan == 0) ? 8 : 2;
+ int burst_size = (fbdev->dma_chan == 0) ? 8 : 2;
int pixels = region->width * region->height;
- /* Fallback to cfb_copyarea() if we don't like something */
- if (bytes_per_pixel > 4 ||
+ /* If DMA is currently in use (ie being used on another FB), then
+ * rather than wait for it to finish, just use the cfb_copyarea
+ */
+ if (!mutex_trylock(&fbdev->dma_mutex) ||
+ bytes_per_pixel > 4 ||
info->var.xres * info->var.yres > 1920 * 1200 ||
region->width <= 0 || region->width > info->var.xres ||
region->height <= 0 || region->height > info->var.yres ||
@@ -595,8 +704,8 @@ static void bcm2708_fb_copyarea(struct fb_info *info,
* 1920x1200 resolution at 32bpp pixel depth.
*/
int y;
- dma_addr_t control_block_pa = fb->cb_handle;
- dma_addr_t scratchbuf = fb->cb_handle + 16 * 1024;
+ dma_addr_t control_block_pa = fbdev->cb_handle;
+ dma_addr_t scratchbuf = fbdev->cb_handle + 16 * 1024;
int scanline_size = bytes_per_pixel * region->width;
int scanlines_per_cb = (64 * 1024 - 16 * 1024) / scanline_size;
@@ -646,10 +755,10 @@ static void bcm2708_fb_copyarea(struct fb_info *info,
}
set_dma_cb(cb, burst_size,
fb->fb_bus_address + dy * fb->fb.fix.line_length +
- bytes_per_pixel * region->dx,
+ bytes_per_pixel * region->dx,
stride,
fb->fb_bus_address + sy * fb->fb.fix.line_length +
- bytes_per_pixel * region->sx,
+ bytes_per_pixel * region->sx,
stride,
region->width * bytes_per_pixel,
region->height);
@@ -659,32 +768,33 @@ static void bcm2708_fb_copyarea(struct fb_info *info,
cb->next = 0;
if (pixels < dma_busy_wait_threshold) {
- bcm_dma_start(fb->dma_chan_base, fb->cb_handle);
- bcm_dma_wait_idle(fb->dma_chan_base);
+ bcm_dma_start(fbdev->dma_chan_base, fbdev->cb_handle);
+ bcm_dma_wait_idle(fbdev->dma_chan_base);
} else {
- void __iomem *dma_chan = fb->dma_chan_base;
+ void __iomem *local_dma_chan = fbdev->dma_chan_base;
cb->info |= BCM2708_DMA_INT_EN;
- bcm_dma_start(fb->dma_chan_base, fb->cb_handle);
- while (bcm_dma_is_busy(dma_chan)) {
- wait_event_interruptible(fb->dma_waitq,
- !bcm_dma_is_busy(dma_chan));
+ bcm_dma_start(fbdev->dma_chan_base, fbdev->cb_handle);
+ while (bcm_dma_is_busy(local_dma_chan)) {
+ wait_event_interruptible(fbdev->dma_waitq,
+ !bcm_dma_is_busy(local_dma_chan));
}
- fb->stats.dma_irqs++;
+ fbdev->dma_stats.dma_irqs++;
}
- fb->stats.dma_copies++;
+ fbdev->dma_stats.dma_copies++;
+
+ mutex_unlock(&fbdev->dma_mutex);
}
static void bcm2708_fb_imageblit(struct fb_info *info,
const struct fb_image *image)
{
- /* (is called) print_debug("bcm2708_fb_imageblit\n"); */
cfb_imageblit(info, image);
}
static irqreturn_t bcm2708_fb_dma_irq(int irq, void *cxt)
{
- struct bcm2708_fb *fb = cxt;
+ struct bcm2708_fb_dev *fbdev = cxt;
/* FIXME: should read status register to check if this is
* actually interrupting us or not, in case this interrupt
@@ -694,9 +804,9 @@ static irqreturn_t bcm2708_fb_dma_irq(int irq, void *cxt)
*/
/* acknowledge the interrupt */
- writel(BCM2708_DMA_INT, fb->dma_chan_base + BCM2708_DMA_CS);
+ writel(BCM2708_DMA_INT, fbdev->dma_chan_base + BCM2708_DMA_CS);
- wake_up(&fb->dma_waitq);
+ wake_up(&fbdev->dma_waitq);
return IRQ_HANDLED;
}
@@ -729,11 +839,23 @@ static int bcm2708_fb_register(struct bcm2708_fb *fb)
fb->fb.fix.ywrapstep = 0;
fb->fb.fix.accel = FB_ACCEL_NONE;
- fb->fb.var.xres = fbwidth;
- fb->fb.var.yres = fbheight;
- fb->fb.var.xres_virtual = fbwidth;
- fb->fb.var.yres_virtual = fbheight;
- fb->fb.var.bits_per_pixel = fbdepth;
+ /* If we have data from the VC4 on FB's, use that, otherwise use the
+ * module parameters
+ */
+ if (fb->display_settings.width) {
+ fb->fb.var.xres = fb->display_settings.width;
+ fb->fb.var.yres = fb->display_settings.height;
+ fb->fb.var.xres_virtual = fb->fb.var.xres;
+ fb->fb.var.yres_virtual = fb->fb.var.yres;
+ fb->fb.var.bits_per_pixel = fb->display_settings.depth;
+ } else {
+ fb->fb.var.xres = fbwidth;
+ fb->fb.var.yres = fbheight;
+ fb->fb.var.xres_virtual = fbwidth;
+ fb->fb.var.yres_virtual = fbheight;
+ fb->fb.var.bits_per_pixel = fbdepth;
+ }
+
fb->fb.var.vmode = FB_VMODE_NONINTERLACED;
fb->fb.var.activate = FB_ACTIVATE_NOW;
fb->fb.var.nonstd = 0;
@@ -749,26 +871,23 @@ static int bcm2708_fb_register(struct bcm2708_fb *fb)
fb->fb.monspecs.dclkmax = 100000000;
bcm2708_fb_set_bitfields(&fb->fb.var);
- init_waitqueue_head(&fb->dma_waitq);
/*
* Allocate colourmap.
*/
-
fb_set_var(&fb->fb, &fb->fb.var);
+
ret = bcm2708_fb_set_par(&fb->fb);
+
if (ret)
return ret;
- print_debug("BCM2708FB: registering framebuffer (%dx%d@%d) (%d)\n",
- fbwidth, fbheight, fbdepth, fbswap);
-
ret = register_framebuffer(&fb->fb);
- print_debug("BCM2708FB: register framebuffer (%d)\n", ret);
+
if (ret == 0)
goto out;
- print_debug("BCM2708FB: cannot register framebuffer (%d)\n", ret);
+ dev_warn(fb->fb.dev, "Unable to register framebuffer (%d)\n", ret);
out:
return ret;
}
@@ -777,10 +896,18 @@ static int bcm2708_fb_probe(struct platform_device *dev)
{
struct device_node *fw_np;
struct rpi_firmware *fw;
- struct bcm2708_fb *fb;
- int ret;
+ int ret, i;
+ u32 num_displays;
+ struct bcm2708_fb_dev *fbdev;
+ struct { u32 base, length; } gpu_mem;
+
+ fbdev = devm_kzalloc(&dev->dev, sizeof(*fbdev), GFP_KERNEL);
+
+ if (!fbdev)
+ return -ENOMEM;
fw_np = of_parse_phandle(dev->dev.of_node, "firmware", 0);
+
/* Remove comment when booting without Device Tree is no longer supported
* if (!fw_np) {
* dev_err(&dev->dev, "Missing firmware node\n");
@@ -788,90 +915,154 @@ static int bcm2708_fb_probe(struct platform_device *dev)
* }
*/
fw = rpi_firmware_get(fw_np);
+ fbdev->fw = fw;
+
if (!fw)
return -EPROBE_DEFER;
- fb = kzalloc(sizeof(*fb), GFP_KERNEL);
- if (!fb) {
- ret = -ENOMEM;
- goto free_region;
+ ret = rpi_firmware_property(fw,
+ RPI_FIRMWARE_FRAMEBUFFER_GET_NUM_DISPLAYS,
+ &num_displays, sizeof(u32));
+
+ /* If we fail to get the number of displays, or it returns 0, then
+ * assume old firmware that doesn't have the mailbox call, so just
+ * set one display
+ */
+ if (ret || num_displays == 0) {
+ num_displays = 1;
+ dev_err(&dev->dev,
+ "Unable to determine number of FB's. Assuming 1\n");
+ ret = 0;
+ } else {
+ fbdev->firmware_supports_multifb = 1;
}
- fb->fw = fw;
- bcm2708_fb_debugfs_init(fb);
+ if (num_displays > MAX_FRAMEBUFFERS) {
+ dev_warn(&dev->dev,
+ "More displays reported from firmware than supported in driver (%u vs %u)",
+ num_displays, MAX_FRAMEBUFFERS);
+ num_displays = MAX_FRAMEBUFFERS;
+ }
- fb->cb_base = dma_alloc_wc(&dev->dev, SZ_64K,
- &fb->cb_handle, GFP_KERNEL);
- if (!fb->cb_base) {
+ dev_info(&dev->dev, "FB found %d display(s)\n", num_displays);
+
+ /* Set up the DMA information. Note we have just one set of DMA
+ * parameters to work with all the FB's so requires synchronising when
+ * being used
+ */
+
+ mutex_init(&fbdev->dma_mutex);
+
+ fbdev->cb_base = dma_alloc_wc(&dev->dev, SZ_64K,
+ &fbdev->cb_handle,
+ GFP_KERNEL);
+ if (!fbdev->cb_base) {
dev_err(&dev->dev, "cannot allocate DMA CBs\n");
ret = -ENOMEM;
goto free_fb;
}
- pr_info("BCM2708FB: allocated DMA memory %pad\n", &fb->cb_handle);
-
ret = bcm_dma_chan_alloc(BCM_DMA_FEATURE_BULK,
- &fb->dma_chan_base, &fb->dma_irq);
+ &fbdev->dma_chan_base,
+ &fbdev->dma_irq);
if (ret < 0) {
- dev_err(&dev->dev, "couldn't allocate a DMA channel\n");
+ dev_err(&dev->dev, "Couldn't allocate a DMA channel\n");
goto free_cb;
}
- fb->dma_chan = ret;
+ fbdev->dma_chan = ret;
- ret = request_irq(fb->dma_irq, bcm2708_fb_dma_irq,
- 0, "bcm2708_fb dma", fb);
+ ret = request_irq(fbdev->dma_irq, bcm2708_fb_dma_irq,
+ 0, "bcm2708_fb DMA", fbdev);
if (ret) {
- pr_err("%s: failed to request DMA irq\n", __func__);
+ dev_err(&dev->dev,
+ "Failed to request DMA irq\n");
goto free_dma_chan;
}
- pr_info("BCM2708FB: allocated DMA channel %d\n", fb->dma_chan);
+ rpi_firmware_property(fbdev->fw,
+ RPI_FIRMWARE_GET_VC_MEMORY,
+ &gpu_mem, sizeof(gpu_mem));
- fb->dev = dev;
- fb->fb.device = &dev->dev;
+ for (i = 0; i < num_displays; i++) {
+ struct bcm2708_fb *fb = &fbdev->displays[i];
- /* failure here isn't fatal, but we'll fail in vc_mem_copy if
- * fb->gpu is not valid
- */
- rpi_firmware_property(fb->fw, RPI_FIRMWARE_GET_VC_MEMORY, &fb->gpu,
- sizeof(fb->gpu));
+ fb->display_settings.display_num = i;
+ fb->dev = dev;
+ fb->fb.device = &dev->dev;
+ fb->fbdev = fbdev;
- ret = bcm2708_fb_register(fb);
- if (ret == 0) {
- platform_set_drvdata(dev, fb);
- goto out;
+ fb->gpu.base = gpu_mem.base;
+ fb->gpu.length = gpu_mem.length;
+
+ if (fbdev->firmware_supports_multifb) {
+ ret = rpi_firmware_property(fw,
+ RPI_FIRMWARE_FRAMEBUFFER_GET_DISPLAY_SETTINGS,
+ &fb->display_settings,
+ GET_DISPLAY_SETTINGS_PAYLOAD_SIZE);
+ } else {
+ memset(&fb->display_settings, 0,
+ sizeof(fb->display_settings));
+ }
+
+ ret = bcm2708_fb_register(fb);
+
+ if (ret == 0) {
+ bcm2708_fb_debugfs_init(fb);
+
+ fbdev->num_displays++;
+
+ dev_info(&dev->dev,
+ "Registered framebuffer for display %u, size %ux%u\n",
+ fb->display_settings.display_num,
+ fb->fb.var.xres,
+ fb->fb.var.yres);
+ } else {
+ // Use this to flag if this FB entry is in use.
+ fb->fbdev = NULL;
+ }
+ }
+
+ // Did we actually successfully create any FB's?
+ if (fbdev->num_displays) {
+ init_waitqueue_head(&fbdev->dma_waitq);
+ platform_set_drvdata(dev, fbdev);
+ return ret;
}
free_dma_chan:
- bcm_dma_chan_free(fb->dma_chan);
+ bcm_dma_chan_free(fbdev->dma_chan);
free_cb:
- dma_free_wc(&dev->dev, SZ_64K, fb->cb_base, fb->cb_handle);
+ dma_free_wc(&dev->dev, SZ_64K, fbdev->cb_base,
+ fbdev->cb_handle);
free_fb:
- kfree(fb);
-free_region:
dev_err(&dev->dev, "probe failed, err %d\n", ret);
-out:
+
return ret;
}
static int bcm2708_fb_remove(struct platform_device *dev)
{
- struct bcm2708_fb *fb = platform_get_drvdata(dev);
+ struct bcm2708_fb_dev *fbdev = platform_get_drvdata(dev);
+ int i;
platform_set_drvdata(dev, NULL);
- if (fb->fb.screen_base)
- iounmap(fb->fb.screen_base);
- unregister_framebuffer(&fb->fb);
+ for (i = 0; i < fbdev->num_displays; i++) {
+ if (fbdev->displays[i].fb.screen_base)
+ iounmap(fbdev->displays[i].fb.screen_base);
- dma_free_wc(&dev->dev, SZ_64K, fb->cb_base, fb->cb_handle);
- bcm_dma_chan_free(fb->dma_chan);
-
- bcm2708_fb_debugfs_deinit(fb);
+ if (fbdev->displays[i].fbdev) {
+ unregister_framebuffer(&fbdev->displays[i].fb);
+ bcm2708_fb_debugfs_deinit(&fbdev->displays[i]);
+ }
+ }
- free_irq(fb->dma_irq, fb);
+ dma_free_wc(&dev->dev, SZ_64K, fbdev->cb_base,
+ fbdev->cb_handle);
+ bcm_dma_chan_free(fbdev->dma_chan);
+ free_irq(fbdev->dma_irq, fbdev);
- kfree(fb);
+ mutex_destroy(&fbdev->dma_mutex);
return 0;
}
@@ -886,10 +1077,10 @@ static struct platform_driver bcm2708_fb_driver = {
.probe = bcm2708_fb_probe,
.remove = bcm2708_fb_remove,
.driver = {
- .name = DRIVER_NAME,
- .owner = THIS_MODULE,
- .of_match_table = bcm2708_fb_of_match_table,
- },
+ .name = DRIVER_NAME,
+ .owner = THIS_MODULE,
+ .of_match_table = bcm2708_fb_of_match_table,
+ },
};
static int __init bcm2708_fb_init(void)
--
2.44.0

View file

@ -1,346 +0,0 @@
From ba7d542d535059fe6e1a19c2a7cff811c01513c7 Mon Sep 17 00:00:00 2001
From: Siarhei Siamashka <siarhei.siamashka@gmail.com>
Date: Mon, 17 Jun 2013 13:32:11 +0300
Subject: [PATCH 0090/1002] fbdev: add FBIOCOPYAREA ioctl
Based on the patch authored by Ali Gholami Rudi at
https://lkml.org/lkml/2009/7/13/153
Provide an ioctl for userspace applications, but only if this operation
is hardware accelerated (otherwide it does not make any sense).
Signed-off-by: Siarhei Siamashka <siarhei.siamashka@gmail.com>
bcm2708_fb: Add ioctl for reading gpu memory through dma
video: bcm2708_fb: Add compat_ioctl support.
When using a 64 bit kernel with 32 bit userspace we need
compat ioctl handling for FBIODMACOPY as one of the
parameters is a pointer.
Signed-off-by: Dave Stevenson <dave.stevenson@raspberrypi.org>
---
drivers/video/fbdev/bcm2708_fb.c | 170 ++++++++++++++++++++++++++-
drivers/video/fbdev/core/fb_chrdev.c | 35 ++++++
include/uapi/linux/fb.h | 12 ++
3 files changed, 213 insertions(+), 4 deletions(-)
diff --git a/drivers/video/fbdev/bcm2708_fb.c b/drivers/video/fbdev/bcm2708_fb.c
index 16b355e08d72..f0bba2474045 100644
--- a/drivers/video/fbdev/bcm2708_fb.c
+++ b/drivers/video/fbdev/bcm2708_fb.c
@@ -32,8 +32,10 @@
#include <linux/printk.h>
#include <linux/console.h>
#include <linux/debugfs.h>
+#include <linux/uaccess.h>
#include <linux/io.h>
#include <linux/dma-mapping.h>
+#include <linux/cred.h>
#include <soc/bcm2835/raspberrypi-firmware.h>
#include <linux/mutex.h>
@@ -184,9 +186,6 @@ static int bcm2708_fb_debugfs_init(struct bcm2708_fb *fb)
fb->debugfs_subdir = debugfs_create_dir(buf, fb->debugfs_dir);
- debugfs_create_regset32("stats", 0444, fb->debugfs_dir,
- &fb->stats.regset);
-
if (!fb->debugfs_subdir) {
dev_warn(fb->fb.dev, "%s: could not create debugfs entry %u\n",
__func__, fb->display_settings.display_num);
@@ -603,7 +602,110 @@ static int bcm2708_fb_pan_display(struct fb_var_screeninfo *var,
return result;
}
-static int bcm2708_ioctl(struct fb_info *info, unsigned int cmd, unsigned long arg)
+static void dma_memcpy(struct bcm2708_fb *fb, dma_addr_t dst, dma_addr_t src,
+ int size)
+{
+ struct bcm2708_fb_dev *fbdev = fb->fbdev;
+ struct bcm2708_dma_cb *cb = fbdev->cb_base;
+ int burst_size = (fbdev->dma_chan == 0) ? 8 : 2;
+
+ cb->info = BCM2708_DMA_BURST(burst_size) | BCM2708_DMA_S_WIDTH |
+ BCM2708_DMA_S_INC | BCM2708_DMA_D_WIDTH |
+ BCM2708_DMA_D_INC;
+ cb->dst = dst;
+ cb->src = src;
+ cb->length = size;
+ cb->stride = 0;
+ cb->pad[0] = 0;
+ cb->pad[1] = 0;
+ cb->next = 0;
+
+ // Not sure what to do if this gets a signal whilst waiting
+ if (mutex_lock_interruptible(&fbdev->dma_mutex))
+ return;
+
+ if (size < dma_busy_wait_threshold) {
+ bcm_dma_start(fbdev->dma_chan_base, fbdev->cb_handle);
+ bcm_dma_wait_idle(fbdev->dma_chan_base);
+ } else {
+ void __iomem *local_dma_chan = fbdev->dma_chan_base;
+
+ cb->info |= BCM2708_DMA_INT_EN;
+ bcm_dma_start(fbdev->dma_chan_base, fbdev->cb_handle);
+ while (bcm_dma_is_busy(local_dma_chan)) {
+ wait_event_interruptible(fbdev->dma_waitq,
+ !bcm_dma_is_busy(local_dma_chan));
+ }
+ fbdev->dma_stats.dma_irqs++;
+ }
+ fbdev->dma_stats.dma_copies++;
+
+ mutex_unlock(&fbdev->dma_mutex);
+}
+
+/* address with no aliases */
+#define INTALIAS_NORMAL(x) ((x) & ~0xc0000000)
+/* cache coherent but non-allocating in L1 and L2 */
+#define INTALIAS_L1L2_NONALLOCATING(x) (((x) & ~0xc0000000) | 0x80000000)
+
+static long vc_mem_copy(struct bcm2708_fb *fb, struct fb_dmacopy *ioparam)
+{
+ size_t size = PAGE_SIZE;
+ u32 *buf = NULL;
+ dma_addr_t bus_addr;
+ long rc = 0;
+ size_t offset;
+
+ /* restrict this to root user */
+ if (!uid_eq(current_euid(), GLOBAL_ROOT_UID)) {
+ rc = -EFAULT;
+ goto out;
+ }
+
+ if (!fb->gpu.base || !fb->gpu.length) {
+ pr_err("[%s]: Unable to determine gpu memory (%x,%x)\n",
+ __func__, fb->gpu.base, fb->gpu.length);
+ return -EFAULT;
+ }
+
+ if (INTALIAS_NORMAL(ioparam->src) < fb->gpu.base ||
+ INTALIAS_NORMAL(ioparam->src) >= fb->gpu.base + fb->gpu.length) {
+ pr_err("[%s]: Invalid memory access %x (%x-%x)", __func__,
+ INTALIAS_NORMAL(ioparam->src), fb->gpu.base,
+ fb->gpu.base + fb->gpu.length);
+ return -EFAULT;
+ }
+
+ buf = dma_alloc_coherent(fb->fb.device, PAGE_ALIGN(size), &bus_addr,
+ GFP_ATOMIC);
+ if (!buf) {
+ pr_err("[%s]: failed to dma_alloc_coherent(%zd)\n", __func__,
+ size);
+ rc = -ENOMEM;
+ goto out;
+ }
+
+ for (offset = 0; offset < ioparam->length; offset += size) {
+ size_t remaining = ioparam->length - offset;
+ size_t s = min(size, remaining);
+ u8 *p = (u8 *)((uintptr_t)ioparam->src + offset);
+ u8 *q = (u8 *)ioparam->dst + offset;
+
+ dma_memcpy(fb, bus_addr,
+ INTALIAS_L1L2_NONALLOCATING((dma_addr_t)p), size);
+ if (copy_to_user(q, buf, s) != 0) {
+ pr_err("[%s]: failed to copy-to-user\n", __func__);
+ rc = -EFAULT;
+ goto out;
+ }
+ }
+out:
+ if (buf)
+ dma_free_coherent(fb->fb.device, PAGE_ALIGN(size), buf,
+ bus_addr);
+ return rc;
+}
+
static int bcm2708_ioctl(struct fb_info *info, unsigned int cmd,
unsigned long arg)
{
@@ -619,6 +721,21 @@ static int bcm2708_ioctl(struct fb_info *info, unsigned int cmd,
RPI_FIRMWARE_FRAMEBUFFER_SET_VSYNC,
&dummy, sizeof(dummy));
break;
+
+ case FBIODMACOPY:
+ {
+ struct fb_dmacopy ioparam;
+ /* Get the parameter data.
+ */
+ if (copy_from_user
+ (&ioparam, (void *)arg, sizeof(ioparam))) {
+ pr_err("[%s]: failed to copy-from-user\n", __func__);
+ ret = -EFAULT;
+ break;
+ }
+ ret = vc_mem_copy(fb, &ioparam);
+ break;
+ }
default:
dev_dbg(info->device, "Unknown ioctl 0x%x\n", cmd);
return -ENOTTY;
@@ -629,6 +746,48 @@ static int bcm2708_ioctl(struct fb_info *info, unsigned int cmd,
return ret;
}
+
+#ifdef CONFIG_COMPAT
+struct fb_dmacopy32 {
+ compat_uptr_t dst;
+ __u32 src;
+ __u32 length;
+};
+
+#define FBIODMACOPY32 _IOW('z', 0x22, struct fb_dmacopy32)
+
+static int bcm2708_compat_ioctl(struct fb_info *info, unsigned int cmd,
+ unsigned long arg)
+{
+ struct bcm2708_fb *fb = to_bcm2708(info);
+ int ret;
+
+ switch (cmd) {
+ case FBIODMACOPY32:
+ {
+ struct fb_dmacopy32 param32;
+ struct fb_dmacopy param;
+ /* Get the parameter data.
+ */
+ if (copy_from_user(&param32, (void *)arg, sizeof(param32))) {
+ pr_err("[%s]: failed to copy-from-user\n", __func__);
+ ret = -EFAULT;
+ break;
+ }
+ param.dst = compat_ptr(param32.dst);
+ param.src = param32.src;
+ param.length = param32.length;
+ ret = vc_mem_copy(fb, &param);
+ break;
+ }
+ default:
+ ret = bcm2708_ioctl(info, cmd, arg);
+ break;
+ }
+ return ret;
+}
+#endif
+
static void bcm2708_fb_fillrect(struct fb_info *info,
const struct fb_fillrect *rect)
{
@@ -821,6 +980,9 @@ static struct fb_ops bcm2708_fb_ops = {
.fb_imageblit = bcm2708_fb_imageblit,
.fb_pan_display = bcm2708_fb_pan_display,
.fb_ioctl = bcm2708_ioctl,
+#ifdef CONFIG_COMPAT
+ .fb_compat_ioctl = bcm2708_compat_ioctl,
+#endif
};
static int bcm2708_fb_register(struct bcm2708_fb *fb)
diff --git a/drivers/video/fbdev/core/fb_chrdev.c b/drivers/video/fbdev/core/fb_chrdev.c
index eadb81f53a82..df06a9ecba8d 100644
--- a/drivers/video/fbdev/core/fb_chrdev.c
+++ b/drivers/video/fbdev/core/fb_chrdev.c
@@ -59,6 +59,30 @@ static ssize_t fb_write(struct file *file, const char __user *buf, size_t count,
return fb_io_write(info, buf, count, ppos);
}
+static int fb_copyarea_user(struct fb_info *info,
+ struct fb_copyarea *copy)
+{
+ int ret = 0;
+ lock_fb_info(info);
+ if (copy->dx >= info->var.xres ||
+ copy->sx >= info->var.xres ||
+ copy->width > info->var.xres ||
+ copy->dy >= info->var.yres ||
+ copy->sy >= info->var.yres ||
+ copy->height > info->var.yres ||
+ copy->dx + copy->width > info->var.xres ||
+ copy->sx + copy->width > info->var.xres ||
+ copy->dy + copy->height > info->var.yres ||
+ copy->sy + copy->height > info->var.yres) {
+ ret = -EINVAL;
+ goto out;
+ }
+ info->fbops->fb_copyarea(info, copy);
+out:
+ unlock_fb_info(info);
+ return ret;
+}
+
static long do_fb_ioctl(struct fb_info *info, unsigned int cmd,
unsigned long arg)
{
@@ -67,6 +91,7 @@ static long do_fb_ioctl(struct fb_info *info, unsigned int cmd,
struct fb_fix_screeninfo fix;
struct fb_cmap cmap_from;
struct fb_cmap_user cmap;
+ struct fb_copyarea copy;
void __user *argp = (void __user *)arg;
long ret = 0;
@@ -148,6 +173,15 @@ static long do_fb_ioctl(struct fb_info *info, unsigned int cmd,
unlock_fb_info(info);
console_unlock();
break;
+ case FBIOCOPYAREA:
+ if (info->flags & FBINFO_HWACCEL_COPYAREA) {
+ /* only provide this ioctl if it is accelerated */
+ if (copy_from_user(&copy, argp, sizeof(copy)))
+ return -EFAULT;
+ ret = fb_copyarea_user(info, &copy);
+ break;
+ }
+ fallthrough;
default:
lock_fb_info(info);
fb = info->fbops;
@@ -287,6 +321,7 @@ static long fb_compat_ioctl(struct file *file, unsigned int cmd,
case FBIOPAN_DISPLAY:
case FBIOGET_CON2FBMAP:
case FBIOPUT_CON2FBMAP:
+ case FBIOCOPYAREA:
arg = (unsigned long) compat_ptr(arg);
fallthrough;
case FBIOBLANK:
diff --git a/include/uapi/linux/fb.h b/include/uapi/linux/fb.h
index 3a49913d006c..d9960887cf9e 100644
--- a/include/uapi/linux/fb.h
+++ b/include/uapi/linux/fb.h
@@ -35,6 +35,12 @@
#define FBIOPUT_MODEINFO 0x4617
#define FBIOGET_DISPINFO 0x4618
#define FBIO_WAITFORVSYNC _IOW('F', 0x20, __u32)
+/*
+ * HACK: use 'z' in order not to clash with any other ioctl numbers which might
+ * be concurrently added to the mainline kernel
+ */
+#define FBIOCOPYAREA _IOW('z', 0x21, struct fb_copyarea)
+#define FBIODMACOPY _IOW('z', 0x22, struct fb_dmacopy)
#define FB_TYPE_PACKED_PIXELS 0 /* Packed Pixels */
#define FB_TYPE_PLANES 1 /* Non interleaved planes */
@@ -348,6 +354,12 @@ struct fb_copyarea {
__u32 sy;
};
+struct fb_dmacopy {
+ void *dst;
+ __u32 src;
+ __u32 length;
+};
+
struct fb_fillrect {
__u32 dx; /* screen-relative */
__u32 dy;
--
2.44.0

View file

@ -1,665 +0,0 @@
From df4d44270dc3bcce85f017bc2ed988867d3ad930 Mon Sep 17 00:00:00 2001
From: Florian Meier <florian.meier@koalo.de>
Date: Fri, 22 Nov 2013 14:22:53 +0100
Subject: [PATCH 0091/1002] dmaengine: Add support for BCM2708
MIME-Version: 1.0
Content-Type: text/plain; charset=UTF-8
Content-Transfer-Encoding: 8bit
Add support for DMA controller of BCM2708 as used in the Raspberry Pi.
Currently it only supports cyclic DMA.
Signed-off-by: Florian Meier <florian.meier@koalo.de>
dmaengine: expand functionality by supporting scatter/gather transfers sdhci-bcm2708 and dma.c: fix for LITE channels
DMA: fix cyclic LITE length overflow bug
dmaengine: bcm2708: Remove chancnt affectations
Mirror bcm2835-dma.c commit 9eba5536a7434c69d8c185d4bd1c70734d92287d:
chancnt is already filled by dma_async_device_register, which uses the channel
list to know how much channels there is.
Since it's already filled, we can safely remove it from the drivers' probe
function.
Signed-off-by: Noralf Trønnes <noralf@tronnes.org>
dmaengine: bcm2708: overwrite dreq only if it is not set
dreq is set when the DMA channel is fetched from Device Tree.
slave_id is set using dmaengine_slave_config().
Only overwrite dreq with slave_id if it is not set.
dreq/slave_id in the cyclic DMA case is not touched, because I don't
have hardware to test with.
Signed-off-by: Noralf Trønnes <noralf@tronnes.org>
dmaengine: bcm2708: do device registration in the board file
Don't register the device in the driver. Do it in the board file.
Signed-off-by: Noralf Trønnes <noralf@tronnes.org>
dmaengine: bcm2708: don't restrict DT support to ARCH_BCM2835
Both ARCH_BCM2835 and ARCH_BCM270x are built with OF now.
Add Device Tree support to the non ARCH_BCM2835 case.
Use the same driver name regardless of architecture.
Signed-off-by: Noralf Trønnes <noralf@tronnes.org>
BCM270x_DT: add bcm2835-dma entry
Add Device Tree entry for bcm2835-dma.
The entry doesn't contain any resources since they are handled
by the arch/arm/mach-bcm270x/dma.c driver.
In non-DT mode, don't add the device in the board file.
Signed-off-by: Noralf Trønnes <noralf@tronnes.org>
bcm2708-dmaengine: Add debug options
BCM270x: Add memory and irq resources to dmaengine device and DT
Prepare for merging of the legacy DMA API arch driver dma.c
with bcm2708-dmaengine by adding memory and irq resources both
to platform file device and Device Tree node.
Don't use BCM_DMAMAN_DRIVER_NAME so we don't have to include mach/dma.h
Signed-off-by: Noralf Trønnes <noralf@tronnes.org>
dmaengine: bcm2708: Merge with arch dma.c driver and disable dma.c
Merge the legacy DMA API driver with bcm2708-dmaengine.
This is done so we can use bcm2708_fb on ARCH_BCM2835 (mailbox
driver is also needed).
Changes to the dma.c code:
- Use BIT() macro.
- Cutdown some comments to one line.
- Add mutex to vc_dmaman and use this, since the dev lock is locked
during probing of the engine part.
- Add global g_dmaman variable since drvdata is used by the engine part.
- Restructure for readability:
vc_dmaman_chan_alloc()
vc_dmaman_chan_free()
bcm_dma_chan_free()
- Restructure bcm_dma_chan_alloc() to simplify error handling.
- Use device irq resources instead of hardcoded bcm_dma_irqs table.
- Remove dev_dmaman_register() and code it directly.
- Remove dev_dmaman_deregister() and code it directly.
- Simplify bcm_dmaman_probe() using devm_* functions.
- Get dmachans from DT if available.
- Keep 'dma.dmachans' module argument name for backwards compatibility.
Make it available on ARCH_BCM2835 as well.
Signed-off-by: Noralf Trønnes <noralf@tronnes.org>
dmaengine: bcm2708: set residue_granularity field
bcm2708-dmaengine supports residue reporting at burst level
but didn't report this via the residue_granularity field.
Without this field set properly we get playback issues with I2S cards.
dmaengine: bcm2708-dmaengine: Fix memory leak when stopping a running transfer
bcm2708-dmaengine: Use more DMA channels (but not 12)
1) Only the bcm2708_fb drivers uses the legacy DMA API, and
it requires a BULK-capable channel, so all other types
(FAST, NORMAL and LITE) can be made available to the regular
DMA API.
2) DMA channels 11-14 share an interrupt. The driver can't
handle this, so don't use channels 12-14 (12 was used, probably
because it appears to have an interrupt, but in reality that
interrupt is for activity on ANY channel). This may explain
a lockup encountered when running out of DMA channels.
The combined effect of this patch is to leave 7 DMA channels
available + channel 0 for bcm2708_fb via the legacy API.
See: https://github.com/raspberrypi/linux/issues/1110
https://github.com/raspberrypi/linux/issues/1108
dmaengine: bcm2708: Make legacy API available for bcm2835-dma
bcm2708_fb uses the legacy DMA API, so in order to start using
bcm2835-dma, bcm2835-dma has to support the legacy API. Make this
possible by exporting bcm_dmaman_probe() and bcm_dmaman_remove().
Signed-off-by: Noralf Trønnes <noralf@tronnes.org>
dmaengine: bcm2708: Change DT compatible string
Both bcm2835-dma and bcm2708-dmaengine have the same compatible string.
So change compatible to "brcm,bcm2708-dma".
Signed-off-by: Noralf Trønnes <noralf@tronnes.org>
dmaengine: bcm2708: Remove driver but keep legacy API
Dropping non-DT support means we don't need this driver,
but we still need the legacy DMA API.
Signed-off-by: Noralf Trønnes <noralf@tronnes.org>
bcm2708-dmaengine - Fix arm64 portability/build issues
dma-bcm2708: Fix module compilation of CONFIG_DMA_BCM2708
bcm2708-dmaengine.c defines functions like bcm_dma_start which are
defined as well in dma-bcm2708.h as inline versions when
CONFIG_DMA_BCM2708 is not defined. This works fine when
CONFIG_DMA_BCM2708 is built in, but when it is selected as module build
fails with redefinition errors because in the build system when
CONFIG_DMA_BCM2708 is selected as module, the macro becomes
CONFIG_DMA_BCM2708_MODULE.
This patch makes the header use CONFIG_DMA_BCM2708_MODULE too when
available.
Fixes https://github.com/raspberrypi/linux/issues/2056
Signed-off-by: Andrei Gherzan <andrei@gherzan.com>
bcm2708-dmaengine: Use platform_get_irq
The platform driver framework no longer creates IRQ resources for
platform devices because they are expected to use platform_get_irq.
This causes the bcm2808_fb acceleration to fail.
Fix the problem by calling platform_get_irq as intended.
See: https://github.com/raspberrypi/linux/issues/5131
Signed-off-by: Phil Elwell <phil@raspberrypi.com>
---
drivers/dma/Kconfig | 6 +-
drivers/dma/Makefile | 1 +
drivers/dma/bcm2708-dmaengine.c | 281 ++++++++++++++++++++++
include/linux/platform_data/dma-bcm2708.h | 143 +++++++++++
4 files changed, 430 insertions(+), 1 deletion(-)
create mode 100644 drivers/dma/bcm2708-dmaengine.c
create mode 100644 include/linux/platform_data/dma-bcm2708.h
diff --git a/drivers/dma/Kconfig b/drivers/dma/Kconfig
index 68a023d019af..7d3435a7df41 100644
--- a/drivers/dma/Kconfig
+++ b/drivers/dma/Kconfig
@@ -136,7 +136,7 @@ config BCM_SBA_RAID
config DMA_BCM2835
tristate "BCM2835 DMA engine support"
- depends on ARCH_BCM2835 || ARCH_BCM2708 || ARCH_BCM2709
+ depends on ARCH_BCM2835
select DMA_ENGINE
select DMA_VIRTUAL_CHANNELS
@@ -669,6 +669,10 @@ config UNIPHIER_XDMAC
UniPhier platform. This DMA controller can transfer data from
memory to memory, memory to peripheral and peripheral to memory.
+config DMA_BCM2708
+ tristate "BCM2708 DMA legacy API support"
+ depends on DMA_BCM2835
+
config XGENE_DMA
tristate "APM X-Gene DMA support"
depends on ARCH_XGENE || COMPILE_TEST
diff --git a/drivers/dma/Makefile b/drivers/dma/Makefile
index 83553a97a010..b4a8e3585400 100644
--- a/drivers/dma/Makefile
+++ b/drivers/dma/Makefile
@@ -22,6 +22,7 @@ obj-$(CONFIG_AT_HDMAC) += at_hdmac.o
obj-$(CONFIG_AT_XDMAC) += at_xdmac.o
obj-$(CONFIG_AXI_DMAC) += dma-axi-dmac.o
obj-$(CONFIG_BCM_SBA_RAID) += bcm-sba-raid.o
+obj-$(CONFIG_DMA_BCM2708) += bcm2708-dmaengine.o
obj-$(CONFIG_DMA_BCM2835) += bcm2835-dma.o
obj-$(CONFIG_DMA_JZ4780) += dma-jz4780.o
obj-$(CONFIG_DMA_SA11X0) += sa11x0-dma.o
diff --git a/drivers/dma/bcm2708-dmaengine.c b/drivers/dma/bcm2708-dmaengine.c
new file mode 100644
index 000000000000..a9a7f92584c8
--- /dev/null
+++ b/drivers/dma/bcm2708-dmaengine.c
@@ -0,0 +1,281 @@
+/*
+ * BCM2708 legacy DMA API
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ */
+
+#include <linux/init.h>
+#include <linux/interrupt.h>
+#include <linux/list.h>
+#include <linux/module.h>
+#include <linux/platform_data/dma-bcm2708.h>
+#include <linux/platform_device.h>
+#include <linux/slab.h>
+#include <linux/io.h>
+#include <linux/spinlock.h>
+
+#include "virt-dma.h"
+
+#define CACHE_LINE_MASK 31
+#define DEFAULT_DMACHAN_BITMAP 0x10 /* channel 4 only */
+
+/* valid only for channels 0 - 14, 15 has its own base address */
+#define BCM2708_DMA_CHAN(n) ((n) << 8) /* base address */
+#define BCM2708_DMA_CHANIO(dma_base, n) \
+ ((void __iomem *)((char *)(dma_base) + BCM2708_DMA_CHAN(n)))
+
+struct vc_dmaman {
+ void __iomem *dma_base;
+ u32 chan_available; /* bitmap of available channels */
+ u32 has_feature[BCM_DMA_FEATURE_COUNT]; /* bitmap of feature presence */
+ struct mutex lock;
+};
+
+static struct device *dmaman_dev; /* we assume there's only one! */
+static struct vc_dmaman *g_dmaman; /* DMA manager */
+
+/* DMA Auxiliary Functions */
+
+/* A DMA buffer on an arbitrary boundary may separate a cache line into a
+ section inside the DMA buffer and another section outside it.
+ Even if we flush DMA buffers from the cache there is always the chance that
+ during a DMA someone will access the part of a cache line that is outside
+ the DMA buffer - which will then bring in unwelcome data.
+ Without being able to dictate our own buffer pools we must insist that
+ DMA buffers consist of a whole number of cache lines.
+*/
+extern int bcm_sg_suitable_for_dma(struct scatterlist *sg_ptr, int sg_len)
+{
+ int i;
+
+ for (i = 0; i < sg_len; i++) {
+ if (sg_ptr[i].offset & CACHE_LINE_MASK ||
+ sg_ptr[i].length & CACHE_LINE_MASK)
+ return 0;
+ }
+
+ return 1;
+}
+EXPORT_SYMBOL_GPL(bcm_sg_suitable_for_dma);
+
+extern void bcm_dma_start(void __iomem *dma_chan_base,
+ dma_addr_t control_block)
+{
+ dsb(sy); /* ARM data synchronization (push) operation */
+
+ writel(control_block, dma_chan_base + BCM2708_DMA_ADDR);
+ writel(BCM2708_DMA_ACTIVE, dma_chan_base + BCM2708_DMA_CS);
+}
+EXPORT_SYMBOL_GPL(bcm_dma_start);
+
+extern void bcm_dma_wait_idle(void __iomem *dma_chan_base)
+{
+ dsb(sy);
+
+ /* ugly busy wait only option for now */
+ while (readl(dma_chan_base + BCM2708_DMA_CS) & BCM2708_DMA_ACTIVE)
+ cpu_relax();
+}
+EXPORT_SYMBOL_GPL(bcm_dma_wait_idle);
+
+extern bool bcm_dma_is_busy(void __iomem *dma_chan_base)
+{
+ dsb(sy);
+
+ return readl(dma_chan_base + BCM2708_DMA_CS) & BCM2708_DMA_ACTIVE;
+}
+EXPORT_SYMBOL_GPL(bcm_dma_is_busy);
+
+/* Complete an ongoing DMA (assuming its results are to be ignored)
+ Does nothing if there is no DMA in progress.
+ This routine waits for the current AXI transfer to complete before
+ terminating the current DMA. If the current transfer is hung on a DREQ used
+ by an uncooperative peripheral the AXI transfer may never complete. In this
+ case the routine times out and return a non-zero error code.
+ Use of this routine doesn't guarantee that the ongoing or aborted DMA
+ does not produce an interrupt.
+*/
+extern int bcm_dma_abort(void __iomem *dma_chan_base)
+{
+ unsigned long int cs;
+ int rc = 0;
+
+ cs = readl(dma_chan_base + BCM2708_DMA_CS);
+
+ if (BCM2708_DMA_ACTIVE & cs) {
+ long int timeout = 10000;
+
+ /* write 0 to the active bit - pause the DMA */
+ writel(0, dma_chan_base + BCM2708_DMA_CS);
+
+ /* wait for any current AXI transfer to complete */
+ while (0 != (cs & BCM2708_DMA_ISPAUSED) && --timeout >= 0)
+ cs = readl(dma_chan_base + BCM2708_DMA_CS);
+
+ if (0 != (cs & BCM2708_DMA_ISPAUSED)) {
+ /* we'll un-pause when we set of our next DMA */
+ rc = -ETIMEDOUT;
+
+ } else if (BCM2708_DMA_ACTIVE & cs) {
+ /* terminate the control block chain */
+ writel(0, dma_chan_base + BCM2708_DMA_NEXTCB);
+
+ /* abort the whole DMA */
+ writel(BCM2708_DMA_ABORT | BCM2708_DMA_ACTIVE,
+ dma_chan_base + BCM2708_DMA_CS);
+ }
+ }
+
+ return rc;
+}
+EXPORT_SYMBOL_GPL(bcm_dma_abort);
+
+ /* DMA Manager Device Methods */
+
+static void vc_dmaman_init(struct vc_dmaman *dmaman, void __iomem *dma_base,
+ u32 chans_available)
+{
+ dmaman->dma_base = dma_base;
+ dmaman->chan_available = chans_available;
+ dmaman->has_feature[BCM_DMA_FEATURE_FAST_ORD] = 0x0c; /* 2 & 3 */
+ dmaman->has_feature[BCM_DMA_FEATURE_BULK_ORD] = 0x01; /* 0 */
+ dmaman->has_feature[BCM_DMA_FEATURE_NORMAL_ORD] = 0xfe; /* 1 to 7 */
+ dmaman->has_feature[BCM_DMA_FEATURE_LITE_ORD] = 0x7f00; /* 8 to 14 */
+}
+
+static int vc_dmaman_chan_alloc(struct vc_dmaman *dmaman,
+ unsigned required_feature_set)
+{
+ u32 chans;
+ int chan = 0;
+ int feature;
+
+ chans = dmaman->chan_available;
+ for (feature = 0; feature < BCM_DMA_FEATURE_COUNT; feature++)
+ /* select the subset of available channels with the desired
+ features */
+ if (required_feature_set & (1 << feature))
+ chans &= dmaman->has_feature[feature];
+
+ if (!chans)
+ return -ENOENT;
+
+ /* return the ordinal of the first channel in the bitmap */
+ while (chans != 0 && (chans & 1) == 0) {
+ chans >>= 1;
+ chan++;
+ }
+ /* claim the channel */
+ dmaman->chan_available &= ~(1 << chan);
+
+ return chan;
+}
+
+static int vc_dmaman_chan_free(struct vc_dmaman *dmaman, int chan)
+{
+ if (chan < 0)
+ return -EINVAL;
+
+ if ((1 << chan) & dmaman->chan_available)
+ return -EIDRM;
+
+ dmaman->chan_available |= (1 << chan);
+
+ return 0;
+}
+
+/* DMA Manager Monitor */
+
+extern int bcm_dma_chan_alloc(unsigned required_feature_set,
+ void __iomem **out_dma_base, int *out_dma_irq)
+{
+ struct vc_dmaman *dmaman = g_dmaman;
+ struct platform_device *pdev = to_platform_device(dmaman_dev);
+ int chan;
+ int irq;
+
+ if (!dmaman_dev)
+ return -ENODEV;
+
+ mutex_lock(&dmaman->lock);
+ chan = vc_dmaman_chan_alloc(dmaman, required_feature_set);
+ if (chan < 0)
+ goto out;
+
+ irq = platform_get_irq(pdev, (unsigned int)chan);
+ if (irq < 0) {
+ dev_err(dmaman_dev, "failed to get irq for DMA channel %d\n",
+ chan);
+ vc_dmaman_chan_free(dmaman, chan);
+ chan = -ENOENT;
+ goto out;
+ }
+
+ *out_dma_base = BCM2708_DMA_CHANIO(dmaman->dma_base, chan);
+ *out_dma_irq = irq;
+ dev_dbg(dmaman_dev,
+ "Legacy API allocated channel=%d, base=%p, irq=%i\n",
+ chan, *out_dma_base, *out_dma_irq);
+
+out:
+ mutex_unlock(&dmaman->lock);
+
+ return chan;
+}
+EXPORT_SYMBOL_GPL(bcm_dma_chan_alloc);
+
+extern int bcm_dma_chan_free(int channel)
+{
+ struct vc_dmaman *dmaman = g_dmaman;
+ int rc;
+
+ if (!dmaman_dev)
+ return -ENODEV;
+
+ mutex_lock(&dmaman->lock);
+ rc = vc_dmaman_chan_free(dmaman, channel);
+ mutex_unlock(&dmaman->lock);
+
+ return rc;
+}
+EXPORT_SYMBOL_GPL(bcm_dma_chan_free);
+
+int bcm_dmaman_probe(struct platform_device *pdev, void __iomem *base,
+ u32 chans_available)
+{
+ struct device *dev = &pdev->dev;
+ struct vc_dmaman *dmaman;
+
+ dmaman = devm_kzalloc(dev, sizeof(*dmaman), GFP_KERNEL);
+ if (!dmaman)
+ return -ENOMEM;
+
+ mutex_init(&dmaman->lock);
+ vc_dmaman_init(dmaman, base, chans_available);
+ g_dmaman = dmaman;
+ dmaman_dev = dev;
+
+ dev_info(dev, "DMA legacy API manager, dmachans=0x%x\n",
+ chans_available);
+
+ return 0;
+}
+EXPORT_SYMBOL(bcm_dmaman_probe);
+
+int bcm_dmaman_remove(struct platform_device *pdev)
+{
+ dmaman_dev = NULL;
+
+ return 0;
+}
+EXPORT_SYMBOL(bcm_dmaman_remove);
+
+MODULE_LICENSE("GPL");
diff --git a/include/linux/platform_data/dma-bcm2708.h b/include/linux/platform_data/dma-bcm2708.h
new file mode 100644
index 000000000000..6ca874d332a8
--- /dev/null
+++ b/include/linux/platform_data/dma-bcm2708.h
@@ -0,0 +1,143 @@
+/*
+ * Copyright (C) 2010 Broadcom
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ */
+
+#ifndef _PLAT_BCM2708_DMA_H
+#define _PLAT_BCM2708_DMA_H
+
+/* DMA CS Control and Status bits */
+#define BCM2708_DMA_ACTIVE BIT(0)
+#define BCM2708_DMA_INT BIT(2)
+#define BCM2708_DMA_ISPAUSED BIT(4) /* Pause requested or not active */
+#define BCM2708_DMA_ISHELD BIT(5) /* Is held by DREQ flow control */
+#define BCM2708_DMA_ERR BIT(8)
+#define BCM2708_DMA_ABORT BIT(30) /* stop current CB, go to next, WO */
+#define BCM2708_DMA_RESET BIT(31) /* WO, self clearing */
+
+/* DMA control block "info" field bits */
+#define BCM2708_DMA_INT_EN BIT(0)
+#define BCM2708_DMA_TDMODE BIT(1)
+#define BCM2708_DMA_WAIT_RESP BIT(3)
+#define BCM2708_DMA_D_INC BIT(4)
+#define BCM2708_DMA_D_WIDTH BIT(5)
+#define BCM2708_DMA_D_DREQ BIT(6)
+#define BCM2708_DMA_S_INC BIT(8)
+#define BCM2708_DMA_S_WIDTH BIT(9)
+#define BCM2708_DMA_S_DREQ BIT(10)
+
+#define BCM2708_DMA_BURST(x) (((x) & 0xf) << 12)
+#define BCM2708_DMA_PER_MAP(x) ((x) << 16)
+#define BCM2708_DMA_WAITS(x) (((x) & 0x1f) << 21)
+
+#define BCM2708_DMA_DREQ_EMMC 11
+#define BCM2708_DMA_DREQ_SDHOST 13
+
+#define BCM2708_DMA_CS 0x00 /* Control and Status */
+#define BCM2708_DMA_ADDR 0x04
+/* the current control block appears in the following registers - read only */
+#define BCM2708_DMA_INFO 0x08
+#define BCM2708_DMA_SOURCE_AD 0x0c
+#define BCM2708_DMA_DEST_AD 0x10
+#define BCM2708_DMA_NEXTCB 0x1C
+#define BCM2708_DMA_DEBUG 0x20
+
+#define BCM2708_DMA4_CS (BCM2708_DMA_CHAN(4) + BCM2708_DMA_CS)
+#define BCM2708_DMA4_ADDR (BCM2708_DMA_CHAN(4) + BCM2708_DMA_ADDR)
+
+#define BCM2708_DMA_TDMODE_LEN(w, h) ((h) << 16 | (w))
+
+/* When listing features we can ask for when allocating DMA channels give
+ those with higher priority smaller ordinal numbers */
+#define BCM_DMA_FEATURE_FAST_ORD 0
+#define BCM_DMA_FEATURE_BULK_ORD 1
+#define BCM_DMA_FEATURE_NORMAL_ORD 2
+#define BCM_DMA_FEATURE_LITE_ORD 3
+#define BCM_DMA_FEATURE_FAST BIT(BCM_DMA_FEATURE_FAST_ORD)
+#define BCM_DMA_FEATURE_BULK BIT(BCM_DMA_FEATURE_BULK_ORD)
+#define BCM_DMA_FEATURE_NORMAL BIT(BCM_DMA_FEATURE_NORMAL_ORD)
+#define BCM_DMA_FEATURE_LITE BIT(BCM_DMA_FEATURE_LITE_ORD)
+#define BCM_DMA_FEATURE_COUNT 4
+
+struct bcm2708_dma_cb {
+ u32 info;
+ u32 src;
+ u32 dst;
+ u32 length;
+ u32 stride;
+ u32 next;
+ u32 pad[2];
+};
+
+struct scatterlist;
+struct platform_device;
+
+#if defined(CONFIG_DMA_BCM2708) || defined(CONFIG_DMA_BCM2708_MODULE)
+
+int bcm_sg_suitable_for_dma(struct scatterlist *sg_ptr, int sg_len);
+void bcm_dma_start(void __iomem *dma_chan_base, dma_addr_t control_block);
+void bcm_dma_wait_idle(void __iomem *dma_chan_base);
+bool bcm_dma_is_busy(void __iomem *dma_chan_base);
+int bcm_dma_abort(void __iomem *dma_chan_base);
+
+/* return channel no or -ve error */
+int bcm_dma_chan_alloc(unsigned preferred_feature_set,
+ void __iomem **out_dma_base, int *out_dma_irq);
+int bcm_dma_chan_free(int channel);
+
+int bcm_dmaman_probe(struct platform_device *pdev, void __iomem *base,
+ u32 chans_available);
+int bcm_dmaman_remove(struct platform_device *pdev);
+
+#else /* CONFIG_DMA_BCM2708 */
+
+static inline int bcm_sg_suitable_for_dma(struct scatterlist *sg_ptr,
+ int sg_len)
+{
+ return 0;
+}
+
+static inline void bcm_dma_start(void __iomem *dma_chan_base,
+ dma_addr_t control_block) { }
+
+static inline void bcm_dma_wait_idle(void __iomem *dma_chan_base) { }
+
+static inline bool bcm_dma_is_busy(void __iomem *dma_chan_base)
+{
+ return false;
+}
+
+static inline int bcm_dma_abort(void __iomem *dma_chan_base)
+{
+ return -EINVAL;
+}
+
+static inline int bcm_dma_chan_alloc(unsigned preferred_feature_set,
+ void __iomem **out_dma_base,
+ int *out_dma_irq)
+{
+ return -EINVAL;
+}
+
+static inline int bcm_dma_chan_free(int channel)
+{
+ return -EINVAL;
+}
+
+static inline int bcm_dmaman_probe(struct platform_device *pdev,
+ void __iomem *base, u32 chans_available)
+{
+ return 0;
+}
+
+static inline int bcm_dmaman_remove(struct platform_device *pdev)
+{
+ return 0;
+}
+
+#endif /* CONFIG_DMA_BCM2708 || CONFIG_DMA_BCM2708_MODULE */
+
+#endif /* _PLAT_BCM2708_DMA_H */
--
2.44.0

View file

@ -1,39 +0,0 @@
From 676ce1112f4e1023ed5e49501b6279190bdcb152 Mon Sep 17 00:00:00 2001
From: Jonathan Bell <jonathan@raspberrypi.com>
Date: Mon, 16 May 2022 10:28:27 +0100
Subject: [PATCH 0093/1002] mmc: block: Don't do single-sector reads during
recovery
See https://github.com/raspberrypi/linux/issues/5019
If an SD card has degraded performance such that IO operations time out
then the MMC block layer will leak SG DMA mappings in the swiotlb during
recovery. It retries the same SG and this causes the leak, as it is
mapped twice - once in sdhci_pre_req() and again during single-block
reads in sdhci_prepare_data().
Resetting the card (including power-cycling if a regulator for vmmc is
present) ought to be enough to recover a stuck state, so for now don't
try single-block reads in the recovery path.
Signed-off-by: Jonathan Bell <jonathan@raspberrypi.com>
---
drivers/mmc/core/block.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/mmc/core/block.c b/drivers/mmc/core/block.c
index 90bc51bd7f04..2f027c315c9c 100644
--- a/drivers/mmc/core/block.c
+++ b/drivers/mmc/core/block.c
@@ -1947,7 +1947,7 @@ static void mmc_blk_mq_rw_recovery(struct mmc_queue *mq, struct request *req)
return;
}
- if (rq_data_dir(req) == READ && brq->data.blocks >
+ if (0 && rq_data_dir(req) == READ && brq->data.blocks >
queue_physical_block_size(mq->queue) >> 9) {
/* Read one (native) sector at a time */
mmc_blk_read_single(mq, req);
--
2.44.0

View file

@ -1,512 +0,0 @@
From d1640c25080c3bd2b322b2330a9fba90e74d81fc Mon Sep 17 00:00:00 2001
From: popcornmix <popcornmix@gmail.com>
Date: Fri, 28 Oct 2016 15:36:43 +0100
Subject: [PATCH 0095/1002] vc_mem: Add vc_mem driver for querying firmware
memory addresses
MIME-Version: 1.0
Content-Type: text/plain; charset=UTF-8
Content-Transfer-Encoding: 8bit
Signed-off-by: popcornmix <popcornmix@gmail.com>
BCM270x: Move vc_mem
Make the vc_mem module available for ARCH_BCM2835 by moving it.
Signed-off-by: Noralf Trønnes <noralf@tronnes.org>
char: vc_mem: Fix up compat ioctls for 64bit kernel
compat_ioctl wasn't defined, so 32bit user/64bit kernel
always failed.
VC_MEM_IOC_MEM_PHYS_ADDR was defined with parameter size
unsigned long, so the ioctl cmd changes between sizes.
Signed-off-by: Dave Stevenson <dave.stevenson@raspberrypi.org>
char: vc_mem: Fix all coding style issues.
Cleans up all checkpatch errors in vc_mem.c and vc_mem.h
No functional change to the code.
Signed-off-by: Dave Stevenson <dave.stevenson@raspberrypi.org>
char: vc_mem: Delete dead code
There are no error exists once device_create has succeeded, and
therefore no need to call device_destroy from vc_mem_init.
Signed-off-by: Phil Elwell <phil@raspberrypi.com>
char: broadcom: vc_mem: Fix preprocessor conditional
Signed-off-by: Alexander Winkowski <dereference23@outlook.com>
---
drivers/char/broadcom/Kconfig | 18 ++
drivers/char/broadcom/Makefile | 1 +
drivers/char/broadcom/vc_mem.c | 373 ++++++++++++++++++++++++++++++++
include/linux/broadcom/vc_mem.h | 39 ++++
4 files changed, 431 insertions(+)
create mode 100644 drivers/char/broadcom/Kconfig
create mode 100644 drivers/char/broadcom/Makefile
create mode 100644 drivers/char/broadcom/vc_mem.c
create mode 100644 include/linux/broadcom/vc_mem.h
diff --git a/drivers/char/broadcom/Kconfig b/drivers/char/broadcom/Kconfig
new file mode 100644
index 000000000000..fc1315209dab
--- /dev/null
+++ b/drivers/char/broadcom/Kconfig
@@ -0,0 +1,18 @@
+#
+# Broadcom char driver config
+#
+
+menuconfig BRCM_CHAR_DRIVERS
+ bool "Broadcom Char Drivers"
+ help
+ Broadcom's char drivers
+
+if BRCM_CHAR_DRIVERS
+
+config BCM2708_VCMEM
+ bool "Videocore Memory"
+ default y
+ help
+ Helper for videocore memory access and total size allocation.
+
+endif
diff --git a/drivers/char/broadcom/Makefile b/drivers/char/broadcom/Makefile
new file mode 100644
index 000000000000..06c5c8ad00e7
--- /dev/null
+++ b/drivers/char/broadcom/Makefile
@@ -0,0 +1 @@
+obj-$(CONFIG_BCM2708_VCMEM) += vc_mem.o
diff --git a/drivers/char/broadcom/vc_mem.c b/drivers/char/broadcom/vc_mem.c
new file mode 100644
index 000000000000..d81c8ffcdf2f
--- /dev/null
+++ b/drivers/char/broadcom/vc_mem.c
@@ -0,0 +1,373 @@
+/*
+ * Copyright 2010 - 2011 Broadcom Corporation. All rights reserved.
+ *
+ * Unless you and Broadcom execute a separate written software license
+ * agreement governing use of this software, this software is licensed to you
+ * under the terms of the GNU General Public License version 2, available at
+ * http://www.broadcom.com/licenses/GPLv2.php (the "GPL").
+ *
+ * Notwithstanding the above, under no circumstances may you combine this
+ * software in any way with any other Broadcom software provided under a
+ * license other than the GPL, without Broadcom's express prior written
+ * consent.
+ */
+
+#include <linux/kernel.h>
+#include <linux/module.h>
+#include <linux/fs.h>
+#include <linux/device.h>
+#include <linux/cdev.h>
+#include <linux/mm.h>
+#include <linux/slab.h>
+#include <linux/debugfs.h>
+#include <linux/uaccess.h>
+#include <linux/dma-mapping.h>
+#include <linux/broadcom/vc_mem.h>
+
+#define DRIVER_NAME "vc-mem"
+
+/* Device (/dev) related variables */
+static dev_t vc_mem_devnum;
+static struct class *vc_mem_class;
+static struct cdev vc_mem_cdev;
+static int vc_mem_inited;
+
+#ifdef CONFIG_DEBUG_FS
+static struct dentry *vc_mem_debugfs_entry;
+#endif
+
+/*
+ * Videocore memory addresses and size
+ *
+ * Drivers that wish to know the videocore memory addresses and sizes should
+ * use these variables instead of the MM_IO_BASE and MM_ADDR_IO defines in
+ * headers. This allows the other drivers to not be tied down to a a certain
+ * address/size at compile time.
+ *
+ * In the future, the goal is to have the videocore memory virtual address and
+ * size be calculated at boot time rather than at compile time. The decision of
+ * where the videocore memory resides and its size would be in the hands of the
+ * bootloader (and/or kernel). When that happens, the values of these variables
+ * would be calculated and assigned in the init function.
+ */
+/* In the 2835 VC in mapped above ARM, but ARM has full access to VC space */
+unsigned long mm_vc_mem_phys_addr;
+EXPORT_SYMBOL(mm_vc_mem_phys_addr);
+unsigned int mm_vc_mem_size;
+EXPORT_SYMBOL(mm_vc_mem_size);
+unsigned int mm_vc_mem_base;
+EXPORT_SYMBOL(mm_vc_mem_base);
+
+static uint phys_addr;
+static uint mem_size;
+static uint mem_base;
+
+static int
+vc_mem_open(struct inode *inode, struct file *file)
+{
+ (void)inode;
+
+ pr_debug("%s: called file = 0x%p\n", __func__, file);
+
+ return 0;
+}
+
+static int
+vc_mem_release(struct inode *inode, struct file *file)
+{
+ (void)inode;
+
+ pr_debug("%s: called file = 0x%p\n", __func__, file);
+
+ return 0;
+}
+
+static void
+vc_mem_get_size(void)
+{
+}
+
+static void
+vc_mem_get_base(void)
+{
+}
+
+int
+vc_mem_get_current_size(void)
+{
+ return mm_vc_mem_size;
+}
+EXPORT_SYMBOL_GPL(vc_mem_get_current_size);
+
+static long
+vc_mem_ioctl(struct file *file, unsigned int cmd, unsigned long arg)
+{
+ int rc = 0;
+
+ (void) cmd;
+ (void) arg;
+
+ pr_debug("%s: called file = 0x%p, cmd %08x\n", __func__, file, cmd);
+
+ switch (cmd) {
+ case VC_MEM_IOC_MEM_PHYS_ADDR:
+ {
+ pr_debug("%s: VC_MEM_IOC_MEM_PHYS_ADDR=0x%p\n",
+ __func__, (void *)mm_vc_mem_phys_addr);
+
+ if (copy_to_user((void *)arg, &mm_vc_mem_phys_addr,
+ sizeof(mm_vc_mem_phys_addr))) {
+ rc = -EFAULT;
+ }
+ break;
+ }
+ case VC_MEM_IOC_MEM_SIZE:
+ {
+ /* Get the videocore memory size first */
+ vc_mem_get_size();
+
+ pr_debug("%s: VC_MEM_IOC_MEM_SIZE=%x\n", __func__,
+ mm_vc_mem_size);
+
+ if (copy_to_user((void *)arg, &mm_vc_mem_size,
+ sizeof(mm_vc_mem_size))) {
+ rc = -EFAULT;
+ }
+ break;
+ }
+ case VC_MEM_IOC_MEM_BASE:
+ {
+ /* Get the videocore memory base */
+ vc_mem_get_base();
+
+ pr_debug("%s: VC_MEM_IOC_MEM_BASE=%x\n", __func__,
+ mm_vc_mem_base);
+
+ if (copy_to_user((void *)arg, &mm_vc_mem_base,
+ sizeof(mm_vc_mem_base))) {
+ rc = -EFAULT;
+ }
+ break;
+ }
+ case VC_MEM_IOC_MEM_LOAD:
+ {
+ /* Get the videocore memory base */
+ vc_mem_get_base();
+
+ pr_debug("%s: VC_MEM_IOC_MEM_LOAD=%x\n", __func__,
+ mm_vc_mem_base);
+
+ if (copy_to_user((void *)arg, &mm_vc_mem_base,
+ sizeof(mm_vc_mem_base))) {
+ rc = -EFAULT;
+ }
+ break;
+ }
+ default:
+ {
+ return -ENOTTY;
+ }
+ }
+ pr_debug("%s: file = 0x%p returning %d\n", __func__, file, rc);
+
+ return rc;
+}
+
+#ifdef CONFIG_COMPAT
+static long
+vc_mem_compat_ioctl(struct file *file, unsigned int cmd, unsigned long arg)
+{
+ int rc = 0;
+
+ switch (cmd) {
+ case VC_MEM_IOC_MEM_PHYS_ADDR32:
+ pr_debug("%s: VC_MEM_IOC_MEM_PHYS_ADDR32=0x%p\n",
+ __func__, (void *)mm_vc_mem_phys_addr);
+
+ /* This isn't correct, but will cover us for now as
+ * VideoCore is 32bit only.
+ */
+ if (copy_to_user((void *)arg, &mm_vc_mem_phys_addr,
+ sizeof(compat_ulong_t)))
+ rc = -EFAULT;
+
+ break;
+
+ default:
+ rc = vc_mem_ioctl(file, cmd, arg);
+ break;
+ }
+
+ return rc;
+}
+#endif
+
+static int
+vc_mem_mmap(struct file *filp, struct vm_area_struct *vma)
+{
+ int rc = 0;
+ unsigned long length = vma->vm_end - vma->vm_start;
+ unsigned long offset = vma->vm_pgoff << PAGE_SHIFT;
+
+ pr_debug("%s: vm_start = 0x%08lx vm_end = 0x%08lx vm_pgoff = 0x%08lx\n",
+ __func__, (long)vma->vm_start, (long)vma->vm_end,
+ (long)vma->vm_pgoff);
+
+ if (offset + length > mm_vc_mem_size) {
+ pr_err("%s: length %ld is too big\n", __func__, length);
+ return -EINVAL;
+ }
+ /* Do not cache the memory map */
+ vma->vm_page_prot = pgprot_noncached(vma->vm_page_prot);
+
+ rc = remap_pfn_range(vma, vma->vm_start,
+ (mm_vc_mem_phys_addr >> PAGE_SHIFT) +
+ vma->vm_pgoff, length, vma->vm_page_prot);
+ if (rc)
+ pr_err("%s: remap_pfn_range failed (rc=%d)\n", __func__, rc);
+
+ return rc;
+}
+
+/* File Operations for the driver. */
+static const struct file_operations vc_mem_fops = {
+ .owner = THIS_MODULE,
+ .open = vc_mem_open,
+ .release = vc_mem_release,
+ .unlocked_ioctl = vc_mem_ioctl,
+#ifdef CONFIG_COMPAT
+ .compat_ioctl = vc_mem_compat_ioctl,
+#endif
+ .mmap = vc_mem_mmap,
+};
+
+#ifdef CONFIG_DEBUG_FS
+static void vc_mem_debugfs_deinit(void)
+{
+ debugfs_remove_recursive(vc_mem_debugfs_entry);
+ vc_mem_debugfs_entry = NULL;
+}
+
+
+static int vc_mem_debugfs_init(
+ struct device *dev)
+{
+ vc_mem_debugfs_entry = debugfs_create_dir(DRIVER_NAME, NULL);
+ if (!vc_mem_debugfs_entry) {
+ dev_warn(dev, "could not create debugfs entry\n");
+ return -EFAULT;
+ }
+
+ debugfs_create_x32("vc_mem_phys_addr",
+ 0444,
+ vc_mem_debugfs_entry,
+ (u32 *)&mm_vc_mem_phys_addr);
+ debugfs_create_x32("vc_mem_size",
+ 0444,
+ vc_mem_debugfs_entry,
+ (u32 *)&mm_vc_mem_size);
+ debugfs_create_x32("vc_mem_base",
+ 0444,
+ vc_mem_debugfs_entry,
+ (u32 *)&mm_vc_mem_base);
+
+ return 0;
+}
+
+#endif /* CONFIG_DEBUG_FS */
+
+/* Module load/unload functions */
+
+static int __init
+vc_mem_init(void)
+{
+ int rc = -EFAULT;
+ struct device *dev;
+
+ pr_debug("%s: called\n", __func__);
+
+ mm_vc_mem_phys_addr = phys_addr;
+ mm_vc_mem_size = mem_size;
+ mm_vc_mem_base = mem_base;
+
+ vc_mem_get_size();
+
+ pr_info("vc-mem: phys_addr:0x%08lx mem_base=0x%08x mem_size:0x%08x(%u MiB)\n",
+ mm_vc_mem_phys_addr, mm_vc_mem_base, mm_vc_mem_size,
+ mm_vc_mem_size / (1024 * 1024));
+
+ rc = alloc_chrdev_region(&vc_mem_devnum, 0, 1, DRIVER_NAME);
+ if (rc < 0) {
+ pr_err("%s: alloc_chrdev_region failed (rc=%d)\n",
+ __func__, rc);
+ goto out_err;
+ }
+
+ cdev_init(&vc_mem_cdev, &vc_mem_fops);
+ rc = cdev_add(&vc_mem_cdev, vc_mem_devnum, 1);
+ if (rc) {
+ pr_err("%s: cdev_add failed (rc=%d)\n", __func__, rc);
+ goto out_unregister;
+ }
+
+ vc_mem_class = class_create(DRIVER_NAME);
+ if (IS_ERR(vc_mem_class)) {
+ rc = PTR_ERR(vc_mem_class);
+ pr_err("%s: class_create failed (rc=%d)\n", __func__, rc);
+ goto out_cdev_del;
+ }
+
+ dev = device_create(vc_mem_class, NULL, vc_mem_devnum, NULL,
+ DRIVER_NAME);
+ if (IS_ERR(dev)) {
+ rc = PTR_ERR(dev);
+ pr_err("%s: device_create failed (rc=%d)\n", __func__, rc);
+ goto out_class_destroy;
+ }
+
+#ifdef CONFIG_DEBUG_FS
+ /* don't fail if the debug entries cannot be created */
+ vc_mem_debugfs_init(dev);
+#endif
+
+ vc_mem_inited = 1;
+ return 0;
+
+out_class_destroy:
+ class_destroy(vc_mem_class);
+ vc_mem_class = NULL;
+
+out_cdev_del:
+ cdev_del(&vc_mem_cdev);
+
+out_unregister:
+ unregister_chrdev_region(vc_mem_devnum, 1);
+
+out_err:
+ return -1;
+}
+
+static void __exit
+vc_mem_exit(void)
+{
+ pr_debug("%s: called\n", __func__);
+
+ if (vc_mem_inited) {
+#ifdef CONFIG_DEBUG_FS
+ vc_mem_debugfs_deinit();
+#endif
+ device_destroy(vc_mem_class, vc_mem_devnum);
+ class_destroy(vc_mem_class);
+ cdev_del(&vc_mem_cdev);
+ unregister_chrdev_region(vc_mem_devnum, 1);
+ }
+}
+
+module_init(vc_mem_init);
+module_exit(vc_mem_exit);
+MODULE_LICENSE("GPL");
+MODULE_AUTHOR("Broadcom Corporation");
+
+module_param(phys_addr, uint, 0644);
+module_param(mem_size, uint, 0644);
+module_param(mem_base, uint, 0644);
diff --git a/include/linux/broadcom/vc_mem.h b/include/linux/broadcom/vc_mem.h
new file mode 100644
index 000000000000..3c7079237496
--- /dev/null
+++ b/include/linux/broadcom/vc_mem.h
@@ -0,0 +1,39 @@
+/*
+ * Copyright 2010 - 2011 Broadcom Corporation. All rights reserved.
+ *
+ * Unless you and Broadcom execute a separate written software license
+ * agreement governing use of this software, this software is licensed to you
+ * under the terms of the GNU General Public License version 2, available at
+ * http://www.broadcom.com/licenses/GPLv2.php (the "GPL").
+ *
+ * Notwithstanding the above, under no circumstances may you combine this
+ * software in any way with any other Broadcom software provided under a
+ * license other than the GPL, without Broadcom's express prior written
+ * consent.
+ */
+
+#ifndef _VC_MEM_H
+#define _VC_MEM_H
+
+#include <linux/ioctl.h>
+
+#define VC_MEM_IOC_MAGIC 'v'
+
+#define VC_MEM_IOC_MEM_PHYS_ADDR _IOR(VC_MEM_IOC_MAGIC, 0, unsigned long)
+#define VC_MEM_IOC_MEM_SIZE _IOR(VC_MEM_IOC_MAGIC, 1, unsigned int)
+#define VC_MEM_IOC_MEM_BASE _IOR(VC_MEM_IOC_MAGIC, 2, unsigned int)
+#define VC_MEM_IOC_MEM_LOAD _IOR(VC_MEM_IOC_MAGIC, 3, unsigned int)
+
+#ifdef __KERNEL__
+#define VC_MEM_TO_ARM_ADDR_MASK 0x3FFFFFFF
+
+extern unsigned long mm_vc_mem_phys_addr;
+extern unsigned int mm_vc_mem_size;
+extern int vc_mem_get_current_size(void);
+#endif
+
+#ifdef CONFIG_COMPAT
+#define VC_MEM_IOC_MEM_PHYS_ADDR32 _IOR(VC_MEM_IOC_MAGIC, 0, compat_ulong_t)
+#endif
+
+#endif /* _VC_MEM_H */
--
2.44.0

View file

@ -1,310 +0,0 @@
From a7bebe53ea70778389d162a6a25aa5707f083747 Mon Sep 17 00:00:00 2001
From: Luke Wren <luke@raspberrypi.org>
Date: Fri, 21 Aug 2015 23:14:48 +0100
Subject: [PATCH 0096/1002] Add /dev/gpiomem device for rootless user GPIO
access
Signed-off-by: Luke Wren <luke@raspberrypi.org>
bcm2835-gpiomem: Fix for ARCH_BCM2835 builds
Build on ARCH_BCM2835, and fail to probe if no IO resource.
See: https://github.com/raspberrypi/linux/issues/1154
---
drivers/char/broadcom/Kconfig | 8 +
drivers/char/broadcom/Makefile | 1 +
drivers/char/broadcom/bcm2835-gpiomem.c | 258 ++++++++++++++++++++++++
3 files changed, 267 insertions(+)
create mode 100644 drivers/char/broadcom/bcm2835-gpiomem.c
diff --git a/drivers/char/broadcom/Kconfig b/drivers/char/broadcom/Kconfig
index fc1315209dab..13d4fce859ac 100644
--- a/drivers/char/broadcom/Kconfig
+++ b/drivers/char/broadcom/Kconfig
@@ -16,3 +16,11 @@ config BCM2708_VCMEM
Helper for videocore memory access and total size allocation.
endif
+
+config BCM2835_DEVGPIOMEM
+ tristate "/dev/gpiomem rootless GPIO access via mmap() on the BCM2835"
+ default m
+ help
+ Provides users with root-free access to the GPIO registers
+ on the 2835. Calling mmap(/dev/gpiomem) will map the GPIO
+ register page to the user's pointer.
diff --git a/drivers/char/broadcom/Makefile b/drivers/char/broadcom/Makefile
index 06c5c8ad00e7..c8747a4a11e7 100644
--- a/drivers/char/broadcom/Makefile
+++ b/drivers/char/broadcom/Makefile
@@ -1 +1,2 @@
obj-$(CONFIG_BCM2708_VCMEM) += vc_mem.o
+obj-$(CONFIG_BCM2835_DEVGPIOMEM)+= bcm2835-gpiomem.o
diff --git a/drivers/char/broadcom/bcm2835-gpiomem.c b/drivers/char/broadcom/bcm2835-gpiomem.c
new file mode 100644
index 000000000000..87b4da3bef6f
--- /dev/null
+++ b/drivers/char/broadcom/bcm2835-gpiomem.c
@@ -0,0 +1,258 @@
+/**
+ * GPIO memory device driver
+ *
+ * Creates a chardev /dev/gpiomem which will provide user access to
+ * the BCM2835's GPIO registers when it is mmap()'d.
+ * No longer need root for user GPIO access, but without relaxing permissions
+ * on /dev/mem.
+ *
+ * Written by Luke Wren <luke@raspberrypi.org>
+ * Copyright (c) 2015, Raspberry Pi (Trading) Ltd.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ * notice, this list of conditions, and the following disclaimer,
+ * without modification.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ * 3. The names of the above-listed copyright holders may not be used
+ * to endorse or promote products derived from this software without
+ * specific prior written permission.
+ *
+ * ALTERNATIVELY, this software may be distributed under the terms of the
+ * GNU General Public License ("GPL") version 2, as published by the Free
+ * Software Foundation.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS
+ * IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
+ * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
+ * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
+ * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
+ * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
+ * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR
+ * PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF
+ * LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING
+ * NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
+ * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+#include <linux/kernel.h>
+#include <linux/module.h>
+#include <linux/of.h>
+#include <linux/platform_device.h>
+#include <linux/mm.h>
+#include <linux/slab.h>
+#include <linux/cdev.h>
+#include <linux/pagemap.h>
+#include <linux/io.h>
+
+#define DEVICE_NAME "bcm2835-gpiomem"
+#define DRIVER_NAME "gpiomem-bcm2835"
+#define DEVICE_MINOR 0
+
+struct bcm2835_gpiomem_instance {
+ unsigned long gpio_regs_phys;
+ struct device *dev;
+};
+
+static struct cdev bcm2835_gpiomem_cdev;
+static dev_t bcm2835_gpiomem_devid;
+static struct class *bcm2835_gpiomem_class;
+static struct device *bcm2835_gpiomem_dev;
+static struct bcm2835_gpiomem_instance *inst;
+
+
+/****************************************************************************
+*
+* GPIO mem chardev file ops
+*
+***************************************************************************/
+
+static int bcm2835_gpiomem_open(struct inode *inode, struct file *file)
+{
+ int dev = iminor(inode);
+ int ret = 0;
+
+ if (dev != DEVICE_MINOR) {
+ dev_err(inst->dev, "Unknown minor device: %d", dev);
+ ret = -ENXIO;
+ }
+ return ret;
+}
+
+static int bcm2835_gpiomem_release(struct inode *inode, struct file *file)
+{
+ int dev = iminor(inode);
+ int ret = 0;
+
+ if (dev != DEVICE_MINOR) {
+ dev_err(inst->dev, "Unknown minor device %d", dev);
+ ret = -ENXIO;
+ }
+ return ret;
+}
+
+static const struct vm_operations_struct bcm2835_gpiomem_vm_ops = {
+#ifdef CONFIG_HAVE_IOREMAP_PROT
+ .access = generic_access_phys
+#endif
+};
+
+static int bcm2835_gpiomem_mmap(struct file *file, struct vm_area_struct *vma)
+{
+ /* Ignore what the user says - they're getting the GPIO regs
+ whether they like it or not! */
+ unsigned long gpio_page = inst->gpio_regs_phys >> PAGE_SHIFT;
+
+ vma->vm_page_prot = phys_mem_access_prot(file, gpio_page,
+ PAGE_SIZE,
+ vma->vm_page_prot);
+ vma->vm_ops = &bcm2835_gpiomem_vm_ops;
+ if (remap_pfn_range(vma, vma->vm_start,
+ gpio_page,
+ PAGE_SIZE,
+ vma->vm_page_prot)) {
+ return -EAGAIN;
+ }
+ return 0;
+}
+
+static const struct file_operations
+bcm2835_gpiomem_fops = {
+ .owner = THIS_MODULE,
+ .open = bcm2835_gpiomem_open,
+ .release = bcm2835_gpiomem_release,
+ .mmap = bcm2835_gpiomem_mmap,
+};
+
+
+ /****************************************************************************
+*
+* Probe and remove functions
+*
+***************************************************************************/
+
+
+static int bcm2835_gpiomem_probe(struct platform_device *pdev)
+{
+ int err;
+ void *ptr_err;
+ struct device *dev = &pdev->dev;
+ struct resource *ioresource;
+
+ /* Allocate buffers and instance data */
+
+ inst = kzalloc(sizeof(struct bcm2835_gpiomem_instance), GFP_KERNEL);
+
+ if (!inst) {
+ err = -ENOMEM;
+ goto failed_inst_alloc;
+ }
+
+ inst->dev = dev;
+
+ ioresource = platform_get_resource(pdev, IORESOURCE_MEM, 0);
+ if (ioresource) {
+ inst->gpio_regs_phys = ioresource->start;
+ } else {
+ dev_err(inst->dev, "failed to get IO resource");
+ err = -ENOENT;
+ goto failed_get_resource;
+ }
+
+ /* Create character device entries */
+
+ err = alloc_chrdev_region(&bcm2835_gpiomem_devid,
+ DEVICE_MINOR, 1, DEVICE_NAME);
+ if (err != 0) {
+ dev_err(inst->dev, "unable to allocate device number");
+ goto failed_alloc_chrdev;
+ }
+ cdev_init(&bcm2835_gpiomem_cdev, &bcm2835_gpiomem_fops);
+ bcm2835_gpiomem_cdev.owner = THIS_MODULE;
+ err = cdev_add(&bcm2835_gpiomem_cdev, bcm2835_gpiomem_devid, 1);
+ if (err != 0) {
+ dev_err(inst->dev, "unable to register device");
+ goto failed_cdev_add;
+ }
+
+ /* Create sysfs entries */
+
+ bcm2835_gpiomem_class = class_create(DEVICE_NAME);
+ ptr_err = bcm2835_gpiomem_class;
+ if (IS_ERR(ptr_err))
+ goto failed_class_create;
+
+ bcm2835_gpiomem_dev = device_create(bcm2835_gpiomem_class, NULL,
+ bcm2835_gpiomem_devid, NULL,
+ "gpiomem");
+ ptr_err = bcm2835_gpiomem_dev;
+ if (IS_ERR(ptr_err))
+ goto failed_device_create;
+
+ dev_info(inst->dev, "Initialised: Registers at 0x%08lx",
+ inst->gpio_regs_phys);
+
+ return 0;
+
+failed_device_create:
+ class_destroy(bcm2835_gpiomem_class);
+failed_class_create:
+ cdev_del(&bcm2835_gpiomem_cdev);
+ err = PTR_ERR(ptr_err);
+failed_cdev_add:
+ unregister_chrdev_region(bcm2835_gpiomem_devid, 1);
+failed_alloc_chrdev:
+failed_get_resource:
+ kfree(inst);
+failed_inst_alloc:
+ dev_err(inst->dev, "could not load bcm2835_gpiomem");
+ return err;
+}
+
+static int bcm2835_gpiomem_remove(struct platform_device *pdev)
+{
+ struct device *dev = inst->dev;
+
+ kfree(inst);
+ device_destroy(bcm2835_gpiomem_class, bcm2835_gpiomem_devid);
+ class_destroy(bcm2835_gpiomem_class);
+ cdev_del(&bcm2835_gpiomem_cdev);
+ unregister_chrdev_region(bcm2835_gpiomem_devid, 1);
+
+ dev_info(dev, "GPIO mem driver removed - OK");
+ return 0;
+}
+
+ /****************************************************************************
+*
+* Register the driver with device tree
+*
+***************************************************************************/
+
+static const struct of_device_id bcm2835_gpiomem_of_match[] = {
+ {.compatible = "brcm,bcm2835-gpiomem",},
+ { /* sentinel */ },
+};
+
+MODULE_DEVICE_TABLE(of, bcm2835_gpiomem_of_match);
+
+static struct platform_driver bcm2835_gpiomem_driver = {
+ .probe = bcm2835_gpiomem_probe,
+ .remove = bcm2835_gpiomem_remove,
+ .driver = {
+ .name = DRIVER_NAME,
+ .owner = THIS_MODULE,
+ .of_match_table = bcm2835_gpiomem_of_match,
+ },
+};
+
+module_platform_driver(bcm2835_gpiomem_driver);
+
+MODULE_ALIAS("platform:gpiomem-bcm2835");
+MODULE_LICENSE("GPL");
+MODULE_DESCRIPTION("gpiomem driver for accessing GPIO from userspace");
+MODULE_AUTHOR("Luke Wren <luke@raspberrypi.org>");
--
2.44.0

File diff suppressed because it is too large Load diff

View file

@ -1,670 +0,0 @@
From 9c9cb5da42ce373216dea9368282c3d8f8da810d Mon Sep 17 00:00:00 2001
From: popcornmix <popcornmix@gmail.com>
Date: Wed, 17 Jun 2015 15:44:08 +0100
Subject: [PATCH 0098/1002] Add Chris Boot's i2c driver
MIME-Version: 1.0
Content-Type: text/plain; charset=UTF-8
Content-Transfer-Encoding: 8bit
i2c-bcm2708: fixed baudrate
Fixed issue where the wrong CDIV value was set for baudrates below 3815 Hz (for 250MHz bus clock).
In that case the computed CDIV value was more than 0xffff. However the CDIV register width is only 16 bits.
This resulted in incorrect setting of CDIV and higher baudrate than intended.
Example: 3500Hz -> CDIV=0x11704 -> CDIV(16bit)=0x1704 -> 42430Hz
After correction: 3500Hz -> CDIV=0x11704 -> CDIV(16bit)=0xffff -> 3815Hz
The correct baudrate is shown in the log after the cdiv > 0xffff correction.
Perform I2C combined transactions when possible
Perform I2C combined transactions whenever possible, within the
restrictions of the Broadcomm Serial Controller.
Disable DONE interrupt during TA poll
Prevent interrupt from being triggered if poll is missed and transfer
starts and finishes.
i2c: Make combined transactions optional and disabled by default
i2c: bcm2708: add device tree support
Add DT support to driver and add to .dtsi file.
Setup pins in .dts file.
i2c is disabled by default.
Signed-off-by: Noralf Tronnes <notro@tronnes.org>
bcm2708: don't register i2c controllers when using DT
The devices for the i2c controllers are in the Device Tree.
Only register devices when not using DT.
Signed-off-by: Noralf Tronnes <notro@tronnes.org>
I2C: Only register the I2C device for the current board revision
i2c_bcm2708: Fix clock reference counting
Fix grabbing lock from atomic context in i2c driver
2 main changes:
- check for timeouts in the bcm2708_bsc_setup function as indicated by this comment:
/* poll for transfer start bit (should only take 1-20 polls) */
This implies that the setup function can now fail so account for this everywhere it's called
- Removed the clk_get_rate call from inside the setup function as it locks a mutex and that's not ok since we call it from under a spin lock.
i2c-bcm2708: When using DT, leave the GPIO setup to pinctrl
i2c-bcm2708: Increase timeouts to allow larger transfers
Use the timeout value provided by the I2C_TIMEOUT ioctl when waiting
for completion. The default timeout is 1 second.
See: https://github.com/raspberrypi/linux/issues/260
i2c-bcm2708/BCM270X_DT: Add support for I2C2
The third I2C bus (I2C2) is normally reserved for HDMI use. Careless
use of this bus can break an attached display - use with caution.
It is recommended to disable accesses by VideoCore by setting
hdmi_ignore_edid=1 or hdmi_edid_file=1 in config.txt.
The interface is disabled by default - enable using the
i2c2_iknowwhatimdoing DT parameter.
bcm2708-spi: Don't use static pin configuration with DT
Also remove superfluous error checking - the SPI framework ensures the
validity of the chip_select value.
i2c-bcm2708: Remove non-DT support
Signed-off-by: Noralf Trønnes <noralf@tronnes.org>
Set the BSC_CLKT clock streching timeout to 35ms as per SMBus specs.
Fixes i2c_bcm2708: Write to FIFO correctly - v2 (#1574)
* i2c: fix i2c_bcm2708: Clear FIFO before sending data
Make sure FIFO gets cleared before trying to send
data in case of a repeated start (COMBINED=Y).
* i2c: fix i2c_bcm2708: Only write to FIFO when not full
Check if FIFO can accept data before writing.
To avoid a peripheral read on the last iteration of a loop,
both bcm2708_bsc_fifo_fill and ~drain are changed as well.
---
drivers/i2c/busses/Kconfig | 19 ++
drivers/i2c/busses/Makefile | 2 +
drivers/i2c/busses/i2c-bcm2708.c | 512 +++++++++++++++++++++++++++++++
3 files changed, 533 insertions(+)
create mode 100644 drivers/i2c/busses/i2c-bcm2708.c
diff --git a/drivers/i2c/busses/Kconfig b/drivers/i2c/busses/Kconfig
index 97d27e01a6ee..4883982150fc 100644
--- a/drivers/i2c/busses/Kconfig
+++ b/drivers/i2c/busses/Kconfig
@@ -16,6 +16,25 @@ config I2C_CCGX_UCSI
for Cypress CCGx Type-C controller. Individual bus drivers
need to select this one on demand.
+config I2C_BCM2708
+ tristate "BCM2708 BSC"
+ depends on ARCH_BCM2835
+ help
+ Enabling this option will add BSC (Broadcom Serial Controller)
+ support for the BCM2708. BSC is a Broadcom proprietary bus compatible
+ with I2C/TWI/SMBus.
+
+config I2C_BCM2708_BAUDRATE
+ prompt "BCM2708 I2C baudrate"
+ depends on I2C_BCM2708
+ int
+ default 100000
+ help
+ Set the I2C baudrate. This will alter the default value. A
+ different baudrate can be set by using a module parameter as well. If
+ no parameter is provided when loading, this is the value that will be
+ used.
+
config I2C_ALI1535
tristate "ALI 1535"
depends on PCI
diff --git a/drivers/i2c/busses/Makefile b/drivers/i2c/busses/Makefile
index 9be9fdb07f3d..7bc3bed0668a 100644
--- a/drivers/i2c/busses/Makefile
+++ b/drivers/i2c/busses/Makefile
@@ -3,6 +3,8 @@
# Makefile for the i2c bus drivers.
#
+obj-$(CONFIG_I2C_BCM2708) += i2c-bcm2708.o
+
# ACPI drivers
obj-$(CONFIG_I2C_SCMI) += i2c-scmi.o
diff --git a/drivers/i2c/busses/i2c-bcm2708.c b/drivers/i2c/busses/i2c-bcm2708.c
new file mode 100644
index 000000000000..962f2e5c7455
--- /dev/null
+++ b/drivers/i2c/busses/i2c-bcm2708.c
@@ -0,0 +1,512 @@
+/*
+ * Driver for Broadcom BCM2708 BSC Controllers
+ *
+ * Copyright (C) 2012 Chris Boot & Frank Buss
+ *
+ * This driver is inspired by:
+ * i2c-ocores.c, by Peter Korsgaard <jacmet@sunsite.dk>
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
+ */
+
+#include <linux/kernel.h>
+#include <linux/module.h>
+#include <linux/spinlock.h>
+#include <linux/clk.h>
+#include <linux/err.h>
+#include <linux/of.h>
+#include <linux/platform_device.h>
+#include <linux/io.h>
+#include <linux/slab.h>
+#include <linux/i2c.h>
+#include <linux/interrupt.h>
+#include <linux/sched.h>
+#include <linux/wait.h>
+
+/* BSC register offsets */
+#define BSC_C 0x00
+#define BSC_S 0x04
+#define BSC_DLEN 0x08
+#define BSC_A 0x0c
+#define BSC_FIFO 0x10
+#define BSC_DIV 0x14
+#define BSC_DEL 0x18
+#define BSC_CLKT 0x1c
+
+/* Bitfields in BSC_C */
+#define BSC_C_I2CEN 0x00008000
+#define BSC_C_INTR 0x00000400
+#define BSC_C_INTT 0x00000200
+#define BSC_C_INTD 0x00000100
+#define BSC_C_ST 0x00000080
+#define BSC_C_CLEAR_1 0x00000020
+#define BSC_C_CLEAR_2 0x00000010
+#define BSC_C_READ 0x00000001
+
+/* Bitfields in BSC_S */
+#define BSC_S_CLKT 0x00000200
+#define BSC_S_ERR 0x00000100
+#define BSC_S_RXF 0x00000080
+#define BSC_S_TXE 0x00000040
+#define BSC_S_RXD 0x00000020
+#define BSC_S_TXD 0x00000010
+#define BSC_S_RXR 0x00000008
+#define BSC_S_TXW 0x00000004
+#define BSC_S_DONE 0x00000002
+#define BSC_S_TA 0x00000001
+
+#define I2C_WAIT_LOOP_COUNT 200
+
+#define DRV_NAME "bcm2708_i2c"
+
+static unsigned int baudrate;
+module_param(baudrate, uint, S_IRUSR | S_IWUSR | S_IRGRP | S_IWGRP);
+MODULE_PARM_DESC(baudrate, "The I2C baudrate");
+
+static bool combined = false;
+module_param(combined, bool, 0644);
+MODULE_PARM_DESC(combined, "Use combined transactions");
+
+struct bcm2708_i2c {
+ struct i2c_adapter adapter;
+
+ spinlock_t lock;
+ void __iomem *base;
+ int irq;
+ struct clk *clk;
+ u32 cdiv;
+ u32 clk_tout;
+
+ struct completion done;
+
+ struct i2c_msg *msg;
+ int pos;
+ int nmsgs;
+ bool error;
+};
+
+static inline u32 bcm2708_rd(struct bcm2708_i2c *bi, unsigned reg)
+{
+ return readl(bi->base + reg);
+}
+
+static inline void bcm2708_wr(struct bcm2708_i2c *bi, unsigned reg, u32 val)
+{
+ writel(val, bi->base + reg);
+}
+
+static inline void bcm2708_bsc_reset(struct bcm2708_i2c *bi)
+{
+ bcm2708_wr(bi, BSC_C, 0);
+ bcm2708_wr(bi, BSC_S, BSC_S_CLKT | BSC_S_ERR | BSC_S_DONE);
+}
+
+static inline void bcm2708_bsc_fifo_drain(struct bcm2708_i2c *bi)
+{
+ while ((bi->pos < bi->msg->len) && (bcm2708_rd(bi, BSC_S) & BSC_S_RXD))
+ bi->msg->buf[bi->pos++] = bcm2708_rd(bi, BSC_FIFO);
+}
+
+static inline void bcm2708_bsc_fifo_fill(struct bcm2708_i2c *bi)
+{
+ while ((bi->pos < bi->msg->len) && (bcm2708_rd(bi, BSC_S) & BSC_S_TXD))
+ bcm2708_wr(bi, BSC_FIFO, bi->msg->buf[bi->pos++]);
+}
+
+static inline int bcm2708_bsc_setup(struct bcm2708_i2c *bi)
+{
+ u32 cdiv, s, clk_tout;
+ u32 c = BSC_C_I2CEN | BSC_C_INTD | BSC_C_ST | BSC_C_CLEAR_1;
+ int wait_loops = I2C_WAIT_LOOP_COUNT;
+
+ /* Can't call clk_get_rate as it locks a mutex and here we are spinlocked.
+ * Use the value that we cached in the probe.
+ */
+ cdiv = bi->cdiv;
+ clk_tout = bi->clk_tout;
+
+ if (bi->msg->flags & I2C_M_RD)
+ c |= BSC_C_INTR | BSC_C_READ;
+ else
+ c |= BSC_C_INTT;
+
+ bcm2708_wr(bi, BSC_CLKT, clk_tout);
+ bcm2708_wr(bi, BSC_DIV, cdiv);
+ bcm2708_wr(bi, BSC_A, bi->msg->addr);
+ bcm2708_wr(bi, BSC_DLEN, bi->msg->len);
+ if (combined)
+ {
+ /* Do the next two messages meet combined transaction criteria?
+ - Current message is a write, next message is a read
+ - Both messages to same slave address
+ - Write message can fit inside FIFO (16 bytes or less) */
+ if ( (bi->nmsgs > 1) &&
+ !(bi->msg[0].flags & I2C_M_RD) && (bi->msg[1].flags & I2C_M_RD) &&
+ (bi->msg[0].addr == bi->msg[1].addr) && (bi->msg[0].len <= 16)) {
+
+ /* Clear FIFO */
+ bcm2708_wr(bi, BSC_C, BSC_C_CLEAR_1);
+
+ /* Fill FIFO with entire write message (16 byte FIFO) */
+ while (bi->pos < bi->msg->len) {
+ bcm2708_wr(bi, BSC_FIFO, bi->msg->buf[bi->pos++]);
+ }
+ /* Start write transfer (no interrupts, don't clear FIFO) */
+ bcm2708_wr(bi, BSC_C, BSC_C_I2CEN | BSC_C_ST);
+
+ /* poll for transfer start bit (should only take 1-20 polls) */
+ do {
+ s = bcm2708_rd(bi, BSC_S);
+ } while (!(s & (BSC_S_TA | BSC_S_ERR | BSC_S_CLKT | BSC_S_DONE)) && --wait_loops >= 0);
+
+ /* did we time out or some error occured? */
+ if (wait_loops < 0 || (s & (BSC_S_ERR | BSC_S_CLKT))) {
+ return -1;
+ }
+
+ /* Send next read message before the write transfer finishes. */
+ bi->nmsgs--;
+ bi->msg++;
+ bi->pos = 0;
+ bcm2708_wr(bi, BSC_DLEN, bi->msg->len);
+ c = BSC_C_I2CEN | BSC_C_INTD | BSC_C_INTR | BSC_C_ST | BSC_C_READ;
+ }
+ }
+ bcm2708_wr(bi, BSC_C, c);
+
+ return 0;
+}
+
+static irqreturn_t bcm2708_i2c_interrupt(int irq, void *dev_id)
+{
+ struct bcm2708_i2c *bi = dev_id;
+ bool handled = true;
+ u32 s;
+ int ret;
+
+ spin_lock(&bi->lock);
+
+ /* we may see camera interrupts on the "other" I2C channel
+ Just return if we've not sent anything */
+ if (!bi->nmsgs || !bi->msg) {
+ goto early_exit;
+ }
+
+ s = bcm2708_rd(bi, BSC_S);
+
+ if (s & (BSC_S_CLKT | BSC_S_ERR)) {
+ bcm2708_bsc_reset(bi);
+ bi->error = true;
+
+ bi->msg = 0; /* to inform the that all work is done */
+ bi->nmsgs = 0;
+ /* wake up our bh */
+ complete(&bi->done);
+ } else if (s & BSC_S_DONE) {
+ bi->nmsgs--;
+
+ if (bi->msg->flags & I2C_M_RD) {
+ bcm2708_bsc_fifo_drain(bi);
+ }
+
+ bcm2708_bsc_reset(bi);
+
+ if (bi->nmsgs) {
+ /* advance to next message */
+ bi->msg++;
+ bi->pos = 0;
+ ret = bcm2708_bsc_setup(bi);
+ if (ret < 0) {
+ bcm2708_bsc_reset(bi);
+ bi->error = true;
+ bi->msg = 0; /* to inform the that all work is done */
+ bi->nmsgs = 0;
+ /* wake up our bh */
+ complete(&bi->done);
+ goto early_exit;
+ }
+ } else {
+ bi->msg = 0; /* to inform the that all work is done */
+ bi->nmsgs = 0;
+ /* wake up our bh */
+ complete(&bi->done);
+ }
+ } else if (s & BSC_S_TXW) {
+ bcm2708_bsc_fifo_fill(bi);
+ } else if (s & BSC_S_RXR) {
+ bcm2708_bsc_fifo_drain(bi);
+ } else {
+ handled = false;
+ }
+
+early_exit:
+ spin_unlock(&bi->lock);
+
+ return handled ? IRQ_HANDLED : IRQ_NONE;
+}
+
+static int bcm2708_i2c_master_xfer(struct i2c_adapter *adap,
+ struct i2c_msg *msgs, int num)
+{
+ struct bcm2708_i2c *bi = adap->algo_data;
+ unsigned long flags;
+ int ret;
+
+ spin_lock_irqsave(&bi->lock, flags);
+
+ reinit_completion(&bi->done);
+ bi->msg = msgs;
+ bi->pos = 0;
+ bi->nmsgs = num;
+ bi->error = false;
+
+ ret = bcm2708_bsc_setup(bi);
+
+ spin_unlock_irqrestore(&bi->lock, flags);
+
+ /* check the result of the setup */
+ if (ret < 0)
+ {
+ dev_err(&adap->dev, "transfer setup timed out\n");
+ goto error_timeout;
+ }
+
+ ret = wait_for_completion_timeout(&bi->done, adap->timeout);
+ if (ret == 0) {
+ dev_err(&adap->dev, "transfer timed out\n");
+ goto error_timeout;
+ }
+
+ ret = bi->error ? -EIO : num;
+ return ret;
+
+error_timeout:
+ spin_lock_irqsave(&bi->lock, flags);
+ bcm2708_bsc_reset(bi);
+ bi->msg = 0; /* to inform the interrupt handler that there's nothing else to be done */
+ bi->nmsgs = 0;
+ spin_unlock_irqrestore(&bi->lock, flags);
+ return -ETIMEDOUT;
+}
+
+static u32 bcm2708_i2c_functionality(struct i2c_adapter *adap)
+{
+ return I2C_FUNC_I2C | /*I2C_FUNC_10BIT_ADDR |*/ I2C_FUNC_SMBUS_EMUL;
+}
+
+static struct i2c_algorithm bcm2708_i2c_algorithm = {
+ .master_xfer = bcm2708_i2c_master_xfer,
+ .functionality = bcm2708_i2c_functionality,
+};
+
+static int bcm2708_i2c_probe(struct platform_device *pdev)
+{
+ struct resource *regs;
+ int irq, err = -ENOMEM;
+ struct clk *clk;
+ struct bcm2708_i2c *bi;
+ struct i2c_adapter *adap;
+ unsigned long bus_hz;
+ u32 cdiv, clk_tout;
+ u32 baud;
+
+ baud = CONFIG_I2C_BCM2708_BAUDRATE;
+
+ if (pdev->dev.of_node) {
+ u32 bus_clk_rate;
+ pdev->id = of_alias_get_id(pdev->dev.of_node, "i2c");
+ if (pdev->id < 0) {
+ dev_err(&pdev->dev, "alias is missing\n");
+ return -EINVAL;
+ }
+ if (!of_property_read_u32(pdev->dev.of_node,
+ "clock-frequency", &bus_clk_rate))
+ baud = bus_clk_rate;
+ else
+ dev_warn(&pdev->dev,
+ "Could not read clock-frequency property\n");
+ }
+
+ if (baudrate)
+ baud = baudrate;
+
+ regs = platform_get_resource(pdev, IORESOURCE_MEM, 0);
+ if (!regs) {
+ dev_err(&pdev->dev, "could not get IO memory\n");
+ return -ENXIO;
+ }
+
+ irq = platform_get_irq(pdev, 0);
+ if (irq < 0) {
+ dev_err(&pdev->dev, "could not get IRQ\n");
+ return irq;
+ }
+
+ clk = clk_get(&pdev->dev, NULL);
+ if (IS_ERR(clk)) {
+ dev_err(&pdev->dev, "could not find clk: %ld\n", PTR_ERR(clk));
+ return PTR_ERR(clk);
+ }
+
+ err = clk_prepare_enable(clk);
+ if (err) {
+ dev_err(&pdev->dev, "could not enable clk: %d\n", err);
+ goto out_clk_put;
+ }
+
+ bi = kzalloc(sizeof(*bi), GFP_KERNEL);
+ if (!bi)
+ goto out_clk_disable;
+
+ platform_set_drvdata(pdev, bi);
+
+ adap = &bi->adapter;
+ adap->class = I2C_CLASS_HWMON | I2C_CLASS_DDC;
+ adap->algo = &bcm2708_i2c_algorithm;
+ adap->algo_data = bi;
+ adap->dev.parent = &pdev->dev;
+ adap->nr = pdev->id;
+ strlcpy(adap->name, dev_name(&pdev->dev), sizeof(adap->name));
+ adap->dev.of_node = pdev->dev.of_node;
+
+ switch (pdev->id) {
+ case 0:
+ adap->class = I2C_CLASS_HWMON;
+ break;
+ case 1:
+ adap->class = I2C_CLASS_DDC;
+ break;
+ case 2:
+ adap->class = I2C_CLASS_DDC;
+ break;
+ default:
+ dev_err(&pdev->dev, "can only bind to BSC 0, 1 or 2\n");
+ err = -ENXIO;
+ goto out_free_bi;
+ }
+
+ spin_lock_init(&bi->lock);
+ init_completion(&bi->done);
+
+ bi->base = ioremap(regs->start, resource_size(regs));
+ if (!bi->base) {
+ dev_err(&pdev->dev, "could not remap memory\n");
+ goto out_free_bi;
+ }
+
+ bi->irq = irq;
+ bi->clk = clk;
+
+ err = request_irq(irq, bcm2708_i2c_interrupt, IRQF_SHARED,
+ dev_name(&pdev->dev), bi);
+ if (err) {
+ dev_err(&pdev->dev, "could not request IRQ: %d\n", err);
+ goto out_iounmap;
+ }
+
+ bcm2708_bsc_reset(bi);
+
+ err = i2c_add_numbered_adapter(adap);
+ if (err < 0) {
+ dev_err(&pdev->dev, "could not add I2C adapter: %d\n", err);
+ goto out_free_irq;
+ }
+
+ bus_hz = clk_get_rate(bi->clk);
+ cdiv = bus_hz / baud;
+ if (cdiv > 0xffff) {
+ cdiv = 0xffff;
+ baud = bus_hz / cdiv;
+ }
+
+ clk_tout = 35/1000*baud; //35ms timeout as per SMBus specs.
+ if (clk_tout > 0xffff)
+ clk_tout = 0xffff;
+
+ bi->cdiv = cdiv;
+ bi->clk_tout = clk_tout;
+
+ dev_info(&pdev->dev, "BSC%d Controller at 0x%08lx (irq %d) (baudrate %d)\n",
+ pdev->id, (unsigned long)regs->start, irq, baud);
+
+ return 0;
+
+out_free_irq:
+ free_irq(bi->irq, bi);
+out_iounmap:
+ iounmap(bi->base);
+out_free_bi:
+ kfree(bi);
+out_clk_disable:
+ clk_disable_unprepare(clk);
+out_clk_put:
+ clk_put(clk);
+ return err;
+}
+
+static int bcm2708_i2c_remove(struct platform_device *pdev)
+{
+ struct bcm2708_i2c *bi = platform_get_drvdata(pdev);
+
+ platform_set_drvdata(pdev, NULL);
+
+ i2c_del_adapter(&bi->adapter);
+ free_irq(bi->irq, bi);
+ iounmap(bi->base);
+ clk_disable_unprepare(bi->clk);
+ clk_put(bi->clk);
+ kfree(bi);
+
+ return 0;
+}
+
+static const struct of_device_id bcm2708_i2c_of_match[] = {
+ { .compatible = "brcm,bcm2708-i2c" },
+ {},
+};
+MODULE_DEVICE_TABLE(of, bcm2708_i2c_of_match);
+
+static struct platform_driver bcm2708_i2c_driver = {
+ .driver = {
+ .name = DRV_NAME,
+ .owner = THIS_MODULE,
+ .of_match_table = bcm2708_i2c_of_match,
+ },
+ .probe = bcm2708_i2c_probe,
+ .remove = bcm2708_i2c_remove,
+};
+
+// module_platform_driver(bcm2708_i2c_driver);
+
+
+static int __init bcm2708_i2c_init(void)
+{
+ return platform_driver_register(&bcm2708_i2c_driver);
+}
+
+static void __exit bcm2708_i2c_exit(void)
+{
+ platform_driver_unregister(&bcm2708_i2c_driver);
+}
+
+module_init(bcm2708_i2c_init);
+module_exit(bcm2708_i2c_exit);
+
+
+
+MODULE_DESCRIPTION("BSC controller driver for Broadcom BCM2708");
+MODULE_AUTHOR("Chris Boot <bootc@bootc.net>");
+MODULE_LICENSE("GPL v2");
+MODULE_ALIAS("platform:" DRV_NAME);
--
2.44.0

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