mirror of
https://github.com/Ysurac/openmptcprouter.git
synced 2025-03-09 15:40:20 +00:00
Merge branch 'develop'
This commit is contained in:
suyuan
commit
754d6df0df
135 changed files with 450889 additions and 959 deletions
6
build.sh
6
build.sh
|
|
@ -42,7 +42,7 @@ OMR_KERNEL=${OMR_KERNEL:-5.4}
|
|||
OMR_RELEASE=${OMR_RELEASE:-$(git describe --tags `git rev-list --tags --max-count=1` | tail -1 | cut -d '-' -f1)}
|
||||
OMR_REPO=${OMR_REPO:-http://$OMR_HOST:$OMR_PORT/release/$OMR_RELEASE/$OMR_TARGET}
|
||||
|
||||
OMR_FEED_URL="${OMR_FEED_URL:-https://github.com/suyuan168/openmptcprouter-feeds}"
|
||||
OMR_FEED_URL="${OMR_FEED_URL:-https://github.com/suyuan168/openmptcprouter-feeds}}"
|
||||
OMR_FEED_SRC="${OMR_FEED_SRC:-develop}"
|
||||
|
||||
CUSTOM_FEED_URL="${CUSTOM_FEED_URL}"
|
||||
|
|
@ -337,6 +337,7 @@ cd "$OMR_TARGET/source"
|
|||
echo "Update feeds index"
|
||||
cp .config .config.keep
|
||||
scripts/feeds clean
|
||||
scripts/feeds install -a
|
||||
scripts/feeds update -a
|
||||
|
||||
#cd -
|
||||
|
|
@ -347,8 +348,7 @@ scripts/feeds update -a
|
|||
#fi
|
||||
#echo "Done"
|
||||
#cd "$OMR_TARGET/source"
|
||||
scripts/feeds install -a
|
||||
scripts/feeds update -a
|
||||
|
||||
if [ "$OMR_ALL_PACKAGES" = "yes" ]; then
|
||||
scripts/feeds install -a -d m -p packages
|
||||
scripts/feeds install -a -d m -p luci
|
||||
|
|
|
|||
6
config
6
config
|
|
@ -210,9 +210,9 @@ CONFIG_KERNEL_MPTCP_REDUNDANT=y
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|||
CONFIG_KERNEL_DEFAULT_SCHEDULER=y
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||||
CONFIG_KERNEL_MPTCP=y
|
||||
CONFIG_KERNEL_CRYPTO_SHA256=y
|
||||
CONFIG_LUCI_LANG_en=y
|
||||
CONFIG_LUCI_LANG_zh_Hans=y
|
||||
CONFIG_LUCI_LANG_zh_Hant=y
|
||||
CONFIG_LUCI_LANG_zh-tw=y
|
||||
CONFIG_TARGET_ROOTFS_PARTSIZE=512
|
||||
CONFIG_TARGET_KERNEL_PARTSIZE=64
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||||
CONFIG_OPENSSL_WITH_CHACHA_POLY1305=y
|
||||
|
|
@ -221,7 +221,8 @@ CONFIG_OPENSSL_WITH_CHACHA_POLY1305=y
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|||
# CONFIG_PACKAGE_libustream-wolfssl is not set
|
||||
CONFIG_KERNEL_DEVMEM=y
|
||||
CONFIG_KERNEL_DEVKMEM=y
|
||||
# CONFIG_PACKAGE_luci-theme-argon=y
|
||||
CONFIG_AUTOREMOVE=y
|
||||
CONFIG_PACKAGE_luci-theme-argon=y
|
||||
CONFIG_PACKAGE_luci-theme-bootstrap=y
|
||||
CONFIG_PACKAGE_luci-theme-openwrt-2020=y
|
||||
# CONFIG_PACKAGE_luci-theme-argon is not set
|
||||
|
|
@ -232,4 +233,3 @@ CONFIG_PACKAGE_rtty-nossl=y
|
|||
CONFIG_PACKAGE_minicom=y
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||||
CONFIG_PACKAGE_irqbalance=y
|
||||
CONFIG_PACKAGE_mtr=y
|
||||
CONFIG_AUTOREMOVE=y
|
||||
|
|
|
|||
20
config-bpi-r2
Executable file
20
config-bpi-r2
Executable file
|
|
@ -0,0 +1,20 @@
|
|||
CONFIG_TARGET_mediatek=y
|
||||
CONFIG_TARGET_mediatek_mt7623=y
|
||||
CONFIG_TARGET_mediatek_mt7623_DEVICE_bpi_bananapi-r2=y
|
||||
CONFIG_TARGET_ROOTFS_EXT4FS=y
|
||||
CONFIG_TARGET_ROOTFS_SQUASHFS=y
|
||||
CONFIG_PACKAGE_kmod-cryptodev=y
|
||||
CONFIG_OPENSSL_HARDWARE_SUPPORT=y
|
||||
CONFIG_OPENSSL_ENGINE_CRYPTO=y
|
||||
CONFIG_OPENSSL_ENGINE_DIGEST=y
|
||||
CONFIG_PACKAGE_uboot-envtools=y
|
||||
CONFIG_PACKAGE_attr=y
|
||||
CONFIG_PACKAGE_f2fs-tools=y
|
||||
CONFIG_PACKAGE_f2fsck=y
|
||||
CONFIG_PACKAGE_mkf2fs=y
|
||||
# CONFIG_PACKAGE_kmod-fs-nfs-v3 is not set
|
||||
# CONFIG_PACKAGE_kmod-fs-nfs-v4 is not set
|
||||
# CONFIG_PACKAGE_kmod-rtl8812au-ct is not set
|
||||
# CONFIG_PACKAGE_kmod-mt6625l-bt is not set
|
||||
# CONFIG_PACKAGE_kmod-mt6625l-wlan-gen-2 is not set
|
||||
CONFIG_KERNEL_ARM_MODULE_PLTS=y
|
||||
|
|
@ -1,66 +1,13 @@
|
|||
CONFIG_MODULES=y
|
||||
CONFIG_HAVE_DOT_CONFIG=y
|
||||
CONFIG_TARGET_ipq40xx=y
|
||||
CONFIG_TARGET_ipq40xx_generic=y
|
||||
CONFIG_TARGET_ipq40xx_generic_DEVICE_p2w_r619ac-128m=y
|
||||
CONFIG_HAS_SUBTARGETS=y
|
||||
CONFIG_HAS_DEVICES=y
|
||||
CONFIG_TARGET_BOARD="ipq40xx"
|
||||
CONFIG_TARGET_SUBTARGET="generic"
|
||||
CONFIG_TARGET_PROFILE="DEVICE_p2w_r619ac-128m"
|
||||
CONFIG_TARGET_ARCH_PACKAGES="arm_cortex-a7_neon-vfpv4"
|
||||
CONFIG_DEFAULT_TARGET_OPTIMIZATION="-Os -pipe"
|
||||
CONFIG_CPU_TYPE="cortex-a7+neon-vfpv4"
|
||||
CONFIG_LINUX_5_4=y
|
||||
CONFIG_PACKAGE_kmod-6lowpan=y
|
||||
# CONFIG_KERNEL_CC_OPTIMIZE_FOR_PERFORMANCE is not set
|
||||
CONFIG_KERNEL_CC_OPTIMIZE_FOR_SIZE=y
|
||||
CONFIG_PACKAGE_ipq-wifi-p2w_r619ac=y
|
||||
CONFIG_DEFAULT_ath10k-firmware-qca4019-ct=y
|
||||
CONFIG_DEFAULT_base-files=y
|
||||
CONFIG_DEFAULT_busybox=y
|
||||
CONFIG_DEFAULT_ca-bundle=y
|
||||
CONFIG_DEFAULT_dnsmasq=y
|
||||
CONFIG_DEFAULT_dropbear=y
|
||||
CONFIG_DEFAULT_firewall=y
|
||||
CONFIG_DEFAULT_fstools=y
|
||||
CONFIG_DEFAULT_ip6tables=y
|
||||
CONFIG_DEFAULT_ipq-wifi-p2w_r619ac=y
|
||||
CONFIG_DEFAULT_iptables=y
|
||||
CONFIG_DEFAULT_iwinfo=y
|
||||
CONFIG_DEFAULT_kmod-ath10k-ct=y
|
||||
CONFIG_DEFAULT_kmod-gpio-button-hotplug=y
|
||||
CONFIG_DEFAULT_kmod-ipt-offload=y
|
||||
CONFIG_DEFAULT_kmod-leds-gpio=y
|
||||
CONFIG_DEFAULT_kmod-usb-dwc3=y
|
||||
CONFIG_DEFAULT_kmod-usb-dwc3-qcom=y
|
||||
CONFIG_DEFAULT_kmod-usb3=y
|
||||
CONFIG_DEFAULT_libc=y
|
||||
CONFIG_DEFAULT_libgcc=y
|
||||
CONFIG_DEFAULT_libustream-wolfssl=y
|
||||
CONFIG_DEFAULT_logd=y
|
||||
CONFIG_DEFAULT_mtd=y
|
||||
CONFIG_DEFAULT_netifd=y
|
||||
CONFIG_DEFAULT_odhcp6c=y
|
||||
CONFIG_DEFAULT_odhcpd-ipv6only=y
|
||||
CONFIG_DEFAULT_opkg=y
|
||||
CONFIG_DEFAULT_ppp=y
|
||||
CONFIG_DEFAULT_ppp-mod-pppoe=y
|
||||
CONFIG_DEFAULT_procd=y
|
||||
CONFIG_DEFAULT_swconfig=y
|
||||
CONFIG_DEFAULT_uci=y
|
||||
CONFIG_DEFAULT_uclient-fetch=y
|
||||
CONFIG_DEFAULT_urandom-seed=y
|
||||
CONFIG_DEFAULT_urngd=y
|
||||
CONFIG_DEFAULT_wpad-basic-wolfssl=y
|
||||
CONFIG_HAS_FPU=y
|
||||
CONFIG_AUDIO_SUPPORT=y
|
||||
CONFIG_GPIO_SUPPORT=y
|
||||
CONFIG_PCI_SUPPORT=y
|
||||
CONFIG_PCIE_SUPPORT=y
|
||||
CONFIG_USB_SUPPORT=y
|
||||
CONFIG_RTC_SUPPORT=y
|
||||
CONFIG_USES_DEVICETREE=y
|
||||
CONFIG_USES_INITRAMFS=y
|
||||
CONFIG_USES_SQUASHFS=y
|
||||
CONFIG_NAND_SUPPORT=y
|
||||
CONFIG_arm=y
|
||||
CONFIG_arm_v7=y
|
||||
CONFIG_ARCH="arm"
|
||||
CONFIG_PACKAGE_kmod-ath10k-ct=y
|
||||
CONFIG_ATH10K-CT_LEDS=y
|
||||
CONFIG_PACKAGE_ath10k-firmware-qca4019-ct=y
|
||||
CONFIG_KERNEL_ARM_MODULE_PLTS=y
|
||||
|
|
|
|||
|
|
@ -3,4 +3,4 @@ CONFIG_TARGET_rockchip_armv8=y
|
|||
CONFIG_TARGET_rockchip_armv8_DEVICE_friendlyarm_nanopi-r2s=y
|
||||
CONFIG_PACKAGE_kmod-6lowpan=y
|
||||
CONFIG_KERNEL_ARM_MODULE_PLTS=y
|
||||
CONFIG_KERNEL_TCP_CONG_BBR2=y
|
||||
CONFIG_KERNEL_TCP_CONG_BBR2=y
|
||||
|
|
|
|||
8
config-wrt3200acm
Executable file
8
config-wrt3200acm
Executable file
|
|
@ -0,0 +1,8 @@
|
|||
CONFIG_TARGET_mvebu=y
|
||||
CONFIG_TARGET_mvebu_cortexa9=y
|
||||
CONFIG_TARGET_mvebu_cortexa9_DEVICE_linksys_wrt3200acm=y
|
||||
CONFIG_PACKAGE_kmod-6lowpan=y
|
||||
CONFIG_PACKAGE_luci-app-advanced-reboot=y
|
||||
# CONFIG_KERNEL_CC_OPTIMIZE_FOR_PERFORMANCE is not set
|
||||
CONFIG_KERNEL_CC_OPTIMIZE_FOR_SIZE=y
|
||||
CONFIG_KERNEL_ARM_MODULE_PLTS=y
|
||||
8
config-wrt32x
Executable file
8
config-wrt32x
Executable file
|
|
@ -0,0 +1,8 @@
|
|||
CONFIG_TARGET_mvebu=y
|
||||
CONFIG_TARGET_mvebu_cortexa9=y
|
||||
CONFIG_TARGET_mvebu_cortexa9_DEVICE_linksys_wrt32x=y
|
||||
CONFIG_PACKAGE_kmod-6lowpan=y
|
||||
CONFIG_PACKAGE_luci-app-advanced-reboot=y
|
||||
# CONFIG_KERNEL_CC_OPTIMIZE_FOR_PERFORMANCE is not set
|
||||
CONFIG_KERNEL_CC_OPTIMIZE_FOR_SIZE=y
|
||||
CONFIG_KERNEL_ARM_MODULE_PLTS=y
|
||||
3
config-x86
Normal file → Executable file
3
config-x86
Normal file → Executable file
|
|
@ -1,8 +1,7 @@
|
|||
|
||||
CONFIG_TARGET_x86=y
|
||||
CONFIG_TARGET_x86_generic=y
|
||||
CONFIG_TARGET_x86_generic_Generic=y
|
||||
CONFIG_TARGET_EXT4_JOURNAL=y
|
||||
# CONFIG_TARGET_ROOTFS_TARGZ is not set
|
||||
CONFIG_PACKAGE_open-vm-tools=m
|
||||
CONFIG_PACKAGE_kmod-ath9k=y
|
||||
CONFIG_PACKAGE_kmod-ath9k=y
|
||||
|
|
|
|||
|
|
@ -1,17 +0,0 @@
|
|||
#!/bin/sh
|
||||
#
|
||||
# Copyright (C) 2013-2015 OpenWrt.org
|
||||
#
|
||||
|
||||
. /lib/functions/uci-defaults.sh
|
||||
|
||||
board_config_update
|
||||
|
||||
json_is_a network object && exit 0
|
||||
|
||||
ucidef_set_interface_lan 'eth0'
|
||||
[ -d /sys/class/net/eth1 ] && ucidef_set_interface_wan 'eth1'
|
||||
|
||||
board_config_flush
|
||||
|
||||
exit 0
|
||||
|
|
@ -8,7 +8,7 @@ PKG_FLAGS:=nonshared
|
|||
include $(INCLUDE_DIR)/package.mk
|
||||
|
||||
define Build/Prepare
|
||||
mkdir -p $(PKG_BUILD_DIR)
|
||||
mkdir -p $(PKG_BUILD_DIR)
|
||||
endef
|
||||
|
||||
define Build/Compile
|
||||
|
|
@ -25,29 +25,31 @@ endef
|
|||
# <https://wireless.wiki.kernel.org/en/users/drivers/ath10k/boardfiles>
|
||||
|
||||
ALLWIFIBOARDS:= \
|
||||
8dev_habanero-dvk \
|
||||
aruba_ap-303 \
|
||||
avm_fritzrepeater-1200 \
|
||||
buffalo_wtr-m2133hp \
|
||||
cellc_rtl30vw \
|
||||
devolo_magic-2-wifi-next \
|
||||
dlink_dap2610 \
|
||||
edgecore_ecw5410 \
|
||||
edgecore_oap100 \
|
||||
engenius_eap2200 \
|
||||
engenius_emd1 \
|
||||
engenius_emr3500 \
|
||||
ezviz_cs-w3-wd1200g-eup \
|
||||
glinet_gl-s1300 \
|
||||
linksys_ea8300 \
|
||||
linksys_mr8300-v0 \
|
||||
luma_wrtq-329acn \
|
||||
8dev_habanero-dvk \
|
||||
aruba_ap-303 \
|
||||
avm_fritzrepeater-1200 \
|
||||
buffalo_wtr-m2133hp \
|
||||
cellc_rtl30vw \
|
||||
devolo_magic-2-wifi-next \
|
||||
dlink_dap2610 \
|
||||
edgecore_ecw5410 \
|
||||
edgecore_oap100 \
|
||||
engenius_eap2200 \
|
||||
engenius_emd1 \
|
||||
engenius_emr3500 \
|
||||
ezviz_cs-w3-wd1200g-eup \
|
||||
glinet_gl-ap1300 \
|
||||
glinet_gl-s1300 \
|
||||
linksys_ea8300 \
|
||||
linksys_mr8300-v0 \
|
||||
luma_wrtq-329acn \
|
||||
mobipromo_cm520-79f \
|
||||
nec_wg2600hp3 \
|
||||
plasmacloud_pa1200 \
|
||||
plasmacloud_pa2200 \
|
||||
pangu_l1000 \
|
||||
p2w_r619ac \
|
||||
mobipromo_cm520-79f \
|
||||
plasmacloud_pa1200 \
|
||||
plasmacloud_pa2200 \
|
||||
qxwlan_e2600ac
|
||||
qxwlan_e2600ac
|
||||
|
||||
ALLWIFIPACKAGES:=$(foreach BOARD,$(ALLWIFIBOARDS),ipq-wifi-$(BOARD))
|
||||
|
||||
|
|
@ -121,15 +123,17 @@ $(eval $(call generate-ipq-wifi-package,engenius_eap2200,EnGenius EAP2200))
|
|||
$(eval $(call generate-ipq-wifi-package,engenius_emd1,EnGenius EMD1))
|
||||
$(eval $(call generate-ipq-wifi-package,engenius_emr3500,EnGenius EMR3500))
|
||||
$(eval $(call generate-ipq-wifi-package,ezviz_cs-w3-wd1200g-eup,EZVIZ CS-W3-WD1200G EUP))
|
||||
$(eval $(call generate-ipq-wifi-package,glinet_gl-ap1300,GL.iNet GL-AP1300))
|
||||
$(eval $(call generate-ipq-wifi-package,glinet_gl-s1300,GL.iNet GL-S1300))
|
||||
$(eval $(call generate-ipq-wifi-package,linksys_ea8300,Linksys EA8300))
|
||||
$(eval $(call generate-ipq-wifi-package,linksys_mr8300-v0,Linksys MR8300))
|
||||
$(eval $(call generate-ipq-wifi-package,luma_wrtq-329acn,Luma WRTQ-329ACN))
|
||||
$(eval $(call generate-ipq-wifi-package,mobipromo_cm520-79f,MobiPromo CM520-79F))
|
||||
$(eval $(call generate-ipq-wifi-package,nec_wg2600hp3,NEC Platforms WG2600HP3))
|
||||
$(eval $(call generate-ipq-wifi-package,plasmacloud_pa1200,Plasma Cloud PA1200))
|
||||
$(eval $(call generate-ipq-wifi-package,plasmacloud_pa2200,Plasma Cloud PA2200))
|
||||
$(eval $(call generate-ipq-wifi-package,qxwlan_e2600ac,Qxwlan E2600AC))
|
||||
$(eval $(call generate-ipq-wifi-package,pangu_l1000,PANGU L1000))
|
||||
$(eval $(call generate-ipq-wifi-package,p2w_r619ac,P&W R619AC))
|
||||
|
||||
$(foreach PACKAGE,$(ALLWIFIPACKAGES),$(eval $(call BuildPackage,$(PACKAGE))))
|
||||
$(foreach PACKAGE,$(ALLWIFIPACKAGES),$(eval $(call BuildPackage,$(PACKAGE))))
|
||||
431
root/target/linux/bcm27xx/bcm2708/config-4.14
Executable file
431
root/target/linux/bcm27xx/bcm2708/config-4.14
Executable file
|
|
@ -0,0 +1,431 @@
|
|||
# CONFIG_AIO is not set
|
||||
CONFIG_ALIGNMENT_TRAP=y
|
||||
CONFIG_ARCH_BCM=y
|
||||
CONFIG_ARCH_BCM2835=y
|
||||
CONFIG_ARCH_CLOCKSOURCE_DATA=y
|
||||
CONFIG_ARCH_HAS_DEBUG_VIRTUAL=y
|
||||
CONFIG_ARCH_HAS_ELF_RANDOMIZE=y
|
||||
CONFIG_ARCH_HAS_GCOV_PROFILE_ALL=y
|
||||
CONFIG_ARCH_HAS_SET_MEMORY=y
|
||||
CONFIG_ARCH_HAS_SG_CHAIN=y
|
||||
CONFIG_ARCH_HAS_STRICT_KERNEL_RWX=y
|
||||
CONFIG_ARCH_HAS_STRICT_MODULE_RWX=y
|
||||
CONFIG_ARCH_HAVE_CUSTOM_GPIO_H=y
|
||||
CONFIG_ARCH_HIBERNATION_POSSIBLE=y
|
||||
CONFIG_ARCH_MIGHT_HAVE_PC_PARPORT=y
|
||||
CONFIG_ARCH_MULTIPLATFORM=y
|
||||
# CONFIG_ARCH_MULTI_CPU_AUTO is not set
|
||||
CONFIG_ARCH_MULTI_V6=y
|
||||
CONFIG_ARCH_MULTI_V6_V7=y
|
||||
CONFIG_ARCH_NR_GPIO=0
|
||||
CONFIG_ARCH_OPTIONAL_KERNEL_RWX=y
|
||||
# CONFIG_ARCH_OPTIONAL_KERNEL_RWX_DEFAULT is not set
|
||||
# CONFIG_ARCH_SELECT_MEMORY_MODEL is not set
|
||||
# CONFIG_ARCH_SPARSEMEM_DEFAULT is not set
|
||||
CONFIG_ARCH_SUPPORTS_ATOMIC_RMW=y
|
||||
CONFIG_ARCH_SUPPORTS_UPROBES=y
|
||||
CONFIG_ARCH_SUSPEND_POSSIBLE=y
|
||||
CONFIG_ARCH_USE_BUILTIN_BSWAP=y
|
||||
CONFIG_ARCH_USE_CMPXCHG_LOCKREF=y
|
||||
# CONFIG_ARCH_WANTS_THP_SWAP is not set
|
||||
CONFIG_ARCH_WANT_GENERAL_HUGETLB=y
|
||||
CONFIG_ARCH_WANT_IPC_PARSE_VERSION=y
|
||||
CONFIG_ARM=y
|
||||
CONFIG_ARM_AMBA=y
|
||||
CONFIG_ARM_BCM2835_CPUFREQ=y
|
||||
CONFIG_ARM_CPU_SUSPEND=y
|
||||
CONFIG_ARM_ERRATA_411920=y
|
||||
CONFIG_ARM_HAS_SG_CHAIN=y
|
||||
CONFIG_ARM_L1_CACHE_SHIFT=5
|
||||
CONFIG_ARM_PATCH_PHYS_VIRT=y
|
||||
# CONFIG_ARM_SP805_WATCHDOG is not set
|
||||
CONFIG_ARM_THUMB=y
|
||||
CONFIG_ARM_TIMER_SP804=y
|
||||
CONFIG_ARM_UNWIND=y
|
||||
CONFIG_AUTO_ZRELADDR=y
|
||||
# CONFIG_BACKLIGHT_CLASS_DEVICE is not set
|
||||
CONFIG_BACKLIGHT_LCD_SUPPORT=y
|
||||
CONFIG_BCM2708_VCMEM=y
|
||||
# CONFIG_BCM2835_DEVGPIOMEM is not set
|
||||
CONFIG_BCM2835_FAST_MEMCPY=y
|
||||
CONFIG_BCM2835_MBOX=y
|
||||
# CONFIG_BCM2835_SMI is not set
|
||||
CONFIG_BCM2835_THERMAL=y
|
||||
CONFIG_BCM2835_TIMER=y
|
||||
CONFIG_BCM2835_VCHIQ=y
|
||||
# CONFIG_BCM2835_VCHIQ_SUPPORT_MEMDUMP is not set
|
||||
CONFIG_BCM2835_WDT=y
|
||||
CONFIG_BCM_VCIO=y
|
||||
CONFIG_BCM_VC_SM=y
|
||||
CONFIG_BCM_VIDEOCORE=y
|
||||
# CONFIG_BLK_DEV_INITRD is not set
|
||||
CONFIG_BLK_DEV_LOOP=y
|
||||
CONFIG_BLK_DEV_RAM=y
|
||||
CONFIG_BLK_DEV_RAM_COUNT=16
|
||||
CONFIG_BLK_DEV_RAM_SIZE=4096
|
||||
CONFIG_BLK_DEV_SD=y
|
||||
CONFIG_BLK_SCSI_REQUEST=y
|
||||
CONFIG_BRCM_CHAR_DRIVERS=y
|
||||
CONFIG_BUILD_BIN2C=y
|
||||
# CONFIG_CACHE_L2X0 is not set
|
||||
CONFIG_CLKDEV_LOOKUP=y
|
||||
CONFIG_CLKSRC_MMIO=y
|
||||
CONFIG_CLONE_BACKWARDS=y
|
||||
CONFIG_CMA=y
|
||||
CONFIG_CMA_ALIGNMENT=8
|
||||
CONFIG_CMA_AREAS=7
|
||||
# CONFIG_CMA_DEBUG is not set
|
||||
# CONFIG_CMA_DEBUGFS is not set
|
||||
CONFIG_CMA_SIZE_MBYTES=16
|
||||
# CONFIG_CMA_SIZE_SEL_MAX is not set
|
||||
CONFIG_CMA_SIZE_SEL_MBYTES=y
|
||||
# CONFIG_CMA_SIZE_SEL_MIN is not set
|
||||
# CONFIG_CMA_SIZE_SEL_PERCENTAGE is not set
|
||||
CONFIG_COMMON_CLK=y
|
||||
CONFIG_CONFIGFS_FS=y
|
||||
CONFIG_CONSOLE_LOGLEVEL_DEFAULT=7
|
||||
CONFIG_CONSOLE_TRANSLATIONS=y
|
||||
# CONFIG_CPUFREQ_DT is not set
|
||||
CONFIG_CPU_32v6=y
|
||||
CONFIG_CPU_32v6K=y
|
||||
CONFIG_CPU_ABRT_EV6=y
|
||||
# CONFIG_CPU_BPREDICT_DISABLE is not set
|
||||
CONFIG_CPU_CACHE_V6=y
|
||||
CONFIG_CPU_CACHE_VIPT=y
|
||||
CONFIG_CPU_COPY_V6=y
|
||||
CONFIG_CPU_CP15=y
|
||||
CONFIG_CPU_CP15_MMU=y
|
||||
CONFIG_CPU_FREQ=y
|
||||
CONFIG_CPU_FREQ_DEFAULT_GOV_ONDEMAND=y
|
||||
# CONFIG_CPU_FREQ_DEFAULT_GOV_PERFORMANCE is not set
|
||||
CONFIG_CPU_FREQ_GOV_ATTR_SET=y
|
||||
CONFIG_CPU_FREQ_GOV_COMMON=y
|
||||
CONFIG_CPU_FREQ_GOV_CONSERVATIVE=y
|
||||
CONFIG_CPU_FREQ_GOV_ONDEMAND=y
|
||||
CONFIG_CPU_FREQ_GOV_PERFORMANCE=y
|
||||
CONFIG_CPU_FREQ_GOV_POWERSAVE=y
|
||||
CONFIG_CPU_FREQ_GOV_USERSPACE=y
|
||||
CONFIG_CPU_FREQ_STAT=y
|
||||
CONFIG_CPU_HAS_ASID=y
|
||||
# CONFIG_CPU_ICACHE_DISABLE is not set
|
||||
CONFIG_CPU_IDLE=y
|
||||
CONFIG_CPU_IDLE_GOV_LADDER=y
|
||||
CONFIG_CPU_IDLE_GOV_MENU=y
|
||||
CONFIG_CPU_PABRT_V6=y
|
||||
CONFIG_CPU_PM=y
|
||||
# CONFIG_CPU_THERMAL is not set
|
||||
CONFIG_CPU_THUMB_CAPABLE=y
|
||||
CONFIG_CPU_TLB_V6=y
|
||||
CONFIG_CPU_V6K=y
|
||||
CONFIG_CRC16=y
|
||||
CONFIG_CRYPTO_CRC32C=y
|
||||
CONFIG_CRYPTO_HASH=y
|
||||
CONFIG_CRYPTO_HASH2=y
|
||||
CONFIG_CRYPTO_RNG2=y
|
||||
CONFIG_CRYPTO_WORKQUEUE=y
|
||||
CONFIG_DCACHE_WORD_ACCESS=y
|
||||
CONFIG_DEBUG_ALIGN_RODATA=y
|
||||
CONFIG_DEBUG_BUGVERBOSE=y
|
||||
CONFIG_DEBUG_INFO=y
|
||||
CONFIG_DEBUG_LL_INCLUDE="mach/debug-macro.S"
|
||||
# CONFIG_DEBUG_UART_8250 is not set
|
||||
# CONFIG_DEBUG_USER is not set
|
||||
CONFIG_DEFAULT_CFQ=y
|
||||
# CONFIG_DEFAULT_DEADLINE is not set
|
||||
CONFIG_DEFAULT_IOSCHED="cfq"
|
||||
CONFIG_DMADEVICES=y
|
||||
CONFIG_DMA_BCM2708=y
|
||||
CONFIG_DMA_BCM2835=y
|
||||
CONFIG_DMA_CMA=y
|
||||
CONFIG_DMA_ENGINE=y
|
||||
# CONFIG_DMA_NOOP_OPS is not set
|
||||
CONFIG_DMA_OF=y
|
||||
CONFIG_DMA_SHARED_BUFFER=y
|
||||
CONFIG_DMA_VIRTUAL_CHANNELS=y
|
||||
# CONFIG_DMA_VIRT_OPS is not set
|
||||
CONFIG_DNOTIFY=y
|
||||
# CONFIG_DRM_LIB_RANDOM is not set
|
||||
# CONFIG_DRM_PANEL_LVDS is not set
|
||||
# CONFIG_DRM_PANEL_INNOLUX_P079ZCA is not set
|
||||
# CONFIG_DRM_PANEL_SAMSUNG_S6E3HA2 is not set
|
||||
# CONFIG_DRM_PANEL_SITRONIX_ST7789V is not set
|
||||
# CONFIG_DRM_VC4_HDMI_CEC is not set
|
||||
CONFIG_DTC=y
|
||||
CONFIG_DUMMY_CONSOLE=y
|
||||
CONFIG_EDAC_ATOMIC_SCRUB=y
|
||||
CONFIG_EDAC_SUPPORT=y
|
||||
CONFIG_ENABLE_MUST_CHECK=y
|
||||
CONFIG_EXPORTFS=y
|
||||
CONFIG_EXT4_FS=y
|
||||
CONFIG_EXT4_FS_POSIX_ACL=y
|
||||
CONFIG_EXT4_FS_SECURITY=y
|
||||
# CONFIG_F2FS_CHECK_FS is not set
|
||||
CONFIG_F2FS_FS=y
|
||||
# CONFIG_F2FS_FS_SECURITY is not set
|
||||
CONFIG_F2FS_FS_XATTR=y
|
||||
CONFIG_F2FS_STAT_FS=y
|
||||
CONFIG_FB=y
|
||||
CONFIG_FB_BCM2708=y
|
||||
CONFIG_FB_CFB_COPYAREA=y
|
||||
CONFIG_FB_CFB_FILLRECT=y
|
||||
CONFIG_FB_CFB_IMAGEBLIT=y
|
||||
CONFIG_FB_CMDLINE=y
|
||||
# CONFIG_FB_PROVIDE_GET_FB_UNMAPPED_AREA is not set
|
||||
# CONFIG_FB_RPISENSE is not set
|
||||
CONFIG_FIQ=y
|
||||
CONFIG_FIRMWARE_IN_KERNEL=y
|
||||
CONFIG_FIX_EARLYCON_MEM=y
|
||||
# CONFIG_FONTS is not set
|
||||
CONFIG_FONT_8x16=y
|
||||
CONFIG_FONT_8x8=y
|
||||
CONFIG_FONT_SUPPORT=y
|
||||
# CONFIG_FPE_FASTFPE is not set
|
||||
# CONFIG_FPE_NWFPE is not set
|
||||
CONFIG_FRAMEBUFFER_CONSOLE=y
|
||||
# CONFIG_FRAMEBUFFER_CONSOLE_DETECT_PRIMARY is not set
|
||||
# CONFIG_FRAMEBUFFER_CONSOLE_ROTATION is not set
|
||||
CONFIG_FREEZER=y
|
||||
CONFIG_FS_MBCACHE=y
|
||||
CONFIG_FS_POSIX_ACL=y
|
||||
CONFIG_FUTEX_PI=y
|
||||
CONFIG_GENERIC_ALLOCATOR=y
|
||||
CONFIG_GENERIC_BUG=y
|
||||
CONFIG_GENERIC_CLOCKEVENTS=y
|
||||
CONFIG_GENERIC_CPU_AUTOPROBE=y
|
||||
CONFIG_GENERIC_EARLY_IOREMAP=y
|
||||
CONFIG_GENERIC_IDLE_POLL_SETUP=y
|
||||
CONFIG_GENERIC_IO=y
|
||||
CONFIG_GENERIC_IRQ_SHOW=y
|
||||
CONFIG_GENERIC_IRQ_SHOW_LEVEL=y
|
||||
CONFIG_GENERIC_PCI_IOMAP=y
|
||||
CONFIG_GENERIC_PINCONF=y
|
||||
CONFIG_GENERIC_PINCTRL_GROUPS=y
|
||||
CONFIG_GENERIC_PINMUX_FUNCTIONS=y
|
||||
CONFIG_GENERIC_SCHED_CLOCK=y
|
||||
CONFIG_GENERIC_SMP_IDLE_THREAD=y
|
||||
CONFIG_GENERIC_STRNCPY_FROM_USER=y
|
||||
CONFIG_GENERIC_STRNLEN_USER=y
|
||||
CONFIG_GPIOLIB=y
|
||||
CONFIG_GPIOLIB_IRQCHIP=y
|
||||
# CONFIG_GPIO_BCM_EXP is not set
|
||||
# CONFIG_GPIO_BCM_VIRT is not set
|
||||
CONFIG_GPIO_SYSFS=y
|
||||
# CONFIG_GRO_CELLS is not set
|
||||
CONFIG_HANDLE_DOMAIN_IRQ=y
|
||||
CONFIG_HARDIRQS_SW_RESEND=y
|
||||
CONFIG_HAS_DMA=y
|
||||
CONFIG_HAS_IOMEM=y
|
||||
CONFIG_HAS_IOPORT_MAP=y
|
||||
# CONFIG_HAVE_64BIT_ALIGNED_ACCESS is not set
|
||||
# CONFIG_HAVE_ARCH_BITREVERSE is not set
|
||||
CONFIG_HAVE_ARCH_JUMP_LABEL=y
|
||||
CONFIG_HAVE_ARCH_KGDB=y
|
||||
CONFIG_HAVE_ARCH_PFN_VALID=y
|
||||
CONFIG_HAVE_ARCH_TRACEHOOK=y
|
||||
# CONFIG_HAVE_BOOTMEM_INFO_NODE is not set
|
||||
CONFIG_HAVE_CC_STACKPROTECTOR=y
|
||||
CONFIG_HAVE_CLK=y
|
||||
CONFIG_HAVE_CLK_PREPARE=y
|
||||
CONFIG_HAVE_CONTEXT_TRACKING=y
|
||||
CONFIG_HAVE_C_RECORDMCOUNT=y
|
||||
CONFIG_HAVE_DEBUG_KMEMLEAK=y
|
||||
CONFIG_HAVE_DMA_API_DEBUG=y
|
||||
CONFIG_HAVE_DMA_CONTIGUOUS=y
|
||||
CONFIG_HAVE_DYNAMIC_FTRACE=y
|
||||
CONFIG_HAVE_DYNAMIC_FTRACE_WITH_REGS=y
|
||||
CONFIG_HAVE_EBPF_JIT=y
|
||||
CONFIG_HAVE_EFFICIENT_UNALIGNED_ACCESS=y
|
||||
CONFIG_HAVE_FTRACE_MCOUNT_RECORD=y
|
||||
CONFIG_HAVE_FUNCTION_GRAPH_TRACER=y
|
||||
CONFIG_HAVE_FUNCTION_TRACER=y
|
||||
CONFIG_HAVE_GENERIC_DMA_COHERENT=y
|
||||
CONFIG_HAVE_IRQ_TIME_ACCOUNTING=y
|
||||
CONFIG_HAVE_MEMBLOCK=y
|
||||
CONFIG_HAVE_MOD_ARCH_SPECIFIC=y
|
||||
CONFIG_HAVE_NET_DSA=y
|
||||
CONFIG_HAVE_OPROFILE=y
|
||||
CONFIG_HAVE_OPTPROBES=y
|
||||
CONFIG_HAVE_PERF_EVENTS=y
|
||||
CONFIG_HAVE_PERF_REGS=y
|
||||
CONFIG_HAVE_PERF_USER_STACK_DUMP=y
|
||||
CONFIG_HAVE_PROC_CPU=y
|
||||
CONFIG_HAVE_REGS_AND_STACK_ACCESS_API=y
|
||||
CONFIG_HAVE_SYSCALL_TRACEPOINTS=y
|
||||
CONFIG_HAVE_UID16=y
|
||||
CONFIG_HAVE_VIRT_CPU_ACCOUNTING_GEN=y
|
||||
CONFIG_HW_CONSOLE=y
|
||||
CONFIG_HZ_FIXED=0
|
||||
CONFIG_IKCONFIG=y
|
||||
CONFIG_IKCONFIG_PROC=y
|
||||
CONFIG_INPUT=y
|
||||
CONFIG_INPUT_MOUSEDEV=y
|
||||
# CONFIG_INPUT_MOUSEDEV_PSAUX is not set
|
||||
CONFIG_INPUT_MOUSEDEV_SCREEN_X=1024
|
||||
CONFIG_INPUT_MOUSEDEV_SCREEN_Y=768
|
||||
CONFIG_IOMMU_HELPER=y
|
||||
CONFIG_IOSCHED_CFQ=y
|
||||
CONFIG_IRQCHIP=y
|
||||
CONFIG_IRQ_DOMAIN=y
|
||||
CONFIG_IRQ_FORCED_THREADING=y
|
||||
CONFIG_IRQ_WORK=y
|
||||
CONFIG_JBD2=y
|
||||
CONFIG_KERNEL_GZIP=y
|
||||
# CONFIG_KERNEL_XZ is not set
|
||||
# CONFIG_LCD_CLASS_DEVICE is not set
|
||||
CONFIG_LEDS_GPIO=y
|
||||
CONFIG_LEDS_TRIGGER_INPUT=y
|
||||
CONFIG_LIBFDT=y
|
||||
CONFIG_LOGO=y
|
||||
CONFIG_LOGO_LINUX_CLUT224=y
|
||||
# CONFIG_LOGO_LINUX_MONO is not set
|
||||
# CONFIG_LOGO_LINUX_VGA16 is not set
|
||||
CONFIG_MAC_PARTITION=y
|
||||
CONFIG_MAGIC_SYSRQ=y
|
||||
CONFIG_MAILBOX=y
|
||||
# CONFIG_MAILBOX_TEST is not set
|
||||
CONFIG_MAX_RAW_DEVS=256
|
||||
# CONFIG_MDIO_BUS is not set
|
||||
CONFIG_MEMORY_ISOLATION=y
|
||||
CONFIG_MFD_RPISENSE_CORE=y
|
||||
CONFIG_MFD_SYSCON=y
|
||||
CONFIG_MIGHT_HAVE_CACHE_L2X0=y
|
||||
CONFIG_MIGHT_HAVE_PCI=y
|
||||
CONFIG_MIGRATION=y
|
||||
CONFIG_MMC=y
|
||||
CONFIG_MMC_BCM2835=y
|
||||
CONFIG_MMC_BCM2835_DMA=y
|
||||
CONFIG_MMC_BCM2835_MMC=y
|
||||
CONFIG_MMC_BCM2835_PIO_DMA_BARRIER=2
|
||||
CONFIG_MMC_BCM2835_SDHOST=y
|
||||
CONFIG_MMC_BLOCK=y
|
||||
CONFIG_MMC_BLOCK_MINORS=32
|
||||
CONFIG_MMC_SDHCI=y
|
||||
CONFIG_MMC_SDHCI_PLTFM=y
|
||||
CONFIG_MODULES_USE_ELF_REL=y
|
||||
# CONFIG_MTD is not set
|
||||
CONFIG_MULTI_IRQ_HANDLER=y
|
||||
CONFIG_NEED_DMA_MAP_STATE=y
|
||||
CONFIG_NEED_PER_CPU_KM=y
|
||||
CONFIG_NLS=y
|
||||
CONFIG_NLS_ASCII=y
|
||||
CONFIG_NLS_DEFAULT="utf8"
|
||||
CONFIG_NO_BOOTMEM=y
|
||||
CONFIG_NO_HZ=y
|
||||
CONFIG_NO_HZ_COMMON=y
|
||||
CONFIG_NO_HZ_IDLE=y
|
||||
CONFIG_OABI_COMPAT=y
|
||||
CONFIG_OF=y
|
||||
CONFIG_OF_ADDRESS=y
|
||||
CONFIG_OF_CONFIGFS=y
|
||||
CONFIG_OF_DYNAMIC=y
|
||||
CONFIG_OF_EARLY_FLATTREE=y
|
||||
CONFIG_OF_FLATTREE=y
|
||||
CONFIG_OF_GPIO=y
|
||||
CONFIG_OF_IRQ=y
|
||||
CONFIG_OF_NET=y
|
||||
CONFIG_OF_OVERLAY=y
|
||||
CONFIG_OF_RESERVED_MEM=y
|
||||
CONFIG_OF_RESOLVE=y
|
||||
CONFIG_OLD_SIGACTION=y
|
||||
CONFIG_OLD_SIGSUSPEND3=y
|
||||
CONFIG_PAGE_OFFSET=0xC0000000
|
||||
# CONFIG_PCI_DOMAINS_GENERIC is not set
|
||||
# CONFIG_PCI_SYSCALL is not set
|
||||
CONFIG_PERF_USE_VMALLOC=y
|
||||
CONFIG_PGTABLE_LEVELS=2
|
||||
CONFIG_PINCTRL=y
|
||||
CONFIG_PINCTRL_BCM2835=y
|
||||
CONFIG_PM=y
|
||||
CONFIG_PM_CLK=y
|
||||
# CONFIG_PM_DEBUG is not set
|
||||
CONFIG_PM_GENERIC_DOMAINS=y
|
||||
CONFIG_PM_GENERIC_DOMAINS_OF=y
|
||||
CONFIG_PM_GENERIC_DOMAINS_SLEEP=y
|
||||
CONFIG_PM_SLEEP=y
|
||||
CONFIG_POWER_SUPPLY=y
|
||||
CONFIG_PRINTK_SAFE_LOG_BUF_SHIFT=13
|
||||
CONFIG_PRINTK_TIME=y
|
||||
CONFIG_PROC_PAGE_MONITOR=y
|
||||
CONFIG_PWM=y
|
||||
CONFIG_PWM_BCM2835=y
|
||||
CONFIG_PWM_SYSFS=y
|
||||
CONFIG_RASPBERRYPI_FIRMWARE=y
|
||||
CONFIG_RASPBERRYPI_POWER=y
|
||||
CONFIG_RATIONAL=y
|
||||
CONFIG_RAW_DRIVER=y
|
||||
# CONFIG_RCU_NEED_SEGCBLIST is not set
|
||||
# CONFIG_RCU_STALL_COMMON is not set
|
||||
CONFIG_REGMAP=y
|
||||
CONFIG_REGMAP_MMIO=y
|
||||
CONFIG_REGULATOR=y
|
||||
CONFIG_REGULATOR_FIXED_VOLTAGE=y
|
||||
CONFIG_RWSEM_XCHGADD_ALGORITHM=y
|
||||
# CONFIG_SCHED_INFO is not set
|
||||
CONFIG_SCSI=y
|
||||
# CONFIG_SCSI_LOWLEVEL is not set
|
||||
# CONFIG_SCSI_PROC_FS is not set
|
||||
CONFIG_SERIAL_8250_BCM2835AUX=y
|
||||
# CONFIG_SERIAL_8250_DMA is not set
|
||||
CONFIG_SERIAL_8250_EXTENDED=y
|
||||
CONFIG_SERIAL_8250_FSL=y
|
||||
CONFIG_SERIAL_8250_NR_UARTS=1
|
||||
CONFIG_SERIAL_8250_RUNTIME_UARTS=0
|
||||
CONFIG_SERIAL_8250_SHARE_IRQ=y
|
||||
CONFIG_SERIAL_AMBA_PL011=y
|
||||
CONFIG_SERIAL_AMBA_PL011_CONSOLE=y
|
||||
CONFIG_SERIAL_OF_PLATFORM=y
|
||||
CONFIG_SG_POOL=y
|
||||
# CONFIG_SND_BCM2708_SOC_GOOGLEVOICEHAT_SOUNDCARD is not set
|
||||
# CONFIG_SND_BCM2708_SOC_RPI_CIRRUS is not set
|
||||
CONFIG_SND_BCM2708_SOC_ALLO_PIANO_DAC_PLUS=m
|
||||
CONFIG_SND_BCM2708_SOC_ALLO_BOSS_DAC=m
|
||||
CONFIG_SND_BCM2708_SOC_ALLO_DIGIONE=m
|
||||
# CONFIG_SND_BCM2708_SOC_ALLO_KATANA_DAC is not set
|
||||
# CONFIG_SND_AUDIOINJECTOR_OCTO_SOUNDCARD is not set
|
||||
CONFIG_SND_SOC_ICS43432=y
|
||||
CONFIG_SPARSE_IRQ=y
|
||||
CONFIG_SRCU=y
|
||||
# CONFIG_STRIP_ASM_SYMS is not set
|
||||
CONFIG_SUSPEND=y
|
||||
CONFIG_SUSPEND_FREEZER=y
|
||||
CONFIG_SWIOTLB=y
|
||||
CONFIG_SYS_SUPPORTS_APM_EMULATION=y
|
||||
# CONFIG_TEXTSEARCH is not set
|
||||
CONFIG_THERMAL=y
|
||||
CONFIG_THERMAL_DEFAULT_GOV_STEP_WISE=y
|
||||
CONFIG_THERMAL_EMERGENCY_POWEROFF_DELAY_MS=0
|
||||
CONFIG_THERMAL_GOV_STEP_WISE=y
|
||||
CONFIG_THERMAL_OF=y
|
||||
CONFIG_THIN_ARCHIVES=y
|
||||
CONFIG_TICK_CPU_ACCOUNTING=y
|
||||
CONFIG_TIMER_OF=y
|
||||
CONFIG_TIMER_PROBE=y
|
||||
CONFIG_TINY_SRCU=y
|
||||
CONFIG_TMPFS_POSIX_ACL=y
|
||||
CONFIG_UEVENT_HELPER_PATH=""
|
||||
# CONFIG_UID16 is not set
|
||||
CONFIG_UNCOMPRESS_INCLUDE="debug/uncompress.h"
|
||||
CONFIG_USB=y
|
||||
CONFIG_USB_ANNOUNCE_NEW_DEVICES=y
|
||||
CONFIG_USB_COMMON=y
|
||||
CONFIG_USB_DWCOTG=y
|
||||
CONFIG_USB_LAN78XX=y
|
||||
# CONFIG_USB_EHCI_HCD is not set
|
||||
CONFIG_USB_NET_DRIVERS=y
|
||||
CONFIG_USB_NET_SMSC95XX=y
|
||||
CONFIG_USB_STORAGE=y
|
||||
CONFIG_USB_SUPPORT=y
|
||||
CONFIG_USB_UAS=y
|
||||
CONFIG_USB_USBNET=y
|
||||
CONFIG_USE_OF=y
|
||||
CONFIG_VECTORS_BASE=0xffff0000
|
||||
CONFIG_VFP=y
|
||||
CONFIG_VT=y
|
||||
CONFIG_VT_CONSOLE=y
|
||||
CONFIG_VT_CONSOLE_SLEEP=y
|
||||
CONFIG_VT_HW_CONSOLE_BINDING=y
|
||||
CONFIG_WATCHDOG_CORE=y
|
||||
CONFIG_XZ_DEC_ARM=y
|
||||
CONFIG_XZ_DEC_BCJ=y
|
||||
CONFIG_ZBOOT_ROM_BSS=0x0
|
||||
CONFIG_ZBOOT_ROM_TEXT=0x0
|
||||
472
root/target/linux/bcm27xx/bcm2709/config-4.14
Executable file
472
root/target/linux/bcm27xx/bcm2709/config-4.14
Executable file
|
|
@ -0,0 +1,472 @@
|
|||
# CONFIG_AIO is not set
|
||||
CONFIG_ALIGNMENT_TRAP=y
|
||||
CONFIG_ARCH_BCM=y
|
||||
CONFIG_ARCH_BCM2835=y
|
||||
CONFIG_ARCH_CLOCKSOURCE_DATA=y
|
||||
CONFIG_ARCH_HAS_DEBUG_VIRTUAL=y
|
||||
CONFIG_ARCH_HAS_ELF_RANDOMIZE=y
|
||||
CONFIG_ARCH_HAS_GCOV_PROFILE_ALL=y
|
||||
CONFIG_ARCH_HAS_SET_MEMORY=y
|
||||
CONFIG_ARCH_HAS_SG_CHAIN=y
|
||||
CONFIG_ARCH_HAS_STRICT_KERNEL_RWX=y
|
||||
CONFIG_ARCH_HAS_STRICT_MODULE_RWX=y
|
||||
CONFIG_ARCH_HAS_TICK_BROADCAST=y
|
||||
CONFIG_ARCH_HAVE_CUSTOM_GPIO_H=y
|
||||
CONFIG_ARCH_HIBERNATION_POSSIBLE=y
|
||||
CONFIG_ARCH_MIGHT_HAVE_PC_PARPORT=y
|
||||
CONFIG_ARCH_MMAP_RND_BITS_MAX=15
|
||||
CONFIG_ARCH_MULTIPLATFORM=y
|
||||
# CONFIG_ARCH_MULTI_CPU_AUTO is not set
|
||||
CONFIG_ARCH_MULTI_V6_V7=y
|
||||
CONFIG_ARCH_MULTI_V7=y
|
||||
CONFIG_ARCH_NR_GPIO=0
|
||||
CONFIG_ARCH_OPTIONAL_KERNEL_RWX=y
|
||||
CONFIG_ARCH_OPTIONAL_KERNEL_RWX_DEFAULT=y
|
||||
# CONFIG_ARCH_SELECT_MEMORY_MODEL is not set
|
||||
# CONFIG_ARCH_SPARSEMEM_DEFAULT is not set
|
||||
CONFIG_ARCH_SUPPORTS_ATOMIC_RMW=y
|
||||
CONFIG_ARCH_SUPPORTS_UPROBES=y
|
||||
CONFIG_ARCH_SUSPEND_POSSIBLE=y
|
||||
CONFIG_ARCH_USE_BUILTIN_BSWAP=y
|
||||
CONFIG_ARCH_USE_CMPXCHG_LOCKREF=y
|
||||
# CONFIG_ARCH_WANTS_THP_SWAP is not set
|
||||
CONFIG_ARCH_WANT_GENERAL_HUGETLB=y
|
||||
CONFIG_ARCH_WANT_IPC_PARSE_VERSION=y
|
||||
CONFIG_ARM=y
|
||||
CONFIG_ARM_AMBA=y
|
||||
CONFIG_ARM_ARCH_TIMER=y
|
||||
CONFIG_ARM_ARCH_TIMER_EVTSTREAM=y
|
||||
CONFIG_ARM_BCM2835_CPUFREQ=y
|
||||
CONFIG_ARM_CPU_SUSPEND=y
|
||||
CONFIG_ARM_HAS_SG_CHAIN=y
|
||||
CONFIG_ARM_L1_CACHE_SHIFT=6
|
||||
CONFIG_ARM_L1_CACHE_SHIFT_6=y
|
||||
# CONFIG_ARM_LPAE is not set
|
||||
CONFIG_ARM_PATCH_IDIV=y
|
||||
CONFIG_ARM_PATCH_PHYS_VIRT=y
|
||||
# CONFIG_ARM_SP805_WATCHDOG is not set
|
||||
CONFIG_ARM_THUMB=y
|
||||
# CONFIG_ARM_THUMBEE is not set
|
||||
CONFIG_ARM_TIMER_SP804=y
|
||||
CONFIG_ARM_UNWIND=y
|
||||
CONFIG_ARM_VIRT_EXT=y
|
||||
CONFIG_AUTO_ZRELADDR=y
|
||||
# CONFIG_BACKLIGHT_CLASS_DEVICE is not set
|
||||
CONFIG_BACKLIGHT_LCD_SUPPORT=y
|
||||
CONFIG_BCM2708_VCMEM=y
|
||||
# CONFIG_BCM2835_DEVGPIOMEM is not set
|
||||
CONFIG_BCM2835_MBOX=y
|
||||
# CONFIG_BCM2835_SMI is not set
|
||||
CONFIG_BCM2835_THERMAL=y
|
||||
CONFIG_BCM2835_TIMER=y
|
||||
CONFIG_BCM2835_VCHIQ=y
|
||||
# CONFIG_BCM2835_VCHIQ_SUPPORT_MEMDUMP is not set
|
||||
CONFIG_BCM2835_WDT=y
|
||||
CONFIG_BCM_VCIO=y
|
||||
CONFIG_BCM_VC_SM=y
|
||||
CONFIG_BCM_VIDEOCORE=y
|
||||
# CONFIG_BLK_DEV_INITRD is not set
|
||||
CONFIG_BLK_DEV_LOOP=y
|
||||
CONFIG_BLK_DEV_RAM=y
|
||||
CONFIG_BLK_DEV_RAM_COUNT=16
|
||||
CONFIG_BLK_DEV_RAM_SIZE=4096
|
||||
CONFIG_BLK_DEV_SD=y
|
||||
CONFIG_BLK_SCSI_REQUEST=y
|
||||
CONFIG_BRCM_CHAR_DRIVERS=y
|
||||
CONFIG_BUILD_BIN2C=y
|
||||
# CONFIG_CACHE_L2X0 is not set
|
||||
CONFIG_CLKDEV_LOOKUP=y
|
||||
CONFIG_CLKSRC_MMIO=y
|
||||
CONFIG_CLONE_BACKWARDS=y
|
||||
CONFIG_CMA=y
|
||||
CONFIG_CMA_ALIGNMENT=8
|
||||
CONFIG_CMA_AREAS=7
|
||||
# CONFIG_CMA_DEBUG is not set
|
||||
# CONFIG_CMA_DEBUGFS is not set
|
||||
CONFIG_CMA_SIZE_MBYTES=16
|
||||
# CONFIG_CMA_SIZE_SEL_MAX is not set
|
||||
CONFIG_CMA_SIZE_SEL_MBYTES=y
|
||||
# CONFIG_CMA_SIZE_SEL_MIN is not set
|
||||
# CONFIG_CMA_SIZE_SEL_PERCENTAGE is not set
|
||||
CONFIG_COMMON_CLK=y
|
||||
CONFIG_CONFIGFS_FS=y
|
||||
CONFIG_CONSOLE_LOGLEVEL_DEFAULT=7
|
||||
CONFIG_CONSOLE_TRANSLATIONS=y
|
||||
# CONFIG_CPUFREQ_DT is not set
|
||||
CONFIG_CPU_32v6K=y
|
||||
CONFIG_CPU_32v7=y
|
||||
CONFIG_CPU_ABRT_EV7=y
|
||||
# CONFIG_CPU_BPREDICT_DISABLE is not set
|
||||
CONFIG_CPU_CACHE_V7=y
|
||||
CONFIG_CPU_CACHE_VIPT=y
|
||||
CONFIG_CPU_COPY_V6=y
|
||||
CONFIG_CPU_CP15=y
|
||||
CONFIG_CPU_CP15_MMU=y
|
||||
CONFIG_CPU_FREQ=y
|
||||
CONFIG_CPU_FREQ_DEFAULT_GOV_ONDEMAND=y
|
||||
# CONFIG_CPU_FREQ_DEFAULT_GOV_PERFORMANCE is not set
|
||||
CONFIG_CPU_FREQ_GOV_ATTR_SET=y
|
||||
CONFIG_CPU_FREQ_GOV_COMMON=y
|
||||
CONFIG_CPU_FREQ_GOV_CONSERVATIVE=y
|
||||
CONFIG_CPU_FREQ_GOV_ONDEMAND=y
|
||||
CONFIG_CPU_FREQ_GOV_PERFORMANCE=y
|
||||
CONFIG_CPU_FREQ_GOV_POWERSAVE=y
|
||||
CONFIG_CPU_FREQ_GOV_USERSPACE=y
|
||||
CONFIG_CPU_FREQ_STAT=y
|
||||
CONFIG_CPU_HAS_ASID=y
|
||||
# CONFIG_CPU_HOTPLUG_STATE_CONTROL is not set
|
||||
# CONFIG_CPU_ICACHE_DISABLE is not set
|
||||
CONFIG_CPU_IDLE=y
|
||||
CONFIG_CPU_IDLE_GOV_LADDER=y
|
||||
CONFIG_CPU_IDLE_GOV_MENU=y
|
||||
CONFIG_CPU_PABRT_V7=y
|
||||
CONFIG_CPU_PM=y
|
||||
CONFIG_CPU_RMAP=y
|
||||
# CONFIG_CPU_THERMAL is not set
|
||||
CONFIG_CPU_THUMB_CAPABLE=y
|
||||
CONFIG_CPU_TLB_V7=y
|
||||
CONFIG_CPU_V7=y
|
||||
CONFIG_CRC16=y
|
||||
CONFIG_CRYPTO_AEAD=y
|
||||
CONFIG_CRYPTO_AEAD2=y
|
||||
CONFIG_CRYPTO_CRC32C=y
|
||||
CONFIG_CRYPTO_HASH=y
|
||||
CONFIG_CRYPTO_HASH2=y
|
||||
CONFIG_CRYPTO_MANAGER=y
|
||||
CONFIG_CRYPTO_MANAGER2=y
|
||||
CONFIG_CRYPTO_NULL2=y
|
||||
CONFIG_CRYPTO_RNG2=y
|
||||
CONFIG_CRYPTO_WORKQUEUE=y
|
||||
CONFIG_DCACHE_WORD_ACCESS=y
|
||||
CONFIG_DEBUG_ALIGN_RODATA=y
|
||||
CONFIG_DEBUG_BUGVERBOSE=y
|
||||
CONFIG_DEBUG_INFO=y
|
||||
CONFIG_DEBUG_LL_INCLUDE="mach/debug-macro.S"
|
||||
# CONFIG_DEBUG_UART_8250 is not set
|
||||
# CONFIG_DEBUG_USER is not set
|
||||
CONFIG_DEFAULT_CFQ=y
|
||||
# CONFIG_DEFAULT_DEADLINE is not set
|
||||
CONFIG_DEFAULT_IOSCHED="cfq"
|
||||
CONFIG_DMADEVICES=y
|
||||
CONFIG_DMA_BCM2708=y
|
||||
CONFIG_DMA_BCM2835=y
|
||||
CONFIG_DMA_CMA=y
|
||||
CONFIG_DMA_ENGINE=y
|
||||
# CONFIG_DMA_NOOP_OPS is not set
|
||||
CONFIG_DMA_OF=y
|
||||
CONFIG_DMA_SHARED_BUFFER=y
|
||||
CONFIG_DMA_VIRTUAL_CHANNELS=y
|
||||
# CONFIG_DMA_VIRT_OPS is not set
|
||||
CONFIG_DNOTIFY=y
|
||||
# CONFIG_DRM_LIB_RANDOM is not set
|
||||
CONFIG_DRM_PANEL_LVDS=n
|
||||
CONFIG_DRM_PANEL_INNOLUX_P079ZCA=n
|
||||
CONFIG_DRM_PANEL_SAMSUNG_S6E3HA2=n
|
||||
CONFIG_DRM_PANEL_SITRONIX_ST7789V=n
|
||||
CONFIG_DRM_VC4_HDMI_CEC=n
|
||||
CONFIG_DTC=y
|
||||
CONFIG_DUMMY_CONSOLE=y
|
||||
CONFIG_EDAC_ATOMIC_SCRUB=y
|
||||
CONFIG_EDAC_SUPPORT=y
|
||||
CONFIG_ENABLE_MUST_CHECK=y
|
||||
CONFIG_EXPORTFS=y
|
||||
CONFIG_EXT4_FS=y
|
||||
CONFIG_EXT4_FS_POSIX_ACL=y
|
||||
CONFIG_EXT4_FS_SECURITY=y
|
||||
# CONFIG_F2FS_CHECK_FS is not set
|
||||
CONFIG_F2FS_FS=y
|
||||
# CONFIG_F2FS_FS_SECURITY is not set
|
||||
CONFIG_F2FS_FS_XATTR=y
|
||||
CONFIG_F2FS_STAT_FS=y
|
||||
CONFIG_FB=y
|
||||
CONFIG_FB_BCM2708=y
|
||||
CONFIG_FB_CFB_COPYAREA=y
|
||||
CONFIG_FB_CFB_FILLRECT=y
|
||||
CONFIG_FB_CFB_IMAGEBLIT=y
|
||||
CONFIG_FB_CMDLINE=y
|
||||
# CONFIG_FB_PROVIDE_GET_FB_UNMAPPED_AREA is not set
|
||||
# CONFIG_FB_RPISENSE is not set
|
||||
CONFIG_FIQ=y
|
||||
CONFIG_FIRMWARE_IN_KERNEL=y
|
||||
CONFIG_FIX_EARLYCON_MEM=y
|
||||
# CONFIG_FONTS is not set
|
||||
CONFIG_FONT_8x16=y
|
||||
CONFIG_FONT_8x8=y
|
||||
CONFIG_FONT_SUPPORT=y
|
||||
# CONFIG_FPE_FASTFPE is not set
|
||||
# CONFIG_FPE_NWFPE is not set
|
||||
CONFIG_FRAMEBUFFER_CONSOLE=y
|
||||
# CONFIG_FRAMEBUFFER_CONSOLE_DETECT_PRIMARY is not set
|
||||
# CONFIG_FRAMEBUFFER_CONSOLE_ROTATION is not set
|
||||
CONFIG_FREEZER=y
|
||||
CONFIG_FS_MBCACHE=y
|
||||
CONFIG_FS_POSIX_ACL=y
|
||||
CONFIG_FUTEX_PI=y
|
||||
CONFIG_GENERIC_ALLOCATOR=y
|
||||
CONFIG_GENERIC_ARCH_TOPOLOGY=y
|
||||
CONFIG_GENERIC_BUG=y
|
||||
CONFIG_GENERIC_CLOCKEVENTS=y
|
||||
CONFIG_GENERIC_CLOCKEVENTS_BROADCAST=y
|
||||
CONFIG_GENERIC_CPU_AUTOPROBE=y
|
||||
CONFIG_GENERIC_EARLY_IOREMAP=y
|
||||
CONFIG_GENERIC_IDLE_POLL_SETUP=y
|
||||
CONFIG_GENERIC_IO=y
|
||||
CONFIG_GENERIC_IRQ_SHOW=y
|
||||
CONFIG_GENERIC_IRQ_SHOW_LEVEL=y
|
||||
CONFIG_GENERIC_PCI_IOMAP=y
|
||||
CONFIG_GENERIC_PINCONF=y
|
||||
CONFIG_GENERIC_PINCTRL_GROUPS=y
|
||||
CONFIG_GENERIC_PINMUX_FUNCTIONS=y
|
||||
CONFIG_GENERIC_SCHED_CLOCK=y
|
||||
CONFIG_GENERIC_SMP_IDLE_THREAD=y
|
||||
CONFIG_GENERIC_STRNCPY_FROM_USER=y
|
||||
CONFIG_GENERIC_STRNLEN_USER=y
|
||||
CONFIG_GPIOLIB=y
|
||||
CONFIG_GPIOLIB_IRQCHIP=y
|
||||
CONFIG_GPIO_ARIZONA=y
|
||||
CONFIG_GPIO_BCM_EXP=y
|
||||
CONFIG_GPIO_BCM_VIRT=y
|
||||
CONFIG_GPIO_SYSFS=y
|
||||
# CONFIG_GRO_CELLS is not set
|
||||
CONFIG_HANDLE_DOMAIN_IRQ=y
|
||||
CONFIG_HARDIRQS_SW_RESEND=y
|
||||
CONFIG_HAS_DMA=y
|
||||
CONFIG_HAS_IOMEM=y
|
||||
CONFIG_HAS_IOPORT_MAP=y
|
||||
# CONFIG_HAVE_64BIT_ALIGNED_ACCESS is not set
|
||||
CONFIG_HAVE_ARCH_BITREVERSE=y
|
||||
CONFIG_HAVE_ARCH_JUMP_LABEL=y
|
||||
CONFIG_HAVE_ARCH_KGDB=y
|
||||
CONFIG_HAVE_ARCH_PFN_VALID=y
|
||||
CONFIG_HAVE_ARCH_TRACEHOOK=y
|
||||
CONFIG_HAVE_ARM_ARCH_TIMER=y
|
||||
CONFIG_HAVE_ARM_SMCCC=y
|
||||
# CONFIG_HAVE_BOOTMEM_INFO_NODE is not set
|
||||
CONFIG_HAVE_CC_STACKPROTECTOR=y
|
||||
CONFIG_HAVE_CLK=y
|
||||
CONFIG_HAVE_CLK_PREPARE=y
|
||||
CONFIG_HAVE_CONTEXT_TRACKING=y
|
||||
CONFIG_HAVE_C_RECORDMCOUNT=y
|
||||
CONFIG_HAVE_DEBUG_KMEMLEAK=y
|
||||
CONFIG_HAVE_DMA_API_DEBUG=y
|
||||
CONFIG_HAVE_DMA_CONTIGUOUS=y
|
||||
CONFIG_HAVE_DYNAMIC_FTRACE=y
|
||||
CONFIG_HAVE_DYNAMIC_FTRACE_WITH_REGS=y
|
||||
CONFIG_HAVE_EBPF_JIT=y
|
||||
CONFIG_HAVE_EFFICIENT_UNALIGNED_ACCESS=y
|
||||
CONFIG_HAVE_FTRACE_MCOUNT_RECORD=y
|
||||
CONFIG_HAVE_FUNCTION_GRAPH_TRACER=y
|
||||
CONFIG_HAVE_FUNCTION_TRACER=y
|
||||
CONFIG_HAVE_GENERIC_DMA_COHERENT=y
|
||||
CONFIG_HAVE_IRQ_TIME_ACCOUNTING=y
|
||||
CONFIG_HAVE_MEMBLOCK=y
|
||||
CONFIG_HAVE_MOD_ARCH_SPECIFIC=y
|
||||
CONFIG_HAVE_NET_DSA=y
|
||||
CONFIG_HAVE_OPROFILE=y
|
||||
CONFIG_HAVE_OPTPROBES=y
|
||||
CONFIG_HAVE_PERF_EVENTS=y
|
||||
CONFIG_HAVE_PERF_REGS=y
|
||||
CONFIG_HAVE_PERF_USER_STACK_DUMP=y
|
||||
CONFIG_HAVE_PROC_CPU=y
|
||||
CONFIG_HAVE_REGS_AND_STACK_ACCESS_API=y
|
||||
CONFIG_HAVE_SMP=y
|
||||
CONFIG_HAVE_SYSCALL_TRACEPOINTS=y
|
||||
CONFIG_HAVE_UID16=y
|
||||
CONFIG_HAVE_VIRT_CPU_ACCOUNTING_GEN=y
|
||||
CONFIG_HOTPLUG_CPU=y
|
||||
CONFIG_HW_CONSOLE=y
|
||||
CONFIG_HZ_FIXED=0
|
||||
CONFIG_IKCONFIG=y
|
||||
CONFIG_IKCONFIG_PROC=y
|
||||
CONFIG_INPUT=y
|
||||
CONFIG_INPUT_MOUSEDEV=y
|
||||
# CONFIG_INPUT_MOUSEDEV_PSAUX is not set
|
||||
CONFIG_INPUT_MOUSEDEV_SCREEN_X=1024
|
||||
CONFIG_INPUT_MOUSEDEV_SCREEN_Y=768
|
||||
CONFIG_IOMMU_HELPER=y
|
||||
CONFIG_IOSCHED_CFQ=y
|
||||
CONFIG_IRQCHIP=y
|
||||
CONFIG_IRQ_DOMAIN=y
|
||||
CONFIG_IRQ_FORCED_THREADING=y
|
||||
CONFIG_IRQ_WORK=y
|
||||
CONFIG_JBD2=y
|
||||
CONFIG_KERNEL_GZIP=y
|
||||
# CONFIG_KERNEL_XZ is not set
|
||||
# CONFIG_LCD_CLASS_DEVICE is not set
|
||||
CONFIG_LEDS_GPIO=y
|
||||
CONFIG_LEDS_TRIGGER_INPUT=y
|
||||
CONFIG_LIBFDT=y
|
||||
CONFIG_LOCK_SPIN_ON_OWNER=y
|
||||
CONFIG_LOGO=y
|
||||
CONFIG_LOGO_LINUX_CLUT224=y
|
||||
# CONFIG_LOGO_LINUX_MONO is not set
|
||||
# CONFIG_LOGO_LINUX_VGA16 is not set
|
||||
CONFIG_MAC_PARTITION=y
|
||||
CONFIG_MAGIC_SYSRQ=y
|
||||
CONFIG_MAILBOX=y
|
||||
# CONFIG_MAILBOX_TEST is not set
|
||||
CONFIG_MAX_RAW_DEVS=256
|
||||
# CONFIG_MDIO_BUS is not set
|
||||
CONFIG_MEMORY_ISOLATION=y
|
||||
CONFIG_MFD_ARIZONA=y
|
||||
CONFIG_MFD_SYSCON=y
|
||||
# CONFIG_MFD_RPISENSE_CORE is not set
|
||||
CONFIG_MIGHT_HAVE_CACHE_L2X0=y
|
||||
CONFIG_MIGHT_HAVE_PCI=y
|
||||
CONFIG_MIGRATION=y
|
||||
CONFIG_MMC=y
|
||||
CONFIG_MMC_BCM2835=y
|
||||
CONFIG_MMC_BCM2835_DMA=y
|
||||
CONFIG_MMC_BCM2835_MMC=y
|
||||
CONFIG_MMC_BCM2835_PIO_DMA_BARRIER=2
|
||||
CONFIG_MMC_BCM2835_SDHOST=y
|
||||
CONFIG_MMC_BLOCK=y
|
||||
CONFIG_MMC_BLOCK_MINORS=32
|
||||
CONFIG_MMC_SDHCI=y
|
||||
CONFIG_MMC_SDHCI_PLTFM=y
|
||||
CONFIG_MODULES_USE_ELF_REL=y
|
||||
# CONFIG_MTD is not set
|
||||
CONFIG_MULTI_IRQ_HANDLER=y
|
||||
CONFIG_MUTEX_SPIN_ON_OWNER=y
|
||||
CONFIG_NEED_DMA_MAP_STATE=y
|
||||
CONFIG_NEON=y
|
||||
CONFIG_NET_FLOW_LIMIT=y
|
||||
CONFIG_NLS=y
|
||||
CONFIG_NLS_ASCII=y
|
||||
CONFIG_NLS_DEFAULT="utf8"
|
||||
CONFIG_NO_BOOTMEM=y
|
||||
CONFIG_NO_HZ=y
|
||||
CONFIG_NO_HZ_COMMON=y
|
||||
CONFIG_NO_HZ_IDLE=y
|
||||
CONFIG_NR_CPUS=4
|
||||
CONFIG_OABI_COMPAT=y
|
||||
CONFIG_OF=y
|
||||
CONFIG_OF_ADDRESS=y
|
||||
CONFIG_OF_CONFIGFS=y
|
||||
CONFIG_OF_DYNAMIC=y
|
||||
CONFIG_OF_EARLY_FLATTREE=y
|
||||
CONFIG_OF_FLATTREE=y
|
||||
CONFIG_OF_GPIO=y
|
||||
CONFIG_OF_IRQ=y
|
||||
CONFIG_OF_NET=y
|
||||
CONFIG_OF_OVERLAY=y
|
||||
CONFIG_OF_RESERVED_MEM=y
|
||||
CONFIG_OF_RESOLVE=y
|
||||
CONFIG_OLD_SIGACTION=y
|
||||
CONFIG_OLD_SIGSUSPEND3=y
|
||||
CONFIG_PADATA=y
|
||||
CONFIG_PAGE_OFFSET=0x80000000
|
||||
# CONFIG_PCI_DOMAINS_GENERIC is not set
|
||||
# CONFIG_PCI_SYSCALL is not set
|
||||
CONFIG_PERF_USE_VMALLOC=y
|
||||
CONFIG_PGTABLE_LEVELS=2
|
||||
CONFIG_PINCTRL=y
|
||||
CONFIG_PINCTRL_BCM2835=y
|
||||
CONFIG_PM=y
|
||||
CONFIG_PM_CLK=y
|
||||
# CONFIG_PM_DEBUG is not set
|
||||
CONFIG_PM_GENERIC_DOMAINS=y
|
||||
CONFIG_PM_GENERIC_DOMAINS_OF=y
|
||||
CONFIG_PM_GENERIC_DOMAINS_SLEEP=y
|
||||
CONFIG_PM_SLEEP=y
|
||||
CONFIG_PM_SLEEP_SMP=y
|
||||
CONFIG_POWER_SUPPLY=y
|
||||
CONFIG_PRINTK_SAFE_LOG_BUF_SHIFT=13
|
||||
CONFIG_PRINTK_TIME=y
|
||||
CONFIG_PROC_PAGE_MONITOR=y
|
||||
CONFIG_PWM=y
|
||||
CONFIG_PWM_BCM2835=y
|
||||
CONFIG_PWM_SYSFS=y
|
||||
CONFIG_RASPBERRYPI_FIRMWARE=y
|
||||
CONFIG_RASPBERRYPI_POWER=y
|
||||
CONFIG_RATIONAL=y
|
||||
CONFIG_RAW_DRIVER=y
|
||||
CONFIG_RCU_NEED_SEGCBLIST=y
|
||||
CONFIG_RCU_STALL_COMMON=y
|
||||
CONFIG_REGMAP=y
|
||||
CONFIG_REGMAP_MMIO=y
|
||||
CONFIG_REGULATOR=y
|
||||
CONFIG_REGULATOR_FIXED_VOLTAGE=y
|
||||
CONFIG_RFS_ACCEL=y
|
||||
CONFIG_RPS=y
|
||||
CONFIG_RWSEM_SPIN_ON_OWNER=y
|
||||
CONFIG_RWSEM_XCHGADD_ALGORITHM=y
|
||||
# CONFIG_SCHED_INFO is not set
|
||||
CONFIG_SCSI=y
|
||||
# CONFIG_SCSI_LOWLEVEL is not set
|
||||
# CONFIG_SCSI_PROC_FS is not set
|
||||
CONFIG_SERIAL_8250_BCM2835AUX=y
|
||||
# CONFIG_SERIAL_8250_DMA is not set
|
||||
CONFIG_SERIAL_8250_EXTENDED=y
|
||||
CONFIG_SERIAL_8250_FSL=y
|
||||
CONFIG_SERIAL_8250_NR_UARTS=1
|
||||
CONFIG_SERIAL_8250_RUNTIME_UARTS=0
|
||||
CONFIG_SERIAL_8250_SHARE_IRQ=y
|
||||
CONFIG_SERIAL_AMBA_PL011=y
|
||||
CONFIG_SERIAL_AMBA_PL011_CONSOLE=y
|
||||
CONFIG_SERIAL_OF_PLATFORM=y
|
||||
CONFIG_SG_POOL=y
|
||||
CONFIG_SMP=y
|
||||
CONFIG_SMP_ON_UP=y
|
||||
CONFIG_SND_BCM2708_SOC_GOOGLEVOICEHAT_SOUNDCARD=n
|
||||
CONFIG_SND_BCM2708_SOC_RPI_CIRRUS=n
|
||||
CONFIG_SND_AUDIOINJECTOR_OCTO_SOUNDCARD=n
|
||||
CONFIG_SND_BCM2708_SOC_ALLO_PIANO_DAC_PLUS=n
|
||||
CONFIG_SND_BCM2708_SOC_ALLO_BOSS_DAC=n
|
||||
CONFIG_SND_BCM2708_SOC_ALLO_DIGIONE=n
|
||||
CONFIG_SND_BCM2708_SOC_ALLO_KATANA_DAC=n
|
||||
# CONFIG_SND_SOC_ICS43432 is not set
|
||||
CONFIG_SPARSE_IRQ=y
|
||||
CONFIG_SRCU=y
|
||||
# CONFIG_STRIP_ASM_SYMS is not set
|
||||
CONFIG_SUSPEND=y
|
||||
CONFIG_SUSPEND_FREEZER=y
|
||||
CONFIG_SWIOTLB=y
|
||||
CONFIG_SWP_EMULATE=y
|
||||
CONFIG_SYS_SUPPORTS_APM_EMULATION=y
|
||||
# CONFIG_TEE is not set
|
||||
# CONFIG_TEXTSEARCH is not set
|
||||
CONFIG_THERMAL=y
|
||||
CONFIG_THERMAL_DEFAULT_GOV_STEP_WISE=y
|
||||
CONFIG_THERMAL_EMERGENCY_POWEROFF_DELAY_MS=0
|
||||
CONFIG_THERMAL_GOV_STEP_WISE=y
|
||||
CONFIG_THERMAL_OF=y
|
||||
CONFIG_THIN_ARCHIVES=y
|
||||
# CONFIG_THUMB2_KERNEL is not set
|
||||
CONFIG_TICK_CPU_ACCOUNTING=y
|
||||
CONFIG_TIMER_OF=y
|
||||
CONFIG_TIMER_PROBE=y
|
||||
CONFIG_TMPFS_POSIX_ACL=y
|
||||
CONFIG_TREE_RCU=y
|
||||
CONFIG_TREE_SRCU=y
|
||||
CONFIG_UEVENT_HELPER_PATH=""
|
||||
# CONFIG_UID16 is not set
|
||||
CONFIG_UNCOMPRESS_INCLUDE="debug/uncompress.h"
|
||||
CONFIG_USB=y
|
||||
CONFIG_USB_ANNOUNCE_NEW_DEVICES=y
|
||||
CONFIG_USB_COMMON=y
|
||||
CONFIG_USB_DWCOTG=y
|
||||
# CONFIG_USB_EHCI_HCD is not set
|
||||
CONFIG_USB_LAN78XX=y
|
||||
CONFIG_USB_NET_DRIVERS=y
|
||||
CONFIG_USB_NET_SMSC95XX=y
|
||||
CONFIG_USB_STORAGE=y
|
||||
CONFIG_USB_SUPPORT=y
|
||||
CONFIG_USB_UAS=y
|
||||
CONFIG_USB_USBNET=y
|
||||
CONFIG_USE_OF=y
|
||||
CONFIG_VECTORS_BASE=0xffff0000
|
||||
CONFIG_VFP=y
|
||||
CONFIG_VFPv3=y
|
||||
CONFIG_VMSPLIT_2G=y
|
||||
# CONFIG_VMSPLIT_3G is not set
|
||||
CONFIG_VT=y
|
||||
CONFIG_VT_CONSOLE=y
|
||||
CONFIG_VT_CONSOLE_SLEEP=y
|
||||
CONFIG_VT_HW_CONSOLE_BINDING=y
|
||||
CONFIG_WATCHDOG_CORE=y
|
||||
CONFIG_XPS=y
|
||||
CONFIG_XZ_DEC_ARM=y
|
||||
CONFIG_XZ_DEC_BCJ=y
|
||||
CONFIG_ZBOOT_ROM_BSS=0x0
|
||||
CONFIG_ZBOOT_ROM_TEXT=0x0
|
||||
568
root/target/linux/bcm27xx/bcm2709/config-4.19
Executable file
568
root/target/linux/bcm27xx/bcm2709/config-4.19
Executable file
|
|
@ -0,0 +1,568 @@
|
|||
# CONFIG_AIO is not set
|
||||
CONFIG_ALIGNMENT_TRAP=y
|
||||
# CONFIG_ARCH_AXXIA is not set
|
||||
CONFIG_ARCH_BCM=y
|
||||
CONFIG_ARCH_BCM2835=y
|
||||
# CONFIG_ARCH_BCM_HR2 is not set
|
||||
CONFIG_ARCH_CLOCKSOURCE_DATA=y
|
||||
CONFIG_ARCH_DMA_ADDR_T_64BIT=y
|
||||
CONFIG_ARCH_HAS_DEBUG_VIRTUAL=y
|
||||
CONFIG_ARCH_HAS_ELF_RANDOMIZE=y
|
||||
CONFIG_ARCH_HAS_FORTIFY_SOURCE=y
|
||||
CONFIG_ARCH_HAS_GCOV_PROFILE_ALL=y
|
||||
CONFIG_ARCH_HAS_KCOV=y
|
||||
CONFIG_ARCH_HAS_MEMBARRIER_SYNC_CORE=y
|
||||
CONFIG_ARCH_HAS_PHYS_TO_DMA=y
|
||||
CONFIG_ARCH_HAS_PTE_SPECIAL=y
|
||||
CONFIG_ARCH_HAS_SET_MEMORY=y
|
||||
CONFIG_ARCH_HAS_SG_CHAIN=y
|
||||
CONFIG_ARCH_HAS_STRICT_KERNEL_RWX=y
|
||||
CONFIG_ARCH_HAS_STRICT_MODULE_RWX=y
|
||||
CONFIG_ARCH_HAS_TICK_BROADCAST=y
|
||||
CONFIG_ARCH_HAVE_CUSTOM_GPIO_H=y
|
||||
CONFIG_ARCH_HIBERNATION_POSSIBLE=y
|
||||
CONFIG_ARCH_MIGHT_HAVE_PC_PARPORT=y
|
||||
CONFIG_ARCH_MULTIPLATFORM=y
|
||||
CONFIG_ARCH_MULTI_V6_V7=y
|
||||
CONFIG_ARCH_MULTI_V7=y
|
||||
CONFIG_ARCH_NR_GPIO=0
|
||||
CONFIG_ARCH_OPTIONAL_KERNEL_RWX=y
|
||||
CONFIG_ARCH_OPTIONAL_KERNEL_RWX_DEFAULT=y
|
||||
CONFIG_ARCH_SUPPORTS_ATOMIC_RMW=y
|
||||
CONFIG_ARCH_SUPPORTS_UPROBES=y
|
||||
CONFIG_ARCH_SUSPEND_POSSIBLE=y
|
||||
CONFIG_ARCH_USE_BUILTIN_BSWAP=y
|
||||
CONFIG_ARCH_USE_CMPXCHG_LOCKREF=y
|
||||
CONFIG_ARCH_WANT_GENERAL_HUGETLB=y
|
||||
CONFIG_ARCH_WANT_IPC_PARSE_VERSION=y
|
||||
CONFIG_ARGON_MEM=y
|
||||
CONFIG_ARM=y
|
||||
CONFIG_ARM_AMBA=y
|
||||
CONFIG_ARM_ARCH_TIMER=y
|
||||
CONFIG_ARM_ARCH_TIMER_EVTSTREAM=y
|
||||
CONFIG_ARM_BCM2835_CPUFREQ=y
|
||||
CONFIG_ARM_CPU_SUSPEND=y
|
||||
CONFIG_ARM_CRYPTO=y
|
||||
CONFIG_ARM_ERRATA_643719=y
|
||||
CONFIG_ARM_GIC=y
|
||||
CONFIG_ARM_HAS_SG_CHAIN=y
|
||||
CONFIG_ARM_HEAVY_MB=y
|
||||
CONFIG_ARM_L1_CACHE_SHIFT=6
|
||||
CONFIG_ARM_L1_CACHE_SHIFT_6=y
|
||||
CONFIG_ARM_LPAE=y
|
||||
CONFIG_ARM_MODULE_PLTS=y
|
||||
CONFIG_ARM_PATCH_IDIV=y
|
||||
CONFIG_ARM_PATCH_PHYS_VIRT=y
|
||||
# CONFIG_ARM_SCMI_PROTOCOL is not set
|
||||
# CONFIG_ARM_SP805_WATCHDOG is not set
|
||||
CONFIG_ARM_THUMB=y
|
||||
# CONFIG_ARM_THUMBEE is not set
|
||||
CONFIG_ARM_TIMER_SP804=y
|
||||
CONFIG_ARM_UNWIND=y
|
||||
CONFIG_ARM_VIRT_EXT=y
|
||||
CONFIG_AUTO_ZRELADDR=y
|
||||
# CONFIG_AX88796B_PHY is not set
|
||||
# CONFIG_BACKLIGHT_CLASS_DEVICE is not set
|
||||
CONFIG_BACKLIGHT_LCD_SUPPORT=y
|
||||
CONFIG_BCM2708_VCMEM=y
|
||||
CONFIG_BCM2835_DEVGPIOMEM=y
|
||||
CONFIG_BCM2835_MBOX=y
|
||||
CONFIG_BCM2835_POWER=y
|
||||
# CONFIG_BCM2835_SMI is not set
|
||||
CONFIG_BCM2835_THERMAL=y
|
||||
CONFIG_BCM2835_TIMER=y
|
||||
CONFIG_BCM2835_VCHIQ=y
|
||||
CONFIG_BCM2835_VCHIQ_MMAL=y
|
||||
CONFIG_BCM2835_WDT=y
|
||||
CONFIG_BCM7XXX_PHY=y
|
||||
CONFIG_BCMGENET=y
|
||||
CONFIG_BCM_NET_PHYLIB=y
|
||||
CONFIG_BCM_VCIO=y
|
||||
CONFIG_BCM_VC_SM=y
|
||||
CONFIG_BCM_VC_SM_CMA=y
|
||||
CONFIG_BCM_VIDEOCORE=y
|
||||
CONFIG_BLK_DEBUG_FS=y
|
||||
CONFIG_BLK_DEV_BSG=y
|
||||
CONFIG_BLK_DEV_BSGLIB=y
|
||||
# CONFIG_BLK_DEV_DM is not set
|
||||
# CONFIG_BLK_DEV_INITRD is not set
|
||||
CONFIG_BLK_DEV_LOOP=y
|
||||
# CONFIG_BLK_DEV_MD is not set
|
||||
CONFIG_BLK_DEV_RAM=y
|
||||
CONFIG_BLK_DEV_RAM_COUNT=16
|
||||
CONFIG_BLK_DEV_RAM_SIZE=4096
|
||||
CONFIG_BLK_DEV_SD=y
|
||||
CONFIG_BLK_MQ_PCI=y
|
||||
CONFIG_BLK_SCSI_REQUEST=y
|
||||
CONFIG_BOUNCE=y
|
||||
CONFIG_BRCMSTB_THERMAL=y
|
||||
CONFIG_BRCM_CHAR_DRIVERS=y
|
||||
CONFIG_BROADCOM_PHY=y
|
||||
CONFIG_BUILD_BIN2C=y
|
||||
CONFIG_CACHE_L2X0=y
|
||||
CONFIG_CC_HAS_ASM_GOTO=y
|
||||
CONFIG_CLKDEV_LOOKUP=y
|
||||
CONFIG_CLKSRC_MMIO=y
|
||||
CONFIG_CLONE_BACKWARDS=y
|
||||
CONFIG_CMA=y
|
||||
CONFIG_CMA_ALIGNMENT=8
|
||||
CONFIG_CMA_AREAS=7
|
||||
# CONFIG_CMA_DEBUG is not set
|
||||
# CONFIG_CMA_DEBUGFS is not set
|
||||
CONFIG_CMA_SIZE_MBYTES=5
|
||||
# CONFIG_CMA_SIZE_SEL_MAX is not set
|
||||
CONFIG_CMA_SIZE_SEL_MBYTES=y
|
||||
# CONFIG_CMA_SIZE_SEL_MIN is not set
|
||||
# CONFIG_CMA_SIZE_SEL_PERCENTAGE is not set
|
||||
CONFIG_COMMON_CLK=y
|
||||
CONFIG_CONFIGFS_FS=y
|
||||
CONFIG_CONSOLE_TRANSLATIONS=y
|
||||
# CONFIG_CPUFREQ_DT is not set
|
||||
CONFIG_CPU_32v6K=y
|
||||
CONFIG_CPU_32v7=y
|
||||
CONFIG_CPU_ABRT_EV7=y
|
||||
# CONFIG_CPU_BPREDICT_DISABLE is not set
|
||||
CONFIG_CPU_CACHE_V7=y
|
||||
CONFIG_CPU_CACHE_VIPT=y
|
||||
CONFIG_CPU_COPY_V6=y
|
||||
CONFIG_CPU_CP15=y
|
||||
CONFIG_CPU_CP15_MMU=y
|
||||
CONFIG_CPU_FREQ=y
|
||||
CONFIG_CPU_FREQ_DEFAULT_GOV_ONDEMAND=y
|
||||
# CONFIG_CPU_FREQ_DEFAULT_GOV_PERFORMANCE is not set
|
||||
CONFIG_CPU_FREQ_GOV_ATTR_SET=y
|
||||
CONFIG_CPU_FREQ_GOV_COMMON=y
|
||||
CONFIG_CPU_FREQ_GOV_CONSERVATIVE=y
|
||||
CONFIG_CPU_FREQ_GOV_ONDEMAND=y
|
||||
CONFIG_CPU_FREQ_GOV_PERFORMANCE=y
|
||||
CONFIG_CPU_FREQ_GOV_POWERSAVE=y
|
||||
CONFIG_CPU_FREQ_GOV_USERSPACE=y
|
||||
CONFIG_CPU_FREQ_STAT=y
|
||||
CONFIG_CPU_HAS_ASID=y
|
||||
# CONFIG_CPU_HOTPLUG_STATE_CONTROL is not set
|
||||
# CONFIG_CPU_ICACHE_DISABLE is not set
|
||||
CONFIG_CPU_IDLE=y
|
||||
CONFIG_CPU_IDLE_GOV_LADDER=y
|
||||
CONFIG_CPU_IDLE_GOV_MENU=y
|
||||
CONFIG_CPU_PABRT_V7=y
|
||||
CONFIG_CPU_PM=y
|
||||
CONFIG_CPU_RMAP=y
|
||||
CONFIG_CPU_SPECTRE=y
|
||||
# CONFIG_CPU_THERMAL is not set
|
||||
CONFIG_CPU_THUMB_CAPABLE=y
|
||||
CONFIG_CPU_TLB_V7=y
|
||||
CONFIG_CPU_V7=y
|
||||
CONFIG_CRC16=y
|
||||
CONFIG_CRYPTO_AEAD=y
|
||||
CONFIG_CRYPTO_AEAD2=y
|
||||
CONFIG_CRYPTO_AES_ARM=y
|
||||
CONFIG_CRYPTO_AES_ARM_BS=y
|
||||
CONFIG_CRYPTO_AES_ARM_CE=y
|
||||
CONFIG_CRYPTO_CHACHA20=y
|
||||
CONFIG_CRYPTO_CHACHA20_NEON=y
|
||||
CONFIG_CRYPTO_CRC32=y
|
||||
CONFIG_CRYPTO_CRC32C=y
|
||||
CONFIG_CRYPTO_CRC32_ARM_CE=y
|
||||
CONFIG_CRYPTO_CRYPTD=y
|
||||
CONFIG_CRYPTO_GHASH_ARM_CE=y
|
||||
CONFIG_CRYPTO_HASH=y
|
||||
CONFIG_CRYPTO_HASH2=y
|
||||
CONFIG_CRYPTO_MANAGER=y
|
||||
CONFIG_CRYPTO_MANAGER2=y
|
||||
CONFIG_CRYPTO_NULL2=y
|
||||
CONFIG_CRYPTO_RNG2=y
|
||||
CONFIG_CRYPTO_SHA1=y
|
||||
CONFIG_CRYPTO_SHA1_ARM=y
|
||||
CONFIG_CRYPTO_SHA1_ARM_CE=y
|
||||
CONFIG_CRYPTO_SHA1_ARM_NEON=y
|
||||
CONFIG_CRYPTO_SHA256_ARM=y
|
||||
CONFIG_CRYPTO_SHA2_ARM_CE=y
|
||||
CONFIG_CRYPTO_SHA512_ARM=y
|
||||
CONFIG_CRYPTO_SIMD=y
|
||||
CONFIG_CRYPTO_WORKQUEUE=y
|
||||
CONFIG_DCACHE_WORD_ACCESS=y
|
||||
CONFIG_DEBUG_ALIGN_RODATA=y
|
||||
CONFIG_DEBUG_BUGVERBOSE=y
|
||||
CONFIG_DEBUG_INFO=y
|
||||
CONFIG_DEBUG_LL_INCLUDE="mach/debug-macro.S"
|
||||
# CONFIG_DEBUG_USER is not set
|
||||
CONFIG_DEFAULT_CFQ=y
|
||||
# CONFIG_DEFAULT_DEADLINE is not set
|
||||
CONFIG_DEFAULT_IOSCHED="cfq"
|
||||
CONFIG_DEFAULT_MPTCP_PM="fullmesh"
|
||||
CONFIG_DEVMEM=y
|
||||
CONFIG_DMADEVICES=y
|
||||
CONFIG_DMA_BCM2708=y
|
||||
CONFIG_DMA_BCM2835=y
|
||||
CONFIG_DMA_CMA=y
|
||||
CONFIG_DMA_ENGINE=y
|
||||
CONFIG_DMA_OF=y
|
||||
CONFIG_DMA_SHARED_BUFFER=y
|
||||
CONFIG_DMA_VIRTUAL_CHANNELS=y
|
||||
CONFIG_DNOTIFY=y
|
||||
CONFIG_DTC=y
|
||||
CONFIG_DUMMY_CONSOLE=y
|
||||
CONFIG_EDAC_ATOMIC_SCRUB=y
|
||||
CONFIG_EDAC_SUPPORT=y
|
||||
CONFIG_ENABLE_MUST_CHECK=y
|
||||
CONFIG_EXT4_FS=y
|
||||
CONFIG_EXT4_FS_POSIX_ACL=y
|
||||
CONFIG_EXT4_FS_SECURITY=y
|
||||
# CONFIG_F2FS_CHECK_FS is not set
|
||||
CONFIG_F2FS_FS=y
|
||||
# CONFIG_F2FS_FS_SECURITY is not set
|
||||
CONFIG_F2FS_FS_XATTR=y
|
||||
CONFIG_F2FS_STAT_FS=y
|
||||
CONFIG_FB=y
|
||||
CONFIG_FB_BCM2708=y
|
||||
CONFIG_FB_CFB_COPYAREA=y
|
||||
CONFIG_FB_CFB_FILLRECT=y
|
||||
CONFIG_FB_CFB_IMAGEBLIT=y
|
||||
CONFIG_FB_CMDLINE=y
|
||||
# CONFIG_FB_RPISENSE is not set
|
||||
CONFIG_FIQ=y
|
||||
CONFIG_FIXED_PHY=y
|
||||
CONFIG_FIX_EARLYCON_MEM=y
|
||||
# CONFIG_FONTS is not set
|
||||
CONFIG_FONT_8x16=y
|
||||
CONFIG_FONT_8x8=y
|
||||
CONFIG_FONT_SUPPORT=y
|
||||
# CONFIG_FPE_FASTFPE is not set
|
||||
# CONFIG_FPE_NWFPE is not set
|
||||
CONFIG_FRAMEBUFFER_CONSOLE=y
|
||||
# CONFIG_FRAMEBUFFER_CONSOLE_DETECT_PRIMARY is not set
|
||||
# CONFIG_FRAMEBUFFER_CONSOLE_ROTATION is not set
|
||||
CONFIG_FREEZER=y
|
||||
CONFIG_FS_IOMAP=y
|
||||
CONFIG_FS_MBCACHE=y
|
||||
CONFIG_FS_POSIX_ACL=y
|
||||
CONFIG_GENERIC_ALLOCATOR=y
|
||||
CONFIG_GENERIC_ARCH_TOPOLOGY=y
|
||||
CONFIG_GENERIC_BUG=y
|
||||
CONFIG_GENERIC_CLOCKEVENTS=y
|
||||
CONFIG_GENERIC_CLOCKEVENTS_BROADCAST=y
|
||||
CONFIG_GENERIC_CPU_AUTOPROBE=y
|
||||
CONFIG_GENERIC_EARLY_IOREMAP=y
|
||||
CONFIG_GENERIC_IDLE_POLL_SETUP=y
|
||||
CONFIG_GENERIC_IRQ_EFFECTIVE_AFF_MASK=y
|
||||
CONFIG_GENERIC_IRQ_MIGRATION=y
|
||||
CONFIG_GENERIC_IRQ_MULTI_HANDLER=y
|
||||
CONFIG_GENERIC_IRQ_SHOW=y
|
||||
CONFIG_GENERIC_IRQ_SHOW_LEVEL=y
|
||||
CONFIG_GENERIC_MSI_IRQ=y
|
||||
CONFIG_GENERIC_MSI_IRQ_DOMAIN=y
|
||||
CONFIG_GENERIC_PCI_IOMAP=y
|
||||
CONFIG_GENERIC_PHY=y
|
||||
CONFIG_GENERIC_PINCONF=y
|
||||
CONFIG_GENERIC_PINCTRL_GROUPS=y
|
||||
CONFIG_GENERIC_PINMUX_FUNCTIONS=y
|
||||
CONFIG_GENERIC_SCHED_CLOCK=y
|
||||
CONFIG_GENERIC_SMP_IDLE_THREAD=y
|
||||
CONFIG_GENERIC_STRNCPY_FROM_USER=y
|
||||
CONFIG_GENERIC_STRNLEN_USER=y
|
||||
CONFIG_GENERIC_TIME_VSYSCALL=y
|
||||
CONFIG_GPIOLIB=y
|
||||
CONFIG_GPIOLIB_IRQCHIP=y
|
||||
CONFIG_GPIO_BCM_VIRT=y
|
||||
CONFIG_GPIO_RASPBERRYPI_EXP=y
|
||||
CONFIG_GPIO_STMPE=y
|
||||
CONFIG_GPIO_SYSFS=y
|
||||
CONFIG_HANDLE_DOMAIN_IRQ=y
|
||||
CONFIG_HARDEN_BRANCH_PREDICTOR=y
|
||||
CONFIG_HARDIRQS_SW_RESEND=y
|
||||
CONFIG_HAS_DMA=y
|
||||
CONFIG_HAS_IOMEM=y
|
||||
CONFIG_HAS_IOPORT_MAP=y
|
||||
CONFIG_HAVE_ARCH_BITREVERSE=y
|
||||
CONFIG_HAVE_ARCH_JUMP_LABEL=y
|
||||
CONFIG_HAVE_ARCH_KGDB=y
|
||||
CONFIG_HAVE_ARCH_PFN_VALID=y
|
||||
CONFIG_HAVE_ARCH_THREAD_STRUCT_WHITELIST=y
|
||||
CONFIG_HAVE_ARCH_TRACEHOOK=y
|
||||
CONFIG_HAVE_ARCH_TRANSPARENT_HUGEPAGE=y
|
||||
CONFIG_HAVE_ARM_ARCH_TIMER=y
|
||||
CONFIG_HAVE_ARM_SMCCC=y
|
||||
CONFIG_HAVE_CLK=y
|
||||
CONFIG_HAVE_CLK_PREPARE=y
|
||||
CONFIG_HAVE_CONTEXT_TRACKING=y
|
||||
CONFIG_HAVE_C_RECORDMCOUNT=y
|
||||
CONFIG_HAVE_DEBUG_KMEMLEAK=y
|
||||
CONFIG_HAVE_DMA_CONTIGUOUS=y
|
||||
CONFIG_HAVE_DYNAMIC_FTRACE=y
|
||||
CONFIG_HAVE_DYNAMIC_FTRACE_WITH_REGS=y
|
||||
CONFIG_HAVE_EBPF_JIT=y
|
||||
CONFIG_HAVE_EFFICIENT_UNALIGNED_ACCESS=y
|
||||
CONFIG_HAVE_FTRACE_MCOUNT_RECORD=y
|
||||
CONFIG_HAVE_FUNCTION_GRAPH_TRACER=y
|
||||
CONFIG_HAVE_FUNCTION_TRACER=y
|
||||
CONFIG_HAVE_GENERIC_DMA_COHERENT=y
|
||||
CONFIG_HAVE_GENERIC_GUP=y
|
||||
CONFIG_HAVE_IDE=y
|
||||
CONFIG_HAVE_IRQ_TIME_ACCOUNTING=y
|
||||
CONFIG_HAVE_LD_DEAD_CODE_DATA_ELIMINATION=y
|
||||
CONFIG_HAVE_MEMBLOCK=y
|
||||
CONFIG_HAVE_MOD_ARCH_SPECIFIC=y
|
||||
CONFIG_HAVE_NET_DSA=y
|
||||
CONFIG_HAVE_OPROFILE=y
|
||||
CONFIG_HAVE_OPTPROBES=y
|
||||
CONFIG_HAVE_PERF_EVENTS=y
|
||||
CONFIG_HAVE_PERF_REGS=y
|
||||
CONFIG_HAVE_PERF_USER_STACK_DUMP=y
|
||||
CONFIG_HAVE_PROC_CPU=y
|
||||
CONFIG_HAVE_RCU_TABLE_FREE=y
|
||||
CONFIG_HAVE_REGS_AND_STACK_ACCESS_API=y
|
||||
CONFIG_HAVE_RSEQ=y
|
||||
CONFIG_HAVE_SMP=y
|
||||
CONFIG_HAVE_SYSCALL_TRACEPOINTS=y
|
||||
CONFIG_HAVE_UID16=y
|
||||
CONFIG_HAVE_VIRT_CPU_ACCOUNTING_GEN=y
|
||||
CONFIG_HIGHMEM=y
|
||||
CONFIG_HIGHPTE=y
|
||||
CONFIG_HOTPLUG_CPU=y
|
||||
# CONFIG_HUGETLBFS is not set
|
||||
CONFIG_HW_CONSOLE=y
|
||||
CONFIG_HW_RANDOM=y
|
||||
CONFIG_HW_RANDOM_BCM2835=y
|
||||
CONFIG_HW_RANDOM_IPROC_RNG200=y
|
||||
CONFIG_HZ_FIXED=0
|
||||
CONFIG_I2C=y
|
||||
# CONFIG_I2C_BCM2708 is not set
|
||||
CONFIG_I2C_BOARDINFO=y
|
||||
CONFIG_I2C_COMPAT=y
|
||||
CONFIG_I2C_HELPER_AUTO=y
|
||||
CONFIG_IKCONFIG=y
|
||||
CONFIG_IKCONFIG_PROC=y
|
||||
CONFIG_INPUT=y
|
||||
CONFIG_INPUT_MOUSEDEV=y
|
||||
# CONFIG_INPUT_MOUSEDEV_PSAUX is not set
|
||||
CONFIG_INPUT_MOUSEDEV_SCREEN_X=1024
|
||||
CONFIG_INPUT_MOUSEDEV_SCREEN_Y=768
|
||||
CONFIG_IOSCHED_CFQ=y
|
||||
CONFIG_IRQCHIP=y
|
||||
CONFIG_IRQ_DOMAIN=y
|
||||
CONFIG_IRQ_DOMAIN_HIERARCHY=y
|
||||
CONFIG_IRQ_FORCED_THREADING=y
|
||||
CONFIG_IRQ_WORK=y
|
||||
CONFIG_JBD2=y
|
||||
CONFIG_KERNEL_GZIP=y
|
||||
# CONFIG_KERNEL_XZ is not set
|
||||
# CONFIG_LCD_CLASS_DEVICE is not set
|
||||
CONFIG_LEDS_GPIO=y
|
||||
CONFIG_LEDS_TRIGGER_INPUT=y
|
||||
CONFIG_LIBFDT=y
|
||||
CONFIG_LOCK_DEBUGGING_SUPPORT=y
|
||||
CONFIG_LOCK_SPIN_ON_OWNER=y
|
||||
CONFIG_LOGO=y
|
||||
CONFIG_LOGO_LINUX_CLUT224=y
|
||||
# CONFIG_LOGO_LINUX_MONO is not set
|
||||
# CONFIG_LOGO_LINUX_VGA16 is not set
|
||||
CONFIG_MAC_PARTITION=y
|
||||
CONFIG_MAGIC_SYSRQ=y
|
||||
CONFIG_MAILBOX=y
|
||||
# CONFIG_MAILBOX_TEST is not set
|
||||
CONFIG_MAX_RAW_DEVS=256
|
||||
CONFIG_MD=y
|
||||
CONFIG_MDIO_BCM_UNIMAC=y
|
||||
CONFIG_MDIO_BUS=y
|
||||
CONFIG_MDIO_DEVICE=y
|
||||
CONFIG_MEMFD_CREATE=y
|
||||
CONFIG_MEMORY_ISOLATION=y
|
||||
CONFIG_MFD_CORE=y
|
||||
# CONFIG_MFD_RPISENSE_CORE is not set
|
||||
CONFIG_MFD_STMPE=y
|
||||
CONFIG_MFD_SYSCON=y
|
||||
CONFIG_MICROCHIP_PHY=y
|
||||
CONFIG_MIGHT_HAVE_CACHE_L2X0=y
|
||||
CONFIG_MIGHT_HAVE_PCI=y
|
||||
CONFIG_MIGRATION=y
|
||||
CONFIG_MMC=y
|
||||
CONFIG_MMC_BCM2835=y
|
||||
CONFIG_MMC_BCM2835_DMA=y
|
||||
CONFIG_MMC_BCM2835_MMC=y
|
||||
CONFIG_MMC_BCM2835_PIO_DMA_BARRIER=2
|
||||
CONFIG_MMC_BCM2835_SDHOST=y
|
||||
CONFIG_MMC_BLOCK=y
|
||||
CONFIG_MMC_BLOCK_MINORS=32
|
||||
CONFIG_MMC_SDHCI=y
|
||||
CONFIG_MMC_SDHCI_IO_ACCESSORS=y
|
||||
CONFIG_MMC_SDHCI_IPROC=y
|
||||
# CONFIG_MMC_SDHCI_PCI is not set
|
||||
CONFIG_MMC_SDHCI_PLTFM=y
|
||||
# CONFIG_MMC_TIFM_SD is not set
|
||||
CONFIG_MODULES_USE_ELF_REL=y
|
||||
CONFIG_MUTEX_SPIN_ON_OWNER=y
|
||||
CONFIG_NEED_DMA_MAP_STATE=y
|
||||
CONFIG_NEON=y
|
||||
CONFIG_NET_FLOW_LIMIT=y
|
||||
CONFIG_NLS=y
|
||||
CONFIG_NLS_ASCII=y
|
||||
CONFIG_NLS_DEFAULT="utf8"
|
||||
CONFIG_NO_BOOTMEM=y
|
||||
CONFIG_NO_HZ=y
|
||||
CONFIG_NO_HZ_COMMON=y
|
||||
CONFIG_NO_HZ_IDLE=y
|
||||
CONFIG_NR_CPUS=4
|
||||
CONFIG_NVMEM=y
|
||||
CONFIG_OABI_COMPAT=y
|
||||
CONFIG_OF=y
|
||||
CONFIG_OF_ADDRESS=y
|
||||
CONFIG_OF_CONFIGFS=y
|
||||
CONFIG_OF_DYNAMIC=y
|
||||
CONFIG_OF_EARLY_FLATTREE=y
|
||||
CONFIG_OF_FLATTREE=y
|
||||
CONFIG_OF_GPIO=y
|
||||
CONFIG_OF_IRQ=y
|
||||
CONFIG_OF_KOBJ=y
|
||||
CONFIG_OF_MDIO=y
|
||||
CONFIG_OF_NET=y
|
||||
CONFIG_OF_OVERLAY=y
|
||||
CONFIG_OF_RESERVED_MEM=y
|
||||
CONFIG_OF_RESOLVE=y
|
||||
CONFIG_OLD_SIGACTION=y
|
||||
CONFIG_OLD_SIGSUSPEND3=y
|
||||
CONFIG_OUTER_CACHE=y
|
||||
CONFIG_OUTER_CACHE_SYNC=y
|
||||
CONFIG_PADATA=y
|
||||
CONFIG_PAGE_OFFSET=0xC0000000
|
||||
CONFIG_PCI=y
|
||||
CONFIG_PCIEAER=y
|
||||
CONFIG_PCIEPORTBUS=y
|
||||
CONFIG_PCIE_BRCMSTB=y
|
||||
CONFIG_PCIE_PME=y
|
||||
CONFIG_PCI_DOMAINS=y
|
||||
CONFIG_PCI_DOMAINS_GENERIC=y
|
||||
CONFIG_PCI_MSI=y
|
||||
CONFIG_PCI_MSI_IRQ_DOMAIN=y
|
||||
# CONFIG_PCI_V3_SEMI is not set
|
||||
CONFIG_PERF_USE_VMALLOC=y
|
||||
CONFIG_PGTABLE_LEVELS=3
|
||||
CONFIG_PHYLIB=y
|
||||
CONFIG_PHYS_ADDR_T_64BIT=y
|
||||
CONFIG_PINCTRL=y
|
||||
CONFIG_PINCTRL_BCM2835=y
|
||||
# CONFIG_PL310_ERRATA_588369 is not set
|
||||
# CONFIG_PL310_ERRATA_727915 is not set
|
||||
# CONFIG_PL310_ERRATA_753970 is not set
|
||||
# CONFIG_PL310_ERRATA_769419 is not set
|
||||
CONFIG_PLUGIN_HOSTCC="g++"
|
||||
CONFIG_PM=y
|
||||
CONFIG_PM_CLK=y
|
||||
# CONFIG_PM_DEBUG is not set
|
||||
CONFIG_PM_GENERIC_DOMAINS=y
|
||||
CONFIG_PM_GENERIC_DOMAINS_OF=y
|
||||
CONFIG_PM_GENERIC_DOMAINS_SLEEP=y
|
||||
CONFIG_PM_SLEEP=y
|
||||
CONFIG_PM_SLEEP_SMP=y
|
||||
CONFIG_POWER_RESET=y
|
||||
CONFIG_POWER_RESET_GPIO=y
|
||||
CONFIG_POWER_SUPPLY=y
|
||||
CONFIG_PRINTK_TIME=y
|
||||
CONFIG_PROC_PAGE_MONITOR=y
|
||||
CONFIG_PWM=y
|
||||
CONFIG_PWM_BCM2835=y
|
||||
# CONFIG_PWM_STMPE is not set
|
||||
CONFIG_PWM_SYSFS=y
|
||||
CONFIG_RAS=y
|
||||
CONFIG_RASPBERRYPI_FIRMWARE=y
|
||||
CONFIG_RASPBERRYPI_POWER=y
|
||||
CONFIG_RATIONAL=y
|
||||
CONFIG_RAW_DRIVER=y
|
||||
CONFIG_RCU_NEED_SEGCBLIST=y
|
||||
CONFIG_RCU_STALL_COMMON=y
|
||||
CONFIG_REFCOUNT_FULL=y
|
||||
CONFIG_REGMAP=y
|
||||
CONFIG_REGMAP_MMIO=y
|
||||
CONFIG_REGULATOR=y
|
||||
CONFIG_REGULATOR_FIXED_VOLTAGE=y
|
||||
CONFIG_REGULATOR_GPIO=y
|
||||
CONFIG_RESET_CONTROLLER=y
|
||||
CONFIG_RFS_ACCEL=y
|
||||
# CONFIG_RPIVID_MEM is not set
|
||||
CONFIG_RPS=y
|
||||
CONFIG_RWSEM_SPIN_ON_OWNER=y
|
||||
CONFIG_RWSEM_XCHGADD_ALGORITHM=y
|
||||
CONFIG_SCSI=y
|
||||
CONFIG_SCSI_ISCSI_ATTRS=y
|
||||
CONFIG_SCSI_MQ_DEFAULT=y
|
||||
# CONFIG_SCSI_PROC_FS is not set
|
||||
CONFIG_SERIAL_8250_BCM2835AUX=y
|
||||
# CONFIG_SERIAL_8250_DMA is not set
|
||||
CONFIG_SERIAL_8250_EXTENDED=y
|
||||
CONFIG_SERIAL_8250_FSL=y
|
||||
CONFIG_SERIAL_8250_NR_UARTS=1
|
||||
CONFIG_SERIAL_8250_RUNTIME_UARTS=0
|
||||
CONFIG_SERIAL_8250_SHARE_IRQ=y
|
||||
CONFIG_SERIAL_AMBA_PL011=y
|
||||
CONFIG_SERIAL_AMBA_PL011_CONSOLE=y
|
||||
CONFIG_SERIAL_DEV_BUS=y
|
||||
# CONFIG_SERIAL_DEV_CTRL_TTYPORT is not set
|
||||
CONFIG_SERIAL_OF_PLATFORM=y
|
||||
CONFIG_SG_POOL=y
|
||||
CONFIG_SMP=y
|
||||
CONFIG_SMP_ON_UP=y
|
||||
CONFIG_SPARSE_IRQ=y
|
||||
CONFIG_SPI=y
|
||||
# CONFIG_SPI_BCM2835AUX is not set
|
||||
CONFIG_SPI_MASTER=y
|
||||
CONFIG_SPI_MEM=y
|
||||
CONFIG_SPI_SLAVE=y
|
||||
# CONFIG_SPI_SLAVE_SYSTEM_CONTROL is not set
|
||||
# CONFIG_SPI_SLAVE_TIME is not set
|
||||
CONFIG_SRCU=y
|
||||
CONFIG_STMPE_I2C=y
|
||||
CONFIG_STMPE_SPI=y
|
||||
CONFIG_STREAM_PARSER=y
|
||||
# CONFIG_STRIP_ASM_SYMS is not set
|
||||
CONFIG_SUSPEND=y
|
||||
CONFIG_SUSPEND_FREEZER=y
|
||||
CONFIG_SWPHY=y
|
||||
CONFIG_SWP_EMULATE=y
|
||||
CONFIG_SYS_SUPPORTS_APM_EMULATION=y
|
||||
CONFIG_SYS_SUPPORTS_HUGETLBFS=y
|
||||
# CONFIG_TEXTSEARCH is not set
|
||||
CONFIG_THERMAL=y
|
||||
CONFIG_THERMAL_DEFAULT_GOV_STEP_WISE=y
|
||||
CONFIG_THERMAL_EMERGENCY_POWEROFF_DELAY_MS=0
|
||||
CONFIG_THERMAL_GOV_STEP_WISE=y
|
||||
CONFIG_THERMAL_OF=y
|
||||
# CONFIG_THUMB2_KERNEL is not set
|
||||
CONFIG_TICK_CPU_ACCOUNTING=y
|
||||
CONFIG_TIMER_OF=y
|
||||
CONFIG_TIMER_PROBE=y
|
||||
CONFIG_TMPFS_POSIX_ACL=y
|
||||
CONFIG_TREE_RCU=y
|
||||
CONFIG_TREE_SRCU=y
|
||||
CONFIG_TTY_PRINTK=y
|
||||
CONFIG_UEVENT_HELPER_PATH=""
|
||||
# CONFIG_UID16 is not set
|
||||
CONFIG_UNCOMPRESS_INCLUDE="debug/uncompress.h"
|
||||
CONFIG_USB=y
|
||||
CONFIG_USB_PCI=y
|
||||
CONFIG_USB_ANNOUNCE_NEW_DEVICES=y
|
||||
CONFIG_USB_COMMON=y
|
||||
CONFIG_USB_DWCOTG=y
|
||||
# CONFIG_USB_EHCI_HCD is not set
|
||||
CONFIG_USB_LAN78XX=y
|
||||
CONFIG_USB_NET_DRIVERS=y
|
||||
CONFIG_USB_NET_SMSC95XX=y
|
||||
CONFIG_USB_STORAGE=y
|
||||
CONFIG_USB_SUPPORT=y
|
||||
CONFIG_USB_UAS=y
|
||||
CONFIG_USB_USBNET=y
|
||||
CONFIG_USB_XHCI_HCD=y
|
||||
CONFIG_USB_XHCI_PCI=y
|
||||
CONFIG_USB_XHCI_PLATFORM=y
|
||||
CONFIG_USE_OF=y
|
||||
CONFIG_VDSO=y
|
||||
CONFIG_VFP=y
|
||||
CONFIG_VFPv3=y
|
||||
CONFIG_VT=y
|
||||
CONFIG_VT_CONSOLE=y
|
||||
CONFIG_VT_CONSOLE_SLEEP=y
|
||||
CONFIG_VT_HW_CONSOLE_BINDING=y
|
||||
CONFIG_WATCHDOG_CORE=y
|
||||
CONFIG_XPS=y
|
||||
CONFIG_XZ_DEC_ARM=y
|
||||
CONFIG_XZ_DEC_BCJ=y
|
||||
CONFIG_ZBOOT_ROM_BSS=0
|
||||
CONFIG_ZBOOT_ROM_TEXT=0
|
||||
492
root/target/linux/bcm27xx/bcm2710/config-4.14
Executable file
492
root/target/linux/bcm27xx/bcm2710/config-4.14
Executable file
|
|
@ -0,0 +1,492 @@
|
|||
CONFIG_64BIT=y
|
||||
# CONFIG_AIO is not set
|
||||
CONFIG_ARCH_BCM2835=y
|
||||
CONFIG_ARCH_CLOCKSOURCE_DATA=y
|
||||
CONFIG_ARCH_DMA_ADDR_T_64BIT=y
|
||||
CONFIG_ARCH_HAS_CACHE_LINE_SIZE=y
|
||||
CONFIG_ARCH_HAS_DEBUG_VIRTUAL=y
|
||||
CONFIG_ARCH_HAS_ELF_RANDOMIZE=y
|
||||
CONFIG_ARCH_HAS_FORTIFY_SOURCE=y
|
||||
CONFIG_ARCH_HAS_GCOV_PROFILE_ALL=y
|
||||
CONFIG_ARCH_HAS_GIGANTIC_PAGE=y
|
||||
CONFIG_ARCH_HAS_HOLES_MEMORYMODEL=y
|
||||
CONFIG_ARCH_HAS_KCOV=y
|
||||
CONFIG_ARCH_HAS_SET_MEMORY=y
|
||||
CONFIG_ARCH_HAS_SG_CHAIN=y
|
||||
CONFIG_ARCH_HAS_STRICT_KERNEL_RWX=y
|
||||
CONFIG_ARCH_HAS_STRICT_MODULE_RWX=y
|
||||
CONFIG_ARCH_HAS_TICK_BROADCAST=y
|
||||
CONFIG_ARCH_HIBERNATION_POSSIBLE=y
|
||||
CONFIG_ARCH_MMAP_RND_BITS=18
|
||||
CONFIG_ARCH_MMAP_RND_BITS_MAX=24
|
||||
CONFIG_ARCH_MMAP_RND_BITS_MIN=18
|
||||
CONFIG_ARCH_MMAP_RND_COMPAT_BITS_MIN=11
|
||||
# CONFIG_ARCH_OPTIONAL_KERNEL_RWX is not set
|
||||
# CONFIG_ARCH_OPTIONAL_KERNEL_RWX_DEFAULT is not set
|
||||
CONFIG_ARCH_PHYS_ADDR_T_64BIT=y
|
||||
CONFIG_ARCH_PROC_KCORE_TEXT=y
|
||||
CONFIG_ARCH_SELECT_MEMORY_MODEL=y
|
||||
CONFIG_ARCH_SPARSEMEM_DEFAULT=y
|
||||
CONFIG_ARCH_SPARSEMEM_ENABLE=y
|
||||
CONFIG_ARCH_SUPPORTS_ATOMIC_RMW=y
|
||||
CONFIG_ARCH_SUPPORTS_DEBUG_PAGEALLOC=y
|
||||
CONFIG_ARCH_SUPPORTS_MEMORY_FAILURE=y
|
||||
CONFIG_ARCH_SUPPORTS_NUMA_BALANCING=y
|
||||
CONFIG_ARCH_SUPPORTS_UPROBES=y
|
||||
CONFIG_ARCH_SUSPEND_POSSIBLE=y
|
||||
CONFIG_ARCH_USE_CMPXCHG_LOCKREF=y
|
||||
# CONFIG_ARCH_WANTS_THP_SWAP is not set
|
||||
CONFIG_ARCH_WANT_COMPAT_IPC_PARSE_VERSION=y
|
||||
CONFIG_ARCH_WANT_FRAME_POINTERS=y
|
||||
CONFIG_ARCH_WANT_HUGE_PMD_SHARE=y
|
||||
CONFIG_ARM64=y
|
||||
# CONFIG_ARM64_16K_PAGES is not set
|
||||
CONFIG_ARM64_4K_PAGES=y
|
||||
# CONFIG_ARM64_64K_PAGES is not set
|
||||
CONFIG_ARM64_CONT_SHIFT=4
|
||||
# CONFIG_ARM64_CRYPTO is not set
|
||||
CONFIG_ARM64_ERRATUM_819472=y
|
||||
CONFIG_ARM64_ERRATUM_824069=y
|
||||
CONFIG_ARM64_ERRATUM_826319=y
|
||||
CONFIG_ARM64_ERRATUM_827319=y
|
||||
CONFIG_ARM64_ERRATUM_832075=y
|
||||
CONFIG_ARM64_ERRATUM_843419=y
|
||||
CONFIG_ARM64_ERRATUM_1024718=y
|
||||
CONFIG_ARM64_HW_AFDBM=y
|
||||
# CONFIG_ARM64_LSE_ATOMICS is not set
|
||||
CONFIG_ARM64_MODULE_CMODEL_LARGE=y
|
||||
CONFIG_ARM64_PAGE_SHIFT=12
|
||||
CONFIG_ARM64_PAN=y
|
||||
# CONFIG_ARM64_PMEM is not set
|
||||
# CONFIG_ARM64_PTDUMP_CORE is not set
|
||||
# CONFIG_ARM64_PTDUMP_DEBUGFS is not set
|
||||
# CONFIG_ARM64_RANDOMIZE_TEXT_OFFSET is not set
|
||||
# CONFIG_ARM64_SW_TTBR0_PAN is not set
|
||||
CONFIG_ARM64_UAO=y
|
||||
CONFIG_ARM64_VA_BITS=39
|
||||
CONFIG_ARM64_VA_BITS_39=y
|
||||
# CONFIG_ARM64_VA_BITS_48 is not set
|
||||
CONFIG_ARM64_VHE=y
|
||||
CONFIG_ARM64_SSBD=y
|
||||
CONFIG_ARM_AMBA=y
|
||||
CONFIG_ARM_ARCH_TIMER=y
|
||||
CONFIG_ARM_ARCH_TIMER_EVTSTREAM=y
|
||||
CONFIG_ARM_ARCH_TIMER_OOL_WORKAROUND=y
|
||||
CONFIG_ARM_BCM2835_CPUFREQ=y
|
||||
CONFIG_ARM_GIC=y
|
||||
CONFIG_ARM_GIC_V3=y
|
||||
CONFIG_ARM_PSCI_FW=y
|
||||
# CONFIG_ARM_SP805_WATCHDOG is not set
|
||||
CONFIG_ARM_TIMER_SP804=y
|
||||
CONFIG_AUDIT_ARCH_COMPAT_GENERIC=y
|
||||
# CONFIG_BACKLIGHT_CLASS_DEVICE is not set
|
||||
CONFIG_BACKLIGHT_LCD_SUPPORT=y
|
||||
CONFIG_BCM2708_VCMEM=y
|
||||
# CONFIG_BCM2835_DEVGPIOMEM is not set
|
||||
CONFIG_BCM2835_MBOX=y
|
||||
# CONFIG_BCM2835_SMI is not set
|
||||
CONFIG_BCM2835_THERMAL=y
|
||||
CONFIG_BCM2835_VCHIQ=y
|
||||
# CONFIG_BCM2835_VCHIQ_SUPPORT_MEMDUMP is not set
|
||||
CONFIG_BCM2835_WDT=y
|
||||
# CONFIG_BCM_FLEXRM_MBOX is not set
|
||||
# CONFIG_BCM_VCIO is not set
|
||||
# CONFIG_BCM_VC_SM is not set
|
||||
CONFIG_BCM_VIDEOCORE=y
|
||||
# CONFIG_BLK_DEV_INITRD is not set
|
||||
CONFIG_BLK_DEV_LOOP=y
|
||||
CONFIG_BLK_DEV_RAM=y
|
||||
CONFIG_BLK_DEV_RAM_COUNT=16
|
||||
CONFIG_BLK_DEV_RAM_SIZE=4096
|
||||
CONFIG_BLK_DEV_SD=y
|
||||
CONFIG_BLK_SCSI_REQUEST=y
|
||||
CONFIG_BOUNCE=y
|
||||
CONFIG_BRCM_CHAR_DRIVERS=y
|
||||
CONFIG_BUILD_BIN2C=y
|
||||
CONFIG_CAVIUM_ERRATUM_22375=y
|
||||
CONFIG_CAVIUM_ERRATUM_23154=y
|
||||
CONFIG_CAVIUM_ERRATUM_27456=y
|
||||
CONFIG_CLKDEV_LOOKUP=y
|
||||
CONFIG_CLKSRC_MMIO=y
|
||||
CONFIG_CLONE_BACKWARDS=y
|
||||
CONFIG_CMA=y
|
||||
CONFIG_CMA_ALIGNMENT=8
|
||||
CONFIG_CMA_AREAS=7
|
||||
# CONFIG_CMA_DEBUG is not set
|
||||
# CONFIG_CMA_DEBUGFS is not set
|
||||
CONFIG_CMA_SIZE_MBYTES=16
|
||||
# CONFIG_CMA_SIZE_SEL_MAX is not set
|
||||
CONFIG_CMA_SIZE_SEL_MBYTES=y
|
||||
# CONFIG_CMA_SIZE_SEL_MIN is not set
|
||||
# CONFIG_CMA_SIZE_SEL_PERCENTAGE is not set
|
||||
CONFIG_COMMON_CLK=y
|
||||
# CONFIG_COMMON_CLK_VERSATILE is not set
|
||||
CONFIG_COMMON_CLK_XGENE=y
|
||||
# CONFIG_COMPAT is not set
|
||||
CONFIG_CONFIGFS_FS=y
|
||||
CONFIG_CONSOLE_TRANSLATIONS=y
|
||||
# CONFIG_CPUFREQ_DT is not set
|
||||
# CONFIG_CPU_BIG_ENDIAN is not set
|
||||
CONFIG_CPU_FREQ=y
|
||||
# CONFIG_CPU_FREQ_DEFAULT_GOV_ONDEMAND is not set
|
||||
CONFIG_CPU_FREQ_DEFAULT_GOV_PERFORMANCE=y
|
||||
CONFIG_CPU_FREQ_GOV_ATTR_SET=y
|
||||
CONFIG_CPU_FREQ_GOV_COMMON=y
|
||||
CONFIG_CPU_FREQ_GOV_CONSERVATIVE=y
|
||||
CONFIG_CPU_FREQ_GOV_ONDEMAND=y
|
||||
CONFIG_CPU_FREQ_GOV_PERFORMANCE=y
|
||||
CONFIG_CPU_FREQ_GOV_POWERSAVE=y
|
||||
CONFIG_CPU_FREQ_GOV_USERSPACE=y
|
||||
CONFIG_CPU_FREQ_STAT=y
|
||||
# CONFIG_CPU_HOTPLUG_STATE_CONTROL is not set
|
||||
CONFIG_CPU_IDLE=y
|
||||
CONFIG_CPU_IDLE_GOV_LADDER=y
|
||||
CONFIG_CPU_IDLE_GOV_MENU=y
|
||||
CONFIG_CPU_PM=y
|
||||
CONFIG_CPU_RMAP=y
|
||||
# CONFIG_CPU_THERMAL is not set
|
||||
CONFIG_CRC16=y
|
||||
CONFIG_CRYPTO_AEAD=y
|
||||
CONFIG_CRYPTO_AEAD2=y
|
||||
CONFIG_CRYPTO_CRC32=y
|
||||
CONFIG_CRYPTO_CRC32C=y
|
||||
CONFIG_CRYPTO_HASH=y
|
||||
CONFIG_CRYPTO_HASH2=y
|
||||
CONFIG_CRYPTO_MANAGER=y
|
||||
CONFIG_CRYPTO_MANAGER2=y
|
||||
CONFIG_CRYPTO_NULL2=y
|
||||
CONFIG_CRYPTO_RNG2=y
|
||||
CONFIG_CRYPTO_WORKQUEUE=y
|
||||
CONFIG_DCACHE_WORD_ACCESS=y
|
||||
CONFIG_DEBUG_BUGVERBOSE=y
|
||||
CONFIG_DEBUG_INFO=y
|
||||
CONFIG_DEFAULT_DUMMY=y
|
||||
CONFIG_DEFAULT_SCHEDULER=y
|
||||
CONFIG_DMADEVICES=y
|
||||
CONFIG_DMA_BCM2708=y
|
||||
CONFIG_DMA_BCM2835=y
|
||||
CONFIG_DMA_CMA=y
|
||||
CONFIG_DMA_ENGINE=y
|
||||
# CONFIG_DMA_NOOP_OPS is not set
|
||||
CONFIG_DMA_OF=y
|
||||
CONFIG_DMA_VIRTUAL_CHANNELS=y
|
||||
# CONFIG_DMA_VIRT_OPS is not set
|
||||
CONFIG_DNOTIFY=y
|
||||
# CONFIG_DRM_LIB_RANDOM is not set
|
||||
CONFIG_DTC=y
|
||||
CONFIG_DUMMY_CONSOLE=y
|
||||
CONFIG_EDAC_SUPPORT=y
|
||||
CONFIG_ENABLE_MUST_CHECK=y
|
||||
CONFIG_EXPORTFS=y
|
||||
CONFIG_EXT4_FS=y
|
||||
CONFIG_EXT4_FS_POSIX_ACL=y
|
||||
CONFIG_EXT4_FS_SECURITY=y
|
||||
# CONFIG_F2FS_CHECK_FS is not set
|
||||
CONFIG_F2FS_FS=y
|
||||
# CONFIG_F2FS_FS_SECURITY is not set
|
||||
CONFIG_F2FS_FS_XATTR=y
|
||||
CONFIG_F2FS_STAT_FS=y
|
||||
CONFIG_FB=y
|
||||
CONFIG_FB_BCM2708=y
|
||||
CONFIG_FB_CFB_COPYAREA=y
|
||||
CONFIG_FB_CFB_FILLRECT=y
|
||||
CONFIG_FB_CFB_IMAGEBLIT=y
|
||||
CONFIG_FB_CMDLINE=y
|
||||
# CONFIG_FB_PROVIDE_GET_FB_UNMAPPED_AREA is not set
|
||||
# CONFIG_FB_RPISENSE is not set
|
||||
CONFIG_FIRMWARE_IN_KERNEL=y
|
||||
CONFIG_FIXED_PHY=y
|
||||
CONFIG_FIX_EARLYCON_MEM=y
|
||||
# CONFIG_FONTS is not set
|
||||
CONFIG_FONT_8x16=y
|
||||
CONFIG_FONT_8x8=y
|
||||
CONFIG_FONT_SUPPORT=y
|
||||
CONFIG_FRAMEBUFFER_CONSOLE=y
|
||||
# CONFIG_FRAMEBUFFER_CONSOLE_DETECT_PRIMARY is not set
|
||||
# CONFIG_FRAMEBUFFER_CONSOLE_ROTATION is not set
|
||||
CONFIG_FRAME_POINTER=y
|
||||
CONFIG_FREEZER=y
|
||||
CONFIG_FSL_ERRATUM_A008585=y
|
||||
CONFIG_FS_MBCACHE=y
|
||||
CONFIG_FS_POSIX_ACL=y
|
||||
CONFIG_FUTEX_PI=y
|
||||
CONFIG_GENERIC_ALLOCATOR=y
|
||||
CONFIG_GENERIC_ARCH_TOPOLOGY=y
|
||||
CONFIG_GENERIC_BUG=y
|
||||
CONFIG_GENERIC_BUG_RELATIVE_POINTERS=y
|
||||
CONFIG_GENERIC_CLOCKEVENTS=y
|
||||
CONFIG_GENERIC_CLOCKEVENTS_BROADCAST=y
|
||||
CONFIG_GENERIC_CPU_AUTOPROBE=y
|
||||
CONFIG_GENERIC_CSUM=y
|
||||
CONFIG_GENERIC_EARLY_IOREMAP=y
|
||||
CONFIG_GENERIC_IDLE_POLL_SETUP=y
|
||||
CONFIG_GENERIC_IO=y
|
||||
CONFIG_GENERIC_IRQ_EFFECTIVE_AFF_MASK=y
|
||||
CONFIG_GENERIC_IRQ_MIGRATION=y
|
||||
CONFIG_GENERIC_IRQ_SHOW=y
|
||||
CONFIG_GENERIC_IRQ_SHOW_LEVEL=y
|
||||
CONFIG_GENERIC_PCI_IOMAP=y
|
||||
CONFIG_GENERIC_PINCONF=y
|
||||
CONFIG_GENERIC_PINCTRL_GROUPS=y
|
||||
CONFIG_GENERIC_PINMUX_FUNCTIONS=y
|
||||
CONFIG_GENERIC_SCHED_CLOCK=y
|
||||
CONFIG_GENERIC_SMP_IDLE_THREAD=y
|
||||
CONFIG_GENERIC_STRNCPY_FROM_USER=y
|
||||
CONFIG_GENERIC_STRNLEN_USER=y
|
||||
CONFIG_GENERIC_TIME_VSYSCALL=y
|
||||
CONFIG_GPIOLIB=y
|
||||
CONFIG_GPIOLIB_IRQCHIP=y
|
||||
CONFIG_GPIO_BCM_EXP=y
|
||||
CONFIG_GPIO_BCM_VIRT=y
|
||||
CONFIG_GPIO_SYSFS=y
|
||||
# CONFIG_GRO_CELLS is not set
|
||||
CONFIG_HANDLE_DOMAIN_IRQ=y
|
||||
CONFIG_HARDIRQS_SW_RESEND=y
|
||||
CONFIG_HAS_DMA=y
|
||||
CONFIG_HAS_IOMEM=y
|
||||
# CONFIG_HAVE_64BIT_ALIGNED_ACCESS is not set
|
||||
CONFIG_HAVE_ALIGNED_STRUCT_PAGE=y
|
||||
CONFIG_HAVE_ARCH_AUDITSYSCALL=y
|
||||
CONFIG_HAVE_ARCH_BITREVERSE=y
|
||||
CONFIG_HAVE_ARCH_HUGE_VMAP=y
|
||||
CONFIG_HAVE_ARCH_JUMP_LABEL=y
|
||||
CONFIG_HAVE_ARCH_KASAN=y
|
||||
CONFIG_HAVE_ARCH_KGDB=y
|
||||
CONFIG_HAVE_ARCH_PFN_VALID=y
|
||||
CONFIG_HAVE_ARCH_SECCOMP_FILTER=y
|
||||
CONFIG_HAVE_ARCH_TRACEHOOK=y
|
||||
CONFIG_HAVE_ARCH_TRANSPARENT_HUGEPAGE=y
|
||||
CONFIG_HAVE_ARCH_VMAP_STACK=y
|
||||
CONFIG_HAVE_ARM_SMCCC=y
|
||||
# CONFIG_HAVE_BOOTMEM_INFO_NODE is not set
|
||||
CONFIG_HAVE_CC_STACKPROTECTOR=y
|
||||
CONFIG_HAVE_CLK=y
|
||||
CONFIG_HAVE_CLK_PREPARE=y
|
||||
CONFIG_HAVE_CMPXCHG_DOUBLE=y
|
||||
CONFIG_HAVE_CMPXCHG_LOCAL=y
|
||||
CONFIG_HAVE_CONTEXT_TRACKING=y
|
||||
CONFIG_HAVE_C_RECORDMCOUNT=y
|
||||
CONFIG_HAVE_DEBUG_BUGVERBOSE=y
|
||||
CONFIG_HAVE_DEBUG_KMEMLEAK=y
|
||||
CONFIG_HAVE_DMA_API_DEBUG=y
|
||||
CONFIG_HAVE_DMA_CONTIGUOUS=y
|
||||
CONFIG_HAVE_DYNAMIC_FTRACE=y
|
||||
CONFIG_HAVE_EBPF_JIT=y
|
||||
CONFIG_HAVE_EFFICIENT_UNALIGNED_ACCESS=y
|
||||
CONFIG_HAVE_FTRACE_MCOUNT_RECORD=y
|
||||
CONFIG_HAVE_FUNCTION_GRAPH_TRACER=y
|
||||
CONFIG_HAVE_FUNCTION_TRACER=y
|
||||
CONFIG_HAVE_GENERIC_DMA_COHERENT=y
|
||||
CONFIG_HAVE_GENERIC_GUP=y
|
||||
CONFIG_HAVE_IRQ_TIME_ACCOUNTING=y
|
||||
CONFIG_HAVE_MEMBLOCK=y
|
||||
CONFIG_HAVE_MEMORY_PRESENT=y
|
||||
CONFIG_HAVE_NET_DSA=y
|
||||
CONFIG_HAVE_PATA_PLATFORM=y
|
||||
CONFIG_HAVE_PERF_EVENTS=y
|
||||
CONFIG_HAVE_PERF_REGS=y
|
||||
CONFIG_HAVE_PERF_USER_STACK_DUMP=y
|
||||
CONFIG_HAVE_RCU_TABLE_FREE=y
|
||||
CONFIG_HAVE_REGS_AND_STACK_ACCESS_API=y
|
||||
CONFIG_HAVE_SYSCALL_TRACEPOINTS=y
|
||||
CONFIG_HAVE_VIRT_CPU_ACCOUNTING_GEN=y
|
||||
CONFIG_HOLES_IN_ZONE=y
|
||||
CONFIG_HOTPLUG_CPU=y
|
||||
# CONFIG_HUGETLBFS is not set
|
||||
CONFIG_HW_CONSOLE=y
|
||||
CONFIG_IKCONFIG=y
|
||||
CONFIG_IKCONFIG_PROC=y
|
||||
CONFIG_ILLEGAL_POINTER_VALUE=0xdead000000000000
|
||||
CONFIG_INPUT=y
|
||||
CONFIG_INPUT_MOUSEDEV=y
|
||||
# CONFIG_INPUT_MOUSEDEV_PSAUX is not set
|
||||
CONFIG_INPUT_MOUSEDEV_SCREEN_X=1024
|
||||
CONFIG_INPUT_MOUSEDEV_SCREEN_Y=768
|
||||
CONFIG_IOMMU_HELPER=y
|
||||
CONFIG_IOSCHED_CFQ=y
|
||||
CONFIG_IRQCHIP=y
|
||||
CONFIG_IRQ_DOMAIN=y
|
||||
CONFIG_IRQ_DOMAIN_HIERARCHY=y
|
||||
CONFIG_IRQ_FORCED_THREADING=y
|
||||
CONFIG_IRQ_WORK=y
|
||||
CONFIG_JBD2=y
|
||||
# CONFIG_LCD_CLASS_DEVICE is not set
|
||||
CONFIG_LEDS_GPIO=y
|
||||
CONFIG_LEDS_TRIGGER_INPUT=y
|
||||
CONFIG_LIBFDT=y
|
||||
CONFIG_LOCK_SPIN_ON_OWNER=y
|
||||
CONFIG_LOGO=y
|
||||
CONFIG_LOGO_LINUX_CLUT224=y
|
||||
# CONFIG_LOGO_LINUX_MONO is not set
|
||||
# CONFIG_LOGO_LINUX_VGA16 is not set
|
||||
CONFIG_MAC_PARTITION=y
|
||||
CONFIG_MAGIC_SYSRQ=y
|
||||
CONFIG_MAILBOX=y
|
||||
# CONFIG_MAILBOX_TEST is not set
|
||||
CONFIG_MAX_RAW_DEVS=256
|
||||
CONFIG_MDIO_BUS=y
|
||||
CONFIG_MDIO_DEVICE=y
|
||||
CONFIG_MEMORY_ISOLATION=y
|
||||
CONFIG_MFD_SYSCON=y
|
||||
CONFIG_MICROCHIP_PHY=y
|
||||
CONFIG_MIGRATION=y
|
||||
CONFIG_MMC=y
|
||||
CONFIG_MMC_BCM2835=y
|
||||
CONFIG_MMC_BCM2835_DMA=y
|
||||
CONFIG_MMC_BCM2835_MMC=y
|
||||
CONFIG_MMC_BCM2835_PIO_DMA_BARRIER=2
|
||||
CONFIG_MMC_BCM2835_SDHOST=y
|
||||
CONFIG_MMC_BLOCK=y
|
||||
CONFIG_MMC_BLOCK_MINORS=32
|
||||
CONFIG_MMC_SDHCI=y
|
||||
CONFIG_MMC_SDHCI_PLTFM=y
|
||||
CONFIG_MODULES_USE_ELF_RELA=y
|
||||
# CONFIG_MTD is not set
|
||||
CONFIG_MUTEX_SPIN_ON_OWNER=y
|
||||
CONFIG_NEED_DMA_MAP_STATE=y
|
||||
CONFIG_NEED_SG_DMA_LENGTH=y
|
||||
CONFIG_NET_FLOW_LIMIT=y
|
||||
CONFIG_NLS=y
|
||||
CONFIG_NLS_ASCII=y
|
||||
CONFIG_NLS_DEFAULT="utf8"
|
||||
CONFIG_NO_BOOTMEM=y
|
||||
CONFIG_NO_HZ=y
|
||||
CONFIG_NO_HZ_COMMON=y
|
||||
CONFIG_NO_HZ_IDLE=y
|
||||
CONFIG_NO_IOPORT_MAP=y
|
||||
CONFIG_NR_CPUS=4
|
||||
# CONFIG_NUMA is not set
|
||||
CONFIG_OF=y
|
||||
CONFIG_OF_ADDRESS=y
|
||||
CONFIG_OF_CONFIGFS=y
|
||||
CONFIG_OF_DYNAMIC=y
|
||||
CONFIG_OF_EARLY_FLATTREE=y
|
||||
CONFIG_OF_FLATTREE=y
|
||||
CONFIG_OF_GPIO=y
|
||||
CONFIG_OF_MDIO=y
|
||||
CONFIG_OF_IRQ=y
|
||||
CONFIG_OF_NET=y
|
||||
CONFIG_OF_OVERLAY=y
|
||||
CONFIG_OF_RESERVED_MEM=y
|
||||
CONFIG_OF_RESOLVE=y
|
||||
CONFIG_PADATA=y
|
||||
CONFIG_PARTITION_PERCPU=y
|
||||
# CONFIG_PCI_DOMAINS is not set
|
||||
# CONFIG_PCI_DOMAINS_GENERIC is not set
|
||||
# CONFIG_PCI_SYSCALL is not set
|
||||
CONFIG_PGTABLE_LEVELS=3
|
||||
CONFIG_PHYLIB=y
|
||||
CONFIG_PHYS_ADDR_T_64BIT=y
|
||||
# CONFIG_PHY_XGENE is not set
|
||||
CONFIG_PINCTRL=y
|
||||
CONFIG_PINCTRL_BCM2835=y
|
||||
CONFIG_PM=y
|
||||
CONFIG_PM_CLK=y
|
||||
# CONFIG_PM_DEBUG is not set
|
||||
CONFIG_PM_GENERIC_DOMAINS=y
|
||||
CONFIG_PM_GENERIC_DOMAINS_OF=y
|
||||
CONFIG_PM_GENERIC_DOMAINS_SLEEP=y
|
||||
CONFIG_PM_SLEEP=y
|
||||
CONFIG_PM_SLEEP_SMP=y
|
||||
CONFIG_POWER_RESET=y
|
||||
CONFIG_POWER_SUPPLY=y
|
||||
CONFIG_PRINTK_TIME=y
|
||||
CONFIG_PROC_PAGE_MONITOR=y
|
||||
CONFIG_PWM=y
|
||||
CONFIG_PWM_BCM2835=y
|
||||
CONFIG_PWM_SYSFS=y
|
||||
# CONFIG_RANDOMIZE_BASE is not set
|
||||
CONFIG_RASPBERRYPI_FIRMWARE=y
|
||||
CONFIG_RASPBERRYPI_POWER=y
|
||||
CONFIG_RATIONAL=y
|
||||
CONFIG_RAW_DRIVER=y
|
||||
CONFIG_RCU_NEED_SEGCBLIST=y
|
||||
CONFIG_RCU_STALL_COMMON=y
|
||||
CONFIG_REGMAP=y
|
||||
CONFIG_REGMAP_MMIO=y
|
||||
CONFIG_REGULATOR=y
|
||||
CONFIG_REGULATOR_FIXED_VOLTAGE=y
|
||||
CONFIG_RFS_ACCEL=y
|
||||
CONFIG_RPS=y
|
||||
CONFIG_RWSEM_SPIN_ON_OWNER=y
|
||||
CONFIG_RWSEM_XCHGADD_ALGORITHM=y
|
||||
# CONFIG_SCHED_INFO is not set
|
||||
CONFIG_SCSI=y
|
||||
# CONFIG_SCSI_LOWLEVEL is not set
|
||||
# CONFIG_SCSI_PROC_FS is not set
|
||||
CONFIG_SERIAL_8250_BCM2835AUX=y
|
||||
# CONFIG_SERIAL_8250_DMA is not set
|
||||
CONFIG_SERIAL_8250_EXTENDED=y
|
||||
CONFIG_SERIAL_8250_FSL=y
|
||||
CONFIG_SERIAL_8250_NR_UARTS=1
|
||||
CONFIG_SERIAL_8250_RUNTIME_UARTS=0
|
||||
CONFIG_SERIAL_8250_SHARE_IRQ=y
|
||||
CONFIG_SERIAL_AMBA_PL011=y
|
||||
CONFIG_SERIAL_AMBA_PL011_CONSOLE=y
|
||||
CONFIG_SERIAL_OF_PLATFORM=y
|
||||
CONFIG_SG_POOL=y
|
||||
CONFIG_SMP=y
|
||||
CONFIG_SPARSEMEM=y
|
||||
CONFIG_SPARSEMEM_EXTREME=y
|
||||
CONFIG_SPARSEMEM_MANUAL=y
|
||||
CONFIG_SPARSEMEM_VMEMMAP=y
|
||||
CONFIG_SPARSEMEM_VMEMMAP_ENABLE=y
|
||||
CONFIG_SPARSE_IRQ=y
|
||||
CONFIG_SRCU=y
|
||||
# CONFIG_STRIP_ASM_SYMS is not set
|
||||
CONFIG_SUSPEND=y
|
||||
CONFIG_SUSPEND_FREEZER=y
|
||||
CONFIG_SWIOTLB=y
|
||||
CONFIG_SWPHY=y
|
||||
CONFIG_SYSCTL_EXCEPTION_TRACE=y
|
||||
CONFIG_SYS_SUPPORTS_HUGETLBFS=y
|
||||
# CONFIG_TEXTSEARCH is not set
|
||||
CONFIG_THERMAL=y
|
||||
CONFIG_THERMAL_DEFAULT_GOV_STEP_WISE=y
|
||||
CONFIG_THERMAL_EMERGENCY_POWEROFF_DELAY_MS=0
|
||||
CONFIG_THERMAL_GOV_STEP_WISE=y
|
||||
CONFIG_THERMAL_OF=y
|
||||
CONFIG_THIN_ARCHIVES=y
|
||||
CONFIG_THREAD_INFO_IN_TASK=y
|
||||
CONFIG_TICK_CPU_ACCOUNTING=y
|
||||
CONFIG_TIMER_OF=y
|
||||
CONFIG_TIMER_PROBE=y
|
||||
CONFIG_TMPFS_POSIX_ACL=y
|
||||
CONFIG_TREE_RCU=y
|
||||
CONFIG_TREE_SRCU=y
|
||||
CONFIG_UEVENT_HELPER_PATH=""
|
||||
CONFIG_USB=y
|
||||
CONFIG_USB_ANNOUNCE_NEW_DEVICES=y
|
||||
CONFIG_USB_COMMON=y
|
||||
CONFIG_USB_DWCOTG=y
|
||||
CONFIG_USB_LAN78XX=y
|
||||
# CONFIG_USB_EHCI_HCD is not set
|
||||
CONFIG_USB_NET_DRIVERS=y
|
||||
CONFIG_USB_NET_SMSC95XX=y
|
||||
CONFIG_USB_STORAGE=y
|
||||
CONFIG_USB_SUPPORT=y
|
||||
CONFIG_USB_UAS=y
|
||||
CONFIG_USB_USBNET=y
|
||||
CONFIG_VMAP_STACK=y
|
||||
CONFIG_VT=y
|
||||
CONFIG_VT_CONSOLE=y
|
||||
CONFIG_VT_CONSOLE_SLEEP=y
|
||||
CONFIG_VT_HW_CONSOLE_BINDING=y
|
||||
CONFIG_WATCHDOG_CORE=y
|
||||
CONFIG_XPS=y
|
||||
CONFIG_XZ_DEC_ARM=y
|
||||
CONFIG_XZ_DEC_BCJ=y
|
||||
CONFIG_MFD_RPISENSE_CORE=n
|
||||
CONFIG_DRM_PANEL_LVDS=n
|
||||
CONFIG_DRM_PANEL_INNOLUX_P079ZCA=n
|
||||
CONFIG_DRM_PANEL_SAMSUNG_S6E3HA2=n
|
||||
CONFIG_DRM_PANEL_SITRONIX_ST7789V=n
|
||||
CONFIG_DRM_VC4_HDMI_CEC=n
|
||||
CONFIG_SND_BCM2708_SOC_GOOGLEVOICEHAT_SOUNDCARD=n
|
||||
CONFIG_SND_BCM2708_SOC_RPI_CIRRUS=n
|
||||
CONFIG_SND_AUDIOINJECTOR_OCTO_SOUNDCARD=n
|
||||
CONFIG_SND_BCM2708_SOC_ALLO_PIANO_DAC_PLUS=n
|
||||
CONFIG_SND_BCM2708_SOC_ALLO_BOSS_DAC=n
|
||||
CONFIG_SND_BCM2708_SOC_ALLO_DIGIONE=n
|
||||
CONFIG_SND_BCM2708_SOC_ALLO_KATANA_DAC=n
|
||||
CONFIG_SND_SOC_ICS43432=n
|
||||
545
root/target/linux/bcm27xx/bcm2710/config-4.19
Executable file
545
root/target/linux/bcm27xx/bcm2710/config-4.19
Executable file
|
|
@ -0,0 +1,545 @@
|
|||
CONFIG_64BIT=y
|
||||
# CONFIG_AIO is not set
|
||||
CONFIG_ARCH_BCM2835=y
|
||||
CONFIG_ARCH_CLOCKSOURCE_DATA=y
|
||||
CONFIG_ARCH_DMA_ADDR_T_64BIT=y
|
||||
CONFIG_ARCH_HAS_CACHE_LINE_SIZE=y
|
||||
CONFIG_ARCH_HAS_DEBUG_VIRTUAL=y
|
||||
CONFIG_ARCH_HAS_ELF_RANDOMIZE=y
|
||||
CONFIG_ARCH_HAS_FAST_MULTIPLIER=y
|
||||
CONFIG_ARCH_HAS_FORTIFY_SOURCE=y
|
||||
CONFIG_ARCH_HAS_GCOV_PROFILE_ALL=y
|
||||
CONFIG_ARCH_HAS_GIGANTIC_PAGE=y
|
||||
CONFIG_ARCH_HAS_HOLES_MEMORYMODEL=y
|
||||
CONFIG_ARCH_HAS_KCOV=y
|
||||
CONFIG_ARCH_HAS_MEMBARRIER_SYNC_CORE=y
|
||||
CONFIG_ARCH_HAS_PTE_SPECIAL=y
|
||||
CONFIG_ARCH_HAS_SET_MEMORY=y
|
||||
CONFIG_ARCH_HAS_SG_CHAIN=y
|
||||
CONFIG_ARCH_HAS_STRICT_KERNEL_RWX=y
|
||||
CONFIG_ARCH_HAS_STRICT_MODULE_RWX=y
|
||||
CONFIG_ARCH_HAS_SYSCALL_WRAPPER=y
|
||||
CONFIG_ARCH_HAS_TICK_BROADCAST=y
|
||||
CONFIG_ARCH_HAVE_NMI_SAFE_CMPXCHG=y
|
||||
CONFIG_ARCH_HIBERNATION_POSSIBLE=y
|
||||
CONFIG_ARCH_INLINE_READ_LOCK=y
|
||||
CONFIG_ARCH_INLINE_READ_LOCK_BH=y
|
||||
CONFIG_ARCH_INLINE_READ_LOCK_IRQ=y
|
||||
CONFIG_ARCH_INLINE_READ_LOCK_IRQSAVE=y
|
||||
CONFIG_ARCH_INLINE_READ_UNLOCK=y
|
||||
CONFIG_ARCH_INLINE_READ_UNLOCK_BH=y
|
||||
CONFIG_ARCH_INLINE_READ_UNLOCK_IRQ=y
|
||||
CONFIG_ARCH_INLINE_READ_UNLOCK_IRQRESTORE=y
|
||||
CONFIG_ARCH_INLINE_SPIN_LOCK=y
|
||||
CONFIG_ARCH_INLINE_SPIN_LOCK_BH=y
|
||||
CONFIG_ARCH_INLINE_SPIN_LOCK_IRQ=y
|
||||
CONFIG_ARCH_INLINE_SPIN_LOCK_IRQSAVE=y
|
||||
CONFIG_ARCH_INLINE_SPIN_TRYLOCK=y
|
||||
CONFIG_ARCH_INLINE_SPIN_TRYLOCK_BH=y
|
||||
CONFIG_ARCH_INLINE_SPIN_UNLOCK=y
|
||||
CONFIG_ARCH_INLINE_SPIN_UNLOCK_BH=y
|
||||
CONFIG_ARCH_INLINE_SPIN_UNLOCK_IRQ=y
|
||||
CONFIG_ARCH_INLINE_SPIN_UNLOCK_IRQRESTORE=y
|
||||
CONFIG_ARCH_INLINE_WRITE_LOCK=y
|
||||
CONFIG_ARCH_INLINE_WRITE_LOCK_BH=y
|
||||
CONFIG_ARCH_INLINE_WRITE_LOCK_IRQ=y
|
||||
CONFIG_ARCH_INLINE_WRITE_LOCK_IRQSAVE=y
|
||||
CONFIG_ARCH_INLINE_WRITE_UNLOCK=y
|
||||
CONFIG_ARCH_INLINE_WRITE_UNLOCK_BH=y
|
||||
CONFIG_ARCH_INLINE_WRITE_UNLOCK_IRQ=y
|
||||
CONFIG_ARCH_INLINE_WRITE_UNLOCK_IRQRESTORE=y
|
||||
CONFIG_ARCH_MMAP_RND_BITS=18
|
||||
CONFIG_ARCH_MMAP_RND_BITS_MAX=24
|
||||
CONFIG_ARCH_MMAP_RND_BITS_MIN=18
|
||||
CONFIG_ARCH_MMAP_RND_COMPAT_BITS_MIN=11
|
||||
CONFIG_ARCH_PROC_KCORE_TEXT=y
|
||||
CONFIG_ARCH_SELECT_MEMORY_MODEL=y
|
||||
CONFIG_ARCH_SPARSEMEM_DEFAULT=y
|
||||
CONFIG_ARCH_SPARSEMEM_ENABLE=y
|
||||
CONFIG_ARCH_SUPPORTS_ATOMIC_RMW=y
|
||||
CONFIG_ARCH_SUPPORTS_DEBUG_PAGEALLOC=y
|
||||
CONFIG_ARCH_SUPPORTS_INT128=y
|
||||
CONFIG_ARCH_SUPPORTS_MEMORY_FAILURE=y
|
||||
CONFIG_ARCH_SUPPORTS_NUMA_BALANCING=y
|
||||
CONFIG_ARCH_SUPPORTS_UPROBES=y
|
||||
CONFIG_ARCH_SUSPEND_POSSIBLE=y
|
||||
CONFIG_ARCH_USE_CMPXCHG_LOCKREF=y
|
||||
CONFIG_ARCH_USE_QUEUED_RWLOCKS=y
|
||||
CONFIG_ARCH_USE_QUEUED_SPINLOCKS=y
|
||||
CONFIG_ARCH_WANT_COMPAT_IPC_PARSE_VERSION=y
|
||||
CONFIG_ARCH_WANT_FRAME_POINTERS=y
|
||||
CONFIG_ARCH_WANT_HUGE_PMD_SHARE=y
|
||||
CONFIG_ARM64=y
|
||||
# CONFIG_ARM64_16K_PAGES is not set
|
||||
CONFIG_ARM64_4K_PAGES=y
|
||||
# CONFIG_ARM64_64K_PAGES is not set
|
||||
CONFIG_ARM64_CONT_SHIFT=4
|
||||
# CONFIG_ARM64_CRYPTO is not set
|
||||
CONFIG_ARM64_ERRATUM_1024718=y
|
||||
CONFIG_ARM64_ERRATUM_1463225=y
|
||||
CONFIG_ARM64_ERRATUM_819472=y
|
||||
CONFIG_ARM64_ERRATUM_824069=y
|
||||
CONFIG_ARM64_ERRATUM_826319=y
|
||||
CONFIG_ARM64_ERRATUM_827319=y
|
||||
CONFIG_ARM64_ERRATUM_832075=y
|
||||
CONFIG_ARM64_ERRATUM_843419=y
|
||||
CONFIG_ARM64_HW_AFDBM=y
|
||||
# CONFIG_ARM64_LSE_ATOMICS is not set
|
||||
CONFIG_ARM64_MODULE_PLTS=y
|
||||
CONFIG_ARM64_PAGE_SHIFT=12
|
||||
CONFIG_ARM64_PAN=y
|
||||
CONFIG_ARM64_PA_BITS=48
|
||||
CONFIG_ARM64_PA_BITS_48=y
|
||||
# CONFIG_ARM64_PMEM is not set
|
||||
# CONFIG_ARM64_PTDUMP_DEBUGFS is not set
|
||||
# CONFIG_ARM64_RANDOMIZE_TEXT_OFFSET is not set
|
||||
CONFIG_ARM64_SSBD=y
|
||||
CONFIG_ARM64_SVE=y
|
||||
# CONFIG_ARM64_SW_TTBR0_PAN is not set
|
||||
CONFIG_ARM64_UAO=y
|
||||
CONFIG_ARM64_VA_BITS=39
|
||||
CONFIG_ARM64_VA_BITS_39=y
|
||||
# CONFIG_ARM64_VA_BITS_48 is not set
|
||||
CONFIG_ARM64_VHE=y
|
||||
CONFIG_ARM_AMBA=y
|
||||
CONFIG_ARM_ARCH_TIMER=y
|
||||
CONFIG_ARM_ARCH_TIMER_EVTSTREAM=y
|
||||
CONFIG_ARM_ARCH_TIMER_OOL_WORKAROUND=y
|
||||
CONFIG_ARM_BCM2835_CPUFREQ=y
|
||||
CONFIG_ARM_GIC=y
|
||||
CONFIG_ARM_GIC_V3=y
|
||||
CONFIG_ARM_GIC_V3_ITS=y
|
||||
CONFIG_ARM_PSCI_FW=y
|
||||
# CONFIG_ARM_SCMI_PROTOCOL is not set
|
||||
# CONFIG_ARM_SP805_WATCHDOG is not set
|
||||
CONFIG_ARM_TIMER_SP804=y
|
||||
# CONFIG_AX88796B_PHY is not set
|
||||
CONFIG_AUDIT_ARCH_COMPAT_GENERIC=y
|
||||
# CONFIG_BACKLIGHT_CLASS_DEVICE is not set
|
||||
CONFIG_BACKLIGHT_LCD_SUPPORT=y
|
||||
CONFIG_BCM2708_VCMEM=y
|
||||
# CONFIG_BCM2835_DEVGPIOMEM is not set
|
||||
CONFIG_BCM2835_MBOX=y
|
||||
CONFIG_BCM2835_POWER=y
|
||||
# CONFIG_BCM2835_SMI is not set
|
||||
CONFIG_BCM2835_THERMAL=y
|
||||
CONFIG_BCM2835_VCHIQ=y
|
||||
CONFIG_BCM2835_VCHIQ_MMAL=y
|
||||
CONFIG_BCM2835_WDT=y
|
||||
# CONFIG_BCM_VCIO is not set
|
||||
# CONFIG_BCM_VC_SM is not set
|
||||
CONFIG_BCM_VIDEOCORE=y
|
||||
# CONFIG_BLK_DEV_INITRD is not set
|
||||
CONFIG_BLK_DEV_LOOP=y
|
||||
CONFIG_BLK_DEV_RAM=y
|
||||
CONFIG_BLK_DEV_RAM_COUNT=16
|
||||
CONFIG_BLK_DEV_RAM_SIZE=4096
|
||||
CONFIG_BLK_DEV_SD=y
|
||||
CONFIG_BLK_SCSI_REQUEST=y
|
||||
CONFIG_BRCM_CHAR_DRIVERS=y
|
||||
CONFIG_BRCMSTB_THERMAL=y
|
||||
CONFIG_BUILD_BIN2C=y
|
||||
CONFIG_CAVIUM_ERRATUM_22375=y
|
||||
CONFIG_CAVIUM_ERRATUM_23154=y
|
||||
CONFIG_CAVIUM_ERRATUM_27456=y
|
||||
CONFIG_CLKDEV_LOOKUP=y
|
||||
CONFIG_CLKSRC_MMIO=y
|
||||
CONFIG_CLONE_BACKWARDS=y
|
||||
CONFIG_CMA=y
|
||||
CONFIG_CMA_ALIGNMENT=8
|
||||
CONFIG_CMA_AREAS=7
|
||||
# CONFIG_CMA_DEBUG is not set
|
||||
# CONFIG_CMA_DEBUGFS is not set
|
||||
CONFIG_CMA_SIZE_MBYTES=16
|
||||
# CONFIG_CMA_SIZE_SEL_MAX is not set
|
||||
CONFIG_CMA_SIZE_SEL_MBYTES=y
|
||||
# CONFIG_CMA_SIZE_SEL_MIN is not set
|
||||
# CONFIG_CMA_SIZE_SEL_PERCENTAGE is not set
|
||||
CONFIG_COMMON_CLK=y
|
||||
CONFIG_COMMON_CLK_XGENE=y
|
||||
# CONFIG_COMPAT is not set
|
||||
CONFIG_CONFIGFS_FS=y
|
||||
CONFIG_CONSOLE_TRANSLATIONS=y
|
||||
# CONFIG_CPUFREQ_DT is not set
|
||||
# CONFIG_CPU_BIG_ENDIAN is not set
|
||||
CONFIG_CPU_FREQ=y
|
||||
CONFIG_CPU_FREQ_DEFAULT_GOV_PERFORMANCE=y
|
||||
CONFIG_CPU_FREQ_GOV_ATTR_SET=y
|
||||
CONFIG_CPU_FREQ_GOV_COMMON=y
|
||||
CONFIG_CPU_FREQ_GOV_CONSERVATIVE=y
|
||||
CONFIG_CPU_FREQ_GOV_ONDEMAND=y
|
||||
CONFIG_CPU_FREQ_GOV_PERFORMANCE=y
|
||||
CONFIG_CPU_FREQ_GOV_POWERSAVE=y
|
||||
CONFIG_CPU_FREQ_GOV_USERSPACE=y
|
||||
CONFIG_CPU_FREQ_STAT=y
|
||||
# CONFIG_CPU_HOTPLUG_STATE_CONTROL is not set
|
||||
CONFIG_CPU_IDLE=y
|
||||
CONFIG_CPU_IDLE_GOV_LADDER=y
|
||||
CONFIG_CPU_IDLE_GOV_MENU=y
|
||||
CONFIG_CPU_PM=y
|
||||
CONFIG_CPU_RMAP=y
|
||||
# CONFIG_CPU_THERMAL is not set
|
||||
CONFIG_CRC16=y
|
||||
CONFIG_CRYPTO_AEAD=y
|
||||
CONFIG_CRYPTO_AEAD2=y
|
||||
CONFIG_CRYPTO_CRC32=y
|
||||
CONFIG_CRYPTO_CRC32C=y
|
||||
CONFIG_CRYPTO_HASH=y
|
||||
CONFIG_CRYPTO_HASH2=y
|
||||
CONFIG_CRYPTO_MANAGER=y
|
||||
CONFIG_CRYPTO_MANAGER2=y
|
||||
CONFIG_CRYPTO_NULL2=y
|
||||
CONFIG_CRYPTO_RNG2=y
|
||||
CONFIG_CRYPTO_WORKQUEUE=y
|
||||
CONFIG_DCACHE_WORD_ACCESS=y
|
||||
CONFIG_DEBUG_BUGVERBOSE=y
|
||||
CONFIG_DEBUG_INFO=y
|
||||
CONFIG_DEFAULT_MPTCP_PM="fullmesh"
|
||||
CONFIG_DMADEVICES=y
|
||||
CONFIG_DMA_BCM2708=y
|
||||
CONFIG_DMA_BCM2835=y
|
||||
CONFIG_DMA_CMA=y
|
||||
CONFIG_DMA_DIRECT_OPS=y
|
||||
CONFIG_DMA_ENGINE=y
|
||||
CONFIG_DMA_OF=y
|
||||
CONFIG_DMA_SHARED_BUFFER=m
|
||||
CONFIG_DMA_VIRTUAL_CHANNELS=y
|
||||
CONFIG_DNOTIFY=y
|
||||
CONFIG_DTC=y
|
||||
CONFIG_DUMMY_CONSOLE=y
|
||||
CONFIG_EDAC_SUPPORT=y
|
||||
CONFIG_ENABLE_MUST_CHECK=y
|
||||
CONFIG_EXT4_FS=y
|
||||
CONFIG_EXT4_FS_POSIX_ACL=y
|
||||
CONFIG_EXT4_FS_SECURITY=y
|
||||
# CONFIG_F2FS_CHECK_FS is not set
|
||||
CONFIG_F2FS_FS=y
|
||||
# CONFIG_F2FS_FS_SECURITY is not set
|
||||
CONFIG_F2FS_FS_XATTR=y
|
||||
CONFIG_F2FS_STAT_FS=y
|
||||
CONFIG_FB=y
|
||||
CONFIG_FB_BCM2708=y
|
||||
CONFIG_FB_CFB_COPYAREA=y
|
||||
CONFIG_FB_CFB_FILLRECT=y
|
||||
CONFIG_FB_CFB_IMAGEBLIT=y
|
||||
CONFIG_FB_CMDLINE=y
|
||||
# CONFIG_FB_RPISENSE is not set
|
||||
CONFIG_FIXED_PHY=y
|
||||
CONFIG_FIX_EARLYCON_MEM=y
|
||||
# CONFIG_FLATMEM_MANUAL is not set
|
||||
# CONFIG_FONTS is not set
|
||||
CONFIG_FONT_8x16=y
|
||||
CONFIG_FONT_8x8=y
|
||||
CONFIG_FONT_SUPPORT=y
|
||||
CONFIG_FRAMEBUFFER_CONSOLE=y
|
||||
# CONFIG_FRAMEBUFFER_CONSOLE_DETECT_PRIMARY is not set
|
||||
# CONFIG_FRAMEBUFFER_CONSOLE_ROTATION is not set
|
||||
CONFIG_FRAME_POINTER=y
|
||||
CONFIG_FREEZER=y
|
||||
CONFIG_FSL_ERRATUM_A008585=y
|
||||
CONFIG_FS_IOMAP=y
|
||||
CONFIG_FS_MBCACHE=y
|
||||
CONFIG_FS_POSIX_ACL=y
|
||||
CONFIG_GENERIC_ALLOCATOR=y
|
||||
CONFIG_GENERIC_ARCH_TOPOLOGY=y
|
||||
CONFIG_GENERIC_BUG=y
|
||||
CONFIG_GENERIC_BUG_RELATIVE_POINTERS=y
|
||||
CONFIG_GENERIC_CLOCKEVENTS=y
|
||||
CONFIG_GENERIC_CLOCKEVENTS_BROADCAST=y
|
||||
CONFIG_GENERIC_CPU_AUTOPROBE=y
|
||||
CONFIG_GENERIC_CSUM=y
|
||||
CONFIG_GENERIC_EARLY_IOREMAP=y
|
||||
CONFIG_GENERIC_IDLE_POLL_SETUP=y
|
||||
CONFIG_GENERIC_IRQ_EFFECTIVE_AFF_MASK=y
|
||||
CONFIG_GENERIC_IRQ_MIGRATION=y
|
||||
CONFIG_GENERIC_IRQ_MULTI_HANDLER=y
|
||||
CONFIG_GENERIC_IRQ_SHOW=y
|
||||
CONFIG_GENERIC_IRQ_SHOW_LEVEL=y
|
||||
CONFIG_GENERIC_MSI_IRQ=y
|
||||
CONFIG_GENERIC_MSI_IRQ_DOMAIN=y
|
||||
CONFIG_GENERIC_PCI_IOMAP=y
|
||||
CONFIG_GENERIC_PINCONF=y
|
||||
CONFIG_GENERIC_PINCTRL_GROUPS=y
|
||||
CONFIG_GENERIC_PINMUX_FUNCTIONS=y
|
||||
CONFIG_GENERIC_SCHED_CLOCK=y
|
||||
CONFIG_GENERIC_SMP_IDLE_THREAD=y
|
||||
CONFIG_GENERIC_STRNCPY_FROM_USER=y
|
||||
CONFIG_GENERIC_STRNLEN_USER=y
|
||||
CONFIG_GENERIC_TIME_VSYSCALL=y
|
||||
CONFIG_GPIOLIB=y
|
||||
CONFIG_GPIOLIB_IRQCHIP=y
|
||||
CONFIG_GPIO_BCM_VIRT=y
|
||||
CONFIG_GPIO_RASPBERRYPI_EXP=y
|
||||
CONFIG_GPIO_SYSFS=y
|
||||
CONFIG_HANDLE_DOMAIN_IRQ=y
|
||||
CONFIG_HARDEN_BRANCH_PREDICTOR=y
|
||||
CONFIG_HARDIRQS_SW_RESEND=y
|
||||
CONFIG_HAS_DMA=y
|
||||
CONFIG_HAS_IOMEM=y
|
||||
CONFIG_HAVE_ALIGNED_STRUCT_PAGE=y
|
||||
CONFIG_HAVE_ARCH_AUDITSYSCALL=y
|
||||
CONFIG_HAVE_ARCH_BITREVERSE=y
|
||||
CONFIG_HAVE_ARCH_HUGE_VMAP=y
|
||||
CONFIG_HAVE_ARCH_JUMP_LABEL=y
|
||||
CONFIG_HAVE_ARCH_KASAN=y
|
||||
CONFIG_HAVE_ARCH_KGDB=y
|
||||
CONFIG_HAVE_ARCH_PFN_VALID=y
|
||||
CONFIG_HAVE_ARCH_PREL32_RELOCATIONS=y
|
||||
CONFIG_HAVE_ARCH_SECCOMP_FILTER=y
|
||||
CONFIG_HAVE_ARCH_THREAD_STRUCT_WHITELIST=y
|
||||
CONFIG_HAVE_ARCH_TRACEHOOK=y
|
||||
CONFIG_HAVE_ARCH_TRANSPARENT_HUGEPAGE=y
|
||||
CONFIG_HAVE_ARCH_VMAP_STACK=y
|
||||
CONFIG_HAVE_ARM_SMCCC=y
|
||||
CONFIG_HAVE_CLK=y
|
||||
CONFIG_HAVE_CLK_PREPARE=y
|
||||
CONFIG_HAVE_CMPXCHG_DOUBLE=y
|
||||
CONFIG_HAVE_CMPXCHG_LOCAL=y
|
||||
CONFIG_HAVE_CONTEXT_TRACKING=y
|
||||
CONFIG_HAVE_C_RECORDMCOUNT=y
|
||||
CONFIG_HAVE_DEBUG_BUGVERBOSE=y
|
||||
CONFIG_HAVE_DEBUG_KMEMLEAK=y
|
||||
CONFIG_HAVE_DMA_CONTIGUOUS=y
|
||||
CONFIG_HAVE_DYNAMIC_FTRACE=y
|
||||
CONFIG_HAVE_EBPF_JIT=y
|
||||
CONFIG_HAVE_EFFICIENT_UNALIGNED_ACCESS=y
|
||||
CONFIG_HAVE_FTRACE_MCOUNT_RECORD=y
|
||||
CONFIG_HAVE_FUNCTION_GRAPH_TRACER=y
|
||||
CONFIG_HAVE_FUNCTION_TRACER=y
|
||||
CONFIG_HAVE_GENERIC_DMA_COHERENT=y
|
||||
CONFIG_HAVE_GENERIC_GUP=y
|
||||
CONFIG_HAVE_IRQ_TIME_ACCOUNTING=y
|
||||
CONFIG_HAVE_MEMBLOCK=y
|
||||
CONFIG_HAVE_MEMORY_PRESENT=y
|
||||
CONFIG_HAVE_MOD_ARCH_SPECIFIC=y
|
||||
CONFIG_HAVE_NET_DSA=y
|
||||
CONFIG_HAVE_PATA_PLATFORM=y
|
||||
CONFIG_HAVE_PERF_EVENTS=y
|
||||
CONFIG_HAVE_PERF_REGS=y
|
||||
CONFIG_HAVE_PERF_USER_STACK_DUMP=y
|
||||
CONFIG_HAVE_RCU_TABLE_FREE=y
|
||||
CONFIG_HAVE_REGS_AND_STACK_ACCESS_API=y
|
||||
CONFIG_HAVE_RSEQ=y
|
||||
CONFIG_HAVE_SYSCALL_TRACEPOINTS=y
|
||||
CONFIG_HAVE_VIRT_CPU_ACCOUNTING_GEN=y
|
||||
CONFIG_HOLES_IN_ZONE=y
|
||||
CONFIG_HOTPLUG_CPU=y
|
||||
# CONFIG_HUGETLBFS is not set
|
||||
CONFIG_HW_CONSOLE=y
|
||||
CONFIG_IKCONFIG=y
|
||||
CONFIG_IKCONFIG_PROC=y
|
||||
CONFIG_ILLEGAL_POINTER_VALUE=0xdead000000000000
|
||||
CONFIG_INLINE_READ_LOCK=y
|
||||
CONFIG_INLINE_READ_LOCK_BH=y
|
||||
CONFIG_INLINE_READ_LOCK_IRQ=y
|
||||
CONFIG_INLINE_READ_LOCK_IRQSAVE=y
|
||||
CONFIG_INLINE_READ_UNLOCK_BH=y
|
||||
CONFIG_INLINE_READ_UNLOCK_IRQRESTORE=y
|
||||
CONFIG_INLINE_SPIN_LOCK=y
|
||||
CONFIG_INLINE_SPIN_LOCK_BH=y
|
||||
CONFIG_INLINE_SPIN_LOCK_IRQ=y
|
||||
CONFIG_INLINE_SPIN_LOCK_IRQSAVE=y
|
||||
CONFIG_INLINE_SPIN_TRYLOCK=y
|
||||
CONFIG_INLINE_SPIN_TRYLOCK_BH=y
|
||||
CONFIG_INLINE_SPIN_UNLOCK_BH=y
|
||||
CONFIG_INLINE_SPIN_UNLOCK_IRQRESTORE=y
|
||||
CONFIG_INLINE_WRITE_LOCK=y
|
||||
CONFIG_INLINE_WRITE_LOCK_BH=y
|
||||
CONFIG_INLINE_WRITE_LOCK_IRQ=y
|
||||
CONFIG_INLINE_WRITE_LOCK_IRQSAVE=y
|
||||
CONFIG_INLINE_WRITE_UNLOCK_BH=y
|
||||
CONFIG_INLINE_WRITE_UNLOCK_IRQRESTORE=y
|
||||
CONFIG_INPUT=y
|
||||
CONFIG_INPUT_MOUSEDEV=y
|
||||
# CONFIG_INPUT_MOUSEDEV_PSAUX is not set
|
||||
CONFIG_INPUT_MOUSEDEV_SCREEN_X=1024
|
||||
CONFIG_INPUT_MOUSEDEV_SCREEN_Y=768
|
||||
CONFIG_IOSCHED_CFQ=y
|
||||
CONFIG_IRQCHIP=y
|
||||
CONFIG_IRQ_DOMAIN=y
|
||||
CONFIG_IRQ_DOMAIN_HIERARCHY=y
|
||||
CONFIG_IRQ_FORCED_THREADING=y
|
||||
CONFIG_IRQ_WORK=y
|
||||
CONFIG_JBD2=y
|
||||
# CONFIG_LCD_CLASS_DEVICE is not set
|
||||
CONFIG_LEDS_GPIO=y
|
||||
CONFIG_LEDS_TRIGGER_INPUT=y
|
||||
CONFIG_LIBFDT=y
|
||||
CONFIG_LOCK_DEBUGGING_SUPPORT=y
|
||||
CONFIG_LOCK_SPIN_ON_OWNER=y
|
||||
CONFIG_LOGO=y
|
||||
CONFIG_LOGO_LINUX_CLUT224=y
|
||||
# CONFIG_LOGO_LINUX_MONO is not set
|
||||
# CONFIG_LOGO_LINUX_VGA16 is not set
|
||||
CONFIG_MAC_PARTITION=y
|
||||
CONFIG_MAGIC_SYSRQ=y
|
||||
CONFIG_MAILBOX=y
|
||||
# CONFIG_MAILBOX_TEST is not set
|
||||
CONFIG_MAX_RAW_DEVS=256
|
||||
CONFIG_MDIO_BUS=y
|
||||
CONFIG_MDIO_DEVICE=y
|
||||
CONFIG_MEMFD_CREATE=y
|
||||
CONFIG_MEMORY_ISOLATION=y
|
||||
# CONFIG_MFD_RPISENSE_CORE is not set
|
||||
CONFIG_MFD_SYSCON=y
|
||||
CONFIG_MICROCHIP_PHY=y
|
||||
CONFIG_MIGRATION=y
|
||||
CONFIG_MMC=y
|
||||
CONFIG_MMC_BCM2835=y
|
||||
CONFIG_MMC_BCM2835_DMA=y
|
||||
CONFIG_MMC_BCM2835_MMC=y
|
||||
CONFIG_MMC_BCM2835_PIO_DMA_BARRIER=2
|
||||
CONFIG_MMC_BCM2835_SDHOST=y
|
||||
CONFIG_MMC_BLOCK=y
|
||||
CONFIG_MMC_BLOCK_MINORS=32
|
||||
CONFIG_MMC_SDHCI=y
|
||||
CONFIG_MMC_SDHCI_PLTFM=y
|
||||
CONFIG_MODULES_USE_ELF_RELA=y
|
||||
# CONFIG_MTD is not set
|
||||
CONFIG_MUTEX_SPIN_ON_OWNER=y
|
||||
CONFIG_NEED_DMA_MAP_STATE=y
|
||||
CONFIG_NEED_SG_DMA_LENGTH=y
|
||||
CONFIG_NET_FLOW_LIMIT=y
|
||||
CONFIG_NLS=y
|
||||
CONFIG_NLS_ASCII=y
|
||||
CONFIG_NLS_DEFAULT="utf8"
|
||||
CONFIG_NO_BOOTMEM=y
|
||||
CONFIG_NO_HZ=y
|
||||
CONFIG_NO_HZ_COMMON=y
|
||||
CONFIG_NO_HZ_IDLE=y
|
||||
CONFIG_NO_IOPORT_MAP=y
|
||||
CONFIG_NR_CPUS=4
|
||||
# CONFIG_NUMA is not set
|
||||
CONFIG_NVMEM=y
|
||||
CONFIG_OF=y
|
||||
CONFIG_OF_ADDRESS=y
|
||||
CONFIG_OF_CONFIGFS=y
|
||||
CONFIG_OF_DYNAMIC=y
|
||||
CONFIG_OF_EARLY_FLATTREE=y
|
||||
CONFIG_OF_FLATTREE=y
|
||||
CONFIG_OF_GPIO=y
|
||||
CONFIG_OF_IRQ=y
|
||||
CONFIG_OF_KOBJ=y
|
||||
CONFIG_OF_MDIO=y
|
||||
CONFIG_OF_NET=y
|
||||
CONFIG_OF_OVERLAY=y
|
||||
CONFIG_OF_RESERVED_MEM=y
|
||||
CONFIG_OF_RESOLVE=y
|
||||
CONFIG_PADATA=y
|
||||
CONFIG_PARTITION_PERCPU=y
|
||||
CONFIG_PGTABLE_LEVELS=3
|
||||
CONFIG_PHYLIB=y
|
||||
CONFIG_PHYS_ADDR_T_64BIT=y
|
||||
CONFIG_PINCTRL=y
|
||||
CONFIG_PINCTRL_BCM2835=y
|
||||
CONFIG_PLUGIN_HOSTCC="g++"
|
||||
CONFIG_PM=y
|
||||
CONFIG_PM_CLK=y
|
||||
# CONFIG_PM_DEBUG is not set
|
||||
CONFIG_PM_GENERIC_DOMAINS=y
|
||||
CONFIG_PM_GENERIC_DOMAINS_OF=y
|
||||
CONFIG_PM_GENERIC_DOMAINS_SLEEP=y
|
||||
CONFIG_PM_SLEEP=y
|
||||
CONFIG_PM_SLEEP_SMP=y
|
||||
CONFIG_POWER_RESET=y
|
||||
CONFIG_POWER_SUPPLY=y
|
||||
CONFIG_PRINTK_TIME=y
|
||||
CONFIG_PROC_PAGE_MONITOR=y
|
||||
CONFIG_PWM=y
|
||||
CONFIG_PWM_BCM2835=y
|
||||
CONFIG_PWM_SYSFS=y
|
||||
CONFIG_QUEUED_RWLOCKS=y
|
||||
CONFIG_QUEUED_SPINLOCKS=y
|
||||
# CONFIG_RANDOMIZE_BASE is not set
|
||||
CONFIG_RASPBERRYPI_FIRMWARE=y
|
||||
CONFIG_RASPBERRYPI_POWER=y
|
||||
CONFIG_RATIONAL=y
|
||||
CONFIG_RAW_DRIVER=y
|
||||
CONFIG_RCU_NEED_SEGCBLIST=y
|
||||
CONFIG_RCU_STALL_COMMON=y
|
||||
CONFIG_REFCOUNT_FULL=y
|
||||
CONFIG_REGMAP=y
|
||||
CONFIG_REGMAP_MMIO=y
|
||||
CONFIG_REGULATOR=y
|
||||
CONFIG_REGULATOR_FIXED_VOLTAGE=y
|
||||
CONFIG_RFS_ACCEL=y
|
||||
# CONFIG_RPIVID_MEM is not set
|
||||
CONFIG_RPS=y
|
||||
CONFIG_RWSEM_SPIN_ON_OWNER=y
|
||||
CONFIG_RWSEM_XCHGADD_ALGORITHM=y
|
||||
CONFIG_SCSI=y
|
||||
# CONFIG_SCSI_LOWLEVEL is not set
|
||||
# CONFIG_SCSI_PROC_FS is not set
|
||||
# CONFIG_SENSORS_RASPBERRYPI_HWMON is not set
|
||||
CONFIG_SERIAL_8250_BCM2835AUX=y
|
||||
# CONFIG_SERIAL_8250_DMA is not set
|
||||
CONFIG_SERIAL_8250_EXTENDED=y
|
||||
CONFIG_SERIAL_8250_FSL=y
|
||||
CONFIG_SERIAL_8250_NR_UARTS=1
|
||||
CONFIG_SERIAL_8250_RUNTIME_UARTS=0
|
||||
CONFIG_SERIAL_8250_SHARE_IRQ=y
|
||||
CONFIG_SERIAL_AMBA_PL011=y
|
||||
CONFIG_SERIAL_AMBA_PL011_CONSOLE=y
|
||||
CONFIG_SERIAL_OF_PLATFORM=y
|
||||
CONFIG_SG_POOL=y
|
||||
CONFIG_SMP=y
|
||||
# CONFIG_SND_AUDIOSENSE_PI is not set
|
||||
# CONFIG_SND_BCM2708_SOC_HIFIBERRY_DACPLUSADC is not set
|
||||
# CONFIG_SND_BCM2708_SOC_I_SABRE_Q2M is not set
|
||||
# CONFIG_SND_RPI_SIMPLE_SOUNDCARD is not set
|
||||
# CONFIG_SND_RPI_WM8804_SOUNDCARD is not set
|
||||
# CONFIG_SND_SOC_AD193X_SPI is not set
|
||||
CONFIG_SPARSEMEM=y
|
||||
CONFIG_SPARSEMEM_EXTREME=y
|
||||
CONFIG_SPARSEMEM_MANUAL=y
|
||||
CONFIG_SPARSEMEM_VMEMMAP=y
|
||||
CONFIG_SPARSEMEM_VMEMMAP_ENABLE=y
|
||||
CONFIG_SPARSE_IRQ=y
|
||||
CONFIG_SRCU=y
|
||||
CONFIG_STREAM_PARSER=y
|
||||
# CONFIG_STRIP_ASM_SYMS is not set
|
||||
CONFIG_SUSPEND=y
|
||||
CONFIG_SUSPEND_FREEZER=y
|
||||
CONFIG_SWIOTLB=y
|
||||
CONFIG_SWPHY=y
|
||||
CONFIG_SYSCTL_EXCEPTION_TRACE=y
|
||||
CONFIG_SYS_SUPPORTS_HUGETLBFS=y
|
||||
# CONFIG_TEXTSEARCH is not set
|
||||
CONFIG_THERMAL=y
|
||||
CONFIG_THERMAL_DEFAULT_GOV_STEP_WISE=y
|
||||
CONFIG_THERMAL_EMERGENCY_POWEROFF_DELAY_MS=0
|
||||
CONFIG_THERMAL_GOV_STEP_WISE=y
|
||||
CONFIG_THERMAL_OF=y
|
||||
CONFIG_THREAD_INFO_IN_TASK=y
|
||||
CONFIG_TICK_CPU_ACCOUNTING=y
|
||||
CONFIG_TIMER_OF=y
|
||||
CONFIG_TIMER_PROBE=y
|
||||
CONFIG_TMPFS_POSIX_ACL=y
|
||||
# CONFIG_TOUCHSCREEN_RPI_FT5406 is not set
|
||||
CONFIG_TREE_RCU=y
|
||||
CONFIG_TREE_SRCU=y
|
||||
CONFIG_UEVENT_HELPER_PATH=""
|
||||
CONFIG_UNMAP_KERNEL_AT_EL0=y
|
||||
CONFIG_USB=y
|
||||
CONFIG_USB_ANNOUNCE_NEW_DEVICES=y
|
||||
CONFIG_USB_COMMON=y
|
||||
CONFIG_USB_DWCOTG=y
|
||||
# CONFIG_USB_EHCI_HCD is not set
|
||||
CONFIG_USB_LAN78XX=y
|
||||
CONFIG_USB_NET_DRIVERS=y
|
||||
CONFIG_USB_NET_SMSC95XX=y
|
||||
CONFIG_USB_STORAGE=y
|
||||
CONFIG_USB_SUPPORT=y
|
||||
CONFIG_USB_UAS=y
|
||||
CONFIG_USB_USBNET=y
|
||||
# CONFIG_VIDEO_CODEC_BCM2835 is not set
|
||||
CONFIG_VMAP_STACK=y
|
||||
CONFIG_VT=y
|
||||
CONFIG_VT_CONSOLE=y
|
||||
CONFIG_VT_CONSOLE_SLEEP=y
|
||||
CONFIG_VT_HW_CONSOLE_BINDING=y
|
||||
CONFIG_WATCHDOG_CORE=y
|
||||
CONFIG_XPS=y
|
||||
CONFIG_XZ_DEC_ARM=y
|
||||
CONFIG_XZ_DEC_BCJ=y
|
||||
CONFIG_ZONE_DMA32=y
|
||||
667
root/target/linux/bcm27xx/bcm2711/config-4.19
Executable file
667
root/target/linux/bcm27xx/bcm2711/config-4.19
Executable file
|
|
@ -0,0 +1,667 @@
|
|||
CONFIG_64BIT=y
|
||||
# CONFIG_AIO is not set
|
||||
CONFIG_ARCH_BCM2835=y
|
||||
CONFIG_ARCH_CLOCKSOURCE_DATA=y
|
||||
CONFIG_ARCH_DMA_ADDR_T_64BIT=y
|
||||
CONFIG_ARCH_HAS_CACHE_LINE_SIZE=y
|
||||
CONFIG_ARCH_HAS_DEBUG_VIRTUAL=y
|
||||
CONFIG_ARCH_HAS_ELF_RANDOMIZE=y
|
||||
CONFIG_ARCH_HAS_FAST_MULTIPLIER=y
|
||||
CONFIG_ARCH_HAS_FORTIFY_SOURCE=y
|
||||
CONFIG_ARCH_HAS_GCOV_PROFILE_ALL=y
|
||||
CONFIG_ARCH_HAS_GIGANTIC_PAGE=y
|
||||
CONFIG_ARCH_HAS_HOLES_MEMORYMODEL=y
|
||||
CONFIG_ARCH_HAS_KCOV=y
|
||||
CONFIG_ARCH_HAS_MEMBARRIER_SYNC_CORE=y
|
||||
CONFIG_ARCH_HAS_PHYS_TO_DMA=y
|
||||
CONFIG_ARCH_HAS_PTE_SPECIAL=y
|
||||
CONFIG_ARCH_HAS_SET_MEMORY=y
|
||||
CONFIG_ARCH_HAS_SG_CHAIN=y
|
||||
CONFIG_ARCH_HAS_STRICT_KERNEL_RWX=y
|
||||
CONFIG_ARCH_HAS_STRICT_MODULE_RWX=y
|
||||
CONFIG_ARCH_HAS_SYSCALL_WRAPPER=y
|
||||
CONFIG_ARCH_HAS_TICK_BROADCAST=y
|
||||
CONFIG_ARCH_HAVE_NMI_SAFE_CMPXCHG=y
|
||||
CONFIG_ARCH_HIBERNATION_POSSIBLE=y
|
||||
CONFIG_ARCH_INLINE_READ_LOCK=y
|
||||
CONFIG_ARCH_INLINE_READ_LOCK_BH=y
|
||||
CONFIG_ARCH_INLINE_READ_LOCK_IRQ=y
|
||||
CONFIG_ARCH_INLINE_READ_LOCK_IRQSAVE=y
|
||||
CONFIG_ARCH_INLINE_READ_UNLOCK=y
|
||||
CONFIG_ARCH_INLINE_READ_UNLOCK_BH=y
|
||||
CONFIG_ARCH_INLINE_READ_UNLOCK_IRQ=y
|
||||
CONFIG_ARCH_INLINE_READ_UNLOCK_IRQRESTORE=y
|
||||
CONFIG_ARCH_INLINE_SPIN_LOCK=y
|
||||
CONFIG_ARCH_INLINE_SPIN_LOCK_BH=y
|
||||
CONFIG_ARCH_INLINE_SPIN_LOCK_IRQ=y
|
||||
CONFIG_ARCH_INLINE_SPIN_LOCK_IRQSAVE=y
|
||||
CONFIG_ARCH_INLINE_SPIN_TRYLOCK=y
|
||||
CONFIG_ARCH_INLINE_SPIN_TRYLOCK_BH=y
|
||||
CONFIG_ARCH_INLINE_SPIN_UNLOCK=y
|
||||
CONFIG_ARCH_INLINE_SPIN_UNLOCK_BH=y
|
||||
CONFIG_ARCH_INLINE_SPIN_UNLOCK_IRQ=y
|
||||
CONFIG_ARCH_INLINE_SPIN_UNLOCK_IRQRESTORE=y
|
||||
CONFIG_ARCH_INLINE_WRITE_LOCK=y
|
||||
CONFIG_ARCH_INLINE_WRITE_LOCK_BH=y
|
||||
CONFIG_ARCH_INLINE_WRITE_LOCK_IRQ=y
|
||||
CONFIG_ARCH_INLINE_WRITE_LOCK_IRQSAVE=y
|
||||
CONFIG_ARCH_INLINE_WRITE_UNLOCK=y
|
||||
CONFIG_ARCH_INLINE_WRITE_UNLOCK_BH=y
|
||||
CONFIG_ARCH_INLINE_WRITE_UNLOCK_IRQ=y
|
||||
CONFIG_ARCH_INLINE_WRITE_UNLOCK_IRQRESTORE=y
|
||||
CONFIG_ARCH_MMAP_RND_BITS=18
|
||||
CONFIG_ARCH_MMAP_RND_BITS_MAX=24
|
||||
CONFIG_ARCH_MMAP_RND_BITS_MIN=18
|
||||
CONFIG_ARCH_MMAP_RND_COMPAT_BITS=11
|
||||
CONFIG_ARCH_MMAP_RND_COMPAT_BITS_MIN=11
|
||||
CONFIG_ARCH_PROC_KCORE_TEXT=y
|
||||
CONFIG_ARCH_SELECT_MEMORY_MODEL=y
|
||||
CONFIG_ARCH_SPARSEMEM_DEFAULT=y
|
||||
CONFIG_ARCH_SPARSEMEM_ENABLE=y
|
||||
CONFIG_ARCH_SUPPORTS_ATOMIC_RMW=y
|
||||
CONFIG_ARCH_SUPPORTS_DEBUG_PAGEALLOC=y
|
||||
CONFIG_ARCH_SUPPORTS_INT128=y
|
||||
CONFIG_ARCH_SUPPORTS_MEMORY_FAILURE=y
|
||||
CONFIG_ARCH_SUPPORTS_NUMA_BALANCING=y
|
||||
CONFIG_ARCH_SUPPORTS_UPROBES=y
|
||||
CONFIG_ARCH_SUSPEND_POSSIBLE=y
|
||||
CONFIG_ARCH_USE_CMPXCHG_LOCKREF=y
|
||||
CONFIG_ARCH_USE_QUEUED_RWLOCKS=y
|
||||
CONFIG_ARCH_USE_QUEUED_SPINLOCKS=y
|
||||
CONFIG_ARCH_WANT_COMPAT_IPC_PARSE_VERSION=y
|
||||
CONFIG_ARCH_WANT_FRAME_POINTERS=y
|
||||
CONFIG_ARCH_WANT_HUGE_PMD_SHARE=y
|
||||
CONFIG_ARGON_MEM=y
|
||||
CONFIG_ARM64=y
|
||||
# CONFIG_ARM64_16K_PAGES is not set
|
||||
CONFIG_ARM64_4K_PAGES=y
|
||||
# CONFIG_ARM64_64K_PAGES is not set
|
||||
CONFIG_ARM64_CONT_SHIFT=4
|
||||
CONFIG_ARM64_CRYPTO=y
|
||||
CONFIG_ARM64_ERRATUM_1024718=y
|
||||
CONFIG_ARM64_ERRATUM_1463225=y
|
||||
CONFIG_ARM64_ERRATUM_819472=y
|
||||
CONFIG_ARM64_ERRATUM_824069=y
|
||||
CONFIG_ARM64_ERRATUM_826319=y
|
||||
CONFIG_ARM64_ERRATUM_827319=y
|
||||
CONFIG_ARM64_ERRATUM_832075=y
|
||||
CONFIG_ARM64_ERRATUM_843419=y
|
||||
CONFIG_ARM64_HW_AFDBM=y
|
||||
# CONFIG_ARM64_LSE_ATOMICS is not set
|
||||
CONFIG_ARM64_MODULE_PLTS=y
|
||||
CONFIG_ARM64_PAGE_SHIFT=12
|
||||
CONFIG_ARM64_PAN=y
|
||||
CONFIG_ARM64_PA_BITS=48
|
||||
CONFIG_ARM64_PA_BITS_48=y
|
||||
# CONFIG_ARM64_PMEM is not set
|
||||
# CONFIG_ARM64_PTDUMP_DEBUGFS is not set
|
||||
# CONFIG_ARM64_RANDOMIZE_TEXT_OFFSET is not set
|
||||
CONFIG_ARM64_SSBD=y
|
||||
CONFIG_ARM64_SVE=y
|
||||
# CONFIG_ARM64_SW_TTBR0_PAN is not set
|
||||
CONFIG_ARM64_UAO=y
|
||||
CONFIG_ARM64_VA_BITS=39
|
||||
CONFIG_ARM64_VA_BITS_39=y
|
||||
# CONFIG_ARM64_VA_BITS_48 is not set
|
||||
CONFIG_ARM64_VHE=y
|
||||
CONFIG_ARMV8_DEPRECATED=y
|
||||
CONFIG_ARM_AMBA=y
|
||||
CONFIG_ARM_ARCH_TIMER=y
|
||||
CONFIG_ARM_ARCH_TIMER_EVTSTREAM=y
|
||||
CONFIG_ARM_ARCH_TIMER_OOL_WORKAROUND=y
|
||||
CONFIG_ARM_BCM2835_CPUFREQ=y
|
||||
CONFIG_ARM_CRYPTO=y
|
||||
CONFIG_ARM_GIC=y
|
||||
CONFIG_ARM_GIC_V2M=y
|
||||
CONFIG_ARM_GIC_V3=y
|
||||
CONFIG_ARM_GIC_V3_ITS=y
|
||||
CONFIG_ARM_GIC_V3_ITS_PCI=y
|
||||
CONFIG_ARM_HEAVY_MB=y
|
||||
CONFIG_ARM_LPAE=y
|
||||
CONFIG_ARM_PSCI_FW=y
|
||||
CONFIG_ARM_MODULE_PLTS=y
|
||||
# CONFIG_ARM_SCMI_PROTOCOL is not set
|
||||
# CONFIG_ARM_SP805_WATCHDOG is not set
|
||||
CONFIG_ARM_TIMER_SP804=y
|
||||
# CONFIG_AX88796B_PHY is not set
|
||||
CONFIG_AUDIT_ARCH_COMPAT_GENERIC=y
|
||||
# CONFIG_BACKLIGHT_CLASS_DEVICE is not set
|
||||
CONFIG_BACKLIGHT_LCD_SUPPORT=y
|
||||
CONFIG_BCM2708_VCMEM=y
|
||||
CONFIG_BCM2835_DEVGPIOMEM=y
|
||||
CONFIG_BCM2835_MBOX=y
|
||||
CONFIG_BCM2835_POWER=y
|
||||
# CONFIG_BCM2835_SMI is not set
|
||||
CONFIG_BCM2835_THERMAL=y
|
||||
CONFIG_BCM2835_VCHIQ=y
|
||||
CONFIG_BCM2835_VCHIQ_MMAL=y
|
||||
CONFIG_BCM2835_WDT=y
|
||||
CONFIG_BCM7XXX_PHY=y
|
||||
CONFIG_BCMGENET=y
|
||||
CONFIG_BCM_NET_PHYLIB=y
|
||||
CONFIG_BCM_VCIO=y
|
||||
# CONFIG_BCM_VC_SM is not set
|
||||
CONFIG_BCM_VC_SM_CMA=y
|
||||
CONFIG_BCM_VIDEOCORE=y
|
||||
CONFIG_BLK_DEBUG_FS=y
|
||||
CONFIG_BLK_DEV_BSG=y
|
||||
CONFIG_BLK_DEV_BSGLIB=y
|
||||
# CONFIG_BLK_DEV_DM is not set
|
||||
# CONFIG_BLK_DEV_INITRD is not set
|
||||
CONFIG_BLK_DEV_LOOP=y
|
||||
# CONFIG_BLK_DEV_MD is not set
|
||||
CONFIG_BLK_DEV_RAM=y
|
||||
CONFIG_BLK_DEV_RAM_COUNT=16
|
||||
CONFIG_BLK_DEV_RAM_SIZE=4096
|
||||
CONFIG_BLK_DEV_SD=y
|
||||
CONFIG_BLK_MQ_PCI=y
|
||||
CONFIG_BLK_SCSI_REQUEST=y
|
||||
CONFIG_BLOCK_COMPAT=y
|
||||
CONFIG_BOUNCE=y
|
||||
CONFIG_BRCMSTB_THERMAL=y
|
||||
CONFIG_BRCM_CHAR_DRIVERS=y
|
||||
CONFIG_BROADCOM_PHY=y
|
||||
CONFIG_BUILD_BIN2C=y
|
||||
CONFIG_CACHE_L2X0=y
|
||||
CONFIG_CAVIUM_ERRATUM_22375=y
|
||||
CONFIG_CAVIUM_ERRATUM_23154=y
|
||||
CONFIG_CAVIUM_ERRATUM_27456=y
|
||||
CONFIG_CC_HAS_ASM_GOTO=y
|
||||
CONFIG_CLKDEV_LOOKUP=y
|
||||
CONFIG_CLKSRC_MMIO=y
|
||||
CONFIG_CLONE_BACKWARDS=y
|
||||
CONFIG_CMA=y
|
||||
CONFIG_CMA_ALIGNMENT=8
|
||||
CONFIG_CMA_AREAS=7
|
||||
# CONFIG_CMA_DEBUG is not set
|
||||
# CONFIG_CMA_DEBUGFS is not set
|
||||
CONFIG_CMA_SIZE_MBYTES=5
|
||||
# CONFIG_CMA_SIZE_SEL_MAX is not set
|
||||
CONFIG_CMA_SIZE_SEL_MBYTES=y
|
||||
# CONFIG_CMA_SIZE_SEL_MIN is not set
|
||||
# CONFIG_CMA_SIZE_SEL_PERCENTAGE is not set
|
||||
CONFIG_COMMON_CLK=y
|
||||
CONFIG_COMMON_CLK_XGENE=y
|
||||
CONFIG_COMPAT=y
|
||||
CONFIG_COMPAT_32BIT_TIME=y
|
||||
CONFIG_COMPAT_BINFMT_ELF=y
|
||||
CONFIG_COMPAT_NETLINK_MESSAGES=y
|
||||
CONFIG_COMPAT_OLD_SIGACTION=y
|
||||
CONFIG_CONFIGFS_FS=y
|
||||
CONFIG_CONSOLE_TRANSLATIONS=y
|
||||
CONFIG_CP15_BARRIER_EMULATION=y
|
||||
# CONFIG_CPUFREQ_DT is not set
|
||||
# CONFIG_CPU_BIG_ENDIAN is not set
|
||||
CONFIG_CPU_FREQ=y
|
||||
CONFIG_CPU_FREQ_DEFAULT_GOV_ONDEMAND=y
|
||||
# CONFIG_CPU_FREQ_DEFAULT_GOV_PERFORMANCE is not set
|
||||
CONFIG_CPU_FREQ_GOV_ATTR_SET=y
|
||||
CONFIG_CPU_FREQ_GOV_COMMON=y
|
||||
CONFIG_CPU_FREQ_GOV_CONSERVATIVE=y
|
||||
CONFIG_CPU_FREQ_GOV_ONDEMAND=y
|
||||
CONFIG_CPU_FREQ_GOV_PERFORMANCE=y
|
||||
CONFIG_CPU_FREQ_GOV_POWERSAVE=y
|
||||
CONFIG_CPU_FREQ_GOV_USERSPACE=y
|
||||
CONFIG_CPU_FREQ_STAT=y
|
||||
# CONFIG_CPU_HOTPLUG_STATE_CONTROL is not set
|
||||
CONFIG_CPU_IDLE=y
|
||||
CONFIG_CPU_IDLE_GOV_LADDER=y
|
||||
CONFIG_CPU_IDLE_GOV_MENU=y
|
||||
CONFIG_CPU_PM=y
|
||||
CONFIG_CPU_RMAP=y
|
||||
# CONFIG_CPU_THERMAL is not set
|
||||
CONFIG_CRC16=y
|
||||
CONFIG_CRYPTO_AEAD=y
|
||||
CONFIG_CRYPTO_AEAD2=y
|
||||
CONFIG_CRYPTO_AES_ARM64=y
|
||||
CONFIG_CRYPTO_AES_ARM64_BS=y
|
||||
CONFIG_CRYPTO_AES_ARM64_CE=y
|
||||
CONFIG_CRYPTO_AES_ARM64_CE_BLK=y
|
||||
CONFIG_CRYPTO_AES_ARM64_CE_CCM=y
|
||||
CONFIG_CRYPTO_AES_ARM64_NEON_BLK=y
|
||||
CONFIG_CRYPTO_CHACHA20=y
|
||||
CONFIG_CRYPTO_CHACHA20_NEON=y
|
||||
CONFIG_CRYPTO_CRC32=y
|
||||
CONFIG_CRYPTO_CRC32C=y
|
||||
CONFIG_CRYPTO_CRC32_ARM64_CE=y
|
||||
CONFIG_CRYPTO_CRYPTD=y
|
||||
CONFIG_CRYPTO_GF128MUL=y
|
||||
CONFIG_CRYPTO_GHASH_ARM64_CE=y
|
||||
CONFIG_CRYPTO_HASH=y
|
||||
CONFIG_CRYPTO_HASH2=y
|
||||
CONFIG_CRYPTO_MANAGER=y
|
||||
CONFIG_CRYPTO_MANAGER2=y
|
||||
CONFIG_CRYPTO_NULL2=y
|
||||
CONFIG_CRYPTO_RNG2=y
|
||||
CONFIG_CRYPTO_SHA1=y
|
||||
CONFIG_CRYPTO_SHA1_ARM64_CE=y
|
||||
CONFIG_CRYPTO_SHA256_ARM64=y
|
||||
CONFIG_CRYPTO_SHA2_ARM64_CE=y
|
||||
CONFIG_CRYPTO_SHA3=y
|
||||
CONFIG_CRYPTO_SHA3_ARM64=y
|
||||
CONFIG_CRYPTO_SHA512_ARM64=y
|
||||
CONFIG_CRYPTO_SHA512_ARM64_CE=y
|
||||
CONFIG_CRYPTO_SIMD=y
|
||||
CONFIG_CRYPTO_SM3=y
|
||||
CONFIG_CRYPTO_SM3_ARM64_CE=y
|
||||
CONFIG_CRYPTO_SM4=y
|
||||
CONFIG_CRYPTO_SM4_ARM64_CE=y
|
||||
CONFIG_CRYPTO_WORKQUEUE=y
|
||||
CONFIG_DCACHE_WORD_ACCESS=y
|
||||
CONFIG_DEBUG_BUGVERBOSE=y
|
||||
CONFIG_DEBUG_INFO=y
|
||||
CONFIG_DEFAULT_CFQ=y
|
||||
# CONFIG_DEFAULT_DEADLINE is not set
|
||||
CONFIG_DEFAULT_IOSCHED="cfq"
|
||||
CONFIG_DEFAULT_MPTCP_PM="fullmesh"
|
||||
CONFIG_DEVMEM=y
|
||||
CONFIG_DMADEVICES=y
|
||||
CONFIG_DMA_BCM2708=y
|
||||
CONFIG_DMA_BCM2835=y
|
||||
CONFIG_DMA_CMA=y
|
||||
CONFIG_DMA_DIRECT_OPS=y
|
||||
CONFIG_DMA_ENGINE=y
|
||||
CONFIG_DMA_OF=y
|
||||
CONFIG_DMA_SHARED_BUFFER=y
|
||||
CONFIG_DMA_VIRTUAL_CHANNELS=y
|
||||
CONFIG_DNOTIFY=y
|
||||
CONFIG_DTC=y
|
||||
CONFIG_DUMMY_CONSOLE=y
|
||||
CONFIG_EDAC_SUPPORT=y
|
||||
CONFIG_ENABLE_MUST_CHECK=y
|
||||
CONFIG_EXT4_FS=y
|
||||
CONFIG_EXT4_FS_POSIX_ACL=y
|
||||
CONFIG_EXT4_FS_SECURITY=y
|
||||
CONFIG_FB=y
|
||||
CONFIG_FB_BCM2708=y
|
||||
CONFIG_FB_CFB_COPYAREA=y
|
||||
CONFIG_FB_CFB_FILLRECT=y
|
||||
CONFIG_FB_CFB_IMAGEBLIT=y
|
||||
CONFIG_FB_CMDLINE=y
|
||||
# CONFIG_FB_RPISENSE is not set
|
||||
CONFIG_FIXED_PHY=y
|
||||
CONFIG_FIX_EARLYCON_MEM=y
|
||||
# CONFIG_FLATMEM_MANUAL is not set
|
||||
# CONFIG_FONTS is not set
|
||||
CONFIG_FONT_8x16=y
|
||||
CONFIG_FONT_8x8=y
|
||||
CONFIG_FONT_SUPPORT=y
|
||||
CONFIG_FRAMEBUFFER_CONSOLE=y
|
||||
# CONFIG_FRAMEBUFFER_CONSOLE_DETECT_PRIMARY is not set
|
||||
# CONFIG_FRAMEBUFFER_CONSOLE_ROTATION is not set
|
||||
CONFIG_FRAME_POINTER=y
|
||||
CONFIG_FREEZER=y
|
||||
CONFIG_FIXED_PHY=y
|
||||
CONFIG_FSL_ERRATUM_A008585=y
|
||||
CONFIG_FS_IOMAP=y
|
||||
CONFIG_FS_MBCACHE=y
|
||||
CONFIG_FS_POSIX_ACL=y
|
||||
CONFIG_GENERIC_ALLOCATOR=y
|
||||
CONFIG_GENERIC_ARCH_TOPOLOGY=y
|
||||
CONFIG_GENERIC_BUG=y
|
||||
CONFIG_GENERIC_BUG_RELATIVE_POINTERS=y
|
||||
CONFIG_GENERIC_CLOCKEVENTS=y
|
||||
CONFIG_GENERIC_CLOCKEVENTS_BROADCAST=y
|
||||
CONFIG_GENERIC_CPU_AUTOPROBE=y
|
||||
CONFIG_GENERIC_CSUM=y
|
||||
CONFIG_GENERIC_EARLY_IOREMAP=y
|
||||
CONFIG_GENERIC_IDLE_POLL_SETUP=y
|
||||
CONFIG_GENERIC_IRQ_EFFECTIVE_AFF_MASK=y
|
||||
CONFIG_GENERIC_IRQ_MIGRATION=y
|
||||
CONFIG_GENERIC_IRQ_MULTI_HANDLER=y
|
||||
CONFIG_GENERIC_IRQ_SHOW=y
|
||||
CONFIG_GENERIC_IRQ_SHOW_LEVEL=y
|
||||
CONFIG_GENERIC_MSI_IRQ=y
|
||||
CONFIG_GENERIC_MSI_IRQ_DOMAIN=y
|
||||
CONFIG_GENERIC_PCI_IOMAP=y
|
||||
CONFIG_GENERIC_PHY=y
|
||||
CONFIG_GENERIC_PINCONF=y
|
||||
CONFIG_GENERIC_PINCTRL_GROUPS=y
|
||||
CONFIG_GENERIC_PINMUX_FUNCTIONS=y
|
||||
CONFIG_GENERIC_SCHED_CLOCK=y
|
||||
CONFIG_GENERIC_SMP_IDLE_THREAD=y
|
||||
CONFIG_GENERIC_STRNCPY_FROM_USER=y
|
||||
CONFIG_GENERIC_STRNLEN_USER=y
|
||||
CONFIG_GENERIC_TIME_VSYSCALL=y
|
||||
CONFIG_GPIOLIB=y
|
||||
CONFIG_GPIOLIB_IRQCHIP=y
|
||||
CONFIG_GPIO_BCM_VIRT=y
|
||||
CONFIG_GPIO_RASPBERRYPI_EXP=y
|
||||
CONFIG_GPIO_STMPE=y
|
||||
CONFIG_GPIO_SYSFS=y
|
||||
CONFIG_HANDLE_DOMAIN_IRQ=y
|
||||
CONFIG_HARDEN_BRANCH_PREDICTOR=y
|
||||
CONFIG_HARDIRQS_SW_RESEND=y
|
||||
CONFIG_HAS_DMA=y
|
||||
CONFIG_HAS_IOMEM=y
|
||||
CONFIG_HAS_IOPORT_MAP=y
|
||||
CONFIG_HAVE_ALIGNED_STRUCT_PAGE=y
|
||||
CONFIG_HAVE_ARCH_AUDITSYSCALL=y
|
||||
CONFIG_HAVE_ARCH_BITREVERSE=y
|
||||
CONFIG_HAVE_ARCH_HUGE_VMAP=y
|
||||
CONFIG_HAVE_ARCH_JUMP_LABEL=y
|
||||
CONFIG_HAVE_ARCH_KASAN=y
|
||||
CONFIG_HAVE_ARCH_KGDB=y
|
||||
CONFIG_HAVE_ARCH_MMAP_RND_COMPAT_BITS=y
|
||||
CONFIG_HAVE_ARCH_PFN_VALID=y
|
||||
CONFIG_HAVE_ARCH_PREL32_RELOCATIONS=y
|
||||
CONFIG_HAVE_ARCH_SECCOMP_FILTER=y
|
||||
CONFIG_HAVE_ARCH_THREAD_STRUCT_WHITELIST=y
|
||||
CONFIG_HAVE_ARCH_TRACEHOOK=y
|
||||
CONFIG_HAVE_ARCH_TRANSPARENT_HUGEPAGE=y
|
||||
CONFIG_HAVE_ARCH_VMAP_STACK=y
|
||||
CONFIG_HAVE_ARM_SMCCC=y
|
||||
CONFIG_HAVE_CLK=y
|
||||
CONFIG_HAVE_CLK_PREPARE=y
|
||||
CONFIG_HAVE_CMPXCHG_DOUBLE=y
|
||||
CONFIG_HAVE_CMPXCHG_LOCAL=y
|
||||
CONFIG_HAVE_CONTEXT_TRACKING=y
|
||||
CONFIG_HAVE_C_RECORDMCOUNT=y
|
||||
CONFIG_HAVE_DEBUG_BUGVERBOSE=y
|
||||
CONFIG_HAVE_DEBUG_KMEMLEAK=y
|
||||
CONFIG_HAVE_DMA_CONTIGUOUS=y
|
||||
CONFIG_HAVE_DYNAMIC_FTRACE=y
|
||||
CONFIG_HAVE_EBPF_JIT=y
|
||||
CONFIG_HAVE_EFFICIENT_UNALIGNED_ACCESS=y
|
||||
CONFIG_HAVE_FTRACE_MCOUNT_RECORD=y
|
||||
CONFIG_HAVE_FUNCTION_GRAPH_TRACER=y
|
||||
CONFIG_HAVE_FUNCTION_TRACER=y
|
||||
CONFIG_HAVE_GENERIC_DMA_COHERENT=y
|
||||
CONFIG_HAVE_GENERIC_GUP=y
|
||||
CONFIG_HAVE_IDE=y
|
||||
CONFIG_HAVE_LD_DEAD_CODE_DATA_ELIMINATION=y
|
||||
CONFIG_HAVE_IRQ_TIME_ACCOUNTING=y
|
||||
CONFIG_HAVE_MEMBLOCK=y
|
||||
CONFIG_HAVE_MEMORY_PRESENT=y
|
||||
CONFIG_HAVE_MOD_ARCH_SPECIFIC=y
|
||||
CONFIG_HAVE_NET_DSA=y
|
||||
CONFIG_HAVE_PATA_PLATFORM=y
|
||||
CONFIG_HAVE_PERF_EVENTS=y
|
||||
CONFIG_HAVE_PERF_REGS=y
|
||||
CONFIG_HAVE_PERF_USER_STACK_DUMP=y
|
||||
CONFIG_HAVE_RCU_TABLE_FREE=y
|
||||
CONFIG_HAVE_REGS_AND_STACK_ACCESS_API=y
|
||||
CONFIG_HAVE_RSEQ=y
|
||||
CONFIG_HAVE_SYSCALL_TRACEPOINTS=y
|
||||
CONFIG_HAVE_UID16=y
|
||||
CONFIG_HAVE_VIRT_CPU_ACCOUNTING_GEN=y
|
||||
CONFIG_HIGHMEM=y
|
||||
CONFIG_HIGHPTE=y
|
||||
CONFIG_HW_RANDOM=y
|
||||
CONFIG_HW_RANDOM_BCM2835=y
|
||||
CONFIG_HW_RANDOM_IPROC_RNG200=y
|
||||
CONFIG_HOLES_IN_ZONE=y
|
||||
CONFIG_HOTPLUG_CPU=y
|
||||
# CONFIG_HUGETLBFS is not set
|
||||
CONFIG_HW_CONSOLE=y
|
||||
CONFIG_I2C=y
|
||||
# CONFIG_I2C_BCM2708 is not set
|
||||
CONFIG_I2C_BOARDINFO=y
|
||||
CONFIG_I2C_COMPAT=y
|
||||
CONFIG_I2C_HELPER_AUTO=y
|
||||
CONFIG_IKCONFIG=y
|
||||
CONFIG_IKCONFIG_PROC=y
|
||||
CONFIG_ILLEGAL_POINTER_VALUE=0xdead000000000000
|
||||
CONFIG_INLINE_READ_LOCK=y
|
||||
CONFIG_INLINE_READ_LOCK_BH=y
|
||||
CONFIG_INLINE_READ_LOCK_IRQ=y
|
||||
CONFIG_INLINE_READ_LOCK_IRQSAVE=y
|
||||
CONFIG_INLINE_READ_UNLOCK_BH=y
|
||||
CONFIG_INLINE_READ_UNLOCK_IRQRESTORE=y
|
||||
CONFIG_INLINE_SPIN_LOCK=y
|
||||
CONFIG_INLINE_SPIN_LOCK_BH=y
|
||||
CONFIG_INLINE_SPIN_LOCK_IRQ=y
|
||||
CONFIG_INLINE_SPIN_LOCK_IRQSAVE=y
|
||||
CONFIG_INLINE_SPIN_TRYLOCK=y
|
||||
CONFIG_INLINE_SPIN_TRYLOCK_BH=y
|
||||
CONFIG_INLINE_SPIN_UNLOCK_BH=y
|
||||
CONFIG_INLINE_SPIN_UNLOCK_IRQRESTORE=y
|
||||
CONFIG_INLINE_WRITE_LOCK=y
|
||||
CONFIG_INLINE_WRITE_LOCK_BH=y
|
||||
CONFIG_INLINE_WRITE_LOCK_IRQ=y
|
||||
CONFIG_INLINE_WRITE_LOCK_IRQSAVE=y
|
||||
CONFIG_INLINE_WRITE_UNLOCK_BH=y
|
||||
CONFIG_INLINE_WRITE_UNLOCK_IRQRESTORE=y
|
||||
CONFIG_INPUT=y
|
||||
CONFIG_INPUT_MOUSEDEV=y
|
||||
# CONFIG_INPUT_MOUSEDEV_PSAUX is not set
|
||||
CONFIG_INPUT_MOUSEDEV_SCREEN_X=1024
|
||||
CONFIG_INPUT_MOUSEDEV_SCREEN_Y=768
|
||||
CONFIG_IOSCHED_CFQ=y
|
||||
CONFIG_IRQCHIP=y
|
||||
CONFIG_IRQ_DOMAIN=y
|
||||
CONFIG_IRQ_DOMAIN_HIERARCHY=y
|
||||
CONFIG_IRQ_FORCED_THREADING=y
|
||||
CONFIG_IRQ_WORK=y
|
||||
CONFIG_JBD2=y
|
||||
# CONFIG_LCD_CLASS_DEVICE is not set
|
||||
CONFIG_LEDS_GPIO=y
|
||||
CONFIG_LEDS_TRIGGER_INPUT=y
|
||||
CONFIG_LIBFDT=y
|
||||
CONFIG_LOCK_DEBUGGING_SUPPORT=y
|
||||
CONFIG_LOCK_SPIN_ON_OWNER=y
|
||||
CONFIG_LOGO=y
|
||||
CONFIG_LOGO_LINUX_CLUT224=y
|
||||
# CONFIG_LOGO_LINUX_MONO is not set
|
||||
# CONFIG_LOGO_LINUX_VGA16 is not set
|
||||
CONFIG_MAC_PARTITION=y
|
||||
CONFIG_MAGIC_SYSRQ=y
|
||||
CONFIG_MAILBOX=y
|
||||
# CONFIG_MAILBOX_TEST is not set
|
||||
CONFIG_MAX_RAW_DEVS=256
|
||||
CONFIG_MD=y
|
||||
CONFIG_MDIO_BCM_UNIMAC=y
|
||||
CONFIG_MDIO_BUS=y
|
||||
CONFIG_MDIO_DEVICE=y
|
||||
CONFIG_MEMFD_CREATE=y
|
||||
CONFIG_MEMORY_ISOLATION=y
|
||||
CONFIG_MFD_CORE=y
|
||||
# CONFIG_MFD_RPISENSE_CORE is not set
|
||||
CONFIG_MFD_STMPE=y
|
||||
CONFIG_MFD_SYSCON=y
|
||||
CONFIG_MICROCHIP_PHY=y
|
||||
CONFIG_MIGRATION=y
|
||||
CONFIG_MMC=y
|
||||
# CONFIG_MMC_BCM2835 is not set
|
||||
CONFIG_MMC_BCM2835_DMA=y
|
||||
CONFIG_MMC_BCM2835_MMC=y
|
||||
CONFIG_MMC_BCM2835_PIO_DMA_BARRIER=2
|
||||
CONFIG_MMC_BCM2835_SDHOST=y
|
||||
CONFIG_MMC_BLOCK=y
|
||||
CONFIG_MMC_BLOCK_MINORS=32
|
||||
CONFIG_MMC_SDHCI=y
|
||||
CONFIG_MMC_SDHCI_IO_ACCESSORS=y
|
||||
CONFIG_MMC_SDHCI_IPROC=y
|
||||
# CONFIG_MMC_SDHCI_PCI is not set
|
||||
CONFIG_MMC_SDHCI_PLTFM=y
|
||||
# CONFIG_MMC_TIFM_SD is not set
|
||||
CONFIG_MODULES_USE_ELF_RELA=y
|
||||
CONFIG_MTD_BLOCK2MTD=y
|
||||
CONFIG_MTD_NAND=y
|
||||
CONFIG_MTD_NAND_ECC=y
|
||||
CONFIG_MTD_SPI_NOR=y
|
||||
CONFIG_MTD_UBI=y
|
||||
CONFIG_MTD_UBI_BEB_LIMIT=20
|
||||
# CONFIG_MTD_UBI_BLOCK is not set
|
||||
# CONFIG_MTD_UBI_FASTMAP is not set
|
||||
# CONFIG_MTD_UBI_GLUEBI is not set
|
||||
CONFIG_MTD_UBI_WL_THRESHOLD=4096
|
||||
CONFIG_MUTEX_SPIN_ON_OWNER=y
|
||||
CONFIG_NEED_DMA_MAP_STATE=y
|
||||
CONFIG_NEED_SG_DMA_LENGTH=y
|
||||
CONFIG_NET_FLOW_LIMIT=y
|
||||
CONFIG_NLS=y
|
||||
CONFIG_NLS_ASCII=y
|
||||
CONFIG_NLS_DEFAULT="utf8"
|
||||
CONFIG_NO_BOOTMEM=y
|
||||
CONFIG_NO_HZ=y
|
||||
CONFIG_NO_HZ_COMMON=y
|
||||
CONFIG_NO_HZ_IDLE=y
|
||||
CONFIG_NR_CPUS=4
|
||||
# CONFIG_NUMA is not set
|
||||
CONFIG_NVMEM=y
|
||||
CONFIG_OF=y
|
||||
CONFIG_OF_ADDRESS=y
|
||||
CONFIG_OF_CONFIGFS=y
|
||||
CONFIG_OF_DYNAMIC=y
|
||||
CONFIG_OF_EARLY_FLATTREE=y
|
||||
CONFIG_OF_FLATTREE=y
|
||||
CONFIG_OF_GPIO=y
|
||||
CONFIG_OF_IRQ=y
|
||||
CONFIG_OF_KOBJ=y
|
||||
CONFIG_OF_MDIO=y
|
||||
CONFIG_OF_NET=y
|
||||
CONFIG_OF_OVERLAY=y
|
||||
CONFIG_OF_RESERVED_MEM=y
|
||||
CONFIG_OF_RESOLVE=y
|
||||
CONFIG_OLD_SIGSUSPEND3=y
|
||||
CONFIG_PADATA=y
|
||||
CONFIG_PARTITION_PERCPU=y
|
||||
CONFIG_OUTER_CACHE=y
|
||||
CONFIG_OUTER_CACHE_SYNC=y
|
||||
CONFIG_PAGE_OFFSET=0xC0000000
|
||||
CONFIG_PCI=y
|
||||
CONFIG_PCIEAER=y
|
||||
CONFIG_PCIEPORTBUS=y
|
||||
CONFIG_PCIE_BRCMSTB=y
|
||||
CONFIG_PCIE_PME=y
|
||||
CONFIG_PCI_DOMAINS=y
|
||||
CONFIG_PCI_DOMAINS_GENERIC=y
|
||||
CONFIG_PCI_MSI=y
|
||||
CONFIG_PCI_MSI_IRQ_DOMAIN=y
|
||||
CONFIG_PGTABLE_LEVELS=3
|
||||
CONFIG_PHYLIB=y
|
||||
CONFIG_PHYS_ADDR_T_64BIT=y
|
||||
CONFIG_PINCTRL=y
|
||||
CONFIG_PINCTRL_BCM2835=y
|
||||
CONFIG_PLUGIN_HOSTCC="g++"
|
||||
CONFIG_PM=y
|
||||
CONFIG_PM_CLK=y
|
||||
# CONFIG_PM_DEBUG is not set
|
||||
CONFIG_PM_GENERIC_DOMAINS=y
|
||||
CONFIG_PM_GENERIC_DOMAINS_OF=y
|
||||
CONFIG_PM_GENERIC_DOMAINS_SLEEP=y
|
||||
CONFIG_PM_SLEEP=y
|
||||
CONFIG_PM_SLEEP_SMP=y
|
||||
CONFIG_POWER_RESET=y
|
||||
CONFIG_POWER_RESET_GPIO=y
|
||||
CONFIG_POWER_SUPPLY=y
|
||||
CONFIG_PRINTK_TIME=y
|
||||
CONFIG_PROC_PAGE_MONITOR=y
|
||||
CONFIG_PWM=y
|
||||
CONFIG_PWM_BCM2835=y
|
||||
# CONFIG_PWM_STMPE is not set
|
||||
CONFIG_PWM_SYSFS=y
|
||||
CONFIG_QUEUED_RWLOCKS=y
|
||||
CONFIG_QUEUED_SPINLOCKS=y
|
||||
# CONFIG_RANDOMIZE_BASE is not set
|
||||
CONFIG_RAS=y
|
||||
CONFIG_RASPBERRYPI_FIRMWARE=y
|
||||
CONFIG_RASPBERRYPI_POWER=y
|
||||
CONFIG_RATIONAL=y
|
||||
CONFIG_RAW_DRIVER=y
|
||||
CONFIG_RCU_NEED_SEGCBLIST=y
|
||||
CONFIG_RCU_STALL_COMMON=y
|
||||
CONFIG_REFCOUNT_FULL=y
|
||||
CONFIG_REGMAP=y
|
||||
CONFIG_REGMAP_MMIO=y
|
||||
CONFIG_REGULATOR=y
|
||||
CONFIG_REGULATOR_GPIO=y
|
||||
CONFIG_REGULATOR_FIXED_VOLTAGE=y
|
||||
CONFIG_RESET_CONTROLLER=y
|
||||
CONFIG_RFS_ACCEL=y
|
||||
# CONFIG_RPIVID_MEM is not set
|
||||
CONFIG_RPS=y
|
||||
CONFIG_RWSEM_SPIN_ON_OWNER=y
|
||||
CONFIG_RWSEM_XCHGADD_ALGORITHM=y
|
||||
CONFIG_SCSI=y
|
||||
CONFIG_SCSI_ISCSI_ATTRS=y
|
||||
# CONFIG_SCSI_LOWLEVEL is not set
|
||||
CONFIG_SCSI_MQ_DEFAULT=y
|
||||
# CONFIG_SCSI_PROC_FS is not set
|
||||
CONFIG_SERIAL_8250_BCM2835AUX=y
|
||||
# CONFIG_SERIAL_8250_DMA is not set
|
||||
CONFIG_SERIAL_8250_EXTENDED=y
|
||||
CONFIG_SERIAL_8250_FSL=y
|
||||
CONFIG_SERIAL_8250_NR_UARTS=1
|
||||
CONFIG_SERIAL_8250_RUNTIME_UARTS=0
|
||||
CONFIG_SERIAL_8250_SHARE_IRQ=y
|
||||
CONFIG_SERIAL_AMBA_PL011=y
|
||||
CONFIG_SERIAL_AMBA_PL011_CONSOLE=y
|
||||
CONFIG_SERIAL_DEV_BUS=y
|
||||
# CONFIG_SERIAL_DEV_CTRL_TTYPORT is not set
|
||||
CONFIG_SERIAL_OF_PLATFORM=y
|
||||
CONFIG_SETEND_EMULATION=y
|
||||
CONFIG_SG_POOL=y
|
||||
CONFIG_SMP=y
|
||||
CONFIG_SPARSEMEM=y
|
||||
CONFIG_SPARSEMEM_EXTREME=y
|
||||
CONFIG_SPARSEMEM_MANUAL=y
|
||||
CONFIG_SPARSEMEM_VMEMMAP=y
|
||||
CONFIG_SPARSEMEM_VMEMMAP_ENABLE=y
|
||||
CONFIG_SPARSE_IRQ=y
|
||||
CONFIG_SPI=y
|
||||
# CONFIG_SPI_BCM2835AUX is not set
|
||||
CONFIG_SPI_MASTER=y
|
||||
CONFIG_SPI_MEM=y
|
||||
CONFIG_SPI_SLAVE=y
|
||||
# CONFIG_SPI_SLAVE_SYSTEM_CONTROL is not set
|
||||
# CONFIG_SPI_SLAVE_TIME is not set
|
||||
CONFIG_SRCU=y
|
||||
CONFIG_STMPE_I2C=y
|
||||
CONFIG_STMPE_SPI=y
|
||||
CONFIG_STREAM_PARSER=y
|
||||
# CONFIG_STRIP_ASM_SYMS is not set
|
||||
CONFIG_SUSPEND=y
|
||||
CONFIG_SUSPEND_FREEZER=y
|
||||
CONFIG_SWIOTLB=y
|
||||
CONFIG_SWPHY=y
|
||||
CONFIG_SWP_EMULATION=y
|
||||
CONFIG_SYSCTL_EXCEPTION_TRACE=y
|
||||
CONFIG_SYSVIPC_COMPAT=y
|
||||
CONFIG_SYS_SUPPORTS_HUGETLBFS=y
|
||||
# CONFIG_TEXTSEARCH is not set
|
||||
CONFIG_THERMAL=y
|
||||
CONFIG_THERMAL_DEFAULT_GOV_STEP_WISE=y
|
||||
CONFIG_THERMAL_EMERGENCY_POWEROFF_DELAY_MS=0
|
||||
CONFIG_THERMAL_GOV_STEP_WISE=y
|
||||
CONFIG_THERMAL_OF=y
|
||||
CONFIG_THREAD_INFO_IN_TASK=y
|
||||
CONFIG_TICK_CPU_ACCOUNTING=y
|
||||
CONFIG_TIMER_OF=y
|
||||
CONFIG_TIMER_PROBE=y
|
||||
CONFIG_TI_ST=y
|
||||
CONFIG_TMPFS_POSIX_ACL=y
|
||||
CONFIG_TREE_RCU=y
|
||||
CONFIG_TREE_SRCU=y
|
||||
# CONFIG_UBIFS_FS is not set
|
||||
CONFIG_UEVENT_HELPER_PATH=""
|
||||
CONFIG_UNMAP_KERNEL_AT_EL0=y
|
||||
CONFIG_USB=y
|
||||
CONFIG_USB_ANNOUNCE_NEW_DEVICES=y
|
||||
CONFIG_USB_COMMON=y
|
||||
CONFIG_USB_DWCOTG=y
|
||||
# CONFIG_USB_EHCI_HCD is not set
|
||||
CONFIG_USB_LAN78XX=y
|
||||
CONFIG_USB_NET_DRIVERS=y
|
||||
CONFIG_USB_NET_SMSC95XX=y
|
||||
CONFIG_USB_PCI=y
|
||||
CONFIG_USB_STORAGE=y
|
||||
CONFIG_USB_SUPPORT=y
|
||||
CONFIG_USB_UAS=y
|
||||
CONFIG_USB_USBNET=y
|
||||
# CONFIG_USB_UHCI_HCD is not set
|
||||
CONFIG_USB_XHCI_HCD=y
|
||||
CONFIG_USB_XHCI_PCI=y
|
||||
CONFIG_USB_XHCI_PLATFORM=y
|
||||
CONFIG_VMAP_STACK=y
|
||||
CONFIG_VDSO=y
|
||||
CONFIG_VT=y
|
||||
CONFIG_VT_CONSOLE=y
|
||||
CONFIG_VT_CONSOLE_SLEEP=y
|
||||
CONFIG_VT_HW_CONSOLE_BINDING=y
|
||||
CONFIG_WATCHDOG_CORE=y
|
||||
CONFIG_XPS=y
|
||||
CONFIG_XZ_DEC_ARM=y
|
||||
CONFIG_XZ_DEC_BCJ=y
|
||||
CONFIG_ZONE_DMA32=y
|
||||
|
|
@ -0,0 +1,68 @@
|
|||
From 5d9d9ba7547ad27d76dd36791f54a57ff555ff8a Mon Sep 17 00:00:00 2001
|
||||
From: Jonathan Bell <jonathan@raspberrypi.org>
|
||||
Date: Mon, 26 Oct 2020 14:03:35 +0000
|
||||
Subject: [PATCH] xhci: quirks: add link TRB quirk for VL805
|
||||
|
||||
The VL805 controller can't cope with the TR Dequeue Pointer for an endpoint
|
||||
being set to a Link TRB. The hardware-maintained endpoint context ends up
|
||||
stuck at the address of the Link TRB, leading to erroneous ring expansion
|
||||
events whenever the enqueue pointer wraps to the dequeue position.
|
||||
|
||||
If the search for the end of the current TD and ring cycle state lands on
|
||||
a Link TRB, move to the next segment.
|
||||
|
||||
See: https://github.com/raspberrypi/linux/issues/3919
|
||||
|
||||
Signed-off-by: Jonathan Bell <jonathan@raspberrypi.com>
|
||||
---
|
||||
drivers/usb/host/xhci-pci.c | 1 +
|
||||
drivers/usb/host/xhci-ring.c | 10 ++++++++++
|
||||
drivers/usb/host/xhci.h | 1 +
|
||||
3 files changed, 12 insertions(+)
|
||||
|
||||
diff --git a/drivers/usb/host/xhci-pci.c b/drivers/usb/host/xhci-pci.c
|
||||
index 5238fa29ea978..b975e6803d485 100644
|
||||
--- a/drivers/usb/host/xhci-pci.c
|
||||
+++ b/drivers/usb/host/xhci-pci.c
|
||||
@@ -251,6 +251,7 @@ static void xhci_pci_quirks(struct device *dev, struct xhci_hcd *xhci)
|
||||
pdev->device == 0x3483) {
|
||||
xhci->quirks |= XHCI_LPM_SUPPORT;
|
||||
xhci->quirks |= XHCI_EP_CTX_BROKEN_DCS;
|
||||
+ xhci->quirks |= XHCI_AVOID_DQ_ON_LINK;
|
||||
}
|
||||
|
||||
if (pdev->vendor == PCI_VENDOR_ID_ASMEDIA &&
|
||||
diff --git a/drivers/usb/host/xhci-ring.c b/drivers/usb/host/xhci-ring.c
|
||||
index d99e636f3844c..8149abff857c2 100644
|
||||
--- a/drivers/usb/host/xhci-ring.c
|
||||
+++ b/drivers/usb/host/xhci-ring.c
|
||||
@@ -624,6 +624,16 @@ void xhci_find_new_dequeue_state(struct xhci_hcd *xhci,
|
||||
|
||||
} while (!cycle_found || !td_last_trb_found);
|
||||
|
||||
+ /*
|
||||
+ * Quirk: the xHC does not correctly parse link TRBs if the HW Dequeue
|
||||
+ * pointer is set to one. Advance to the next TRB (and next segment).
|
||||
+ */
|
||||
+ if (xhci->quirks & XHCI_AVOID_DQ_ON_LINK && trb_is_link(new_deq)) {
|
||||
+ if (link_trb_toggles_cycle(new_deq))
|
||||
+ state->new_cycle_state ^= 0x1;
|
||||
+ next_trb(xhci, ep_ring, &new_seg, &new_deq);
|
||||
+ }
|
||||
+
|
||||
state->new_deq_seg = new_seg;
|
||||
state->new_deq_ptr = new_deq;
|
||||
|
||||
diff --git a/drivers/usb/host/xhci.h b/drivers/usb/host/xhci.h
|
||||
index 2033bb8683033..90ccc71231c1a 100644
|
||||
--- a/drivers/usb/host/xhci.h
|
||||
+++ b/drivers/usb/host/xhci.h
|
||||
@@ -1874,7 +1874,8 @@ struct xhci_hcd {
|
||||
#define XHCI_RESET_PLL_ON_DISCONNECT BIT_ULL(34)
|
||||
#define XHCI_SNPS_BROKEN_SUSPEND BIT_ULL(35)
|
||||
#define XHCI_EP_CTX_BROKEN_DCS BIT_ULL(36)
|
||||
+#define XHCI_AVOID_DQ_ON_LINK BIT_ULL(37)
|
||||
#define XHCI_DISABLE_SPARSE BIT_ULL(38)
|
||||
|
||||
unsigned int num_active_eps;
|
||||
unsigned int limit_active_eps;
|
||||
|
|
@ -48,8 +48,8 @@ ipq40xx_setup_interfaces()
|
|||
ucidef_set_interfaces_lan_wan "eth1" "eth0"
|
||||
;;
|
||||
asus,rt-ac58u|\
|
||||
zyxel,nbg6617)|\
|
||||
p2w,r619ac-128m)|\
|
||||
zyxel,nbg6617|\
|
||||
p2w,r619ac-128m|\
|
||||
p2w,r619ac)
|
||||
ucidef_set_interfaces_lan_wan "eth0" "eth1"
|
||||
ucidef_add_switch "switch0" \
|
||||
|
|
@ -58,7 +58,7 @@ ipq40xx_setup_interfaces()
|
|||
avm,fritzbox-4040|\
|
||||
linksys,ea6350v3|\
|
||||
linksys,ea8300|\
|
||||
pangu,l1000|\
|
||||
pangu,l1000|\
|
||||
linksys,mr8300)
|
||||
ucidef_set_interfaces_lan_wan "eth0" "eth1"
|
||||
ucidef_add_switch "switch0" \
|
||||
|
|
@ -95,6 +95,7 @@ ipq40xx_setup_interfaces()
|
|||
ucidef_add_switch "switch0" \
|
||||
"0u@eth0" "2:lan:3" "3:lan:2" "4:lan:1" "0u@eth1" "5:wan"
|
||||
;;
|
||||
glinet,gl-ap1300 |\
|
||||
glinet,gl-b1300 |\
|
||||
glinet,gl-s1300)
|
||||
ucidef_set_interfaces_lan_wan "eth0" "eth1"
|
||||
|
|
@ -134,9 +135,9 @@ ipq40xx_setup_macs()
|
|||
8dev,habanero-dvk)
|
||||
label_mac=$(mtd_get_mac_binary "ART" 0x1006)
|
||||
;;
|
||||
asus,rt-ac58u|\
|
||||
p2w,r619ac-128m|\
|
||||
p2w,r619ac)
|
||||
p2w,r619ac|\
|
||||
asus,rt-ac58u)
|
||||
CI_UBIPART=UBI_DEV
|
||||
wan_mac=$(mtd_get_mac_binary_ubi Factory 0x1006)
|
||||
lan_mac=$(mtd_get_mac_binary_ubi Factory 0x5006)
|
||||
|
|
|
|||
|
|
@ -46,7 +46,7 @@ case "$FIRMWARE" in
|
|||
# OEM assigns 4 sequential MACs
|
||||
ath10k_patch_mac $(macaddr_setbit_la $(macaddr_add "$(cat /sys/class/net/eth0/address)" 4))
|
||||
;;
|
||||
pangu,l1000)
|
||||
pangu,l1000)
|
||||
caldata_extract "ART" 0x5000 0x2f20
|
||||
ath10k_patch_mac $(macaddr_add "$(cat /sys/class/net/eth0/address)" 3)
|
||||
;;
|
||||
|
|
@ -59,11 +59,12 @@ case "$FIRMWARE" in
|
|||
alfa-network,ap120c-ac |\
|
||||
cilab,meshpoint-one |\
|
||||
ezviz,cs-w3-wd1200g-eup |\
|
||||
glinet,gl-ap1300 |\
|
||||
glinet,gl-b1300 |\
|
||||
glinet,gl-s1300 |\
|
||||
linksys,ea6350v3 |\
|
||||
mobipromo,cm520-79f |\
|
||||
p2w,r619ac-128m |\
|
||||
p2w,r619ac-128m |\
|
||||
p2w,r619ac |\
|
||||
qcom,ap-dk01.1-c1)
|
||||
caldata_extract "ART" 0x1000 0x2f20
|
||||
|
|
@ -140,6 +141,10 @@ case "$FIRMWARE" in
|
|||
caldata_extract "ART" 0x1000 0x2f20
|
||||
ath10k_patch_mac $(macaddr_add "$(cat /sys/class/net/eth0/address)" 2)
|
||||
;;
|
||||
pangu,l1000)
|
||||
caldata_extract "ART" 0x1000 0x2f20
|
||||
ath10k_patch_mac $(macaddr_add "$(cat /sys/class/net/eth0/address)" 2)
|
||||
;;
|
||||
meraki,mr33)
|
||||
caldata_extract_ubi "ART" 0x1000 0x2f20
|
||||
caldata_valid "202f" || caldata_extract "ART" 0x1000 0x2f20
|
||||
|
|
@ -164,12 +169,13 @@ case "$FIRMWARE" in
|
|||
alfa-network,ap120c-ac |\
|
||||
cilab,meshpoint-one |\
|
||||
ezviz,cs-w3-wd1200g-eup |\
|
||||
glinet,gl-ap1300 |\
|
||||
glinet,gl-b1300 |\
|
||||
glinet,gl-s1300 |\
|
||||
linksys,ea6350v3 |\
|
||||
p2w,r619ac-128m |\
|
||||
p2w,r619ac |\
|
||||
mobipromo,cm520-79f |\
|
||||
p2w,r619ac-128m |\
|
||||
p2w,r619ac |\
|
||||
qcom,ap-dk01.1-c1)
|
||||
caldata_extract "ART" 0x5000 0x2f20
|
||||
;;
|
||||
|
|
@ -245,10 +251,6 @@ case "$FIRMWARE" in
|
|||
caldata_extract "ART" 0x5000 0x2f20
|
||||
ath10k_patch_mac $(macaddr_add "$(cat /sys/class/net/eth0/address)" 3)
|
||||
;;
|
||||
pangu,l1000)
|
||||
caldata_extract "ART" 0x1000 0x2f20
|
||||
ath10k_patch_mac $(macaddr_add "$(cat /sys/class/net/eth0/address)" 2)
|
||||
;;
|
||||
meraki,mr33)
|
||||
caldata_extract_ubi "ART" 0x5000 0x2f20
|
||||
caldata_valid "202f" || caldata_extract "ART" 0x5000 0x2f20
|
||||
|
|
|
|||
|
|
@ -1,5 +0,0 @@
|
|||
# Copyright (c) 2013 The Linux Foundation. All rights reserved.
|
||||
::sysinit:/etc/init.d/rcS S boot
|
||||
::shutdown:/etc/init.d/rcS K shutdown
|
||||
ttyMSM0::askfirst:/usr/libexec/login.sh
|
||||
ttyMSM1::askfirst:/usr/libexec/login.sh
|
||||
|
|
@ -1,19 +0,0 @@
|
|||
. /lib/functions/migrations.sh
|
||||
|
||||
board=$(board_name)
|
||||
|
||||
case "$board" in
|
||||
engenius,emr3500)
|
||||
migrate_leds "emr3500:="
|
||||
;;
|
||||
engenius,ens620ext|\
|
||||
zyxel,nbg6617)
|
||||
migrate_leds ":wlan2G=:wlan2g" ":wlan5G=:wlan5g"
|
||||
;;
|
||||
esac
|
||||
|
||||
remove_devicename_leds
|
||||
|
||||
migrations_apply system
|
||||
|
||||
exit 0
|
||||
|
|
@ -1,35 +0,0 @@
|
|||
. /lib/functions.sh
|
||||
|
||||
preinit_set_mac_address() {
|
||||
case $(board_name) in
|
||||
asus,map-ac2200)
|
||||
base_mac=$(mtd_get_mac_binary_ubi Factory 0x1006)
|
||||
ip link set dev eth0 address $(macaddr_add "$base_mac" +1)
|
||||
ip link set dev eth1 address $(macaddr_add "$base_mac" +3)
|
||||
;;
|
||||
ezviz,cs-w3-wd1200g-eup)
|
||||
ip link set dev eth0 address $(mtd_get_mac_binary "ART" 0x6)
|
||||
ip link set dev eth1 address $(mtd_get_mac_binary "ART" 0x0)
|
||||
;;
|
||||
engenius,eap2200)
|
||||
base_mac=$(cat /sys/class/net/eth0/address)
|
||||
ip link set dev eth1 address $(macaddr_add "${base_mac}" +1)
|
||||
;;
|
||||
linksys,ea8300|\
|
||||
linksys,mr8300)
|
||||
base_mac=$(mtd_get_mac_ascii devinfo hw_mac_addr)
|
||||
ip link set dev eth0 address "${base_mac}"
|
||||
ip link set dev eth1 address $(macaddr_add "${base_mac}" 1)
|
||||
;;
|
||||
meraki,mr33)
|
||||
mac_lan=$(get_mac_binary "/sys/bus/i2c/devices/0-0050/eeprom" 0x66)
|
||||
[ -n "$mac_lan" ] && ip link set dev eth0 address "$mac_lan"
|
||||
;;
|
||||
zyxel,nbg6617)
|
||||
base_mac=$(cat /sys/class/net/eth0/address)
|
||||
ip link set dev eth0 address $(macaddr_add "$base_mac" +2)
|
||||
ip link set dev eth1 address $(macaddr_add "$base_mac" +3)
|
||||
esac
|
||||
}
|
||||
|
||||
boot_hook_add preinit_main preinit_set_mac_address
|
||||
|
|
@ -1,22 +0,0 @@
|
|||
set_preinit_iface() {
|
||||
. /lib/functions.sh
|
||||
|
||||
case $(board_name) in
|
||||
aruba,ap-303| \
|
||||
asus,rt-ac58u| \
|
||||
avm,fritzbox-4040| \
|
||||
ezviz,cs-w3-wd1200g-eup| \
|
||||
glinet,gl-b1300| \
|
||||
linksys,ea8300| \
|
||||
linksys,mr8300| \
|
||||
meraki,mr33| \
|
||||
zyxel,nbg6617)
|
||||
ifname=eth0
|
||||
;;
|
||||
devolo,magic-2-wifi-next)
|
||||
ifname=eth1
|
||||
;;
|
||||
esac
|
||||
}
|
||||
|
||||
boot_hook_add preinit_main set_preinit_iface
|
||||
|
|
@ -1,122 +0,0 @@
|
|||
linksys_get_target_firmware() {
|
||||
local cur_boot_part mtd_ubi0
|
||||
|
||||
cur_boot_part="$(/usr/sbin/fw_printenv -n boot_part)"
|
||||
if [ -z "${cur_boot_part}" ]; then
|
||||
mtd_ubi0=$(cat /sys/devices/virtual/ubi/ubi0/mtd_num)
|
||||
case "$(grep -E "^mtd${mtd_ubi0}:" /proc/mtd | cut -d '"' -f 2)" in
|
||||
kernel|rootfs)
|
||||
cur_boot_part=1
|
||||
;;
|
||||
alt_kernel|alt_rootfs)
|
||||
cur_boot_part=2
|
||||
;;
|
||||
esac
|
||||
>&2 printf "Current boot_part='%s' selected from ubi0/mtd_num='%s'" \
|
||||
"${cur_boot_part}" "${mtd_ubi0}"
|
||||
fi
|
||||
|
||||
# OEM U-Boot for EA6350v3, EA8300 and MR8300; bootcmd=
|
||||
# if test $auto_recovery = no;
|
||||
# then bootipq;
|
||||
# elif test $boot_part = 1;
|
||||
# then run bootpart1;
|
||||
# else run bootpart2;
|
||||
# fi
|
||||
|
||||
case "$cur_boot_part" in
|
||||
1)
|
||||
fw_setenv -s - <<-EOF
|
||||
boot_part 2
|
||||
auto_recovery yes
|
||||
EOF
|
||||
printf "alt_kernel"
|
||||
return
|
||||
;;
|
||||
2)
|
||||
fw_setenv -s - <<-EOF
|
||||
boot_part 1
|
||||
auto_recovery yes
|
||||
EOF
|
||||
printf "kernel"
|
||||
return
|
||||
;;
|
||||
*)
|
||||
return
|
||||
;;
|
||||
esac
|
||||
}
|
||||
|
||||
linksys_get_root_magic() {
|
||||
(get_image "$@" | dd skip=786432 bs=4 count=1 | hexdump -v -n 4 -e '1/1 "%02x"') 2>/dev/null
|
||||
}
|
||||
|
||||
platform_do_upgrade_linksys() {
|
||||
local magic_long="$(get_magic_long "$1")"
|
||||
|
||||
local rm_oem_fw_vols="squashfs ubifs" # from OEM [alt_]rootfs UBI
|
||||
local vol
|
||||
|
||||
mkdir -p /var/lock
|
||||
local part_label="$(linksys_get_target_firmware)"
|
||||
touch /var/lock/fw_printenv.lock
|
||||
|
||||
if [ -z "$part_label" ]; then
|
||||
echo "cannot find target partition"
|
||||
exit 1
|
||||
fi
|
||||
|
||||
local target_mtd=$(find_mtd_part "$part_label")
|
||||
|
||||
[ "$magic_long" = "73797375" ] && {
|
||||
CI_KERNPART="$part_label"
|
||||
if [ "$part_label" = "kernel" ]; then
|
||||
CI_UBIPART="rootfs"
|
||||
else
|
||||
CI_UBIPART="alt_rootfs"
|
||||
fi
|
||||
|
||||
local mtdnum="$(find_mtd_index "$CI_UBIPART")"
|
||||
if [ ! "$mtdnum" ]; then
|
||||
echo "cannot find ubi mtd partition $CI_UBIPART"
|
||||
return 1
|
||||
fi
|
||||
|
||||
local ubidev="$(nand_find_ubi "$CI_UBIPART")"
|
||||
if [ ! "$ubidev" ]; then
|
||||
ubiattach -m "$mtdnum"
|
||||
sync
|
||||
ubidev="$(nand_find_ubi "$CI_UBIPART")"
|
||||
fi
|
||||
|
||||
if [ "$ubidev" ]; then
|
||||
for vol in $rm_oem_fw_vols; do
|
||||
ubirmvol "/dev/$ubidev" -N "$vol" 2>/dev/null
|
||||
done
|
||||
fi
|
||||
|
||||
# complete std upgrade
|
||||
nand_upgrade_tar "$1"
|
||||
}
|
||||
|
||||
[ "$magic_long" = "27051956" ] && {
|
||||
# This magic is for a uImage (which is a sysupgrade image)
|
||||
# check firmwares' rootfs types
|
||||
local oldroot="$(linksys_get_root_magic "$target_mtd")"
|
||||
local newroot="$(linksys_get_root_magic "$1")"
|
||||
|
||||
if [ "$newroot" = "55424923" ] && [ "$oldroot" = "55424923" ]; then
|
||||
# we're upgrading from a firmware with UBI to one with UBI
|
||||
# erase everything to be safe
|
||||
# - Is that really needed? Won't remove (or comment) the if,
|
||||
# because it may be needed in a future device.
|
||||
#mtd erase $part_label
|
||||
#get_image "$1" | mtd -n write - $part_label
|
||||
echo "writing \"$1\" UBI image to \"$part_label\" (UBI)..."
|
||||
get_image "$1" | mtd write - "$part_label"
|
||||
else
|
||||
echo "writing \"$1\" image to \"$part_label\""
|
||||
get_image "$1" | mtd write - "$part_label"
|
||||
fi
|
||||
}
|
||||
}
|
||||
|
|
@ -1,106 +0,0 @@
|
|||
# The U-Boot loader of the OpenMesh devices requires image sizes and
|
||||
# checksums to be provided in the U-Boot environment.
|
||||
# The OpenMesh devices come with 2 main partitions - while one is active
|
||||
# sysupgrade will flash the other. The boot order is changed to boot the
|
||||
# newly flashed partition. If the new partition can't be booted due to
|
||||
# upgrade failures the previously used partition is loaded.
|
||||
|
||||
platform_do_upgrade_openmesh() {
|
||||
local tar_file="$1"
|
||||
local restore_backup
|
||||
local primary_kernel_mtd
|
||||
|
||||
local setenv_script="/tmp/fw_env_upgrade"
|
||||
|
||||
local kernel_mtd="$(find_mtd_index $PART_NAME)"
|
||||
local kernel_offset="$(cat /sys/class/mtd/mtd${kernel_mtd}/offset)"
|
||||
local total_size="$(cat /sys/class/mtd/mtd${kernel_mtd}/size)"
|
||||
|
||||
# detect to which flash region the new image is written to.
|
||||
#
|
||||
# 1. check what is the mtd index for the first flash region on this
|
||||
# device
|
||||
# 2. check if the target partition ("inactive") has the mtd index of
|
||||
# the first flash region
|
||||
#
|
||||
# - when it is: the new bootseq will be 1,2 and the first region is
|
||||
# modified
|
||||
# - when it isnt: bootseq will be 2,1 and the second region is
|
||||
# modified
|
||||
#
|
||||
# The detection has to be done via the hardcoded mtd partition because
|
||||
# the current boot might be done with the fallback region. Let us
|
||||
# assume that the current bootseq is 1,2. The bootloader detected that
|
||||
# the image in flash region 1 is corrupt and thus switches to flash
|
||||
# region 2. The bootseq in the u-boot-env is now still the same and
|
||||
# the sysupgrade code can now only rely on the actual mtd indexes and
|
||||
# not the bootseq variable to detect the currently booted flash
|
||||
# region/image.
|
||||
#
|
||||
# In the above example, an implementation which uses bootseq ("1,2") to
|
||||
# detect the currently booted image would assume that region 1 is booted
|
||||
# and then overwrite the variables for the wrong flash region (aka the
|
||||
# one which isn't modified). This could result in a device which doesn't
|
||||
# boot anymore to Linux until it was reflashed with ap51-flash.
|
||||
local next_boot_part="1"
|
||||
case "$(board_name)" in
|
||||
openmesh,a42)
|
||||
primary_kernel_mtd=8
|
||||
;;
|
||||
openmesh,a62)
|
||||
primary_kernel_mtd=10
|
||||
;;
|
||||
*)
|
||||
echo "failed to detect primary kernel mtd partition for board"
|
||||
return 1
|
||||
;;
|
||||
esac
|
||||
[ "$kernel_mtd" = "$primary_kernel_mtd" ] || next_boot_part="2"
|
||||
|
||||
local board_dir=$(tar tf $tar_file | grep -m 1 '^sysupgrade-.*/$')
|
||||
board_dir=${board_dir%/}
|
||||
|
||||
local kernel_length=$(tar xf $tar_file ${board_dir}/kernel -O | wc -c)
|
||||
local rootfs_length=$(tar xf $tar_file ${board_dir}/root -O | wc -c)
|
||||
# rootfs without EOF marker
|
||||
rootfs_length=$((rootfs_length-4))
|
||||
|
||||
local kernel_md5=$(tar xf $tar_file ${board_dir}/kernel -O | md5sum); kernel_md5="${kernel_md5%% *}"
|
||||
# md5 checksum of rootfs with EOF marker
|
||||
local rootfs_md5=$(tar xf $tar_file ${board_dir}/root -O | dd bs=1 count=$rootfs_length | md5sum); rootfs_md5="${rootfs_md5%% *}"
|
||||
|
||||
#
|
||||
# add tar support to get_image() to use default_do_upgrade() instead?
|
||||
#
|
||||
|
||||
# take care of restoring a saved config
|
||||
[ -n "$UPGRADE_BACKUP" ] && restore_backup="${MTD_CONFIG_ARGS} -j ${UPGRADE_BACKUP}"
|
||||
|
||||
mtd -q erase inactive
|
||||
tar xf $tar_file ${board_dir}/root -O | mtd -n -p $kernel_length $restore_backup write - $PART_NAME
|
||||
tar xf $tar_file ${board_dir}/kernel -O | mtd -n write - $PART_NAME
|
||||
|
||||
# prepare new u-boot env
|
||||
if [ "$next_boot_part" = "1" ]; then
|
||||
echo "bootseq 1,2" > $setenv_script
|
||||
else
|
||||
echo "bootseq 2,1" > $setenv_script
|
||||
fi
|
||||
|
||||
printf "kernel_size_%i 0x%08x\n" $next_boot_part $kernel_length >> $setenv_script
|
||||
printf "vmlinux_start_addr 0x%08x\n" ${kernel_offset} >> $setenv_script
|
||||
printf "vmlinux_size 0x%08x\n" ${kernel_length} >> $setenv_script
|
||||
printf "vmlinux_checksum %s\n" ${kernel_md5} >> $setenv_script
|
||||
|
||||
printf "rootfs_size_%i 0x%08x\n" $next_boot_part $((total_size-kernel_length)) >> $setenv_script
|
||||
printf "rootfs_start_addr 0x%08x\n" $((kernel_offset+kernel_length)) >> $setenv_script
|
||||
printf "rootfs_size 0x%08x\n" ${rootfs_length} >> $setenv_script
|
||||
printf "rootfs_checksum %s\n" ${rootfs_md5} >> $setenv_script
|
||||
|
||||
# store u-boot env changes
|
||||
mkdir -p /var/lock
|
||||
fw_setenv -s $setenv_script || {
|
||||
echo "failed to update U-Boot environment"
|
||||
return 1
|
||||
}
|
||||
}
|
||||
|
|
@ -1,127 +0,0 @@
|
|||
PART_NAME=firmware
|
||||
REQUIRE_IMAGE_METADATA=1
|
||||
|
||||
RAMFS_COPY_BIN='fw_printenv fw_setenv'
|
||||
RAMFS_COPY_DATA='/etc/fw_env.config /var/lock/fw_printenv.lock'
|
||||
|
||||
platform_check_image() {
|
||||
case "$(board_name)" in
|
||||
asus,rt-ac58u)
|
||||
CI_UBIPART="UBI_DEV"
|
||||
local ubidev=$(nand_find_ubi $CI_UBIPART)
|
||||
local asus_root=$(nand_find_volume $ubidev jffs2)
|
||||
|
||||
[ -n "$asus_root" ] || return 0
|
||||
|
||||
cat << EOF
|
||||
jffs2 partition is still present.
|
||||
There's probably no space left
|
||||
to install the filesystem.
|
||||
|
||||
You need to delete the jffs2 partition first:
|
||||
# ubirmvol /dev/ubi0 --name=jffs2
|
||||
|
||||
Once this is done. Retry.
|
||||
EOF
|
||||
return 1
|
||||
;;
|
||||
esac
|
||||
return 0;
|
||||
}
|
||||
|
||||
askey_do_upgrade() {
|
||||
local tar_file="$1"
|
||||
|
||||
local board_dir=$(tar tf $tar_file | grep -m 1 '^sysupgrade-.*/$')
|
||||
board_dir=${board_dir%/}
|
||||
|
||||
tar Oxf $tar_file ${board_dir}/root | mtd write - rootfs
|
||||
|
||||
nand_do_upgrade "$1"
|
||||
}
|
||||
|
||||
zyxel_do_upgrade() {
|
||||
local tar_file="$1"
|
||||
|
||||
local board_dir=$(tar tf $tar_file | grep -m 1 '^sysupgrade-.*/$')
|
||||
board_dir=${board_dir%/}
|
||||
|
||||
tar Oxf $tar_file ${board_dir}/kernel | mtd write - kernel
|
||||
|
||||
if [ -n "$UPGRADE_BACKUP" ]; then
|
||||
tar Oxf $tar_file ${board_dir}/root | mtd -j "$UPGRADE_BACKUP" write - rootfs
|
||||
else
|
||||
tar Oxf $tar_file ${board_dir}/root | mtd write - rootfs
|
||||
fi
|
||||
}
|
||||
|
||||
platform_do_upgrade() {
|
||||
case "$(board_name)" in
|
||||
8dev,jalapeno |\
|
||||
aruba,ap-303 |\
|
||||
aruba,ap-303h |\
|
||||
aruba,ap-365 |\
|
||||
avm,fritzbox-7530 |\
|
||||
avm,fritzrepeater-1200 |\
|
||||
avm,fritzrepeater-3000 |\
|
||||
buffalo,wtr-m2133hp |\
|
||||
cilab,meshpoint-one |\
|
||||
edgecore,ecw5211 |\
|
||||
edgecore,oap100 |\
|
||||
engenius,eap2200 |\
|
||||
luma,wrtq-329acn |\
|
||||
mobipromo,cm520-79f |\
|
||||
qxwlan,e2600ac-c2)
|
||||
nand_do_upgrade "$1"
|
||||
;;
|
||||
alfa-network,ap120c-ac)
|
||||
part="$(awk -F 'ubi.mtd=' '{printf $2}' /proc/cmdline | sed -e 's/ .*$//')"
|
||||
if [ "$part" = "rootfs1" ]; then
|
||||
fw_setenv active 2 || exit 1
|
||||
CI_UBIPART="rootfs2"
|
||||
else
|
||||
fw_setenv active 1 || exit 1
|
||||
CI_UBIPART="rootfs1"
|
||||
fi
|
||||
nand_do_upgrade "$1"
|
||||
;;
|
||||
asus,map-ac2200)
|
||||
CI_KERNPART="linux"
|
||||
nand_do_upgrade "$1"
|
||||
;;
|
||||
asus,rt-ac58u)
|
||||
CI_UBIPART="UBI_DEV"
|
||||
CI_KERNPART="linux"
|
||||
nand_do_upgrade "$1"
|
||||
;;
|
||||
cellc,rtl30vw)
|
||||
CI_UBIPART="ubifs"
|
||||
askey_do_upgrade "$1"
|
||||
;;
|
||||
compex,wpj419)
|
||||
nand_do_upgrade "$1"
|
||||
;;
|
||||
linksys,ea6350v3 |\
|
||||
linksys,ea8300 |\
|
||||
linksys,mr8300)
|
||||
platform_do_upgrade_linksys "$1"
|
||||
;;
|
||||
meraki,mr33)
|
||||
CI_KERNPART="part.safe"
|
||||
nand_do_upgrade "$1"
|
||||
;;
|
||||
openmesh,a42 |\
|
||||
openmesh,a62 |\
|
||||
plasmacloud,pa1200 |\
|
||||
plasmacloud,pa2200)
|
||||
PART_NAME="inactive"
|
||||
platform_do_upgrade_dualboot_datachk "$1"
|
||||
;;
|
||||
zyxel,nbg6617)
|
||||
zyxel_do_upgrade "$1"
|
||||
;;
|
||||
*)
|
||||
default_do_upgrade "$1"
|
||||
;;
|
||||
esac
|
||||
}
|
||||
|
|
@ -1,394 +0,0 @@
|
|||
/* SPDX-License-Identifier: GPL-2.0-or-later OR MIT
|
||||
*
|
||||
* Copyright (c) 2018 Peng Zhang <sd20@qxwlan.com>
|
||||
*
|
||||
*/
|
||||
|
||||
#include "qcom-ipq4019.dtsi"
|
||||
#include <dt-bindings/gpio/gpio.h>
|
||||
#include <dt-bindings/input/input.h>
|
||||
#include <dt-bindings/soc/qcom,tcsr.h>
|
||||
|
||||
/ {
|
||||
|
||||
model = "ANTROUTERGZ1000";
|
||||
compatible = "pangu,l1000", "qcom,ipq4019";
|
||||
|
||||
|
||||
memory {
|
||||
device_type = "memory";
|
||||
reg = <0x80000000 0x20000000>; /* 512MB */
|
||||
};
|
||||
|
||||
aliases {
|
||||
sdhc1 = &sdhci;
|
||||
led-boot = &power;
|
||||
led-failsafe = &power;
|
||||
led-running = &power;
|
||||
led-upgrade = &power;
|
||||
};
|
||||
|
||||
chosen {
|
||||
bootargs-append = " root=/dev/ubiblock0_1 rootfstype=squashfs";
|
||||
};
|
||||
|
||||
soc {
|
||||
rng@22000 {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
mdio@90000 {
|
||||
status = "okay";
|
||||
pinctrl-0 = <&mdio_pins>;
|
||||
pinctrl-names = "default";
|
||||
reset-gpios = <&tlmm 47 GPIO_ACTIVE_LOW>;
|
||||
reset-delay-us = <2000>;
|
||||
};
|
||||
|
||||
ess-psgmii@98000 {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
tcsr@1949000 {
|
||||
compatible = "qcom,tcsr";
|
||||
reg = <0x1949000 0x100>;
|
||||
qcom,wifi_glb_cfg = <TCSR_WIFI_GLB_CFG>;
|
||||
};
|
||||
|
||||
tcsr@194b000 {
|
||||
/* select hostmode */
|
||||
compatible = "qcom,tcsr";
|
||||
reg = <0x194b000 0x100>;
|
||||
qcom,usb-hsphy-mode-select = <TCSR_USB_HSPHY_HOST_MODE>;
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
ess_tcsr@1953000 {
|
||||
compatible = "qcom,tcsr";
|
||||
reg = <0x1953000 0x1000>;
|
||||
qcom,ess-interface-select = <TCSR_ESS_PSGMII>;
|
||||
};
|
||||
|
||||
tcsr@1957000 {
|
||||
compatible = "qcom,tcsr";
|
||||
reg = <0x1957000 0x100>;
|
||||
qcom,wifi_noc_memtype_m0_m2 = <TCSR_WIFI_NOC_MEMTYPE_M0_M2>;
|
||||
};
|
||||
|
||||
usb2@60f8800 {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
usb3@8af8800 {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
crypto@8e3a000 {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
watchdog@b017000 {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
ess-switch@c000000 {
|
||||
status = "okay";
|
||||
switch_lan_bmp = <0x18>;
|
||||
switch_wan_bmp = <0x20>;
|
||||
};
|
||||
|
||||
i2c@78b7000 { /* BLSP1 QUP2 */
|
||||
pinctrl-0 = <&i2c_0_pins>;
|
||||
pinctrl-names = "default";
|
||||
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
edma@c080000 {
|
||||
status = "okay";
|
||||
};
|
||||
};
|
||||
|
||||
keys {
|
||||
compatible = "gpio-keys";
|
||||
|
||||
reset {
|
||||
label = "reset";
|
||||
gpios = <&tlmm 18 GPIO_ACTIVE_LOW>;
|
||||
linux,code = <KEY_RESTART>;
|
||||
};
|
||||
};
|
||||
|
||||
leds {
|
||||
compatible = "gpio-leds";
|
||||
|
||||
power: status {
|
||||
label = "blue:status";
|
||||
gpios = <&tlmm 3 GPIO_ACTIVE_LOW>;
|
||||
};
|
||||
|
||||
wlan2g {
|
||||
label = "blue:wlan2g";
|
||||
gpios = <&tlmm 1 GPIO_ACTIVE_LOW>;
|
||||
};
|
||||
|
||||
wlan5g {
|
||||
label = "bule:wlan5g";
|
||||
gpios = <&tlmm 2 GPIO_ACTIVE_LOW>;
|
||||
};
|
||||
|
||||
wan {
|
||||
label = "bule:wan";
|
||||
gpios = <&tlmm 4 GPIO_ACTIVE_LOW>;
|
||||
};
|
||||
usb {
|
||||
label = "bule::usb";
|
||||
gpios = <&tlmm 5 GPIO_ACTIVE_LOW>;
|
||||
trigger-sources = <&usb2>, <&usb3>;
|
||||
linux,default-trigger = "usbport";
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
&vqmmc {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&sdhci {
|
||||
status = "okay";
|
||||
pinctrl-0 = <&sd_pins>;
|
||||
pinctrl-names = "default";
|
||||
cd-gpios = <&tlmm 22 GPIO_ACTIVE_LOW>;
|
||||
vqmmc-supply = <&vqmmc>;
|
||||
};
|
||||
|
||||
&blsp_dma {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&cryptobam {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&blsp1_spi1 {
|
||||
pinctrl-0 = <&spi_0_pins>;
|
||||
pinctrl-names = "default";
|
||||
status = "okay";
|
||||
cs-gpios = <&tlmm 12 GPIO_ACTIVE_HIGH>;
|
||||
|
||||
flash@0 {
|
||||
compatible = "jedec,spi-nor";
|
||||
reg = <0>;
|
||||
spi-max-frequency = <24000000>;
|
||||
|
||||
partitions {
|
||||
compatible = "fixed-partitions";
|
||||
#address-cells = <1>;
|
||||
#size-cells = <1>;
|
||||
|
||||
SBL1@0 {
|
||||
label = "SBL1";
|
||||
reg = <0x0 0x40000>;
|
||||
read-only;
|
||||
};
|
||||
|
||||
MIBIB@40000 {
|
||||
label = "MIBIB";
|
||||
reg = <0x40000 0x20000>;
|
||||
};
|
||||
|
||||
QSEE@60000 {
|
||||
label = "QSEE";
|
||||
reg = <0x60000 0x60000>;
|
||||
read-only;
|
||||
};
|
||||
|
||||
CDT@c0000 {
|
||||
label = "CDT";
|
||||
reg = <0xc0000 0x10000>;
|
||||
read-only;
|
||||
};
|
||||
|
||||
DDRPARAMS@d0000 {
|
||||
label = "DDRPARAMS";
|
||||
reg = <0xd0000 0x10000>;
|
||||
read-only;
|
||||
};
|
||||
|
||||
APPSBLENV@e0000 {
|
||||
label = "APPSBLENV";
|
||||
reg = <0xe0000 0x10000>;
|
||||
};
|
||||
|
||||
APPSBL@f0000 {
|
||||
label = "APPSBL";
|
||||
reg = <0xf0000 0x80000>;
|
||||
};
|
||||
|
||||
ART@170000 {
|
||||
label = "ART";
|
||||
reg = <0x170000 0x10000>;
|
||||
};
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
&nand {
|
||||
pinctrl-0 = <&nand_pins>;
|
||||
pinctrl-names = "default";
|
||||
status = "okay";
|
||||
|
||||
nand@0 {
|
||||
partitions {
|
||||
compatible = "fixed-partitions";
|
||||
#address-cells = <1>;
|
||||
#size-cells = <1>;
|
||||
|
||||
rootfs@0 {
|
||||
label = "rootfs";
|
||||
reg = <0x0 0x8000000>;
|
||||
};
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
&qpic_bam {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&blsp1_uart1 {
|
||||
pinctrl-0 = <&serial_pins>;
|
||||
pinctrl-names = "default";
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&blsp1_uart2 {
|
||||
pinctrl-0 = <&serial_1_pins>;
|
||||
pinctrl-names = "default";
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&tlmm {
|
||||
serial_pins: serial_pinmux {
|
||||
mux {
|
||||
pins = "gpio16", "gpio17";
|
||||
function = "blsp_uart0";
|
||||
bias-disable;
|
||||
};
|
||||
};
|
||||
|
||||
mdio_pins: mdio_pinmux {
|
||||
mux_1 {
|
||||
pins = "gpio6";
|
||||
function = "mdio";
|
||||
bias-pull-up;
|
||||
};
|
||||
mux_2 {
|
||||
pins = "gpio7";
|
||||
function = "mdc";
|
||||
bias-pull-up;
|
||||
};
|
||||
};
|
||||
|
||||
serial_1_pins: serial1_pinmux {
|
||||
mux {
|
||||
pins = "gpio8", "gpio9",
|
||||
"gpio10", "gpio11";
|
||||
function = "blsp_uart1";
|
||||
bias-disable;
|
||||
};
|
||||
};
|
||||
|
||||
i2c_0_pins: i2c-0-pinmux {
|
||||
mux {
|
||||
pins = "gpio20", "gpio21";
|
||||
function = "blsp_i2c0";
|
||||
bias-disable;
|
||||
};
|
||||
};
|
||||
|
||||
spi_0_pins: spi_0_pinmux {
|
||||
pinmux {
|
||||
function = "blsp_spi0";
|
||||
pins = "gpio13", "gpio14", "gpio15";
|
||||
};
|
||||
pinmux_cs {
|
||||
function = "gpio";
|
||||
pins = "gpio12";
|
||||
};
|
||||
pinconf {
|
||||
pins = "gpio13", "gpio14", "gpio15";
|
||||
drive-strength = <12>;
|
||||
bias-disable;
|
||||
};
|
||||
pinconf_cs {
|
||||
pins = "gpio12";
|
||||
drive-strength = <2>;
|
||||
bias-disable;
|
||||
output-high;
|
||||
};
|
||||
};
|
||||
|
||||
nand_pins: nand_pins {
|
||||
pullups {
|
||||
pins = "gpio52", "gpio53", "gpio58",
|
||||
"gpio59";
|
||||
function = "qpic";
|
||||
bias-pull-up;
|
||||
};
|
||||
|
||||
pulldowns {
|
||||
pins = "gpio54", "gpio55", "gpio56",
|
||||
"gpio57", "gpio60", "gpio61",
|
||||
"gpio62", "gpio63", "gpio64",
|
||||
"gpio65", "gpio66", "gpio67",
|
||||
"gpio68", "gpio69";
|
||||
function = "qpic";
|
||||
bias-pull-down;
|
||||
};
|
||||
};
|
||||
|
||||
sd_pins: sd_pins {
|
||||
pinmux {
|
||||
function = "sdio";
|
||||
pins = "gpio23", "gpio24", "gpio25", "gpio26",
|
||||
"gpio28", "gpio29", "gpio30", "gpio31";
|
||||
drive-strength = <10>;
|
||||
};
|
||||
|
||||
pinmux_sd_clk {
|
||||
function = "sdio";
|
||||
pins = "gpio27";
|
||||
drive-strength = <16>;
|
||||
};
|
||||
|
||||
pinmux_sd7 {
|
||||
function = "sdio";
|
||||
pins = "gpio32";
|
||||
drive-strength = <10>;
|
||||
bias-disable;
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
&usb2_hs_phy {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&usb3_hs_phy {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&usb3_ss_phy {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&wifi0 {
|
||||
status = "okay";
|
||||
qcom,ath10k-calibration-variant = "PANGU-L1000";
|
||||
};
|
||||
|
||||
&wifi1 {
|
||||
status = "okay";
|
||||
qcom,ath10k-calibration-variant = "PANGU-L1000";
|
||||
};
|
||||
|
|
@ -84,18 +84,18 @@
|
|||
pinctrl-names = "default";
|
||||
|
||||
led_sys: sys {
|
||||
label = "blue:sys";
|
||||
label = "r619ac:blue:sys";
|
||||
gpios = <&tlmm 39 GPIO_ACTIVE_HIGH>;
|
||||
};
|
||||
|
||||
wlan2g {
|
||||
label = "blue:wlan2g";
|
||||
label = "r619ac:blue:wlan2g";
|
||||
gpios = <&tlmm 32 GPIO_ACTIVE_HIGH>;
|
||||
linux,default-trigger = "phy0tpt";
|
||||
};
|
||||
|
||||
wlan5g {
|
||||
label = "blue:wlan5g";
|
||||
label = "r619ac:blue:wlan5g";
|
||||
gpios = <&tlmm 50 GPIO_ACTIVE_HIGH>;
|
||||
linux,default-trigger = "phy1tpt";
|
||||
};
|
||||
|
|
|
|||
|
|
@ -482,6 +482,21 @@ define Device/ezviz_cs-w3-wd1200g-eup
|
|||
endef
|
||||
TARGET_DEVICES += ezviz_cs-w3-wd1200g-eup
|
||||
|
||||
define Device/glinet_gl-ap1300
|
||||
$(call Device/FitImage)
|
||||
$(call Device/UbiFit)
|
||||
DEVICE_VENDOR := GL.iNet
|
||||
DEVICE_MODEL := GL-AP1300
|
||||
SOC := qcom-ipq4018
|
||||
DEVICE_DTS_CONFIG := config@ap.dk01.1-c2
|
||||
BLOCKSIZE := 128k
|
||||
PAGESIZE := 2048
|
||||
IMAGE_SIZE := 131072k
|
||||
KERNEL_INSTALL := 1
|
||||
DEVICE_PACKAGES := ipq-wifi-glinet_gl-ap1300
|
||||
endef
|
||||
TARGET_DEVICES += glinet_gl-ap1300
|
||||
|
||||
define Device/glinet_gl-b1300
|
||||
$(call Device/FitImage)
|
||||
DEVICE_VENDOR := GL.iNet
|
||||
|
|
|
|||
|
|
@ -10,7 +10,7 @@ Signed-off-by: John Crispin <john@phrozen.org>
|
|||
|
||||
--- a/arch/arm/boot/dts/Makefile
|
||||
+++ b/arch/arm/boot/dts/Makefile
|
||||
@@ -837,11 +837,60 @@ dtb-$(CONFIG_ARCH_QCOM) += \
|
||||
@@ -837,11 +837,61 @@ dtb-$(CONFIG_ARCH_QCOM) += \
|
||||
qcom-apq8074-dragonboard.dtb \
|
||||
qcom-apq8084-ifc6540.dtb \
|
||||
qcom-apq8084-mtp.dtb \
|
||||
|
|
@ -28,6 +28,7 @@ Signed-off-by: John Crispin <john@phrozen.org>
|
|||
+ qcom-ipq4018-ex6100v2.dtb \
|
||||
+ qcom-ipq4018-ex6150v2.dtb \
|
||||
+ qcom-ipq4018-fritzbox-4040.dtb \
|
||||
+ qcom-ipq4018-gl-ap1300.dtb \
|
||||
+ qcom-ipq4018-jalapeno.dtb \
|
||||
+ qcom-ipq4018-meshpoint-one.dtb \
|
||||
+ qcom-ipq4018-nbg6617.dtb \
|
||||
|
|
@ -58,9 +59,6 @@ Signed-off-by: John Crispin <john@phrozen.org>
|
|||
+ qcom-ipq4019-u4019-32m.dtb \
|
||||
+ qcom-ipq4019-wpj419.dtb \
|
||||
+ qcom-ipq4019-wtr-m2133hp.dtb \
|
||||
+ qcom-ipq4019-r619ac.dtb \
|
||||
+ qcom-ipq4019-r619ac-128m.dtb \
|
||||
+ qcom-ipq4019-l1000.dtb \
|
||||
+ qcom-ipq4028-wpj428.dtb \
|
||||
+ qcom-ipq4029-ap-303.dtb \
|
||||
+ qcom-ipq4029-ap-303h.dtb \
|
||||
|
|
@ -68,6 +66,9 @@ Signed-off-by: John Crispin <john@phrozen.org>
|
|||
+ qcom-ipq4029-gl-b1300.dtb \
|
||||
+ qcom-ipq4029-gl-s1300.dtb \
|
||||
+ qcom-ipq4029-mr33.dtb \
|
||||
+ qcom-ipq4019-r619ac.dtb \
|
||||
+ qcom-ipq4019-r619ac-128m.dtb \
|
||||
+ qcom-ipq4019-l1000.dtb \
|
||||
qcom-ipq8064-ap148.dtb \
|
||||
qcom-msm8660-surf.dtb \
|
||||
qcom-msm8960-cdp.dtb \
|
||||
19
root/target/linux/mediatek/Makefile
Executable file
19
root/target/linux/mediatek/Makefile
Executable file
|
|
@ -0,0 +1,19 @@
|
|||
# Copyright (c) 2015 OpenWrt.org
|
||||
#
|
||||
include $(TOPDIR)/rules.mk
|
||||
|
||||
ARCH:=arm
|
||||
BOARD:=mediatek
|
||||
BOARDNAME:=MediaTek Ralink ARM
|
||||
SUBTARGETS:=mt7622 mt7623 mt7629
|
||||
FEATURES:=squashfs nand ramdisk fpu ext4 usb
|
||||
|
||||
KERNEL_PATCHVER:=5.4
|
||||
KERNEL_TESTING_PATCHVER:=5.4
|
||||
|
||||
include $(INCLUDE_DIR)/target.mk
|
||||
DEFAULT_PACKAGES += \
|
||||
kmod-leds-gpio kmod-gpio-button-hotplug \
|
||||
wpad-mini uboot-envtools partx-utils e2fsprogs
|
||||
|
||||
$(eval $(call BuildTarget))
|
||||
4
root/target/linux/mediatek/base-files/etc/inittab
Executable file
4
root/target/linux/mediatek/base-files/etc/inittab
Executable file
|
|
@ -0,0 +1,4 @@
|
|||
::sysinit:/etc/init.d/rcS S boot
|
||||
::shutdown:/etc/init.d/rcS K shutdown
|
||||
::askconsole:/usr/libexec/login.sh
|
||||
ttyS0::askfirst:/usr/libexec/login.sh
|
||||
6
root/target/linux/mediatek/base-files/etc/uci-defaults/99-net-ps
Executable file
6
root/target/linux/mediatek/base-files/etc/uci-defaults/99-net-ps
Executable file
|
|
@ -0,0 +1,6 @@
|
|||
uci set network.globals.default_rps_val=14
|
||||
uci set network.globals.default_rps_flow_cnt=256
|
||||
uci set network.globals.default_xps_val=14
|
||||
uci set network.globals.default_ps=1
|
||||
uci commit
|
||||
exit 0
|
||||
9
root/target/linux/mediatek/base-files/lib/preinit/05_set_preinit_iface
Executable file
9
root/target/linux/mediatek/base-files/lib/preinit/05_set_preinit_iface
Executable file
|
|
@ -0,0 +1,9 @@
|
|||
#!/bin/sh
|
||||
|
||||
set_preinit_iface() {
|
||||
ifconfig eth0 up
|
||||
ifname=lan
|
||||
}
|
||||
|
||||
boot_hook_add preinit_main set_preinit_iface
|
||||
|
||||
8
root/target/linux/mediatek/base-files/lib/preinit/06_set_rps_sock_flow
Executable file
8
root/target/linux/mediatek/base-files/lib/preinit/06_set_rps_sock_flow
Executable file
|
|
@ -0,0 +1,8 @@
|
|||
#!/bin/sh
|
||||
|
||||
set_rps_sock_flow() {
|
||||
echo 1024 > /proc/sys/net/core/rps_sock_flow_entries
|
||||
}
|
||||
|
||||
boot_hook_add preinit_main set_rps_sock_flow
|
||||
|
||||
48
root/target/linux/mediatek/base-files/lib/preinit/07_set_iface_mac
Executable file
48
root/target/linux/mediatek/base-files/lib/preinit/07_set_iface_mac
Executable file
|
|
@ -0,0 +1,48 @@
|
|||
#!/bin/sh
|
||||
# Copyright (C) 2018 OpenWrt.org
|
||||
|
||||
RECOVERY_PART=/dev/mmcblk0p1
|
||||
|
||||
preinit_set_mac_address() {
|
||||
local mac
|
||||
|
||||
. /lib/functions.sh
|
||||
. /lib/functions/system.sh
|
||||
|
||||
case $(board_name) in
|
||||
'bananapi,bpi-r2'|\
|
||||
"unielec,u7623"*)
|
||||
if [ -b $RECOVERY_PART ]; then
|
||||
insmod nls_cp437
|
||||
insmod nls_iso8859-1
|
||||
insmod fat
|
||||
insmod vfat
|
||||
mkdir -p /tmp/recovery
|
||||
mount -o rw,noatime $RECOVERY_PART /tmp/recovery
|
||||
|
||||
if [ -f "/tmp/recovery/mac_addr" ];
|
||||
then
|
||||
mac=$(cat /tmp/recovery/mac_addr)
|
||||
else
|
||||
mac=$(cat /sys/class/net/eth0/address)
|
||||
echo "$mac" > /tmp/recovery/mac_addr
|
||||
fi
|
||||
|
||||
sync
|
||||
umount /tmp/recovery
|
||||
rm -rf /tmp/recovery
|
||||
fi
|
||||
|
||||
ip link set dev lan address $mac 2> /dev/null
|
||||
|
||||
mac=$(macaddr_add $mac 1)
|
||||
|
||||
ip link set dev wan1 address $mac 2>/dev/null
|
||||
ip link set dev wan2 address $mac 2>/dev/null
|
||||
ip link set dev wan3 address $mac 2>/dev/null
|
||||
ip link set dev wan4 address $mac 2>/dev/null
|
||||
;;
|
||||
esac
|
||||
}
|
||||
|
||||
boot_hook_add preinit_main preinit_set_mac_address
|
||||
19
root/target/linux/mediatek/base-files/lib/preinit/79_move_config
Executable file
19
root/target/linux/mediatek/base-files/lib/preinit/79_move_config
Executable file
|
|
@ -0,0 +1,19 @@
|
|||
#!/bin/sh
|
||||
# Copyright (C) 2015 OpenWrt.org
|
||||
|
||||
RECOVERY_PART=/dev/mmcblk0p1
|
||||
|
||||
move_config() {
|
||||
if [ -b $RECOVERY_PART ]; then
|
||||
insmod nls_cp437
|
||||
insmod nls_iso8859-1
|
||||
insmod fat
|
||||
insmod vfat
|
||||
mkdir -p /recovery
|
||||
mount -o rw,noatime $RECOVERY_PART /recovery
|
||||
[ -f /recovery/sysupgrade.tgz ] && mv -f /recovery/sysupgrade.tgz /
|
||||
umount /recovery
|
||||
fi
|
||||
}
|
||||
|
||||
boot_hook_add preinit_mount_root move_config
|
||||
7
root/target/linux/mediatek/base-files/lib/preinit/90_init_jffs2
Executable file
7
root/target/linux/mediatek/base-files/lib/preinit/90_init_jffs2
Executable file
|
|
@ -0,0 +1,7 @@
|
|||
#!/bin/sh
|
||||
do_firstboot() {
|
||||
if [ "$(mount | grep jffs2)" = "" ]; then
|
||||
/sbin/firstboot -y
|
||||
fi
|
||||
}
|
||||
boot_hook_add preinit_main do_firstboot
|
||||
85
root/target/linux/mediatek/base-files/lib/upgrade/platform.sh
Executable file
85
root/target/linux/mediatek/base-files/lib/upgrade/platform.sh
Executable file
|
|
@ -0,0 +1,85 @@
|
|||
platform_do_upgrade() {
|
||||
local board=$(board_name)
|
||||
case "$board" in
|
||||
"unielec,u7623"*)
|
||||
#Keep the persisten random mac address (if it exists)
|
||||
mkdir -p /tmp/recovery
|
||||
mount -o rw,noatime /dev/mmcblk0p1 /tmp/recovery
|
||||
[ -f "/tmp/recovery/mac_addr" ] && \
|
||||
mv -f /tmp/recovery/mac_addr /tmp/
|
||||
umount /tmp/recovery
|
||||
|
||||
#1310720 is the offset in bytes from the start of eMMC and to
|
||||
#the location of the kernel (2560 512 byte sectors)
|
||||
get_image "$1" | dd of=/dev/mmcblk0 bs=1310720 seek=1 conv=fsync
|
||||
|
||||
mount -o rw,noatime /dev/mmcblk0p1 /tmp/recovery
|
||||
[ -f "/tmp/mac_addr" ] && mv -f /tmp/mac_addr /tmp/recovery
|
||||
sync
|
||||
umount /tmp/recovery
|
||||
;;
|
||||
bananapi,bpi-r2)
|
||||
local tar_file="$1"
|
||||
|
||||
echo "flashing kernel"
|
||||
tar xf $tar_file sysupgrade-7623n-bananapi-bpi-r2/kernel -O | mtd write - kernel
|
||||
|
||||
echo "flashing rootfs"
|
||||
tar xf $tar_file sysupgrade-7623n-bananapi-bpi-r2/root -O | mtd write - rootfs
|
||||
;;
|
||||
*)
|
||||
default_do_upgrade "$ARGV"
|
||||
;;
|
||||
esac
|
||||
}
|
||||
|
||||
PART_NAME=firmware
|
||||
|
||||
platform_check_image() {
|
||||
local board=$(board_name)
|
||||
|
||||
[ "$#" -gt 1 ] && return 1
|
||||
|
||||
case "$board" in
|
||||
bananapi,bpi-r2)
|
||||
local tar_file="$1"
|
||||
local kernel_length=`(tar xf $tar_file sysupgrade-7623n-bananapi-bpi-r2/kernel -O | wc -c) 2> /dev/null`
|
||||
local rootfs_length=`(tar xf $tar_file sysupgrade-7623n-bananapi-bpi-r2/root -O | wc -c) 2> /dev/null`
|
||||
[ "$kernel_length" = 0 -o "$rootfs_length" = 0 ] && {
|
||||
echo "The upgrade image is corrupt."
|
||||
return 1
|
||||
}
|
||||
;;
|
||||
"unielec,u7623"*)
|
||||
local magic="$(get_magic_long "$1")"
|
||||
[ "$magic" != "27051956" ] && {
|
||||
echo "Invalid image type."
|
||||
return 1
|
||||
}
|
||||
return 0
|
||||
;;
|
||||
|
||||
*)
|
||||
echo "Sysupgrade is not supported on your board yet."
|
||||
return 1
|
||||
;;
|
||||
esac
|
||||
|
||||
return 0
|
||||
}
|
||||
|
||||
platform_copy_config_emmc() {
|
||||
mkdir -p /recovery
|
||||
mount -o rw,noatime /dev/mmcblk0p1 /recovery
|
||||
cp -af "$CONF_TAR" /recovery/
|
||||
sync
|
||||
umount /recovery
|
||||
}
|
||||
|
||||
platform_copy_config() {
|
||||
case "$(board_name)" in
|
||||
"unielec,u7623"*)
|
||||
platform_copy_config_emmc
|
||||
;;
|
||||
esac
|
||||
}
|
||||
51
root/target/linux/mediatek/modules.mk
Executable file
51
root/target/linux/mediatek/modules.mk
Executable file
|
|
@ -0,0 +1,51 @@
|
|||
define KernelPackage/ata-ahci-mtk
|
||||
TITLE:=Mediatek AHCI Serial ATA support
|
||||
KCONFIG:=CONFIG_AHCI_MTK
|
||||
FILES:= \
|
||||
$(LINUX_DIR)/drivers/ata/ahci_mtk.ko \
|
||||
$(LINUX_DIR)/drivers/ata/libahci_platform.ko
|
||||
AUTOLOAD:=$(call AutoLoad,40,libahci libahci_platform ahci_mtk,1)
|
||||
$(call AddDepends/ata)
|
||||
DEPENDS+=@(TARGET_mediatek_mt7622||TARGET_mediatek_mt7623)
|
||||
endef
|
||||
|
||||
define KernelPackage/ata-ahci-mtk/description
|
||||
Mediatek AHCI Serial ATA host controllers
|
||||
endef
|
||||
|
||||
$(eval $(call KernelPackage,ata-ahci-mtk))
|
||||
|
||||
define KernelPackage/sdhci-mtk
|
||||
SUBMENU:=Other modules
|
||||
TITLE:=Mediatek SDHCI driver
|
||||
DEPENDS:=@TARGET_mediatek_mt7622 +kmod-sdhci
|
||||
KCONFIG:=CONFIG_MMC_MTK
|
||||
FILES:= \
|
||||
$(LINUX_DIR)/drivers/mmc/host/mtk-sd.ko
|
||||
AUTOLOAD:=$(call AutoProbe,mtk-sd,1)
|
||||
endef
|
||||
|
||||
$(eval $(call KernelPackage,sdhci-mtk))
|
||||
|
||||
define KernelPackage/crypto-hw-mtk
|
||||
TITLE:= MediaTek's Crypto Engine module
|
||||
DEPENDS:=@TARGET_mediatek
|
||||
KCONFIG:= \
|
||||
CONFIG_CRYPTO_HW=y \
|
||||
CONFIG_CRYPTO_AES=y \
|
||||
CONFIG_CRYPTO_AEAD=y \
|
||||
CONFIG_CRYPTO_SHA1=y \
|
||||
CONFIG_CRYPTO_SHA256=y \
|
||||
CONFIG_CRYPTO_SHA512=y \
|
||||
CONFIG_CRYPTO_HMAC=y \
|
||||
CONFIG_CRYPTO_DEV_MEDIATEK
|
||||
FILES:=$(LINUX_DIR)/drivers/crypto/mediatek/mtk-crypto.ko
|
||||
AUTOLOAD:=$(call AutoLoad,90,mtk-crypto)
|
||||
$(call AddDepends/crypto)
|
||||
endef
|
||||
|
||||
define KernelPackage/crypto-hw-mtk/description
|
||||
MediaTek's EIP97 Cryptographic Engine driver.
|
||||
endef
|
||||
|
||||
$(eval $(call KernelPackage,crypto-hw-mtk))
|
||||
36
root/target/linux/mediatek/mt7623/base-files/etc/board.d/02_network
Executable file
36
root/target/linux/mediatek/mt7623/base-files/etc/board.d/02_network
Executable file
|
|
@ -0,0 +1,36 @@
|
|||
#!/bin/sh
|
||||
|
||||
. /lib/functions.sh
|
||||
. /lib/functions/uci-defaults.sh
|
||||
. /lib/functions/system.sh
|
||||
|
||||
mediatek_setup_interfaces()
|
||||
{
|
||||
local board="$1"
|
||||
|
||||
case $board in
|
||||
bananapi,bpi-r2|\
|
||||
unielec,u7623-02-emmc-512m)
|
||||
ucidef_set_interfaces_lan_wan "wan1 wan2 wan3 wan4" "lan"
|
||||
;;
|
||||
esac
|
||||
}
|
||||
|
||||
mediatek_setup_macs()
|
||||
{
|
||||
local board="$1"
|
||||
|
||||
case $board in
|
||||
unielec,u7623-02-emmc-512m)
|
||||
ucidef_set_interface_macaddr "lan" "$(cat /sys/class/net/lan/address)"
|
||||
;;
|
||||
esac
|
||||
}
|
||||
|
||||
board_config_update
|
||||
board=$(board_name)
|
||||
mediatek_setup_interfaces $board
|
||||
mediatek_setup_macs $board
|
||||
board_config_flush
|
||||
|
||||
exit 0
|
||||
47
root/target/linux/mediatek/mt7623/base-files/lib/preinit/07_set_iface_mac
Executable file
47
root/target/linux/mediatek/mt7623/base-files/lib/preinit/07_set_iface_mac
Executable file
|
|
@ -0,0 +1,47 @@
|
|||
#!/bin/sh
|
||||
# Copyright (C) 2018 OpenWrt.org
|
||||
|
||||
RECOVERY_PART=/dev/mmcblk0p1
|
||||
|
||||
preinit_set_mac_address() {
|
||||
local mac
|
||||
|
||||
. /lib/functions.sh
|
||||
. /lib/functions/system.sh
|
||||
|
||||
case $(board_name) in
|
||||
unielec,u7623-02-emmc-512m)
|
||||
if [ -b $RECOVERY_PART ]; then
|
||||
insmod nls_cp437
|
||||
insmod nls_iso8859-1
|
||||
insmod fat
|
||||
insmod vfat
|
||||
mkdir -p /tmp/recovery
|
||||
mount -o rw,noatime $RECOVERY_PART /tmp/recovery
|
||||
|
||||
if [ -f "/tmp/recovery/mac_addr" ];
|
||||
then
|
||||
mac=$(cat /tmp/recovery/mac_addr)
|
||||
else
|
||||
mac=$(cat /sys/class/net/eth0/address)
|
||||
echo "$mac" > /tmp/recovery/mac_addr
|
||||
fi
|
||||
|
||||
sync
|
||||
umount /tmp/recovery
|
||||
rm -rf /tmp/recovery
|
||||
fi
|
||||
|
||||
ip link set dev lan address $mac 2> /dev/null
|
||||
|
||||
mac=$(macaddr_add $mac 1)
|
||||
|
||||
ip link set dev wan1 address $mac 2>/dev/null
|
||||
ip link set dev wan2 address $mac 2>/dev/null
|
||||
ip link set dev wan3 address $mac 2>/dev/null
|
||||
ip link set dev wan4 address $mac 2>/dev/null
|
||||
;;
|
||||
esac
|
||||
}
|
||||
|
||||
boot_hook_add preinit_main preinit_set_mac_address
|
||||
19
root/target/linux/mediatek/mt7623/base-files/lib/preinit/79_move_config
Executable file
19
root/target/linux/mediatek/mt7623/base-files/lib/preinit/79_move_config
Executable file
|
|
@ -0,0 +1,19 @@
|
|||
#!/bin/sh
|
||||
# Copyright (C) 2012-2015 OpenWrt.org
|
||||
|
||||
move_config() {
|
||||
local partdev
|
||||
|
||||
. /lib/upgrade/common.sh
|
||||
|
||||
if export_bootdevice && export_partdevice partdev -1; then
|
||||
if mount -t vfat -o rw,noatime "/dev/$partdev" /mnt; then
|
||||
if [ -f /mnt/sysupgrade.tgz ]; then
|
||||
mv -f /mnt/sysupgrade.tgz /
|
||||
fi
|
||||
umount /mnt
|
||||
fi
|
||||
fi
|
||||
}
|
||||
|
||||
boot_hook_add preinit_mount_root move_config
|
||||
154
root/target/linux/mediatek/mt7623/base-files/lib/upgrade/platform.sh
Executable file
154
root/target/linux/mediatek/mt7623/base-files/lib/upgrade/platform.sh
Executable file
|
|
@ -0,0 +1,154 @@
|
|||
platform_do_upgrade() {
|
||||
local board=$(board_name)
|
||||
|
||||
case "$board" in
|
||||
unielec,u7623-02-emmc-512m)
|
||||
#Keep the persisten random mac address (if it exists)
|
||||
mkdir -p /tmp/recovery
|
||||
mount -o rw,noatime /dev/mmcblk0p1 /tmp/recovery
|
||||
[ -f "/tmp/recovery/mac_addr" ] && \
|
||||
mv -f /tmp/recovery/mac_addr /tmp/
|
||||
umount /tmp/recovery
|
||||
|
||||
#1310720 is the offset in bytes from the start of eMMC and to
|
||||
#the location of the kernel (2560 512 byte sectors)
|
||||
get_image "$1" | dd of=/dev/mmcblk0 bs=1310720 seek=1 conv=fsync
|
||||
|
||||
mount -o rw,noatime /dev/mmcblk0p1 /tmp/recovery
|
||||
[ -f "/tmp/mac_addr" ] && mv -f /tmp/mac_addr /tmp/recovery
|
||||
sync
|
||||
umount /tmp/recovery
|
||||
;;
|
||||
bananapi,bpi-r2)
|
||||
local diskdev partdev diff
|
||||
|
||||
export_bootdevice && export_partdevice diskdev -2 || {
|
||||
echo "Unable to determine upgrade device"
|
||||
return 1
|
||||
}
|
||||
|
||||
sync
|
||||
|
||||
if [ "$SAVE_PARTITIONS" = "1" ]; then
|
||||
get_partitions "/dev/$diskdev" bootdisk
|
||||
|
||||
#extract the boot sector from the image
|
||||
get_image "$@" | dd of=/tmp/image.bs count=1 bs=512b
|
||||
|
||||
get_partitions /tmp/image.bs image
|
||||
|
||||
#compare tables
|
||||
diff="$(grep -F -x -v -f /tmp/partmap.bootdisk /tmp/partmap.image)"
|
||||
else
|
||||
diff=1
|
||||
fi
|
||||
|
||||
if [ -n "$diff" ]; then
|
||||
get_image "$@" | dd of="/dev/$diskdev" bs=4096 conv=fsync
|
||||
|
||||
# Separate removal and addtion is necessary; otherwise, partition 1
|
||||
# will be missing if it overlaps with the old partition 2
|
||||
partx -d - "/dev/$diskdev"
|
||||
partx -a - "/dev/$diskdev"
|
||||
|
||||
return 0
|
||||
fi
|
||||
|
||||
#write uboot image
|
||||
get_image "$@" | dd of="$diskdev" bs=1024 skip=320 seek=320 count=700 conv=fsync
|
||||
#iterate over each partition from the image and write it to the boot disk
|
||||
while read part start size; do
|
||||
part="$(($part - 2))"
|
||||
if export_partdevice partdev $part; then
|
||||
echo "Writing image to /dev/$partdev..."
|
||||
get_image "$@" | dd of="/dev/$partdev" ibs="512" obs=1M skip="$start" count="$size" conv=fsync
|
||||
else
|
||||
echo "Unable to find partition $part device, skipped."
|
||||
fi
|
||||
done < /tmp/partmap.image
|
||||
|
||||
#copy partition uuid
|
||||
echo "Writing new UUID to /dev/$diskdev..."
|
||||
get_image "$@" | dd of="/dev/$diskdev" bs=1 skip=440 count=4 seek=440 conv=fsync
|
||||
;;
|
||||
*)
|
||||
default_do_upgrade "$1"
|
||||
;;
|
||||
esac
|
||||
}
|
||||
|
||||
PART_NAME=firmware
|
||||
|
||||
platform_check_image() {
|
||||
local board=$(board_name)
|
||||
local magic="$(get_magic_long "$1")"
|
||||
|
||||
[ "$#" -gt 1 ] && return 1
|
||||
|
||||
case "$board" in
|
||||
unielec,u7623-02-emmc-512m)
|
||||
[ "$magic" != "27051956" ] && {
|
||||
echo "Invalid image type."
|
||||
return 1
|
||||
}
|
||||
return 0
|
||||
;;
|
||||
bananapi,bpi-r2)
|
||||
local diskdev partdev diff
|
||||
|
||||
export_bootdevice && export_partdevice diskdev -2 || {
|
||||
echo "Unable to determine upgrade device"
|
||||
return 1
|
||||
}
|
||||
|
||||
get_partitions "/dev/$diskdev" bootdisk
|
||||
|
||||
#extract the boot sector from the image
|
||||
get_image "$@" | dd of=/tmp/image.bs count=1 bs=512b 2>/dev/null
|
||||
|
||||
get_partitions /tmp/image.bs image
|
||||
|
||||
#compare tables
|
||||
diff="$(grep -F -x -v -f /tmp/partmap.bootdisk /tmp/partmap.image)"
|
||||
|
||||
rm -f /tmp/image.bs /tmp/partmap.bootdisk /tmp/partmap.image
|
||||
|
||||
if [ -n "$diff" ]; then
|
||||
echo "Partition layout has changed. Full image will be written."
|
||||
ask_bool 0 "Abort" && exit 1
|
||||
return 0
|
||||
fi
|
||||
;;
|
||||
*)
|
||||
echo "Sysupgrade is not supported on your board yet."
|
||||
return 1
|
||||
;;
|
||||
esac
|
||||
|
||||
return 0
|
||||
}
|
||||
|
||||
platform_copy_config_emmc() {
|
||||
mkdir -p /recovery
|
||||
mount -o rw,noatime /dev/mmcblk0p1 /recovery
|
||||
cp -af "$UPGRADE_BACKUP" "/recovery/$BACKUP_FILE"
|
||||
sync
|
||||
umount /recovery
|
||||
}
|
||||
|
||||
platform_copy_config() {
|
||||
case "$(board_name)" in
|
||||
unielec,u7623-02-emmc-512m)
|
||||
platform_copy_config_emmc
|
||||
;;
|
||||
bananapi,bpi-r2)
|
||||
local partdev
|
||||
|
||||
if export_partdevice partdev -1; then
|
||||
mount -t vfat -o rw,noatime "/dev/$partdev" /mnt
|
||||
cp -af "$CONF_TAR" /mnt/
|
||||
umount /mnt
|
||||
fi
|
||||
;;
|
||||
esac
|
||||
}
|
||||
570
root/target/linux/mediatek/mt7623/config-4.14
Executable file
570
root/target/linux/mediatek/mt7623/config-4.14
Executable file
|
|
@ -0,0 +1,570 @@
|
|||
# CONFIG_AIO is not set
|
||||
CONFIG_ALIGNMENT_TRAP=y
|
||||
CONFIG_ARCH_CLOCKSOURCE_DATA=y
|
||||
CONFIG_ARCH_HAS_DEBUG_VIRTUAL=y
|
||||
CONFIG_ARCH_HAS_ELF_RANDOMIZE=y
|
||||
CONFIG_ARCH_HAS_GCOV_PROFILE_ALL=y
|
||||
CONFIG_ARCH_HAS_SET_MEMORY=y
|
||||
CONFIG_ARCH_HAS_SG_CHAIN=y
|
||||
CONFIG_ARCH_HAS_STRICT_KERNEL_RWX=y
|
||||
CONFIG_ARCH_HAS_STRICT_MODULE_RWX=y
|
||||
CONFIG_ARCH_HAS_TICK_BROADCAST=y
|
||||
CONFIG_ARCH_HAVE_CUSTOM_GPIO_H=y
|
||||
CONFIG_ARCH_HIBERNATION_POSSIBLE=y
|
||||
CONFIG_ARCH_MEDIATEK=y
|
||||
CONFIG_ARCH_MIGHT_HAVE_PC_PARPORT=y
|
||||
CONFIG_ARCH_MULTIPLATFORM=y
|
||||
# CONFIG_ARCH_MULTI_CPU_AUTO is not set
|
||||
CONFIG_ARCH_MULTI_V6_V7=y
|
||||
CONFIG_ARCH_MULTI_V7=y
|
||||
CONFIG_ARCH_NR_GPIO=0
|
||||
CONFIG_ARCH_OPTIONAL_KERNEL_RWX=y
|
||||
CONFIG_ARCH_OPTIONAL_KERNEL_RWX_DEFAULT=y
|
||||
# CONFIG_ARCH_SELECT_MEMORY_MODEL is not set
|
||||
# CONFIG_ARCH_SPARSEMEM_DEFAULT is not set
|
||||
CONFIG_ARCH_SUPPORTS_ATOMIC_RMW=y
|
||||
CONFIG_ARCH_SUPPORTS_UPROBES=y
|
||||
CONFIG_ARCH_SUSPEND_POSSIBLE=y
|
||||
CONFIG_ARCH_USE_BUILTIN_BSWAP=y
|
||||
CONFIG_ARCH_USE_CMPXCHG_LOCKREF=y
|
||||
# CONFIG_ARCH_WANTS_THP_SWAP is not set
|
||||
CONFIG_ARCH_WANT_GENERAL_HUGETLB=y
|
||||
CONFIG_ARCH_WANT_IPC_PARSE_VERSION=y
|
||||
CONFIG_ARM=y
|
||||
CONFIG_ARM_APPENDED_DTB=y
|
||||
CONFIG_ARM_ARCH_TIMER=y
|
||||
CONFIG_ARM_ARCH_TIMER_EVTSTREAM=y
|
||||
CONFIG_ARM_ATAG_DTB_COMPAT=y
|
||||
CONFIG_ARM_ATAG_DTB_COMPAT_CMDLINE_EXTEND=y
|
||||
# CONFIG_ARM_ATAG_DTB_COMPAT_CMDLINE_FROM_BOOTLOADER is not set
|
||||
CONFIG_ARM_CPU_SUSPEND=y
|
||||
# CONFIG_ARM_CPU_TOPOLOGY is not set
|
||||
CONFIG_ARM_GIC=y
|
||||
CONFIG_ARM_HAS_SG_CHAIN=y
|
||||
CONFIG_ARM_L1_CACHE_SHIFT=6
|
||||
CONFIG_ARM_L1_CACHE_SHIFT_6=y
|
||||
# CONFIG_ARM_LPAE is not set
|
||||
CONFIG_ARM_MEDIATEK_CPUFREQ=y
|
||||
CONFIG_ARM_PATCH_IDIV=y
|
||||
CONFIG_ARM_PATCH_PHYS_VIRT=y
|
||||
# CONFIG_ARM_SMMU is not set
|
||||
CONFIG_ARM_THUMB=y
|
||||
CONFIG_ARM_THUMBEE=y
|
||||
CONFIG_ARM_UNWIND=y
|
||||
CONFIG_ARM_VIRT_EXT=y
|
||||
CONFIG_ATAGS=y
|
||||
CONFIG_ATAGS_PROC=y
|
||||
CONFIG_AUTO_ZRELADDR=y
|
||||
CONFIG_BLK_DEV_LOOP=y
|
||||
CONFIG_BLK_MQ_PCI=y
|
||||
CONFIG_BOUNCE=y
|
||||
# CONFIG_CACHE_L2X0 is not set
|
||||
CONFIG_CC_STACKPROTECTOR=y
|
||||
# CONFIG_CC_STACKPROTECTOR_NONE is not set
|
||||
CONFIG_CC_STACKPROTECTOR_REGULAR=y
|
||||
CONFIG_CFG80211=m
|
||||
CONFIG_CFG80211_CRDA_SUPPORT=y
|
||||
# CONFIG_CFG80211_DEBUGFS is not set
|
||||
CONFIG_CFG80211_DEFAULT_PS=y
|
||||
# CONFIG_CFG80211_DEVELOPER_WARNINGS is not set
|
||||
# CONFIG_CFG80211_INTERNAL_REGDB is not set
|
||||
# CONFIG_CFG80211_WEXT is not set
|
||||
CONFIG_CLEANCACHE=y
|
||||
CONFIG_CLKDEV_LOOKUP=y
|
||||
CONFIG_CLKSRC_MMIO=y
|
||||
CONFIG_CLONE_BACKWARDS=y
|
||||
CONFIG_CMDLINE="earlyprintk console=ttyS0,115200 vmalloc=256M"
|
||||
CONFIG_CMDLINE_EXTEND=y
|
||||
CONFIG_COMMON_CLK=y
|
||||
CONFIG_COMMON_CLK_MEDIATEK=y
|
||||
CONFIG_COMMON_CLK_MT2701=y
|
||||
CONFIG_COMMON_CLK_MT2701_BDPSYS=y
|
||||
CONFIG_COMMON_CLK_MT2701_ETHSYS=y
|
||||
CONFIG_COMMON_CLK_MT2701_HIFSYS=y
|
||||
CONFIG_COMMON_CLK_MT2701_IMGSYS=y
|
||||
CONFIG_COMMON_CLK_MT2701_MMSYS=y
|
||||
CONFIG_COMMON_CLK_MT2701_VDECSYS=y
|
||||
# CONFIG_COMMON_CLK_MT7622 is not set
|
||||
# CONFIG_COMMON_CLK_MT8135 is not set
|
||||
# CONFIG_COMMON_CLK_MT8173 is not set
|
||||
CONFIG_COMPACTION=y
|
||||
CONFIG_COREDUMP=y
|
||||
# CONFIG_CPUFREQ_DT is not set
|
||||
CONFIG_CPU_32v6K=y
|
||||
CONFIG_CPU_32v7=y
|
||||
CONFIG_CPU_ABRT_EV7=y
|
||||
# CONFIG_CPU_BPREDICT_DISABLE is not set
|
||||
CONFIG_CPU_CACHE_V7=y
|
||||
CONFIG_CPU_CACHE_VIPT=y
|
||||
CONFIG_CPU_COPY_V6=y
|
||||
CONFIG_CPU_CP15=y
|
||||
CONFIG_CPU_CP15_MMU=y
|
||||
CONFIG_CPU_FREQ=y
|
||||
CONFIG_CPU_FREQ_DEFAULT_GOV_PERFORMANCE=y
|
||||
CONFIG_CPU_FREQ_GOV_ATTR_SET=y
|
||||
CONFIG_CPU_FREQ_GOV_COMMON=y
|
||||
CONFIG_CPU_FREQ_GOV_CONSERVATIVE=y
|
||||
CONFIG_CPU_FREQ_GOV_ONDEMAND=y
|
||||
CONFIG_CPU_FREQ_GOV_PERFORMANCE=y
|
||||
CONFIG_CPU_FREQ_GOV_POWERSAVE=y
|
||||
# CONFIG_CPU_FREQ_GOV_USERSPACE is not set
|
||||
CONFIG_CPU_FREQ_STAT=y
|
||||
CONFIG_CPU_HAS_ASID=y
|
||||
# CONFIG_CPU_HOTPLUG_STATE_CONTROL is not set
|
||||
# CONFIG_CPU_ICACHE_DISABLE is not set
|
||||
CONFIG_CPU_PABRT_V7=y
|
||||
CONFIG_CPU_PM=y
|
||||
CONFIG_CPU_RMAP=y
|
||||
# CONFIG_CPU_THERMAL is not set
|
||||
CONFIG_CPU_THUMB_CAPABLE=y
|
||||
CONFIG_CPU_TLB_V7=y
|
||||
CONFIG_CPU_V7=y
|
||||
CONFIG_CRASH_CORE=y
|
||||
CONFIG_CRC16=y
|
||||
# CONFIG_CRC32_SARWATE is not set
|
||||
CONFIG_CRC32_SLICEBY8=y
|
||||
CONFIG_CROSS_MEMORY_ATTACH=y
|
||||
CONFIG_CRYPTO_ACOMP2=y
|
||||
CONFIG_CRYPTO_AEAD=y
|
||||
CONFIG_CRYPTO_AEAD2=y
|
||||
CONFIG_CRYPTO_CRC32=y
|
||||
CONFIG_CRYPTO_CRC32C=y
|
||||
CONFIG_CRYPTO_CTR=y
|
||||
CONFIG_CRYPTO_DEFLATE=y
|
||||
CONFIG_CRYPTO_DEV_MEDIATEK=y
|
||||
CONFIG_CRYPTO_DRBG=y
|
||||
CONFIG_CRYPTO_DRBG_HMAC=y
|
||||
CONFIG_CRYPTO_DRBG_MENU=y
|
||||
CONFIG_CRYPTO_HASH=y
|
||||
CONFIG_CRYPTO_HASH2=y
|
||||
CONFIG_CRYPTO_HMAC=y
|
||||
CONFIG_CRYPTO_HW=y
|
||||
CONFIG_CRYPTO_JITTERENTROPY=y
|
||||
CONFIG_CRYPTO_LZO=y
|
||||
CONFIG_CRYPTO_MANAGER=y
|
||||
CONFIG_CRYPTO_MANAGER2=y
|
||||
CONFIG_CRYPTO_NULL=y
|
||||
CONFIG_CRYPTO_NULL2=y
|
||||
CONFIG_CRYPTO_RNG=y
|
||||
CONFIG_CRYPTO_RNG2=y
|
||||
CONFIG_CRYPTO_RNG_DEFAULT=y
|
||||
CONFIG_CRYPTO_SEQIV=y
|
||||
CONFIG_CRYPTO_SHA1=y
|
||||
CONFIG_CRYPTO_SHA256=y
|
||||
CONFIG_CRYPTO_SHA512=y
|
||||
CONFIG_CRYPTO_WORKQUEUE=y
|
||||
CONFIG_DCACHE_WORD_ACCESS=y
|
||||
CONFIG_DEBUG_ALIGN_RODATA=y
|
||||
CONFIG_DEBUG_BUGVERBOSE=y
|
||||
CONFIG_DEBUG_GPIO=y
|
||||
CONFIG_DEBUG_INFO=y
|
||||
CONFIG_DEBUG_LL=y
|
||||
CONFIG_DEBUG_LL_INCLUDE="debug/8250.S"
|
||||
CONFIG_DEBUG_MT6589_UART0=y
|
||||
# CONFIG_DEBUG_MT8127_UART0 is not set
|
||||
# CONFIG_DEBUG_MT8135_UART3 is not set
|
||||
CONFIG_DEBUG_PREEMPT=y
|
||||
CONFIG_DEBUG_UART_8250=y
|
||||
# CONFIG_DEBUG_UART_8250_FLOW_CONTROL is not set
|
||||
CONFIG_DEBUG_UART_8250_SHIFT=2
|
||||
# CONFIG_DEBUG_UART_8250_WORD is not set
|
||||
CONFIG_DEBUG_UART_PHYS=0x11004000
|
||||
CONFIG_DEBUG_UART_VIRT=0xf1004000
|
||||
CONFIG_DEBUG_UNCOMPRESS=y
|
||||
# CONFIG_DEBUG_USER is not set
|
||||
CONFIG_DEFAULT_DUMMY=y
|
||||
CONFIG_DEFAULT_SCHEDULER=y
|
||||
CONFIG_DMADEVICES=y
|
||||
CONFIG_DMA_ENGINE=y
|
||||
# CONFIG_DMA_NOOP_OPS is not set
|
||||
CONFIG_DMA_OF=y
|
||||
# CONFIG_DMA_VIRT_OPS is not set
|
||||
# CONFIG_DRM_LIB_RANDOM is not set
|
||||
CONFIG_DTC=y
|
||||
CONFIG_EARLY_PRINTK=y
|
||||
CONFIG_EDAC_ATOMIC_SCRUB=y
|
||||
CONFIG_EDAC_SUPPORT=y
|
||||
CONFIG_ELF_CORE=y
|
||||
CONFIG_EXPORTFS=y
|
||||
CONFIG_EXT4_FS=y
|
||||
# CONFIG_F2FS_CHECK_FS is not set
|
||||
CONFIG_F2FS_FS=y
|
||||
# CONFIG_F2FS_FS_SECURITY is not set
|
||||
CONFIG_F2FS_FS_XATTR=y
|
||||
CONFIG_F2FS_STAT_FS=y
|
||||
CONFIG_FIXED_PHY=y
|
||||
CONFIG_FIX_EARLYCON_MEM=y
|
||||
CONFIG_FREEZER=y
|
||||
CONFIG_FS_MBCACHE=y
|
||||
CONFIG_FUTEX_PI=y
|
||||
CONFIG_GENERIC_ALLOCATOR=y
|
||||
CONFIG_GENERIC_BUG=y
|
||||
CONFIG_GENERIC_CLOCKEVENTS=y
|
||||
CONFIG_GENERIC_CLOCKEVENTS_BROADCAST=y
|
||||
CONFIG_GENERIC_CPU_AUTOPROBE=y
|
||||
CONFIG_GENERIC_EARLY_IOREMAP=y
|
||||
CONFIG_GENERIC_IDLE_POLL_SETUP=y
|
||||
CONFIG_GENERIC_IO=y
|
||||
CONFIG_GENERIC_IRQ_EFFECTIVE_AFF_MASK=y
|
||||
CONFIG_GENERIC_IRQ_SHOW=y
|
||||
CONFIG_GENERIC_IRQ_SHOW_LEVEL=y
|
||||
CONFIG_GENERIC_MSI_IRQ=y
|
||||
CONFIG_GENERIC_MSI_IRQ_DOMAIN=y
|
||||
CONFIG_GENERIC_PCI_IOMAP=y
|
||||
CONFIG_GENERIC_PHY=y
|
||||
CONFIG_GENERIC_PINCONF=y
|
||||
CONFIG_GENERIC_PINCTRL_GROUPS=y
|
||||
CONFIG_GENERIC_PINMUX_FUNCTIONS=y
|
||||
CONFIG_GENERIC_SCHED_CLOCK=y
|
||||
CONFIG_GENERIC_SMP_IDLE_THREAD=y
|
||||
CONFIG_GENERIC_STRNCPY_FROM_USER=y
|
||||
CONFIG_GENERIC_STRNLEN_USER=y
|
||||
CONFIG_GPIOLIB=y
|
||||
CONFIG_GPIO_SYSFS=y
|
||||
# CONFIG_GPS is not set
|
||||
# CONFIG_GRO_CELLS is not set
|
||||
CONFIG_HANDLE_DOMAIN_IRQ=y
|
||||
CONFIG_HARDIRQS_SW_RESEND=y
|
||||
CONFIG_HAS_DMA=y
|
||||
CONFIG_HAS_IOMEM=y
|
||||
CONFIG_HAS_IOPORT_MAP=y
|
||||
# CONFIG_HAVE_64BIT_ALIGNED_ACCESS is not set
|
||||
CONFIG_HAVE_ARCH_AUDITSYSCALL=y
|
||||
CONFIG_HAVE_ARCH_BITREVERSE=y
|
||||
CONFIG_HAVE_ARCH_JUMP_LABEL=y
|
||||
CONFIG_HAVE_ARCH_KGDB=y
|
||||
CONFIG_HAVE_ARCH_PFN_VALID=y
|
||||
CONFIG_HAVE_ARCH_SECCOMP_FILTER=y
|
||||
CONFIG_HAVE_ARCH_TRACEHOOK=y
|
||||
CONFIG_HAVE_ARM_ARCH_TIMER=y
|
||||
CONFIG_HAVE_ARM_SMCCC=y
|
||||
# CONFIG_HAVE_BOOTMEM_INFO_NODE is not set
|
||||
CONFIG_HAVE_CC_STACKPROTECTOR=y
|
||||
CONFIG_HAVE_CLK=y
|
||||
CONFIG_HAVE_CLK_PREPARE=y
|
||||
CONFIG_HAVE_CONTEXT_TRACKING=y
|
||||
CONFIG_HAVE_C_RECORDMCOUNT=y
|
||||
CONFIG_HAVE_DEBUG_KMEMLEAK=y
|
||||
CONFIG_HAVE_DMA_API_DEBUG=y
|
||||
CONFIG_HAVE_DMA_CONTIGUOUS=y
|
||||
CONFIG_HAVE_DYNAMIC_FTRACE=y
|
||||
CONFIG_HAVE_DYNAMIC_FTRACE_WITH_REGS=y
|
||||
CONFIG_HAVE_EBPF_JIT=y
|
||||
CONFIG_HAVE_EFFICIENT_UNALIGNED_ACCESS=y
|
||||
CONFIG_HAVE_FTRACE_MCOUNT_RECORD=y
|
||||
CONFIG_HAVE_FUNCTION_GRAPH_TRACER=y
|
||||
CONFIG_HAVE_FUNCTION_TRACER=y
|
||||
CONFIG_HAVE_GENERIC_DMA_COHERENT=y
|
||||
CONFIG_HAVE_IDE=y
|
||||
CONFIG_HAVE_IRQ_TIME_ACCOUNTING=y
|
||||
CONFIG_HAVE_MEMBLOCK=y
|
||||
CONFIG_HAVE_MOD_ARCH_SPECIFIC=y
|
||||
CONFIG_HAVE_NET_DSA=y
|
||||
CONFIG_HAVE_OPROFILE=y
|
||||
CONFIG_HAVE_OPTPROBES=y
|
||||
CONFIG_HAVE_PERF_EVENTS=y
|
||||
CONFIG_HAVE_PERF_REGS=y
|
||||
CONFIG_HAVE_PERF_USER_STACK_DUMP=y
|
||||
CONFIG_HAVE_PROC_CPU=y
|
||||
CONFIG_HAVE_REGS_AND_STACK_ACCESS_API=y
|
||||
CONFIG_HAVE_SMP=y
|
||||
CONFIG_HAVE_SYSCALL_TRACEPOINTS=y
|
||||
CONFIG_HAVE_UID16=y
|
||||
CONFIG_HAVE_VIRT_CPU_ACCOUNTING_GEN=y
|
||||
# CONFIG_HIGHMEM is not set
|
||||
# CONFIG_HIGHPTE is not set
|
||||
CONFIG_HOTPLUG_CPU=y
|
||||
CONFIG_HWMON=y
|
||||
CONFIG_HW_RANDOM=y
|
||||
CONFIG_HW_RANDOM_MTK=y
|
||||
CONFIG_HZ_FIXED=0
|
||||
CONFIG_HZ_PERIODIC=y
|
||||
CONFIG_I2C=y
|
||||
CONFIG_I2C_BOARDINFO=y
|
||||
CONFIG_I2C_CHARDEV=y
|
||||
CONFIG_I2C_MT65XX=y
|
||||
CONFIG_ICPLUS_PHY=y
|
||||
CONFIG_IIO=y
|
||||
# CONFIG_IIO_BUFFER is not set
|
||||
# CONFIG_IIO_TRIGGER is not set
|
||||
CONFIG_INITRAMFS_COMPRESSION=""
|
||||
# CONFIG_INITRAMFS_FORCE is not set
|
||||
CONFIG_INITRAMFS_ROOT_GID=1000
|
||||
CONFIG_INITRAMFS_ROOT_UID=1000
|
||||
CONFIG_INITRAMFS_SOURCE="/openwrt/trunk/build_dir/target-arm_cortex-a7_musl-1.1.14_eabi/root-mediatek /openwrt/trunk/target/linux/generic/image/initramfs-base-files.txt"
|
||||
CONFIG_IOMMU_HELPER=y
|
||||
# CONFIG_IOMMU_IO_PGTABLE_ARMV7S is not set
|
||||
# CONFIG_IOMMU_IO_PGTABLE_LPAE is not set
|
||||
CONFIG_IOMMU_SUPPORT=y
|
||||
CONFIG_IRQCHIP=y
|
||||
CONFIG_IRQ_DOMAIN=y
|
||||
CONFIG_IRQ_DOMAIN_HIERARCHY=y
|
||||
CONFIG_IRQ_FORCED_THREADING=y
|
||||
CONFIG_IRQ_WORK=y
|
||||
CONFIG_JBD2=y
|
||||
CONFIG_KALLSYMS=y
|
||||
CONFIG_KEXEC=y
|
||||
CONFIG_KEXEC_CORE=y
|
||||
CONFIG_LDISC_AUTOLOAD=y
|
||||
CONFIG_LEDS_MT6323=y
|
||||
CONFIG_LIBFDT=y
|
||||
CONFIG_LOCK_SPIN_ON_OWNER=y
|
||||
CONFIG_LZO_COMPRESS=y
|
||||
CONFIG_LZO_DECOMPRESS=y
|
||||
# CONFIG_MACH_MT2701 is not set
|
||||
# CONFIG_MACH_MT6589 is not set
|
||||
# CONFIG_MACH_MT6592 is not set
|
||||
CONFIG_MACH_MT7623=y
|
||||
# CONFIG_MACH_MT8127 is not set
|
||||
# CONFIG_MACH_MT8135 is not set
|
||||
CONFIG_MAGIC_SYSRQ=y
|
||||
CONFIG_MDIO_BITBANG=y
|
||||
CONFIG_MDIO_BUS=y
|
||||
CONFIG_MDIO_DEVICE=y
|
||||
CONFIG_MDIO_GPIO=y
|
||||
CONFIG_MEDIATEK_MT6577_AUXADC=y
|
||||
CONFIG_MEDIATEK_WATCHDOG=y
|
||||
CONFIG_MFD_CORE=y
|
||||
CONFIG_MFD_MT6397=y
|
||||
CONFIG_MFD_SYSCON=y
|
||||
CONFIG_MIGHT_HAVE_CACHE_L2X0=y
|
||||
CONFIG_MIGHT_HAVE_PCI=y
|
||||
CONFIG_MIGRATION=y
|
||||
CONFIG_MMC=y
|
||||
CONFIG_MMC_BLOCK=y
|
||||
CONFIG_MMC_MTK=y
|
||||
CONFIG_MMC_SDHCI=y
|
||||
# CONFIG_MMC_SDHCI_PCI is not set
|
||||
CONFIG_MMC_SDHCI_PLTFM=y
|
||||
# CONFIG_MMC_TIFM_SD is not set
|
||||
CONFIG_MODULES_USE_ELF_REL=y
|
||||
# CONFIG_MPTCP_BINDER is not set
|
||||
# CONFIG_MPTCP_FULLMESH is not set
|
||||
# CONFIG_MPTCP_NDIFFPORTS is not set
|
||||
# CONFIG_MPTCP_REDUNDANT is not set
|
||||
# CONFIG_MPTCP_ROUNDROBIN is not set
|
||||
CONFIG_MTD_BLOCK2MTD=y
|
||||
CONFIG_MTD_CMDLINE_PARTS=y
|
||||
CONFIG_MTD_M25P80=y
|
||||
CONFIG_MTD_MT81xx_NOR=y
|
||||
CONFIG_MTD_NAND=y
|
||||
CONFIG_MTD_NAND_ECC=y
|
||||
CONFIG_MTD_NAND_MTK=y
|
||||
CONFIG_MTD_SPI_NOR=y
|
||||
CONFIG_MTD_SPLIT_FIRMWARE=y
|
||||
CONFIG_MTD_SPLIT_UIMAGE_FW=y
|
||||
CONFIG_MTD_UBI=y
|
||||
CONFIG_MTD_UBI_BEB_LIMIT=20
|
||||
CONFIG_MTD_UBI_BLOCK=y
|
||||
# CONFIG_MTD_UBI_FASTMAP is not set
|
||||
# CONFIG_MTD_UBI_GLUEBI is not set
|
||||
CONFIG_MTD_UBI_WL_THRESHOLD=4096
|
||||
CONFIG_MTK_BTIF=y
|
||||
CONFIG_MTK_COMBO=y
|
||||
# CONFIG_MTK_COMBO_BT is not set
|
||||
CONFIG_MTK_COMBO_CHIP="CONSYS_7623"
|
||||
# CONFIG_MTK_COMBO_CHIP_CONSYS_6572 is not set
|
||||
# CONFIG_MTK_COMBO_CHIP_CONSYS_6580 is not set
|
||||
# CONFIG_MTK_COMBO_CHIP_CONSYS_6582 is not set
|
||||
# CONFIG_MTK_COMBO_CHIP_CONSYS_6592 is not set
|
||||
# CONFIG_MTK_COMBO_CHIP_CONSYS_6735 is not set
|
||||
# CONFIG_MTK_COMBO_CHIP_CONSYS_6752 is not set
|
||||
# CONFIG_MTK_COMBO_CHIP_CONSYS_6755 is not set
|
||||
# CONFIG_MTK_COMBO_CHIP_CONSYS_6797 is not set
|
||||
CONFIG_MTK_COMBO_CHIP_CONSYS_7623=y
|
||||
# CONFIG_MTK_COMBO_CHIP_CONSYS_8127 is not set
|
||||
# CONFIG_MTK_COMBO_CHIP_CONSYS_8163 is not set
|
||||
# CONFIG_MTK_COMBO_CHIP_MT6620 is not set
|
||||
# CONFIG_MTK_COMBO_CHIP_MT6628 is not set
|
||||
# CONFIG_MTK_COMBO_CHIP_MT6630 is not set
|
||||
# CONFIG_MTK_COMBO_COMM is not set
|
||||
# CONFIG_MTK_COMBO_BT_HCI is not set
|
||||
CONFIG_MTK_COMBO_PLAT_PATH=""
|
||||
CONFIG_MTK_COMBO_WIFI=m
|
||||
# CONFIG_MTK_CONN_LTE_IDC_SUPPORT is not set
|
||||
CONFIG_MTK_DHCPV6C_WIFI=y
|
||||
CONFIG_MTK_EFUSE=y
|
||||
# CONFIG_MTK_GPS_SUPPORT is not set
|
||||
# CONFIG_MTK_HSDMA is not set
|
||||
CONFIG_MTK_INFRACFG=y
|
||||
# CONFIG_MTK_IOMMU is not set
|
||||
# CONFIG_MTK_IOMMU_V1 is not set
|
||||
CONFIG_MTK_PASSPOINT_R1_SUPPORT=y
|
||||
CONFIG_MTK_PASSPOINT_R2_SUPPORT=y
|
||||
CONFIG_MTK_PLATFORM="mt7623"
|
||||
CONFIG_MTK_PMIC_WRAP=y
|
||||
CONFIG_MTK_SCPSYS=y
|
||||
CONFIG_MTK_THERMAL=y
|
||||
CONFIG_MTK_TIMER=y
|
||||
CONFIG_MTK_WAPI_SUPPORT=y
|
||||
CONFIG_MTK_WIFI_MCC_SUPPORT=y
|
||||
CONFIG_MULTI_IRQ_HANDLER=y
|
||||
CONFIG_MUTEX_SPIN_ON_OWNER=y
|
||||
CONFIG_NEED_DMA_MAP_STATE=y
|
||||
CONFIG_NEON=y
|
||||
CONFIG_NET_DSA=y
|
||||
CONFIG_NET_DSA_MT7530=y
|
||||
# CONFIG_NET_DSA_SMSC_LAN9303_I2C is not set
|
||||
CONFIG_NET_DSA_TAG_MTK=y
|
||||
CONFIG_NET_FLOW_LIMIT=y
|
||||
CONFIG_NET_MEDIATEK_HNAT=y
|
||||
CONFIG_NET_MEDIATEK_SOC=y
|
||||
CONFIG_NET_SWITCHDEV=y
|
||||
# CONFIG_NET_VENDOR_AURORA is not set
|
||||
CONFIG_NET_VENDOR_MEDIATEK=y
|
||||
# CONFIG_NET_VENDOR_WIZNET is not set
|
||||
CONFIG_NL80211_TESTMODE=y
|
||||
CONFIG_NLS=y
|
||||
CONFIG_NO_BOOTMEM=y
|
||||
CONFIG_NR_CPUS=4
|
||||
CONFIG_NVMEM=y
|
||||
CONFIG_OF=y
|
||||
CONFIG_OF_ADDRESS=y
|
||||
CONFIG_OF_ADDRESS_PCI=y
|
||||
CONFIG_OF_EARLY_FLATTREE=y
|
||||
CONFIG_OF_FLATTREE=y
|
||||
CONFIG_OF_GPIO=y
|
||||
CONFIG_OF_IRQ=y
|
||||
CONFIG_OF_MDIO=y
|
||||
CONFIG_OF_NET=y
|
||||
CONFIG_OF_PCI=y
|
||||
CONFIG_OF_PCI_IRQ=y
|
||||
CONFIG_OF_RESERVED_MEM=y
|
||||
CONFIG_OLD_SIGACTION=y
|
||||
CONFIG_OLD_SIGSUSPEND3=y
|
||||
CONFIG_PADATA=y
|
||||
CONFIG_PAGE_OFFSET=0xC0000000
|
||||
CONFIG_PCI=y
|
||||
CONFIG_PCIEAER=y
|
||||
CONFIG_PCIEPORTBUS=y
|
||||
CONFIG_PCIE_MEDIATEK=y
|
||||
CONFIG_PCIE_PME=y
|
||||
CONFIG_PCI_DOMAINS=y
|
||||
CONFIG_PCI_DOMAINS_GENERIC=y
|
||||
CONFIG_PCI_MSI=y
|
||||
CONFIG_PCI_MSI_IRQ_DOMAIN=y
|
||||
CONFIG_PERF_USE_VMALLOC=y
|
||||
CONFIG_PGTABLE_LEVELS=2
|
||||
CONFIG_PGTABLE_MAPPING=y
|
||||
CONFIG_PHYLIB=y
|
||||
CONFIG_PHY_MTK_TPHY=y
|
||||
CONFIG_PINCTRL=y
|
||||
CONFIG_PINCTRL_MT2701=y
|
||||
CONFIG_PINCTRL_MT6397=y
|
||||
CONFIG_PINCTRL_MTK=y
|
||||
CONFIG_PM=y
|
||||
CONFIG_PM_CLK=y
|
||||
# CONFIG_PM_DEBUG is not set
|
||||
CONFIG_PM_GENERIC_DOMAINS=y
|
||||
CONFIG_PM_GENERIC_DOMAINS_OF=y
|
||||
CONFIG_PM_GENERIC_DOMAINS_SLEEP=y
|
||||
CONFIG_PM_OPP=y
|
||||
CONFIG_PM_SLEEP=y
|
||||
CONFIG_PM_SLEEP_SMP=y
|
||||
CONFIG_POWER_RESET=y
|
||||
CONFIG_POWER_SUPPLY=y
|
||||
CONFIG_PREEMPT=y
|
||||
CONFIG_PREEMPT_COUNT=y
|
||||
# CONFIG_PREEMPT_NONE is not set
|
||||
CONFIG_PREEMPT_RCU=y
|
||||
CONFIG_PRINTK_TIME=y
|
||||
CONFIG_PWM=y
|
||||
CONFIG_PWM_MEDIATEK=y
|
||||
# CONFIG_PWM_MTK_DISP is not set
|
||||
CONFIG_PWM_SYSFS=y
|
||||
CONFIG_RAS=y
|
||||
CONFIG_RATIONAL=y
|
||||
CONFIG_RCU_CPU_STALL_TIMEOUT=21
|
||||
# CONFIG_RCU_EXPERT is not set
|
||||
CONFIG_RCU_NEED_SEGCBLIST=y
|
||||
CONFIG_RCU_STALL_COMMON=y
|
||||
CONFIG_REGMAP=y
|
||||
CONFIG_REGMAP_I2C=y
|
||||
CONFIG_REGMAP_MMIO=y
|
||||
CONFIG_REGMAP_SPI=y
|
||||
CONFIG_REGULATOR=y
|
||||
CONFIG_REGULATOR_FIXED_VOLTAGE=y
|
||||
CONFIG_REGULATOR_GPIO=y
|
||||
CONFIG_REGULATOR_MT6323=y
|
||||
# CONFIG_REGULATOR_MT6380 is not set
|
||||
# CONFIG_REGULATOR_MT6397 is not set
|
||||
# CONFIG_REGULATOR_QCOM_SPMI is not set
|
||||
CONFIG_RESET_CONTROLLER=y
|
||||
CONFIG_RFS_ACCEL=y
|
||||
CONFIG_RPS=y
|
||||
CONFIG_RTC_CLASS=y
|
||||
# CONFIG_RTC_DRV_CMOS is not set
|
||||
# CONFIG_RTC_DRV_MT6397 is not set
|
||||
# CONFIG_RTC_DRV_MT7622 is not set
|
||||
CONFIG_RTC_I2C_AND_SPI=y
|
||||
# CONFIG_RTL8723BS is not set
|
||||
CONFIG_RWSEM_SPIN_ON_OWNER=y
|
||||
CONFIG_RWSEM_XCHGADD_ALGORITHM=y
|
||||
# CONFIG_SCHED_INFO is not set
|
||||
# CONFIG_SCSI_DMA is not set
|
||||
# CONFIG_SERIAL_8250_DMA is not set
|
||||
CONFIG_SERIAL_8250_FSL=y
|
||||
CONFIG_SERIAL_8250_MT6577=y
|
||||
CONFIG_SERIAL_8250_NR_UARTS=4
|
||||
CONFIG_SERIAL_8250_RUNTIME_UARTS=4
|
||||
CONFIG_SMP=y
|
||||
# CONFIG_SMP_ON_UP is not set
|
||||
CONFIG_SPARSE_IRQ=y
|
||||
CONFIG_SPI=y
|
||||
CONFIG_SPI_BITBANG=y
|
||||
CONFIG_SPI_MASTER=y
|
||||
CONFIG_SPI_MT65XX=y
|
||||
CONFIG_SPMI=y
|
||||
CONFIG_SRCU=y
|
||||
# CONFIG_STRIP_ASM_SYMS is not set
|
||||
CONFIG_SUSPEND=y
|
||||
CONFIG_SUSPEND_FREEZER=y
|
||||
CONFIG_SWCONFIG=y
|
||||
CONFIG_SWIOTLB=y
|
||||
CONFIG_SWPHY=y
|
||||
CONFIG_SWP_EMULATE=y
|
||||
CONFIG_SYS_SUPPORTS_APM_EMULATION=y
|
||||
CONFIG_TASKS_RCU=y
|
||||
CONFIG_THERMAL=y
|
||||
CONFIG_THERMAL_DEFAULT_GOV_STEP_WISE=y
|
||||
CONFIG_THERMAL_EMERGENCY_POWEROFF_DELAY_MS=0
|
||||
CONFIG_THERMAL_GOV_STEP_WISE=y
|
||||
CONFIG_THERMAL_OF=y
|
||||
CONFIG_THIN_ARCHIVES=y
|
||||
# CONFIG_THUMB2_KERNEL is not set
|
||||
CONFIG_TICK_CPU_ACCOUNTING=y
|
||||
CONFIG_TIMER_OF=y
|
||||
CONFIG_TIMER_PROBE=y
|
||||
CONFIG_TREE_SRCU=y
|
||||
CONFIG_UBIFS_FS=y
|
||||
# CONFIG_UBIFS_FS_ADVANCED_COMPR is not set
|
||||
CONFIG_UBIFS_FS_LZO=y
|
||||
CONFIG_UBIFS_FS_ZLIB=y
|
||||
CONFIG_UEVENT_HELPER_PATH=""
|
||||
CONFIG_UNCOMPRESS_INCLUDE="debug/uncompress.h"
|
||||
CONFIG_UNINLINE_SPIN_UNLOCK=y
|
||||
CONFIG_USB=y
|
||||
CONFIG_USB_COMMON=y
|
||||
# CONFIG_USB_EHCI_HCD is not set
|
||||
# CONFIG_USB_MTU3 is not set
|
||||
CONFIG_USB_SUPPORT=y
|
||||
CONFIG_USB_XHCI_HCD=y
|
||||
CONFIG_USB_XHCI_MTK=y
|
||||
CONFIG_USB_XHCI_PLATFORM=y
|
||||
CONFIG_USE_OF=y
|
||||
CONFIG_VECTORS_BASE=0xffff0000
|
||||
CONFIG_VFP=y
|
||||
CONFIG_VFPv3=y
|
||||
CONFIG_VM_EVENT_COUNTERS=y
|
||||
CONFIG_WATCHDOG_CORE=y
|
||||
# CONFIG_WILC1000_SDIO is not set
|
||||
# CONFIG_WILC1000_SPI is not set
|
||||
CONFIG_XPS=y
|
||||
CONFIG_XZ_DEC_ARM=y
|
||||
CONFIG_XZ_DEC_BCJ=y
|
||||
CONFIG_ZBOOT_ROM_BSS=0
|
||||
CONFIG_ZBOOT_ROM_TEXT=0
|
||||
CONFIG_ZLIB_DEFLATE=y
|
||||
CONFIG_ZLIB_INFLATE=y
|
||||
CONFIG_ZSMALLOC=y
|
||||
# CONFIG_ZSMALLOC_STAT is not set
|
||||
521
root/target/linux/mediatek/mt7623/config-4.19
Executable file
521
root/target/linux/mediatek/mt7623/config-4.19
Executable file
|
|
@ -0,0 +1,521 @@
|
|||
# CONFIG_AIO is not set
|
||||
CONFIG_ALIGNMENT_TRAP=y
|
||||
CONFIG_ARCH_CLOCKSOURCE_DATA=y
|
||||
CONFIG_ARCH_HAS_DEBUG_VIRTUAL=y
|
||||
CONFIG_ARCH_HAS_ELF_RANDOMIZE=y
|
||||
CONFIG_ARCH_HAS_FORTIFY_SOURCE=y
|
||||
CONFIG_ARCH_HAS_GCOV_PROFILE_ALL=y
|
||||
CONFIG_ARCH_HAS_KCOV=y
|
||||
CONFIG_ARCH_HAS_MEMBARRIER_SYNC_CORE=y
|
||||
CONFIG_ARCH_HAS_PHYS_TO_DMA=y
|
||||
CONFIG_ARCH_HAS_SET_MEMORY=y
|
||||
CONFIG_ARCH_HAS_SG_CHAIN=y
|
||||
CONFIG_ARCH_HAS_STRICT_KERNEL_RWX=y
|
||||
CONFIG_ARCH_HAS_STRICT_MODULE_RWX=y
|
||||
CONFIG_ARCH_HAS_TICK_BROADCAST=y
|
||||
CONFIG_ARCH_HAVE_CUSTOM_GPIO_H=y
|
||||
CONFIG_ARCH_HIBERNATION_POSSIBLE=y
|
||||
CONFIG_ARCH_MEDIATEK=y
|
||||
CONFIG_ARCH_MIGHT_HAVE_PC_PARPORT=y
|
||||
CONFIG_ARCH_MULTIPLATFORM=y
|
||||
CONFIG_ARCH_MULTI_V6_V7=y
|
||||
CONFIG_ARCH_MULTI_V7=y
|
||||
CONFIG_ARCH_NR_GPIO=0
|
||||
CONFIG_ARCH_OPTIONAL_KERNEL_RWX=y
|
||||
CONFIG_ARCH_OPTIONAL_KERNEL_RWX_DEFAULT=y
|
||||
CONFIG_ARCH_SUPPORTS_ATOMIC_RMW=y
|
||||
CONFIG_ARCH_SUPPORTS_UPROBES=y
|
||||
CONFIG_ARCH_SUSPEND_POSSIBLE=y
|
||||
CONFIG_ARCH_USE_BUILTIN_BSWAP=y
|
||||
CONFIG_ARCH_USE_CMPXCHG_LOCKREF=y
|
||||
CONFIG_ARCH_WANT_GENERAL_HUGETLB=y
|
||||
CONFIG_ARCH_WANT_IPC_PARSE_VERSION=y
|
||||
CONFIG_ARM=y
|
||||
CONFIG_ARM_APPENDED_DTB=y
|
||||
CONFIG_ARM_ARCH_TIMER=y
|
||||
CONFIG_ARM_ARCH_TIMER_EVTSTREAM=y
|
||||
# CONFIG_ARM_ATAG_DTB_COMPAT is not set
|
||||
CONFIG_ARM_CPU_SUSPEND=y
|
||||
# CONFIG_ARM_CPU_TOPOLOGY is not set
|
||||
CONFIG_ARM_GIC=y
|
||||
CONFIG_ARM_HAS_SG_CHAIN=y
|
||||
CONFIG_ARM_L1_CACHE_SHIFT=6
|
||||
CONFIG_ARM_L1_CACHE_SHIFT_6=y
|
||||
# CONFIG_ARM_LPAE is not set
|
||||
CONFIG_ARM_MEDIATEK_CPUFREQ=y
|
||||
CONFIG_ARM_PATCH_IDIV=y
|
||||
CONFIG_ARM_PATCH_PHYS_VIRT=y
|
||||
# CONFIG_ARM_SMMU is not set
|
||||
CONFIG_ARM_THUMB=y
|
||||
CONFIG_ARM_THUMBEE=y
|
||||
CONFIG_ARM_UNWIND=y
|
||||
CONFIG_ARM_VIRT_EXT=y
|
||||
CONFIG_ATAGS=y
|
||||
CONFIG_AUTO_ZRELADDR=y
|
||||
# CONFIG_BCM84881_PHY is not set
|
||||
CONFIG_BLK_MQ_PCI=y
|
||||
CONFIG_BOUNCE=y
|
||||
# CONFIG_CACHE_L2X0 is not set
|
||||
CONFIG_CLEANCACHE=y
|
||||
CONFIG_CLKDEV_LOOKUP=y
|
||||
CONFIG_CLKSRC_MMIO=y
|
||||
CONFIG_CLONE_BACKWARDS=y
|
||||
CONFIG_CMDLINE="earlyprintk console=ttyS0,115200 rootfstype=squashfs,jffs2"
|
||||
CONFIG_CMDLINE_FROM_BOOTLOADER=y
|
||||
CONFIG_COMMON_CLK=y
|
||||
CONFIG_COMMON_CLK_MEDIATEK=y
|
||||
CONFIG_COMMON_CLK_MT2701=y
|
||||
# CONFIG_COMMON_CLK_MT2701_AUDSYS is not set
|
||||
CONFIG_COMMON_CLK_MT2701_BDPSYS=y
|
||||
CONFIG_COMMON_CLK_MT2701_ETHSYS=y
|
||||
# CONFIG_COMMON_CLK_MT2701_G3DSYS is not set
|
||||
CONFIG_COMMON_CLK_MT2701_HIFSYS=y
|
||||
CONFIG_COMMON_CLK_MT2701_IMGSYS=y
|
||||
CONFIG_COMMON_CLK_MT2701_MMSYS=y
|
||||
CONFIG_COMMON_CLK_MT2701_VDECSYS=y
|
||||
# CONFIG_COMMON_CLK_MT7622 is not set
|
||||
# CONFIG_COMMON_CLK_MT7629 is not set
|
||||
# CONFIG_COMMON_CLK_MT8135 is not set
|
||||
# CONFIG_COMMON_CLK_MT8173 is not set
|
||||
CONFIG_COREDUMP=y
|
||||
# CONFIG_CPUFREQ_DT is not set
|
||||
CONFIG_CPU_32v6K=y
|
||||
CONFIG_CPU_32v7=y
|
||||
CONFIG_CPU_ABRT_EV7=y
|
||||
# CONFIG_CPU_BPREDICT_DISABLE is not set
|
||||
CONFIG_CPU_CACHE_V7=y
|
||||
CONFIG_CPU_CACHE_VIPT=y
|
||||
CONFIG_CPU_COPY_V6=y
|
||||
CONFIG_CPU_CP15=y
|
||||
CONFIG_CPU_CP15_MMU=y
|
||||
CONFIG_CPU_FREQ=y
|
||||
CONFIG_CPU_FREQ_DEFAULT_GOV_PERFORMANCE=y
|
||||
CONFIG_CPU_FREQ_GOV_ATTR_SET=y
|
||||
CONFIG_CPU_FREQ_GOV_COMMON=y
|
||||
CONFIG_CPU_FREQ_GOV_CONSERVATIVE=y
|
||||
CONFIG_CPU_FREQ_GOV_ONDEMAND=y
|
||||
CONFIG_CPU_FREQ_GOV_PERFORMANCE=y
|
||||
CONFIG_CPU_FREQ_GOV_POWERSAVE=y
|
||||
# CONFIG_CPU_FREQ_GOV_USERSPACE is not set
|
||||
CONFIG_CPU_FREQ_STAT=y
|
||||
CONFIG_CPU_HAS_ASID=y
|
||||
# CONFIG_CPU_HOTPLUG_STATE_CONTROL is not set
|
||||
# CONFIG_CPU_ICACHE_DISABLE is not set
|
||||
CONFIG_CPU_PABRT_V7=y
|
||||
CONFIG_CPU_PM=y
|
||||
CONFIG_CPU_RMAP=y
|
||||
CONFIG_CPU_SPECTRE=y
|
||||
# CONFIG_CPU_THERMAL is not set
|
||||
CONFIG_CPU_THUMB_CAPABLE=y
|
||||
CONFIG_CPU_TLB_V7=y
|
||||
CONFIG_CPU_V7=y
|
||||
CONFIG_CRC16=y
|
||||
# CONFIG_CRC32_SARWATE is not set
|
||||
CONFIG_CRC32_SLICEBY8=y
|
||||
CONFIG_CROSS_MEMORY_ATTACH=y
|
||||
CONFIG_CRYPTO_ACOMP2=y
|
||||
CONFIG_CRYPTO_AEAD=y
|
||||
CONFIG_CRYPTO_AEAD2=y
|
||||
CONFIG_CRYPTO_CRC32=y
|
||||
CONFIG_CRYPTO_CRC32C=y
|
||||
CONFIG_CRYPTO_CTR=y
|
||||
CONFIG_CRYPTO_DEFLATE=y
|
||||
CONFIG_CRYPTO_DEV_MEDIATEK=y
|
||||
CONFIG_CRYPTO_DRBG=y
|
||||
CONFIG_CRYPTO_DRBG_HMAC=y
|
||||
CONFIG_CRYPTO_DRBG_MENU=y
|
||||
CONFIG_CRYPTO_HASH=y
|
||||
CONFIG_CRYPTO_HASH2=y
|
||||
CONFIG_CRYPTO_HMAC=y
|
||||
CONFIG_CRYPTO_HW=y
|
||||
CONFIG_CRYPTO_JITTERENTROPY=y
|
||||
CONFIG_CRYPTO_LZO=y
|
||||
CONFIG_CRYPTO_MANAGER=y
|
||||
CONFIG_CRYPTO_MANAGER2=y
|
||||
CONFIG_CRYPTO_NULL=y
|
||||
CONFIG_CRYPTO_NULL2=y
|
||||
CONFIG_CRYPTO_RNG=y
|
||||
CONFIG_CRYPTO_RNG2=y
|
||||
CONFIG_CRYPTO_RNG_DEFAULT=y
|
||||
CONFIG_CRYPTO_SEQIV=y
|
||||
CONFIG_CRYPTO_SHA1=y
|
||||
CONFIG_CRYPTO_SHA256=y
|
||||
CONFIG_CRYPTO_SHA512=y
|
||||
CONFIG_CRYPTO_WORKQUEUE=y
|
||||
CONFIG_DCACHE_WORD_ACCESS=y
|
||||
CONFIG_DEBUG_ALIGN_RODATA=y
|
||||
CONFIG_DEBUG_BUGVERBOSE=y
|
||||
CONFIG_DEBUG_GPIO=y
|
||||
CONFIG_DEBUG_INFO=y
|
||||
CONFIG_DEBUG_LL=y
|
||||
CONFIG_DEBUG_LL_INCLUDE="debug/8250.S"
|
||||
CONFIG_DEBUG_MT6589_UART0=y
|
||||
# CONFIG_DEBUG_MT8127_UART0 is not set
|
||||
# CONFIG_DEBUG_MT8135_UART3 is not set
|
||||
CONFIG_DEBUG_PREEMPT=y
|
||||
CONFIG_DEBUG_UART_8250=y
|
||||
# CONFIG_DEBUG_UART_8250_FLOW_CONTROL is not set
|
||||
CONFIG_DEBUG_UART_8250_SHIFT=2
|
||||
# CONFIG_DEBUG_UART_8250_WORD is not set
|
||||
CONFIG_DEBUG_UART_PHYS=0x11004000
|
||||
CONFIG_DEBUG_UART_VIRT=0xf1004000
|
||||
CONFIG_DEBUG_UNCOMPRESS=y
|
||||
# CONFIG_DEBUG_USER is not set
|
||||
CONFIG_DEFAULT_MPTCP_PM="fullmesh"
|
||||
CONFIG_DMADEVICES=y
|
||||
CONFIG_DMA_ENGINE=y
|
||||
CONFIG_DMA_OF=y
|
||||
CONFIG_DTC=y
|
||||
CONFIG_EARLY_PRINTK=y
|
||||
CONFIG_EDAC_ATOMIC_SCRUB=y
|
||||
CONFIG_EDAC_SUPPORT=y
|
||||
CONFIG_EINT_MTK=y
|
||||
CONFIG_ELF_CORE=y
|
||||
CONFIG_EXT4_FS=y
|
||||
# CONFIG_F2FS_CHECK_FS is not set
|
||||
CONFIG_F2FS_FS=y
|
||||
# CONFIG_F2FS_FS_SECURITY is not set
|
||||
CONFIG_F2FS_FS_XATTR=y
|
||||
CONFIG_F2FS_STAT_FS=y
|
||||
CONFIG_FIXED_PHY=y
|
||||
CONFIG_FIX_EARLYCON_MEM=y
|
||||
CONFIG_FREEZER=y
|
||||
CONFIG_FS_IOMAP=y
|
||||
CONFIG_FS_MBCACHE=y
|
||||
CONFIG_GENERIC_ALLOCATOR=y
|
||||
CONFIG_GENERIC_BUG=y
|
||||
CONFIG_GENERIC_CLOCKEVENTS=y
|
||||
CONFIG_GENERIC_CLOCKEVENTS_BROADCAST=y
|
||||
CONFIG_GENERIC_CPU_AUTOPROBE=y
|
||||
CONFIG_GENERIC_EARLY_IOREMAP=y
|
||||
CONFIG_GENERIC_IDLE_POLL_SETUP=y
|
||||
CONFIG_GENERIC_IRQ_EFFECTIVE_AFF_MASK=y
|
||||
CONFIG_GENERIC_IRQ_MIGRATION=y
|
||||
CONFIG_GENERIC_IRQ_MULTI_HANDLER=y
|
||||
CONFIG_GENERIC_IRQ_SHOW=y
|
||||
CONFIG_GENERIC_IRQ_SHOW_LEVEL=y
|
||||
CONFIG_GENERIC_MSI_IRQ=y
|
||||
CONFIG_GENERIC_MSI_IRQ_DOMAIN=y
|
||||
CONFIG_GENERIC_PCI_IOMAP=y
|
||||
CONFIG_GENERIC_PHY=y
|
||||
CONFIG_GENERIC_PINCONF=y
|
||||
CONFIG_GENERIC_PINCTRL_GROUPS=y
|
||||
CONFIG_GENERIC_PINMUX_FUNCTIONS=y
|
||||
CONFIG_GENERIC_SCHED_CLOCK=y
|
||||
CONFIG_GENERIC_SMP_IDLE_THREAD=y
|
||||
CONFIG_GENERIC_STRNCPY_FROM_USER=y
|
||||
CONFIG_GENERIC_STRNLEN_USER=y
|
||||
CONFIG_GPIOLIB=y
|
||||
CONFIG_GPIO_SYSFS=y
|
||||
# CONFIG_GPS is not set
|
||||
CONFIG_HANDLE_DOMAIN_IRQ=y
|
||||
CONFIG_HARDEN_BRANCH_PREDICTOR=y
|
||||
CONFIG_HARDIRQS_SW_RESEND=y
|
||||
CONFIG_HAS_DMA=y
|
||||
CONFIG_HAS_IOMEM=y
|
||||
CONFIG_HAS_IOPORT_MAP=y
|
||||
CONFIG_HAVE_ARCH_AUDITSYSCALL=y
|
||||
CONFIG_HAVE_ARCH_BITREVERSE=y
|
||||
CONFIG_HAVE_ARCH_JUMP_LABEL=y
|
||||
CONFIG_HAVE_ARCH_KGDB=y
|
||||
CONFIG_HAVE_ARCH_PFN_VALID=y
|
||||
CONFIG_HAVE_ARCH_SECCOMP_FILTER=y
|
||||
CONFIG_HAVE_ARCH_THREAD_STRUCT_WHITELIST=y
|
||||
CONFIG_HAVE_ARCH_TRACEHOOK=y
|
||||
CONFIG_HAVE_ARM_ARCH_TIMER=y
|
||||
CONFIG_HAVE_ARM_SMCCC=y
|
||||
CONFIG_HAVE_CLK=y
|
||||
CONFIG_HAVE_CLK_PREPARE=y
|
||||
CONFIG_HAVE_CONTEXT_TRACKING=y
|
||||
CONFIG_HAVE_C_RECORDMCOUNT=y
|
||||
CONFIG_HAVE_DEBUG_KMEMLEAK=y
|
||||
CONFIG_HAVE_DMA_CONTIGUOUS=y
|
||||
CONFIG_HAVE_DYNAMIC_FTRACE=y
|
||||
CONFIG_HAVE_DYNAMIC_FTRACE_WITH_REGS=y
|
||||
CONFIG_HAVE_EBPF_JIT=y
|
||||
CONFIG_HAVE_EFFICIENT_UNALIGNED_ACCESS=y
|
||||
CONFIG_HAVE_FTRACE_MCOUNT_RECORD=y
|
||||
CONFIG_HAVE_FUNCTION_GRAPH_TRACER=y
|
||||
CONFIG_HAVE_FUNCTION_TRACER=y
|
||||
CONFIG_HAVE_GENERIC_DMA_COHERENT=y
|
||||
CONFIG_HAVE_IDE=y
|
||||
CONFIG_HAVE_IRQ_TIME_ACCOUNTING=y
|
||||
CONFIG_HAVE_LD_DEAD_CODE_DATA_ELIMINATION=y
|
||||
CONFIG_HAVE_MEMBLOCK=y
|
||||
CONFIG_HAVE_MOD_ARCH_SPECIFIC=y
|
||||
CONFIG_HAVE_NET_DSA=y
|
||||
CONFIG_HAVE_OPROFILE=y
|
||||
CONFIG_HAVE_OPTPROBES=y
|
||||
CONFIG_HAVE_PERF_EVENTS=y
|
||||
CONFIG_HAVE_PERF_REGS=y
|
||||
CONFIG_HAVE_PERF_USER_STACK_DUMP=y
|
||||
CONFIG_HAVE_PROC_CPU=y
|
||||
CONFIG_HAVE_REGS_AND_STACK_ACCESS_API=y
|
||||
CONFIG_HAVE_RSEQ=y
|
||||
CONFIG_HAVE_SMP=y
|
||||
CONFIG_HAVE_SYSCALL_TRACEPOINTS=y
|
||||
CONFIG_HAVE_UID16=y
|
||||
CONFIG_HAVE_VIRT_CPU_ACCOUNTING_GEN=y
|
||||
CONFIG_HIGHMEM=y
|
||||
# CONFIG_HIGHPTE is not set
|
||||
CONFIG_HOTPLUG_CPU=y
|
||||
CONFIG_HWMON=y
|
||||
CONFIG_HW_RANDOM=y
|
||||
CONFIG_HW_RANDOM_MTK=y
|
||||
CONFIG_HZ_FIXED=0
|
||||
CONFIG_I2C=y
|
||||
CONFIG_I2C_BOARDINFO=y
|
||||
CONFIG_I2C_CHARDEV=y
|
||||
CONFIG_I2C_MT65XX=y
|
||||
CONFIG_ICPLUS_PHY=y
|
||||
CONFIG_IIO=y
|
||||
# CONFIG_IIO_BUFFER is not set
|
||||
# CONFIG_IIO_TRIGGER is not set
|
||||
CONFIG_INITRAMFS_SOURCE=""
|
||||
# CONFIG_IOMMU_DEBUGFS is not set
|
||||
# CONFIG_IOMMU_IO_PGTABLE_ARMV7S is not set
|
||||
# CONFIG_IOMMU_IO_PGTABLE_LPAE is not set
|
||||
CONFIG_IOMMU_SUPPORT=y
|
||||
CONFIG_IRQCHIP=y
|
||||
CONFIG_IRQ_DOMAIN=y
|
||||
CONFIG_IRQ_DOMAIN_HIERARCHY=y
|
||||
CONFIG_IRQ_FORCED_THREADING=y
|
||||
CONFIG_IRQ_WORK=y
|
||||
CONFIG_JBD2=y
|
||||
CONFIG_KALLSYMS=y
|
||||
CONFIG_LEDS_MT6323=y
|
||||
CONFIG_LIBFDT=y
|
||||
CONFIG_LOCK_DEBUGGING_SUPPORT=y
|
||||
CONFIG_LOCK_SPIN_ON_OWNER=y
|
||||
CONFIG_LZ4_DECOMPRESS=y
|
||||
CONFIG_LZO_COMPRESS=y
|
||||
CONFIG_LZO_DECOMPRESS=y
|
||||
# CONFIG_MACH_MT2701 is not set
|
||||
# CONFIG_MACH_MT6589 is not set
|
||||
# CONFIG_MACH_MT6592 is not set
|
||||
CONFIG_MACH_MT7623=y
|
||||
# CONFIG_MACH_MT7629 is not set
|
||||
# CONFIG_MACH_MT8127 is not set
|
||||
# CONFIG_MACH_MT8135 is not set
|
||||
CONFIG_MAGIC_SYSRQ=y
|
||||
CONFIG_MDIO_BITBANG=y
|
||||
CONFIG_MDIO_BUS=y
|
||||
CONFIG_MDIO_DEVICE=y
|
||||
CONFIG_MDIO_GPIO=y
|
||||
CONFIG_MEDIATEK_MT6577_AUXADC=y
|
||||
CONFIG_MEDIATEK_WATCHDOG=y
|
||||
CONFIG_MEMFD_CREATE=y
|
||||
CONFIG_MFD_CORE=y
|
||||
CONFIG_MFD_MT6397=y
|
||||
CONFIG_MFD_SYSCON=y
|
||||
CONFIG_MIGHT_HAVE_CACHE_L2X0=y
|
||||
CONFIG_MIGHT_HAVE_PCI=y
|
||||
CONFIG_MIGRATION=y
|
||||
CONFIG_MMC=y
|
||||
CONFIG_MMC_BLOCK=y
|
||||
CONFIG_MMC_MTK=y
|
||||
CONFIG_MMC_SDHCI=y
|
||||
# CONFIG_MMC_SDHCI_PCI is not set
|
||||
CONFIG_MMC_SDHCI_PLTFM=y
|
||||
# CONFIG_MMC_TIFM_SD is not set
|
||||
CONFIG_MODULES_USE_ELF_REL=y
|
||||
# CONFIG_MT753X_GSW is not set
|
||||
CONFIG_MTD_BLOCK2MTD=y
|
||||
CONFIG_MTD_CMDLINE_PARTS=y
|
||||
CONFIG_MTD_M25P80=y
|
||||
CONFIG_MTD_MT81xx_NOR=y
|
||||
CONFIG_MTD_NAND=y
|
||||
CONFIG_MTD_NAND_ECC=y
|
||||
CONFIG_MTD_NAND_MTK=y
|
||||
CONFIG_MTD_SPI_NOR=y
|
||||
CONFIG_MTD_SPLIT_FIRMWARE=y
|
||||
CONFIG_MTD_SPLIT_UIMAGE_FW=y
|
||||
CONFIG_MTD_UBI=y
|
||||
CONFIG_MTD_UBI_BEB_LIMIT=20
|
||||
CONFIG_MTD_UBI_BLOCK=y
|
||||
# CONFIG_MTD_UBI_FASTMAP is not set
|
||||
# CONFIG_MTD_UBI_GLUEBI is not set
|
||||
CONFIG_MTD_UBI_WL_THRESHOLD=4096
|
||||
# CONFIG_MTK_BTIF is not set
|
||||
# CONFIG_MTK_COMBO is not set
|
||||
# CONFIG_MTK_CONN_LTE_IDC_SUPPORT is not set
|
||||
# CONFIG_MTK_DHCPV6C_WIFI is not set
|
||||
CONFIG_MTK_EFUSE=y
|
||||
# CONFIG_MTK_GPS_SUPPORT is not set
|
||||
# CONFIG_MTK_HSDMA is not set
|
||||
CONFIG_MTK_INFRACFG=y
|
||||
# CONFIG_MTK_IOMMU is not set
|
||||
# CONFIG_MTK_IOMMU_V1 is not set
|
||||
CONFIG_MTK_PLATFORM=""
|
||||
CONFIG_MTK_PMIC_WRAP=y
|
||||
CONFIG_MTK_SCPSYS=y
|
||||
CONFIG_MTK_THERMAL=y
|
||||
CONFIG_MTK_TIMER=y
|
||||
CONFIG_MUTEX_SPIN_ON_OWNER=y
|
||||
CONFIG_NEED_DMA_MAP_STATE=y
|
||||
CONFIG_NEON=y
|
||||
CONFIG_NET_DSA=y
|
||||
CONFIG_NET_DSA_MT7530=y
|
||||
CONFIG_NET_DSA_TAG_MTK=y
|
||||
CONFIG_NET_FLOW_LIMIT=y
|
||||
CONFIG_NET_MEDIATEK_SOC=y
|
||||
CONFIG_NET_SWITCHDEV=y
|
||||
# CONFIG_NET_VENDOR_AURORA is not set
|
||||
CONFIG_NET_VENDOR_MEDIATEK=y
|
||||
# CONFIG_NET_VENDOR_WIZNET is not set
|
||||
CONFIG_NLS=y
|
||||
CONFIG_NO_BOOTMEM=y
|
||||
CONFIG_NO_HZ=y
|
||||
CONFIG_NO_HZ_COMMON=y
|
||||
CONFIG_NO_HZ_IDLE=y
|
||||
CONFIG_NR_CPUS=4
|
||||
CONFIG_NVMEM=y
|
||||
CONFIG_OF=y
|
||||
CONFIG_OF_ADDRESS=y
|
||||
CONFIG_OF_EARLY_FLATTREE=y
|
||||
CONFIG_OF_FLATTREE=y
|
||||
CONFIG_OF_GPIO=y
|
||||
CONFIG_OF_IRQ=y
|
||||
CONFIG_OF_KOBJ=y
|
||||
CONFIG_OF_MDIO=y
|
||||
CONFIG_OF_NET=y
|
||||
CONFIG_OF_RESERVED_MEM=y
|
||||
CONFIG_OLD_SIGACTION=y
|
||||
CONFIG_OLD_SIGSUSPEND3=y
|
||||
CONFIG_PADATA=y
|
||||
CONFIG_PAGE_OFFSET=0xC0000000
|
||||
CONFIG_PCI=y
|
||||
CONFIG_PCIEAER=y
|
||||
CONFIG_PCIEPORTBUS=y
|
||||
CONFIG_PCIE_MEDIATEK=y
|
||||
CONFIG_PCIE_PME=y
|
||||
CONFIG_PCI_DOMAINS=y
|
||||
CONFIG_PCI_DOMAINS_GENERIC=y
|
||||
CONFIG_PCI_MSI=y
|
||||
CONFIG_PCI_MSI_IRQ_DOMAIN=y
|
||||
# CONFIG_PCI_V3_SEMI is not set
|
||||
CONFIG_PERF_USE_VMALLOC=y
|
||||
CONFIG_PGTABLE_LEVELS=2
|
||||
CONFIG_PHYLIB=y
|
||||
CONFIG_PHYLINK=y
|
||||
CONFIG_PHY_MTK_TPHY=y
|
||||
# CONFIG_PHY_MTK_XSPHY is not set
|
||||
CONFIG_PINCTRL=y
|
||||
CONFIG_PINCTRL_MT2701=y
|
||||
CONFIG_PINCTRL_MT6397=y
|
||||
CONFIG_PINCTRL_MT7623=y
|
||||
CONFIG_PINCTRL_MTK=y
|
||||
CONFIG_PINCTRL_MTK_MOORE=y
|
||||
CONFIG_PLUGIN_HOSTCC="g++"
|
||||
CONFIG_PM=y
|
||||
CONFIG_PM_CLK=y
|
||||
# CONFIG_PM_DEBUG is not set
|
||||
CONFIG_PM_GENERIC_DOMAINS=y
|
||||
CONFIG_PM_GENERIC_DOMAINS_OF=y
|
||||
CONFIG_PM_GENERIC_DOMAINS_SLEEP=y
|
||||
CONFIG_PM_OPP=y
|
||||
CONFIG_PM_SLEEP=y
|
||||
CONFIG_PM_SLEEP_SMP=y
|
||||
CONFIG_POWER_RESET=y
|
||||
CONFIG_POWER_SUPPLY=y
|
||||
CONFIG_PREEMPT=y
|
||||
CONFIG_PREEMPT_COUNT=y
|
||||
# CONFIG_PREEMPT_NONE is not set
|
||||
CONFIG_PREEMPT_RCU=y
|
||||
CONFIG_PRINTK_TIME=y
|
||||
CONFIG_PWM=y
|
||||
CONFIG_PWM_MEDIATEK=y
|
||||
# CONFIG_PWM_MTK_DISP is not set
|
||||
CONFIG_PWM_SYSFS=y
|
||||
CONFIG_RAS=y
|
||||
CONFIG_RATIONAL=y
|
||||
CONFIG_RCU_CPU_STALL_TIMEOUT=21
|
||||
# CONFIG_RCU_EXPERT is not set
|
||||
CONFIG_RCU_NEED_SEGCBLIST=y
|
||||
CONFIG_RCU_STALL_COMMON=y
|
||||
CONFIG_REFCOUNT_FULL=y
|
||||
CONFIG_REGMAP=y
|
||||
CONFIG_REGMAP_I2C=y
|
||||
CONFIG_REGMAP_MMIO=y
|
||||
CONFIG_REGMAP_SPI=y
|
||||
CONFIG_REGULATOR=y
|
||||
CONFIG_REGULATOR_FIXED_VOLTAGE=y
|
||||
CONFIG_REGULATOR_GPIO=y
|
||||
CONFIG_REGULATOR_MT6323=y
|
||||
# CONFIG_REGULATOR_MT6380 is not set
|
||||
# CONFIG_REGULATOR_MT6397 is not set
|
||||
# CONFIG_REGULATOR_QCOM_SPMI is not set
|
||||
CONFIG_RESET_CONTROLLER=y
|
||||
CONFIG_RFS_ACCEL=y
|
||||
CONFIG_RPS=y
|
||||
CONFIG_RTC_CLASS=y
|
||||
# CONFIG_RTC_DRV_CMOS is not set
|
||||
# CONFIG_RTC_DRV_MT6397 is not set
|
||||
# CONFIG_RTC_DRV_MT7622 is not set
|
||||
CONFIG_RTC_I2C_AND_SPI=y
|
||||
CONFIG_RWSEM_SPIN_ON_OWNER=y
|
||||
CONFIG_RWSEM_XCHGADD_ALGORITHM=y
|
||||
# CONFIG_SERIAL_8250_DMA is not set
|
||||
CONFIG_SERIAL_8250_FSL=y
|
||||
CONFIG_SERIAL_8250_MT6577=y
|
||||
CONFIG_SERIAL_8250_NR_UARTS=4
|
||||
CONFIG_SERIAL_8250_RUNTIME_UARTS=4
|
||||
# CONFIG_SFP is not set
|
||||
CONFIG_SGL_ALLOC=y
|
||||
CONFIG_SMP=y
|
||||
# CONFIG_SMP_ON_UP is not set
|
||||
CONFIG_SPARSE_IRQ=y
|
||||
CONFIG_SPI=y
|
||||
CONFIG_SPI_BITBANG=y
|
||||
CONFIG_SPI_MASTER=y
|
||||
CONFIG_SPI_MEM=y
|
||||
CONFIG_SPI_MT65XX=y
|
||||
# CONFIG_SPI_MTK_SNFI is not set
|
||||
CONFIG_SPMI=y
|
||||
CONFIG_SRCU=y
|
||||
CONFIG_STREAM_PARSER=y
|
||||
# CONFIG_STRIP_ASM_SYMS is not set
|
||||
CONFIG_SUSPEND=y
|
||||
CONFIG_SUSPEND_FREEZER=y
|
||||
CONFIG_SWCONFIG=y
|
||||
CONFIG_SWPHY=y
|
||||
CONFIG_SWP_EMULATE=y
|
||||
CONFIG_SYS_SUPPORTS_APM_EMULATION=y
|
||||
CONFIG_TASKS_RCU=y
|
||||
# CONFIG_TCP_CONG_NANQINLANG is not set
|
||||
CONFIG_THERMAL=y
|
||||
CONFIG_THERMAL_DEFAULT_GOV_STEP_WISE=y
|
||||
CONFIG_THERMAL_EMERGENCY_POWEROFF_DELAY_MS=0
|
||||
CONFIG_THERMAL_GOV_STEP_WISE=y
|
||||
CONFIG_THERMAL_OF=y
|
||||
# CONFIG_THUMB2_KERNEL is not set
|
||||
CONFIG_TICK_CPU_ACCOUNTING=y
|
||||
CONFIG_TIMER_OF=y
|
||||
CONFIG_TIMER_PROBE=y
|
||||
CONFIG_TREE_SRCU=y
|
||||
CONFIG_UBIFS_FS=y
|
||||
# CONFIG_UBIFS_FS_ADVANCED_COMPR is not set
|
||||
CONFIG_UBIFS_FS_LZO=y
|
||||
CONFIG_UBIFS_FS_ZLIB=y
|
||||
CONFIG_UEVENT_HELPER_PATH=""
|
||||
CONFIG_UNCOMPRESS_INCLUDE="debug/uncompress.h"
|
||||
CONFIG_UNINLINE_SPIN_UNLOCK=y
|
||||
CONFIG_USB=y
|
||||
CONFIG_USB_COMMON=y
|
||||
# CONFIG_USB_EHCI_HCD is not set
|
||||
CONFIG_USB_SUPPORT=y
|
||||
CONFIG_USB_XHCI_HCD=y
|
||||
CONFIG_USB_XHCI_MTK=y
|
||||
CONFIG_USB_XHCI_PLATFORM=y
|
||||
CONFIG_USE_OF=y
|
||||
CONFIG_VFP=y
|
||||
CONFIG_VFPv3=y
|
||||
CONFIG_VM_EVENT_COUNTERS=y
|
||||
CONFIG_WATCHDOG_CORE=y
|
||||
CONFIG_XPS=y
|
||||
CONFIG_XZ_DEC_ARM=y
|
||||
CONFIG_XZ_DEC_BCJ=y
|
||||
CONFIG_ZBOOT_ROM_BSS=0
|
||||
CONFIG_ZBOOT_ROM_TEXT=0
|
||||
CONFIG_ZLIB_DEFLATE=y
|
||||
CONFIG_ZLIB_INFLATE=y
|
||||
561
root/target/linux/mediatek/mt7623/config-5.4
Executable file
561
root/target/linux/mediatek/mt7623/config-5.4
Executable file
|
|
@ -0,0 +1,561 @@
|
|||
# CONFIG_AIO is not set
|
||||
CONFIG_ALIGNMENT_TRAP=y
|
||||
CONFIG_ARCH_32BIT_OFF_T=y
|
||||
CONFIG_ARCH_CLOCKSOURCE_DATA=y
|
||||
CONFIG_ARCH_HAS_BINFMT_FLAT=y
|
||||
CONFIG_ARCH_HAS_DEBUG_VIRTUAL=y
|
||||
CONFIG_ARCH_HAS_ELF_RANDOMIZE=y
|
||||
CONFIG_ARCH_HAS_FORTIFY_SOURCE=y
|
||||
CONFIG_ARCH_HAS_GCOV_PROFILE_ALL=y
|
||||
CONFIG_ARCH_HAS_KCOV=y
|
||||
CONFIG_ARCH_HAS_KEEPINITRD=y
|
||||
CONFIG_ARCH_HAS_MEMBARRIER_SYNC_CORE=y
|
||||
CONFIG_ARCH_HAS_PHYS_TO_DMA=y
|
||||
CONFIG_ARCH_HAS_SETUP_DMA_OPS=y
|
||||
CONFIG_ARCH_HAS_SET_MEMORY=y
|
||||
CONFIG_ARCH_HAS_STRICT_KERNEL_RWX=y
|
||||
CONFIG_ARCH_HAS_STRICT_MODULE_RWX=y
|
||||
CONFIG_ARCH_HAS_TEARDOWN_DMA_OPS=y
|
||||
CONFIG_ARCH_HAS_TICK_BROADCAST=y
|
||||
CONFIG_ARCH_HAVE_CUSTOM_GPIO_H=y
|
||||
CONFIG_ARCH_HIBERNATION_POSSIBLE=y
|
||||
CONFIG_ARCH_KEEP_MEMBLOCK=y
|
||||
CONFIG_ARCH_MEDIATEK=y
|
||||
CONFIG_ARCH_MIGHT_HAVE_PC_PARPORT=y
|
||||
# CONFIG_ARCH_MILBEAUT is not set
|
||||
CONFIG_ARCH_MULTIPLATFORM=y
|
||||
CONFIG_ARCH_MULTI_V6_V7=y
|
||||
CONFIG_ARCH_MULTI_V7=y
|
||||
CONFIG_ARCH_NR_GPIO=0
|
||||
CONFIG_ARCH_OPTIONAL_KERNEL_RWX=y
|
||||
CONFIG_ARCH_OPTIONAL_KERNEL_RWX_DEFAULT=y
|
||||
# CONFIG_ARCH_RDA is not set
|
||||
CONFIG_ARCH_SUPPORTS_ATOMIC_RMW=y
|
||||
CONFIG_ARCH_SUPPORTS_UPROBES=y
|
||||
CONFIG_ARCH_SUSPEND_POSSIBLE=y
|
||||
CONFIG_ARCH_USE_BUILTIN_BSWAP=y
|
||||
CONFIG_ARCH_USE_CMPXCHG_LOCKREF=y
|
||||
CONFIG_ARCH_WANT_DEFAULT_TOPDOWN_MMAP_LAYOUT=y
|
||||
CONFIG_ARCH_WANT_GENERAL_HUGETLB=y
|
||||
CONFIG_ARCH_WANT_IPC_PARSE_VERSION=y
|
||||
CONFIG_ARM=y
|
||||
CONFIG_ARM_APPENDED_DTB=y
|
||||
CONFIG_ARM_ARCH_TIMER=y
|
||||
CONFIG_ARM_ARCH_TIMER_EVTSTREAM=y
|
||||
# CONFIG_ARM_ATAG_DTB_COMPAT is not set
|
||||
CONFIG_ARM_CPU_SUSPEND=y
|
||||
# CONFIG_ARM_CPU_TOPOLOGY is not set
|
||||
# CONFIG_ARM_ERRATA_814220 is not set
|
||||
# CONFIG_ARM_ERRATA_857271 is not set
|
||||
# CONFIG_ARM_ERRATA_857272 is not set
|
||||
CONFIG_ARM_GIC=y
|
||||
CONFIG_ARM_HAS_SG_CHAIN=y
|
||||
CONFIG_ARM_L1_CACHE_SHIFT=6
|
||||
CONFIG_ARM_L1_CACHE_SHIFT_6=y
|
||||
# CONFIG_ARM_LPAE is not set
|
||||
CONFIG_ARM_MEDIATEK_CPUFREQ=y
|
||||
CONFIG_ARM_PATCH_IDIV=y
|
||||
CONFIG_ARM_PATCH_PHYS_VIRT=y
|
||||
# CONFIG_ARM_SMMU is not set
|
||||
CONFIG_ARM_THUMB=y
|
||||
CONFIG_ARM_THUMBEE=y
|
||||
CONFIG_ARM_UNWIND=y
|
||||
CONFIG_ARM_VIRT_EXT=y
|
||||
CONFIG_ATAGS=y
|
||||
CONFIG_AUTO_ZRELADDR=y
|
||||
# CONFIG_BACKLIGHT_CLASS_DEVICE is not set
|
||||
CONFIG_BINFMT_FLAT_ARGVP_ENVP_ON_STACK=y
|
||||
CONFIG_BLK_DEV_LOOP=y
|
||||
CONFIG_BLK_MQ_PCI=y
|
||||
CONFIG_BLK_PM=y
|
||||
CONFIG_BOUNCE=y
|
||||
# CONFIG_CACHE_L2X0 is not set
|
||||
CONFIG_CC_CAN_LINK=y
|
||||
CONFIG_CC_HAS_ASM_INLINE=y
|
||||
CONFIG_CC_HAS_KASAN_GENERIC=y
|
||||
CONFIG_CC_HAS_WARN_MAYBE_UNINITIALIZED=y
|
||||
CONFIG_CLEANCACHE=y
|
||||
CONFIG_CLKDEV_LOOKUP=y
|
||||
CONFIG_CLKSRC_MMIO=y
|
||||
CONFIG_CLONE_BACKWARDS=y
|
||||
CONFIG_CMDLINE="earlyprintk console=ttyS0,115200 rootfstype=squashfs,jffs2"
|
||||
CONFIG_CMDLINE_FROM_BOOTLOADER=y
|
||||
CONFIG_COMMON_CLK=y
|
||||
CONFIG_COMMON_CLK_MEDIATEK=y
|
||||
CONFIG_COMMON_CLK_MT2701=y
|
||||
# CONFIG_COMMON_CLK_MT2701_AUDSYS is not set
|
||||
CONFIG_COMMON_CLK_MT2701_BDPSYS=y
|
||||
CONFIG_COMMON_CLK_MT2701_ETHSYS=y
|
||||
# CONFIG_COMMON_CLK_MT2701_G3DSYS is not set
|
||||
CONFIG_COMMON_CLK_MT2701_HIFSYS=y
|
||||
CONFIG_COMMON_CLK_MT2701_IMGSYS=y
|
||||
CONFIG_COMMON_CLK_MT2701_MMSYS=y
|
||||
CONFIG_COMMON_CLK_MT2701_VDECSYS=y
|
||||
# CONFIG_COMMON_CLK_MT7622 is not set
|
||||
# CONFIG_COMMON_CLK_MT7629 is not set
|
||||
# CONFIG_COMMON_CLK_MT8135 is not set
|
||||
# CONFIG_COMMON_CLK_MT8173 is not set
|
||||
CONFIG_COMMON_CLK_MT8516=y
|
||||
# CONFIG_COMMON_CLK_MT8516_AUDSYS is not set
|
||||
CONFIG_COMPAT_32BIT_TIME=y
|
||||
CONFIG_COREDUMP=y
|
||||
# CONFIG_CPUFREQ_DT is not set
|
||||
CONFIG_CPU_32v6K=y
|
||||
CONFIG_CPU_32v7=y
|
||||
CONFIG_CPU_ABRT_EV7=y
|
||||
# CONFIG_CPU_BPREDICT_DISABLE is not set
|
||||
CONFIG_CPU_CACHE_V7=y
|
||||
CONFIG_CPU_CACHE_VIPT=y
|
||||
CONFIG_CPU_COPY_V6=y
|
||||
CONFIG_CPU_CP15=y
|
||||
CONFIG_CPU_CP15_MMU=y
|
||||
CONFIG_CPU_FREQ=y
|
||||
CONFIG_CPU_FREQ_DEFAULT_GOV_PERFORMANCE=y
|
||||
CONFIG_CPU_FREQ_GOV_ATTR_SET=y
|
||||
CONFIG_CPU_FREQ_GOV_COMMON=y
|
||||
CONFIG_CPU_FREQ_GOV_CONSERVATIVE=y
|
||||
CONFIG_CPU_FREQ_GOV_ONDEMAND=y
|
||||
CONFIG_CPU_FREQ_GOV_PERFORMANCE=y
|
||||
CONFIG_CPU_FREQ_GOV_POWERSAVE=y
|
||||
# CONFIG_CPU_FREQ_GOV_USERSPACE is not set
|
||||
CONFIG_CPU_FREQ_STAT=y
|
||||
CONFIG_CPU_HAS_ASID=y
|
||||
# CONFIG_CPU_HOTPLUG_STATE_CONTROL is not set
|
||||
# CONFIG_CPU_ICACHE_DISABLE is not set
|
||||
# CONFIG_CPU_ICACHE_MISMATCH_WORKAROUND is not set
|
||||
CONFIG_CPU_PABRT_V7=y
|
||||
CONFIG_CPU_PM=y
|
||||
CONFIG_CPU_RMAP=y
|
||||
CONFIG_CPU_SPECTRE=y
|
||||
# CONFIG_CPU_THERMAL is not set
|
||||
CONFIG_CPU_THUMB_CAPABLE=y
|
||||
CONFIG_CPU_TLB_V7=y
|
||||
CONFIG_CPU_V7=y
|
||||
CONFIG_CRC16=y
|
||||
# CONFIG_CRC32_SARWATE is not set
|
||||
CONFIG_CRC32_SLICEBY8=y
|
||||
CONFIG_CROSS_MEMORY_ATTACH=y
|
||||
CONFIG_CRYPTO_ACOMP2=y
|
||||
CONFIG_CRYPTO_AEAD=y
|
||||
CONFIG_CRYPTO_AEAD2=y
|
||||
CONFIG_CRYPTO_AKCIPHER2=y
|
||||
CONFIG_CRYPTO_CRC32=y
|
||||
CONFIG_CRYPTO_CRC32C=y
|
||||
CONFIG_CRYPTO_CTR=y
|
||||
CONFIG_CRYPTO_DEFLATE=y
|
||||
CONFIG_CRYPTO_DEV_MEDIATEK=y
|
||||
CONFIG_CRYPTO_DRBG=y
|
||||
CONFIG_CRYPTO_DRBG_HMAC=y
|
||||
CONFIG_CRYPTO_DRBG_MENU=y
|
||||
CONFIG_CRYPTO_HASH=y
|
||||
CONFIG_CRYPTO_HASH2=y
|
||||
CONFIG_CRYPTO_HASH_INFO=y
|
||||
CONFIG_CRYPTO_HMAC=y
|
||||
CONFIG_CRYPTO_HW=y
|
||||
CONFIG_CRYPTO_JITTERENTROPY=y
|
||||
CONFIG_CRYPTO_KPP2=y
|
||||
CONFIG_CRYPTO_LIB_AES=y
|
||||
CONFIG_CRYPTO_LIB_SHA256=y
|
||||
CONFIG_CRYPTO_LZO=y
|
||||
CONFIG_CRYPTO_MANAGER=y
|
||||
CONFIG_CRYPTO_MANAGER2=y
|
||||
CONFIG_CRYPTO_NULL=y
|
||||
CONFIG_CRYPTO_NULL2=y
|
||||
CONFIG_CRYPTO_RNG=y
|
||||
CONFIG_CRYPTO_RNG2=y
|
||||
CONFIG_CRYPTO_RNG_DEFAULT=y
|
||||
CONFIG_CRYPTO_SEQIV=y
|
||||
CONFIG_CRYPTO_SHA1=y
|
||||
CONFIG_CRYPTO_SHA256=y
|
||||
CONFIG_CRYPTO_SHA512=y
|
||||
CONFIG_CRYPTO_ZSTD=y
|
||||
CONFIG_DCACHE_WORD_ACCESS=y
|
||||
CONFIG_DEBUG_ALIGN_RODATA=y
|
||||
CONFIG_DEBUG_BUGVERBOSE=y
|
||||
CONFIG_DEBUG_GPIO=y
|
||||
CONFIG_DEBUG_INFO=y
|
||||
CONFIG_DEBUG_LL=y
|
||||
CONFIG_DEBUG_LL_INCLUDE="debug/8250.S"
|
||||
CONFIG_DEBUG_MISC=y
|
||||
CONFIG_DEBUG_MT6589_UART0=y
|
||||
# CONFIG_DEBUG_MT8127_UART0 is not set
|
||||
# CONFIG_DEBUG_MT8135_UART3 is not set
|
||||
CONFIG_DEBUG_PREEMPT=y
|
||||
CONFIG_DEBUG_UART_8250=y
|
||||
# CONFIG_DEBUG_UART_8250_FLOW_CONTROL is not set
|
||||
CONFIG_DEBUG_UART_8250_SHIFT=2
|
||||
# CONFIG_DEBUG_UART_8250_WORD is not set
|
||||
CONFIG_DEBUG_UART_PHYS=0x11004000
|
||||
CONFIG_DEBUG_UART_VIRT=0xf1004000
|
||||
CONFIG_DEBUG_UNCOMPRESS=y
|
||||
# CONFIG_DEBUG_USER is not set
|
||||
CONFIG_DMADEVICES=y
|
||||
CONFIG_DMA_ENGINE=y
|
||||
CONFIG_DMA_OF=y
|
||||
CONFIG_DMA_REMAP=y
|
||||
CONFIG_DTC=y
|
||||
CONFIG_EARLY_PRINTK=y
|
||||
CONFIG_EDAC_ATOMIC_SCRUB=y
|
||||
CONFIG_EDAC_SUPPORT=y
|
||||
CONFIG_EINT_MTK=y
|
||||
CONFIG_ELF_CORE=y
|
||||
# CONFIG_ENERGY_MODEL is not set
|
||||
CONFIG_EXT4_FS=y
|
||||
# CONFIG_F2FS_CHECK_FS is not set
|
||||
CONFIG_F2FS_FS=y
|
||||
# CONFIG_F2FS_FS_SECURITY is not set
|
||||
CONFIG_F2FS_FS_XATTR=y
|
||||
CONFIG_F2FS_STAT_FS=y
|
||||
CONFIG_FIXED_PHY=y
|
||||
CONFIG_FIX_EARLYCON_MEM=y
|
||||
CONFIG_FREEZER=y
|
||||
# CONFIG_FSL_QDMA is not set
|
||||
CONFIG_FS_IOMAP=y
|
||||
CONFIG_FS_MBCACHE=y
|
||||
CONFIG_FW_LOADER_PAGED_BUF=y
|
||||
CONFIG_GENERIC_ALLOCATOR=y
|
||||
CONFIG_GENERIC_BUG=y
|
||||
CONFIG_GENERIC_CLOCKEVENTS=y
|
||||
CONFIG_GENERIC_CLOCKEVENTS_BROADCAST=y
|
||||
CONFIG_GENERIC_CPU_AUTOPROBE=y
|
||||
CONFIG_GENERIC_EARLY_IOREMAP=y
|
||||
CONFIG_GENERIC_IDLE_POLL_SETUP=y
|
||||
CONFIG_GENERIC_IRQ_EFFECTIVE_AFF_MASK=y
|
||||
CONFIG_GENERIC_IRQ_MIGRATION=y
|
||||
CONFIG_GENERIC_IRQ_MULTI_HANDLER=y
|
||||
CONFIG_GENERIC_IRQ_SHOW=y
|
||||
CONFIG_GENERIC_IRQ_SHOW_LEVEL=y
|
||||
CONFIG_GENERIC_MSI_IRQ=y
|
||||
CONFIG_GENERIC_MSI_IRQ_DOMAIN=y
|
||||
CONFIG_GENERIC_PCI_IOMAP=y
|
||||
CONFIG_GENERIC_PHY=y
|
||||
CONFIG_GENERIC_PINCONF=y
|
||||
CONFIG_GENERIC_PINCTRL_GROUPS=y
|
||||
CONFIG_GENERIC_PINMUX_FUNCTIONS=y
|
||||
CONFIG_GENERIC_SCHED_CLOCK=y
|
||||
CONFIG_GENERIC_SMP_IDLE_THREAD=y
|
||||
CONFIG_GENERIC_STRNCPY_FROM_USER=y
|
||||
CONFIG_GENERIC_STRNLEN_USER=y
|
||||
CONFIG_GPIOLIB=y
|
||||
CONFIG_GPIO_SYSFS=y
|
||||
# CONFIG_HABANA_AI is not set
|
||||
CONFIG_HANDLE_DOMAIN_IRQ=y
|
||||
CONFIG_HARDEN_BRANCH_PREDICTOR=y
|
||||
CONFIG_HARDIRQS_SW_RESEND=y
|
||||
CONFIG_HAS_DMA=y
|
||||
CONFIG_HAS_IOMEM=y
|
||||
CONFIG_HAS_IOPORT_MAP=y
|
||||
CONFIG_HAVE_ARCH_AUDITSYSCALL=y
|
||||
CONFIG_HAVE_ARCH_BITREVERSE=y
|
||||
CONFIG_HAVE_ARCH_JUMP_LABEL=y
|
||||
CONFIG_HAVE_ARCH_KGDB=y
|
||||
CONFIG_HAVE_ARCH_PFN_VALID=y
|
||||
CONFIG_HAVE_ARCH_SECCOMP_FILTER=y
|
||||
CONFIG_HAVE_ARCH_THREAD_STRUCT_WHITELIST=y
|
||||
CONFIG_HAVE_ARCH_TRACEHOOK=y
|
||||
CONFIG_HAVE_ARM_ARCH_TIMER=y
|
||||
CONFIG_HAVE_ARM_SMCCC=y
|
||||
CONFIG_HAVE_CLK=y
|
||||
CONFIG_HAVE_CLK_PREPARE=y
|
||||
CONFIG_HAVE_CONTEXT_TRACKING=y
|
||||
CONFIG_HAVE_COPY_THREAD_TLS=y
|
||||
CONFIG_HAVE_C_RECORDMCOUNT=y
|
||||
CONFIG_HAVE_DEBUG_KMEMLEAK=y
|
||||
CONFIG_HAVE_DMA_CONTIGUOUS=y
|
||||
CONFIG_HAVE_DYNAMIC_FTRACE=y
|
||||
CONFIG_HAVE_DYNAMIC_FTRACE_WITH_REGS=y
|
||||
CONFIG_HAVE_EBPF_JIT=y
|
||||
CONFIG_HAVE_EFFICIENT_UNALIGNED_ACCESS=y
|
||||
CONFIG_HAVE_FTRACE_MCOUNT_RECORD=y
|
||||
CONFIG_HAVE_FUNCTION_GRAPH_TRACER=y
|
||||
CONFIG_HAVE_FUNCTION_TRACER=y
|
||||
CONFIG_HAVE_IDE=y
|
||||
CONFIG_HAVE_IRQ_TIME_ACCOUNTING=y
|
||||
CONFIG_HAVE_LD_DEAD_CODE_DATA_ELIMINATION=y
|
||||
CONFIG_HAVE_MOD_ARCH_SPECIFIC=y
|
||||
CONFIG_HAVE_NET_DSA=y
|
||||
CONFIG_HAVE_OPROFILE=y
|
||||
CONFIG_HAVE_OPTPROBES=y
|
||||
CONFIG_HAVE_PCI=y
|
||||
CONFIG_HAVE_PERF_EVENTS=y
|
||||
CONFIG_HAVE_PERF_REGS=y
|
||||
CONFIG_HAVE_PERF_USER_STACK_DUMP=y
|
||||
CONFIG_HAVE_PROC_CPU=y
|
||||
CONFIG_HAVE_REGS_AND_STACK_ACCESS_API=y
|
||||
CONFIG_HAVE_RSEQ=y
|
||||
CONFIG_HAVE_SMP=y
|
||||
CONFIG_HAVE_SYSCALL_TRACEPOINTS=y
|
||||
CONFIG_HAVE_UID16=y
|
||||
CONFIG_HAVE_VIRT_CPU_ACCOUNTING_GEN=y
|
||||
CONFIG_HIGHMEM=y
|
||||
# CONFIG_HIGHPTE is not set
|
||||
CONFIG_HOTPLUG_CPU=y
|
||||
CONFIG_HWMON=y
|
||||
CONFIG_HW_RANDOM=y
|
||||
CONFIG_HW_RANDOM_MTK=y
|
||||
CONFIG_HZ_FIXED=0
|
||||
CONFIG_I2C=y
|
||||
CONFIG_I2C_BOARDINFO=y
|
||||
CONFIG_I2C_CHARDEV=y
|
||||
CONFIG_I2C_MT65XX=y
|
||||
# CONFIG_I2C_NVIDIA_GPU is not set
|
||||
CONFIG_ICPLUS_PHY=y
|
||||
# CONFIG_IGC is not set
|
||||
CONFIG_IIO=y
|
||||
# CONFIG_IIO_BUFFER is not set
|
||||
# CONFIG_IIO_TRIGGER is not set
|
||||
CONFIG_INITRAMFS_COMPRESSION=""
|
||||
CONFIG_INITRAMFS_ROOT_GID=1000
|
||||
CONFIG_INITRAMFS_ROOT_UID=1000
|
||||
CONFIG_INITRAMFS_SOURCE="/openwrt/trunk/build_dir/target-arm_cortex-a7_musl-1.1.14_eabi/root-mediatek /openwrt/trunk/target/linux/generic/image/initramfs-base-files.txt"
|
||||
CONFIG_INIT_STACK_NONE=y
|
||||
# CONFIG_IOMMU_DEBUGFS is not set
|
||||
# CONFIG_IOMMU_IO_PGTABLE_ARMV7S is not set
|
||||
# CONFIG_IOMMU_IO_PGTABLE_LPAE is not set
|
||||
CONFIG_IOMMU_SUPPORT=y
|
||||
CONFIG_IO_URING=y
|
||||
CONFIG_IRQCHIP=y
|
||||
CONFIG_IRQ_DOMAIN=y
|
||||
CONFIG_IRQ_DOMAIN_HIERARCHY=y
|
||||
CONFIG_IRQ_FORCED_THREADING=y
|
||||
CONFIG_IRQ_WORK=y
|
||||
CONFIG_JBD2=y
|
||||
CONFIG_KALLSYMS=y
|
||||
CONFIG_LEDS_MT6323=y
|
||||
CONFIG_LIBFDT=y
|
||||
CONFIG_LOCK_DEBUGGING_SUPPORT=y
|
||||
CONFIG_LOCK_SPIN_ON_OWNER=y
|
||||
CONFIG_LZO_COMPRESS=y
|
||||
CONFIG_LZO_DECOMPRESS=y
|
||||
# CONFIG_MACH_MT2701 is not set
|
||||
# CONFIG_MACH_MT6589 is not set
|
||||
# CONFIG_MACH_MT6592 is not set
|
||||
CONFIG_MACH_MT7623=y
|
||||
# CONFIG_MACH_MT7629 is not set
|
||||
# CONFIG_MACH_MT8127 is not set
|
||||
# CONFIG_MACH_MT8135 is not set
|
||||
CONFIG_MAGIC_SYSRQ=y
|
||||
CONFIG_MDIO_BITBANG=y
|
||||
CONFIG_MDIO_BUS=y
|
||||
CONFIG_MDIO_DEVICE=y
|
||||
CONFIG_MDIO_GPIO=y
|
||||
CONFIG_MEDIATEK_MT6577_AUXADC=y
|
||||
CONFIG_MEDIATEK_WATCHDOG=y
|
||||
CONFIG_MEMFD_CREATE=y
|
||||
CONFIG_MFD_CORE=y
|
||||
CONFIG_MFD_MT6397=y
|
||||
# CONFIG_MFD_STPMIC1 is not set
|
||||
CONFIG_MFD_SYSCON=y
|
||||
CONFIG_MIGHT_HAVE_CACHE_L2X0=y
|
||||
CONFIG_MIGRATION=y
|
||||
# CONFIG_MISC_ALCOR_PCI is not set
|
||||
CONFIG_MMC=y
|
||||
CONFIG_MMC_BLOCK=y
|
||||
CONFIG_MMC_MTK=y
|
||||
CONFIG_MMC_SDHCI=y
|
||||
# CONFIG_MMC_SDHCI_PCI is not set
|
||||
CONFIG_MMC_SDHCI_PLTFM=y
|
||||
# CONFIG_MMC_TIFM_SD is not set
|
||||
CONFIG_MODULES_USE_ELF_REL=y
|
||||
# CONFIG_MT753X_GSW is not set
|
||||
CONFIG_MTD_BLOCK2MTD=y
|
||||
CONFIG_MTD_CMDLINE_PARTS=y
|
||||
CONFIG_MTD_SPI_NOR=y
|
||||
CONFIG_MTD_SPLIT_FIRMWARE=y
|
||||
CONFIG_MTD_SPLIT_UIMAGE_FW=y
|
||||
CONFIG_MTD_UBI=y
|
||||
CONFIG_MTD_UBI_BEB_LIMIT=20
|
||||
CONFIG_MTD_UBI_BLOCK=y
|
||||
# CONFIG_MTD_UBI_FASTMAP is not set
|
||||
# CONFIG_MTD_UBI_GLUEBI is not set
|
||||
CONFIG_MTD_UBI_WL_THRESHOLD=4096
|
||||
# CONFIG_MTK_CMDQ is not set
|
||||
# CONFIG_MTK_CQDMA is not set
|
||||
CONFIG_MTK_EFUSE=y
|
||||
# CONFIG_MTK_HSDMA is not set
|
||||
CONFIG_MTK_INFRACFG=y
|
||||
# CONFIG_MTK_IOMMU is not set
|
||||
# CONFIG_MTK_IOMMU_V1 is not set
|
||||
CONFIG_MTK_PMIC_WRAP=y
|
||||
CONFIG_MTK_SCPSYS=y
|
||||
CONFIG_MTK_THERMAL=y
|
||||
CONFIG_MTK_TIMER=y
|
||||
# CONFIG_MTK_UART_APDMA is not set
|
||||
CONFIG_MUTEX_SPIN_ON_OWNER=y
|
||||
CONFIG_NEED_DMA_MAP_STATE=y
|
||||
CONFIG_NEON=y
|
||||
CONFIG_NET_DEVLINK=y
|
||||
CONFIG_NET_DSA=y
|
||||
CONFIG_NET_DSA_MT7530=y
|
||||
CONFIG_NET_DSA_TAG_MTK=y
|
||||
# CONFIG_NET_DSA_TAG_QCA is not set
|
||||
CONFIG_NET_FLOW_LIMIT=y
|
||||
CONFIG_NET_MEDIATEK_SOC=y
|
||||
CONFIG_NET_SWITCHDEV=y
|
||||
# CONFIG_NET_VENDOR_AURORA is not set
|
||||
CONFIG_NET_VENDOR_MEDIATEK=y
|
||||
# CONFIG_NET_VENDOR_WIZNET is not set
|
||||
CONFIG_NLS=y
|
||||
CONFIG_NO_HZ=y
|
||||
CONFIG_NO_HZ_COMMON=y
|
||||
CONFIG_NO_HZ_IDLE=y
|
||||
CONFIG_NR_CPUS=4
|
||||
CONFIG_NVMEM=y
|
||||
# CONFIG_NVMEM_REBOOT_MODE is not set
|
||||
CONFIG_NVMEM_SYSFS=y
|
||||
CONFIG_OF=y
|
||||
CONFIG_OF_ADDRESS=y
|
||||
CONFIG_OF_EARLY_FLATTREE=y
|
||||
CONFIG_OF_FLATTREE=y
|
||||
CONFIG_OF_GPIO=y
|
||||
CONFIG_OF_IRQ=y
|
||||
CONFIG_OF_KOBJ=y
|
||||
CONFIG_OF_MDIO=y
|
||||
CONFIG_OF_NET=y
|
||||
CONFIG_OLD_SIGACTION=y
|
||||
CONFIG_OLD_SIGSUSPEND3=y
|
||||
CONFIG_PADATA=y
|
||||
CONFIG_PAGE_OFFSET=0xC0000000
|
||||
CONFIG_PCI=y
|
||||
CONFIG_PCIEAER=y
|
||||
CONFIG_PCIEPORTBUS=y
|
||||
CONFIG_PCIE_MEDIATEK=y
|
||||
CONFIG_PCIE_PME=y
|
||||
CONFIG_PCI_DOMAINS=y
|
||||
CONFIG_PCI_DOMAINS_GENERIC=y
|
||||
# CONFIG_PCI_MESON is not set
|
||||
CONFIG_PCI_MSI=y
|
||||
CONFIG_PCI_MSI_IRQ_DOMAIN=y
|
||||
# CONFIG_PCI_V3_SEMI is not set
|
||||
CONFIG_PERF_USE_VMALLOC=y
|
||||
CONFIG_PGTABLE_LEVELS=2
|
||||
CONFIG_PHYLIB=y
|
||||
CONFIG_PHYLINK=y
|
||||
CONFIG_PHY_MTK_TPHY=y
|
||||
# CONFIG_PHY_MTK_UFS is not set
|
||||
# CONFIG_PHY_MTK_XSPHY is not set
|
||||
CONFIG_PINCTRL=y
|
||||
CONFIG_PINCTRL_MT2701=y
|
||||
CONFIG_PINCTRL_MT6397=y
|
||||
CONFIG_PINCTRL_MT7623=y
|
||||
CONFIG_PINCTRL_MTK=y
|
||||
CONFIG_PINCTRL_MTK_MOORE=y
|
||||
CONFIG_PM=y
|
||||
CONFIG_PM_CLK=y
|
||||
# CONFIG_PM_DEBUG is not set
|
||||
CONFIG_PM_GENERIC_DOMAINS=y
|
||||
CONFIG_PM_GENERIC_DOMAINS_OF=y
|
||||
CONFIG_PM_GENERIC_DOMAINS_SLEEP=y
|
||||
CONFIG_PM_OPP=y
|
||||
CONFIG_PM_SLEEP=y
|
||||
CONFIG_PM_SLEEP_SMP=y
|
||||
CONFIG_POWER_RESET=y
|
||||
CONFIG_POWER_SUPPLY=y
|
||||
CONFIG_POWER_SUPPLY_HWMON=y
|
||||
CONFIG_PREEMPT=y
|
||||
CONFIG_PREEMPTION=y
|
||||
CONFIG_PREEMPT_COUNT=y
|
||||
# CONFIG_PREEMPT_NONE is not set
|
||||
CONFIG_PREEMPT_RCU=y
|
||||
CONFIG_PRINTK_TIME=y
|
||||
CONFIG_PWM=y
|
||||
CONFIG_PWM_MEDIATEK=y
|
||||
# CONFIG_PWM_MTK_DISP is not set
|
||||
CONFIG_PWM_SYSFS=y
|
||||
# CONFIG_QCOM_SPMI_ADC5 is not set
|
||||
CONFIG_RAS=y
|
||||
CONFIG_RATIONAL=y
|
||||
CONFIG_RCU_CPU_STALL_TIMEOUT=21
|
||||
# CONFIG_RCU_EXPERT is not set
|
||||
CONFIG_RCU_NEED_SEGCBLIST=y
|
||||
CONFIG_RCU_STALL_COMMON=y
|
||||
CONFIG_REFCOUNT_FULL=y
|
||||
CONFIG_REGMAP=y
|
||||
CONFIG_REGMAP_I2C=y
|
||||
CONFIG_REGMAP_MMIO=y
|
||||
CONFIG_REGMAP_SPI=y
|
||||
CONFIG_REGULATOR=y
|
||||
CONFIG_REGULATOR_FIXED_VOLTAGE=y
|
||||
CONFIG_REGULATOR_GPIO=y
|
||||
CONFIG_REGULATOR_MT6323=y
|
||||
# CONFIG_REGULATOR_MT6380 is not set
|
||||
# CONFIG_REGULATOR_MT6397 is not set
|
||||
# CONFIG_REGULATOR_QCOM_SPMI is not set
|
||||
CONFIG_RESET_CONTROLLER=y
|
||||
CONFIG_RFS_ACCEL=y
|
||||
CONFIG_RPS=y
|
||||
CONFIG_RTC_CLASS=y
|
||||
# CONFIG_RTC_DRV_MT6397 is not set
|
||||
# CONFIG_RTC_DRV_MT7622 is not set
|
||||
CONFIG_RTC_I2C_AND_SPI=y
|
||||
CONFIG_RWSEM_SPIN_ON_OWNER=y
|
||||
# CONFIG_SENSORS_OCC_P8_I2C is not set
|
||||
# CONFIG_SERIAL_8250_DMA is not set
|
||||
CONFIG_SERIAL_8250_FSL=y
|
||||
CONFIG_SERIAL_8250_MT6577=y
|
||||
CONFIG_SERIAL_8250_NR_UARTS=4
|
||||
CONFIG_SERIAL_8250_RUNTIME_UARTS=4
|
||||
CONFIG_SERIAL_MCTRL_GPIO=y
|
||||
CONFIG_SGL_ALLOC=y
|
||||
CONFIG_SMP=y
|
||||
# CONFIG_SMP_ON_UP is not set
|
||||
CONFIG_SPARSE_IRQ=y
|
||||
CONFIG_SPI=y
|
||||
CONFIG_SPI_BITBANG=y
|
||||
CONFIG_SPI_MASTER=y
|
||||
CONFIG_SPI_MEM=y
|
||||
CONFIG_SPI_MT65XX=y
|
||||
CONFIG_SPMI=y
|
||||
CONFIG_SRCU=y
|
||||
# CONFIG_STRIP_ASM_SYMS is not set
|
||||
CONFIG_SUSPEND=y
|
||||
CONFIG_SUSPEND_FREEZER=y
|
||||
CONFIG_SWCONFIG=y
|
||||
CONFIG_SWPHY=y
|
||||
CONFIG_SWP_EMULATE=y
|
||||
CONFIG_SYS_SUPPORTS_APM_EMULATION=y
|
||||
CONFIG_TASKS_RCU=y
|
||||
CONFIG_THERMAL=y
|
||||
CONFIG_THERMAL_DEFAULT_GOV_STEP_WISE=y
|
||||
CONFIG_THERMAL_EMERGENCY_POWEROFF_DELAY_MS=0
|
||||
CONFIG_THERMAL_GOV_STEP_WISE=y
|
||||
CONFIG_THERMAL_OF=y
|
||||
# CONFIG_THUMB2_KERNEL is not set
|
||||
CONFIG_TICK_CPU_ACCOUNTING=y
|
||||
CONFIG_TIMER_OF=y
|
||||
CONFIG_TIMER_PROBE=y
|
||||
# CONFIG_TI_CPSW_PHY_SEL is not set
|
||||
CONFIG_TREE_SRCU=y
|
||||
# CONFIG_TRUSTED_FOUNDATIONS is not set
|
||||
CONFIG_UBIFS_FS=y
|
||||
# CONFIG_UBIFS_FS_ADVANCED_COMPR is not set
|
||||
CONFIG_UBIFS_FS_LZO=y
|
||||
CONFIG_UBIFS_FS_ZLIB=y
|
||||
CONFIG_UBIFS_FS_ZSTD=y
|
||||
CONFIG_UEVENT_HELPER_PATH=""
|
||||
CONFIG_UNCOMPRESS_INCLUDE="debug/uncompress.h"
|
||||
CONFIG_UNINLINE_SPIN_UNLOCK=y
|
||||
CONFIG_UNWINDER_ARM=y
|
||||
# CONFIG_UNWINDER_FRAME_POINTER is not set
|
||||
CONFIG_USB=y
|
||||
CONFIG_USB_COMMON=y
|
||||
# CONFIG_USB_EHCI_HCD is not set
|
||||
CONFIG_USB_SUPPORT=y
|
||||
CONFIG_USB_XHCI_HCD=y
|
||||
CONFIG_USB_XHCI_MTK=y
|
||||
CONFIG_USB_XHCI_PLATFORM=y
|
||||
CONFIG_USE_OF=y
|
||||
CONFIG_VFP=y
|
||||
CONFIG_VFPv3=y
|
||||
CONFIG_VM_EVENT_COUNTERS=y
|
||||
CONFIG_WATCHDOG_CORE=y
|
||||
CONFIG_XPS=y
|
||||
CONFIG_XXHASH=y
|
||||
CONFIG_XZ_DEC_ARM=y
|
||||
CONFIG_XZ_DEC_BCJ=y
|
||||
CONFIG_ZBOOT_ROM_BSS=0
|
||||
CONFIG_ZBOOT_ROM_TEXT=0
|
||||
CONFIG_ZLIB_DEFLATE=y
|
||||
CONFIG_ZLIB_INFLATE=y
|
||||
CONFIG_ZSTD_COMPRESS=y
|
||||
CONFIG_ZSTD_DECOMPRESS=y
|
||||
|
|
@ -0,0 +1,23 @@
|
|||
--- a/arch/arm/boot/dts/mt7623n-bananapi-bpi-r2.dts 2018-12-26 16:53:06.778501203 +0100
|
||||
+++ b/arch/arm/boot/dts/mt7623n-bananapi-bpi-r2.dts 2018-12-26 16:55:46.280213376 +0100
|
||||
@@ -22,6 +22,7 @@
|
||||
};
|
||||
|
||||
memory {
|
||||
- reg = <0 0x80000000 0 0x20000000>;
|
||||
+ device_type = "memory";
|
||||
+ reg = <0 0x80000000 0 0x80000000>;
|
||||
};
|
||||
|
||||
@@ -115,11 +116,6 @@
|
||||
};
|
||||
};
|
||||
|
||||
- memory@80000000 {
|
||||
- device_type = "memory";
|
||||
- reg = <0 0x80000000 0 0x40000000>;
|
||||
- };
|
||||
-
|
||||
mt7530: switch@0 {
|
||||
compatible = "mediatek,mt7530";
|
||||
};
|
||||
|
|
@ -0,0 +1,27 @@
|
|||
Index: linux-4.14.51/arch/arm/boot/dts/mt7623n-bananapi-bpi-r2.dts
|
||||
===================================================================
|
||||
--- linux-4.14.51.orig/arch/arm/boot/dts/mt7623n-bananapi-bpi-r2.dts
|
||||
+++ linux-4.14.51/arch/arm/boot/dts/mt7623n-bananapi-bpi-r2.dts
|
||||
@@ -87,19 +87,19 @@
|
||||
|
||||
blue {
|
||||
label = "bpi-r2:pio:blue";
|
||||
- gpios = <&pio 241 GPIO_ACTIVE_HIGH>;
|
||||
+ gpios = <&pio 240 GPIO_ACTIVE_LOW>;
|
||||
default-state = "off";
|
||||
};
|
||||
|
||||
green {
|
||||
label = "bpi-r2:pio:green";
|
||||
- gpios = <&pio 240 GPIO_ACTIVE_HIGH>;
|
||||
+ gpios = <&pio 241 GPIO_ACTIVE_LOW>;
|
||||
default-state = "off";
|
||||
};
|
||||
|
||||
red {
|
||||
label = "bpi-r2:pio:red";
|
||||
- gpios = <&pio 239 GPIO_ACTIVE_HIGH>;
|
||||
+ gpios = <&pio 239 GPIO_ACTIVE_LOW>;
|
||||
default-state = "off";
|
||||
};
|
||||
};
|
||||
48
root/target/linux/mediatek/patches-4.14/0230-update-pcie-for-bpi-r2.patch
Executable file
48
root/target/linux/mediatek/patches-4.14/0230-update-pcie-for-bpi-r2.patch
Executable file
|
|
@ -0,0 +1,48 @@
|
|||
Index: linux-4.14.51/arch/arm/boot/dts/mt7623n-bananapi-bpi-r2.dts
|
||||
===================================================================
|
||||
--- linux-4.14.51.orig/arch/arm/boot/dts/mt7623n-bananapi-bpi-r2.dts
|
||||
+++ linux-4.14.51/arch/arm/boot/dts/mt7623n-bananapi-bpi-r2.dts
|
||||
@@ -266,6 +266,28 @@
|
||||
vqmmc-supply = <&mt6323_vio18_reg>;
|
||||
};
|
||||
|
||||
+&pcie {
|
||||
+ pinctrl-names = "default";
|
||||
+ pinctrl-0 = <&pcie_default>;
|
||||
+ status = "okay";
|
||||
+
|
||||
+ pcie@0,0 {
|
||||
+ status = "okay";
|
||||
+ };
|
||||
+
|
||||
+ pcie@1,0 {
|
||||
+ status = "okay";
|
||||
+ };
|
||||
+};
|
||||
+
|
||||
+&pcie0_phy {
|
||||
+ status = "okay";
|
||||
+};
|
||||
+
|
||||
+&pcie1_phy {
|
||||
+ status = "okay";
|
||||
+};
|
||||
+
|
||||
&pio {
|
||||
cir_pins_a:cir@0 {
|
||||
pins_cir {
|
||||
@@ -433,6 +455,14 @@
|
||||
};
|
||||
};
|
||||
|
||||
+ pcie_default: pcie_pin_default {
|
||||
+ pins_cmd_dat {
|
||||
+ pinmux = <MT7623_PIN_208_AUD_EXT_CK1_FUNC_PCIE0_PERST_N>,
|
||||
+ <MT7623_PIN_209_AUD_EXT_CK2_FUNC_PCIE1_PERST_N>;
|
||||
+ bias-disable;
|
||||
+ };
|
||||
+ };
|
||||
+
|
||||
pwm_pins_a: pwm@0 {
|
||||
pins_pwm {
|
||||
pinmux = <MT7623_PIN_203_PWM0_FUNC_PWM0>,
|
||||
22
root/target/linux/mediatek/patches-4.14/0231-enable-trgmii-on-bpi-r2.patch
Executable file
22
root/target/linux/mediatek/patches-4.14/0231-enable-trgmii-on-bpi-r2.patch
Executable file
|
|
@ -0,0 +1,22 @@
|
|||
Index: linux-4.14.51/arch/arm/boot/dts/mt7623n-bananapi-bpi-r2.dts
|
||||
===================================================================
|
||||
--- linux-4.14.51.orig/arch/arm/boot/dts/mt7623n-bananapi-bpi-r2.dts
|
||||
+++ linux-4.14.51/arch/arm/boot/dts/mt7623n-bananapi-bpi-r2.dts
|
||||
@@ -141,7 +141,7 @@
|
||||
gmac1: mac@1 {
|
||||
compatible = "mediatek,eth-mac";
|
||||
reg = <1>;
|
||||
- phy-mode = "rgmii";
|
||||
+ phy-mode = "trgmii";
|
||||
|
||||
fixed-link {
|
||||
speed = <1000>;
|
||||
@@ -206,7 +206,7 @@
|
||||
reg = <5>;
|
||||
label = "cpu";
|
||||
ethernet = <&gmac1>;
|
||||
- phy-mode = "rgmii";
|
||||
+ phy-mode = "trgmii";
|
||||
|
||||
fixed-link {
|
||||
speed = <1000>;
|
||||
217327
root/target/linux/mediatek/patches-4.14/0232-merge-mt6625l-wifi-driver.patch
Executable file
217327
root/target/linux/mediatek/patches-4.14/0232-merge-mt6625l-wifi-driver.patch
Executable file
File diff suppressed because it is too large
Load diff
|
|
@ -0,0 +1,35 @@
|
|||
From 16c20209050ce9dc0d67e256c3dfba902868c3ed Mon Sep 17 00:00:00 2001
|
||||
From: Nikolay Amiantov <ab@fmap.me>
|
||||
Date: Tue, 3 Jul 2018 12:40:04 +0000
|
||||
Subject: [PATCH] Revert "fs: unexport vfs_read and vfs_write"
|
||||
|
||||
This reverts commit bd8df82be66698042d11e7919e244c8d72b042ca.
|
||||
---
|
||||
fs/read_write.c | 4 ++++
|
||||
1 file changed, 4 insertions(+)
|
||||
|
||||
diff --git a/fs/read_write.c b/fs/read_write.c
|
||||
index 0046d72efe94..62b9c341afa9 100644
|
||||
--- a/fs/read_write.c
|
||||
+++ b/fs/read_write.c
|
||||
@@ -455,6 +455,8 @@ ssize_t vfs_read(struct file *file, char __user *buf, size_t count, loff_t *pos)
|
||||
return ret;
|
||||
}
|
||||
|
||||
+EXPORT_SYMBOL(vfs_read);
|
||||
+
|
||||
static ssize_t new_sync_write(struct file *filp, const char __user *buf, size_t len, loff_t *ppos)
|
||||
{
|
||||
struct iovec iov = { .iov_base = (void __user *)buf, .iov_len = len };
|
||||
@@ -553,6 +555,8 @@ ssize_t vfs_write(struct file *file, const char __user *buf, size_t count, loff_
|
||||
return ret;
|
||||
}
|
||||
|
||||
+EXPORT_SYMBOL(vfs_write);
|
||||
+
|
||||
static inline loff_t file_pos_read(struct file *file)
|
||||
{
|
||||
return file->f_pos;
|
||||
--
|
||||
2.17.1
|
||||
|
||||
127
root/target/linux/mediatek/patches-4.14/0234-fix-mtk-wlan_gen2-module.patch
Executable file
127
root/target/linux/mediatek/patches-4.14/0234-fix-mtk-wlan_gen2-module.patch
Executable file
|
|
@ -0,0 +1,127 @@
|
|||
Index: linux-4.14.51/drivers/misc/mediatek/connectivity/common/conn_soc/mt7623/mtk_wcn_consys_hw.c
|
||||
===================================================================
|
||||
--- linux-4.14.51.orig/drivers/misc/mediatek/connectivity/common/conn_soc/mt7623/mtk_wcn_consys_hw.c
|
||||
+++ linux-4.14.51/drivers/misc/mediatek/connectivity/common/conn_soc/mt7623/mtk_wcn_consys_hw.c
|
||||
@@ -519,6 +519,9 @@ INT32 mtk_wcn_consys_hw_wifi_paldo_ctrl(
|
||||
}
|
||||
|
||||
#endif
|
||||
+
|
||||
+EXPORT_SYMBOL(mtk_wcn_consys_hw_wifi_paldo_ctrl);
|
||||
+
|
||||
INT32 mtk_wcn_consys_hw_vcn28_ctrl(UINT32 enable)
|
||||
{
|
||||
if (enable) {
|
||||
Index: linux-4.14.51/drivers/misc/mediatek/connectivity/wlan/gen2/os/linux/gl_kal.c
|
||||
===================================================================
|
||||
--- linux-4.14.51.orig/drivers/misc/mediatek/connectivity/wlan/gen2/os/linux/gl_kal.c
|
||||
+++ linux-4.14.51/drivers/misc/mediatek/connectivity/wlan/gen2/os/linux/gl_kal.c
|
||||
@@ -4530,13 +4530,10 @@ INT_32 kalHaltLock(UINT_32 waitMs)
|
||||
DBGLOG(INIT, ERROR,
|
||||
"kalIoctl was executed longer than %u ms, show backtrace of tx_thread!\n",
|
||||
kalGetTimeTick() - rHaltCtrl.u4HoldStart);
|
||||
- if (prGlueInfo)
|
||||
- show_stack(prGlueInfo->main_thread, NULL);
|
||||
} else {
|
||||
DBGLOG(INIT, ERROR, "halt lock held by %s pid %d longer than %u ms!\n",
|
||||
rHaltCtrl.owner->comm, rHaltCtrl.owner->pid,
|
||||
kalGetTimeTick() - rHaltCtrl.u4HoldStart);
|
||||
- show_stack(rHaltCtrl.owner, NULL);
|
||||
}
|
||||
return i4Ret;
|
||||
}
|
||||
Index: linux-4.14.51/drivers/misc/mediatek/connectivity/wlan/gen2/os/linux/gl_rst.c
|
||||
===================================================================
|
||||
--- linux-4.14.51.orig/drivers/misc/mediatek/connectivity/wlan/gen2/os/linux/gl_rst.c
|
||||
+++ linux-4.14.51/drivers/misc/mediatek/connectivity/wlan/gen2/os/linux/gl_rst.c
|
||||
@@ -58,7 +58,6 @@
|
||||
********************************************************************************
|
||||
*/
|
||||
BOOLEAN fgIsResetting = FALSE;
|
||||
-UINT_32 g_IsNeedDoChipReset = 0;
|
||||
|
||||
/*******************************************************************************
|
||||
* P R I V A T E D A T A
|
||||
Index: linux-4.14.51/drivers/misc/mediatek/connectivity/common/conn_soc/linux/pub/wmt_chrdev_wifi.c
|
||||
===================================================================
|
||||
--- linux-4.14.51.orig/drivers/misc/mediatek/connectivity/common/conn_soc/linux/pub/wmt_chrdev_wifi.c
|
||||
+++ linux-4.14.51/drivers/misc/mediatek/connectivity/common/conn_soc/linux/pub/wmt_chrdev_wifi.c
|
||||
@@ -44,6 +44,9 @@ MODULE_LICENSE("Dual BSD/GPL");
|
||||
#define WIFI_LOG_WARN 1
|
||||
#define WIFI_LOG_ERR 0
|
||||
|
||||
+UINT32 g_IsNeedDoChipReset = 0;
|
||||
+EXPORT_SYMBOL(g_IsNeedDoChipReset);
|
||||
+
|
||||
UINT32 gDbgLevel = WIFI_LOG_DBG;
|
||||
|
||||
#define WIFI_DBG_FUNC(fmt, arg...)\
|
||||
Index: linux-4.14.51/drivers/misc/mediatek/connectivity/common/conn_soc/linux/pub/Makefile
|
||||
===================================================================
|
||||
--- linux-4.14.51.orig/drivers/misc/mediatek/connectivity/common/conn_soc/linux/pub/Makefile
|
||||
+++ linux-4.14.51/drivers/misc/mediatek/connectivity/common/conn_soc/linux/pub/Makefile
|
||||
@@ -21,7 +21,11 @@ endif
|
||||
obj-y += osal.o \
|
||||
bgw_desense.o \
|
||||
wmt_idc.o
|
||||
-obj-$(CONFIG_MTK_COMBO_BT) += stp_chrdev_bt.o
|
||||
-obj-$(CONFIG_MTK_COMBO_WIFI) += wmt_chrdev_wifi.o
|
||||
+ifneq ($(CONFIG_MTK_COMBO_BT),)
|
||||
+ obj-y += stp_chrdev_bt.o
|
||||
+endif
|
||||
+ifneq ($(CONFIG_MTK_COMBO_WIFI),)
|
||||
+ obj-y += wmt_chrdev_wifi.o
|
||||
+endif
|
||||
|
||||
endif
|
||||
Index: linux-4.14.51/drivers/misc/mediatek/connectivity/common/common_detect/drv_init/wlan_drv_init.c
|
||||
===================================================================
|
||||
--- linux-4.14.51.orig/drivers/misc/mediatek/connectivity/common/common_detect/drv_init/wlan_drv_init.c
|
||||
+++ linux-4.14.51/drivers/misc/mediatek/connectivity/common/common_detect/drv_init/wlan_drv_init.c
|
||||
@@ -25,7 +25,7 @@ int do_wlan_drv_init(int chip_id)
|
||||
{
|
||||
int i_ret = 0;
|
||||
|
||||
-#ifdef CONFIG_MTK_COMBO_WIFI
|
||||
+#ifdef MTK_WIFI_ENABLED
|
||||
int ret = 0;
|
||||
|
||||
WMT_DETECT_INFO_FUNC("start to do wlan module init 0x%x\n", chip_id);
|
||||
@@ -35,6 +35,7 @@ int do_wlan_drv_init(int chip_id)
|
||||
WMT_DETECT_INFO_FUNC("WMT-WIFI char dev init, ret:%d\n", ret);
|
||||
i_ret += ret;
|
||||
|
||||
+#ifdef CONFIG_MTK_COMBO_WIFI
|
||||
switch (chip_id) {
|
||||
case 0x6630:
|
||||
case 0x6797:
|
||||
@@ -61,13 +62,10 @@ int do_wlan_drv_init(int chip_id)
|
||||
#endif
|
||||
break;
|
||||
}
|
||||
-
|
||||
+#endif
|
||||
WMT_DETECT_INFO_FUNC("finish wlan module init\n");
|
||||
-
|
||||
#else
|
||||
-
|
||||
WMT_DETECT_INFO_FUNC("CONFIG_MTK_COMBO_WIFI is not defined\n");
|
||||
-
|
||||
#endif
|
||||
|
||||
return i_ret;
|
||||
Index: linux-4.14.51/drivers/misc/mediatek/connectivity/common/common_detect/drv_init/Makefile
|
||||
===================================================================
|
||||
--- linux-4.14.51.orig/drivers/misc/mediatek/connectivity/common/common_detect/drv_init/Makefile
|
||||
+++ linux-4.14.51/drivers/misc/mediatek/connectivity/common/common_detect/drv_init/Makefile
|
||||
@@ -11,6 +11,10 @@ else ifneq ($(filter "CONSYS_%",$(CONFIG
|
||||
ccflags-y += -D MTK_WCN_WLAN_GEN2
|
||||
endif
|
||||
|
||||
+ifneq ($(CONFIG_MTK_COMBO_WIFI),)
|
||||
+ ccflags-y += -D MTK_WIFI_ENABLED
|
||||
+endif
|
||||
+
|
||||
obj-y += conn_drv_init.o
|
||||
obj-y += common_drv_init.o
|
||||
obj-y += bluetooth_drv_init.o
|
||||
|
|
@ -0,0 +1,12 @@
|
|||
Index: linux-4.14.51/drivers/watchdog/mtk_wdt.c
|
||||
===================================================================
|
||||
--- linux-4.14.51.orig/drivers/watchdog/mtk_wdt.c
|
||||
+++ linux-4.14.51/drivers/watchdog/mtk_wdt.c
|
||||
@@ -236,7 +236,6 @@ static int mtk_wdt_ping(struct watchdog_
|
||||
void __iomem *wdt_base = mtk_wdt->wdt_base;
|
||||
|
||||
iowrite32(WDT_RST_RELOAD, wdt_base + WDT_RST);
|
||||
- printk_deferred("[WDK]: kick Ex WDT\n");
|
||||
|
||||
return 0;
|
||||
}
|
||||
13
root/target/linux/mediatek/patches-4.14/0236-mt6625l-rename-wlan.patch
Executable file
13
root/target/linux/mediatek/patches-4.14/0236-mt6625l-rename-wlan.patch
Executable file
|
|
@ -0,0 +1,13 @@
|
|||
Index: linux-4.14.51/drivers/misc/mediatek/connectivity/common/conn_soc/linux/pub/wmt_chrdev_wifi.c
|
||||
===================================================================
|
||||
--- linux-4.14.51.orig/drivers/misc/mediatek/connectivity/common/conn_soc/linux/pub/wmt_chrdev_wifi.c
|
||||
+++ linux-4.14.51/drivers/misc/mediatek/connectivity/common/conn_soc/linux/pub/wmt_chrdev_wifi.c
|
||||
@@ -62,7 +62,7 @@ UINT32 gDbgLevel = WIFI_LOG_DBG;
|
||||
|
||||
#define VERSION "1.0"
|
||||
|
||||
-#define WLAN_IFACE_NAME "wlan0"
|
||||
+#define WLAN_IFACE_NAME "mtkwlan0"
|
||||
#if CFG_TC1_FEATURE
|
||||
#define LEGACY_IFACE_NAME "legacy0"
|
||||
#endif
|
||||
1824
root/target/linux/mediatek/patches-4.14/0237-mt7623-add-HNAT-support.patch
Executable file
1824
root/target/linux/mediatek/patches-4.14/0237-mt7623-add-HNAT-support.patch
Executable file
File diff suppressed because it is too large
Load diff
|
|
@ -0,0 +1,747 @@
|
|||
From 8196b5b6d823fb8c61268121052826db7fb6ce3c Mon Sep 17 00:00:00 2001
|
||||
From: Frank Wunderlich <frank-w@public-files.de>
|
||||
Date: Mon, 22 Oct 2018 19:06:10 +0200
|
||||
Subject: [PATCH 01/77] adding defconfig and build-script, change gitignore,
|
||||
making kernel compatible with r2-images
|
||||
|
||||
---
|
||||
arch/arm/boot/dts/mt7623.dtsi | 42 +-
|
||||
arch/arm/configs/mt7623n_evb_fwu_defconfig | 651 +++++++++++++++++++++
|
||||
4 files changed, 1200 insertions(+), 22 deletions(-)
|
||||
create mode 100644 arch/arm/configs/mt7623n_evb_fwu_defconfig
|
||||
|
||||
diff --git a/arch/arm/boot/dts/mt7623.dtsi b/arch/arm/boot/dts/mt7623.dtsi
|
||||
index 1cdc346a05e8..04228cf9ddbb 100644
|
||||
--- a/arch/arm/boot/dts/mt7623.dtsi
|
||||
+++ b/arch/arm/boot/dts/mt7623.dtsi
|
||||
@@ -354,6 +354,17 @@
|
||||
#io-channel-cells = <1>;
|
||||
};
|
||||
|
||||
+ uart2: serial@11004000 {
|
||||
+ compatible = "mediatek,mt7623-uart",
|
||||
+ "mediatek,mt6577-uart";
|
||||
+ reg = <0 0x11004000 0 0x400>;
|
||||
+ interrupts = <GIC_SPI 53 IRQ_TYPE_LEVEL_LOW>;
|
||||
+ clocks = <&pericfg CLK_PERI_UART2_SEL>,
|
||||
+ <&pericfg CLK_PERI_UART2>;
|
||||
+ clock-names = "baud", "bus";
|
||||
+ status = "disabled";
|
||||
+ };
|
||||
+
|
||||
uart0: serial@11002000 {
|
||||
compatible = "mediatek,mt7623-uart",
|
||||
"mediatek,mt6577-uart";
|
||||
@@ -376,17 +387,6 @@
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
- uart2: serial@11004000 {
|
||||
- compatible = "mediatek,mt7623-uart",
|
||||
- "mediatek,mt6577-uart";
|
||||
- reg = <0 0x11004000 0 0x400>;
|
||||
- interrupts = <GIC_SPI 53 IRQ_TYPE_LEVEL_LOW>;
|
||||
- clocks = <&pericfg CLK_PERI_UART2_SEL>,
|
||||
- <&pericfg CLK_PERI_UART2>;
|
||||
- clock-names = "baud", "bus";
|
||||
- status = "disabled";
|
||||
- };
|
||||
-
|
||||
uart3: serial@11005000 {
|
||||
compatible = "mediatek,mt7623-uart",
|
||||
"mediatek,mt6577-uart";
|
||||
@@ -661,24 +661,24 @@
|
||||
};
|
||||
};
|
||||
|
||||
- mmc0: mmc@11230000 {
|
||||
+ mmc1: mmc@11240000 {
|
||||
compatible = "mediatek,mt7623-mmc",
|
||||
"mediatek,mt2701-mmc";
|
||||
- reg = <0 0x11230000 0 0x1000>;
|
||||
- interrupts = <GIC_SPI 39 IRQ_TYPE_LEVEL_LOW>;
|
||||
- clocks = <&pericfg CLK_PERI_MSDC30_0>,
|
||||
- <&topckgen CLK_TOP_MSDC30_0_SEL>;
|
||||
+ reg = <0 0x11240000 0 0x1000>;
|
||||
+ interrupts = <GIC_SPI 40 IRQ_TYPE_LEVEL_LOW>;
|
||||
+ clocks = <&pericfg CLK_PERI_MSDC30_1>,
|
||||
+ <&topckgen CLK_TOP_MSDC30_1_SEL>;
|
||||
clock-names = "source", "hclk";
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
- mmc1: mmc@11240000 {
|
||||
+ mmc0: mmc@11230000 {
|
||||
compatible = "mediatek,mt7623-mmc",
|
||||
"mediatek,mt2701-mmc";
|
||||
- reg = <0 0x11240000 0 0x1000>;
|
||||
- interrupts = <GIC_SPI 40 IRQ_TYPE_LEVEL_LOW>;
|
||||
- clocks = <&pericfg CLK_PERI_MSDC30_1>,
|
||||
- <&topckgen CLK_TOP_MSDC30_1_SEL>;
|
||||
+ reg = <0 0x11230000 0 0x1000>;
|
||||
+ interrupts = <GIC_SPI 39 IRQ_TYPE_LEVEL_LOW>;
|
||||
+ clocks = <&pericfg CLK_PERI_MSDC30_0>,
|
||||
+ <&topckgen CLK_TOP_MSDC30_0_SEL>;
|
||||
clock-names = "source", "hclk";
|
||||
status = "disabled";
|
||||
};
|
||||
diff --git a/arch/arm/configs/mt7623n_evb_fwu_defconfig b/arch/arm/configs/mt7623n_evb_fwu_defconfig
|
||||
new file mode 100644
|
||||
index 000000000000..09df75013c09
|
||||
--- /dev/null
|
||||
+++ b/arch/arm/configs/mt7623n_evb_fwu_defconfig
|
||||
@@ -0,0 +1,651 @@
|
||||
+CONFIG_LOCALVERSION="-bpi-r2"
|
||||
+CONFIG_LOCALVERSION_AUTO=n
|
||||
+
|
||||
+#spectre/meltdown
|
||||
+CONFIG_PAGE_TABLE_ISOLATION=y
|
||||
+
|
||||
+CONFIG_SYSVIPC=y
|
||||
+CONFIG_IRQ_DOMAIN_DEBUG=y
|
||||
+CONFIG_NO_HZ=y
|
||||
+CONFIG_HIGH_RES_TIMERS=y
|
||||
+CONFIG_CGROUPS=y
|
||||
+CONFIG_NAMESPACES=y
|
||||
+
|
||||
+#for lxc
|
||||
+CONFIG_USER_NS=y
|
||||
+CONFIG_MEMCG=y
|
||||
+CONFIG_CGROUP_CPUACCT=y
|
||||
+CONFIG_CGROUP_DEVICE=y
|
||||
+CONFIG_CGROUP_SCHED=y
|
||||
+CONFIG_CPUSETS=y
|
||||
+#some options for docker
|
||||
+CONFIG_CGROUP_FREEZER=y
|
||||
+CONFIG_POSIX_MQUEUE=y
|
||||
+CONFIG_OVERLAY_FS=y
|
||||
+CONFIG_MEMCG_SWAP=y
|
||||
+CONFIG_MEMCG_SWAP_ENABLED=y
|
||||
+CONFIG_BLK_CGROUP=y
|
||||
+CONFIG_CFS_BANDWIDTH=y
|
||||
+CONFIG_RT_GROUP_SCHED=y
|
||||
+CONFIG_CGROUP_PIDS=y
|
||||
+CONFIG_CGROUP_PERF=y
|
||||
+CONFIG_CGROUP_NET_CLASSID=y
|
||||
+CONFIG_CGROUP_NET_PRIO=y
|
||||
+CONFIG_CFQ_GROUP_IOSCHED=y
|
||||
+
|
||||
+CONFIG_BLK_DEV_INITRD=y
|
||||
+CONFIG_KALLSYMS_ALL=y
|
||||
+CONFIG_EMBEDDED=y
|
||||
+CONFIG_PERF_EVENTS=y
|
||||
+CONFIG_MODULES=y
|
||||
+CONFIG_MODULE_FORCE_LOAD=y
|
||||
+CONFIG_MODULE_UNLOAD=y
|
||||
+CONFIG_PARTITION_ADVANCED=y
|
||||
+CONFIG_CMDLINE_PARTITION=y
|
||||
+CONFIG_ARCH_MEDIATEK=y
|
||||
+CONFIG_ARM_THUMB=y
|
||||
+CONFIG_ARM_THUMBEE=y
|
||||
+CONFIG_ARM_ERRATA_720789=y
|
||||
+CONFIG_ARM_ERRATA_754322=y
|
||||
+CONFIG_ARM_ERRATA_754327=y
|
||||
+CONFIG_ARM_ERRATA_764369=y
|
||||
+CONFIG_ARM_ERRATA_775420=y
|
||||
+CONFIG_ARM_ERRATA_798181=y
|
||||
+
|
||||
+CONFIG_PL310_ERRATA_588369=y
|
||||
+CONFIG_PL310_ERRATA_727915=y
|
||||
+CONFIG_PL310_ERRATA_753970=y
|
||||
+CONFIG_PL310_ERRATA_769419=y
|
||||
+
|
||||
+CONFIG_PCI=y
|
||||
+CONFIG_SMP=y
|
||||
+CONFIG_HAVE_ARM_ARCH_TIMER=y
|
||||
+CONFIG_NR_CPUS=16
|
||||
+CONFIG_AEABI=y
|
||||
+CONFIG_HIGHMEM=y
|
||||
+CONFIG_CMA=y
|
||||
+CONFIG_FORCE_MAX_ZONEORDER=12
|
||||
+CONFIG_ARM_APPENDED_DTB=y
|
||||
+CONFIG_ARM_ATAG_DTB_COMPAT=y
|
||||
+CONFIG_CMDLINE="earlyprintk console=ttyS0,115200 vmalloc=496M debug=7 no_console_suspend"
|
||||
+#CONFIG_CMDLINE_FORCE=y
|
||||
+
|
||||
+CONFIG_IKCONFIG=m
|
||||
+CONFIG_IKCONFIG_PROC=y
|
||||
+
|
||||
+CONFIG_KEXEC=y
|
||||
+
|
||||
+CONFIG_CPU_FREQ=y
|
||||
+CONFIG_CPU_FREQ_STAT=y
|
||||
+CONFIG_CPU_FREQ_DEFAULT_GOV_USERSPACE=y
|
||||
+CONFIG_CPU_FREQ_GOV_PERFORMANCE=y
|
||||
+CONFIG_CPU_FREQ_GOV_POWERSAVE=y
|
||||
+CONFIG_CPU_FREQ_GOV_ONDEMAND=y
|
||||
+CONFIG_CPU_FREQ_GOV_CONSERVATIVE=y
|
||||
+CONFIG_CPU_FREQ_GOV_SCHEDUTIL=y
|
||||
+CONFIG_ARM_MEDIATEK_CPUFREQ=y
|
||||
+
|
||||
+CONFIG_VFP=y
|
||||
+CONFIG_NEON=y
|
||||
+CONFIG_KERNEL_MODE_NEON=y
|
||||
+CONFIG_PM_AUTOSLEEP=y
|
||||
+CONFIG_PM_DEBUG=y
|
||||
+CONFIG_PM_ADVANCED_DEBUG=y
|
||||
+CONFIG_APM_EMULATION=y
|
||||
+
|
||||
+CONFIG_NET=y
|
||||
+CONFIG_DUMMY=m
|
||||
+CONFIG_PACKET=y
|
||||
+CONFIG_UNIX=y
|
||||
+CONFIG_INET=y
|
||||
+CONFIG_IP_PNP=y
|
||||
+CONFIG_IP_PNP_DHCP=y
|
||||
+CONFIG_IP_PNP_BOOTP=y
|
||||
+CONFIG_IP_PNP_RARP=y
|
||||
+CONFIG_IPV6_ROUTER_PREF=y
|
||||
+CONFIG_IPV6_OPTIMISTIC_DAD=y
|
||||
+CONFIG_INET6_AH=m
|
||||
+CONFIG_INET6_ESP=m
|
||||
+CONFIG_INET6_IPCOMP=m
|
||||
+CONFIG_IPV6_MIP6=m
|
||||
+CONFIG_IPV6_TUNNEL=m
|
||||
+CONFIG_IPV6_MULTIPLE_TABLES=y
|
||||
+CONFIG_BRIDGE=y
|
||||
+CONFIG_NET_DSA=y
|
||||
+CONFIG_VLAN_8021Q=y
|
||||
+CONFIG_NETLINK_DIAG=y
|
||||
+CONFIG_INET_UDP_DIAG=m
|
||||
+CONFIG_NET_IPIP=m
|
||||
+CONFIG_IP_MULTICAST=y
|
||||
+CONFIG_IP_MROUTE=y
|
||||
+CONFIG_IP_PIMSM_V1=y
|
||||
+CONFIG_IP_PIMSM_V2=y
|
||||
+
|
||||
+#added for lxc
|
||||
+CONFIG_UNIX_DIAG=m
|
||||
+CONFIG_PACKET_DIAG=m
|
||||
+
|
||||
+
|
||||
+CONFIG_IPV6=m
|
||||
+CONFIG_NETFILTER=y
|
||||
+CONFIG_NF_CONNTRACK=m
|
||||
+CONFIG_NF_CONNTRACK_IPV4=m
|
||||
+CONFIG_NF_CONNTRACK_IPV6=m
|
||||
+CONFIG_NETFILTER_NETLINK=m
|
||||
+CONFIG_NF_CT_NETLINK=m
|
||||
+CONFIG_IP_NF_IPTABLES=m
|
||||
+CONFIG_NF_LOG_IPV4=m
|
||||
+CONFIG_NF_REJECT_IPV4=m
|
||||
+CONFIG_IP6_NF_IPTABLES=m
|
||||
+CONFIG_NF_LOG_IPV6=m
|
||||
+CONFIG_NF_REJECT_IPV6=m
|
||||
+CONFIG_IP_NF_NAT=m
|
||||
+CONFIG_IP6_NF_NAT=m
|
||||
+CONFIG_NF_NAT_MASQUERADE_IPV4=m
|
||||
+CONFIG_NF_NAT_MASQUERADE_IPV6=m
|
||||
+CONFIG_IP_NF_FILTER=m
|
||||
+CONFIG_IP6_NF_FILTER=m
|
||||
+CONFIG_IP_NF_TARGET_MASQUERADE=m
|
||||
+CONFIG_IP6_NF_TARGET_MASQUERADE=m
|
||||
+CONFIG_IP_NF_MANGLE=m
|
||||
+CONFIG_IP6_NF_MANGLE=m
|
||||
+CONFIG_IP_NF_TARGET_REJECT=m
|
||||
+CONFIG_IP6_NF_TARGET_REJECT=m
|
||||
+CONFIG_IP6_NF_MATCH_RT=m
|
||||
+
|
||||
+CONFIG_NETFILTER_SYNPROXY=m
|
||||
+CONFIG_IP_NF_TARGET_SYNPROXY=m
|
||||
+CONFIG_IP6_NF_TARGET_SYNPROXY=m
|
||||
+
|
||||
+CONFIG_NETFILTER_XT_TARGET_CHECKSUM=m
|
||||
+CONFIG_NETFILTER_XT_MATCH_LIMIT=m
|
||||
+CONFIG_NETFILTER_XT_MATCH_STATE=m
|
||||
+CONFIG_NETFILTER_XT_TARGET_LOG=m
|
||||
+CONFIG_NETFILTER_XT_TARGET_TCPOPTSTRIP=m
|
||||
+CONFIG_NETFILTER_XT_MATCH_CONNTRACK=m
|
||||
+CONFIG_NETFILTER_XT_MATCH_MAC=m
|
||||
+CONFIG_NETFILTER_XT_MATCH_RECENT=m
|
||||
+CONFIG_NETFILTER_XT_MATCH_IPRANGE=m
|
||||
+CONFIG_NETFILTER_XT_MARK=m
|
||||
+CONFIG_NETFILTER_XT_CONNMARK=m
|
||||
+CONFIG_NETFILTER_XT_MATCH_ADDRTYPE=m
|
||||
+CONFIG_IP_VS=m
|
||||
+CONFIG_NETFILTER_XT_MATCH_IPVS=m
|
||||
+CONFIG_NETFILTER_XT_MATCH_CONNLIMIT=m
|
||||
+
|
||||
+CONFIG_NET_MEDIATEK_HNAT=m
|
||||
+CONFIG_DEBUG_SECTION_MISMATCH=y
|
||||
+
|
||||
+#active ftp-support
|
||||
+CONFIG_NF_CONNTRACK_FTP=m
|
||||
+CONFIG_NF_NAT_FTP=m
|
||||
+
|
||||
+
|
||||
+CONFIG_SYN_COOKIES=y
|
||||
+
|
||||
+CONFIG_PPP=m
|
||||
+CONFIG_PPPOE=m
|
||||
+CONFIG_PPP_FILTER=y
|
||||
+CONFIG_PPP_DEFLATE=m
|
||||
+CONFIG_PPP_MPPE=m
|
||||
+
|
||||
+#veth for lxc
|
||||
+CONFIG_VETH=m
|
||||
+
|
||||
+#for systemd
|
||||
+CONFIG_AF_KCM=y
|
||||
+CONFIG_CGROUP_BPF=y
|
||||
+
|
||||
+CONFIG_DEVTMPFS=y
|
||||
+CONFIG_DEVTMPFS_MOUNT=y
|
||||
+CONFIG_DMA_CMA=y
|
||||
+CONFIG_CMA_SIZE_MBYTES=64
|
||||
+CONFIG_ARM_CCI400_PMU=y
|
||||
+CONFIG_MTD=y
|
||||
+CONFIG_OF_OVERLAY=y
|
||||
+CONFIG_CONFIGFS_FS=m
|
||||
+CONFIG_BLK_DEV_LOOP=y
|
||||
+CONFIG_SRAM=y
|
||||
+CONFIG_EEPROM_93CX6=y
|
||||
+CONFIG_IDE=y
|
||||
+CONFIG_BLK_DEV_SD=y
|
||||
+CONFIG_ATA=y
|
||||
+CONFIG_SATA_AHCI=y
|
||||
+CONFIG_AHCI_MTK=m
|
||||
+
|
||||
+CONFIG_NETDEVICES=y
|
||||
+CONFIG_NET_DSA_MT7530=y
|
||||
+CONFIG_NET_VENDOR_MEDIATEK=y
|
||||
+CONFIG_NET_MEDIATEK_SOC=y
|
||||
+
|
||||
+CONFIG_ICPLUS_PHY=y
|
||||
+CONFIG_INPUT_EVDEV=y
|
||||
+CONFIG_INPUT_EVBUG=m
|
||||
+CONFIG_KEYBOARD_MATRIX=y
|
||||
+CONFIG_KEYBOARD_SAMSUNG=y
|
||||
+CONFIG_KEYBOARD_MTK_PMIC=m
|
||||
+CONFIG_MOUSE_PS2_ELANTECH=y
|
||||
+CONFIG_MOUSE_PS2_SENTELIC=y
|
||||
+CONFIG_INPUT_MOUSEDEV=y
|
||||
+CONFIG_INPUT_MOUSEDEV_PSAUX=y
|
||||
+CONFIG_INPUT_MOUSEDEV_SCREEN_X=1024
|
||||
+CONFIG_INPUT_MOUSEDEV_SCREEN_Y=768
|
||||
+CONFIG_INPUT_TOUCHSCREEN=y
|
||||
+# CONFIG_SERIO_SERPORT is not set
|
||||
+CONFIG_VT_HW_CONSOLE_BINDING=y
|
||||
+CONFIG_SERIAL_8250=y
|
||||
+CONFIG_SERIAL_8250_CONSOLE=y
|
||||
+CONFIG_SERIAL_8250_NR_UARTS=4
|
||||
+CONFIG_SERIAL_8250_RUNTIME_UARTS=4
|
||||
+CONFIG_SERIAL_8250_MT6577=y
|
||||
+CONFIG_SERIAL_8250_BTIF=y
|
||||
+CONFIG_HW_RANDOM=y
|
||||
+CONFIG_I2C=y
|
||||
+CONFIG_I2C_MT65XX=y
|
||||
+CONFIG_PINCTRL_MT2701=y
|
||||
+# CONFIG_PINCTRL_MT6397 is not set
|
||||
+# CONFIG_HWMON is not set
|
||||
+CONFIG_WATCHDOG=y
|
||||
+CONFIG_MEDIATEK_WATCHDOG=y
|
||||
+CONFIG_MFD_MT6397=y
|
||||
+CONFIG_REGULATOR=y
|
||||
+CONFIG_REGULATOR_MT6323=y
|
||||
+CONFIG_REGULATOR_FIXED_VOLTAGE=y
|
||||
+CONFIG_MEDIA_SUPPORT=y
|
||||
+CONFIG_MEDIA_RC_SUPPORT=y
|
||||
+CONFIG_RC_DEVICES=y
|
||||
+CONFIG_IR_MTK=y
|
||||
+CONFIG_MMC=y
|
||||
+CONFIG_MMC_MTK=y
|
||||
+CONFIG_NEW_LEDS=y
|
||||
+CONFIG_LEDS_CLASS=y
|
||||
+CONFIG_LEDS_MT6323=y
|
||||
+CONFIG_LEDS_GPIO=y
|
||||
+CONFIG_LEDS_PCA963X=y
|
||||
+CONFIG_LEDS_TRIGGERS=y
|
||||
+CONFIG_LEDS_TRIGGER_TIMER=y
|
||||
+CONFIG_LEDS_TRIGGER_ONESHOT=y
|
||||
+CONFIG_LEDS_TRIGGER_HEARTBEAT=y
|
||||
+CONFIG_LEDS_TRIGGER_DEFAULT_ON=y
|
||||
+CONFIG_DMADEVICES=y
|
||||
+CONFIG_DMATEST=m
|
||||
+CONFIG_COMMON_CLK_MT2701_HIFSYS=y
|
||||
+CONFIG_COMMON_CLK_MT2701_ETHSYS=y
|
||||
+CONFIG_ARM_TIMER_SP804=y
|
||||
+CONFIG_MTK_IOMMU_V1=y
|
||||
+CONFIG_MTK_PMIC_WRAP=y
|
||||
+CONFIG_IIO=y
|
||||
+CONFIG_RESET_CONTROLLER=y
|
||||
+CONFIG_PHY_MT65XX_USB3=y
|
||||
+CONFIG_PSTORE=y
|
||||
+CONFIG_PSTORE_CONSOLE=y
|
||||
+CONFIG_PSTORE_PMSG=y
|
||||
+CONFIG_PSTORE_FTRACE=y
|
||||
+CONFIG_PSTORE_RAM=y
|
||||
+CONFIG_PRINTK_TIME=y
|
||||
+CONFIG_DYNAMIC_DEBUG=y
|
||||
+CONFIG_DEBUG_INFO=y
|
||||
+CONFIG_MAGIC_SYSRQ=y
|
||||
+CONFIG_DETECT_HUNG_TASK=y
|
||||
+CONFIG_DEBUG_LIST=y
|
||||
+CONFIG_FUNCTION_TRACER=y
|
||||
+CONFIG_FTRACE_SYSCALLS=y
|
||||
+CONFIG_FUNCTION_PROFILER=y
|
||||
+CONFIG_DEBUG_LL=y
|
||||
+CONFIG_DEBUG_UART_PHYS=0x11002000
|
||||
+CONFIG_DEBUG_UART_VIRT=0xf1002000
|
||||
+CONFIG_KEYS=y
|
||||
+CONFIG_CRYPTO_RSA=y
|
||||
+CONFIG_CRYPTO_CCM=m
|
||||
+CONFIG_CRYPTO_GCM=m
|
||||
+CONFIG_CRYPTO_ECB=m
|
||||
+CONFIG_CRYPTO_CMAC=m
|
||||
+CONFIG_CRYPTO_ARC4=m
|
||||
+CONFIG_CRYPTO_DEFLATE=y
|
||||
+CONFIG_CRYPTO_LZO=y
|
||||
+CONFIG_CRC_CCITT=m
|
||||
+CONFIG_CRC_ITU_T=m
|
||||
+CONFIG_CRYPTO_DEV_MEDIATEK=y
|
||||
+
|
||||
+#ARM Accelerated Cryptographic Algorithms
|
||||
+CONFIG_ARM_CRYPTO=y
|
||||
+CONFIG_CRYPTO_SHA1_ARM=m
|
||||
+CONFIG_CRYPTO_SHA1_ARM_NEON=m
|
||||
+CONFIG_CRYPTO_SHA1_ARM_CE=m
|
||||
+CONFIG_CRYPTO_SHA2_ARM_CE=m
|
||||
+CONFIG_CRYPTO_SHA512_ARM=m
|
||||
+CONFIG_CRYPTO_AES_ARM=m
|
||||
+CONFIG_CRYPTO_AES_ARM_BS=m
|
||||
+CONFIG_CRYPTO_AES_ARM_CE=m
|
||||
+CONFIG_CRYPTO_GHASH_ARM_CE=m
|
||||
+CONFIG_CRYPTO_CRC32_ARM_CE=m
|
||||
+CONFIG_CRYPTO_CHACHA20_NEON=m
|
||||
+
|
||||
+#LVM
|
||||
+CONFIG_MD=y
|
||||
+CONFIG_BLK_DEV_DM=y
|
||||
+CONFIG_DM_BUFIO=y
|
||||
+CONFIG_DM_CRYPT=y
|
||||
+CONFIG_DM_SNAPSHOT=y
|
||||
+CONFIG_DM_MIRROR=y
|
||||
+CONFIG_DM_MULTIPATH=y
|
||||
+CONFIG_DM_MULTIPATH_QL=y
|
||||
+CONFIG_DM_MULTIPATH_ST=y
|
||||
+CONFIG_DM_THIN_PROVISIONING=m
|
||||
+CONFIG_DAX=y
|
||||
+CONFIG_CRYPTO_CBC=y
|
||||
+
|
||||
+#RAID
|
||||
+CONFIG_DM_RAID=y
|
||||
+CONFIG_MD_RAID0=y
|
||||
+CONFIG_MD_RAID1=y
|
||||
+CONFIG_MD_RAID10=y
|
||||
+CONFIG_MD_RAID456=y
|
||||
+
|
||||
+#RamFS
|
||||
+#CONFIG_INITRAMFS_SOURCE="../rootfs_ttys0_rng.cpio.gz"
|
||||
+#CONFIG_INITRAMFS_SOURCE="../initramfs.cpio"
|
||||
+#CONFIG_INITRAMFS_FORCE=y
|
||||
+
|
||||
+#Filesystem
|
||||
+CONFIG_EXT4_FS=y
|
||||
+CONFIG_EXT4_FS_POSIX_ACL=y
|
||||
+CONFIG_EXT4_FS_SECURITY=y
|
||||
+CONFIG_AUTOFS4_FS=y
|
||||
+CONFIG_FUSE_FS=m
|
||||
+CONFIG_MSDOS_FS=m
|
||||
+CONFIG_VFAT_FS=y
|
||||
+CONFIG_NTFS_FS=m
|
||||
+CONFIG_TMPFS=y
|
||||
+CONFIG_TMPFS_POSIX_ACL=y
|
||||
+CONFIG_NLS_CODEPAGE_437=y
|
||||
+CONFIG_NLS_ISO8859_1=y
|
||||
+CONFIG_NLS_UTF8=y
|
||||
+CONFIG_CIFS=m
|
||||
+CONFIG_F2FS_FS=m
|
||||
+CONFIG_BTRFS_FS=m
|
||||
+
|
||||
+#GPIO
|
||||
+CONFIG_DEBUG_FS=y
|
||||
+CONFIG_DEBUG_GPIO=y
|
||||
+CONFIG_GPIO_SYSFS=y
|
||||
+
|
||||
+#wlan
|
||||
+CONFIG_MAC80211=y
|
||||
+CONFIG_CFG80211=y
|
||||
+
|
||||
+#internal wlan (not working yet)
|
||||
+# CONFIG_MTK_CONN_LTE_IDC_SUPPORT is not set
|
||||
+#CONFIG_MTK_COMBO=y
|
||||
+#CONFIG_MTK_COMBO_CHIP_CONSYS_7623=y
|
||||
+#used in 4.4, but should be set in Kconfig by selecting mt7623 COMBO
|
||||
+#CONFIG_MTK_PLATFORM="mt7623"
|
||||
+
|
||||
+#CONFIG_MTK_COMBO_COMM=y
|
||||
+#CONFIG_MTK_COMBO_WIFI=y
|
||||
+#CONFIG_NL80211_TESTMODE=y
|
||||
+
|
||||
+#internal Bluetooth (also not working yet)
|
||||
+#CONFIG_BT=y
|
||||
+#CONFIG_MTK_COMBO_BT=y
|
||||
+#CONFIG_MTK_COMBO_BT_HCI=y
|
||||
+#needed for BT?
|
||||
+#Bluetooth Classic (BR/EDR) features
|
||||
+CONFIG_BT_BREDR=y
|
||||
+#Bluetooth High Speed (HS) features
|
||||
+CONFIG_BT_HS=y
|
||||
+#Bluetooth Low Energy (LE) features
|
||||
+CONFIG_BT_LE=y
|
||||
+#Export Bluetooth internals in debugfs
|
||||
+CONFIG_BT_DEBUGFS=y
|
||||
+CONFIG_BT_RFCOMM=m
|
||||
+CONFIG_BT_RFCOMM_TTY=y
|
||||
+CONFIG_BT_HIDP=m
|
||||
+CONFIG_BT_BNEP=m
|
||||
+
|
||||
+#to run bluetoothd rfkill needed
|
||||
+CONFIG_RFKILL=y
|
||||
+CONFIG_RFKILL_LEDS=y
|
||||
+CONFIG_RFKILL_INPUT=y
|
||||
+CONFIG_RFKILL_GPIO=y
|
||||
+
|
||||
+#if you use a mt76x2 or mt76x3 pcie-card
|
||||
+#CONFIG_MT76=m
|
||||
+
|
||||
+#pcie
|
||||
+CONFIG_PCIEPORTBUS=y
|
||||
+CONFIG_PCIE_MEDIATEK=y
|
||||
+CONFIG_PHY_MTK_TPHY=y
|
||||
+
|
||||
+CONFIG_I2C_CHARDEV=m
|
||||
+CONFIG_RTC_CLASS=y
|
||||
+CONFIG_RTC_DRV_DS1307=m
|
||||
+CONFIG_RTC_DRV_DS1307_CENTURY=y
|
||||
+CONFIG_RTC_DRV_MT6397=m
|
||||
+
|
||||
+CONFIG_SPI=y
|
||||
+CONFIG_SPI_MASTER=y
|
||||
+CONFIG_SPI_SPIDEV=m
|
||||
+CONFIG_SPI_MT65XX=m
|
||||
+
|
||||
+CONFIG_PWM=y
|
||||
+CONFIG_PWM_MEDIATEK=m
|
||||
+
|
||||
+#Temperature sensor driver for mediatek SoCs
|
||||
+CONFIG_MEDIATEK_MT6577_AUXADC=m
|
||||
+CONFIG_THERMAL=m
|
||||
+CONFIG_MTK_THERMAL=m
|
||||
+CONFIG_MTK_EFUSE=m
|
||||
+
|
||||
+#HDMI
|
||||
+#CONFIG_DRM=y
|
||||
+#CONFIG_DRM_ARM=y
|
||||
+#CONFIG_DRM_MALI_DISPLAY=y
|
||||
+#CONFIG_DRM_MEDIATEK=y
|
||||
+#CONFIG_DRM_MEDIATEK_HDMI=y
|
||||
+#CONFIG_COMMON_CLK_MT2701_MMSYS=y
|
||||
+#CONFIG_COMMON_CLK_MT2701_IMGSYS=y
|
||||
+#CONFIG_COMMON_CLK_MT2701_VDECSYS=y
|
||||
+#CONFIG_FRAMEBUFFER_CONSOLE=y
|
||||
+#CONFIG_DRM_FBDEV_EMULATION=y
|
||||
+
|
||||
+#Sound
|
||||
+CONFIG_SOUND=y
|
||||
+CONFIG_SND=y #alsa core
|
||||
+CONFIG_SND_SOC=y
|
||||
+
|
||||
+#CONFIG_SOUND_OSS_CORE=y
|
||||
+#CONFIG_SOUND_OSS_CORE_PRECLAIM=y
|
||||
+#CONFIG_SND_OSSEMUL=y
|
||||
+#CONFIG_SND_MIXER_OSS=m
|
||||
+#CONFIG_SND_PCM_OSS=m #alsa The PCM OSS emulation module.
|
||||
+
|
||||
+#USB/HID
|
||||
+CONFIG_USB=y
|
||||
+CONFIG_USB_XHCI_HCD=y
|
||||
+CONFIG_USB_XHCI_MTK=y
|
||||
+CONFIG_USB_STORAGE=y
|
||||
+CONFIG_USB_SERIAL=y
|
||||
+#CONFIG_NOP_USB_XCEIV=y
|
||||
+#CONFIG_USB_GPIO_VBUS=y
|
||||
+#CONFIG_USB_GADGET=y
|
||||
+#CONFIG_USB_CONFIGFS=y
|
||||
+CONFIG_USB_CONFIGFS_SERIAL=y
|
||||
+#CONFIG_USB_CONFIGFS_ACM=y
|
||||
+#CONFIG_USB_CONFIGFS_OBEX=y
|
||||
+#CONFIG_USB_CONFIGFS_NCM=y
|
||||
+#CONFIG_USB_CONFIGFS_ECM=y
|
||||
+#CONFIG_USB_CONFIGFS_ECM_SUBSET=y
|
||||
+#CONFIG_USB_CONFIGFS_RNDIS=y
|
||||
+#CONFIG_USB_CONFIGFS_EEM=y
|
||||
+CONFIG_USB_CONFIGFS_MASS_STORAGE=y
|
||||
+
|
||||
+CONFIG_HID=y
|
||||
+CONFIG_HIDRAW=y
|
||||
+#CONFIG_UHID=m
|
||||
+CONFIG_HID_GENERIC=y
|
||||
+
|
||||
+CONFIG_USB_HID=y
|
||||
+#CONFIG_HID_PID=y
|
||||
+CONFIG_USB_HIDDEV=y
|
||||
+
|
||||
+# CONFIG_USB_OHCI_LITTLE_ENDIAN=y ?
|
||||
+CONFIG_USB_SUPPORT=y
|
||||
+CONFIG_USB_COMMON=y
|
||||
+# CONFIG_USB_ARCH_HAS_HCD=y ?
|
||||
+
|
||||
+#additional NET (e.g. tunneling incl. openvpn,vlan-base-support)
|
||||
+CONFIG_TUN=m
|
||||
+#vlan
|
||||
+CONFIG_BRIDGE_VLAN_FILTERING=y
|
||||
+CONFIG_VLAN_8021Q_GVRP=y
|
||||
+CONFIG_VLAN_8021Q_MVRP=y
|
||||
+CONFIG_NET_L3_MASTER_DEV=y
|
||||
+CONFIG_IPVLAN=m
|
||||
+CONFIG_MACVLAN=m
|
||||
+CONFIG_NET_ACT_VLAN=m
|
||||
+CONFIG_NET_CLS_ACT=y
|
||||
+
|
||||
+# QoS and/or fair queueing
|
||||
+CONFIG_NET_SCHED=y
|
||||
+CONFIG_NET_SCH_CBQ=m
|
||||
+CONFIG_NET_SCH_HTB=m
|
||||
+CONFIG_NET_SCH_CSZ=m
|
||||
+CONFIG_NET_SCH_PRIO=m
|
||||
+CONFIG_NET_SCH_RED=m
|
||||
+CONFIG_NET_SCH_SFQ=m
|
||||
+CONFIG_NET_SCH_TEQL=m
|
||||
+CONFIG_NET_SCH_TBF=m
|
||||
+CONFIG_NET_SCH_GRED=m
|
||||
+CONFIG_NET_SCH_DSMARK=m
|
||||
+CONFIG_NET_SCH_INGRESS=m
|
||||
+CONFIG_NET_SCH_NETEM=m
|
||||
+CONFIG_NET_QOS=y
|
||||
+CONFIG_NET_ESTIMATOR=y
|
||||
+CONFIG_NET_CLS=y
|
||||
+CONFIG_NET_CLS_TCINDEX=m
|
||||
+CONFIG_NET_CLS_ROUTE4=m
|
||||
+CONFIG_NET_CLS_ROUTE=y
|
||||
+CONFIG_NET_CLS_FW=m
|
||||
+CONFIG_NET_CLS_U32=m
|
||||
+CONFIG_NET_CLS_RSVP=m
|
||||
+CONFIG_NET_CLS_RSVP6=m
|
||||
+CONFIG_NET_CLS_POLICE=y
|
||||
+
|
||||
+#unused drivers which are set by default
|
||||
+CONFIG_WLAN_VENDOR_ADMTEK=n
|
||||
+CONFIG_WLAN_VENDOR_ATH=n
|
||||
+CONFIG_WLAN_VENDOR_ATMEL=n
|
||||
+CONFIG_WLAN_VENDOR_BROADCOM=n
|
||||
+CONFIG_WLAN_VENDOR_CISCO=n
|
||||
+CONFIG_WLAN_VENDOR_INTEL=n
|
||||
+CONFIG_WLAN_VENDOR_INTERSIL=n
|
||||
+CONFIG_WLAN_VENDOR_MARVELL=n
|
||||
+CONFIG_WLAN_VENDOR_REALTEK=n
|
||||
+CONFIG_WLAN_VENDOR_RALINK=n
|
||||
+CONFIG_WLAN_VENDOR_RSI=n
|
||||
+CONFIG_WLAN_VENDOR_ST=n
|
||||
+CONFIG_WLAN_VENDOR_TI=n
|
||||
+CONFIG_WLAN_VENDOR_ZYDAS=n
|
||||
+CONFIG_WLAN_VENDOR_QUANTENNA=n
|
||||
+# CONFIG_ADAPTEC_STARFIRE is not set
|
||||
+# CONFIG_NET_VENDOR_ADAPTEC is not set
|
||||
+# CONFIG_NET_VENDOR_AGERE is not set
|
||||
+# CONFIG_NET_VENDOR_ALACRITECH is not set
|
||||
+# CONFIG_NET_VENDOR_ALTEON is not set
|
||||
+# CONFIG_NET_VENDOR_AMAZON is not set
|
||||
+# CONFIG_NET_VENDOR_AMD is not set
|
||||
+# CONFIG_NET_VENDOR_AQUANTIA is not set
|
||||
+# CONFIG_NET_VENDOR_ARC is not set
|
||||
+# CONFIG_NET_VENDOR_ATHEROS is not set
|
||||
+# CONFIG_NET_VENDOR_AURORA is not set
|
||||
+# CONFIG_NET_CADENCE is not set
|
||||
+# CONFIG_NET_VENDOR_BROADCOM is not set
|
||||
+# CONFIG_NET_VENDOR_BROCADE is not set
|
||||
+# CONFIG_NET_VENDOR_CAVIUM is not set
|
||||
+# CONFIG_NET_VENDOR_CHELSIO is not set
|
||||
+# CONFIG_NET_VENDOR_CIRRUS is not set
|
||||
+# CONFIG_NET_VENDOR_CISCO is not set
|
||||
+# CONFIG_NET_VENDOR_MELLANOX is not set
|
||||
+# CONFIG_NET_VENDOR_MICREL is not set
|
||||
+# CONFIG_NET_VENDOR_MICROCHIP is not set
|
||||
+# CONFIG_NET_VENDOR_MYRI is not set
|
||||
+# CONFIG_NET_VENDOR_NATSEMI is not set
|
||||
+# CONFIG_NET_VENDOR_NETRONOME is not set
|
||||
+# CONFIG_NET_VENDOR_NVIDIA is not set
|
||||
+# CONFIG_NET_VENDOR_OKI is not set
|
||||
+# CONFIG_NET_PACKET_ENGINE is not set
|
||||
+# CONFIG_NET_VENDOR_QLOGIC is not set
|
||||
+# CONFIG_NET_VENDOR_QUALCOMM is not set
|
||||
+# CONFIG_NET_VENDOR_REALTEK is not set
|
||||
+# CONFIG_NET_VENDOR_RENESAS is not set
|
||||
+# CONFIG_NET_VENDOR_RDC is not set
|
||||
+# CONFIG_NET_VENDOR_ROCKER is not set
|
||||
+# CONFIG_NET_VENDOR_SAMSUNG is not set
|
||||
+# CONFIG_NET_VENDOR_SEEQ is not set
|
||||
+# CONFIG_NET_VENDOR_SILAN is not set
|
||||
+# CONFIG_NET_VENDOR_SIS is not set
|
||||
+# CONFIG_NET_VENDOR_SOLARFLARE is not set
|
||||
+# CONFIG_NET_VENDOR_SMSC is not set
|
||||
+# CONFIG_NET_VENDOR_STMICRO is not set
|
||||
+# CONFIG_NET_VENDOR_SUN is not set
|
||||
+# CONFIG_NET_VENDOR_TEHUTI is not set
|
||||
+# CONFIG_NET_VENDOR_TI is not set
|
||||
+# CONFIG_NET_VENDOR_VIA is not set
|
||||
+# CONFIG_NET_VENDOR_WIZNET is not set
|
||||
+# CONFIG_NET_VENDOR_SYNOPSYS is not set
|
||||
+# CONFIG_NET_VENDOR_DEC is not set
|
||||
+# CONFIG_NET_VENDOR_DLINK is not set
|
||||
+# CONFIG_NET_VENDOR_EMULEX is not set
|
||||
+# CONFIG_NET_VENDOR_EZCHIP is not set
|
||||
+# CONFIG_NET_VENDOR_EXAR is not set
|
||||
+# CONFIG_NET_VENDOR_FARADAY is not set
|
||||
+# CONFIG_NET_VENDOR_HISILICON is not set
|
||||
+# CONFIG_NET_VENDOR_HP is not set
|
||||
+# CONFIG_NET_VENDOR_HUAWEI is not set
|
||||
+# CONFIG_NET_VENDOR_INTEL is not set
|
||||
+# CONFIG_NET_VENDOR_MARVELL is not set
|
||||
+# CONFIG_NET_VENDOR_3COM is not set
|
||||
+
|
||||
+#NFS Client
|
||||
+CONFIG_NFS_FS=y
|
||||
+CONFIG_NFS_V2=y
|
||||
+CONFIG_NFS_V3=y
|
||||
+CONFIG_NFS_V3_ACL=y
|
||||
+CONFIG_NFS_V4=y
|
||||
+CONFIG_NFS_SWAP=y
|
||||
+CONFIG_NFS_V4_1=y
|
||||
+CONFIG_NFS_V4_2=y
|
||||
+CONFIG_PNFS_FILE_LAYOUT=m
|
||||
+CONFIG_PNFS_BLOCK=m
|
||||
+CONFIG_PNFS_FLEXFILE_LAYOUT=m
|
||||
+CONFIG_NFS_V4_1_IMPLEMENTATION_ID_DOMAIN="kernel.org"
|
||||
+CONFIG_NFS_V4_1_MIGRATION=y
|
||||
+CONFIG_NFS_USE_LEGACY_DNS=y
|
||||
+
|
||||
+#NFS Server
|
||||
+CONFIG_NFSD=m
|
||||
+CONFIG_NFSD_V2_ACL=y
|
||||
+CONFIG_NFSD_V3=y
|
||||
+CONFIG_NFSD_V3_ACL=y
|
||||
+CONFIG_NFSD_V4=y
|
||||
+CONFIG_NFSD_PNFS=y
|
||||
+CONFIG_NFSD_BLOCKLAYOUT=y
|
||||
+CONFIG_NFSD_SCSILAYOUT=y
|
||||
+CONFIG_NFSD_FLEXFILELAYOUT=y
|
||||
+CONFIG_NFSD_FAULT_INJECTION=y
|
||||
+CONFIG_NFS_ACL_SUPPORT=m
|
||||
+CONFIG_NFS_COMMON=y
|
||||
+
|
||||
+CONFIG_ROOT_NFS=y
|
||||
+
|
||||
+#xfs
|
||||
+CONFIG_XFS_FS=m
|
||||
+
|
||||
+#RTC/POWER
|
||||
+CONFIG_POWER_RESET=y
|
||||
+CONFIG_POWER_RESET_MT6323=y
|
||||
+CONFIG_POWER_RESET_MT6397_RTC=y
|
||||
+
|
||||
+#CONFIG_NET_MEDIATEK_HW_QOS=m
|
||||
+
|
||||
--
|
||||
2.19.1
|
||||
|
||||
216265
root/target/linux/mediatek/patches-4.19/0006-wifi-adding-driver-folder.patch
Executable file
216265
root/target/linux/mediatek/patches-4.19/0006-wifi-adding-driver-folder.patch
Executable file
File diff suppressed because it is too large
Load diff
|
|
@ -0,0 +1,846 @@
|
|||
From 83ffbaceffed1cd47a6f67fb20e39737dfb2d01a Mon Sep 17 00:00:00 2001
|
||||
From: Frank Wunderlich <frank-w@public-files.de>
|
||||
Date: Tue, 28 Aug 2018 18:14:56 +0200
|
||||
Subject: [PATCH 07/77] [wifi] adding wifi-related changes outside
|
||||
driver-directory
|
||||
|
||||
---
|
||||
arch/arm/boot/dts/mt7623.dtsi | 41 +-
|
||||
arch/arm/boot/dts/mt7623n-bananapi-bpi-r2.dts | 42 ++
|
||||
drivers/soc/mediatek/mtk-pmic-wrap.c | 12 +
|
||||
drivers/watchdog/mtk_wdt.c | 377 +++++++++++++++++-
|
||||
include/linux/wakelock.h | 67 ++++
|
||||
include/net/genetlink.h | 44 ++
|
||||
include/soc/mediatek/pmic_wrap.h | 19 +
|
||||
include/uapi/linux/genetlink.h | 1 +
|
||||
8 files changed, 588 insertions(+), 15 deletions(-)
|
||||
create mode 100644 include/linux/wakelock.h
|
||||
create mode 100644 include/soc/mediatek/pmic_wrap.h
|
||||
|
||||
diff --git a/arch/arm/boot/dts/mt7623.dtsi b/arch/arm/boot/dts/mt7623.dtsi
|
||||
index 04228cf9ddbb..af6b6228f8a8 100644
|
||||
--- a/arch/arm/boot/dts/mt7623.dtsi
|
||||
+++ b/arch/arm/boot/dts/mt7623.dtsi
|
||||
@@ -266,6 +266,8 @@
|
||||
compatible = "mediatek,mt7623-wdt",
|
||||
"mediatek,mt6589-wdt";
|
||||
reg = <0 0x10007000 0 0x100>;
|
||||
+ interrupts = <GIC_SPI 88 IRQ_TYPE_EDGE_FALLING>;
|
||||
+ #reset-cells = <1>;
|
||||
};
|
||||
|
||||
timer: timer@10008000 {
|
||||
@@ -494,13 +496,26 @@
|
||||
"mediatek,mtk-btif";
|
||||
reg = <0 0x1100c000 0 0x1000>;
|
||||
interrupts = <GIC_SPI 50 IRQ_TYPE_LEVEL_LOW>;
|
||||
- clocks = <&pericfg CLK_PERI_BTIF>;
|
||||
- clock-names = "main";
|
||||
+ clocks = <&pericfg CLK_PERI_BTIF>, <&pericfg CLK_PERI_AP_DMA>;
|
||||
+ clock-names = "main", "apdmac";
|
||||
reg-shift = <2>;
|
||||
reg-io-width = <4>;
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
+ btif_tx: btif_tx@11000780 {
|
||||
+ compatible = "mediatek,btif_tx";
|
||||
+ reg = <0 0x11000780 0 0x80>;
|
||||
+ interrupts = <GIC_SPI 71 IRQ_TYPE_LEVEL_LOW>;
|
||||
+ status = "okay";
|
||||
+ };
|
||||
+ btif_rx: btif_rx@11000800 {
|
||||
+ compatible = "mediatek,btif_rx";
|
||||
+ reg = <0 0x11000800 0 0x80>;
|
||||
+ interrupts = <GIC_SPI 72 IRQ_TYPE_LEVEL_LOW>;
|
||||
+ status = "okay";
|
||||
+ };
|
||||
+
|
||||
nandc: nfi@1100d000 {
|
||||
compatible = "mediatek,mt7623-nfc",
|
||||
"mediatek,mt2701-nfc";
|
||||
@@ -683,6 +698,28 @@
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
+ consys: consys@18070000 {
|
||||
+ compatible = "mediatek,mt7623-consys";
|
||||
+ reg = <0 0x18070000 0 0x0200>, /*CONN_MCU_CONFIG_BASE */
|
||||
+ <0 0x10001000 0 0x1600>; /*TOPCKGEN_BASE */
|
||||
+ clocks = <&infracfg CLK_INFRA_CONNMCU>;
|
||||
+ clock-names = "consysbus";
|
||||
+ power-domains = <&scpsys MT2701_POWER_DOMAIN_CONN>;
|
||||
+ interrupts = <GIC_SPI 185 IRQ_TYPE_LEVEL_LOW>, /* BGF_EINT */
|
||||
+ <GIC_SPI 163 IRQ_TYPE_LEVEL_LOW>; /* WDT_EINT */
|
||||
+ resets = <&watchdog MT2701_TOPRGU_CONN_MCU_RST>;
|
||||
+ reset-names = "connsys";
|
||||
+ status="disabled";
|
||||
+ };
|
||||
+ wifi:wifi@180f0000 {
|
||||
+ compatible = "mediatek,mt7623-wifi",
|
||||
+ "mediatek,wifi";
|
||||
+ reg = <0 0x180f0000 0 0x005c>;
|
||||
+ interrupts = <GIC_SPI 184 IRQ_TYPE_LEVEL_LOW>;
|
||||
+ clocks = <&pericfg CLK_PERI_AP_DMA>;
|
||||
+ clock-names = "wifi-dma";
|
||||
+ };
|
||||
+
|
||||
hifsys: syscon@1a000000 {
|
||||
compatible = "mediatek,mt7623-hifsys",
|
||||
"mediatek,mt2701-hifsys",
|
||||
diff --git a/arch/arm/boot/dts/mt7623n-bananapi-bpi-r2.dts b/arch/arm/boot/dts/mt7623n-bananapi-bpi-r2.dts
|
||||
index 2b760f90f38c..465fb887b2ca 100644
|
||||
--- a/arch/arm/boot/dts/mt7623n-bananapi-bpi-r2.dts
|
||||
+++ b/arch/arm/boot/dts/mt7623n-bananapi-bpi-r2.dts
|
||||
@@ -84,6 +84,18 @@
|
||||
};
|
||||
};
|
||||
|
||||
+ reserved-memory {
|
||||
+ #address-cells = <2>;
|
||||
+ #size-cells = <2>;
|
||||
+ ranges;
|
||||
+ consys-reserve-memory {
|
||||
+ compatible = "mediatek,consys-reserve-memory";
|
||||
+ no-map;
|
||||
+ size = <0 0x100000>;
|
||||
+ alignment = <0 0x100000>;
|
||||
+ };
|
||||
+ };
|
||||
+
|
||||
leds {
|
||||
compatible = "gpio-leds";
|
||||
pinctrl-names = "default";
|
||||
@@ -259,6 +271,36 @@
|
||||
};
|
||||
};
|
||||
|
||||
+&pio {
|
||||
+ consys_pins_default: consys_pins_default {
|
||||
+ adie {
|
||||
+ pinmux = <MT7623_PIN_60_WB_RSTB_FUNC_WB_RSTB>,
|
||||
+ <MT7623_PIN_61_GPIO61_FUNC_TEST_FD>,
|
||||
+ <MT7623_PIN_62_GPIO62_FUNC_TEST_FC>,
|
||||
+ <MT7623_PIN_63_WB_SCLK_FUNC_WB_SCLK>,
|
||||
+ <MT7623_PIN_64_WB_SDATA_FUNC_WB_SDATA>,
|
||||
+ <MT7623_PIN_65_WB_SEN_FUNC_WB_SEN>,
|
||||
+ <MT7623_PIN_66_WB_CRTL0_FUNC_WB_CRTL0>,
|
||||
+ <MT7623_PIN_67_WB_CRTL1_FUNC_WB_CRTL1>,
|
||||
+ <MT7623_PIN_68_WB_CRTL2_FUNC_WB_CRTL2>,
|
||||
+ <MT7623_PIN_69_WB_CRTL3_FUNC_WB_CRTL3>,
|
||||
+ <MT7623_PIN_70_WB_CRTL4_FUNC_WB_CRTL4>,
|
||||
+ <MT7623_PIN_71_WB_CRTL5_FUNC_WB_CRTL5>;
|
||||
+ bias-disable;
|
||||
+ };
|
||||
+ };
|
||||
+};
|
||||
+&consys {
|
||||
+ mediatek,pwrap-regmap = <&pwrap>;
|
||||
+ pinctrl-names = "default";
|
||||
+ pinctrl-0 = <&consys_pins_default>;
|
||||
+ vcn18-supply = <&mt6323_vcn18_reg>;
|
||||
+ vcn28-supply = <&mt6323_vcn28_reg>;
|
||||
+ vcn33_bt-supply = <&mt6323_vcn33_bt_reg>;
|
||||
+ vcn33_wifi-supply = <&mt6323_vcn33_wifi_reg>;
|
||||
+ status = "okay";
|
||||
+};
|
||||
+
|
||||
&pcie {
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&pcie_default>;
|
||||
diff --git a/drivers/soc/mediatek/mtk-pmic-wrap.c b/drivers/soc/mediatek/mtk-pmic-wrap.c
|
||||
index 4e931fdf4d09..6600396ee299 100644
|
||||
--- a/drivers/soc/mediatek/mtk-pmic-wrap.c
|
||||
+++ b/drivers/soc/mediatek/mtk-pmic-wrap.c
|
||||
@@ -1530,6 +1530,18 @@ static const struct of_device_id of_pwrap_match_tbl[] = {
|
||||
};
|
||||
MODULE_DEVICE_TABLE(of, of_pwrap_match_tbl);
|
||||
|
||||
+struct regmap *pwrap_node_to_regmap(struct device_node *np)
|
||||
+{
|
||||
+ struct platform_device *pdev;
|
||||
+ struct pmic_wrapper *wrp;
|
||||
+ pdev = of_find_device_by_node(np);
|
||||
+ if (!pdev)
|
||||
+ return ERR_PTR(-ENODEV);
|
||||
+ wrp = platform_get_drvdata(pdev);
|
||||
+ return wrp->regmap;
|
||||
+}
|
||||
+EXPORT_SYMBOL_GPL(pwrap_node_to_regmap);
|
||||
+
|
||||
static int pwrap_probe(struct platform_device *pdev)
|
||||
{
|
||||
int ret, irq;
|
||||
diff --git a/drivers/watchdog/mtk_wdt.c b/drivers/watchdog/mtk_wdt.c
|
||||
index 4baf64f21aa1..6a361f808aed 100644
|
||||
--- a/drivers/watchdog/mtk_wdt.c
|
||||
+++ b/drivers/watchdog/mtk_wdt.c
|
||||
@@ -1,4 +1,3 @@
|
||||
-// SPDX-License-Identifier: GPL-2.0+
|
||||
/*
|
||||
* Mediatek Watchdog Driver
|
||||
*
|
||||
@@ -6,20 +5,51 @@
|
||||
*
|
||||
* Matthias Brugger <matthias.bgg@gmail.com>
|
||||
*
|
||||
+ * This program is free software; you can redistribute it and/or modify
|
||||
+ * it under the terms of the GNU General Public License as published by
|
||||
+ * the Free Software Foundation; either version 2 of the License, or
|
||||
+ * (at your option) any later version.
|
||||
+ *
|
||||
+ * This program is distributed in the hope that it will be useful,
|
||||
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
||||
+ * GNU General Public License for more details.
|
||||
+ *
|
||||
* Based on sunxi_wdt.c
|
||||
*/
|
||||
|
||||
#include <linux/err.h>
|
||||
#include <linux/init.h>
|
||||
#include <linux/io.h>
|
||||
+#include <linux/interrupt.h>
|
||||
#include <linux/kernel.h>
|
||||
#include <linux/module.h>
|
||||
#include <linux/moduleparam.h>
|
||||
+#include <linux/init.h>
|
||||
+#include <linux/proc_fs.h>
|
||||
+#include <linux/uaccess.h>
|
||||
#include <linux/of.h>
|
||||
+#include <linux/of_irq.h>
|
||||
#include <linux/platform_device.h>
|
||||
+#ifdef CONFIG_FIQ_GLUE
|
||||
+#include <linux/irqchip/mtk-gic-extend.h>
|
||||
+#include <mt-plat/aee.h>
|
||||
+#endif
|
||||
#include <linux/types.h>
|
||||
#include <linux/watchdog.h>
|
||||
+#include <linux/notifier.h>
|
||||
+#include <linux/reboot.h>
|
||||
#include <linux/delay.h>
|
||||
+#include <linux/reset-controller.h>
|
||||
+#include <linux/reset.h>
|
||||
+#include <linux/sched.h>
|
||||
+#include <linux/sched/debug.h>
|
||||
+#include <linux/sched/signal.h>
|
||||
+#include <asm/system_misc.h>
|
||||
+#include <linux/seq_file.h>
|
||||
+#ifdef CONFIG_MT6397_MISC
|
||||
+#include <linux/mfd/mt6397/rtc_misc.h>
|
||||
+#endif
|
||||
|
||||
#define WDT_MAX_TIMEOUT 31
|
||||
#define WDT_MIN_TIMEOUT 1
|
||||
@@ -38,37 +68,167 @@
|
||||
#define WDT_MODE_EXRST_EN (1 << 2)
|
||||
#define WDT_MODE_IRQ_EN (1 << 3)
|
||||
#define WDT_MODE_AUTO_START (1 << 4)
|
||||
+#define WDT_MODE_IRQ_LVL (1 << 5)
|
||||
#define WDT_MODE_DUAL_EN (1 << 6)
|
||||
#define WDT_MODE_KEY 0x22000000
|
||||
|
||||
+#define WDT_STATUS 0x0c
|
||||
+#define WDT_NONRST_REG 0x20
|
||||
+#define WDT_NONRST_REG2 0x24
|
||||
+
|
||||
#define WDT_SWRST 0x14
|
||||
#define WDT_SWRST_KEY 0x1209
|
||||
|
||||
+#define WDT_SWSYSRST 0x18
|
||||
+#define WDT_SWSYSRST_KEY 0x88000000
|
||||
+
|
||||
+#define WDT_REQ_MODE 0x30
|
||||
+#define WDT_REQ_MODE_KEY 0x33000000
|
||||
+#define WDT_REQ_IRQ_EN 0x34
|
||||
+#define WDT_REQ_IRQ_KEY 0x44000000
|
||||
+#define WDT_REQ_MODE_DEBUG_EN 0x80000
|
||||
+
|
||||
+
|
||||
#define DRV_NAME "mtk-wdt"
|
||||
-#define DRV_VERSION "1.0"
|
||||
+#define DRV_VERSION "2.0"
|
||||
|
||||
static bool nowayout = WATCHDOG_NOWAYOUT;
|
||||
-static unsigned int timeout;
|
||||
+static unsigned int timeout = WDT_MAX_TIMEOUT;
|
||||
+
|
||||
+struct toprgu_reset {
|
||||
+ spinlock_t lock;
|
||||
+ void __iomem *toprgu_swrst_base;
|
||||
+ int regofs;
|
||||
+ struct reset_controller_dev rcdev;
|
||||
+};
|
||||
|
||||
struct mtk_wdt_dev {
|
||||
struct watchdog_device wdt_dev;
|
||||
void __iomem *wdt_base;
|
||||
+ int wdt_irq_id;
|
||||
+ struct notifier_block restart_handler;
|
||||
+ struct toprgu_reset reset_controller;
|
||||
};
|
||||
|
||||
-static int mtk_wdt_restart(struct watchdog_device *wdt_dev,
|
||||
- unsigned long action, void *data)
|
||||
+static void __iomem *toprgu_base;
|
||||
+static struct watchdog_device *wdt_dev;
|
||||
+
|
||||
+static int toprgu_reset_assert(struct reset_controller_dev *rcdev,
|
||||
+ unsigned long id)
|
||||
{
|
||||
- struct mtk_wdt_dev *mtk_wdt = watchdog_get_drvdata(wdt_dev);
|
||||
+ unsigned int tmp;
|
||||
+ unsigned long flags;
|
||||
+ struct toprgu_reset *data = container_of(rcdev, struct toprgu_reset, rcdev);
|
||||
+
|
||||
+ spin_lock_irqsave(&data->lock, flags);
|
||||
+
|
||||
+ tmp = __raw_readl(data->toprgu_swrst_base + data->regofs);
|
||||
+ tmp |= BIT(id);
|
||||
+ tmp |= WDT_SWSYSRST_KEY;
|
||||
+ writel(tmp, data->toprgu_swrst_base + data->regofs);
|
||||
+
|
||||
+ spin_unlock_irqrestore(&data->lock, flags);
|
||||
+
|
||||
+ return 0;
|
||||
+}
|
||||
+
|
||||
+static int toprgu_reset_deassert(struct reset_controller_dev *rcdev,
|
||||
+ unsigned long id)
|
||||
+{
|
||||
+ unsigned int tmp;
|
||||
+ unsigned long flags;
|
||||
+ struct toprgu_reset *data = container_of(rcdev, struct toprgu_reset, rcdev);
|
||||
+
|
||||
+ spin_lock_irqsave(&data->lock, flags);
|
||||
+
|
||||
+ tmp = __raw_readl(data->toprgu_swrst_base + data->regofs);
|
||||
+ tmp &= ~BIT(id);
|
||||
+ tmp |= WDT_SWSYSRST_KEY;
|
||||
+ writel(tmp, data->toprgu_swrst_base + data->regofs);
|
||||
+
|
||||
+ spin_unlock_irqrestore(&data->lock, flags);
|
||||
+
|
||||
+ return 0;
|
||||
+}
|
||||
+
|
||||
+static int toprgu_reset(struct reset_controller_dev *rcdev,
|
||||
+ unsigned long id)
|
||||
+{
|
||||
+ int ret;
|
||||
+
|
||||
+ ret = toprgu_reset_assert(rcdev, id);
|
||||
+ if (ret)
|
||||
+ return ret;
|
||||
+
|
||||
+ return toprgu_reset_deassert(rcdev, id);
|
||||
+}
|
||||
+
|
||||
+static struct reset_control_ops toprgu_reset_ops = {
|
||||
+ .assert = toprgu_reset_assert,
|
||||
+ .deassert = toprgu_reset_deassert,
|
||||
+ .reset = toprgu_reset,
|
||||
+};
|
||||
+
|
||||
+static void toprgu_register_reset_controller(struct platform_device *pdev, int regofs)
|
||||
+{
|
||||
+ int ret;
|
||||
+ struct mtk_wdt_dev *mtk_wdt = platform_get_drvdata(pdev);
|
||||
+
|
||||
+ spin_lock_init(&mtk_wdt->reset_controller.lock);
|
||||
+
|
||||
+ mtk_wdt->reset_controller.toprgu_swrst_base = mtk_wdt->wdt_base;
|
||||
+ mtk_wdt->reset_controller.regofs = regofs;
|
||||
+ mtk_wdt->reset_controller.rcdev.owner = THIS_MODULE;
|
||||
+ mtk_wdt->reset_controller.rcdev.nr_resets = 15;
|
||||
+ mtk_wdt->reset_controller.rcdev.ops = &toprgu_reset_ops;
|
||||
+ mtk_wdt->reset_controller.rcdev.of_node = pdev->dev.of_node;
|
||||
+
|
||||
+ ret = reset_controller_register(&mtk_wdt->reset_controller.rcdev);
|
||||
+ if (ret)
|
||||
+ pr_err("could not register toprgu reset controller: %d\n", ret);
|
||||
+}
|
||||
+
|
||||
+static int mtk_reset_handler(struct notifier_block *this, unsigned long mode,
|
||||
+ void *cmd)
|
||||
+{
|
||||
+ struct mtk_wdt_dev *mtk_wdt;
|
||||
void __iomem *wdt_base;
|
||||
+ u32 reg;
|
||||
|
||||
+ mtk_wdt = container_of(this, struct mtk_wdt_dev, restart_handler);
|
||||
wdt_base = mtk_wdt->wdt_base;
|
||||
|
||||
- while (1) {
|
||||
- writel(WDT_SWRST_KEY, wdt_base + WDT_SWRST);
|
||||
- mdelay(5);
|
||||
+ /* WDT_STATUS will be cleared to zero after writing to WDT_MODE, so we backup it in WDT_NONRST_REG,
|
||||
+ * and then print it out in mtk_wdt_probe() after reset
|
||||
+ */
|
||||
+ writel(__raw_readl(wdt_base + WDT_STATUS), wdt_base + WDT_NONRST_REG);
|
||||
+
|
||||
+ reg = ioread32(wdt_base + WDT_MODE);
|
||||
+ reg &= ~(WDT_MODE_DUAL_EN | WDT_MODE_IRQ_EN | WDT_MODE_EN);
|
||||
+ reg |= WDT_MODE_KEY;
|
||||
+ iowrite32(reg, wdt_base + WDT_MODE);
|
||||
+
|
||||
+ if (cmd && !strcmp(cmd, "rpmbpk")) {
|
||||
+ iowrite32(ioread32(wdt_base + WDT_NONRST_REG2) | (1 << 0), wdt_base + WDT_NONRST_REG2);
|
||||
+ } else if (cmd && !strcmp(cmd, "recovery")) {
|
||||
+ iowrite32(ioread32(wdt_base + WDT_NONRST_REG2) | (1 << 1), wdt_base + WDT_NONRST_REG2);
|
||||
+ #ifdef CONFIG_MT6397_MISC
|
||||
+ mtk_misc_mark_recovery();
|
||||
+ #endif
|
||||
+ } else if (cmd && !strcmp(cmd, "bootloader")) {
|
||||
+ iowrite32(ioread32(wdt_base + WDT_NONRST_REG2) | (1 << 2), wdt_base + WDT_NONRST_REG2);
|
||||
+ #ifdef CONFIG_MT6397_MISC
|
||||
+ mtk_misc_mark_fast();
|
||||
+ #endif
|
||||
}
|
||||
|
||||
- return 0;
|
||||
+ if (!arm_pm_restart) {
|
||||
+ while (1) {
|
||||
+ writel(WDT_SWRST_KEY, wdt_base + WDT_SWRST);
|
||||
+ mdelay(5);
|
||||
+ }
|
||||
+ }
|
||||
+ return NOTIFY_DONE;
|
||||
}
|
||||
|
||||
static int mtk_wdt_ping(struct watchdog_device *wdt_dev)
|
||||
@@ -77,6 +237,7 @@ static int mtk_wdt_ping(struct watchdog_device *wdt_dev)
|
||||
void __iomem *wdt_base = mtk_wdt->wdt_base;
|
||||
|
||||
iowrite32(WDT_RST_RELOAD, wdt_base + WDT_RST);
|
||||
+ printk_deferred("[WDK]: kick Ex WDT\n");
|
||||
|
||||
return 0;
|
||||
}
|
||||
@@ -128,7 +289,8 @@ static int mtk_wdt_start(struct watchdog_device *wdt_dev)
|
||||
return ret;
|
||||
|
||||
reg = ioread32(wdt_base + WDT_MODE);
|
||||
- reg &= ~(WDT_MODE_IRQ_EN | WDT_MODE_DUAL_EN);
|
||||
+ reg |= (WDT_MODE_DUAL_EN | WDT_MODE_IRQ_EN | WDT_MODE_EXRST_EN);
|
||||
+ reg &= ~(WDT_MODE_IRQ_LVL | WDT_MODE_EXT_POL_HIGH);
|
||||
reg |= (WDT_MODE_EN | WDT_MODE_KEY);
|
||||
iowrite32(reg, wdt_base + WDT_MODE);
|
||||
|
||||
@@ -148,13 +310,56 @@ static const struct watchdog_ops mtk_wdt_ops = {
|
||||
.stop = mtk_wdt_stop,
|
||||
.ping = mtk_wdt_ping,
|
||||
.set_timeout = mtk_wdt_set_timeout,
|
||||
- .restart = mtk_wdt_restart,
|
||||
};
|
||||
|
||||
+#ifdef CONFIG_FIQ_GLUE
|
||||
+static void wdt_fiq(void *arg, void *regs, void *svc_sp)
|
||||
+{
|
||||
+ unsigned int wdt_mode_val;
|
||||
+ void __iomem *wdt_base = ((struct mtk_wdt_dev *)arg)->wdt_base;
|
||||
+
|
||||
+ wdt_mode_val = __raw_readl(wdt_base + WDT_STATUS);
|
||||
+ writel(wdt_mode_val, wdt_base + WDT_NONRST_REG);
|
||||
+
|
||||
+ aee_wdt_fiq_info(arg, regs, svc_sp);
|
||||
+}
|
||||
+#else
|
||||
+static void wdt_report_info(void)
|
||||
+{
|
||||
+ struct task_struct *task;
|
||||
+
|
||||
+ task = &init_task;
|
||||
+ pr_debug("Qwdt: -- watchdog time out\n");
|
||||
+
|
||||
+ for_each_process(task) {
|
||||
+ if (task->state == 0) {
|
||||
+ pr_debug("PID: %d, name: %s\n backtrace:\n", task->pid, task->comm);
|
||||
+ show_stack(task, NULL);
|
||||
+ pr_debug("\n");
|
||||
+ }
|
||||
+ }
|
||||
+
|
||||
+ pr_debug("backtrace of current task:\n");
|
||||
+ show_stack(NULL, NULL);
|
||||
+ pr_debug("Qwdt: -- watchdog time out\n");
|
||||
+}
|
||||
+
|
||||
+static irqreturn_t mtk_wdt_isr(int irq, void *dev_id)
|
||||
+{
|
||||
+ pr_err("fwq mtk_wdt_isr\n");
|
||||
+
|
||||
+ wdt_report_info();
|
||||
+ BUG();
|
||||
+
|
||||
+ return IRQ_HANDLED;
|
||||
+}
|
||||
+#endif
|
||||
+
|
||||
static int mtk_wdt_probe(struct platform_device *pdev)
|
||||
{
|
||||
struct mtk_wdt_dev *mtk_wdt;
|
||||
struct resource *res;
|
||||
+ unsigned int tmp;
|
||||
int err;
|
||||
|
||||
mtk_wdt = devm_kzalloc(&pdev->dev, sizeof(*mtk_wdt), GFP_KERNEL);
|
||||
@@ -165,9 +370,32 @@ static int mtk_wdt_probe(struct platform_device *pdev)
|
||||
|
||||
res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
|
||||
mtk_wdt->wdt_base = devm_ioremap_resource(&pdev->dev, res);
|
||||
+
|
||||
if (IS_ERR(mtk_wdt->wdt_base))
|
||||
return PTR_ERR(mtk_wdt->wdt_base);
|
||||
|
||||
+ pr_err("MTK_WDT_NONRST_REG(%x)\n", __raw_readl(mtk_wdt->wdt_base + WDT_NONRST_REG));
|
||||
+
|
||||
+ mtk_wdt->wdt_irq_id = irq_of_parse_and_map(pdev->dev.of_node, 0);
|
||||
+ if (!mtk_wdt->wdt_irq_id) {
|
||||
+ pr_err("RGU get IRQ ID failed\n");
|
||||
+ return -ENODEV;
|
||||
+ }
|
||||
+
|
||||
+#ifndef CONFIG_FIQ_GLUE
|
||||
+ err = request_irq(mtk_wdt->wdt_irq_id, (irq_handler_t)mtk_wdt_isr, IRQF_TRIGGER_NONE, DRV_NAME, mtk_wdt);
|
||||
+#else
|
||||
+ mtk_wdt->wdt_irq_id = get_hardware_irq(mtk_wdt->wdt_irq_id);
|
||||
+ err = request_fiq(mtk_wdt->wdt_irq_id, wdt_fiq, IRQF_TRIGGER_FALLING, mtk_wdt);
|
||||
+#endif
|
||||
+ if (err != 0) {
|
||||
+ pr_err("mtk_wdt_probe : failed to request irq (%d)\n", err);
|
||||
+ return err;
|
||||
+ }
|
||||
+
|
||||
+ toprgu_base = mtk_wdt->wdt_base;
|
||||
+ wdt_dev = &mtk_wdt->wdt_dev;
|
||||
+
|
||||
mtk_wdt->wdt_dev.info = &mtk_wdt_info;
|
||||
mtk_wdt->wdt_dev.ops = &mtk_wdt_ops;
|
||||
mtk_wdt->wdt_dev.timeout = WDT_MAX_TIMEOUT;
|
||||
@@ -177,7 +405,6 @@ static int mtk_wdt_probe(struct platform_device *pdev)
|
||||
|
||||
watchdog_init_timeout(&mtk_wdt->wdt_dev, timeout, &pdev->dev);
|
||||
watchdog_set_nowayout(&mtk_wdt->wdt_dev, nowayout);
|
||||
- watchdog_set_restart_priority(&mtk_wdt->wdt_dev, 128);
|
||||
|
||||
watchdog_set_drvdata(&mtk_wdt->wdt_dev, mtk_wdt);
|
||||
|
||||
@@ -187,9 +414,40 @@ static int mtk_wdt_probe(struct platform_device *pdev)
|
||||
if (unlikely(err))
|
||||
return err;
|
||||
|
||||
+ mtk_wdt->restart_handler.notifier_call = mtk_reset_handler;
|
||||
+ mtk_wdt->restart_handler.priority = 128;
|
||||
+
|
||||
+ if (arm_pm_restart) {
|
||||
+ dev_info(&pdev->dev, "register restart_handler on reboot_notifier_list for psci reset\n");
|
||||
+ err = register_reboot_notifier(&mtk_wdt->restart_handler);
|
||||
+ if (err != 0)
|
||||
+ dev_warn(&pdev->dev,
|
||||
+ "cannot register reboot notifier (err=%d)\n", err);
|
||||
+ } else {
|
||||
+ err = register_restart_handler(&mtk_wdt->restart_handler);
|
||||
+ if (err)
|
||||
+ dev_warn(&pdev->dev,
|
||||
+ "cannot register restart handler (err=%d)\n", err);
|
||||
+ }
|
||||
+
|
||||
dev_info(&pdev->dev, "Watchdog enabled (timeout=%d sec, nowayout=%d)\n",
|
||||
mtk_wdt->wdt_dev.timeout, nowayout);
|
||||
|
||||
+ writel(WDT_REQ_MODE_KEY | (__raw_readl(mtk_wdt->wdt_base + WDT_REQ_MODE) &
|
||||
+ (~WDT_REQ_MODE_DEBUG_EN)), mtk_wdt->wdt_base + WDT_REQ_MODE);
|
||||
+
|
||||
+ toprgu_register_reset_controller(pdev, WDT_SWSYSRST);
|
||||
+
|
||||
+ /* enable scpsys thermal and thermal_controller request, and set to reset directly mode */
|
||||
+ tmp = ioread32(mtk_wdt->wdt_base + WDT_REQ_MODE) | (1 << 18) | (1 << 0);
|
||||
+ tmp |= WDT_REQ_MODE_KEY;
|
||||
+ iowrite32(tmp, mtk_wdt->wdt_base + WDT_REQ_MODE);
|
||||
+
|
||||
+ tmp = ioread32(mtk_wdt->wdt_base + WDT_REQ_IRQ_EN);
|
||||
+ tmp &= ~((1 << 18) | (1 << 0));
|
||||
+ tmp |= WDT_REQ_IRQ_KEY;
|
||||
+ iowrite32(tmp, mtk_wdt->wdt_base + WDT_REQ_IRQ_EN);
|
||||
+
|
||||
return 0;
|
||||
}
|
||||
|
||||
@@ -205,8 +463,12 @@ static int mtk_wdt_remove(struct platform_device *pdev)
|
||||
{
|
||||
struct mtk_wdt_dev *mtk_wdt = platform_get_drvdata(pdev);
|
||||
|
||||
+ unregister_restart_handler(&mtk_wdt->restart_handler);
|
||||
+
|
||||
watchdog_unregister_device(&mtk_wdt->wdt_dev);
|
||||
|
||||
+ reset_controller_unregister(&mtk_wdt->reset_controller.rcdev);
|
||||
+
|
||||
return 0;
|
||||
}
|
||||
|
||||
@@ -258,6 +520,95 @@ static struct platform_driver mtk_wdt_driver = {
|
||||
|
||||
module_platform_driver(mtk_wdt_driver);
|
||||
|
||||
+static int wk_proc_cmd_read(struct seq_file *s, void *v)
|
||||
+{
|
||||
+ unsigned int enabled = 1;
|
||||
+
|
||||
+ if (!(ioread32(toprgu_base + WDT_MODE) & WDT_MODE_EN))
|
||||
+ enabled = 0;
|
||||
+
|
||||
+ seq_printf(s, "enabled timeout\n%-4d %-8d\n", enabled, wdt_dev->timeout);
|
||||
+
|
||||
+ return 0;
|
||||
+}
|
||||
+
|
||||
+static int wk_proc_cmd_open(struct inode *inode, struct file *file)
|
||||
+{
|
||||
+ return single_open(file, wk_proc_cmd_read, NULL);
|
||||
+}
|
||||
+
|
||||
+static ssize_t wk_proc_cmd_write(struct file *file, const char *buf, size_t count, loff_t *data)
|
||||
+{
|
||||
+ int ret;
|
||||
+ int enable;
|
||||
+ int timeout;
|
||||
+ char wk_cmd_buf[256];
|
||||
+
|
||||
+ if (count == 0)
|
||||
+ return -1;
|
||||
+
|
||||
+ if (count > 255)
|
||||
+ count = 255;
|
||||
+
|
||||
+ ret = copy_from_user(wk_cmd_buf, buf, count);
|
||||
+ if (ret < 0)
|
||||
+ return -1;
|
||||
+
|
||||
+ wk_cmd_buf[count] = '\0';
|
||||
+
|
||||
+ pr_debug("Write %s\n", wk_cmd_buf);
|
||||
+
|
||||
+ ret = sscanf(wk_cmd_buf, "%d %d", &enable, &timeout);
|
||||
+ if (ret != 2)
|
||||
+ pr_debug("%s: expect 2 numbers\n", __func__);
|
||||
+
|
||||
+ pr_debug("[WDK] enable=%d timeout=%d\n", enable, timeout);
|
||||
+
|
||||
+ if (timeout > 20 && timeout <= WDT_MAX_TIMEOUT) {
|
||||
+ wdt_dev->timeout = timeout;
|
||||
+ mtk_wdt_set_timeout(wdt_dev, wdt_dev->timeout);
|
||||
+ } else {
|
||||
+ pr_err("[WDK] The timeout(%d) should bigger than 20 and not bigger than %d\n",
|
||||
+ timeout, WDT_MAX_TIMEOUT);
|
||||
+
|
||||
+ }
|
||||
+
|
||||
+ if (enable == 1) {
|
||||
+ mtk_wdt_start(wdt_dev);
|
||||
+ set_bit(WDOG_ACTIVE, &wdt_dev->status);
|
||||
+ pr_err("[WDK] enable wdt\n");
|
||||
+ } else if (enable == 0) {
|
||||
+ mtk_wdt_stop(wdt_dev);
|
||||
+ clear_bit(WDOG_ACTIVE, &wdt_dev->status);
|
||||
+ pr_err("[WDK] disable wdt\n");
|
||||
+ }
|
||||
+
|
||||
+ return count;
|
||||
+}
|
||||
+
|
||||
+static const struct file_operations wk_proc_cmd_fops = {
|
||||
+ .owner = THIS_MODULE,
|
||||
+ .open = wk_proc_cmd_open,
|
||||
+ .read = seq_read,
|
||||
+ .write = wk_proc_cmd_write,
|
||||
+ .llseek = seq_lseek,
|
||||
+ .release = single_release,
|
||||
+};
|
||||
+
|
||||
+static int __init wk_proc_init(void)
|
||||
+{
|
||||
+ struct proc_dir_entry *de = proc_create("wdk", 0660, NULL, &wk_proc_cmd_fops);
|
||||
+
|
||||
+ if (!de)
|
||||
+ pr_err("[wk_proc_init]: create /proc/wdk failed\n");
|
||||
+
|
||||
+ pr_debug("[WDK] Initialize proc\n");
|
||||
+
|
||||
+ return 0;
|
||||
+}
|
||||
+
|
||||
+late_initcall(wk_proc_init);
|
||||
+
|
||||
module_param(timeout, uint, 0);
|
||||
MODULE_PARM_DESC(timeout, "Watchdog heartbeat in seconds");
|
||||
|
||||
diff --git a/include/linux/wakelock.h b/include/linux/wakelock.h
|
||||
new file mode 100644
|
||||
index 000000000000..f4a698a22880
|
||||
--- /dev/null
|
||||
+++ b/include/linux/wakelock.h
|
||||
@@ -0,0 +1,67 @@
|
||||
+/* include/linux/wakelock.h
|
||||
+ *
|
||||
+ * Copyright (C) 2007-2012 Google, Inc.
|
||||
+ *
|
||||
+ * This software is licensed under the terms of the GNU General Public
|
||||
+ * License version 2, as published by the Free Software Foundation, and
|
||||
+ * may be copied, distributed, and modified under those terms.
|
||||
+ *
|
||||
+ * This program is distributed in the hope that it will be useful,
|
||||
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
||||
+ * GNU General Public License for more details.
|
||||
+ *
|
||||
+ */
|
||||
+
|
||||
+#ifndef _LINUX_WAKELOCK_H
|
||||
+#define _LINUX_WAKELOCK_H
|
||||
+
|
||||
+#include <linux/ktime.h>
|
||||
+#include <linux/device.h>
|
||||
+
|
||||
+/* A wake_lock prevents the system from entering suspend or other low power
|
||||
+ * states when active. If the type is set to WAKE_LOCK_SUSPEND, the wake_lock
|
||||
+ * prevents a full system suspend.
|
||||
+ */
|
||||
+
|
||||
+enum {
|
||||
+ WAKE_LOCK_SUSPEND, /* Prevent suspend */
|
||||
+ WAKE_LOCK_TYPE_COUNT
|
||||
+};
|
||||
+
|
||||
+struct wake_lock {
|
||||
+ struct wakeup_source ws;
|
||||
+};
|
||||
+
|
||||
+static inline void wake_lock_init(struct wake_lock *lock, int type,
|
||||
+ const char *name)
|
||||
+{
|
||||
+ wakeup_source_init(&lock->ws, name);
|
||||
+}
|
||||
+
|
||||
+static inline void wake_lock_destroy(struct wake_lock *lock)
|
||||
+{
|
||||
+ wakeup_source_trash(&lock->ws);
|
||||
+}
|
||||
+
|
||||
+static inline void wake_lock(struct wake_lock *lock)
|
||||
+{
|
||||
+ __pm_stay_awake(&lock->ws);
|
||||
+}
|
||||
+
|
||||
+static inline void wake_lock_timeout(struct wake_lock *lock, long timeout)
|
||||
+{
|
||||
+ __pm_wakeup_event(&lock->ws, jiffies_to_msecs(timeout));
|
||||
+}
|
||||
+
|
||||
+static inline void wake_unlock(struct wake_lock *lock)
|
||||
+{
|
||||
+ __pm_relax(&lock->ws);
|
||||
+}
|
||||
+
|
||||
+static inline int wake_lock_active(struct wake_lock *lock)
|
||||
+{
|
||||
+ return lock->ws.active;
|
||||
+}
|
||||
+
|
||||
+#endif
|
||||
diff --git a/include/net/genetlink.h b/include/net/genetlink.h
|
||||
index decf6012a401..6471da92334a 100644
|
||||
--- a/include/net/genetlink.h
|
||||
+++ b/include/net/genetlink.h
|
||||
@@ -144,6 +144,50 @@ struct genl_ops {
|
||||
};
|
||||
|
||||
int genl_register_family(struct genl_family *family);
|
||||
+
|
||||
+/**
|
||||
+ * genl_register_family_with_ops - register a generic netlink family with ops
|
||||
+ * @family: generic netlink family
|
||||
+ * @ops: operations to be registered
|
||||
+ * @n_ops: number of elements to register
|
||||
+ *
|
||||
+ * Registers the specified family and operations from the specified table.
|
||||
+ * Only one family may be registered with the same family name or identifier.
|
||||
+ *
|
||||
+ * The family id may equal GENL_ID_GENERATE causing an unique id to
|
||||
+ * be automatically generated and assigned.
|
||||
+ *
|
||||
+ * Either a doit or dumpit callback must be specified for every registered
|
||||
+ * operation or the function will fail. Only one operation structure per
|
||||
+ * command identifier may be registered.
|
||||
+ *
|
||||
+ * See include/net/genetlink.h for more documenation on the operations
|
||||
+ * structure.
|
||||
+ *
|
||||
+ * Return 0 on success or a negative error code.
|
||||
+ */
|
||||
+static inline int
|
||||
+_genl_register_family_with_ops_grps(struct genl_family *family,
|
||||
+ const struct genl_ops *ops, size_t n_ops,
|
||||
+ const struct genl_multicast_group *mcgrps,
|
||||
+ size_t n_mcgrps)
|
||||
+{
|
||||
+ family->module = THIS_MODULE;
|
||||
+ family->ops = ops;
|
||||
+ family->n_ops = n_ops;
|
||||
+ family->mcgrps = mcgrps;
|
||||
+ family->n_mcgrps = n_mcgrps;
|
||||
+ return genl_register_family(family);
|
||||
+}
|
||||
+#define genl_register_family_with_ops(family, ops) \
|
||||
+ _genl_register_family_with_ops_grps((family), \
|
||||
+ (ops), ARRAY_SIZE(ops), \
|
||||
+ NULL, 0)
|
||||
+#define genl_register_family_with_ops_groups(family, ops, grps) \
|
||||
+ _genl_register_family_with_ops_grps((family), \
|
||||
+ (ops), ARRAY_SIZE(ops), \
|
||||
+ (grps), ARRAY_SIZE(grps))
|
||||
+
|
||||
int genl_unregister_family(const struct genl_family *family);
|
||||
void genl_notify(const struct genl_family *family, struct sk_buff *skb,
|
||||
struct genl_info *info, u32 group, gfp_t flags);
|
||||
diff --git a/include/soc/mediatek/pmic_wrap.h b/include/soc/mediatek/pmic_wrap.h
|
||||
new file mode 100644
|
||||
index 000000000000..5b5c85272c58
|
||||
--- /dev/null
|
||||
+++ b/include/soc/mediatek/pmic_wrap.h
|
||||
@@ -0,0 +1,19 @@
|
||||
+/*
|
||||
+ * Copyright (C) 2015 MediaTek Inc.
|
||||
+ *
|
||||
+ * This program is free software: you can redistribute it and/or modify
|
||||
+ * it under the terms of the GNU General Public License version 2 as
|
||||
+ * published by the Free Software Foundation.
|
||||
+ *
|
||||
+ * This program is distributed in the hope that it will be useful,
|
||||
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
||||
+ * GNU General Public License for more details.
|
||||
+ */
|
||||
+
|
||||
+#ifndef __SOC_MEDIATEK_PMIC_WRAP_H
|
||||
+#define __SOC_MEDIATEK_PMIC_WRAP_H
|
||||
+
|
||||
+extern struct regmap *pwrap_node_to_regmap(struct device_node *np);
|
||||
+
|
||||
+#endif /* __SOC_MEDIATEK_PMIC_WRAP_H */
|
||||
diff --git a/include/uapi/linux/genetlink.h b/include/uapi/linux/genetlink.h
|
||||
index 877f7fa95466..6a176b3d43f9 100644
|
||||
--- a/include/uapi/linux/genetlink.h
|
||||
+++ b/include/uapi/linux/genetlink.h
|
||||
@@ -27,6 +27,7 @@ struct genlmsghdr {
|
||||
/*
|
||||
* List of reserved static generic netlink identifiers:
|
||||
*/
|
||||
+#define GENL_ID_GENERATE 0
|
||||
#define GENL_ID_CTRL NLMSG_MIN_TYPE
|
||||
#define GENL_ID_VFS_DQUOT (NLMSG_MIN_TYPE + 1)
|
||||
#define GENL_ID_PMCRAID (NLMSG_MIN_TYPE + 2)
|
||||
--
|
||||
2.19.1
|
||||
|
||||
|
|
@ -0,0 +1,78 @@
|
|||
From 203a5a7727a80ab519ea00181a909e415c5567ab Mon Sep 17 00:00:00 2001
|
||||
From: Frank Wunderlich <frank-w@public-files.de>
|
||||
Date: Wed, 29 Aug 2018 19:17:00 +0200
|
||||
Subject: [PATCH 08/77] [gcc] gcc8-fixes by Dominik Koch + nic_rx-patch from
|
||||
https://bugs.linaro.org/show_bug.cgi?id=3823
|
||||
|
||||
---
|
||||
.../misc/mediatek/connectivity/wlan/gen2/nic/nic_rx.c | 10 ++++++----
|
||||
.../misc/mediatek/connectivity/wlan/gen2/nic/que_mgt.c | 2 +-
|
||||
.../connectivity/wlan/gen2/os/linux/include/gl_kal.h | 2 +-
|
||||
3 files changed, 8 insertions(+), 6 deletions(-)
|
||||
|
||||
diff --git a/drivers/misc/mediatek/connectivity/wlan/gen2/nic/nic_rx.c b/drivers/misc/mediatek/connectivity/wlan/gen2/nic/nic_rx.c
|
||||
index ba4840414da8..65823023cec0 100644
|
||||
--- a/drivers/misc/mediatek/connectivity/wlan/gen2/nic/nic_rx.c
|
||||
+++ b/drivers/misc/mediatek/connectivity/wlan/gen2/nic/nic_rx.c
|
||||
@@ -2061,7 +2061,6 @@ VOID nicRxProcessEventPacket(IN P_ADAPTER_T prAdapter, IN OUT P_SW_RFB_T prSwRfb
|
||||
case EVENT_ID_BT_OVER_WIFI:
|
||||
#if CFG_ENABLE_BT_OVER_WIFI
|
||||
{
|
||||
- UINT_8 aucTmp[sizeof(AMPC_EVENT) + sizeof(BOW_LINK_DISCONNECTED)];
|
||||
P_EVENT_BT_OVER_WIFI prEventBtOverWifi;
|
||||
P_AMPC_EVENT prBowEvent;
|
||||
P_BOW_LINK_CONNECTED prBowLinkConnected;
|
||||
@@ -2069,11 +2068,11 @@ VOID nicRxProcessEventPacket(IN P_ADAPTER_T prAdapter, IN OUT P_SW_RFB_T prSwRfb
|
||||
|
||||
prEventBtOverWifi = (P_EVENT_BT_OVER_WIFI) (prEvent->aucBuffer);
|
||||
|
||||
- /* construct event header */
|
||||
- prBowEvent = (P_AMPC_EVENT) aucTmp;
|
||||
-
|
||||
if (prEventBtOverWifi->ucLinkStatus == 0) {
|
||||
/* Connection */
|
||||
+ UINT_8 aucTmp[sizeof(AMPC_EVENT) + sizeof(BOW_LINK_CONNECTED)];
|
||||
+ /* construct event header */
|
||||
+ prBowEvent = (P_AMPC_EVENT) aucTmp;
|
||||
prBowEvent->rHeader.ucEventId = BOW_EVENT_ID_LINK_CONNECTED;
|
||||
prBowEvent->rHeader.ucSeqNumber = 0;
|
||||
prBowEvent->rHeader.u2PayloadLength = sizeof(BOW_LINK_CONNECTED);
|
||||
@@ -2086,6 +2085,9 @@ VOID nicRxProcessEventPacket(IN P_ADAPTER_T prAdapter, IN OUT P_SW_RFB_T prSwRfb
|
||||
kalIndicateBOWEvent(prAdapter->prGlueInfo, prBowEvent);
|
||||
} else {
|
||||
/* Disconnection */
|
||||
+ UINT_8 aucTmp[sizeof(AMPC_EVENT) + sizeof(BOW_LINK_DISCONNECTED)];
|
||||
+ /* construct event header */
|
||||
+ prBowEvent = (P_AMPC_EVENT) aucTmp;
|
||||
prBowEvent->rHeader.ucEventId = BOW_EVENT_ID_LINK_DISCONNECTED;
|
||||
prBowEvent->rHeader.ucSeqNumber = 0;
|
||||
prBowEvent->rHeader.u2PayloadLength = sizeof(BOW_LINK_DISCONNECTED);
|
||||
diff --git a/drivers/misc/mediatek/connectivity/wlan/gen2/nic/que_mgt.c b/drivers/misc/mediatek/connectivity/wlan/gen2/nic/que_mgt.c
|
||||
index dd00859d4608..ad7107b1d9a4 100644
|
||||
--- a/drivers/misc/mediatek/connectivity/wlan/gen2/nic/que_mgt.c
|
||||
+++ b/drivers/misc/mediatek/connectivity/wlan/gen2/nic/que_mgt.c
|
||||
@@ -5021,7 +5021,7 @@ VOID qmHandleRxArpPackets(P_ADAPTER_T prAdapter, P_SW_RFB_T prSwRfb)
|
||||
if (prBssInfo && prBssInfo->prStaRecOfAP && prBssInfo->prStaRecOfAP->aucMacAddr) {
|
||||
if (EQUAL_MAC_ADDR(&(pucData[ETH_TYPE_LEN_OFFSET + 10]), /* source hardware address */
|
||||
prBssInfo->prStaRecOfAP->aucMacAddr)) {
|
||||
- strncpy(apIp, &(pucData[ETH_TYPE_LEN_OFFSET + 16]), sizeof(apIp)); /* src ip address */
|
||||
+ memcpy(apIp, &(pucData[ETH_TYPE_LEN_OFFSET + 16]), sizeof(apIp)); /* src ip address */
|
||||
DBGLOG(INIT, TRACE, "get arp response from AP %d.%d.%d.%d\n",
|
||||
apIp[0], apIp[1], apIp[2], apIp[3]);
|
||||
}
|
||||
diff --git a/drivers/misc/mediatek/connectivity/wlan/gen2/os/linux/include/gl_kal.h b/drivers/misc/mediatek/connectivity/wlan/gen2/os/linux/include/gl_kal.h
|
||||
index 1406905095e6..b1386918c08d 100644
|
||||
--- a/drivers/misc/mediatek/connectivity/wlan/gen2/os/linux/include/gl_kal.h
|
||||
+++ b/drivers/misc/mediatek/connectivity/wlan/gen2/os/linux/include/gl_kal.h
|
||||
@@ -852,7 +852,7 @@ struct KAL_HALT_CTRL_T {
|
||||
|
||||
/* string operation */
|
||||
#define kalStrCpy(dest, src) strcpy(dest, src)
|
||||
-#define kalStrnCpy(dest, src, n) strncpy(dest, src, n)
|
||||
+#define kalStrnCpy(dest, src, n) memcpy(dest, src, n)
|
||||
#define kalStrCmp(ct, cs) strcmp(ct, cs)
|
||||
#define kalStrnCmp(ct, cs, n) strncmp(ct, cs, n)
|
||||
#define kalStrChr(s, c) strchr(s, c)
|
||||
--
|
||||
2.19.1
|
||||
|
||||
|
|
@ -0,0 +1,52 @@
|
|||
From b3bf5911a5d9f6eb8112d294ffaf5f474dccc686 Mon Sep 17 00:00:00 2001
|
||||
From: Frank Wunderlich <frank-w@public-files.de>
|
||||
Date: Tue, 23 Oct 2018 13:31:20 +0200
|
||||
Subject: [PATCH 09/77] [wifi] activated wifi-options
|
||||
|
||||
---
|
||||
arch/arm/configs/mt7623n_evb_fwu_defconfig | 18 +++++++++---------
|
||||
1 file changed, 9 insertions(+), 9 deletions(-)
|
||||
|
||||
diff --git a/arch/arm/configs/mt7623n_evb_fwu_defconfig b/arch/arm/configs/mt7623n_evb_fwu_defconfig
|
||||
index 09df75013c09..fe7532886ccc 100644
|
||||
--- a/arch/arm/configs/mt7623n_evb_fwu_defconfig
|
||||
+++ b/arch/arm/configs/mt7623n_evb_fwu_defconfig
|
||||
@@ -141,8 +141,8 @@ CONFIG_NF_LOG_IPV6=m
|
||||
CONFIG_NF_REJECT_IPV6=m
|
||||
CONFIG_IP_NF_NAT=m
|
||||
CONFIG_IP6_NF_NAT=m
|
||||
-CONFIG_NF_NAT_MASQUERADE_IPV4=m
|
||||
-CONFIG_NF_NAT_MASQUERADE_IPV6=m
|
||||
+CONFIG_NF_NAT_MASQUERADE_IPV4=y
|
||||
+CONFIG_NF_NAT_MASQUERADE_IPV6=y
|
||||
CONFIG_IP_NF_FILTER=m
|
||||
CONFIG_IP6_NF_FILTER=m
|
||||
CONFIG_IP_NF_TARGET_MASQUERADE=m
|
||||
@@ -376,17 +376,17 @@ CONFIG_CFG80211=y
|
||||
|
||||
#internal wlan (not working yet)
|
||||
# CONFIG_MTK_CONN_LTE_IDC_SUPPORT is not set
|
||||
-#CONFIG_MTK_COMBO=y
|
||||
-#CONFIG_MTK_COMBO_CHIP_CONSYS_7623=y
|
||||
+CONFIG_MTK_COMBO=y
|
||||
+CONFIG_MTK_COMBO_CHIP_CONSYS_7623=y
|
||||
#used in 4.4, but should be set in Kconfig by selecting mt7623 COMBO
|
||||
-#CONFIG_MTK_PLATFORM="mt7623"
|
||||
+CONFIG_MTK_PLATFORM="mt7623"
|
||||
|
||||
-#CONFIG_MTK_COMBO_COMM=y
|
||||
-#CONFIG_MTK_COMBO_WIFI=y
|
||||
-#CONFIG_NL80211_TESTMODE=y
|
||||
+CONFIG_MTK_COMBO_COMM=y
|
||||
+CONFIG_MTK_COMBO_WIFI=y
|
||||
+CONFIG_NL80211_TESTMODE=y
|
||||
|
||||
#internal Bluetooth (also not working yet)
|
||||
-#CONFIG_BT=y
|
||||
+CONFIG_BT=y
|
||||
#CONFIG_MTK_COMBO_BT=y
|
||||
#CONFIG_MTK_COMBO_BT_HCI=y
|
||||
#needed for BT?
|
||||
--
|
||||
2.19.1
|
||||
|
||||
|
|
@ -0,0 +1,34 @@
|
|||
From ec64b17f37390c32cd88ebddbabd423f438335fc Mon Sep 17 00:00:00 2001
|
||||
From: Frank Wunderlich <frank-w@public-files.de>
|
||||
Date: Sun, 11 Nov 2018 09:52:44 +0100
|
||||
Subject: [PATCH 12/77] [defconfig] add missing CONFIG_PCI_MSI (needed for pcie
|
||||
and maybe sata) and EARLY_PRINTK
|
||||
|
||||
---
|
||||
arch/arm/configs/mt7623n_evb_fwu_defconfig | 3 +++
|
||||
1 file changed, 3 insertions(+)
|
||||
|
||||
diff --git a/arch/arm/configs/mt7623n_evb_fwu_defconfig b/arch/arm/configs/mt7623n_evb_fwu_defconfig
|
||||
index d7741650941f..fe1edaa7680f 100644
|
||||
--- a/arch/arm/configs/mt7623n_evb_fwu_defconfig
|
||||
+++ b/arch/arm/configs/mt7623n_evb_fwu_defconfig
|
||||
@@ -1,6 +1,8 @@
|
||||
CONFIG_LOCALVERSION="-bpi-r2"
|
||||
CONFIG_LOCALVERSION_AUTO=n
|
||||
|
||||
+CONFIG_EARLY_PRINTK=y
|
||||
+
|
||||
#spectre/meltdown
|
||||
CONFIG_PAGE_TABLE_ISOLATION=y
|
||||
|
||||
@@ -58,6 +60,7 @@ CONFIG_PL310_ERRATA_753970=y
|
||||
CONFIG_PL310_ERRATA_769419=y
|
||||
|
||||
CONFIG_PCI=y
|
||||
+CONFIG_PCI_MSI=y
|
||||
CONFIG_SMP=y
|
||||
CONFIG_HAVE_ARM_ARCH_TIMER=y
|
||||
CONFIG_NR_CPUS=16
|
||||
--
|
||||
2.19.1
|
||||
|
||||
34
root/target/linux/mediatek/patches-4.19/0014-dts-set-mac-address-eth0.patch
Executable file
34
root/target/linux/mediatek/patches-4.19/0014-dts-set-mac-address-eth0.patch
Executable file
|
|
@ -0,0 +1,34 @@
|
|||
From 961d318c99fb0019f0fa571a160af09e859d63e8 Mon Sep 17 00:00:00 2001
|
||||
From: Frank Wunderlich <frank-w@public-files.de>
|
||||
Date: Mon, 31 Dec 2018 17:00:56 +0100
|
||||
Subject: [PATCH 14/77] [dts] set mac-address (eth0)
|
||||
|
||||
can be overwritten by uboot (ethaddr) if using separated fdt
|
||||
or devicetree-overlay
|
||||
---
|
||||
arch/arm/boot/dts/mt7623n-bananapi-bpi-r2.dts | 2 ++
|
||||
1 file changed, 2 insertions(+)
|
||||
|
||||
diff --git a/arch/arm/boot/dts/mt7623n-bananapi-bpi-r2.dts b/arch/arm/boot/dts/mt7623n-bananapi-bpi-r2.dts
|
||||
index 465fb887b2ca..a47022765326 100644
|
||||
--- a/arch/arm/boot/dts/mt7623n-bananapi-bpi-r2.dts
|
||||
+++ b/arch/arm/boot/dts/mt7623n-bananapi-bpi-r2.dts
|
||||
@@ -15,6 +15,7 @@
|
||||
|
||||
aliases {
|
||||
serial2 = &uart2;
|
||||
+ ethernet0 = &gmac0;
|
||||
};
|
||||
|
||||
chosen {
|
||||
@@ -147,6 +148,7 @@
|
||||
compatible = "mediatek,eth-mac";
|
||||
reg = <0>;
|
||||
phy-mode = "trgmii";
|
||||
+ mac-address = [02 02 02 02 02 02];
|
||||
|
||||
fixed-link {
|
||||
speed = <1000>;
|
||||
--
|
||||
2.19.1
|
||||
|
||||
|
|
@ -0,0 +1,40 @@
|
|||
From d226d27f0419a6d1f2fa42abbf67eb4315223372 Mon Sep 17 00:00:00 2001
|
||||
From: Frank Wunderlich <frank-w@public-files.de>
|
||||
Date: Sat, 5 Jan 2019 10:11:41 +0100
|
||||
Subject: [PATCH 16/77] [build.sh,dts] added devicetree-Overlay
|
||||
|
||||
compile bpi-r2-mac.dts like this:
|
||||
|
||||
dtc -@ -I dts -O dtb -o bpi-r2-mac.dtb bpi-r2-mac.dts
|
||||
|
||||
in uboot you can load DTO with this (after loading base ftd):
|
||||
loaddto=echo "loaddto:${dto}";fdt addr ${dtaddr};fdt resize 8192; setexpr fdtovaddr ${dtaddr} + F000;
|
||||
fatload ${device} ${partition} ${fdtovaddr} ${bpi}/${board}/${service}/dtb/${dto} && fdt apply ${fdtovaddr}
|
||||
|
||||
uboot needs option CONFIG_OF_LIBFDT_OVERLAY=y
|
||||
---
|
||||
bpi-r2-mac.dts | 12 ++++++++++++
|
||||
1 files changed, 12 insertions(+)
|
||||
create mode 100644 bpi-r2-mac.dts
|
||||
|
||||
diff --git a/bpi-r2-mac.dts b/bpi-r2-mac.dts
|
||||
new file mode 100644
|
||||
index 000000000000..f4eed976e158
|
||||
--- /dev/null
|
||||
+++ b/bpi-r2-mac.dts
|
||||
@@ -0,0 +1,12 @@
|
||||
+/dts-v1/;
|
||||
+/plugin/;
|
||||
+
|
||||
+/ {
|
||||
+ fragment@0 {
|
||||
+ /*target = <&gmac0>;*/
|
||||
+ target-path = "/eth/gmac0";
|
||||
+ __overlay__ {
|
||||
+ mac-address = [02 01 02 03 04 05];
|
||||
+ };
|
||||
+ };
|
||||
+};
|
||||
--
|
||||
2.19.1
|
||||
|
||||
|
|
@ -0,0 +1,60 @@
|
|||
From 329ff45aafea77cd9f5c97d2988e7c399ef05d6d Mon Sep 17 00:00:00 2001
|
||||
From: Frank Wunderlich <frank-w@public-files.de>
|
||||
Date: Thu, 29 Nov 2018 11:34:09 +0100
|
||||
Subject: [PATCH 19/77] net: dsa: adding fields for holding information about
|
||||
upstream-port
|
||||
|
||||
for multiple cpu-Ports aech port needs storing the the cpu-port to be used
|
||||
this Patch adds the needed fields for this
|
||||
|
||||
based on
|
||||
https://github.com/openwrt/openwrt/blob/master/target/linux/mediatek/patches-4.14/0033-dsa-multi-cpu.patch
|
||||
|
||||
Signed-off-by: Frank Wunderlich <frank-w@public-files.de>
|
||||
---
|
||||
include/net/dsa.h | 4 ++++
|
||||
net/dsa/dsa_priv.h | 5 +++++
|
||||
2 files changed, 9 insertions(+)
|
||||
|
||||
diff --git a/include/net/dsa.h b/include/net/dsa.h
|
||||
index 461e8a7661b7..6e0c95625a21 100644
|
||||
--- a/include/net/dsa.h
|
||||
+++ b/include/net/dsa.h
|
||||
@@ -202,6 +202,10 @@ struct dsa_port {
|
||||
struct net_device *bridge_dev;
|
||||
struct devlink_port devlink_port;
|
||||
struct phylink *pl;
|
||||
+
|
||||
+ struct net_device *ethernet;
|
||||
+ int upstream;
|
||||
+
|
||||
/*
|
||||
* Original copy of the master netdev ethtool_ops
|
||||
*/
|
||||
diff --git a/net/dsa/dsa_priv.h b/net/dsa/dsa_priv.h
|
||||
index 3964c6f7a7c0..559a3a250c88 100644
|
||||
--- a/net/dsa/dsa_priv.h
|
||||
+++ b/net/dsa/dsa_priv.h
|
||||
@@ -81,6 +81,8 @@ struct dsa_slave_priv {
|
||||
|
||||
/* TC context */
|
||||
struct list_head mall_tc_list;
|
||||
+
|
||||
+ struct net_device *master;
|
||||
};
|
||||
|
||||
/* dsa.c */
|
||||
@@ -187,7 +189,10 @@ static inline struct net_device *
|
||||
dsa_slave_to_master(const struct net_device *dev)
|
||||
{
|
||||
struct dsa_port *dp = dsa_slave_to_port(dev);
|
||||
+ struct dsa_slave_priv *p = netdev_priv(dev);
|
||||
|
||||
+ if (p->master)
|
||||
+ return p->master;
|
||||
return dp->cpu_dp->master;
|
||||
}
|
||||
|
||||
--
|
||||
2.19.1
|
||||
|
||||
|
|
@ -0,0 +1,86 @@
|
|||
From 90adf38283688d8c25feeb7e3989cc2da3d58122 Mon Sep 17 00:00:00 2001
|
||||
From: Frank Wunderlich <frank-w@public-files.de>
|
||||
Date: Thu, 29 Nov 2018 11:27:12 +0100
|
||||
Subject: [PATCH 20/77] net: dsa: add helper functions
|
||||
|
||||
for using mutliple cpu-Ports 3 additional functions are defined to read
|
||||
dts-option (dsa_user_parse) and check if current port is a upstream-port
|
||||
(dsa_port_upstream_port, dsa_is_upstream_port)
|
||||
|
||||
based on
|
||||
https://github.com/openwrt/openwrt/blob/master/target/linux/mediatek/patches-4.14/0033-dsa-multi-cpu.patch
|
||||
|
||||
Signed-off-by: Frank Wunderlich <frank-w@public-files.de>
|
||||
---
|
||||
include/net/dsa.h | 18 ++++++++++++++++++
|
||||
net/dsa/dsa2.c | 18 ++++++++++++++++++
|
||||
2 files changed, 36 insertions(+)
|
||||
|
||||
diff --git a/include/net/dsa.h b/include/net/dsa.h
|
||||
index 6e0c95625a21..36db2ee83da6 100644
|
||||
--- a/include/net/dsa.h
|
||||
+++ b/include/net/dsa.h
|
||||
@@ -318,6 +318,12 @@ static inline unsigned int dsa_towards_port(struct dsa_switch *ds, int device,
|
||||
return ds->rtable[device];
|
||||
}
|
||||
|
||||
+
|
||||
+static inline bool dsa_is_upstream_port(struct dsa_switch *ds, int p)
|
||||
+{
|
||||
+ return dsa_is_cpu_port(ds, p) || dsa_is_dsa_port(ds, p);
|
||||
+}
|
||||
+
|
||||
/* Return the local port used to reach the dedicated CPU port */
|
||||
static inline unsigned int dsa_upstream_port(struct dsa_switch *ds, int port)
|
||||
{
|
||||
@@ -330,6 +336,18 @@ static inline unsigned int dsa_upstream_port(struct dsa_switch *ds, int port)
|
||||
return dsa_towards_port(ds, cpu_dp->ds->index, cpu_dp->index);
|
||||
}
|
||||
|
||||
+static inline u8 dsa_port_upstream_port(struct dsa_switch *ds, int port)
|
||||
+{
|
||||
+ /*
|
||||
+ * If this port has a specific upstream cpu port, use it,
|
||||
+ * otherwise use the switch default.
|
||||
+ */
|
||||
+ if (ds->ports[port].upstream)
|
||||
+ return ds->ports[port].upstream;
|
||||
+ else
|
||||
+ return dsa_upstream_port(ds, port);
|
||||
+}
|
||||
+
|
||||
typedef int dsa_fdb_dump_cb_t(const unsigned char *addr, u16 vid,
|
||||
bool is_static, void *data);
|
||||
struct dsa_switch_ops {
|
||||
diff --git a/net/dsa/dsa2.c b/net/dsa/dsa2.c
|
||||
index a1917025e155..b7c6da2f1f08 100644
|
||||
--- a/net/dsa/dsa2.c
|
||||
+++ b/net/dsa/dsa2.c
|
||||
@@ -255,6 +255,24 @@ static void dsa_tree_teardown_default_cpu(struct dsa_switch_tree *dst)
|
||||
dst->cpu_dp = NULL;
|
||||
}
|
||||
|
||||
+static int dsa_user_parse(struct dsa_port *port, u32 index,
|
||||
+ struct dsa_switch *ds)
|
||||
+{
|
||||
+ struct device_node *cpu_port;
|
||||
+ const unsigned int *cpu_port_reg;
|
||||
+ int cpu_port_index;
|
||||
+
|
||||
+ cpu_port = of_parse_phandle(port->dn, "default_cpu", 0);
|
||||
+ if (cpu_port) {
|
||||
+ cpu_port_reg = of_get_property(cpu_port, "reg", NULL);
|
||||
+ if (!cpu_port_reg)
|
||||
+ return -EINVAL;
|
||||
+ cpu_port_index = be32_to_cpup(cpu_port_reg);
|
||||
+ ds->ports[index].upstream = cpu_port_index;
|
||||
+ }
|
||||
+ return 0;
|
||||
+}
|
||||
+
|
||||
static int dsa_port_setup(struct dsa_port *dp)
|
||||
{
|
||||
struct dsa_switch *ds = dp->ds;
|
||||
--
|
||||
2.19.1
|
||||
|
||||
|
|
@ -0,0 +1,102 @@
|
|||
From 8325a7cbf9648725163a7596ba3381775039fe69 Mon Sep 17 00:00:00 2001
|
||||
From: Frank Wunderlich <frank-w@public-files.de>
|
||||
Date: Thu, 29 Nov 2018 11:38:27 +0100
|
||||
Subject: [PATCH 21/77] net: dsa: adding handling of second CPU-Port
|
||||
|
||||
this patch adds the core-functionality of multiple cpu-ports
|
||||
|
||||
currently it uses definition in dts to make connection between cpu and user-port
|
||||
|
||||
based on
|
||||
https://github.com/openwrt/openwrt/blob/master/target/linux/mediatek/patches-4.14/0033-dsa-multi-cpu.patch
|
||||
|
||||
Signed-off-by: Frank Wunderlich <frank-w@public-files.de>
|
||||
---
|
||||
net/dsa/dsa2.c | 18 ++++++++++++++++++
|
||||
net/dsa/slave.c | 3 ++-
|
||||
2 files changed, 20 insertions(+), 1 deletion(-)
|
||||
|
||||
diff --git a/net/dsa/dsa2.c b/net/dsa/dsa2.c
|
||||
index b7c6da2f1f08..8f64535fd2a0 100644
|
||||
--- a/net/dsa/dsa2.c
|
||||
+++ b/net/dsa/dsa2.c
|
||||
@@ -303,6 +303,8 @@ static int dsa_port_setup(struct dsa_port *dp)
|
||||
ds->index, dp->index);
|
||||
return err;
|
||||
}
|
||||
+ if (dp->master)
|
||||
+ dp->master->dsa_ptr = dp;
|
||||
break;
|
||||
case DSA_PORT_TYPE_DSA:
|
||||
/* dp->index is used now as port_number. However
|
||||
@@ -323,12 +325,17 @@ static int dsa_port_setup(struct dsa_port *dp)
|
||||
devlink_port_attrs_set(&dp->devlink_port,
|
||||
DEVLINK_PORT_FLAVOUR_PHYSICAL,
|
||||
dp->index, false, 0);
|
||||
+ err = dsa_user_parse(dp, dp->index, ds);
|
||||
+ if (err)
|
||||
+ return err;
|
||||
+
|
||||
err = dsa_slave_create(dp);
|
||||
if (err)
|
||||
dev_err(ds->dev, "failed to create slave for port %d.%d\n",
|
||||
ds->index, dp->index);
|
||||
else
|
||||
devlink_port_type_eth_set(&dp->devlink_port, dp->slave);
|
||||
+
|
||||
break;
|
||||
}
|
||||
|
||||
@@ -344,6 +351,14 @@ static void dsa_port_teardown(struct dsa_port *dp)
|
||||
case DSA_PORT_TYPE_UNUSED:
|
||||
break;
|
||||
case DSA_PORT_TYPE_CPU:
|
||||
+ dsa_port_link_unregister_of(dp);
|
||||
+ if (dp->master)
|
||||
+ dp->master->dsa_ptr = NULL;
|
||||
+ if (dp->ethernet) {
|
||||
+ dev_put(dp->ethernet);
|
||||
+ dp->ethernet = NULL;
|
||||
+ }
|
||||
+ break;
|
||||
case DSA_PORT_TYPE_DSA:
|
||||
dsa_port_link_unregister_of(dp);
|
||||
break;
|
||||
@@ -598,6 +613,9 @@ static int dsa_port_parse_cpu(struct dsa_port *dp, struct net_device *master)
|
||||
dp->master = master;
|
||||
dp->dst = dst;
|
||||
|
||||
+ dev_hold(master);
|
||||
+ ds->ports[dp->index].ethernet = master;
|
||||
+
|
||||
return 0;
|
||||
}
|
||||
|
||||
diff --git a/net/dsa/slave.c b/net/dsa/slave.c
|
||||
index 1c45c1d6d241..3bdbd53d3420 100644
|
||||
--- a/net/dsa/slave.c
|
||||
+++ b/net/dsa/slave.c
|
||||
@@ -1291,11 +1291,11 @@ static void dsa_slave_notify(struct net_device *dev, unsigned long val)
|
||||
int dsa_slave_create(struct dsa_port *port)
|
||||
{
|
||||
const struct dsa_port *cpu_dp = port->cpu_dp;
|
||||
- struct net_device *master = cpu_dp->master;
|
||||
struct dsa_switch *ds = port->ds;
|
||||
const char *name = port->name;
|
||||
struct net_device *slave_dev;
|
||||
struct dsa_slave_priv *p;
|
||||
+ struct net_device *master = ds->ports[port->upstream].ethernet;
|
||||
int ret;
|
||||
|
||||
if (!ds->num_tx_queues)
|
||||
@@ -1334,6 +1334,7 @@ int dsa_slave_create(struct dsa_port *port)
|
||||
p->dp = port;
|
||||
INIT_LIST_HEAD(&p->mall_tc_list);
|
||||
p->xmit = cpu_dp->tag_ops->xmit;
|
||||
+ p->master = master;
|
||||
port->slave = slave_dev;
|
||||
|
||||
netif_carrier_off(slave_dev);
|
||||
--
|
||||
2.19.1
|
||||
|
||||
|
|
@ -0,0 +1,34 @@
|
|||
From a80c992c93729c817267ea5575faa089a278e593 Mon Sep 17 00:00:00 2001
|
||||
From: Frank Wunderlich <frank-w@public-files.de>
|
||||
Date: Sat, 8 Dec 2018 19:22:22 +0100
|
||||
Subject: [PATCH 22/77] net: dsa: add support for GMAC2 wired to ext
|
||||
|
||||
cpu-ports of mt7530 need some special flags to be set
|
||||
|
||||
based on
|
||||
https://github.com/openwrt/openwrt/blob/master/target/linux/mediatek/patches-4.14/0032-net-dsa-mediatek-add-support-for-GMAC2-wired-to-ext-.patch
|
||||
|
||||
Signed-off-by: Frank Wunderlich <frank-w@public-files.de>
|
||||
---
|
||||
drivers/net/dsa/mt7530.c | 5 +++++
|
||||
1 file changed, 5 insertions(+)
|
||||
|
||||
diff --git a/drivers/net/dsa/mt7530.c b/drivers/net/dsa/mt7530.c
|
||||
index 62e486652e62..8ed0af6abe7d 100644
|
||||
--- a/drivers/net/dsa/mt7530.c
|
||||
+++ b/drivers/net/dsa/mt7530.c
|
||||
@@ -1281,6 +1281,11 @@ mt7530_setup(struct dsa_switch *ds)
|
||||
val = mt7530_read(priv, MT7530_MHWTRAP);
|
||||
val &= ~MHWTRAP_P6_DIS & ~MHWTRAP_PHY_ACCESS;
|
||||
val |= MHWTRAP_MANUAL;
|
||||
+ if (!dsa_is_cpu_port(ds, 5)) {
|
||||
+ val |= MHWTRAP_P5_DIS;
|
||||
+ val |= MHWTRAP_P5_MAC_SEL;
|
||||
+ val |= MHWTRAP_P5_RGMII_MODE;
|
||||
+ }
|
||||
mt7530_write(priv, MT7530_MHWTRAP, val);
|
||||
|
||||
/* Enable and reset MIB counters */
|
||||
--
|
||||
2.19.1
|
||||
|
||||
|
|
@ -0,0 +1,121 @@
|
|||
From 954b359077f770bdbb376db571a4710965684dc9 Mon Sep 17 00:00:00 2001
|
||||
From: Frank Wunderlich <frank-w@public-files.de>
|
||||
Date: Sat, 8 Dec 2018 19:25:57 +0100
|
||||
Subject: [PATCH 23/77] net: dsa: dsa multi cpu (mt7530.c)
|
||||
|
||||
implementing changes to mt7530 switch driver for supporting multiple (2)
|
||||
cpu-ports
|
||||
|
||||
based on
|
||||
https://github.com/openwrt/openwrt/blob/master/target/linux/mediatek/patches-4.14/0033-dsa-multi-cpu.patch
|
||||
|
||||
Signed-off-by: Frank Wunderlich <frank-w@public-files.de>
|
||||
---
|
||||
drivers/net/dsa/mt7530.c | 34 +++++++++++++++++++---------------
|
||||
1 file changed, 19 insertions(+), 15 deletions(-)
|
||||
|
||||
diff --git a/drivers/net/dsa/mt7530.c b/drivers/net/dsa/mt7530.c
|
||||
index 8ed0af6abe7d..fda1b67dfeac 100644
|
||||
--- a/drivers/net/dsa/mt7530.c
|
||||
+++ b/drivers/net/dsa/mt7530.c
|
||||
@@ -678,6 +678,9 @@ static int
|
||||
mt7530_cpu_port_enable(struct mt7530_priv *priv,
|
||||
int port)
|
||||
{
|
||||
+ u8 port_mask = 0;
|
||||
+ int i;
|
||||
+
|
||||
/* Enable Mediatek header mode on the cpu port */
|
||||
mt7530_write(priv, MT7530_PVC_P(port),
|
||||
PORT_SPEC_TAG);
|
||||
@@ -694,8 +697,14 @@ mt7530_cpu_port_enable(struct mt7530_priv *priv,
|
||||
/* CPU port gets connected to all user ports of
|
||||
* the switch
|
||||
*/
|
||||
+
|
||||
+ for (i = 0; i < MT7530_NUM_PORTS; i++)
|
||||
+ if ((priv->ds->ports[port].type == DSA_PORT_TYPE_USER) &&
|
||||
+ (dsa_port_upstream_port(priv->ds, i) == port))
|
||||
+ port_mask |= BIT(i);
|
||||
+
|
||||
mt7530_write(priv, MT7530_PCR_P(port),
|
||||
- PCR_MATRIX(dsa_user_ports(priv->ds)));
|
||||
+ PCR_MATRIX(port_mask));
|
||||
|
||||
return 0;
|
||||
}
|
||||
@@ -705,6 +714,7 @@ mt7530_port_enable(struct dsa_switch *ds, int port,
|
||||
struct phy_device *phy)
|
||||
{
|
||||
struct mt7530_priv *priv = ds->priv;
|
||||
+ u8 upstream = dsa_port_upstream_port(ds, port);
|
||||
|
||||
mutex_lock(&priv->reg_mutex);
|
||||
|
||||
@@ -715,7 +725,7 @@ mt7530_port_enable(struct dsa_switch *ds, int port,
|
||||
* restore the port matrix if the port is the member of a certain
|
||||
* bridge.
|
||||
*/
|
||||
- priv->ports[port].pm |= PCR_MATRIX(BIT(MT7530_CPU_PORT));
|
||||
+ priv->ports[port].pm |= PCR_MATRIX(BIT(upstream));
|
||||
priv->ports[port].enable = true;
|
||||
mt7530_rmw(priv, MT7530_PCR_P(port), PCR_MATRIX_MASK,
|
||||
priv->ports[port].pm);
|
||||
@@ -778,7 +788,8 @@ mt7530_port_bridge_join(struct dsa_switch *ds, int port,
|
||||
struct net_device *bridge)
|
||||
{
|
||||
struct mt7530_priv *priv = ds->priv;
|
||||
- u32 port_bitmap = BIT(MT7530_CPU_PORT);
|
||||
+ u8 upstream = dsa_port_upstream_port(ds, port);
|
||||
+ u32 port_bitmap = BIT(upstream);
|
||||
int i;
|
||||
|
||||
mutex_lock(&priv->reg_mutex);
|
||||
@@ -879,6 +890,7 @@ mt7530_port_bridge_leave(struct dsa_switch *ds, int port,
|
||||
struct net_device *bridge)
|
||||
{
|
||||
struct mt7530_priv *priv = ds->priv;
|
||||
+ u8 upstream = dsa_port_upstream_port(ds, port);
|
||||
int i;
|
||||
|
||||
mutex_lock(&priv->reg_mutex);
|
||||
@@ -906,8 +918,8 @@ mt7530_port_bridge_leave(struct dsa_switch *ds, int port,
|
||||
*/
|
||||
if (priv->ports[port].enable)
|
||||
mt7530_rmw(priv, MT7530_PCR_P(port), PCR_MATRIX_MASK,
|
||||
- PCR_MATRIX(BIT(MT7530_CPU_PORT)));
|
||||
- priv->ports[port].pm = PCR_MATRIX(BIT(MT7530_CPU_PORT));
|
||||
+ PCR_MATRIX(BIT(upstream)));
|
||||
+ priv->ports[port].pm = PCR_MATRIX(BIT(upstream));
|
||||
|
||||
mt7530_port_set_vlan_unaware(ds, port);
|
||||
|
||||
@@ -1198,15 +1210,7 @@ mt7530_port_vlan_del(struct dsa_switch *ds, int port,
|
||||
static enum dsa_tag_protocol
|
||||
mtk_get_tag_protocol(struct dsa_switch *ds, int port)
|
||||
{
|
||||
- struct mt7530_priv *priv = ds->priv;
|
||||
-
|
||||
- if (port != MT7530_CPU_PORT) {
|
||||
- dev_warn(priv->dev,
|
||||
- "port not matched with tagging CPU port\n");
|
||||
- return DSA_TAG_PROTO_NONE;
|
||||
- } else {
|
||||
- return DSA_TAG_PROTO_MTK;
|
||||
- }
|
||||
+ return DSA_TAG_PROTO_MTK;
|
||||
}
|
||||
|
||||
static int
|
||||
@@ -1279,7 +1283,7 @@ mt7530_setup(struct dsa_switch *ds)
|
||||
|
||||
/* Enable Port 6 only; P5 as GMAC5 which currently is not supported */
|
||||
val = mt7530_read(priv, MT7530_MHWTRAP);
|
||||
- val &= ~MHWTRAP_P6_DIS & ~MHWTRAP_PHY_ACCESS;
|
||||
+ val &= ~MHWTRAP_P5_DIS & ~MHWTRAP_P6_DIS & ~MHWTRAP_PHY_ACCESS;
|
||||
val |= MHWTRAP_MANUAL;
|
||||
if (!dsa_is_cpu_port(ds, 5)) {
|
||||
val |= MHWTRAP_P5_DIS;
|
||||
--
|
||||
2.19.1
|
||||
|
||||
|
|
@ -0,0 +1,54 @@
|
|||
From 943ed2bae585cd595d8264a1f37fa3f3d5a5715b Mon Sep 17 00:00:00 2001
|
||||
From: Frank Wunderlich <frank-w@public-files.de>
|
||||
Date: Sat, 8 Dec 2018 20:59:09 +0100
|
||||
Subject: [PATCH 24/77] net: dsa: tell GDMA when we are turning on the special
|
||||
tag
|
||||
|
||||
Enabling this bit will make the RX DMA descriptor enable the SP bit for
|
||||
all ingress traffic inside the return descriptor. The PPE needs this to
|
||||
know that a SP is present.
|
||||
|
||||
based on
|
||||
https://github.com/openwrt/openwrt/blob/master/target/linux/mediatek/patches-4.14/0044-net-next-dsa-mediatek-tell-GDMA-when-we-are-turning-.patch
|
||||
|
||||
Signed-off-by: Frank Wunderlich <frank-w@public-files.de>
|
||||
---
|
||||
drivers/net/dsa/mt7530.c | 6 ++++++
|
||||
drivers/net/dsa/mt7530.h | 4 ++++
|
||||
2 files changed, 10 insertions(+)
|
||||
|
||||
diff --git a/drivers/net/dsa/mt7530.c b/drivers/net/dsa/mt7530.c
|
||||
index fda1b67dfeac..9690a9b59fce 100644
|
||||
--- a/drivers/net/dsa/mt7530.c
|
||||
+++ b/drivers/net/dsa/mt7530.c
|
||||
@@ -685,6 +685,12 @@ mt7530_cpu_port_enable(struct mt7530_priv *priv,
|
||||
mt7530_write(priv, MT7530_PVC_P(port),
|
||||
PORT_SPEC_TAG);
|
||||
|
||||
+ /* Enable Mediatek header mode on the GMAC that the cpu port
|
||||
+ * connects to
|
||||
+ */
|
||||
+ regmap_write_bits(priv->ethernet, MTK_GDMA_FWD_CFG(port),
|
||||
+ GDMA_SPEC_TAG, GDMA_SPEC_TAG);
|
||||
+
|
||||
/* Setup the MAC by default for the cpu port */
|
||||
mt7530_write(priv, MT7530_PMCR_P(port), PMCR_CPUP_LINK);
|
||||
|
||||
diff --git a/drivers/net/dsa/mt7530.h b/drivers/net/dsa/mt7530.h
|
||||
index d9b407a22a58..310f2536175b 100644
|
||||
--- a/drivers/net/dsa/mt7530.h
|
||||
+++ b/drivers/net/dsa/mt7530.h
|
||||
@@ -23,6 +23,10 @@
|
||||
|
||||
#define TRGMII_BASE(x) (0x10000 + (x))
|
||||
|
||||
+/* Registers for GDMA configuration access */
|
||||
+#define MTK_GDMA_FWD_CFG(x) (0x500 + (x * 0x1000))
|
||||
+#define GDMA_SPEC_TAG BIT(24)
|
||||
+
|
||||
/* Registers to ethsys access */
|
||||
#define ETHSYS_CLKCFG0 0x2c
|
||||
#define ETHSYS_TRGMII_CLK_SEL362_5 BIT(11)
|
||||
--
|
||||
2.19.1
|
||||
|
||||
|
|
@ -0,0 +1,47 @@
|
|||
From 0f5ff06adcb20916acaf55976975a8b8844e785a Mon Sep 17 00:00:00 2001
|
||||
From: Frank Wunderlich <frank-w@public-files.de>
|
||||
Date: Sat, 8 Dec 2018 20:59:40 +0100
|
||||
Subject: [PATCH 25/77] net: dsa: mt7530 add linking to mdio
|
||||
|
||||
switch (7530) needs to to be linked to mdio-bus
|
||||
|
||||
based on
|
||||
https://github.com/openwrt/openwrt/blob/master/target/linux/mediatek/patches-4.14/0045-net-dsa-mediatek-turn-into-platform-driver.patch
|
||||
|
||||
Signed-off-by: Frank Wunderlich <frank-w@public-files.de>
|
||||
---
|
||||
drivers/net/dsa/mt7530.c | 10 ++++++++--
|
||||
1 file changed, 8 insertions(+), 2 deletions(-)
|
||||
|
||||
diff --git a/drivers/net/dsa/mt7530.c b/drivers/net/dsa/mt7530.c
|
||||
index 9690a9b59fce..8f95e22a33f6 100644
|
||||
--- a/drivers/net/dsa/mt7530.c
|
||||
+++ b/drivers/net/dsa/mt7530.c
|
||||
@@ -1349,7 +1349,7 @@ static int
|
||||
mt7530_probe(struct mdio_device *mdiodev)
|
||||
{
|
||||
struct mt7530_priv *priv;
|
||||
- struct device_node *dn;
|
||||
+ struct device_node *dn, *mdio;
|
||||
|
||||
dn = mdiodev->dev.of_node;
|
||||
|
||||
@@ -1396,8 +1396,14 @@ mt7530_probe(struct mdio_device *mdiodev)
|
||||
return PTR_ERR(priv->reset);
|
||||
}
|
||||
}
|
||||
+ mdio = of_get_parent(dn);
|
||||
+ if (!mdio)
|
||||
+ return -EINVAL;
|
||||
+
|
||||
+ priv->bus = of_mdio_find_bus(mdio);
|
||||
+ if (!priv->bus)
|
||||
+ return -EPROBE_DEFER;
|
||||
|
||||
- priv->bus = mdiodev->bus;
|
||||
priv->dev = &mdiodev->dev;
|
||||
priv->ds->priv = priv;
|
||||
priv->ds->ops = &mt7530_switch_ops;
|
||||
--
|
||||
2.19.1
|
||||
|
||||
81
root/target/linux/mediatek/patches-4.19/0026-net-dsa-changes-to-dts.patch
Executable file
81
root/target/linux/mediatek/patches-4.19/0026-net-dsa-changes-to-dts.patch
Executable file
|
|
@ -0,0 +1,81 @@
|
|||
From 52365639697e10f1b641d25460c10d9ccc56a6d6 Mon Sep 17 00:00:00 2001
|
||||
From: Frank Wunderlich <frank-w@public-files.de>
|
||||
Date: Thu, 29 Nov 2018 10:53:44 +0100
|
||||
Subject: [PATCH 26/77] net: dsa: changes to dts
|
||||
|
||||
---
|
||||
arch/arm/boot/dts/mt7623n-bananapi-bpi-r2.dts | 29 ++++++++++++++++++-
|
||||
1 file changed, 28 insertions(+), 1 deletion(-)
|
||||
|
||||
diff --git a/arch/arm/boot/dts/mt7623n-bananapi-bpi-r2.dts b/arch/arm/boot/dts/mt7623n-bananapi-bpi-r2.dts
|
||||
index a47022765326..4c6e53d9e736 100644
|
||||
--- a/arch/arm/boot/dts/mt7623n-bananapi-bpi-r2.dts
|
||||
+++ b/arch/arm/boot/dts/mt7623n-bananapi-bpi-r2.dts
|
||||
@@ -157,6 +157,18 @@
|
||||
};
|
||||
};
|
||||
|
||||
+ gmac1: mac@1 {
|
||||
+ compatible = "mediatek,eth-mac";
|
||||
+ reg = <1>;
|
||||
+ phy-mode = "trgmii";
|
||||
+
|
||||
+ fixed-link {
|
||||
+ speed = <1000>;
|
||||
+ full-duplex;
|
||||
+ pause;
|
||||
+ };
|
||||
+ };
|
||||
+
|
||||
mdio: mdio-bus {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
@@ -175,29 +187,44 @@
|
||||
port@0 {
|
||||
reg = <0>;
|
||||
label = "wan";
|
||||
+ default_cpu = <&cpu_port1>;
|
||||
};
|
||||
|
||||
port@1 {
|
||||
reg = <1>;
|
||||
label = "lan0";
|
||||
+ default_cpu = <&cpu_port0>;
|
||||
};
|
||||
|
||||
port@2 {
|
||||
reg = <2>;
|
||||
label = "lan1";
|
||||
+ default_cpu = <&cpu_port0>;
|
||||
};
|
||||
|
||||
port@3 {
|
||||
reg = <3>;
|
||||
label = "lan2";
|
||||
+ default_cpu = <&cpu_port0>;
|
||||
};
|
||||
|
||||
port@4 {
|
||||
reg = <4>;
|
||||
label = "lan3";
|
||||
+ default_cpu = <&cpu_port0>;
|
||||
};
|
||||
|
||||
- port@6 {
|
||||
+ cpu_port1: port@5 {
|
||||
+ reg = <5>;
|
||||
+ label = "cpu";
|
||||
+ ethernet = <&gmac1>;
|
||||
+ phy-mode = "trgmii";
|
||||
+ fixed-link {
|
||||
+ speed = <1000>;
|
||||
+ full-duplex;
|
||||
+ };
|
||||
+ };
|
||||
+ cpu_port0: port@6 {
|
||||
reg = <6>;
|
||||
label = "cpu";
|
||||
ethernet = <&gmac0>;
|
||||
--
|
||||
2.19.1
|
||||
|
||||
|
|
@ -0,0 +1,171 @@
|
|||
From 49f64db56f05dc7ccb1d8836c19243b5620fc93d Mon Sep 17 00:00:00 2001
|
||||
From: chunhui dai <chunhui.dai@mediatek.com>
|
||||
Date: Wed, 3 Oct 2018 11:41:41 +0800
|
||||
Subject: [PATCH 27/77] drm/mediatek: add refcount for DPI power on/off
|
||||
|
||||
After the kernel 4.4, the DRM disable flow was changed, if DPI was
|
||||
disableed before CRTC, it will cause warning message as following:
|
||||
|
||||
------------[ cut here ]------------
|
||||
WARNING: CPU: 0 PID: 1339 at ../../linux/linux-4.4.24-mtk/drivers/gpu/drm/drm_irq.c:1326 drm_wait_one_vblank+0x188/0x18c()
|
||||
vblank wait timed out on crtc 0
|
||||
Modules linked in: bridge mt8521p_ir_shim(O) i2c_eeprom(O) mtk_m4(O) fuse_ctrl(O) virtual_block(O) caamkeys(PO) chk(PO) amperctl(O) ledctl(O) apple_auth(PO) micctl(O) sensors(PO) lla(O) sdd(PO) ice40_fpga(O) psmon(O) event_queue(PO) utils(O) blackbox(O)
|
||||
CPU: 0 PID: 1339 Comm: kworker/0:1 Tainted: P W O 4.4.24 #1
|
||||
Hardware name: Mediatek Cortex-A7 (Device Tree)
|
||||
Workqueue: events drm_mode_rmfb_work_fn
|
||||
[<c001a710>] (unwind_backtrace) from [<c00151e4>] (show_stack+0x20/0x24)
|
||||
[<c00151e4>] (show_stack) from [<c027961c>] (dump_stack+0x98/0xac)
|
||||
[<c027961c>] (dump_stack) from [<c002ac54>] (warn_slowpath_common+0x94/0xc4)
|
||||
[<c002ac54>] (warn_slowpath_common) from [<c002acc4>] (warn_slowpath_fmt+0x40/0x48)
|
||||
[<c002acc4>] (warn_slowpath_fmt) from [<c03307ac>] (drm_wait_one_vblank+0x188/0x18c)
|
||||
[<c03307ac>] (drm_wait_one_vblank) from [<c03307d8>] (drm_crtc_wait_one_vblank+0x28/0x2c)
|
||||
[<c03307d8>] (drm_crtc_wait_one_vblank) from [<c034f48c>] (mtk_drm_crtc_disable+0x78/0x240)
|
||||
[<c034f48c>] (mtk_drm_crtc_disable) from [<c03240d4>] (drm_atomic_helper_commit_modeset_disables+0x128/0x3b8)
|
||||
[<c03240d4>] (drm_atomic_helper_commit_modeset_disables) from [<c0350a7c>] (mtk_atomic_complete+0x74/0xb4)
|
||||
[<c0350a7c>] (mtk_atomic_complete) from [<c0350b24>] (mtk_atomic_commit+0x68/0x98)
|
||||
[<c0350b24>] (mtk_atomic_commit) from [<c034ab48>] (drm_atomic_commit+0x54/0x74)
|
||||
[<c034ab48>] (drm_atomic_commit) from [<c0325c4c>] (drm_atomic_helper_set_config+0x7c/0xa0)
|
||||
[<c0325c4c>] (drm_atomic_helper_set_config) from [<c0338594>] (drm_mode_set_config_internal+0x68/0xe4)
|
||||
[<c0338594>] (drm_mode_set_config_internal) from [<c033967c>] (drm_framebuffer_remove+0xe4/0x120)
|
||||
[<c033967c>] (drm_framebuffer_remove) from [<c0339700>] (drm_mode_rmfb_work_fn+0x48/0x58)
|
||||
[<c0339700>] (drm_mode_rmfb_work_fn) from [<c0043a38>] (process_one_work+0x154/0x50c)
|
||||
[<c0043a38>] (process_one_work) from [<c0044074>] (worker_thread+0x284/0x568)
|
||||
[<c0044074>] (worker_thread) from [<c0049dc4>] (kthread+0xec/0x104)
|
||||
[<c0049dc4>] (kthread) from [<c0010678>] (ret_from_fork+0x14/0x3c)
|
||||
---[ end trace 12ae5358e992abd5 ]---
|
||||
|
||||
so, we add refcount for DPI power on/off to protect the flow.
|
||||
|
||||
Signed-off-by: Bibby Hsieh <bibby.hsieh@mediatek.com>
|
||||
Signed-off-by: chunhui dai <chunhui.dai@mediatek.com>
|
||||
Reviewed-by: CK Hu <ck.hu@mediatek.com>
|
||||
---
|
||||
drivers/gpu/drm/mediatek/mtk_dpi.c | 43 +++++++++---------------------
|
||||
1 file changed, 13 insertions(+), 30 deletions(-)
|
||||
|
||||
diff --git a/drivers/gpu/drm/mediatek/mtk_dpi.c b/drivers/gpu/drm/mediatek/mtk_dpi.c
|
||||
index 6c0ea39d5739..5ede1ddbaa1a 100644
|
||||
--- a/drivers/gpu/drm/mediatek/mtk_dpi.c
|
||||
+++ b/drivers/gpu/drm/mediatek/mtk_dpi.c
|
||||
@@ -76,8 +76,7 @@ struct mtk_dpi {
|
||||
enum mtk_dpi_out_yc_map yc_map;
|
||||
enum mtk_dpi_out_bit_num bit_num;
|
||||
enum mtk_dpi_out_channel_swap channel_swap;
|
||||
- bool power_sta;
|
||||
- u8 power_ctl;
|
||||
+ int refcount;
|
||||
};
|
||||
|
||||
static inline struct mtk_dpi *mtk_dpi_from_encoder(struct drm_encoder *e)
|
||||
@@ -90,11 +89,6 @@ enum mtk_dpi_polarity {
|
||||
MTK_DPI_POLARITY_FALLING,
|
||||
};
|
||||
|
||||
-enum mtk_dpi_power_ctl {
|
||||
- DPI_POWER_START = BIT(0),
|
||||
- DPI_POWER_ENABLE = BIT(1),
|
||||
-};
|
||||
-
|
||||
struct mtk_dpi_polarities {
|
||||
enum mtk_dpi_polarity de_pol;
|
||||
enum mtk_dpi_polarity ck_pol;
|
||||
@@ -367,40 +361,30 @@ static void mtk_dpi_config_color_format(struct mtk_dpi *dpi,
|
||||
}
|
||||
}
|
||||
|
||||
-static void mtk_dpi_power_off(struct mtk_dpi *dpi, enum mtk_dpi_power_ctl pctl)
|
||||
+static void mtk_dpi_power_off(struct mtk_dpi *dpi)
|
||||
{
|
||||
- dpi->power_ctl &= ~pctl;
|
||||
-
|
||||
- if ((dpi->power_ctl & DPI_POWER_START) ||
|
||||
- (dpi->power_ctl & DPI_POWER_ENABLE))
|
||||
+ if (WARN_ON(dpi->refcount == 0))
|
||||
return;
|
||||
|
||||
- if (!dpi->power_sta)
|
||||
+ if (--dpi->refcount != 0)
|
||||
return;
|
||||
|
||||
mtk_dpi_disable(dpi);
|
||||
clk_disable_unprepare(dpi->pixel_clk);
|
||||
clk_disable_unprepare(dpi->engine_clk);
|
||||
- dpi->power_sta = false;
|
||||
}
|
||||
|
||||
-static int mtk_dpi_power_on(struct mtk_dpi *dpi, enum mtk_dpi_power_ctl pctl)
|
||||
+static int mtk_dpi_power_on(struct mtk_dpi *dpi)
|
||||
{
|
||||
int ret;
|
||||
|
||||
- dpi->power_ctl |= pctl;
|
||||
-
|
||||
- if (!(dpi->power_ctl & DPI_POWER_START) &&
|
||||
- !(dpi->power_ctl & DPI_POWER_ENABLE))
|
||||
- return 0;
|
||||
-
|
||||
- if (dpi->power_sta)
|
||||
+ if (++dpi->refcount != 1)
|
||||
return 0;
|
||||
|
||||
ret = clk_prepare_enable(dpi->engine_clk);
|
||||
if (ret) {
|
||||
dev_err(dpi->dev, "Failed to enable engine clock: %d\n", ret);
|
||||
- goto err_eng;
|
||||
+ goto err_refcount;
|
||||
}
|
||||
|
||||
ret = clk_prepare_enable(dpi->pixel_clk);
|
||||
@@ -410,13 +394,12 @@ static int mtk_dpi_power_on(struct mtk_dpi *dpi, enum mtk_dpi_power_ctl pctl)
|
||||
}
|
||||
|
||||
mtk_dpi_enable(dpi);
|
||||
- dpi->power_sta = true;
|
||||
return 0;
|
||||
|
||||
err_pixel:
|
||||
clk_disable_unprepare(dpi->engine_clk);
|
||||
-err_eng:
|
||||
- dpi->power_ctl &= ~pctl;
|
||||
+err_refcount:
|
||||
+ dpi->refcount--;
|
||||
return ret;
|
||||
}
|
||||
|
||||
@@ -552,14 +535,14 @@ static void mtk_dpi_encoder_disable(struct drm_encoder *encoder)
|
||||
{
|
||||
struct mtk_dpi *dpi = mtk_dpi_from_encoder(encoder);
|
||||
|
||||
- mtk_dpi_power_off(dpi, DPI_POWER_ENABLE);
|
||||
+ mtk_dpi_power_off(dpi);
|
||||
}
|
||||
|
||||
static void mtk_dpi_encoder_enable(struct drm_encoder *encoder)
|
||||
{
|
||||
struct mtk_dpi *dpi = mtk_dpi_from_encoder(encoder);
|
||||
|
||||
- mtk_dpi_power_on(dpi, DPI_POWER_ENABLE);
|
||||
+ mtk_dpi_power_on(dpi);
|
||||
mtk_dpi_set_display_mode(dpi, &dpi->mode);
|
||||
}
|
||||
|
||||
@@ -582,14 +565,14 @@ static void mtk_dpi_start(struct mtk_ddp_comp *comp)
|
||||
{
|
||||
struct mtk_dpi *dpi = container_of(comp, struct mtk_dpi, ddp_comp);
|
||||
|
||||
- mtk_dpi_power_on(dpi, DPI_POWER_START);
|
||||
+ mtk_dpi_power_on(dpi);
|
||||
}
|
||||
|
||||
static void mtk_dpi_stop(struct mtk_ddp_comp *comp)
|
||||
{
|
||||
struct mtk_dpi *dpi = container_of(comp, struct mtk_dpi, ddp_comp);
|
||||
|
||||
- mtk_dpi_power_off(dpi, DPI_POWER_START);
|
||||
+ mtk_dpi_power_off(dpi);
|
||||
}
|
||||
|
||||
static const struct mtk_ddp_comp_funcs mtk_dpi_funcs = {
|
||||
--
|
||||
2.19.1
|
||||
|
||||
|
|
@ -0,0 +1,101 @@
|
|||
From c2b3363773bfc93b3e4082ccfa99cda18ea980be Mon Sep 17 00:00:00 2001
|
||||
From: chunhui dai <chunhui.dai@mediatek.com>
|
||||
Date: Wed, 3 Oct 2018 11:41:42 +0800
|
||||
Subject: [PATCH 28/77] drm/mediatek: move hardware register to node data
|
||||
|
||||
The address of register DPI_H_FRE_CON is different in different IC.
|
||||
Using of_node data to find this address.
|
||||
|
||||
Reviewed-by: CK Hu <ck.hu@mediatek.com>
|
||||
Signed-off-by: chunhui dai <chunhui.dai@mediatek.com>
|
||||
---
|
||||
drivers/gpu/drm/mediatek/mtk_dpi.c | 19 ++++++++++++++++---
|
||||
drivers/gpu/drm/mediatek/mtk_dpi_regs.h | 1 -
|
||||
2 files changed, 16 insertions(+), 4 deletions(-)
|
||||
|
||||
diff --git a/drivers/gpu/drm/mediatek/mtk_dpi.c b/drivers/gpu/drm/mediatek/mtk_dpi.c
|
||||
index 5ede1ddbaa1a..72aa43187731 100644
|
||||
--- a/drivers/gpu/drm/mediatek/mtk_dpi.c
|
||||
+++ b/drivers/gpu/drm/mediatek/mtk_dpi.c
|
||||
@@ -18,6 +18,7 @@
|
||||
#include <linux/component.h>
|
||||
#include <linux/platform_device.h>
|
||||
#include <linux/of.h>
|
||||
+#include <linux/of_device.h>
|
||||
#include <linux/of_graph.h>
|
||||
#include <linux/interrupt.h>
|
||||
#include <linux/types.h>
|
||||
@@ -72,6 +73,7 @@ struct mtk_dpi {
|
||||
struct clk *tvd_clk;
|
||||
int irq;
|
||||
struct drm_display_mode mode;
|
||||
+ const struct mtk_dpi_conf *conf;
|
||||
enum mtk_dpi_out_color_format color_format;
|
||||
enum mtk_dpi_out_yc_map yc_map;
|
||||
enum mtk_dpi_out_bit_num bit_num;
|
||||
@@ -110,6 +112,10 @@ struct mtk_dpi_yc_limit {
|
||||
u16 c_bottom;
|
||||
};
|
||||
|
||||
+struct mtk_dpi_conf {
|
||||
+ u32 reg_h_fre_con;
|
||||
+};
|
||||
+
|
||||
static void mtk_dpi_mask(struct mtk_dpi *dpi, u32 offset, u32 val, u32 mask)
|
||||
{
|
||||
u32 tmp = readl(dpi->regs + offset) & ~mask;
|
||||
@@ -335,7 +341,7 @@ static void mtk_dpi_config_swap_input(struct mtk_dpi *dpi, bool enable)
|
||||
|
||||
static void mtk_dpi_config_2n_h_fre(struct mtk_dpi *dpi)
|
||||
{
|
||||
- mtk_dpi_mask(dpi, DPI_H_FRE_CON, H_FRE_2N, H_FRE_2N);
|
||||
+ mtk_dpi_mask(dpi, dpi->conf->reg_h_fre_con, H_FRE_2N, H_FRE_2N);
|
||||
}
|
||||
|
||||
static void mtk_dpi_config_color_format(struct mtk_dpi *dpi,
|
||||
@@ -639,6 +645,10 @@ static const struct component_ops mtk_dpi_component_ops = {
|
||||
.unbind = mtk_dpi_unbind,
|
||||
};
|
||||
|
||||
+static const struct mtk_dpi_conf mt8173_conf = {
|
||||
+ .reg_h_fre_con = 0xe0,
|
||||
+};
|
||||
+
|
||||
static int mtk_dpi_probe(struct platform_device *pdev)
|
||||
{
|
||||
struct device *dev = &pdev->dev;
|
||||
@@ -653,6 +663,7 @@ static int mtk_dpi_probe(struct platform_device *pdev)
|
||||
return -ENOMEM;
|
||||
|
||||
dpi->dev = dev;
|
||||
+ dpi->conf = (struct mtk_dpi_conf *)of_device_get_match_data(dev);
|
||||
|
||||
mem = platform_get_resource(pdev, IORESOURCE_MEM, 0);
|
||||
dpi->regs = devm_ioremap_resource(dev, mem);
|
||||
@@ -732,8 +743,10 @@ static int mtk_dpi_remove(struct platform_device *pdev)
|
||||
}
|
||||
|
||||
static const struct of_device_id mtk_dpi_of_ids[] = {
|
||||
- { .compatible = "mediatek,mt8173-dpi", },
|
||||
- {}
|
||||
+ { .compatible = "mediatek,mt8173-dpi",
|
||||
+ .data = &mt8173_conf,
|
||||
+ },
|
||||
+ { },
|
||||
};
|
||||
|
||||
struct platform_driver mtk_dpi_driver = {
|
||||
diff --git a/drivers/gpu/drm/mediatek/mtk_dpi_regs.h b/drivers/gpu/drm/mediatek/mtk_dpi_regs.h
|
||||
index 4b6ad4751a31..040444d7718d 100644
|
||||
--- a/drivers/gpu/drm/mediatek/mtk_dpi_regs.h
|
||||
+++ b/drivers/gpu/drm/mediatek/mtk_dpi_regs.h
|
||||
@@ -223,6 +223,5 @@
|
||||
#define ESAV_CODE2 (0xFFF << 0)
|
||||
#define ESAV_CODE3_MSB BIT(16)
|
||||
|
||||
-#define DPI_H_FRE_CON 0xE0
|
||||
#define H_FRE_2N BIT(25)
|
||||
#endif /* __MTK_DPI_REGS_H */
|
||||
--
|
||||
2.19.1
|
||||
|
||||
|
|
@ -0,0 +1,62 @@
|
|||
From d0b9bb15fad38e8328f9436501e36697e4e1a89d Mon Sep 17 00:00:00 2001
|
||||
From: chunhui dai <chunhui.dai@mediatek.com>
|
||||
Date: Wed, 3 Oct 2018 11:41:43 +0800
|
||||
Subject: [PATCH 29/77] drm/mediatek: adjust EDGE to match clock and data
|
||||
|
||||
The default timing of DPI data and clock is not match.
|
||||
We could adjust this bit to make them match.
|
||||
|
||||
Signed-off-by: chunhui dai <chunhui.dai@mediatek.com>
|
||||
Reviewed-by: CK Hu <ck.hu@mediatek.com>
|
||||
---
|
||||
drivers/gpu/drm/mediatek/mtk_dpi.c | 8 ++++++++
|
||||
drivers/gpu/drm/mediatek/mtk_dpi_regs.h | 1 +
|
||||
2 files changed, 9 insertions(+)
|
||||
|
||||
diff --git a/drivers/gpu/drm/mediatek/mtk_dpi.c b/drivers/gpu/drm/mediatek/mtk_dpi.c
|
||||
index 72aa43187731..0ce4b61efaeb 100644
|
||||
--- a/drivers/gpu/drm/mediatek/mtk_dpi.c
|
||||
+++ b/drivers/gpu/drm/mediatek/mtk_dpi.c
|
||||
@@ -114,6 +114,7 @@ struct mtk_dpi_yc_limit {
|
||||
|
||||
struct mtk_dpi_conf {
|
||||
u32 reg_h_fre_con;
|
||||
+ bool edge_sel_en;
|
||||
};
|
||||
|
||||
static void mtk_dpi_mask(struct mtk_dpi *dpi, u32 offset, u32 val, u32 mask)
|
||||
@@ -344,6 +345,12 @@ static void mtk_dpi_config_2n_h_fre(struct mtk_dpi *dpi)
|
||||
mtk_dpi_mask(dpi, dpi->conf->reg_h_fre_con, H_FRE_2N, H_FRE_2N);
|
||||
}
|
||||
|
||||
+static void mtk_dpi_config_disable_edge(struct mtk_dpi *dpi)
|
||||
+{
|
||||
+ if (dpi->conf->edge_sel_en)
|
||||
+ mtk_dpi_mask(dpi, dpi->conf->reg_h_fre_con, 0, EDGE_SEL_EN);
|
||||
+}
|
||||
+
|
||||
static void mtk_dpi_config_color_format(struct mtk_dpi *dpi,
|
||||
enum mtk_dpi_out_color_format format)
|
||||
{
|
||||
@@ -507,6 +514,7 @@ static int mtk_dpi_set_display_mode(struct mtk_dpi *dpi,
|
||||
mtk_dpi_config_yc_map(dpi, dpi->yc_map);
|
||||
mtk_dpi_config_color_format(dpi, dpi->color_format);
|
||||
mtk_dpi_config_2n_h_fre(dpi);
|
||||
+ mtk_dpi_config_disable_edge(dpi);
|
||||
mtk_dpi_sw_reset(dpi, false);
|
||||
|
||||
return 0;
|
||||
diff --git a/drivers/gpu/drm/mediatek/mtk_dpi_regs.h b/drivers/gpu/drm/mediatek/mtk_dpi_regs.h
|
||||
index 040444d7718d..d9db8c4cacd7 100644
|
||||
--- a/drivers/gpu/drm/mediatek/mtk_dpi_regs.h
|
||||
+++ b/drivers/gpu/drm/mediatek/mtk_dpi_regs.h
|
||||
@@ -223,5 +223,6 @@
|
||||
#define ESAV_CODE2 (0xFFF << 0)
|
||||
#define ESAV_CODE3_MSB BIT(16)
|
||||
|
||||
+#define EDGE_SEL_EN BIT(5)
|
||||
#define H_FRE_2N BIT(25)
|
||||
#endif /* __MTK_DPI_REGS_H */
|
||||
--
|
||||
2.19.1
|
||||
|
||||
|
|
@ -0,0 +1,68 @@
|
|||
From 0a8f36a231341ac5d66c186bcb1600a5abc00132 Mon Sep 17 00:00:00 2001
|
||||
From: chunhui dai <chunhui.dai@mediatek.com>
|
||||
Date: Wed, 3 Oct 2018 11:41:44 +0800
|
||||
Subject: [PATCH 30/77] drm/mediatek: add clock factor for different IC
|
||||
|
||||
different IC has different clock designed in HDMI, the factor for
|
||||
calculate clock should be different. Usinng the data in of_node
|
||||
to find this factor.
|
||||
|
||||
Reviewed-by: CK Hu <ck.hu@mediatek.com>
|
||||
Signed-off-by: chunhui dai <chunhui.dai@mediatek.com>
|
||||
---
|
||||
drivers/gpu/drm/mediatek/mtk_dpi.c | 24 +++++++++++++++---------
|
||||
1 file changed, 15 insertions(+), 9 deletions(-)
|
||||
|
||||
diff --git a/drivers/gpu/drm/mediatek/mtk_dpi.c b/drivers/gpu/drm/mediatek/mtk_dpi.c
|
||||
index 0ce4b61efaeb..0dbe9345fa2e 100644
|
||||
--- a/drivers/gpu/drm/mediatek/mtk_dpi.c
|
||||
+++ b/drivers/gpu/drm/mediatek/mtk_dpi.c
|
||||
@@ -113,6 +113,7 @@ struct mtk_dpi_yc_limit {
|
||||
};
|
||||
|
||||
struct mtk_dpi_conf {
|
||||
+ unsigned int (*cal_factor)(int clock);
|
||||
u32 reg_h_fre_con;
|
||||
bool edge_sel_en;
|
||||
};
|
||||
@@ -431,15 +432,7 @@ static int mtk_dpi_set_display_mode(struct mtk_dpi *dpi,
|
||||
unsigned int factor;
|
||||
|
||||
/* let pll_rate can fix the valid range of tvdpll (1G~2GHz) */
|
||||
-
|
||||
- if (mode->clock <= 27000)
|
||||
- factor = 3 << 4;
|
||||
- else if (mode->clock <= 84000)
|
||||
- factor = 3 << 3;
|
||||
- else if (mode->clock <= 167000)
|
||||
- factor = 3 << 2;
|
||||
- else
|
||||
- factor = 3 << 1;
|
||||
+ factor = dpi->conf->cal_factor(mode->clock);
|
||||
drm_display_mode_to_videomode(mode, &vm);
|
||||
pll_rate = vm.pixelclock * factor;
|
||||
|
||||
@@ -653,7 +646,20 @@ static const struct component_ops mtk_dpi_component_ops = {
|
||||
.unbind = mtk_dpi_unbind,
|
||||
};
|
||||
|
||||
+static unsigned int mt8173_calculate_factor(int clock)
|
||||
+{
|
||||
+ if (clock <= 27000)
|
||||
+ return 3 << 4;
|
||||
+ else if (clock <= 84000)
|
||||
+ return 3 << 3;
|
||||
+ else if (clock <= 167000)
|
||||
+ return 3 << 2;
|
||||
+ else
|
||||
+ return 3 << 1;
|
||||
+}
|
||||
+
|
||||
static const struct mtk_dpi_conf mt8173_conf = {
|
||||
+ .cal_factor = mt8173_calculate_factor,
|
||||
.reg_h_fre_con = 0xe0,
|
||||
};
|
||||
|
||||
--
|
||||
2.19.1
|
||||
|
||||
|
|
@ -0,0 +1,66 @@
|
|||
From ef9b74fc6412b2402f882b012f78bfb3031aa4c6 Mon Sep 17 00:00:00 2001
|
||||
From: chunhui dai <chunhui.dai@mediatek.com>
|
||||
Date: Wed, 3 Oct 2018 11:41:45 +0800
|
||||
Subject: [PATCH 31/77] drm/mediatek: convert dpi driver to use
|
||||
drm_of_find_panel_or_bridge
|
||||
|
||||
Convert dpi driver to use drm_of_find_panel_or_bridge.
|
||||
This changes some error messages to debug messages (in the graph core).
|
||||
Graph connections are often "no connects" depending on the particular
|
||||
board, so we want to avoid spurious messages. Plus the kernel is not a
|
||||
DT validator.
|
||||
related links:
|
||||
[1] https://lkml.org/lkml/2017/2/3/716
|
||||
[2] https://lkml.org/lkml/2017/2/3/719
|
||||
|
||||
Signed-off-by: chunhui dai <chunhui.dai@mediatek.com>
|
||||
Reviewed-by: CK Hu <ck.hu@mediatek.com>
|
||||
---
|
||||
drivers/gpu/drm/mediatek/mtk_dpi.c | 16 ++++++----------
|
||||
1 file changed, 6 insertions(+), 10 deletions(-)
|
||||
|
||||
diff --git a/drivers/gpu/drm/mediatek/mtk_dpi.c b/drivers/gpu/drm/mediatek/mtk_dpi.c
|
||||
index 0dbe9345fa2e..08915e1765f8 100644
|
||||
--- a/drivers/gpu/drm/mediatek/mtk_dpi.c
|
||||
+++ b/drivers/gpu/drm/mediatek/mtk_dpi.c
|
||||
@@ -14,6 +14,7 @@
|
||||
#include <drm/drmP.h>
|
||||
#include <drm/drm_crtc.h>
|
||||
#include <drm/drm_crtc_helper.h>
|
||||
+#include <drm/drm_of.h>
|
||||
#include <linux/kernel.h>
|
||||
#include <linux/component.h>
|
||||
#include <linux/platform_device.h>
|
||||
@@ -668,7 +669,6 @@ static int mtk_dpi_probe(struct platform_device *pdev)
|
||||
struct device *dev = &pdev->dev;
|
||||
struct mtk_dpi *dpi;
|
||||
struct resource *mem;
|
||||
- struct device_node *bridge_node;
|
||||
int comp_id;
|
||||
int ret;
|
||||
|
||||
@@ -714,16 +714,12 @@ static int mtk_dpi_probe(struct platform_device *pdev)
|
||||
return -EINVAL;
|
||||
}
|
||||
|
||||
- bridge_node = of_graph_get_remote_node(dev->of_node, 0, 0);
|
||||
- if (!bridge_node)
|
||||
- return -ENODEV;
|
||||
-
|
||||
- dev_info(dev, "Found bridge node: %pOF\n", bridge_node);
|
||||
+ ret = drm_of_find_panel_or_bridge(dev->of_node, 0, 0,
|
||||
+ NULL, &dpi->bridge);
|
||||
+ if (ret)
|
||||
+ return ret;
|
||||
|
||||
- dpi->bridge = of_drm_find_bridge(bridge_node);
|
||||
- of_node_put(bridge_node);
|
||||
- if (!dpi->bridge)
|
||||
- return -EPROBE_DEFER;
|
||||
+ dev_info(dev, "Found bridge node: %pOF\n", dpi->bridge->of_node);
|
||||
|
||||
comp_id = mtk_ddp_comp_get_id(dev->of_node, MTK_DPI);
|
||||
if (comp_id < 0) {
|
||||
--
|
||||
2.19.1
|
||||
|
||||
|
|
@ -0,0 +1,76 @@
|
|||
From 5750b7268c5412e18a476482f92425eb0228564b Mon Sep 17 00:00:00 2001
|
||||
From: chunhui dai <chunhui.dai@mediatek.com>
|
||||
Date: Wed, 3 Oct 2018 11:41:46 +0800
|
||||
Subject: [PATCH 32/77] drm/mediatek: add dpi driver for mt2701 and mt7623
|
||||
|
||||
This patch adds dpi dirver suppot for both mt2701 and mt7623.
|
||||
And also support other (existing or future) chips that use
|
||||
the same binding and driver.
|
||||
|
||||
Reviewed-by: CK Hu <ck.hu@mediatek.com>
|
||||
Signed-off-by: chunhui dai <chunhui.dai@mediatek.com>
|
||||
---
|
||||
drivers/gpu/drm/mediatek/mtk_dpi.c | 21 +++++++++++++++++++++
|
||||
drivers/gpu/drm/mediatek/mtk_drm_drv.c | 2 ++
|
||||
2 files changed, 23 insertions(+)
|
||||
|
||||
diff --git a/drivers/gpu/drm/mediatek/mtk_dpi.c b/drivers/gpu/drm/mediatek/mtk_dpi.c
|
||||
index 08915e1765f8..62a9d47df948 100644
|
||||
--- a/drivers/gpu/drm/mediatek/mtk_dpi.c
|
||||
+++ b/drivers/gpu/drm/mediatek/mtk_dpi.c
|
||||
@@ -659,11 +659,29 @@ static unsigned int mt8173_calculate_factor(int clock)
|
||||
return 3 << 1;
|
||||
}
|
||||
|
||||
+static unsigned int mt2701_calculate_factor(int clock)
|
||||
+{
|
||||
+ if (clock <= 64000)
|
||||
+ return 16;
|
||||
+ else if (clock <= 128000)
|
||||
+ return 8;
|
||||
+ else if (clock <= 256000)
|
||||
+ return 4;
|
||||
+ else
|
||||
+ return 2;
|
||||
+}
|
||||
+
|
||||
static const struct mtk_dpi_conf mt8173_conf = {
|
||||
.cal_factor = mt8173_calculate_factor,
|
||||
.reg_h_fre_con = 0xe0,
|
||||
};
|
||||
|
||||
+static const struct mtk_dpi_conf mt2701_conf = {
|
||||
+ .cal_factor = mt2701_calculate_factor,
|
||||
+ .reg_h_fre_con = 0xb0,
|
||||
+ .edge_sel_en = true,
|
||||
+};
|
||||
+
|
||||
static int mtk_dpi_probe(struct platform_device *pdev)
|
||||
{
|
||||
struct device *dev = &pdev->dev;
|
||||
@@ -753,6 +771,9 @@ static int mtk_dpi_remove(struct platform_device *pdev)
|
||||
}
|
||||
|
||||
static const struct of_device_id mtk_dpi_of_ids[] = {
|
||||
+ { .compatible = "mediatek,mt2701-dpi",
|
||||
+ .data = &mt2701_conf,
|
||||
+ },
|
||||
{ .compatible = "mediatek,mt8173-dpi",
|
||||
.data = &mt8173_conf,
|
||||
},
|
||||
diff --git a/drivers/gpu/drm/mediatek/mtk_drm_drv.c b/drivers/gpu/drm/mediatek/mtk_drm_drv.c
|
||||
index 47ec604289b7..6422e99952fe 100644
|
||||
--- a/drivers/gpu/drm/mediatek/mtk_drm_drv.c
|
||||
+++ b/drivers/gpu/drm/mediatek/mtk_drm_drv.c
|
||||
@@ -424,6 +424,8 @@ static const struct of_device_id mtk_ddp_comp_dt_ids[] = {
|
||||
.data = (void *)MTK_DSI },
|
||||
{ .compatible = "mediatek,mt8173-dsi",
|
||||
.data = (void *)MTK_DSI },
|
||||
+ { .compatible = "mediatek,mt2701-dpi",
|
||||
+ .data = (void *)MTK_DPI },
|
||||
{ .compatible = "mediatek,mt8173-dpi",
|
||||
.data = (void *)MTK_DPI },
|
||||
{ .compatible = "mediatek,mt2701-disp-mutex",
|
||||
--
|
||||
2.19.1
|
||||
|
||||
|
|
@ -0,0 +1,641 @@
|
|||
From 186643bd86d33f0a773139deb5af6e12354b5907 Mon Sep 17 00:00:00 2001
|
||||
From: chunhui dai <chunhui.dai@mediatek.com>
|
||||
Date: Wed, 3 Oct 2018 11:41:47 +0800
|
||||
Subject: [PATCH 33/77] drm/mediatek: separate hdmi phy to different file
|
||||
|
||||
Different IC has different phy setting of HDMI.
|
||||
This patch separates the phy hardware relate part for mt8173.
|
||||
|
||||
Signed-off-by: chunhui dai <chunhui.dai@mediatek.com>
|
||||
Reviewed-by: CK Hu <ck.hu@mediatek.com>
|
||||
---
|
||||
drivers/gpu/drm/mediatek/Makefile | 6 +-
|
||||
drivers/gpu/drm/mediatek/mtk_hdmi.c | 1 +
|
||||
drivers/gpu/drm/mediatek/mtk_hdmi.h | 2 +-
|
||||
drivers/gpu/drm/mediatek/mtk_hdmi_phy.c | 232 ++++++++++++++++++
|
||||
drivers/gpu/drm/mediatek/mtk_hdmi_phy.h | 58 +++++
|
||||
.../gpu/drm/mediatek/mtk_mt8173_hdmi_phy.c | 226 +----------------
|
||||
6 files changed, 302 insertions(+), 223 deletions(-)
|
||||
create mode 100644 drivers/gpu/drm/mediatek/mtk_hdmi_phy.c
|
||||
create mode 100644 drivers/gpu/drm/mediatek/mtk_hdmi_phy.h
|
||||
|
||||
diff --git a/drivers/gpu/drm/mediatek/Makefile b/drivers/gpu/drm/mediatek/Makefile
|
||||
index ce83c396a742..61cf0d2ab28a 100644
|
||||
--- a/drivers/gpu/drm/mediatek/Makefile
|
||||
+++ b/drivers/gpu/drm/mediatek/Makefile
|
||||
@@ -1,4 +1,5 @@
|
||||
# SPDX-License-Identifier: GPL-2.0
|
||||
+
|
||||
mediatek-drm-y := mtk_disp_color.o \
|
||||
mtk_disp_ovl.o \
|
||||
mtk_disp_rdma.o \
|
||||
@@ -18,6 +19,7 @@ obj-$(CONFIG_DRM_MEDIATEK) += mediatek-drm.o
|
||||
mediatek-drm-hdmi-objs := mtk_cec.o \
|
||||
mtk_hdmi.o \
|
||||
mtk_hdmi_ddc.o \
|
||||
- mtk_mt8173_hdmi_phy.o
|
||||
+ mtk_mt8173_hdmi_phy.o \
|
||||
+ mtk_hdmi_phy.o
|
||||
|
||||
-obj-$(CONFIG_DRM_MEDIATEK_HDMI) += mediatek-drm-hdmi.o
|
||||
+obj-$(CONFIG_DRM_MEDIATEK_HDMI) += mediatek-drm-hdmi.o
|
||||
\ No newline at end of file
|
||||
diff --git a/drivers/gpu/drm/mediatek/mtk_hdmi.c b/drivers/gpu/drm/mediatek/mtk_hdmi.c
|
||||
index 643f5edd68fe..29bd2a144b19 100644
|
||||
--- a/drivers/gpu/drm/mediatek/mtk_hdmi.c
|
||||
+++ b/drivers/gpu/drm/mediatek/mtk_hdmi.c
|
||||
@@ -233,6 +233,7 @@ static void mtk_hdmi_hw_vid_black(struct mtk_hdmi *hdmi, bool black)
|
||||
static void mtk_hdmi_hw_make_reg_writable(struct mtk_hdmi *hdmi, bool enable)
|
||||
{
|
||||
struct arm_smccc_res res;
|
||||
+ struct mtk_hdmi_phy *hdmi_phy = phy_get_drvdata(hdmi->phy);
|
||||
|
||||
/*
|
||||
* MT8173 HDMI hardware has an output control bit to enable/disable HDMI
|
||||
diff --git a/drivers/gpu/drm/mediatek/mtk_hdmi.h b/drivers/gpu/drm/mediatek/mtk_hdmi.h
|
||||
index 6371b3de1ff6..3e9fb8d19802 100644
|
||||
--- a/drivers/gpu/drm/mediatek/mtk_hdmi.h
|
||||
+++ b/drivers/gpu/drm/mediatek/mtk_hdmi.h
|
||||
@@ -13,11 +13,11 @@
|
||||
*/
|
||||
#ifndef _MTK_HDMI_CTRL_H
|
||||
#define _MTK_HDMI_CTRL_H
|
||||
+#include "mtk_hdmi_phy.h"
|
||||
|
||||
struct platform_driver;
|
||||
|
||||
extern struct platform_driver mtk_cec_driver;
|
||||
extern struct platform_driver mtk_hdmi_ddc_driver;
|
||||
-extern struct platform_driver mtk_hdmi_phy_driver;
|
||||
|
||||
#endif /* _MTK_HDMI_CTRL_H */
|
||||
diff --git a/drivers/gpu/drm/mediatek/mtk_hdmi_phy.c b/drivers/gpu/drm/mediatek/mtk_hdmi_phy.c
|
||||
new file mode 100644
|
||||
index 000000000000..514f3e9a8767
|
||||
--- /dev/null
|
||||
+++ b/drivers/gpu/drm/mediatek/mtk_hdmi_phy.c
|
||||
@@ -0,0 +1,232 @@
|
||||
+// SPDX-License-Identifier: GPL-2.0
|
||||
+/*
|
||||
+ * Copyright (c) 2018 MediaTek Inc.
|
||||
+ * Author: Jie Qiu <jie.qiu@mediatek.com>
|
||||
+ */
|
||||
+
|
||||
+#include "mtk_hdmi_phy.h"
|
||||
+
|
||||
+static int mtk_hdmi_phy_power_on(struct phy *phy);
|
||||
+static int mtk_hdmi_phy_power_off(struct phy *phy);
|
||||
+
|
||||
+static const struct phy_ops mtk_hdmi_phy_dev_ops = {
|
||||
+ .power_on = mtk_hdmi_phy_power_on,
|
||||
+ .power_off = mtk_hdmi_phy_power_off,
|
||||
+ .owner = THIS_MODULE,
|
||||
+};
|
||||
+
|
||||
+long mtk_hdmi_pll_round_rate(struct clk_hw *hw, unsigned long rate,
|
||||
+ unsigned long *parent_rate)
|
||||
+{
|
||||
+ struct mtk_hdmi_phy *hdmi_phy = to_mtk_hdmi_phy(hw);
|
||||
+
|
||||
+ hdmi_phy->pll_rate = rate;
|
||||
+ if (rate <= 74250000)
|
||||
+ *parent_rate = rate;
|
||||
+ else
|
||||
+ *parent_rate = rate / 2;
|
||||
+
|
||||
+ return rate;
|
||||
+}
|
||||
+
|
||||
+unsigned long mtk_hdmi_pll_recalc_rate(struct clk_hw *hw,
|
||||
+ unsigned long parent_rate)
|
||||
+{
|
||||
+ struct mtk_hdmi_phy *hdmi_phy = to_mtk_hdmi_phy(hw);
|
||||
+
|
||||
+ return hdmi_phy->pll_rate;
|
||||
+}
|
||||
+
|
||||
+void mtk_hdmi_phy_clear_bits(struct mtk_hdmi_phy *hdmi_phy, u32 offset,
|
||||
+ u32 bits)
|
||||
+{
|
||||
+ void __iomem *reg = hdmi_phy->regs + offset;
|
||||
+ u32 tmp;
|
||||
+
|
||||
+ tmp = readl(reg);
|
||||
+ tmp &= ~bits;
|
||||
+ writel(tmp, reg);
|
||||
+}
|
||||
+
|
||||
+void mtk_hdmi_phy_set_bits(struct mtk_hdmi_phy *hdmi_phy, u32 offset,
|
||||
+ u32 bits)
|
||||
+{
|
||||
+ void __iomem *reg = hdmi_phy->regs + offset;
|
||||
+ u32 tmp;
|
||||
+
|
||||
+ tmp = readl(reg);
|
||||
+ tmp |= bits;
|
||||
+ writel(tmp, reg);
|
||||
+}
|
||||
+
|
||||
+void mtk_hdmi_phy_mask(struct mtk_hdmi_phy *hdmi_phy, u32 offset,
|
||||
+ u32 val, u32 mask)
|
||||
+{
|
||||
+ void __iomem *reg = hdmi_phy->regs + offset;
|
||||
+ u32 tmp;
|
||||
+
|
||||
+ tmp = readl(reg);
|
||||
+ tmp = (tmp & ~mask) | (val & mask);
|
||||
+ writel(tmp, reg);
|
||||
+}
|
||||
+
|
||||
+inline struct mtk_hdmi_phy *to_mtk_hdmi_phy(struct clk_hw *hw)
|
||||
+{
|
||||
+ return container_of(hw, struct mtk_hdmi_phy, pll_hw);
|
||||
+}
|
||||
+
|
||||
+static int mtk_hdmi_phy_power_on(struct phy *phy)
|
||||
+{
|
||||
+ struct mtk_hdmi_phy *hdmi_phy = phy_get_drvdata(phy);
|
||||
+ int ret;
|
||||
+
|
||||
+ ret = clk_prepare_enable(hdmi_phy->pll);
|
||||
+ if (ret < 0)
|
||||
+ return ret;
|
||||
+
|
||||
+ hdmi_phy->conf->hdmi_phy_enable_tmds(hdmi_phy);
|
||||
+ return 0;
|
||||
+}
|
||||
+
|
||||
+static int mtk_hdmi_phy_power_off(struct phy *phy)
|
||||
+{
|
||||
+ struct mtk_hdmi_phy *hdmi_phy = phy_get_drvdata(phy);
|
||||
+
|
||||
+ hdmi_phy->conf->hdmi_phy_disable_tmds(hdmi_phy);
|
||||
+ clk_disable_unprepare(hdmi_phy->pll);
|
||||
+
|
||||
+ return 0;
|
||||
+}
|
||||
+
|
||||
+static const struct phy_ops *
|
||||
+mtk_hdmi_phy_dev_get_ops(const struct mtk_hdmi_phy *hdmi_phy)
|
||||
+{
|
||||
+ if (hdmi_phy && hdmi_phy->conf &&
|
||||
+ hdmi_phy->conf->hdmi_phy_enable_tmds &&
|
||||
+ hdmi_phy->conf->hdmi_phy_disable_tmds)
|
||||
+ return &mtk_hdmi_phy_dev_ops;
|
||||
+
|
||||
+ dev_err(hdmi_phy->dev, "Failed to get dev ops of phy\n");
|
||||
+ return NULL;
|
||||
+}
|
||||
+
|
||||
+static void mtk_hdmi_phy_clk_get_ops(struct mtk_hdmi_phy *hdmi_phy,
|
||||
+ const struct clk_ops **ops)
|
||||
+{
|
||||
+ if (hdmi_phy && hdmi_phy->conf && hdmi_phy->conf->hdmi_phy_clk_ops)
|
||||
+ *ops = hdmi_phy->conf->hdmi_phy_clk_ops;
|
||||
+ else
|
||||
+ dev_err(hdmi_phy->dev, "Failed to get clk ops of phy\n");
|
||||
+}
|
||||
+
|
||||
+static int mtk_hdmi_phy_probe(struct platform_device *pdev)
|
||||
+{
|
||||
+ struct device *dev = &pdev->dev;
|
||||
+ struct mtk_hdmi_phy *hdmi_phy;
|
||||
+ struct resource *mem;
|
||||
+ struct clk *ref_clk;
|
||||
+ const char *ref_clk_name;
|
||||
+ struct clk_init_data clk_init = {
|
||||
+ .num_parents = 1,
|
||||
+ .parent_names = (const char * const *)&ref_clk_name,
|
||||
+ .flags = CLK_SET_RATE_PARENT | CLK_SET_RATE_GATE,
|
||||
+ };
|
||||
+
|
||||
+ struct phy *phy;
|
||||
+ struct phy_provider *phy_provider;
|
||||
+ int ret;
|
||||
+
|
||||
+ hdmi_phy = devm_kzalloc(dev, sizeof(*hdmi_phy), GFP_KERNEL);
|
||||
+ if (!hdmi_phy)
|
||||
+ return -ENOMEM;
|
||||
+
|
||||
+ mem = platform_get_resource(pdev, IORESOURCE_MEM, 0);
|
||||
+ hdmi_phy->regs = devm_ioremap_resource(dev, mem);
|
||||
+ if (IS_ERR(hdmi_phy->regs)) {
|
||||
+ ret = PTR_ERR(hdmi_phy->regs);
|
||||
+ dev_err(dev, "Failed to get memory resource: %d\n", ret);
|
||||
+ return ret;
|
||||
+ }
|
||||
+
|
||||
+ ref_clk = devm_clk_get(dev, "pll_ref");
|
||||
+ if (IS_ERR(ref_clk)) {
|
||||
+ ret = PTR_ERR(ref_clk);
|
||||
+ dev_err(&pdev->dev, "Failed to get PLL reference clock: %d\n",
|
||||
+ ret);
|
||||
+ return ret;
|
||||
+ }
|
||||
+ ref_clk_name = __clk_get_name(ref_clk);
|
||||
+
|
||||
+ ret = of_property_read_string(dev->of_node, "clock-output-names",
|
||||
+ &clk_init.name);
|
||||
+ if (ret < 0) {
|
||||
+ dev_err(dev, "Failed to read clock-output-names: %d\n", ret);
|
||||
+ return ret;
|
||||
+ }
|
||||
+
|
||||
+ hdmi_phy->dev = dev;
|
||||
+ hdmi_phy->conf =
|
||||
+ (struct mtk_hdmi_phy_conf *)of_device_get_match_data(dev);
|
||||
+ mtk_hdmi_phy_clk_get_ops(hdmi_phy, &clk_init.ops);
|
||||
+ hdmi_phy->pll_hw.init = &clk_init;
|
||||
+ hdmi_phy->pll = devm_clk_register(dev, &hdmi_phy->pll_hw);
|
||||
+ if (IS_ERR(hdmi_phy->pll)) {
|
||||
+ ret = PTR_ERR(hdmi_phy->pll);
|
||||
+ dev_err(dev, "Failed to register PLL: %d\n", ret);
|
||||
+ return ret;
|
||||
+ }
|
||||
+
|
||||
+ ret = of_property_read_u32(dev->of_node, "mediatek,ibias",
|
||||
+ &hdmi_phy->ibias);
|
||||
+ if (ret < 0) {
|
||||
+ dev_err(&pdev->dev, "Failed to get ibias: %d\n", ret);
|
||||
+ return ret;
|
||||
+ }
|
||||
+
|
||||
+ ret = of_property_read_u32(dev->of_node, "mediatek,ibias_up",
|
||||
+ &hdmi_phy->ibias_up);
|
||||
+ if (ret < 0) {
|
||||
+ dev_err(&pdev->dev, "Failed to get ibias up: %d\n", ret);
|
||||
+ return ret;
|
||||
+ }
|
||||
+
|
||||
+ dev_info(dev, "Using default TX DRV impedance: 4.2k/36\n");
|
||||
+ hdmi_phy->drv_imp_clk = 0x30;
|
||||
+ hdmi_phy->drv_imp_d2 = 0x30;
|
||||
+ hdmi_phy->drv_imp_d1 = 0x30;
|
||||
+ hdmi_phy->drv_imp_d0 = 0x30;
|
||||
+
|
||||
+ phy = devm_phy_create(dev, NULL, mtk_hdmi_phy_dev_get_ops(hdmi_phy));
|
||||
+ if (IS_ERR(phy)) {
|
||||
+ dev_err(dev, "Failed to create HDMI PHY\n");
|
||||
+ return PTR_ERR(phy);
|
||||
+ }
|
||||
+ phy_set_drvdata(phy, hdmi_phy);
|
||||
+
|
||||
+ phy_provider = devm_of_phy_provider_register(dev, of_phy_simple_xlate);
|
||||
+ if (IS_ERR(phy_provider)) {
|
||||
+ dev_err(dev, "Failed to register HDMI PHY\n");
|
||||
+ return PTR_ERR(phy_provider);
|
||||
+ }
|
||||
+
|
||||
+ return of_clk_add_provider(dev->of_node, of_clk_src_simple_get,
|
||||
+ hdmi_phy->pll);
|
||||
+}
|
||||
+
|
||||
+static const struct of_device_id mtk_hdmi_phy_match[] = {
|
||||
+ { .compatible = "mediatek,mt8173-hdmi-phy",
|
||||
+ .data = &mtk_hdmi_phy_8173_conf,
|
||||
+ },
|
||||
+ {},
|
||||
+};
|
||||
+
|
||||
+struct platform_driver mtk_hdmi_phy_driver = {
|
||||
+ .probe = mtk_hdmi_phy_probe,
|
||||
+ .driver = {
|
||||
+ .name = "mediatek-hdmi-phy",
|
||||
+ .of_match_table = mtk_hdmi_phy_match,
|
||||
+ },
|
||||
+};
|
||||
+
|
||||
+MODULE_DESCRIPTION("MediaTek HDMI PHY Driver");
|
||||
+MODULE_LICENSE("GPL v2");
|
||||
diff --git a/drivers/gpu/drm/mediatek/mtk_hdmi_phy.h b/drivers/gpu/drm/mediatek/mtk_hdmi_phy.h
|
||||
new file mode 100644
|
||||
index 000000000000..09b8f525e6b8
|
||||
--- /dev/null
|
||||
+++ b/drivers/gpu/drm/mediatek/mtk_hdmi_phy.h
|
||||
@@ -0,0 +1,58 @@
|
||||
+/* SPDX-License-Identifier: GPL-2.0 */
|
||||
+/*
|
||||
+ * Copyright (c) 2018 MediaTek Inc.
|
||||
+ * Author: Chunhui Dai <chunhui.dai@mediatek.com>
|
||||
+ */
|
||||
+
|
||||
+#ifndef _MTK_HDMI_PHY_H
|
||||
+#define _MTK_HDMI_PHY_H
|
||||
+#include <linux/clk.h>
|
||||
+#include <linux/clk-provider.h>
|
||||
+#include <linux/delay.h>
|
||||
+#include <linux/io.h>
|
||||
+#include <linux/mfd/syscon.h>
|
||||
+#include <linux/module.h>
|
||||
+#include <linux/of_device.h>
|
||||
+#include <linux/phy/phy.h>
|
||||
+#include <linux/platform_device.h>
|
||||
+#include <linux/types.h>
|
||||
+
|
||||
+struct mtk_hdmi_phy;
|
||||
+
|
||||
+struct mtk_hdmi_phy_conf {
|
||||
+ const struct clk_ops *hdmi_phy_clk_ops;
|
||||
+ void (*hdmi_phy_enable_tmds)(struct mtk_hdmi_phy *hdmi_phy);
|
||||
+ void (*hdmi_phy_disable_tmds)(struct mtk_hdmi_phy *hdmi_phy);
|
||||
+};
|
||||
+
|
||||
+struct mtk_hdmi_phy {
|
||||
+ void __iomem *regs;
|
||||
+ struct device *dev;
|
||||
+ struct mtk_hdmi_phy_conf *conf;
|
||||
+ struct clk *pll;
|
||||
+ struct clk_hw pll_hw;
|
||||
+ unsigned long pll_rate;
|
||||
+ unsigned char drv_imp_clk;
|
||||
+ unsigned char drv_imp_d2;
|
||||
+ unsigned char drv_imp_d1;
|
||||
+ unsigned char drv_imp_d0;
|
||||
+ unsigned int ibias;
|
||||
+ unsigned int ibias_up;
|
||||
+};
|
||||
+
|
||||
+void mtk_hdmi_phy_clear_bits(struct mtk_hdmi_phy *hdmi_phy, u32 offset,
|
||||
+ u32 bits);
|
||||
+void mtk_hdmi_phy_set_bits(struct mtk_hdmi_phy *hdmi_phy, u32 offset,
|
||||
+ u32 bits);
|
||||
+void mtk_hdmi_phy_mask(struct mtk_hdmi_phy *hdmi_phy, u32 offset,
|
||||
+ u32 val, u32 mask);
|
||||
+struct mtk_hdmi_phy *to_mtk_hdmi_phy(struct clk_hw *hw);
|
||||
+long mtk_hdmi_pll_round_rate(struct clk_hw *hw, unsigned long rate,
|
||||
+ unsigned long *parent_rate);
|
||||
+unsigned long mtk_hdmi_pll_recalc_rate(struct clk_hw *hw,
|
||||
+ unsigned long parent_rate);
|
||||
+
|
||||
+extern struct platform_driver mtk_hdmi_phy_driver;
|
||||
+extern struct mtk_hdmi_phy_conf mtk_hdmi_phy_8173_conf;
|
||||
+
|
||||
+#endif /* _MTK_HDMI_PHY_H */
|
||||
diff --git a/drivers/gpu/drm/mediatek/mtk_mt8173_hdmi_phy.c b/drivers/gpu/drm/mediatek/mtk_mt8173_hdmi_phy.c
|
||||
index 51cb9cfb6646..ed5916b27658 100644
|
||||
--- a/drivers/gpu/drm/mediatek/mtk_mt8173_hdmi_phy.c
|
||||
+++ b/drivers/gpu/drm/mediatek/mtk_mt8173_hdmi_phy.c
|
||||
@@ -12,15 +12,7 @@
|
||||
* GNU General Public License for more details.
|
||||
*/
|
||||
|
||||
-#include <linux/clk.h>
|
||||
-#include <linux/clk-provider.h>
|
||||
-#include <linux/delay.h>
|
||||
-#include <linux/io.h>
|
||||
-#include <linux/mfd/syscon.h>
|
||||
-#include <linux/module.h>
|
||||
-#include <linux/phy/phy.h>
|
||||
-#include <linux/platform_device.h>
|
||||
-#include <linux/types.h>
|
||||
+#include "mtk_hdmi_phy.h"
|
||||
|
||||
#define HDMI_CON0 0x00
|
||||
#define RG_HDMITX_PLL_EN BIT(31)
|
||||
@@ -123,20 +115,6 @@
|
||||
#define RGS_HDMITX_5T1_EDG (0xf << 4)
|
||||
#define RGS_HDMITX_PLUG_TST BIT(0)
|
||||
|
||||
-struct mtk_hdmi_phy {
|
||||
- void __iomem *regs;
|
||||
- struct device *dev;
|
||||
- struct clk *pll;
|
||||
- struct clk_hw pll_hw;
|
||||
- unsigned long pll_rate;
|
||||
- u8 drv_imp_clk;
|
||||
- u8 drv_imp_d2;
|
||||
- u8 drv_imp_d1;
|
||||
- u8 drv_imp_d0;
|
||||
- u32 ibias;
|
||||
- u32 ibias_up;
|
||||
-};
|
||||
-
|
||||
static const u8 PREDIV[3][4] = {
|
||||
{0x0, 0x0, 0x0, 0x0}, /* 27Mhz */
|
||||
{0x1, 0x1, 0x1, 0x1}, /* 74Mhz */
|
||||
@@ -185,44 +163,6 @@ static const u8 HTPLLBR[3][4] = {
|
||||
{0x1, 0x2, 0x2, 0x1} /* 148Mhz */
|
||||
};
|
||||
|
||||
-static void mtk_hdmi_phy_clear_bits(struct mtk_hdmi_phy *hdmi_phy, u32 offset,
|
||||
- u32 bits)
|
||||
-{
|
||||
- void __iomem *reg = hdmi_phy->regs + offset;
|
||||
- u32 tmp;
|
||||
-
|
||||
- tmp = readl(reg);
|
||||
- tmp &= ~bits;
|
||||
- writel(tmp, reg);
|
||||
-}
|
||||
-
|
||||
-static void mtk_hdmi_phy_set_bits(struct mtk_hdmi_phy *hdmi_phy, u32 offset,
|
||||
- u32 bits)
|
||||
-{
|
||||
- void __iomem *reg = hdmi_phy->regs + offset;
|
||||
- u32 tmp;
|
||||
-
|
||||
- tmp = readl(reg);
|
||||
- tmp |= bits;
|
||||
- writel(tmp, reg);
|
||||
-}
|
||||
-
|
||||
-static void mtk_hdmi_phy_mask(struct mtk_hdmi_phy *hdmi_phy, u32 offset,
|
||||
- u32 val, u32 mask)
|
||||
-{
|
||||
- void __iomem *reg = hdmi_phy->regs + offset;
|
||||
- u32 tmp;
|
||||
-
|
||||
- tmp = readl(reg);
|
||||
- tmp = (tmp & ~mask) | (val & mask);
|
||||
- writel(tmp, reg);
|
||||
-}
|
||||
-
|
||||
-static inline struct mtk_hdmi_phy *to_mtk_hdmi_phy(struct clk_hw *hw)
|
||||
-{
|
||||
- return container_of(hw, struct mtk_hdmi_phy, pll_hw);
|
||||
-}
|
||||
-
|
||||
static int mtk_hdmi_pll_prepare(struct clk_hw *hw)
|
||||
{
|
||||
struct mtk_hdmi_phy *hdmi_phy = to_mtk_hdmi_phy(hw);
|
||||
@@ -345,29 +285,7 @@ static int mtk_hdmi_pll_set_rate(struct clk_hw *hw, unsigned long rate,
|
||||
return 0;
|
||||
}
|
||||
|
||||
-static long mtk_hdmi_pll_round_rate(struct clk_hw *hw, unsigned long rate,
|
||||
- unsigned long *parent_rate)
|
||||
-{
|
||||
- struct mtk_hdmi_phy *hdmi_phy = to_mtk_hdmi_phy(hw);
|
||||
-
|
||||
- hdmi_phy->pll_rate = rate;
|
||||
- if (rate <= 74250000)
|
||||
- *parent_rate = rate;
|
||||
- else
|
||||
- *parent_rate = rate / 2;
|
||||
-
|
||||
- return rate;
|
||||
-}
|
||||
-
|
||||
-static unsigned long mtk_hdmi_pll_recalc_rate(struct clk_hw *hw,
|
||||
- unsigned long parent_rate)
|
||||
-{
|
||||
- struct mtk_hdmi_phy *hdmi_phy = to_mtk_hdmi_phy(hw);
|
||||
-
|
||||
- return hdmi_phy->pll_rate;
|
||||
-}
|
||||
-
|
||||
-static const struct clk_ops mtk_hdmi_pll_ops = {
|
||||
+static const struct clk_ops mtk_hdmi_phy_pll_ops = {
|
||||
.prepare = mtk_hdmi_pll_prepare,
|
||||
.unprepare = mtk_hdmi_pll_unprepare,
|
||||
.set_rate = mtk_hdmi_pll_set_rate,
|
||||
@@ -390,142 +308,10 @@ static void mtk_hdmi_phy_disable_tmds(struct mtk_hdmi_phy *hdmi_phy)
|
||||
RG_HDMITX_SER_EN);
|
||||
}
|
||||
|
||||
-static int mtk_hdmi_phy_power_on(struct phy *phy)
|
||||
-{
|
||||
- struct mtk_hdmi_phy *hdmi_phy = phy_get_drvdata(phy);
|
||||
- int ret;
|
||||
-
|
||||
- ret = clk_prepare_enable(hdmi_phy->pll);
|
||||
- if (ret < 0)
|
||||
- return ret;
|
||||
-
|
||||
- mtk_hdmi_phy_enable_tmds(hdmi_phy);
|
||||
-
|
||||
- return 0;
|
||||
-}
|
||||
-
|
||||
-static int mtk_hdmi_phy_power_off(struct phy *phy)
|
||||
-{
|
||||
- struct mtk_hdmi_phy *hdmi_phy = phy_get_drvdata(phy);
|
||||
-
|
||||
- mtk_hdmi_phy_disable_tmds(hdmi_phy);
|
||||
- clk_disable_unprepare(hdmi_phy->pll);
|
||||
-
|
||||
- return 0;
|
||||
-}
|
||||
-
|
||||
-static const struct phy_ops mtk_hdmi_phy_ops = {
|
||||
- .power_on = mtk_hdmi_phy_power_on,
|
||||
- .power_off = mtk_hdmi_phy_power_off,
|
||||
- .owner = THIS_MODULE,
|
||||
-};
|
||||
-
|
||||
-static int mtk_hdmi_phy_probe(struct platform_device *pdev)
|
||||
-{
|
||||
- struct device *dev = &pdev->dev;
|
||||
- struct mtk_hdmi_phy *hdmi_phy;
|
||||
- struct resource *mem;
|
||||
- struct clk *ref_clk;
|
||||
- const char *ref_clk_name;
|
||||
- struct clk_init_data clk_init = {
|
||||
- .ops = &mtk_hdmi_pll_ops,
|
||||
- .num_parents = 1,
|
||||
- .parent_names = (const char * const *)&ref_clk_name,
|
||||
- .flags = CLK_SET_RATE_PARENT | CLK_SET_RATE_GATE,
|
||||
- };
|
||||
- struct phy *phy;
|
||||
- struct phy_provider *phy_provider;
|
||||
- int ret;
|
||||
-
|
||||
- hdmi_phy = devm_kzalloc(dev, sizeof(*hdmi_phy), GFP_KERNEL);
|
||||
- if (!hdmi_phy)
|
||||
- return -ENOMEM;
|
||||
-
|
||||
- mem = platform_get_resource(pdev, IORESOURCE_MEM, 0);
|
||||
- hdmi_phy->regs = devm_ioremap_resource(dev, mem);
|
||||
- if (IS_ERR(hdmi_phy->regs)) {
|
||||
- ret = PTR_ERR(hdmi_phy->regs);
|
||||
- dev_err(dev, "Failed to get memory resource: %d\n", ret);
|
||||
- return ret;
|
||||
- }
|
||||
-
|
||||
- ref_clk = devm_clk_get(dev, "pll_ref");
|
||||
- if (IS_ERR(ref_clk)) {
|
||||
- ret = PTR_ERR(ref_clk);
|
||||
- dev_err(&pdev->dev, "Failed to get PLL reference clock: %d\n",
|
||||
- ret);
|
||||
- return ret;
|
||||
- }
|
||||
- ref_clk_name = __clk_get_name(ref_clk);
|
||||
-
|
||||
- ret = of_property_read_string(dev->of_node, "clock-output-names",
|
||||
- &clk_init.name);
|
||||
- if (ret < 0) {
|
||||
- dev_err(dev, "Failed to read clock-output-names: %d\n", ret);
|
||||
- return ret;
|
||||
- }
|
||||
-
|
||||
- hdmi_phy->pll_hw.init = &clk_init;
|
||||
- hdmi_phy->pll = devm_clk_register(dev, &hdmi_phy->pll_hw);
|
||||
- if (IS_ERR(hdmi_phy->pll)) {
|
||||
- ret = PTR_ERR(hdmi_phy->pll);
|
||||
- dev_err(dev, "Failed to register PLL: %d\n", ret);
|
||||
- return ret;
|
||||
- }
|
||||
-
|
||||
- ret = of_property_read_u32(dev->of_node, "mediatek,ibias",
|
||||
- &hdmi_phy->ibias);
|
||||
- if (ret < 0) {
|
||||
- dev_err(&pdev->dev, "Failed to get ibias: %d\n", ret);
|
||||
- return ret;
|
||||
- }
|
||||
-
|
||||
- ret = of_property_read_u32(dev->of_node, "mediatek,ibias_up",
|
||||
- &hdmi_phy->ibias_up);
|
||||
- if (ret < 0) {
|
||||
- dev_err(&pdev->dev, "Failed to get ibias up: %d\n", ret);
|
||||
- return ret;
|
||||
- }
|
||||
-
|
||||
- dev_info(dev, "Using default TX DRV impedance: 4.2k/36\n");
|
||||
- hdmi_phy->drv_imp_clk = 0x30;
|
||||
- hdmi_phy->drv_imp_d2 = 0x30;
|
||||
- hdmi_phy->drv_imp_d1 = 0x30;
|
||||
- hdmi_phy->drv_imp_d0 = 0x30;
|
||||
-
|
||||
- phy = devm_phy_create(dev, NULL, &mtk_hdmi_phy_ops);
|
||||
- if (IS_ERR(phy)) {
|
||||
- dev_err(dev, "Failed to create HDMI PHY\n");
|
||||
- return PTR_ERR(phy);
|
||||
- }
|
||||
- phy_set_drvdata(phy, hdmi_phy);
|
||||
-
|
||||
- phy_provider = devm_of_phy_provider_register(dev, of_phy_simple_xlate);
|
||||
- if (IS_ERR(phy_provider))
|
||||
- return PTR_ERR(phy_provider);
|
||||
-
|
||||
- hdmi_phy->dev = dev;
|
||||
- return of_clk_add_provider(dev->of_node, of_clk_src_simple_get,
|
||||
- hdmi_phy->pll);
|
||||
-}
|
||||
-
|
||||
-static int mtk_hdmi_phy_remove(struct platform_device *pdev)
|
||||
-{
|
||||
- return 0;
|
||||
-}
|
||||
-
|
||||
-static const struct of_device_id mtk_hdmi_phy_match[] = {
|
||||
- { .compatible = "mediatek,mt8173-hdmi-phy", },
|
||||
- {},
|
||||
-};
|
||||
-
|
||||
-struct platform_driver mtk_hdmi_phy_driver = {
|
||||
- .probe = mtk_hdmi_phy_probe,
|
||||
- .remove = mtk_hdmi_phy_remove,
|
||||
- .driver = {
|
||||
- .name = "mediatek-hdmi-phy",
|
||||
- .of_match_table = mtk_hdmi_phy_match,
|
||||
- },
|
||||
+struct mtk_hdmi_phy_conf mtk_hdmi_phy_8173_conf = {
|
||||
+ .hdmi_phy_clk_ops = &mtk_hdmi_phy_pll_ops,
|
||||
+ .hdmi_phy_enable_tmds = mtk_hdmi_phy_enable_tmds,
|
||||
+ .hdmi_phy_disable_tmds = mtk_hdmi_phy_disable_tmds,
|
||||
};
|
||||
|
||||
MODULE_AUTHOR("Jie Qiu <jie.qiu@mediatek.com>");
|
||||
--
|
||||
2.19.1
|
||||
|
||||
|
|
@ -0,0 +1,32 @@
|
|||
From 93440802592c9acbec41645809dcae5eb350d966 Mon Sep 17 00:00:00 2001
|
||||
From: chunhui dai <chunhui.dai@mediatek.com>
|
||||
Date: Wed, 3 Oct 2018 11:41:48 +0800
|
||||
Subject: [PATCH 34/77] drm/mediatek: add support for SPDIF audio in HDMI
|
||||
|
||||
add support for SPDIF audio in HDMI
|
||||
|
||||
Signed-off-by: chunhui dai <chunhui.dai@mediatek.com>
|
||||
Reviewed-by: CK Hu <ck.hu@mediatek.com>
|
||||
---
|
||||
drivers/gpu/drm/mediatek/mtk_hdmi.c | 5 +++++
|
||||
1 file changed, 5 insertions(+)
|
||||
|
||||
diff --git a/drivers/gpu/drm/mediatek/mtk_hdmi.c b/drivers/gpu/drm/mediatek/mtk_hdmi.c
|
||||
index 29bd2a144b19..90e1139f02f8 100644
|
||||
--- a/drivers/gpu/drm/mediatek/mtk_hdmi.c
|
||||
+++ b/drivers/gpu/drm/mediatek/mtk_hdmi.c
|
||||
@@ -1577,6 +1577,11 @@ static int mtk_hdmi_audio_hw_params(struct device *dev, void *data,
|
||||
hdmi_params.aud_i2s_fmt = HDMI_I2S_MODE_I2S_24BIT;
|
||||
hdmi_params.aud_mclk = HDMI_AUD_MCLK_128FS;
|
||||
break;
|
||||
+ case HDMI_SPDIF:
|
||||
+ hdmi_params.aud_codec = HDMI_AUDIO_CODING_TYPE_PCM;
|
||||
+ hdmi_params.aud_sampe_size = HDMI_AUDIO_SAMPLE_SIZE_16;
|
||||
+ hdmi_params.aud_input_type = HDMI_AUD_INPUT_SPDIF;
|
||||
+ break;
|
||||
default:
|
||||
dev_err(hdmi->dev, "%s: Invalid DAI format %d\n", __func__,
|
||||
daifmt->fmt);
|
||||
--
|
||||
2.19.1
|
||||
|
||||
|
|
@ -0,0 +1,309 @@
|
|||
From 7ced4ebd71acd0677a73976bf6be399c2362ca6e Mon Sep 17 00:00:00 2001
|
||||
From: chunhui dai <chunhui.dai@mediatek.com>
|
||||
Date: Wed, 3 Oct 2018 11:41:49 +0800
|
||||
Subject: [PATCH 35/77] drm/mediatek: add hdmi driver for MT2701 and MT7623
|
||||
|
||||
This patch adds hdmi dirver suppot for both MT2701 and MT7623.
|
||||
And also support other (existing or future) chips that use
|
||||
the same binding and driver.
|
||||
|
||||
Signed-off-by: chunhui dai <chunhui.dai@mediatek.com>
|
||||
Reviewed-by: CK Hu <ck.hu@mediatek.com>
|
||||
---
|
||||
drivers/gpu/drm/mediatek/Makefile | 3 +-
|
||||
drivers/gpu/drm/mediatek/mtk_hdmi.c | 9 +-
|
||||
drivers/gpu/drm/mediatek/mtk_hdmi_phy.c | 3 +
|
||||
drivers/gpu/drm/mediatek/mtk_hdmi_phy.h | 2 +
|
||||
.../gpu/drm/mediatek/mtk_mt2701_hdmi_phy.c | 212 ++++++++++++++++++
|
||||
5 files changed, 226 insertions(+), 3 deletions(-)
|
||||
create mode 100644 drivers/gpu/drm/mediatek/mtk_mt2701_hdmi_phy.c
|
||||
|
||||
diff --git a/drivers/gpu/drm/mediatek/Makefile b/drivers/gpu/drm/mediatek/Makefile
|
||||
index 61cf0d2ab28a..82ae49c64221 100644
|
||||
--- a/drivers/gpu/drm/mediatek/Makefile
|
||||
+++ b/drivers/gpu/drm/mediatek/Makefile
|
||||
@@ -19,7 +19,8 @@ obj-$(CONFIG_DRM_MEDIATEK) += mediatek-drm.o
|
||||
mediatek-drm-hdmi-objs := mtk_cec.o \
|
||||
mtk_hdmi.o \
|
||||
mtk_hdmi_ddc.o \
|
||||
+ mtk_mt2701_hdmi_phy.o \
|
||||
mtk_mt8173_hdmi_phy.o \
|
||||
mtk_hdmi_phy.o
|
||||
|
||||
-obj-$(CONFIG_DRM_MEDIATEK_HDMI) += mediatek-drm-hdmi.o
|
||||
\ No newline at end of file
|
||||
+obj-$(CONFIG_DRM_MEDIATEK_HDMI) += mediatek-drm-hdmi.o
|
||||
diff --git a/drivers/gpu/drm/mediatek/mtk_hdmi.c b/drivers/gpu/drm/mediatek/mtk_hdmi.c
|
||||
index 90e1139f02f8..862f3ec22131 100644
|
||||
--- a/drivers/gpu/drm/mediatek/mtk_hdmi.c
|
||||
+++ b/drivers/gpu/drm/mediatek/mtk_hdmi.c
|
||||
@@ -241,8 +241,13 @@ static void mtk_hdmi_hw_make_reg_writable(struct mtk_hdmi *hdmi, bool enable)
|
||||
* The ARM trusted firmware provides an API for the HDMI driver to set
|
||||
* this control bit to enable HDMI output in supervisor mode.
|
||||
*/
|
||||
- arm_smccc_smc(MTK_SIP_SET_AUTHORIZED_SECURE_REG, 0x14000904, 0x80000000,
|
||||
- 0, 0, 0, 0, 0, &res);
|
||||
+ if (hdmi_phy->conf && hdmi_phy->conf->tz_disabled)
|
||||
+ regmap_update_bits(hdmi->sys_regmap,
|
||||
+ hdmi->sys_offset + HDMI_SYS_CFG20,
|
||||
+ 0x80008005, enable ? 0x80000005 : 0x8000);
|
||||
+ else
|
||||
+ arm_smccc_smc(MTK_SIP_SET_AUTHORIZED_SECURE_REG, 0x14000904,
|
||||
+ 0x80000000, 0, 0, 0, 0, 0, &res);
|
||||
|
||||
regmap_update_bits(hdmi->sys_regmap, hdmi->sys_offset + HDMI_SYS_CFG20,
|
||||
HDMI_PCLK_FREE_RUN, enable ? HDMI_PCLK_FREE_RUN : 0);
|
||||
diff --git a/drivers/gpu/drm/mediatek/mtk_hdmi_phy.c b/drivers/gpu/drm/mediatek/mtk_hdmi_phy.c
|
||||
index 514f3e9a8767..4ef9c57ffd44 100644
|
||||
--- a/drivers/gpu/drm/mediatek/mtk_hdmi_phy.c
|
||||
+++ b/drivers/gpu/drm/mediatek/mtk_hdmi_phy.c
|
||||
@@ -214,6 +214,9 @@ static int mtk_hdmi_phy_probe(struct platform_device *pdev)
|
||||
}
|
||||
|
||||
static const struct of_device_id mtk_hdmi_phy_match[] = {
|
||||
+ { .compatible = "mediatek,mt2701-hdmi-phy",
|
||||
+ .data = &mtk_hdmi_phy_2701_conf,
|
||||
+ },
|
||||
{ .compatible = "mediatek,mt8173-hdmi-phy",
|
||||
.data = &mtk_hdmi_phy_8173_conf,
|
||||
},
|
||||
diff --git a/drivers/gpu/drm/mediatek/mtk_hdmi_phy.h b/drivers/gpu/drm/mediatek/mtk_hdmi_phy.h
|
||||
index 09b8f525e6b8..f39b1fc66612 100644
|
||||
--- a/drivers/gpu/drm/mediatek/mtk_hdmi_phy.h
|
||||
+++ b/drivers/gpu/drm/mediatek/mtk_hdmi_phy.h
|
||||
@@ -20,6 +20,7 @@
|
||||
struct mtk_hdmi_phy;
|
||||
|
||||
struct mtk_hdmi_phy_conf {
|
||||
+ bool tz_disabled;
|
||||
const struct clk_ops *hdmi_phy_clk_ops;
|
||||
void (*hdmi_phy_enable_tmds)(struct mtk_hdmi_phy *hdmi_phy);
|
||||
void (*hdmi_phy_disable_tmds)(struct mtk_hdmi_phy *hdmi_phy);
|
||||
@@ -54,5 +55,6 @@ unsigned long mtk_hdmi_pll_recalc_rate(struct clk_hw *hw,
|
||||
|
||||
extern struct platform_driver mtk_hdmi_phy_driver;
|
||||
extern struct mtk_hdmi_phy_conf mtk_hdmi_phy_8173_conf;
|
||||
+extern struct mtk_hdmi_phy_conf mtk_hdmi_phy_2701_conf;
|
||||
|
||||
#endif /* _MTK_HDMI_PHY_H */
|
||||
diff --git a/drivers/gpu/drm/mediatek/mtk_mt2701_hdmi_phy.c b/drivers/gpu/drm/mediatek/mtk_mt2701_hdmi_phy.c
|
||||
new file mode 100644
|
||||
index 000000000000..fcc42dc6ea7f
|
||||
--- /dev/null
|
||||
+++ b/drivers/gpu/drm/mediatek/mtk_mt2701_hdmi_phy.c
|
||||
@@ -0,0 +1,212 @@
|
||||
+// SPDX-License-Identifier: GPL-2.0
|
||||
+/*
|
||||
+ * Copyright (c) 2018 MediaTek Inc.
|
||||
+ * Author: Chunhui Dai <chunhui.dai@mediatek.com>
|
||||
+ */
|
||||
+
|
||||
+#include "mtk_hdmi_phy.h"
|
||||
+
|
||||
+#define HDMI_CON0 0x00
|
||||
+#define RG_HDMITX_DRV_IBIAS 0
|
||||
+#define RG_HDMITX_DRV_IBIAS_MASK (0x3f << 0)
|
||||
+#define RG_HDMITX_EN_SER 12
|
||||
+#define RG_HDMITX_EN_SER_MASK (0x0f << 12)
|
||||
+#define RG_HDMITX_EN_SLDO 16
|
||||
+#define RG_HDMITX_EN_SLDO_MASK (0x0f << 16)
|
||||
+#define RG_HDMITX_EN_PRED 20
|
||||
+#define RG_HDMITX_EN_PRED_MASK (0x0f << 20)
|
||||
+#define RG_HDMITX_EN_IMP 24
|
||||
+#define RG_HDMITX_EN_IMP_MASK (0x0f << 24)
|
||||
+#define RG_HDMITX_EN_DRV 28
|
||||
+#define RG_HDMITX_EN_DRV_MASK (0x0f << 28)
|
||||
+
|
||||
+#define HDMI_CON1 0x04
|
||||
+#define RG_HDMITX_PRED_IBIAS 18
|
||||
+#define RG_HDMITX_PRED_IBIAS_MASK (0x0f << 18)
|
||||
+#define RG_HDMITX_PRED_IMP (0x01 << 22)
|
||||
+#define RG_HDMITX_DRV_IMP 26
|
||||
+#define RG_HDMITX_DRV_IMP_MASK (0x3f << 26)
|
||||
+
|
||||
+#define HDMI_CON2 0x08
|
||||
+#define RG_HDMITX_EN_TX_CKLDO (0x01 << 0)
|
||||
+#define RG_HDMITX_EN_TX_POSDIV (0x01 << 1)
|
||||
+#define RG_HDMITX_TX_POSDIV 3
|
||||
+#define RG_HDMITX_TX_POSDIV_MASK (0x03 << 3)
|
||||
+#define RG_HDMITX_EN_MBIAS (0x01 << 6)
|
||||
+#define RG_HDMITX_MBIAS_LPF_EN (0x01 << 7)
|
||||
+
|
||||
+#define HDMI_CON4 0x10
|
||||
+#define RG_HDMITX_RESERVE_MASK (0xffffffff << 0)
|
||||
+
|
||||
+#define HDMI_CON6 0x18
|
||||
+#define RG_HTPLL_BR 0
|
||||
+#define RG_HTPLL_BR_MASK (0x03 << 0)
|
||||
+#define RG_HTPLL_BC 2
|
||||
+#define RG_HTPLL_BC_MASK (0x03 << 2)
|
||||
+#define RG_HTPLL_BP 4
|
||||
+#define RG_HTPLL_BP_MASK (0x0f << 4)
|
||||
+#define RG_HTPLL_IR 8
|
||||
+#define RG_HTPLL_IR_MASK (0x0f << 8)
|
||||
+#define RG_HTPLL_IC 12
|
||||
+#define RG_HTPLL_IC_MASK (0x0f << 12)
|
||||
+#define RG_HTPLL_POSDIV 16
|
||||
+#define RG_HTPLL_POSDIV_MASK (0x03 << 16)
|
||||
+#define RG_HTPLL_PREDIV 18
|
||||
+#define RG_HTPLL_PREDIV_MASK (0x03 << 18)
|
||||
+#define RG_HTPLL_FBKSEL 20
|
||||
+#define RG_HTPLL_FBKSEL_MASK (0x03 << 20)
|
||||
+#define RG_HTPLL_RLH_EN (0x01 << 22)
|
||||
+#define RG_HTPLL_FBKDIV 24
|
||||
+#define RG_HTPLL_FBKDIV_MASK (0x7f << 24)
|
||||
+#define RG_HTPLL_EN (0x01 << 31)
|
||||
+
|
||||
+#define HDMI_CON7 0x1c
|
||||
+#define RG_HTPLL_AUTOK_EN (0x01 << 23)
|
||||
+#define RG_HTPLL_DIVEN 28
|
||||
+#define RG_HTPLL_DIVEN_MASK (0x07 << 28)
|
||||
+
|
||||
+static int mtk_hdmi_pll_prepare(struct clk_hw *hw)
|
||||
+{
|
||||
+ struct mtk_hdmi_phy *hdmi_phy = to_mtk_hdmi_phy(hw);
|
||||
+
|
||||
+ mtk_hdmi_phy_set_bits(hdmi_phy, HDMI_CON7, RG_HTPLL_AUTOK_EN);
|
||||
+ mtk_hdmi_phy_clear_bits(hdmi_phy, HDMI_CON6, RG_HTPLL_RLH_EN);
|
||||
+ mtk_hdmi_phy_set_bits(hdmi_phy, HDMI_CON6, RG_HTPLL_POSDIV_MASK);
|
||||
+ mtk_hdmi_phy_set_bits(hdmi_phy, HDMI_CON2, RG_HDMITX_EN_MBIAS);
|
||||
+ usleep_range(80, 100);
|
||||
+ mtk_hdmi_phy_set_bits(hdmi_phy, HDMI_CON6, RG_HTPLL_EN);
|
||||
+ mtk_hdmi_phy_set_bits(hdmi_phy, HDMI_CON2, RG_HDMITX_EN_TX_CKLDO);
|
||||
+ mtk_hdmi_phy_set_bits(hdmi_phy, HDMI_CON0, RG_HDMITX_EN_SLDO_MASK);
|
||||
+ usleep_range(80, 100);
|
||||
+ mtk_hdmi_phy_set_bits(hdmi_phy, HDMI_CON2, RG_HDMITX_MBIAS_LPF_EN);
|
||||
+ mtk_hdmi_phy_set_bits(hdmi_phy, HDMI_CON2, RG_HDMITX_EN_TX_POSDIV);
|
||||
+ mtk_hdmi_phy_set_bits(hdmi_phy, HDMI_CON0, RG_HDMITX_EN_SER_MASK);
|
||||
+ mtk_hdmi_phy_set_bits(hdmi_phy, HDMI_CON0, RG_HDMITX_EN_PRED_MASK);
|
||||
+ mtk_hdmi_phy_set_bits(hdmi_phy, HDMI_CON0, RG_HDMITX_EN_DRV_MASK);
|
||||
+ usleep_range(80, 100);
|
||||
+ return 0;
|
||||
+}
|
||||
+
|
||||
+static void mtk_hdmi_pll_unprepare(struct clk_hw *hw)
|
||||
+{
|
||||
+ struct mtk_hdmi_phy *hdmi_phy = to_mtk_hdmi_phy(hw);
|
||||
+
|
||||
+ mtk_hdmi_phy_clear_bits(hdmi_phy, HDMI_CON0, RG_HDMITX_EN_DRV_MASK);
|
||||
+ mtk_hdmi_phy_clear_bits(hdmi_phy, HDMI_CON0, RG_HDMITX_EN_PRED_MASK);
|
||||
+ mtk_hdmi_phy_clear_bits(hdmi_phy, HDMI_CON0, RG_HDMITX_EN_SER_MASK);
|
||||
+ mtk_hdmi_phy_clear_bits(hdmi_phy, HDMI_CON2, RG_HDMITX_EN_TX_POSDIV);
|
||||
+ mtk_hdmi_phy_clear_bits(hdmi_phy, HDMI_CON2, RG_HDMITX_MBIAS_LPF_EN);
|
||||
+ usleep_range(80, 100);
|
||||
+ mtk_hdmi_phy_clear_bits(hdmi_phy, HDMI_CON0, RG_HDMITX_EN_SLDO_MASK);
|
||||
+ mtk_hdmi_phy_clear_bits(hdmi_phy, HDMI_CON2, RG_HDMITX_EN_TX_CKLDO);
|
||||
+ mtk_hdmi_phy_clear_bits(hdmi_phy, HDMI_CON6, RG_HTPLL_EN);
|
||||
+ usleep_range(80, 100);
|
||||
+ mtk_hdmi_phy_clear_bits(hdmi_phy, HDMI_CON2, RG_HDMITX_EN_MBIAS);
|
||||
+ mtk_hdmi_phy_clear_bits(hdmi_phy, HDMI_CON6, RG_HTPLL_POSDIV_MASK);
|
||||
+ mtk_hdmi_phy_clear_bits(hdmi_phy, HDMI_CON6, RG_HTPLL_RLH_EN);
|
||||
+ mtk_hdmi_phy_clear_bits(hdmi_phy, HDMI_CON7, RG_HTPLL_AUTOK_EN);
|
||||
+ usleep_range(80, 100);
|
||||
+}
|
||||
+
|
||||
+static int mtk_hdmi_pll_set_rate(struct clk_hw *hw, unsigned long rate,
|
||||
+ unsigned long parent_rate)
|
||||
+{
|
||||
+ struct mtk_hdmi_phy *hdmi_phy = to_mtk_hdmi_phy(hw);
|
||||
+ u32 pos_div;
|
||||
+
|
||||
+ if (rate <= 64000000)
|
||||
+ pos_div = 3;
|
||||
+ else if (rate <= 12800000)
|
||||
+ pos_div = 1;
|
||||
+ else
|
||||
+ pos_div = 1;
|
||||
+
|
||||
+ mtk_hdmi_phy_set_bits(hdmi_phy, HDMI_CON6, RG_HTPLL_PREDIV_MASK);
|
||||
+ mtk_hdmi_phy_set_bits(hdmi_phy, HDMI_CON6, RG_HTPLL_POSDIV_MASK);
|
||||
+ mtk_hdmi_phy_mask(hdmi_phy, HDMI_CON6, (0x1 << RG_HTPLL_IC),
|
||||
+ RG_HTPLL_IC_MASK);
|
||||
+ mtk_hdmi_phy_mask(hdmi_phy, HDMI_CON6, (0x1 << RG_HTPLL_IR),
|
||||
+ RG_HTPLL_IR_MASK);
|
||||
+ mtk_hdmi_phy_mask(hdmi_phy, HDMI_CON2, (pos_div << RG_HDMITX_TX_POSDIV),
|
||||
+ RG_HDMITX_TX_POSDIV_MASK);
|
||||
+ mtk_hdmi_phy_mask(hdmi_phy, HDMI_CON6, (1 << RG_HTPLL_FBKSEL),
|
||||
+ RG_HTPLL_FBKSEL_MASK);
|
||||
+ mtk_hdmi_phy_mask(hdmi_phy, HDMI_CON6, (19 << RG_HTPLL_FBKDIV),
|
||||
+ RG_HTPLL_FBKDIV_MASK);
|
||||
+ mtk_hdmi_phy_mask(hdmi_phy, HDMI_CON7, (0x2 << RG_HTPLL_DIVEN),
|
||||
+ RG_HTPLL_DIVEN_MASK);
|
||||
+ mtk_hdmi_phy_mask(hdmi_phy, HDMI_CON6, (0xc << RG_HTPLL_BP),
|
||||
+ RG_HTPLL_BP_MASK);
|
||||
+ mtk_hdmi_phy_mask(hdmi_phy, HDMI_CON6, (0x2 << RG_HTPLL_BC),
|
||||
+ RG_HTPLL_BC_MASK);
|
||||
+ mtk_hdmi_phy_mask(hdmi_phy, HDMI_CON6, (0x1 << RG_HTPLL_BR),
|
||||
+ RG_HTPLL_BR_MASK);
|
||||
+
|
||||
+ mtk_hdmi_phy_clear_bits(hdmi_phy, HDMI_CON1, RG_HDMITX_PRED_IMP);
|
||||
+ mtk_hdmi_phy_mask(hdmi_phy, HDMI_CON1, (0x3 << RG_HDMITX_PRED_IBIAS),
|
||||
+ RG_HDMITX_PRED_IBIAS_MASK);
|
||||
+ mtk_hdmi_phy_clear_bits(hdmi_phy, HDMI_CON0, RG_HDMITX_EN_IMP_MASK);
|
||||
+ mtk_hdmi_phy_mask(hdmi_phy, HDMI_CON1, (0x28 << RG_HDMITX_DRV_IMP),
|
||||
+ RG_HDMITX_DRV_IMP_MASK);
|
||||
+ mtk_hdmi_phy_mask(hdmi_phy, HDMI_CON4, 0x28, RG_HDMITX_RESERVE_MASK);
|
||||
+ mtk_hdmi_phy_mask(hdmi_phy, HDMI_CON0, (0xa << RG_HDMITX_DRV_IBIAS),
|
||||
+ RG_HDMITX_DRV_IBIAS_MASK);
|
||||
+ return 0;
|
||||
+}
|
||||
+
|
||||
+static const struct clk_ops mtk_hdmi_phy_pll_ops = {
|
||||
+ .prepare = mtk_hdmi_pll_prepare,
|
||||
+ .unprepare = mtk_hdmi_pll_unprepare,
|
||||
+ .set_rate = mtk_hdmi_pll_set_rate,
|
||||
+ .round_rate = mtk_hdmi_pll_round_rate,
|
||||
+ .recalc_rate = mtk_hdmi_pll_recalc_rate,
|
||||
+};
|
||||
+
|
||||
+static void mtk_hdmi_phy_enable_tmds(struct mtk_hdmi_phy *hdmi_phy)
|
||||
+{
|
||||
+ mtk_hdmi_phy_set_bits(hdmi_phy, HDMI_CON7, RG_HTPLL_AUTOK_EN);
|
||||
+ mtk_hdmi_phy_clear_bits(hdmi_phy, HDMI_CON6, RG_HTPLL_RLH_EN);
|
||||
+ mtk_hdmi_phy_set_bits(hdmi_phy, HDMI_CON6, RG_HTPLL_POSDIV_MASK);
|
||||
+ mtk_hdmi_phy_set_bits(hdmi_phy, HDMI_CON2, RG_HDMITX_EN_MBIAS);
|
||||
+ usleep_range(80, 100);
|
||||
+ mtk_hdmi_phy_set_bits(hdmi_phy, HDMI_CON6, RG_HTPLL_EN);
|
||||
+ mtk_hdmi_phy_set_bits(hdmi_phy, HDMI_CON2, RG_HDMITX_EN_TX_CKLDO);
|
||||
+ mtk_hdmi_phy_set_bits(hdmi_phy, HDMI_CON0, RG_HDMITX_EN_SLDO_MASK);
|
||||
+ usleep_range(80, 100);
|
||||
+ mtk_hdmi_phy_set_bits(hdmi_phy, HDMI_CON2, RG_HDMITX_MBIAS_LPF_EN);
|
||||
+ mtk_hdmi_phy_set_bits(hdmi_phy, HDMI_CON2, RG_HDMITX_EN_TX_POSDIV);
|
||||
+ mtk_hdmi_phy_set_bits(hdmi_phy, HDMI_CON0, RG_HDMITX_EN_SER_MASK);
|
||||
+ mtk_hdmi_phy_set_bits(hdmi_phy, HDMI_CON0, RG_HDMITX_EN_PRED_MASK);
|
||||
+ mtk_hdmi_phy_set_bits(hdmi_phy, HDMI_CON0, RG_HDMITX_EN_DRV_MASK);
|
||||
+ usleep_range(80, 100);
|
||||
+}
|
||||
+
|
||||
+static void mtk_hdmi_phy_disable_tmds(struct mtk_hdmi_phy *hdmi_phy)
|
||||
+{
|
||||
+ mtk_hdmi_phy_clear_bits(hdmi_phy, HDMI_CON0, RG_HDMITX_EN_DRV_MASK);
|
||||
+ mtk_hdmi_phy_clear_bits(hdmi_phy, HDMI_CON0, RG_HDMITX_EN_PRED_MASK);
|
||||
+ mtk_hdmi_phy_clear_bits(hdmi_phy, HDMI_CON0, RG_HDMITX_EN_SER_MASK);
|
||||
+ mtk_hdmi_phy_clear_bits(hdmi_phy, HDMI_CON2, RG_HDMITX_EN_TX_POSDIV);
|
||||
+ mtk_hdmi_phy_clear_bits(hdmi_phy, HDMI_CON2, RG_HDMITX_MBIAS_LPF_EN);
|
||||
+ usleep_range(80, 100);
|
||||
+ mtk_hdmi_phy_clear_bits(hdmi_phy, HDMI_CON0, RG_HDMITX_EN_SLDO_MASK);
|
||||
+ mtk_hdmi_phy_clear_bits(hdmi_phy, HDMI_CON2, RG_HDMITX_EN_TX_CKLDO);
|
||||
+ mtk_hdmi_phy_clear_bits(hdmi_phy, HDMI_CON6, RG_HTPLL_EN);
|
||||
+ usleep_range(80, 100);
|
||||
+ mtk_hdmi_phy_clear_bits(hdmi_phy, HDMI_CON2, RG_HDMITX_EN_MBIAS);
|
||||
+ mtk_hdmi_phy_clear_bits(hdmi_phy, HDMI_CON6, RG_HTPLL_POSDIV_MASK);
|
||||
+ mtk_hdmi_phy_clear_bits(hdmi_phy, HDMI_CON6, RG_HTPLL_RLH_EN);
|
||||
+ mtk_hdmi_phy_clear_bits(hdmi_phy, HDMI_CON7, RG_HTPLL_AUTOK_EN);
|
||||
+ usleep_range(80, 100);
|
||||
+}
|
||||
+
|
||||
+struct mtk_hdmi_phy_conf mtk_hdmi_phy_2701_conf = {
|
||||
+ .tz_disabled = true,
|
||||
+ .hdmi_phy_clk_ops = &mtk_hdmi_phy_pll_ops,
|
||||
+ .hdmi_phy_enable_tmds = mtk_hdmi_phy_enable_tmds,
|
||||
+ .hdmi_phy_disable_tmds = mtk_hdmi_phy_disable_tmds,
|
||||
+};
|
||||
+
|
||||
+MODULE_AUTHOR("Chunhui Dai <chunhui.dai@mediatek.com>");
|
||||
+MODULE_DESCRIPTION("MediaTek HDMI PHY Driver");
|
||||
+MODULE_LICENSE("GPL v2");
|
||||
--
|
||||
2.19.1
|
||||
|
||||
|
|
@ -0,0 +1,58 @@
|
|||
From 2ac94b8b6a664bb66404b595da4789687f13bcc4 Mon Sep 17 00:00:00 2001
|
||||
From: Bibby Hsieh <bibby.hsieh@mediatek.com>
|
||||
Date: Wed, 3 Oct 2018 11:41:50 +0800
|
||||
Subject: [PATCH 36/77] drm/mediatek: implement connection from BLS to DPI0
|
||||
|
||||
Modify display driver to support connection from BLS to DPI.
|
||||
|
||||
Signed-off-by: Bibby Hsieh <bibby.hsieh@mediatek.com>
|
||||
Reviewed-by: CK Hu <ck.hu@mediatek.com>
|
||||
---
|
||||
drivers/gpu/drm/mediatek/mtk_drm_ddp.c | 14 +++++++++++++-
|
||||
1 file changed, 13 insertions(+), 1 deletion(-)
|
||||
|
||||
diff --git a/drivers/gpu/drm/mediatek/mtk_drm_ddp.c b/drivers/gpu/drm/mediatek/mtk_drm_ddp.c
|
||||
index 546b3e3b300b..579ce28d801d 100644
|
||||
--- a/drivers/gpu/drm/mediatek/mtk_drm_ddp.c
|
||||
+++ b/drivers/gpu/drm/mediatek/mtk_drm_ddp.c
|
||||
@@ -39,6 +39,7 @@
|
||||
#define DISP_REG_CONFIG_DISP_OVL_MOUT_EN 0x030
|
||||
#define DISP_REG_CONFIG_OUT_SEL 0x04c
|
||||
#define DISP_REG_CONFIG_DSI_SEL 0x050
|
||||
+#define DISP_REG_CONFIG_DPI_SEL 0x064
|
||||
|
||||
#define DISP_REG_MUTEX_EN(n) (0x20 + 0x20 * (n))
|
||||
#define DISP_REG_MUTEX(n) (0x24 + 0x20 * (n))
|
||||
@@ -136,7 +137,10 @@
|
||||
|
||||
#define OVL_MOUT_EN_RDMA 0x1
|
||||
#define BLS_TO_DSI_RDMA1_TO_DPI1 0x8
|
||||
+#define BLS_TO_DPI_RDMA1_TO_DSI 0x2
|
||||
#define DSI_SEL_IN_BLS 0x0
|
||||
+#define DPI_SEL_IN_BLS 0x0
|
||||
+#define DSI_SEL_IN_RDMA 0x1
|
||||
|
||||
struct mtk_disp_mutex {
|
||||
int id;
|
||||
@@ -339,9 +343,17 @@ static void mtk_ddp_sout_sel(void __iomem *config_regs,
|
||||
enum mtk_ddp_comp_id cur,
|
||||
enum mtk_ddp_comp_id next)
|
||||
{
|
||||
- if (cur == DDP_COMPONENT_BLS && next == DDP_COMPONENT_DSI0)
|
||||
+ if (cur == DDP_COMPONENT_BLS && next == DDP_COMPONENT_DSI0) {
|
||||
writel_relaxed(BLS_TO_DSI_RDMA1_TO_DPI1,
|
||||
config_regs + DISP_REG_CONFIG_OUT_SEL);
|
||||
+ } else if (cur == DDP_COMPONENT_BLS && next == DDP_COMPONENT_DPI0) {
|
||||
+ writel_relaxed(BLS_TO_DPI_RDMA1_TO_DSI,
|
||||
+ config_regs + DISP_REG_CONFIG_OUT_SEL);
|
||||
+ writel_relaxed(DSI_SEL_IN_RDMA,
|
||||
+ config_regs + DISP_REG_CONFIG_DSI_SEL);
|
||||
+ writel_relaxed(DPI_SEL_IN_BLS,
|
||||
+ config_regs + DISP_REG_CONFIG_DPI_SEL);
|
||||
+ }
|
||||
}
|
||||
|
||||
void mtk_ddp_add_comp_to_path(void __iomem *config_regs,
|
||||
--
|
||||
2.19.1
|
||||
|
||||
|
|
@ -0,0 +1,32 @@
|
|||
From 4a50f2d17feb0b95488cb3f0769972f01e60209f Mon Sep 17 00:00:00 2001
|
||||
From: Bibby Hsieh <bibby.hsieh@mediatek.com>
|
||||
Date: Wed, 3 Oct 2018 11:41:51 +0800
|
||||
Subject: [PATCH 37/77] drm/mediatek: add a error return value when clock
|
||||
driver has been prepared
|
||||
|
||||
DRM driver get the comp->clk by of_clk_get(), we only
|
||||
assign NULL to comp->clk when error happened, but do
|
||||
not return the error number.
|
||||
|
||||
Signed-off-by: Bibby Hsieh <bibby.hsieh@mediatek.com>
|
||||
Reviewed-by: CK Hu <ck.hu@mediatek.com>
|
||||
---
|
||||
drivers/gpu/drm/mediatek/mtk_drm_ddp_comp.c | 2 +-
|
||||
1 file changed, 1 insertion(+), 1 deletion(-)
|
||||
|
||||
diff --git a/drivers/gpu/drm/mediatek/mtk_drm_ddp_comp.c b/drivers/gpu/drm/mediatek/mtk_drm_ddp_comp.c
|
||||
index ff974d82a4a6..54ca794db3e9 100644
|
||||
--- a/drivers/gpu/drm/mediatek/mtk_drm_ddp_comp.c
|
||||
+++ b/drivers/gpu/drm/mediatek/mtk_drm_ddp_comp.c
|
||||
@@ -294,7 +294,7 @@ int mtk_ddp_comp_init(struct device *dev, struct device_node *node,
|
||||
comp->irq = of_irq_get(node, 0);
|
||||
comp->clk = of_clk_get(node, 0);
|
||||
if (IS_ERR(comp->clk))
|
||||
- comp->clk = NULL;
|
||||
+ return PTR_ERR(comp->clk);
|
||||
|
||||
/* Only DMA capable components need the LARB property */
|
||||
comp->larb_dev = NULL;
|
||||
--
|
||||
2.19.1
|
||||
|
||||
|
|
@ -0,0 +1,142 @@
|
|||
From 9712ba59916d5a7cf568e8ba73d4fba4f2ebfd5f Mon Sep 17 00:00:00 2001
|
||||
From: Bibby Hsieh <bibby.hsieh@mediatek.com>
|
||||
Date: Fri, 21 Sep 2018 11:28:22 +0800
|
||||
Subject: [PATCH 38/77] drm/mediatek: config component output by device node
|
||||
port
|
||||
|
||||
We can select output component by decive node port.
|
||||
Main path default output component is DSI.
|
||||
External path default output component is DPI.
|
||||
|
||||
Signed-off-by: Bibby Hsieh <bibby.hsieh@mediatek.com>
|
||||
Signed-off-by: Frank Wunderlich <frank-w@public-files.de>
|
||||
---
|
||||
drivers/gpu/drm/mediatek/mtk_drm_drv.c | 41 ++++++++++++++++++++++----
|
||||
drivers/gpu/drm/mediatek/mtk_drm_drv.h | 4 +--
|
||||
2 files changed, 37 insertions(+), 8 deletions(-)
|
||||
|
||||
diff --git a/drivers/gpu/drm/mediatek/mtk_drm_drv.c b/drivers/gpu/drm/mediatek/mtk_drm_drv.c
|
||||
index 6422e99952fe..188b83d63c87 100644
|
||||
--- a/drivers/gpu/drm/mediatek/mtk_drm_drv.c
|
||||
+++ b/drivers/gpu/drm/mediatek/mtk_drm_drv.c
|
||||
@@ -21,7 +21,9 @@
|
||||
#include <drm/drm_of.h>
|
||||
#include <linux/component.h>
|
||||
#include <linux/iommu.h>
|
||||
+#include <linux/of.h>
|
||||
#include <linux/of_address.h>
|
||||
+#include <linux/of_graph.h>
|
||||
#include <linux/of_platform.h>
|
||||
#include <linux/pm_runtime.h>
|
||||
|
||||
@@ -133,7 +135,7 @@ static const struct drm_mode_config_funcs mtk_drm_mode_config_funcs = {
|
||||
.atomic_commit = mtk_atomic_commit,
|
||||
};
|
||||
|
||||
-static const enum mtk_ddp_comp_id mt2701_mtk_ddp_main[] = {
|
||||
+static enum mtk_ddp_comp_id mt2701_mtk_ddp_main[] = {
|
||||
DDP_COMPONENT_OVL0,
|
||||
DDP_COMPONENT_RDMA0,
|
||||
DDP_COMPONENT_COLOR0,
|
||||
@@ -141,12 +143,12 @@ static const enum mtk_ddp_comp_id mt2701_mtk_ddp_main[] = {
|
||||
DDP_COMPONENT_DSI0,
|
||||
};
|
||||
|
||||
-static const enum mtk_ddp_comp_id mt2701_mtk_ddp_ext[] = {
|
||||
+static enum mtk_ddp_comp_id mt2701_mtk_ddp_ext[] = {
|
||||
DDP_COMPONENT_RDMA1,
|
||||
DDP_COMPONENT_DPI0,
|
||||
};
|
||||
|
||||
-static const enum mtk_ddp_comp_id mt2712_mtk_ddp_main[] = {
|
||||
+static enum mtk_ddp_comp_id mt2712_mtk_ddp_main[] = {
|
||||
DDP_COMPONENT_OVL0,
|
||||
DDP_COMPONENT_COLOR0,
|
||||
DDP_COMPONENT_AAL0,
|
||||
@@ -156,7 +158,7 @@ static const enum mtk_ddp_comp_id mt2712_mtk_ddp_main[] = {
|
||||
DDP_COMPONENT_PWM0,
|
||||
};
|
||||
|
||||
-static const enum mtk_ddp_comp_id mt2712_mtk_ddp_ext[] = {
|
||||
+static enum mtk_ddp_comp_id mt2712_mtk_ddp_ext[] = {
|
||||
DDP_COMPONENT_OVL1,
|
||||
DDP_COMPONENT_COLOR1,
|
||||
DDP_COMPONENT_AAL1,
|
||||
@@ -172,7 +174,7 @@ static const enum mtk_ddp_comp_id mt2712_mtk_ddp_third[] = {
|
||||
DDP_COMPONENT_PWM2,
|
||||
};
|
||||
|
||||
-static const enum mtk_ddp_comp_id mt8173_mtk_ddp_main[] = {
|
||||
+static enum mtk_ddp_comp_id mt8173_mtk_ddp_main[] = {
|
||||
DDP_COMPONENT_OVL0,
|
||||
DDP_COMPONENT_COLOR0,
|
||||
DDP_COMPONENT_AAL0,
|
||||
@@ -183,7 +185,7 @@ static const enum mtk_ddp_comp_id mt8173_mtk_ddp_main[] = {
|
||||
DDP_COMPONENT_PWM0,
|
||||
};
|
||||
|
||||
-static const enum mtk_ddp_comp_id mt8173_mtk_ddp_ext[] = {
|
||||
+static enum mtk_ddp_comp_id mt8173_mtk_ddp_ext[] = {
|
||||
DDP_COMPONENT_OVL1,
|
||||
DDP_COMPONENT_COLOR1,
|
||||
DDP_COMPONENT_GAMMA,
|
||||
@@ -472,6 +474,7 @@ static int mtk_drm_probe(struct platform_device *pdev)
|
||||
|
||||
/* Iterate over sibling DISP function blocks */
|
||||
for_each_child_of_node(dev->of_node->parent, node) {
|
||||
+ struct device_node *port, *ep, *remote;
|
||||
const struct of_device_id *of_id;
|
||||
enum mtk_ddp_comp_type comp_type;
|
||||
int comp_id;
|
||||
@@ -531,6 +534,32 @@ static int mtk_drm_probe(struct platform_device *pdev)
|
||||
|
||||
private->ddp_comp[comp_id] = comp;
|
||||
}
|
||||
+
|
||||
+ if (comp_type != MTK_DSI && comp_type != MTK_DPI) {
|
||||
+ port = of_graph_get_port_by_id(node, 0);
|
||||
+ if (!port)
|
||||
+ continue;
|
||||
+ ep = of_get_child_by_name(port, "endpoint");
|
||||
+ of_node_put(port);
|
||||
+ if (!ep)
|
||||
+ continue;
|
||||
+ remote = of_graph_get_remote_port_parent(ep);
|
||||
+ of_node_put(ep);
|
||||
+ if (!remote)
|
||||
+ continue;
|
||||
+ of_id = of_match_node(mtk_ddp_comp_dt_ids, remote);
|
||||
+ if (!of_id)
|
||||
+ continue;
|
||||
+ comp_type = (enum mtk_ddp_comp_type)of_id->data;
|
||||
+ for (i = 0; i < private->data->main_len - 1; i++)
|
||||
+ if (private->data->main_path[i] == comp_id)
|
||||
+ private->data->main_path[i + 1] =
|
||||
+ mtk_ddp_comp_get_id(node, comp_type);
|
||||
+ for (i = 0; i < private->data->ext_len - 1; i++)
|
||||
+ if (private->data->ext_path[i] == comp_id)
|
||||
+ private->data->ext_path[i + 1] =
|
||||
+ mtk_ddp_comp_get_id(node, comp_type);
|
||||
+ }
|
||||
}
|
||||
|
||||
if (!private->mutex_node) {
|
||||
diff --git a/drivers/gpu/drm/mediatek/mtk_drm_drv.h b/drivers/gpu/drm/mediatek/mtk_drm_drv.h
|
||||
index ecc00ca3221d..256a3ff2e66e 100644
|
||||
--- a/drivers/gpu/drm/mediatek/mtk_drm_drv.h
|
||||
+++ b/drivers/gpu/drm/mediatek/mtk_drm_drv.h
|
||||
@@ -29,9 +29,9 @@ struct drm_property;
|
||||
struct regmap;
|
||||
|
||||
struct mtk_mmsys_driver_data {
|
||||
- const enum mtk_ddp_comp_id *main_path;
|
||||
+ enum mtk_ddp_comp_id *main_path;
|
||||
unsigned int main_len;
|
||||
- const enum mtk_ddp_comp_id *ext_path;
|
||||
+ enum mtk_ddp_comp_id *ext_path;
|
||||
unsigned int ext_len;
|
||||
const enum mtk_ddp_comp_id *third_path;
|
||||
unsigned int third_len;
|
||||
--
|
||||
2.19.1
|
||||
|
||||
|
|
@ -0,0 +1,36 @@
|
|||
From 687aeb6d2f7e36d8fffc23b5d767110b79beda59 Mon Sep 17 00:00:00 2001
|
||||
From: Ryder Lee <ryder.lee@mediatek.com>
|
||||
Date: Wed, 5 Sep 2018 18:22:17 +0800
|
||||
Subject: [PATCH 39/77] arm: dts: mt7623: add a performance counter unit device
|
||||
node
|
||||
|
||||
Add ARM PMU device node to enable hardware perf events.
|
||||
|
||||
Signed-off-by: Ryder Lee <ryder.lee@mediatek.com>
|
||||
---
|
||||
arch/arm/boot/dts/mt7623.dtsi | 9 +++++++++
|
||||
1 file changed, 9 insertions(+)
|
||||
|
||||
diff --git a/arch/arm/boot/dts/mt7623.dtsi b/arch/arm/boot/dts/mt7623.dtsi
|
||||
index af6b6228f8a8..d009b50f917e 100644
|
||||
--- a/arch/arm/boot/dts/mt7623.dtsi
|
||||
+++ b/arch/arm/boot/dts/mt7623.dtsi
|
||||
@@ -121,6 +121,15 @@
|
||||
};
|
||||
};
|
||||
|
||||
+ pmu {
|
||||
+ compatible = "arm,cortex-a7-pmu";
|
||||
+ interrupts = <GIC_SPI 4 IRQ_TYPE_LEVEL_LOW>,
|
||||
+ <GIC_SPI 5 IRQ_TYPE_LEVEL_LOW>,
|
||||
+ <GIC_SPI 6 IRQ_TYPE_LEVEL_LOW>,
|
||||
+ <GIC_SPI 7 IRQ_TYPE_LEVEL_LOW>;
|
||||
+ interrupt-affinity = <&cpu0>, <&cpu1>, <&cpu2>, <&cpu3>;
|
||||
+ };
|
||||
+
|
||||
system_clk: dummy13m {
|
||||
compatible = "fixed-clock";
|
||||
clock-frequency = <13000000>;
|
||||
--
|
||||
2.19.1
|
||||
|
||||
|
|
@ -0,0 +1,76 @@
|
|||
From 63b2249cb5ccf8ff0625cd707f243b3e882bc366 Mon Sep 17 00:00:00 2001
|
||||
From: Ryder Lee <ryder.lee@mediatek.com>
|
||||
Date: Wed, 5 Sep 2018 18:22:18 +0800
|
||||
Subject: [PATCH 40/77] arm: dts: mt7623: update subsystem clock controller
|
||||
device nodes
|
||||
|
||||
Update MT7623 subsystem clock controllers, inlcuding mmsys, imgsys,
|
||||
vdecsys, g3dsys and bdpsys.
|
||||
|
||||
Signed-off-by: Ryder Lee <ryder.lee@mediatek.com>
|
||||
---
|
||||
arch/arm/boot/dts/mt7623.dtsi | 41 +++++++++++++++++++++++++++++++++++
|
||||
1 file changed, 41 insertions(+)
|
||||
|
||||
diff --git a/arch/arm/boot/dts/mt7623.dtsi b/arch/arm/boot/dts/mt7623.dtsi
|
||||
index d009b50f917e..35b0fa4112b0 100644
|
||||
--- a/arch/arm/boot/dts/mt7623.dtsi
|
||||
+++ b/arch/arm/boot/dts/mt7623.dtsi
|
||||
@@ -729,6 +729,39 @@
|
||||
clock-names = "wifi-dma";
|
||||
};
|
||||
|
||||
+ g3dsys: syscon@13000000 {
|
||||
+ compatible = "mediatek,mt7623-g3dsys",
|
||||
+ "mediatek,mt2701-g3dsys",
|
||||
+ "syscon";
|
||||
+ reg = <0 0x13000000 0 0x200>;
|
||||
+ #clock-cells = <1>;
|
||||
+ #reset-cells = <1>;
|
||||
+ };
|
||||
+
|
||||
+ mmsys: syscon@14000000 {
|
||||
+ compatible = "mediatek,mt7623-mmsys",
|
||||
+ "mediatek,mt2701-mmsys",
|
||||
+ "syscon";
|
||||
+ reg = <0 0x14000000 0 0x1000>;
|
||||
+ #clock-cells = <1>;
|
||||
+ };
|
||||
+
|
||||
+ imgsys: syscon@15000000 {
|
||||
+ compatible = "mediatek,mt7623-imgsys",
|
||||
+ "mediatek,mt2701-imgsys",
|
||||
+ "syscon";
|
||||
+ reg = <0 0x15000000 0 0x1000>;
|
||||
+ #clock-cells = <1>;
|
||||
+ };
|
||||
+
|
||||
+ vdecsys: syscon@16000000 {
|
||||
+ compatible = "mediatek,mt7623-vdecsys",
|
||||
+ "mediatek,mt2701-vdecsys",
|
||||
+ "syscon";
|
||||
+ reg = <0 0x16000000 0 0x1000>;
|
||||
+ #clock-cells = <1>;
|
||||
+ };
|
||||
+
|
||||
hifsys: syscon@1a000000 {
|
||||
compatible = "mediatek,mt7623-hifsys",
|
||||
"mediatek,mt2701-hifsys",
|
||||
@@ -983,6 +1016,14 @@
|
||||
power-domains = <&scpsys MT2701_POWER_DOMAIN_ETH>;
|
||||
status = "disabled";
|
||||
};
|
||||
+
|
||||
+ bdpsys: syscon@1c000000 {
|
||||
+ compatible = "mediatek,mt7623-bdpsys",
|
||||
+ "mediatek,mt2701-bdpsys",
|
||||
+ "syscon";
|
||||
+ reg = <0 0x1c000000 0 0x1000>;
|
||||
+ #clock-cells = <1>;
|
||||
+ };
|
||||
};
|
||||
|
||||
&pio {
|
||||
--
|
||||
2.19.1
|
||||
|
||||
|
|
@ -0,0 +1,120 @@
|
|||
From d6515baf44e1f6aa4809edf0d0ca314ce9e35a66 Mon Sep 17 00:00:00 2001
|
||||
From: Ryder Lee <ryder.lee@mediatek.com>
|
||||
Date: Wed, 5 Sep 2018 18:22:19 +0800
|
||||
Subject: [PATCH 41/77] arm: dts: mt7623: add iommu/smi device nodes
|
||||
|
||||
Add iommu/smi device nodes for MT7623.
|
||||
|
||||
Signed-off-by: Ryder Lee <ryder.lee@mediatek.com>
|
||||
---
|
||||
arch/arm/boot/dts/mt7623.dtsi | 59 +++++++++++++++++++++++++++++++++++
|
||||
1 file changed, 59 insertions(+)
|
||||
|
||||
diff --git a/arch/arm/boot/dts/mt7623.dtsi b/arch/arm/boot/dts/mt7623.dtsi
|
||||
index 35b0fa4112b0..7864c3804377 100644
|
||||
--- a/arch/arm/boot/dts/mt7623.dtsi
|
||||
+++ b/arch/arm/boot/dts/mt7623.dtsi
|
||||
@@ -13,6 +13,7 @@
|
||||
#include <dt-bindings/power/mt2701-power.h>
|
||||
#include <dt-bindings/gpio/gpio.h>
|
||||
#include <dt-bindings/phy/phy.h>
|
||||
+#include <dt-bindings/memory/mt2701-larb-port.h>
|
||||
#include <dt-bindings/reset/mt2701-resets.h>
|
||||
#include <dt-bindings/thermal/thermal.h>
|
||||
|
||||
@@ -288,6 +289,17 @@
|
||||
clock-names = "system-clk", "rtc-clk";
|
||||
};
|
||||
|
||||
+ smi_common: smi@1000c000 {
|
||||
+ compatible = "mediatek,mt7623-smi-common",
|
||||
+ "mediatek,mt2701-smi-common";
|
||||
+ reg = <0 0x1000c000 0 0x1000>;
|
||||
+ clocks = <&infracfg CLK_INFRA_SMI>,
|
||||
+ <&mmsys CLK_MM_SMI_COMMON>,
|
||||
+ <&infracfg CLK_INFRA_SMI>;
|
||||
+ clock-names = "apb", "smi", "async";
|
||||
+ power-domains = <&scpsys MT2701_POWER_DOMAIN_DISP>;
|
||||
+ };
|
||||
+
|
||||
pwrap: pwrap@1000d000 {
|
||||
compatible = "mediatek,mt7623-pwrap",
|
||||
"mediatek,mt2701-pwrap";
|
||||
@@ -319,6 +331,17 @@
|
||||
reg = <0 0x10200100 0 0x1c>;
|
||||
};
|
||||
|
||||
+ iommu: mmsys_iommu@10205000 {
|
||||
+ compatible = "mediatek,mt7623-m4u",
|
||||
+ "mediatek,mt2701-m4u";
|
||||
+ reg = <0 0x10205000 0 0x1000>;
|
||||
+ interrupts = <GIC_SPI 106 IRQ_TYPE_LEVEL_LOW>;
|
||||
+ clocks = <&infracfg CLK_INFRA_M4U>;
|
||||
+ clock-names = "bclk";
|
||||
+ mediatek,larbs = <&larb0 &larb1 &larb2>;
|
||||
+ #iommu-cells = <1>;
|
||||
+ };
|
||||
+
|
||||
efuse: efuse@10206000 {
|
||||
compatible = "mediatek,mt7623-efuse",
|
||||
"mediatek,mt8173-efuse";
|
||||
@@ -746,6 +769,18 @@
|
||||
#clock-cells = <1>;
|
||||
};
|
||||
|
||||
+ larb0: larb@14010000 {
|
||||
+ compatible = "mediatek,mt7623-smi-larb",
|
||||
+ "mediatek,mt2701-smi-larb";
|
||||
+ reg = <0 0x14010000 0 0x1000>;
|
||||
+ mediatek,smi = <&smi_common>;
|
||||
+ mediatek,larb-id = <0>;
|
||||
+ clocks = <&mmsys CLK_MM_SMI_LARB0>,
|
||||
+ <&mmsys CLK_MM_SMI_LARB0>;
|
||||
+ clock-names = "apb", "smi";
|
||||
+ power-domains = <&scpsys MT2701_POWER_DOMAIN_DISP>;
|
||||
+ };
|
||||
+
|
||||
imgsys: syscon@15000000 {
|
||||
compatible = "mediatek,mt7623-imgsys",
|
||||
"mediatek,mt2701-imgsys",
|
||||
@@ -754,6 +789,18 @@
|
||||
#clock-cells = <1>;
|
||||
};
|
||||
|
||||
+ larb2: larb@15001000 {
|
||||
+ compatible = "mediatek,mt7623-smi-larb",
|
||||
+ "mediatek,mt2701-smi-larb";
|
||||
+ reg = <0 0x15001000 0 0x1000>;
|
||||
+ mediatek,smi = <&smi_common>;
|
||||
+ mediatek,larb-id = <2>;
|
||||
+ clocks = <&imgsys CLK_IMG_SMI_COMM>,
|
||||
+ <&imgsys CLK_IMG_SMI_COMM>;
|
||||
+ clock-names = "apb", "smi";
|
||||
+ power-domains = <&scpsys MT2701_POWER_DOMAIN_ISP>;
|
||||
+ };
|
||||
+
|
||||
vdecsys: syscon@16000000 {
|
||||
compatible = "mediatek,mt7623-vdecsys",
|
||||
"mediatek,mt2701-vdecsys",
|
||||
@@ -762,6 +809,18 @@
|
||||
#clock-cells = <1>;
|
||||
};
|
||||
|
||||
+ larb1: larb@16010000 {
|
||||
+ compatible = "mediatek,mt7623-smi-larb",
|
||||
+ "mediatek,mt2701-smi-larb";
|
||||
+ reg = <0 0x16010000 0 0x1000>;
|
||||
+ mediatek,smi = <&smi_common>;
|
||||
+ mediatek,larb-id = <1>;
|
||||
+ clocks = <&vdecsys CLK_VDEC_CKGEN>,
|
||||
+ <&vdecsys CLK_VDEC_LARB>;
|
||||
+ clock-names = "apb", "smi";
|
||||
+ power-domains = <&scpsys MT2701_POWER_DOMAIN_VDEC>;
|
||||
+ };
|
||||
+
|
||||
hifsys: syscon@1a000000 {
|
||||
compatible = "mediatek,mt7623-hifsys",
|
||||
"mediatek,mt2701-hifsys",
|
||||
--
|
||||
2.19.1
|
||||
|
||||
|
|
@ -0,0 +1,41 @@
|
|||
From bd988dc66763555c2aa6509b060fa5b3ceb682a6 Mon Sep 17 00:00:00 2001
|
||||
From: Ryder Lee <ryder.lee@mediatek.com>
|
||||
Date: Wed, 5 Sep 2018 18:22:20 +0800
|
||||
Subject: [PATCH 42/77] arm: dts: mt7623: add jpeg decoder device node
|
||||
|
||||
Add a jpeg decoder device node for MT7623.
|
||||
|
||||
Signed-off-by: Ryder Lee <ryder.lee@mediatek.com>
|
||||
---
|
||||
arch/arm/boot/dts/mt7623.dtsi | 15 +++++++++++++++
|
||||
1 file changed, 15 insertions(+)
|
||||
|
||||
diff --git a/arch/arm/boot/dts/mt7623.dtsi b/arch/arm/boot/dts/mt7623.dtsi
|
||||
index 7864c3804377..ce9fb23eb5cb 100644
|
||||
--- a/arch/arm/boot/dts/mt7623.dtsi
|
||||
+++ b/arch/arm/boot/dts/mt7623.dtsi
|
||||
@@ -801,6 +801,21 @@
|
||||
power-domains = <&scpsys MT2701_POWER_DOMAIN_ISP>;
|
||||
};
|
||||
|
||||
+ jpegdec: jpegdec@15004000 {
|
||||
+ compatible = "mediatek,mt7623-jpgdec",
|
||||
+ "mediatek,mt2701-jpgdec";
|
||||
+ reg = <0 0x15004000 0 0x1000>;
|
||||
+ interrupts = <GIC_SPI 143 IRQ_TYPE_LEVEL_LOW>;
|
||||
+ clocks = <&imgsys CLK_IMG_JPGDEC_SMI>,
|
||||
+ <&imgsys CLK_IMG_JPGDEC>;
|
||||
+ clock-names = "jpgdec-smi",
|
||||
+ "jpgdec";
|
||||
+ power-domains = <&scpsys MT2701_POWER_DOMAIN_ISP>;
|
||||
+ mediatek,larb = <&larb2>;
|
||||
+ iommus = <&iommu MT2701_M4U_PORT_JPGDEC_WDMA>,
|
||||
+ <&iommu MT2701_M4U_PORT_JPGDEC_BSDMA>;
|
||||
+ };
|
||||
+
|
||||
vdecsys: syscon@16000000 {
|
||||
compatible = "mediatek,mt7623-vdecsys",
|
||||
"mediatek,mt2701-vdecsys",
|
||||
--
|
||||
2.19.1
|
||||
|
||||
|
|
@ -0,0 +1,493 @@
|
|||
From c7dbe108de2c9f47f952910f424d1fa9a3470a5b Mon Sep 17 00:00:00 2001
|
||||
From: Ryder Lee <ryder.lee@mediatek.com>
|
||||
Date: Wed, 5 Sep 2018 22:09:27 +0800
|
||||
Subject: [PATCH 43/77] arm: dts: mt7623: add display subsystem related device
|
||||
nodes
|
||||
|
||||
Add display subsystem related device nodes for MT7623.
|
||||
|
||||
Cc: CK Hu <ck.hu@mediatek.com>
|
||||
Signed-off-by: chunhui dai <chunhui.dai@mediatek.com>
|
||||
Signed-off-by: Bibby Hsieh <bibby.hsieh@mediatek.com>
|
||||
Signed-off-by: Ryder Lee <ryder.lee@mediatek.com>
|
||||
---
|
||||
arch/arm/boot/dts/mt7623.dtsi | 177 ++++++++++++++++++
|
||||
arch/arm/boot/dts/mt7623n-bananapi-bpi-r2.dts | 85 +++++++++
|
||||
arch/arm/boot/dts/mt7623n-rfb-emmc.dts | 85 +++++++++
|
||||
3 files changed, 347 insertions(+)
|
||||
|
||||
diff --git a/arch/arm/boot/dts/mt7623.dtsi b/arch/arm/boot/dts/mt7623.dtsi
|
||||
index ce9fb23eb5cb..619843514d74 100644
|
||||
--- a/arch/arm/boot/dts/mt7623.dtsi
|
||||
+++ b/arch/arm/boot/dts/mt7623.dtsi
|
||||
@@ -23,6 +23,11 @@
|
||||
#address-cells = <2>;
|
||||
#size-cells = <2>;
|
||||
|
||||
+ aliases {
|
||||
+ rdma0 = &rdma0;
|
||||
+ rdma1 = &rdma1;
|
||||
+ };
|
||||
+
|
||||
cpu_opp_table: opp-table {
|
||||
compatible = "operating-points-v2";
|
||||
opp-shared;
|
||||
@@ -313,6 +318,25 @@
|
||||
clock-names = "spi", "wrap";
|
||||
};
|
||||
|
||||
+ mipi_tx0: mipi-dphy@10010000 {
|
||||
+ compatible = "mediatek,mt7623-mipi-tx",
|
||||
+ "mediatek,mt2701-mipi-tx";
|
||||
+ reg = <0 0x10010000 0 0x90>;
|
||||
+ clocks = <&clk26m>;
|
||||
+ clock-output-names = "mipi_tx0_pll";
|
||||
+ #clock-cells = <0>;
|
||||
+ #phy-cells = <0>;
|
||||
+ };
|
||||
+
|
||||
+ cec: cec@10012000 {
|
||||
+ compatible = "mediatek,mt7623-cec",
|
||||
+ "mediatek,mt8173-cec";
|
||||
+ reg = <0 0x10012000 0 0xbc>;
|
||||
+ interrupts = <GIC_SPI 182 IRQ_TYPE_LEVEL_LOW>;
|
||||
+ clocks = <&infracfg CLK_INFRA_CEC>;
|
||||
+ status = "disabled";
|
||||
+ };
|
||||
+
|
||||
cir: cir@10013000 {
|
||||
compatible = "mediatek,mt7623-cir";
|
||||
reg = <0 0x10013000 0 0x1000>;
|
||||
@@ -361,6 +385,18 @@
|
||||
#clock-cells = <1>;
|
||||
};
|
||||
|
||||
+ hdmi_phy: phy@10209100 {
|
||||
+ compatible = "mediatek,mt7623-hdmi-phy",
|
||||
+ "mediatek,mt2701-hdmi-phy";
|
||||
+ reg = <0 0x10209100 0 0x24>;
|
||||
+ clocks = <&apmixedsys CLK_APMIXED_HDMI_REF>;
|
||||
+ clock-names = "pll_ref";
|
||||
+ clock-output-names = "hdmitx_dig_cts";
|
||||
+ #clock-cells = <0>;
|
||||
+ #phy-cells = <0>;
|
||||
+ status = "disabled";
|
||||
+ };
|
||||
+
|
||||
rng: rng@1020f000 {
|
||||
compatible = "mediatek,mt7623-rng";
|
||||
reg = <0 0x1020f000 0 0x1000>;
|
||||
@@ -573,6 +609,16 @@
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
+ hdmiddc0: i2c@11013000 {
|
||||
+ compatible = "mediatek,mt7623-hdmi-ddc",
|
||||
+ "mediatek,mt8173-hdmi-ddc";
|
||||
+ interrupts = <GIC_SPI 81 IRQ_TYPE_LEVEL_LOW>;
|
||||
+ reg = <0 0x11013000 0 0x1C>;
|
||||
+ clocks = <&pericfg CLK_PERI_I2C3>;
|
||||
+ clock-names = "ddc-i2c";
|
||||
+ status = "disabled";
|
||||
+ };
|
||||
+
|
||||
nor_flash: spi@11014000 {
|
||||
compatible = "mediatek,mt7623-nor",
|
||||
"mediatek,mt8173-nor";
|
||||
@@ -769,6 +815,84 @@
|
||||
#clock-cells = <1>;
|
||||
};
|
||||
|
||||
+ display_components: dispsys@14000000 {
|
||||
+ compatible = "mediatek,mt7623-mmsys",
|
||||
+ "mediatek,mt2701-mmsys";
|
||||
+ reg = <0 0x14000000 0 0x1000>;
|
||||
+ power-domains = <&scpsys MT2701_POWER_DOMAIN_DISP>;
|
||||
+ };
|
||||
+
|
||||
+ ovl@14007000 {
|
||||
+ compatible = "mediatek,mt7623-disp-ovl",
|
||||
+ "mediatek,mt2701-disp-ovl";
|
||||
+ reg = <0 0x14007000 0 0x1000>;
|
||||
+ interrupts = <GIC_SPI 153 IRQ_TYPE_LEVEL_LOW>;
|
||||
+ clocks = <&mmsys CLK_MM_DISP_OVL>;
|
||||
+ iommus = <&iommu MT2701_M4U_PORT_DISP_OVL_0>;
|
||||
+ mediatek,larb = <&larb0>;
|
||||
+ };
|
||||
+
|
||||
+ rdma0: rdma@14008000 {
|
||||
+ compatible = "mediatek,mt7623-disp-rdma",
|
||||
+ "mediatek,mt2701-disp-rdma";
|
||||
+ reg = <0 0x14008000 0 0x1000>;
|
||||
+ interrupts = <GIC_SPI 152 IRQ_TYPE_LEVEL_LOW>;
|
||||
+ clocks = <&mmsys CLK_MM_DISP_RDMA>;
|
||||
+ iommus = <&iommu MT2701_M4U_PORT_DISP_RDMA>;
|
||||
+ mediatek,larb = <&larb0>;
|
||||
+ };
|
||||
+
|
||||
+ wdma@14009000 {
|
||||
+ compatible = "mediatek,mt7623-disp-wdma",
|
||||
+ "mediatek,mt2701-disp-wdma";
|
||||
+ reg = <0 0x14009000 0 0x1000>;
|
||||
+ interrupts = <GIC_SPI 154 IRQ_TYPE_LEVEL_LOW>;
|
||||
+ clocks = <&mmsys CLK_MM_DISP_WDMA>;
|
||||
+ iommus = <&iommu MT2701_M4U_PORT_DISP_WDMA>;
|
||||
+ mediatek,larb = <&larb0>;
|
||||
+ };
|
||||
+
|
||||
+ bls: pwm@1400a000 {
|
||||
+ compatible = "mediatek,mt7623-disp-pwm",
|
||||
+ "mediatek,mt2701-disp-pwm";
|
||||
+ reg = <0 0x1400a000 0 0x1000>;
|
||||
+ #pwm-cells = <2>;
|
||||
+ clocks = <&mmsys CLK_MM_MDP_BLS_26M>,
|
||||
+ <&mmsys CLK_MM_DISP_BLS>;
|
||||
+ clock-names = "main", "mm";
|
||||
+ status = "disabled";
|
||||
+ };
|
||||
+
|
||||
+ color@1400b000 {
|
||||
+ compatible = "mediatek,mt7623-disp-color",
|
||||
+ "mediatek,mt2701-disp-color";
|
||||
+ reg = <0 0x1400b000 0 0x1000>;
|
||||
+ interrupts = <GIC_SPI 156 IRQ_TYPE_LEVEL_LOW>;
|
||||
+ clocks = <&mmsys CLK_MM_DISP_COLOR>;
|
||||
+ };
|
||||
+
|
||||
+ dsi: dsi@1400c000 {
|
||||
+ compatible = "mediatek,mt7623-dsi",
|
||||
+ "mediatek,mt2701-dsi";
|
||||
+ reg = <0 0x1400c000 0 0x1000>;
|
||||
+ interrupts = <GIC_SPI 157 IRQ_TYPE_LEVEL_LOW>;
|
||||
+ clocks = <&mmsys CLK_MM_DSI_ENGINE>,
|
||||
+ <&mmsys CLK_MM_DSI_DIG>,
|
||||
+ <&mipi_tx0>;
|
||||
+ clock-names = "engine", "digital", "hs";
|
||||
+ phys = <&mipi_tx0>;
|
||||
+ phy-names = "dphy";
|
||||
+ status = "disabled";
|
||||
+ };
|
||||
+
|
||||
+ mutex: mutex@1400e000 {
|
||||
+ compatible = "mediatek,mt7623-disp-mutex",
|
||||
+ "mediatek,mt2701-disp-mutex";
|
||||
+ reg = <0 0x1400e000 0 0x1000>;
|
||||
+ interrupts = <GIC_SPI 161 IRQ_TYPE_LEVEL_LOW>;
|
||||
+ clocks = <&mmsys CLK_MM_MUTEX_32K>;
|
||||
+ };
|
||||
+
|
||||
larb0: larb@14010000 {
|
||||
compatible = "mediatek,mt7623-smi-larb",
|
||||
"mediatek,mt2701-smi-larb";
|
||||
@@ -781,6 +905,44 @@
|
||||
power-domains = <&scpsys MT2701_POWER_DOMAIN_DISP>;
|
||||
};
|
||||
|
||||
+ rdma1: rdma@14012000 {
|
||||
+ compatible = "mediatek,mt7623-disp-rdma",
|
||||
+ "mediatek,mt2701-disp-rdma";
|
||||
+ reg = <0 0x14012000 0 0x1000>;
|
||||
+ interrupts = <GIC_SPI 164 IRQ_TYPE_LEVEL_LOW>;
|
||||
+ clocks = <&mmsys CLK_MM_DISP_RDMA1>;
|
||||
+ iommus = <&iommu MT2701_M4U_PORT_DISP_RDMA1>;
|
||||
+ mediatek,larb = <&larb0>;
|
||||
+ };
|
||||
+
|
||||
+ dpi0: dpi@14014000 {
|
||||
+ compatible = "mediatek,mt7623-dpi",
|
||||
+ "mediatek,mt2701-dpi";
|
||||
+ reg = <0 0x14014000 0 0x1000>;
|
||||
+ interrupts = <GIC_SPI 194 IRQ_TYPE_LEVEL_LOW>;
|
||||
+ clocks = <&mmsys CLK_MM_DPI1_DIGL>,
|
||||
+ <&mmsys CLK_MM_DPI1_ENGINE>,
|
||||
+ <&topckgen CLK_TOP_TVDPLL>;
|
||||
+ clock-names = "pixel", "engine", "pll";
|
||||
+ status = "disabled";
|
||||
+ };
|
||||
+
|
||||
+ hdmi0: hdmi@14015000 {
|
||||
+ compatible = "mediatek,mt7623-hdmi",
|
||||
+ "mediatek,mt8173-hdmi";
|
||||
+ reg = <0 0x14015000 0 0x400>;
|
||||
+ clocks = <&mmsys CLK_MM_HDMI_PIXEL>,
|
||||
+ <&mmsys CLK_MM_HDMI_PLL>,
|
||||
+ <&mmsys CLK_MM_HDMI_AUDIO>,
|
||||
+ <&mmsys CLK_MM_HDMI_SPDIF>;
|
||||
+ clock-names = "pixel", "pll", "bclk", "spdif";
|
||||
+ phys = <&hdmi_phy>;
|
||||
+ phy-names = "hdmi";
|
||||
+ mediatek,syscon-hdmi = <&mmsys 0x900>;
|
||||
+ cec = <&cec>;
|
||||
+ status = "disabled";
|
||||
+ };
|
||||
+
|
||||
imgsys: syscon@15000000 {
|
||||
compatible = "mediatek,mt7623-imgsys",
|
||||
"mediatek,mt2701-imgsys",
|
||||
@@ -1108,6 +1270,21 @@
|
||||
};
|
||||
};
|
||||
|
||||
+ hdmi_pins_a: hdmi-default {
|
||||
+ pins-hdmi {
|
||||
+ pinmux = <MT7623_PIN_123_HTPLG_FUNC_HTPLG>;
|
||||
+ input-enable;
|
||||
+ bias-pull-down;
|
||||
+ };
|
||||
+ };
|
||||
+
|
||||
+ hdmi_ddc_pins_a: hdmi_ddc-default {
|
||||
+ pins-hdmi-ddc {
|
||||
+ pinmux = <MT7623_PIN_124_GPIO124_FUNC_HDMISCK>,
|
||||
+ <MT7623_PIN_125_GPIO125_FUNC_HDMISD>;
|
||||
+ };
|
||||
+ };
|
||||
+
|
||||
i2c0_pins_a: i2c0-default {
|
||||
pins-i2c0 {
|
||||
pinmux = <MT7623_PIN_75_SDA0_FUNC_SDA0>,
|
||||
diff --git a/arch/arm/boot/dts/mt7623n-bananapi-bpi-r2.dts b/arch/arm/boot/dts/mt7623n-bananapi-bpi-r2.dts
|
||||
index 4c6e53d9e736..d97edde586ad 100644
|
||||
--- a/arch/arm/boot/dts/mt7623n-bananapi-bpi-r2.dts
|
||||
+++ b/arch/arm/boot/dts/mt7623n-bananapi-bpi-r2.dts
|
||||
@@ -22,6 +22,19 @@
|
||||
stdout-path = "serial2:115200n8";
|
||||
};
|
||||
|
||||
+ connector {
|
||||
+ compatible = "hdmi-connector";
|
||||
+ label = "hdmi";
|
||||
+ type = "d";
|
||||
+ ddc-i2c-bus = <&hdmiddc0>;
|
||||
+
|
||||
+ port {
|
||||
+ hdmi_connector_in: endpoint {
|
||||
+ remote-endpoint = <&hdmi0_out>;
|
||||
+ };
|
||||
+ };
|
||||
+ };
|
||||
+
|
||||
cpus {
|
||||
cpu@0 {
|
||||
proc-supply = <&mt6323_vproc_reg>;
|
||||
@@ -127,10 +140,24 @@
|
||||
};
|
||||
};
|
||||
|
||||
+&bls {
|
||||
+ status = "okay";
|
||||
+
|
||||
+ port {
|
||||
+ bls_out: endpoint {
|
||||
+ remote-endpoint = <&dpi0_in>;
|
||||
+ };
|
||||
+ };
|
||||
+};
|
||||
+
|
||||
&btif {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
+&cec {
|
||||
+ status = "okay";
|
||||
+};
|
||||
+
|
||||
&cir {
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&cir_pins_a>;
|
||||
@@ -141,6 +168,28 @@
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
+&dpi0 {
|
||||
+ status = "okay";
|
||||
+
|
||||
+ ports {
|
||||
+ #address-cells = <1>;
|
||||
+ #size-cells = <0>;
|
||||
+ port@0 {
|
||||
+ reg = <0>;
|
||||
+ dpi0_out: endpoint {
|
||||
+ remote-endpoint = <&hdmi0_in>;
|
||||
+ };
|
||||
+ };
|
||||
+
|
||||
+ port@1 {
|
||||
+ reg = <1>;
|
||||
+ dpi0_in: endpoint {
|
||||
+ remote-endpoint = <&bls_out>;
|
||||
+ };
|
||||
+ };
|
||||
+ };
|
||||
+};
|
||||
+
|
||||
ð {
|
||||
status = "okay";
|
||||
|
||||
@@ -240,6 +289,42 @@
|
||||
};
|
||||
};
|
||||
|
||||
+&hdmi0 {
|
||||
+ pinctrl-names = "default";
|
||||
+ pinctrl-0 = <&hdmi_pins_a>;
|
||||
+ status = "okay";
|
||||
+
|
||||
+ ports {
|
||||
+ #address-cells = <1>;
|
||||
+ #size-cells = <0>;
|
||||
+ port@0 {
|
||||
+ reg = <0>;
|
||||
+ hdmi0_in: endpoint {
|
||||
+ remote-endpoint = <&dpi0_out>;
|
||||
+ };
|
||||
+ };
|
||||
+
|
||||
+ port@1 {
|
||||
+ reg = <1>;
|
||||
+ hdmi0_out: endpoint {
|
||||
+ remote-endpoint = <&hdmi_connector_in>;
|
||||
+ };
|
||||
+ };
|
||||
+ };
|
||||
+};
|
||||
+
|
||||
+&hdmiddc0 {
|
||||
+ pinctrl-names = "default";
|
||||
+ pinctrl-0 = <&hdmi_ddc_pins_a>;
|
||||
+ status = "okay";
|
||||
+};
|
||||
+
|
||||
+&hdmi_phy {
|
||||
+ mediatek,ibias = <0xa>;
|
||||
+ mediatek,ibias_up = <0x1c>;
|
||||
+ status = "okay";
|
||||
+};
|
||||
+
|
||||
&i2c0 {
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&i2c0_pins_a>;
|
||||
diff --git a/arch/arm/boot/dts/mt7623n-rfb-emmc.dts b/arch/arm/boot/dts/mt7623n-rfb-emmc.dts
|
||||
index b7606130ade9..3e5911d8d6bc 100644
|
||||
--- a/arch/arm/boot/dts/mt7623n-rfb-emmc.dts
|
||||
+++ b/arch/arm/boot/dts/mt7623n-rfb-emmc.dts
|
||||
@@ -24,6 +24,19 @@
|
||||
stdout-path = "serial2:115200n8";
|
||||
};
|
||||
|
||||
+ connector {
|
||||
+ compatible = "hdmi-connector";
|
||||
+ label = "hdmi";
|
||||
+ type = "d";
|
||||
+ ddc-i2c-bus = <&hdmiddc0>;
|
||||
+
|
||||
+ port {
|
||||
+ hdmi_connector_in: endpoint {
|
||||
+ remote-endpoint = <&hdmi0_out>;
|
||||
+ };
|
||||
+ };
|
||||
+ };
|
||||
+
|
||||
cpus {
|
||||
cpu@0 {
|
||||
proc-supply = <&mt6323_vproc_reg>;
|
||||
@@ -106,10 +119,24 @@
|
||||
};
|
||||
};
|
||||
|
||||
+&bls {
|
||||
+ status = "okay";
|
||||
+
|
||||
+ port {
|
||||
+ bls_out: endpoint {
|
||||
+ remote-endpoint = <&dpi0_in>;
|
||||
+ };
|
||||
+ };
|
||||
+};
|
||||
+
|
||||
&btif {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
+&cec {
|
||||
+ status = "okay";
|
||||
+};
|
||||
+
|
||||
&cir {
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&cir_pins_a>;
|
||||
@@ -120,6 +147,28 @@
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
+&dpi0 {
|
||||
+ status = "okay";
|
||||
+
|
||||
+ ports {
|
||||
+ #address-cells = <1>;
|
||||
+ #size-cells = <0>;
|
||||
+ port@0 {
|
||||
+ reg = <0>;
|
||||
+ dpi0_out: endpoint {
|
||||
+ remote-endpoint = <&hdmi0_in>;
|
||||
+ };
|
||||
+ };
|
||||
+
|
||||
+ port@1 {
|
||||
+ reg = <1>;
|
||||
+ dpi0_in: endpoint {
|
||||
+ remote-endpoint = <&bls_out>;
|
||||
+ };
|
||||
+ };
|
||||
+ };
|
||||
+};
|
||||
+
|
||||
ð {
|
||||
status = "okay";
|
||||
|
||||
@@ -202,6 +251,42 @@
|
||||
};
|
||||
};
|
||||
|
||||
+&hdmi0 {
|
||||
+ pinctrl-names = "default";
|
||||
+ pinctrl-0 = <&hdmi_pins_a>;
|
||||
+ status = "okay";
|
||||
+
|
||||
+ ports {
|
||||
+ #address-cells = <1>;
|
||||
+ #size-cells = <0>;
|
||||
+ port@0 {
|
||||
+ reg = <0>;
|
||||
+ hdmi0_in: endpoint {
|
||||
+ remote-endpoint = <&dpi0_out>;
|
||||
+ };
|
||||
+ };
|
||||
+
|
||||
+ port@1 {
|
||||
+ reg = <1>;
|
||||
+ hdmi0_out: endpoint {
|
||||
+ remote-endpoint = <&hdmi_connector_in>;
|
||||
+ };
|
||||
+ };
|
||||
+ };
|
||||
+};
|
||||
+
|
||||
+&hdmiddc0 {
|
||||
+ pinctrl-names = "default";
|
||||
+ pinctrl-0 = <&hdmi_ddc_pins_a>;
|
||||
+ status = "okay";
|
||||
+};
|
||||
+
|
||||
+&hdmi_phy {
|
||||
+ mediatek,ibias = <0xa>;
|
||||
+ mediatek,ibias_up = <0x1c>;
|
||||
+ status = "okay";
|
||||
+};
|
||||
+
|
||||
&i2c0 {
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&i2c0_pins_a>;
|
||||
--
|
||||
2.19.1
|
||||
|
||||
|
|
@ -0,0 +1,72 @@
|
|||
From fa095b2751309a70d42d9d2f2f0881731b090d18 Mon Sep 17 00:00:00 2001
|
||||
From: chunhui dai <chunhui.dai@mediatek.com>
|
||||
Date: Wed, 31 Oct 2018 16:59:34 +0800
|
||||
Subject: [PATCH 44/77] fix boot up for 720 and 480 but 1080
|
||||
|
||||
1080 plg in/out with ng/ok
|
||||
|
||||
[ALPSxxxxxxxx]
|
||||
|
||||
[Detail]
|
||||
|
||||
[Solution]
|
||||
|
||||
Change-Id: Icd395eaf635a6cfe03f8f0508ed97ab40cbf6632
|
||||
CR-Id:
|
||||
Feature:
|
||||
---
|
||||
drivers/gpu/drm/mediatek/mtk_hdmi_phy.c | 3 +++
|
||||
drivers/gpu/drm/mediatek/mtk_hdmi_phy.h | 1 +
|
||||
drivers/gpu/drm/mediatek/mtk_mt2701_hdmi_phy.c | 3 ++-
|
||||
3 files changed, 6 insertions(+), 1 deletion(-)
|
||||
|
||||
diff --git a/drivers/gpu/drm/mediatek/mtk_hdmi_phy.c b/drivers/gpu/drm/mediatek/mtk_hdmi_phy.c
|
||||
index 4ef9c57ffd44..40e08df57f48 100644
|
||||
--- a/drivers/gpu/drm/mediatek/mtk_hdmi_phy.c
|
||||
+++ b/drivers/gpu/drm/mediatek/mtk_hdmi_phy.c
|
||||
@@ -209,6 +209,9 @@ static int mtk_hdmi_phy_probe(struct platform_device *pdev)
|
||||
return PTR_ERR(phy_provider);
|
||||
}
|
||||
|
||||
+ if (hdmi_phy->conf->pll_default_off)
|
||||
+ hdmi_phy->conf->hdmi_phy_disable_tmds(hdmi_phy);
|
||||
+
|
||||
return of_clk_add_provider(dev->of_node, of_clk_src_simple_get,
|
||||
hdmi_phy->pll);
|
||||
}
|
||||
diff --git a/drivers/gpu/drm/mediatek/mtk_hdmi_phy.h b/drivers/gpu/drm/mediatek/mtk_hdmi_phy.h
|
||||
index f39b1fc66612..a173a27d7a40 100644
|
||||
--- a/drivers/gpu/drm/mediatek/mtk_hdmi_phy.h
|
||||
+++ b/drivers/gpu/drm/mediatek/mtk_hdmi_phy.h
|
||||
@@ -21,6 +21,7 @@ struct mtk_hdmi_phy;
|
||||
|
||||
struct mtk_hdmi_phy_conf {
|
||||
bool tz_disabled;
|
||||
+ bool pll_default_off;
|
||||
const struct clk_ops *hdmi_phy_clk_ops;
|
||||
void (*hdmi_phy_enable_tmds)(struct mtk_hdmi_phy *hdmi_phy);
|
||||
void (*hdmi_phy_disable_tmds)(struct mtk_hdmi_phy *hdmi_phy);
|
||||
diff --git a/drivers/gpu/drm/mediatek/mtk_mt2701_hdmi_phy.c b/drivers/gpu/drm/mediatek/mtk_mt2701_hdmi_phy.c
|
||||
index fcc42dc6ea7f..534bcbc9f3b7 100644
|
||||
--- a/drivers/gpu/drm/mediatek/mtk_mt2701_hdmi_phy.c
|
||||
+++ b/drivers/gpu/drm/mediatek/mtk_mt2701_hdmi_phy.c
|
||||
@@ -116,7 +116,7 @@ static int mtk_hdmi_pll_set_rate(struct clk_hw *hw, unsigned long rate,
|
||||
|
||||
if (rate <= 64000000)
|
||||
pos_div = 3;
|
||||
- else if (rate <= 12800000)
|
||||
+ else if (rate <= 128000000)
|
||||
pos_div = 1;
|
||||
else
|
||||
pos_div = 1;
|
||||
@@ -202,6 +202,7 @@ static void mtk_hdmi_phy_disable_tmds(struct mtk_hdmi_phy *hdmi_phy)
|
||||
|
||||
struct mtk_hdmi_phy_conf mtk_hdmi_phy_2701_conf = {
|
||||
.tz_disabled = true,
|
||||
+ .pll_default_off = true,
|
||||
.hdmi_phy_clk_ops = &mtk_hdmi_phy_pll_ops,
|
||||
.hdmi_phy_enable_tmds = mtk_hdmi_phy_enable_tmds,
|
||||
.hdmi_phy_disable_tmds = mtk_hdmi_phy_disable_tmds,
|
||||
--
|
||||
2.19.1
|
||||
|
||||
|
|
@ -0,0 +1,103 @@
|
|||
From 4501501b8f55b277f219eaf7e863d91ddb1d8af7 Mon Sep 17 00:00:00 2001
|
||||
From: chunhui dai <chunhui.dai@mediatek.com>
|
||||
Date: Wed, 31 Oct 2018 17:59:50 +0800
|
||||
Subject: [PATCH 45/77] using different round rate for mt7623
|
||||
|
||||
Change-Id: Ifac315b09d691fe2c056212dd59ae50212417d58
|
||||
CR-Id:
|
||||
Feature:
|
||||
---
|
||||
drivers/gpu/drm/mediatek/mtk_hdmi_phy.c | 14 --------------
|
||||
drivers/gpu/drm/mediatek/mtk_hdmi_phy.h | 2 --
|
||||
drivers/gpu/drm/mediatek/mtk_mt2701_hdmi_phy.c | 11 +++++++++++
|
||||
drivers/gpu/drm/mediatek/mtk_mt8173_hdmi_phy.c | 14 ++++++++++++++
|
||||
4 files changed, 25 insertions(+), 16 deletions(-)
|
||||
|
||||
diff --git a/drivers/gpu/drm/mediatek/mtk_hdmi_phy.c b/drivers/gpu/drm/mediatek/mtk_hdmi_phy.c
|
||||
index 40e08df57f48..f014d65fa5ad 100644
|
||||
--- a/drivers/gpu/drm/mediatek/mtk_hdmi_phy.c
|
||||
+++ b/drivers/gpu/drm/mediatek/mtk_hdmi_phy.c
|
||||
@@ -15,20 +15,6 @@ static const struct phy_ops mtk_hdmi_phy_dev_ops = {
|
||||
.owner = THIS_MODULE,
|
||||
};
|
||||
|
||||
-long mtk_hdmi_pll_round_rate(struct clk_hw *hw, unsigned long rate,
|
||||
- unsigned long *parent_rate)
|
||||
-{
|
||||
- struct mtk_hdmi_phy *hdmi_phy = to_mtk_hdmi_phy(hw);
|
||||
-
|
||||
- hdmi_phy->pll_rate = rate;
|
||||
- if (rate <= 74250000)
|
||||
- *parent_rate = rate;
|
||||
- else
|
||||
- *parent_rate = rate / 2;
|
||||
-
|
||||
- return rate;
|
||||
-}
|
||||
-
|
||||
unsigned long mtk_hdmi_pll_recalc_rate(struct clk_hw *hw,
|
||||
unsigned long parent_rate)
|
||||
{
|
||||
diff --git a/drivers/gpu/drm/mediatek/mtk_hdmi_phy.h b/drivers/gpu/drm/mediatek/mtk_hdmi_phy.h
|
||||
index a173a27d7a40..76e352d088d0 100644
|
||||
--- a/drivers/gpu/drm/mediatek/mtk_hdmi_phy.h
|
||||
+++ b/drivers/gpu/drm/mediatek/mtk_hdmi_phy.h
|
||||
@@ -49,8 +49,6 @@ void mtk_hdmi_phy_set_bits(struct mtk_hdmi_phy *hdmi_phy, u32 offset,
|
||||
void mtk_hdmi_phy_mask(struct mtk_hdmi_phy *hdmi_phy, u32 offset,
|
||||
u32 val, u32 mask);
|
||||
struct mtk_hdmi_phy *to_mtk_hdmi_phy(struct clk_hw *hw);
|
||||
-long mtk_hdmi_pll_round_rate(struct clk_hw *hw, unsigned long rate,
|
||||
- unsigned long *parent_rate);
|
||||
unsigned long mtk_hdmi_pll_recalc_rate(struct clk_hw *hw,
|
||||
unsigned long parent_rate);
|
||||
|
||||
diff --git a/drivers/gpu/drm/mediatek/mtk_mt2701_hdmi_phy.c b/drivers/gpu/drm/mediatek/mtk_mt2701_hdmi_phy.c
|
||||
index 534bcbc9f3b7..2f87d0320882 100644
|
||||
--- a/drivers/gpu/drm/mediatek/mtk_mt2701_hdmi_phy.c
|
||||
+++ b/drivers/gpu/drm/mediatek/mtk_mt2701_hdmi_phy.c
|
||||
@@ -154,6 +154,17 @@ static int mtk_hdmi_pll_set_rate(struct clk_hw *hw, unsigned long rate,
|
||||
return 0;
|
||||
}
|
||||
|
||||
+static long mtk_hdmi_pll_round_rate(struct clk_hw *hw, unsigned long rate,
|
||||
+ unsigned long *parent_rate)
|
||||
+{
|
||||
+ struct mtk_hdmi_phy *hdmi_phy = to_mtk_hdmi_phy(hw);
|
||||
+
|
||||
+ hdmi_phy->pll_rate = rate;
|
||||
+ *parent_rate = rate;
|
||||
+
|
||||
+ return rate;
|
||||
+}
|
||||
+
|
||||
static const struct clk_ops mtk_hdmi_phy_pll_ops = {
|
||||
.prepare = mtk_hdmi_pll_prepare,
|
||||
.unprepare = mtk_hdmi_pll_unprepare,
|
||||
diff --git a/drivers/gpu/drm/mediatek/mtk_mt8173_hdmi_phy.c b/drivers/gpu/drm/mediatek/mtk_mt8173_hdmi_phy.c
|
||||
index ed5916b27658..d8cb252c6781 100644
|
||||
--- a/drivers/gpu/drm/mediatek/mtk_mt8173_hdmi_phy.c
|
||||
+++ b/drivers/gpu/drm/mediatek/mtk_mt8173_hdmi_phy.c
|
||||
@@ -285,6 +285,20 @@ static int mtk_hdmi_pll_set_rate(struct clk_hw *hw, unsigned long rate,
|
||||
return 0;
|
||||
}
|
||||
|
||||
+static long mtk_hdmi_pll_round_rate(struct clk_hw *hw, unsigned long rate,
|
||||
+ unsigned long *parent_rate)
|
||||
+{
|
||||
+ struct mtk_hdmi_phy *hdmi_phy = to_mtk_hdmi_phy(hw);
|
||||
+
|
||||
+ hdmi_phy->pll_rate = rate;
|
||||
+ if (rate <= 74250000)
|
||||
+ *parent_rate = rate;
|
||||
+ else
|
||||
+ *parent_rate = rate / 2;
|
||||
+
|
||||
+ return rate;
|
||||
+}
|
||||
+
|
||||
static const struct clk_ops mtk_hdmi_phy_pll_ops = {
|
||||
.prepare = mtk_hdmi_pll_prepare,
|
||||
.unprepare = mtk_hdmi_pll_unprepare,
|
||||
--
|
||||
2.19.1
|
||||
|
||||
26
root/target/linux/mediatek/patches-4.19/0046-hdmi-fix-possible_crtcs.patch
Executable file
26
root/target/linux/mediatek/patches-4.19/0046-hdmi-fix-possible_crtcs.patch
Executable file
|
|
@ -0,0 +1,26 @@
|
|||
From 1c978fae6f6112b46d4815c0054fbeab0274a363 Mon Sep 17 00:00:00 2001
|
||||
From: Ryder Lee <ryder.lee@mediatek.com>
|
||||
Date: Fri, 16 Nov 2018 16:33:00 +0100
|
||||
Subject: [PATCH 46/77] [hdmi] fix possible_crtcs
|
||||
|
||||
source: http://forum.banana-pi.org/t/kernel-4-19-rc1-for-testers/6618/52
|
||||
---
|
||||
drivers/gpu/drm/mediatek/mtk_dpi.c | 2 +-
|
||||
1 file changed, 1 insertion(+), 1 deletion(-)
|
||||
|
||||
diff --git a/drivers/gpu/drm/mediatek/mtk_dpi.c b/drivers/gpu/drm/mediatek/mtk_dpi.c
|
||||
index 62a9d47df948..a066b0755119 100644
|
||||
--- a/drivers/gpu/drm/mediatek/mtk_dpi.c
|
||||
+++ b/drivers/gpu/drm/mediatek/mtk_dpi.c
|
||||
@@ -610,7 +610,7 @@ static int mtk_dpi_bind(struct device *dev, struct device *master, void *data)
|
||||
drm_encoder_helper_add(&dpi->encoder, &mtk_dpi_encoder_helper_funcs);
|
||||
|
||||
/* Currently DPI0 is fixed to be driven by OVL1 */
|
||||
- dpi->encoder.possible_crtcs = BIT(1);
|
||||
+ dpi->encoder.possible_crtcs = BIT(0)|BIT(1);
|
||||
|
||||
ret = drm_bridge_attach(&dpi->encoder, dpi->bridge, NULL);
|
||||
if (ret) {
|
||||
--
|
||||
2.19.1
|
||||
|
||||
|
|
@ -0,0 +1,31 @@
|
|||
From 88aa4bffe7e5b38e8596e5f09e7b40e8bc112a24 Mon Sep 17 00:00:00 2001
|
||||
From: Frank Wunderlich <frank-w@public-files.de>
|
||||
Date: Fri, 16 Nov 2018 16:40:16 +0100
|
||||
Subject: [PATCH 47/77] [hdmi] added options to defconfig
|
||||
|
||||
---
|
||||
arch/arm/configs/mt7623n_evb_fwu_defconfig | 11 +++++++++++
|
||||
1 file changed, 11 insertions(+)
|
||||
|
||||
diff --git a/arch/arm/configs/mt7623n_evb_fwu_defconfig b/arch/arm/configs/mt7623n_evb_fwu_defconfig
|
||||
index f5e7a0edda0e..5932b552f2ea 100644
|
||||
--- a/arch/arm/configs/mt7623n_evb_fwu_defconfig
|
||||
+++ b/arch/arm/configs/mt7623n_evb_fwu_defconfig
|
||||
@@ -652,3 +652,14 @@ CONFIG_POWER_RESET_MT6397_RTC=y
|
||||
|
||||
#CONFIG_NET_MEDIATEK_HW_QOS=m
|
||||
|
||||
+#Graphic
|
||||
+CONFIG_DRM=y
|
||||
+CONFIG_DRM_MEDIATEK=y
|
||||
+CONFIG_DRM_MEDIATEK_HDMI=y
|
||||
+CONFIG_DRM_ARM=y
|
||||
+CONFIG_DRM_MALI_DISPLAY=y
|
||||
+CONFIG_COMMON_CLK_MT2701_MMSYS=y
|
||||
+CONFIG_COMMON_CLK_MT2701_IMGSYS=y
|
||||
+CONFIG_COMMON_CLK_MT2701_VDECSYS=y
|
||||
+#CONFIG_FRAMEBUFFER_CONSOLE=y
|
||||
+#CONFIG_DRM_FBDEV_EMULATION=y
|
||||
--
|
||||
2.19.1
|
||||
|
||||
24
root/target/linux/mediatek/patches-4.19/0049-hdmi-added-fbdev-options.patch
Executable file
24
root/target/linux/mediatek/patches-4.19/0049-hdmi-added-fbdev-options.patch
Executable file
|
|
@ -0,0 +1,24 @@
|
|||
From 7d0222b1fd42f22f0590b71c0e42660974c492d2 Mon Sep 17 00:00:00 2001
|
||||
From: Frank Wunderlich <frank-w@public-files.de>
|
||||
Date: Fri, 16 Nov 2018 17:27:50 +0100
|
||||
Subject: [PATCH 49/77] [hdmi] added fbdev-options
|
||||
|
||||
---
|
||||
arch/arm/configs/mt7623n_evb_fwu_defconfig | 4 ++--
|
||||
1 file changed, 2 insertions(+), 2 deletions(-)
|
||||
|
||||
diff --git a/arch/arm/configs/mt7623n_evb_fwu_defconfig b/arch/arm/configs/mt7623n_evb_fwu_defconfig
|
||||
index 5932b552f2ea..668a6c45177d 100644
|
||||
--- a/arch/arm/configs/mt7623n_evb_fwu_defconfig
|
||||
+++ b/arch/arm/configs/mt7623n_evb_fwu_defconfig
|
||||
@@ -661,5 +661,5 @@ CONFIG_DRM_MALI_DISPLAY=y
|
||||
CONFIG_COMMON_CLK_MT2701_MMSYS=y
|
||||
CONFIG_COMMON_CLK_MT2701_IMGSYS=y
|
||||
CONFIG_COMMON_CLK_MT2701_VDECSYS=y
|
||||
-#CONFIG_FRAMEBUFFER_CONSOLE=y
|
||||
-#CONFIG_DRM_FBDEV_EMULATION=y
|
||||
+CONFIG_FRAMEBUFFER_CONSOLE=y
|
||||
+CONFIG_DRM_FBDEV_EMULATION=y
|
||||
--
|
||||
2.19.1
|
||||
|
||||
69
root/target/linux/mediatek/patches-4.19/0050-BT-fix-Bluetooth.patch
Executable file
69
root/target/linux/mediatek/patches-4.19/0050-BT-fix-Bluetooth.patch
Executable file
|
|
@ -0,0 +1,69 @@
|
|||
From c0603006d7f020bbcb42bed36127fbfe94b1b512 Mon Sep 17 00:00:00 2001
|
||||
From: Oleksii Shevchuk <alxchk@gmail.com>
|
||||
Date: Fri, 11 Jan 2019 18:34:01 +0100
|
||||
Subject: [PATCH 50/77] [BT] fix Bluetooth
|
||||
MIME-Version: 1.0
|
||||
Content-Type: text/plain; charset=UTF-8
|
||||
Content-Transfer-Encoding: 8bit
|
||||
|
||||
- first call wifi.sh or at least call
|
||||
wmt_loader + stp-uart-launcher
|
||||
- then load BT-module “modprobe stp_chrdev_bt”
|
||||
---
|
||||
arch/arm/configs/mt7623n_evb_fwu_defconfig | 4 ++--
|
||||
.../common/common_detect/drv_init/bluetooth_drv_init.c | 3 ++-
|
||||
.../connectivity/common/conn_soc/linux/pub/stp_chrdev_bt.c | 3 ++-
|
||||
3 files changed, 6 insertions(+), 4 deletions(-)
|
||||
|
||||
diff --git a/arch/arm/configs/mt7623n_evb_fwu_defconfig b/arch/arm/configs/mt7623n_evb_fwu_defconfig
|
||||
index 668a6c45177d..343800fc24d6 100644
|
||||
--- a/arch/arm/configs/mt7623n_evb_fwu_defconfig
|
||||
+++ b/arch/arm/configs/mt7623n_evb_fwu_defconfig
|
||||
@@ -390,8 +390,8 @@ CONFIG_NL80211_TESTMODE=y
|
||||
|
||||
#internal Bluetooth (also not working yet)
|
||||
CONFIG_BT=y
|
||||
-#CONFIG_MTK_COMBO_BT=y
|
||||
-#CONFIG_MTK_COMBO_BT_HCI=y
|
||||
+CONFIG_MTK_COMBO_BT=m
|
||||
+CONFIG_MTK_COMBO_BT_HCI=y
|
||||
#needed for BT?
|
||||
#Bluetooth Classic (BR/EDR) features
|
||||
CONFIG_BT_BREDR=y
|
||||
diff --git a/drivers/misc/mediatek/connectivity/common/common_detect/drv_init/bluetooth_drv_init.c b/drivers/misc/mediatek/connectivity/common/common_detect/drv_init/bluetooth_drv_init.c
|
||||
index 47b055433443..82b799f256b4 100644
|
||||
--- a/drivers/misc/mediatek/connectivity/common/common_detect/drv_init/bluetooth_drv_init.c
|
||||
+++ b/drivers/misc/mediatek/connectivity/common/common_detect/drv_init/bluetooth_drv_init.c
|
||||
@@ -23,13 +23,14 @@
|
||||
int do_bluetooth_drv_init(int chip_id)
|
||||
{
|
||||
int i_ret = -1;
|
||||
-
|
||||
+#if 0
|
||||
#if defined(CONFIG_MTK_COMBO_BT) || defined(CONFIG_MTK_COMBO_BT_HCI)
|
||||
WMT_DETECT_INFO_FUNC("start to do bluetooth driver init\n");
|
||||
i_ret = mtk_wcn_stpbt_drv_init();
|
||||
WMT_DETECT_INFO_FUNC("finish bluetooth driver init, i_ret:%d\n", i_ret);
|
||||
#else
|
||||
WMT_DETECT_INFO_FUNC("CONFIG_MTK_COMBO_BT is not defined\n");
|
||||
+#endif
|
||||
#endif
|
||||
return i_ret;
|
||||
}
|
||||
diff --git a/drivers/misc/mediatek/connectivity/common/conn_soc/linux/pub/stp_chrdev_bt.c b/drivers/misc/mediatek/connectivity/common/conn_soc/linux/pub/stp_chrdev_bt.c
|
||||
index 190fa3944d80..5a85f68b092f 100644
|
||||
--- a/drivers/misc/mediatek/connectivity/common/conn_soc/linux/pub/stp_chrdev_bt.c
|
||||
+++ b/drivers/misc/mediatek/connectivity/common/conn_soc/linux/pub/stp_chrdev_bt.c
|
||||
@@ -877,7 +877,8 @@ static void BT_exit(void)
|
||||
BT_INFO_FUNC("%s driver removed\n", BT_DRIVER_NAME);
|
||||
}
|
||||
|
||||
-#ifdef MTK_WCN_REMOVE_KERNEL_MODULE
|
||||
+#if 0
|
||||
+//#ifdef MTK_WCN_REMOVE_KERNEL_MODULE
|
||||
|
||||
int mtk_wcn_stpbt_drv_init(void)
|
||||
{
|
||||
--
|
||||
2.19.1
|
||||
|
||||
|
|
@ -0,0 +1,34 @@
|
|||
From 32d96a7e0127ae64f4c091e8c14f2961619f4fa2 Mon Sep 17 00:00:00 2001
|
||||
From: Frank Wunderlich <frank-w@public-files.de>
|
||||
Date: Sun, 20 Jan 2019 13:23:22 +0100
|
||||
Subject: [PATCH 53/77] [defconfig] disable some debug-messages (evbug,gpio)
|
||||
|
||||
---
|
||||
arch/arm/configs/mt7623n_evb_fwu_defconfig | 4 ++--
|
||||
1 file changed, 2 insertions(+), 2 deletions(-)
|
||||
|
||||
diff --git a/arch/arm/configs/mt7623n_evb_fwu_defconfig b/arch/arm/configs/mt7623n_evb_fwu_defconfig
|
||||
index 343800fc24d6..2a9696b249e9 100644
|
||||
--- a/arch/arm/configs/mt7623n_evb_fwu_defconfig
|
||||
+++ b/arch/arm/configs/mt7623n_evb_fwu_defconfig
|
||||
@@ -223,7 +223,7 @@ CONFIG_NET_MEDIATEK_SOC=y
|
||||
|
||||
CONFIG_ICPLUS_PHY=y
|
||||
CONFIG_INPUT_EVDEV=y
|
||||
-CONFIG_INPUT_EVBUG=m
|
||||
+#CONFIG_INPUT_EVBUG=m
|
||||
CONFIG_KEYBOARD_MATRIX=y
|
||||
CONFIG_KEYBOARD_SAMSUNG=y
|
||||
CONFIG_KEYBOARD_MTK_PMIC=m
|
||||
@@ -370,7 +370,7 @@ CONFIG_BTRFS_FS=m
|
||||
|
||||
#GPIO
|
||||
CONFIG_DEBUG_FS=y
|
||||
-CONFIG_DEBUG_GPIO=y
|
||||
+#CONFIG_DEBUG_GPIO=y
|
||||
CONFIG_GPIO_SYSFS=y
|
||||
|
||||
#wlan
|
||||
--
|
||||
2.19.1
|
||||
|
||||
|
|
@ -0,0 +1,25 @@
|
|||
From 04b3085371657fe44d7949168de9a080c61b1607 Mon Sep 17 00:00:00 2001
|
||||
From: Frank Wunderlich <frank-w@public-files.de>
|
||||
Date: Fri, 25 Jan 2019 15:08:26 +0100
|
||||
Subject: [PATCH 58/77] [defconfig] add multiple routing-tables for IPv4
|
||||
|
||||
---
|
||||
arch/arm/configs/mt7623n_evb_fwu_defconfig | 2 ++
|
||||
1 file changed, 2 insertions(+)
|
||||
|
||||
diff --git a/arch/arm/configs/mt7623n_evb_fwu_defconfig b/arch/arm/configs/mt7623n_evb_fwu_defconfig
|
||||
index 2a9696b249e9..16fbafbea0c3 100644
|
||||
--- a/arch/arm/configs/mt7623n_evb_fwu_defconfig
|
||||
+++ b/arch/arm/configs/mt7623n_evb_fwu_defconfig
|
||||
@@ -101,6 +101,8 @@ CONFIG_DUMMY=m
|
||||
CONFIG_PACKET=y
|
||||
CONFIG_UNIX=y
|
||||
CONFIG_INET=y
|
||||
+CONFIG_IP_ADVANCED_ROUTER=y
|
||||
+CONFIG_IP_MULTIPLE_TABLES=y
|
||||
CONFIG_IP_PNP=y
|
||||
CONFIG_IP_PNP_DHCP=y
|
||||
CONFIG_IP_PNP_BOOTP=y
|
||||
--
|
||||
2.19.1
|
||||
|
||||
|
|
@ -0,0 +1,33 @@
|
|||
From 4ca583e03d89abdab30393529e048d5fadcffb2b Mon Sep 17 00:00:00 2001
|
||||
From: Frank Wunderlich <frank-w@public-files.de>
|
||||
Date: Fri, 25 Jan 2019 15:53:58 +0100
|
||||
Subject: [PATCH 59/77] [defconfig] added options for Traffic Shaping
|
||||
|
||||
---
|
||||
arch/arm/configs/mt7623n_evb_fwu_defconfig | 3 +++
|
||||
1 file changed, 3 insertions(+)
|
||||
|
||||
diff --git a/arch/arm/configs/mt7623n_evb_fwu_defconfig b/arch/arm/configs/mt7623n_evb_fwu_defconfig
|
||||
index 16fbafbea0c3..cd86a013b161 100644
|
||||
--- a/arch/arm/configs/mt7623n_evb_fwu_defconfig
|
||||
+++ b/arch/arm/configs/mt7623n_evb_fwu_defconfig
|
||||
@@ -98,6 +98,7 @@ CONFIG_APM_EMULATION=y
|
||||
|
||||
CONFIG_NET=y
|
||||
CONFIG_DUMMY=m
|
||||
+CONFIG_IFB=m
|
||||
CONFIG_PACKET=y
|
||||
CONFIG_UNIX=y
|
||||
CONFIG_INET=y
|
||||
@@ -525,6 +526,8 @@ CONFIG_NET_SCH_GRED=m
|
||||
CONFIG_NET_SCH_DSMARK=m
|
||||
CONFIG_NET_SCH_INGRESS=m
|
||||
CONFIG_NET_SCH_NETEM=m
|
||||
+CONFIG_NET_SCH_FQ_CODEL=m
|
||||
+CONFIG_NET_ACT_MIRRED=m
|
||||
CONFIG_NET_QOS=y
|
||||
CONFIG_NET_ESTIMATOR=y
|
||||
CONFIG_NET_CLS=y
|
||||
--
|
||||
2.19.1
|
||||
|
||||
60
root/target/linux/mediatek/patches-4.19/0061-defconfig-add-nftables.patch
Executable file
60
root/target/linux/mediatek/patches-4.19/0061-defconfig-add-nftables.patch
Executable file
|
|
@ -0,0 +1,60 @@
|
|||
From ac6c3841de57124c49f95da9f50448a82070cce3 Mon Sep 17 00:00:00 2001
|
||||
From: Frank Wunderlich <frank-w@public-files.de>
|
||||
Date: Fri, 8 Feb 2019 16:27:44 +0100
|
||||
Subject: [PATCH 61/77] [defconfig] add nftables
|
||||
|
||||
---
|
||||
arch/arm/configs/mt7623n_evb_fwu_defconfig | 37 ++++++++++++++++++++++
|
||||
1 file changed, 37 insertions(+)
|
||||
|
||||
diff --git a/arch/arm/configs/mt7623n_evb_fwu_defconfig b/arch/arm/configs/mt7623n_evb_fwu_defconfig
|
||||
index cd86a013b161..6ec6625102b3 100644
|
||||
--- a/arch/arm/configs/mt7623n_evb_fwu_defconfig
|
||||
+++ b/arch/arm/configs/mt7623n_evb_fwu_defconfig
|
||||
@@ -179,6 +179,43 @@ CONFIG_IP_VS=m
|
||||
CONFIG_NETFILTER_XT_MATCH_IPVS=m
|
||||
CONFIG_NETFILTER_XT_MATCH_CONNLIMIT=m
|
||||
|
||||
+CONFIG_NF_TABLES=m
|
||||
+CONFIG_NF_TABLES_IPV4=y
|
||||
+CONFIG_NF_TABLES_IPV6=y
|
||||
+CONFIG_NF_TABLES_INET=y
|
||||
+CONFIG_NF_TABLES_NETDEV=y
|
||||
+CONFIG_NFT_NUMGEN=m
|
||||
+CONFIG_NFT_CT=m
|
||||
+CONFIG_NFT_COUNTER=m
|
||||
+CONFIG_NFT_CONNLIMIT=m
|
||||
+CONFIG_NFT_LOG=m
|
||||
+CONFIG_NFT_LIMIT=m
|
||||
+CONFIG_NFT_MASQ=m
|
||||
+CONFIG_NFT_MASQ_IPV4=m
|
||||
+CONFIG_NFT_REDIR=m
|
||||
+CONFIG_NFT_NAT=m
|
||||
+CONFIG_NFT_CHAIN_NAT_IPV4=m
|
||||
+CONFIG_NFT_TUNNEL=m
|
||||
+CONFIG_NFT_OBJREF=m
|
||||
+CONFIG_NFT_QUOTA=m
|
||||
+CONFIG_NFT_REJECT=m
|
||||
+CONFIG_NFT_COMPAT=m
|
||||
+CONFIG_NFT_HASH=m
|
||||
+CONFIG_NFT_SOCKET=m
|
||||
+CONFIG_NFT_OSF=m
|
||||
+CONFIG_NFT_TPROXY=m
|
||||
+CONFIG_NFT_QUEUE=m
|
||||
+CONFIG_NFT_FIB_IPV4=m
|
||||
+CONFIG_NFT_FIB_IPV6=m
|
||||
+CONFIG_NFT_FIB_INET=m
|
||||
+CONFIG_NFT_FIB_NETDEV=m
|
||||
+CONFIG_NFT_FLOW_OFFLOAD=m
|
||||
+CONFIG_NFT_FWD_NETDEV=m
|
||||
+CONFIG_NFT_REDIR_IPV4=m
|
||||
+CONFIG_NFT_REDIR_IPV6=m
|
||||
+CONFIG_NFT_CHAIN_ROUTE_IPV4=m
|
||||
+CONFIG_NFT_CHAIN_ROUTE_IPV6=m
|
||||
+
|
||||
CONFIG_NET_MEDIATEK_HNAT=m
|
||||
CONFIG_DEBUG_SECTION_MISMATCH=y
|
||||
|
||||
--
|
||||
2.19.1
|
||||
|
||||
Some files were not shown because too many files have changed in this diff Show more
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Add table
Add a link
Reference in a new issue