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Fix for BPI-R64

This commit is contained in:
Ycarus (Yannick Chabanois) 2022-05-04 16:52:37 +02:00
parent eab67d3811
commit 78cbf848f8
195 changed files with 116008 additions and 80 deletions

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// SPDX-License-Identifier: GPL-2.0-or-later OR MIT
/dts-v1/;
#include <dt-bindings/input/input.h>
#include <dt-bindings/gpio/gpio.h>
#include "mt7622.dtsi"
#include "mt6380.dtsi"
/ {
model = "Buffalo WSR-2533DHP2";
compatible = "buffalo,wsr-2533dhp2", "mediatek,mt7622";
aliases {
serial0 = &uart0;
led-boot = &power_green;
led-failsafe = &power_amber;
led-running = &power_green;
led-upgrade = &power_green;
};
chosen {
bootargs = "earlycon=uart8250,mmio32,0x11002000 console=ttyS0,115200n8 swiotlb=512";
};
memory {
reg = <0 0x40000000 0 0x0F000000>;
};
leds {
compatible = "gpio-leds";
wireless_amber {
label = "amber:wireless";
gpios = <&pio 2 GPIO_ACTIVE_HIGH>;
};
power_amber: power_amber {
label = "amber:power";
gpios = <&pio 3 GPIO_ACTIVE_LOW>;
};
power_green: power_green {
label = "green:power";
gpios = <&pio 4 GPIO_ACTIVE_LOW>;
default-state = "on";
};
wireless_green {
label = "green:wireless";
gpios = <&pio 15 GPIO_ACTIVE_HIGH>;
};
internet {
label = "green:internet";
gpios = <&pio 19 GPIO_ACTIVE_HIGH>;
};
router {
label = "green:router";
gpios = <&pio 20 GPIO_ACTIVE_HIGH>;
};
};
keys {
compatible = "gpio-keys";
poll-interval = <100>;
reset {
label = "reset";
gpios = <&pio 0 GPIO_ACTIVE_LOW>;
linux,code = <KEY_RESTART>;
};
/* GPIO 1 and 16 are a tri-state switch button with
* ROUTER / AP / WB.
*/
router {
label = "router";
gpios = <&pio 1 GPIO_ACTIVE_LOW>;
linux,code = <BTN_0>;
linux,input-type = <EV_SW>;
};
bridge {
label = "wb";
gpios = <&pio 16 GPIO_ACTIVE_LOW>;
linux,code = <BTN_1>;
linux,input-type = <EV_SW>;
};
/* GPIO 18 is a switch button with AUTO / MANUAL. */
manual {
label = "manual";
gpios = <&pio 18 GPIO_ACTIVE_LOW>;
linux,code = <BTN_2>;
linux,input-type = <EV_SW>;
};
wps {
label = "wps";
gpios = <&pio 102 GPIO_ACTIVE_LOW>;
linux,code = <KEY_WPS_BUTTON>;
};
};
rtkgsw: rtkgsw@0 {
compatible = "mediatek,rtk-gsw";
mediatek,ethsys = <&ethsys>;
mediatek,mdio = <&mdio>;
mediatek,reset-pin = <&pio 54 GPIO_ACTIVE_HIGH>;
};
};
&cpu0 {
proc-supply = <&mt6380_vcpu_reg>;
sram-supply = <&mt6380_vm_reg>;
};
&cpu1 {
proc-supply = <&mt6380_vcpu_reg>;
sram-supply = <&mt6380_vm_reg>;
};
&pcie0 {
pinctrl-names = "default";
pinctrl-0 = <&pcie0_pins>;
status = "okay";
};
&slot0 {
status = "okay";
wifi@0,0 {
compatible = "mediatek,mt76";
reg = <0x0000 0 0 0 0>;
mediatek,mtd-eeprom = <&factory 0x5000>;
ieee80211-freq-limit = <5000000 6000000>;
};
};
&pio {
eth_pins: eth-pins {
mux {
function = "eth";
groups = "mdc_mdio", "rgmii_via_gmac2";
};
};
/* Parallel nand is shared pin with eMMC */
parallel_nand_pins: parallel-nand-pins {
mux {
function = "flash";
groups = "par_nand";
};
conf-cmd-dat {
pins = "NCEB", "NWEB", "NREB",
"NDL4", "NDL5", "NDL6",
"NDL7", "NRB", "NCLE",
"NALE", "NDL0", "NDL1",
"NDL2", "NDL3";
input-enable;
drive-strength = <8>;
bias-pull-up;
};
};
pcie0_pins: pcie0-pins {
mux {
function = "pcie";
groups = "pcie0_pad_perst",
"pcie0_1_waken",
"pcie0_1_clkreq";
};
};
pmic_bus_pins: pmic-bus-pins {
mux {
function = "pmic";
groups = "pmic_bus";
};
};
pwm7_pins: pwm1-2-pins {
mux {
function = "pwm";
groups = "pwm_ch7_2";
};
};
uart0_pins: uart0-pins {
mux {
function = "uart";
groups = "uart0_0_tx_rx" ;
};
};
watchdog_pins: watchdog-pins {
mux {
function = "watchdog";
groups = "watchdog";
};
};
};
&bch {
status = "okay";
};
&eth {
pinctrl-names = "default";
pinctrl-0 = <&eth_pins>;
status = "okay";
gmac0: mac@0 {
compatible = "mediatek,eth-mac";
reg = <0>;
phy-connection-type = "2500base-x";
nvmem-cells = <&macaddr_factory_4>;
nvmem-cell-names = "mac-address";
mac-address-increment = <(-1)>;
fixed-link {
speed = <2500>;
full-duplex;
pause;
};
};
mdio: mdio-bus {
#address-cells = <1>;
#size-cells = <0>;
};
};
&nandc {
pinctrl-names = "default";
pinctrl-0 = <&parallel_nand_pins>;
status = "okay";
nand@0 {
reg = <0>;
nand-ecc-mode = "hw";
partitions {
compatible = "fixed-partitions";
#address-cells = <1>;
#size-cells = <1>;
partition@0 {
label = "Preloader";
reg = <0x0 0x80000>;
read-only;
};
partition@80000 {
label = "ATF";
reg = <0x80000 0x40000>;
read-only;
};
partition@c0000 {
label = "Bootloader";
reg = <0xc0000 0x80000>;
read-only;
};
partition@140000 {
label = "Config";
reg = <0x140000 0x80000>;
};
factory: partition@1c0000 {
label = "factory";
reg = <0x1c0000 0x40000>;
read-only;
};
partition@200000 {
compatible = "brcm,trx";
brcm,trx-magic = <0x32504844>;
label = "firmware";
reg = <0x200000 0x3a00000>;
};
partition@3C00000 {
label = "Kernel2";
reg = <0x3c00000 0x3a00000>;
};
partition@7600000 {
label = "glbcfg";
reg = <0x7600000 0x200000>;
read-only;
};
partition@7800000 {
label = "board_data";
reg = <0x7800000 0x200000>;
read-only;
};
};
};
};
&pwm {
pinctrl-names = "default";
pinctrl-0 = <&pwm7_pins>;
status = "okay";
};
&pwrap {
pinctrl-names = "default";
pinctrl-0 = <&pmic_bus_pins>;
status = "okay";
};
&uart0 {
pinctrl-names = "default";
pinctrl-0 = <&uart0_pins>;
status = "okay";
};
&watchdog {
pinctrl-names = "default";
pinctrl-0 = <&watchdog_pins>;
status = "okay";
};
&wmac {
status = "okay";
mediatek,mtd-eeprom = <&factory 0x0>;
};
&rtc {
status = "disabled";
};
&factory {
compatible = "nvmem-cells";
#address-cells = <1>;
#size-cells = <1>;
macaddr_factory_4: macaddr@4 {
reg = <0x4 0x6>;
};
};

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// SPDX-License-Identifier: (GPL-2.0-only OR MIT)
/*
* Copyright (c) 2017 MediaTek Inc.
* Author: Ming Huang <ming.huang@mediatek.com>
* Sean Wang <sean.wang@mediatek.com>
*/
/dts-v1/;
#include <dt-bindings/input/input.h>
#include <dt-bindings/gpio/gpio.h>
#include "mt7622.dtsi"
#include "mt6380.dtsi"
/ {
model = "Elecom WRC-2533";
compatible = "elecom,wrc-2533gent", "mediatek,mt7622";
aliases {
led-boot = &led_power;
led-failsafe = &led_power;
led-running = &led_power;
led-upgrade = &led_power;
serial0 = &uart0;
};
chosen {
stdout-path = "serial0:115200n8";
bootargs = "earlycon=uart8250,mmio32,0x11002000 swiotlb=512 console=ttyS0,115200n8";
};
cpus {
cpu@0 {
proc-supply = <&mt6380_vcpu_reg>;
sram-supply = <&mt6380_vm_reg>;
};
cpu@1 {
proc-supply = <&mt6380_vcpu_reg>;
sram-supply = <&mt6380_vm_reg>;
};
};
gpio-keys {
compatible = "gpio-keys";
poll-interval = <100>;
wps {
label = "wps";
linux,code = <KEY_WPS_BUTTON>;
gpios = <&pio 0 GPIO_ACTIVE_HIGH>;
};
factory {
label = "factory";
linux,code = <KEY_WPS_BUTTON>;
gpios = <&pio 102 GPIO_ACTIVE_LOW>;
};
switch0 {
label = "switch0";
gpios = <&pio 1 GPIO_ACTIVE_LOW>;
linux,code = <BTN_0>;
linux,input-type = <EV_SW>;
};
switch1 {
label = "switch1";
gpios = <&pio 16 GPIO_ACTIVE_LOW>;
linux,code = <BTN_1>;
linux,input-type = <EV_SW>;
};
switch2 {
label = "switch2";
gpios = <&pio 17 GPIO_ACTIVE_LOW>;
linux,code = <BTN_2>;
linux,input-type = <EV_SW>;
};
switch3 {
label = "switch3";
gpios = <&pio 18 GPIO_ACTIVE_LOW>;
linux,code = <BTN_3>;
linux,input-type = <EV_SW>;
};
};
leds {
compatible = "gpio-leds";
led_power: power_g {
label = "wrc-2533:green:power";
gpios = <&pio 2 GPIO_ACTIVE_HIGH>;
};
power_b {
label = "wrc-2533:blue:power";
gpios = <&pio 19 GPIO_ACTIVE_HIGH>;
};
power_r {
label = "wrc-2533:red:power";
gpios = <&pio 73 GPIO_ACTIVE_HIGH>;
};
usb {
label = "wrc-2533:blue:usb";
gpios = <&pio 74 GPIO_ACTIVE_HIGH>;
};
wps {
label = "wrc-2533:red:wps";
gpios = <&pio 76 GPIO_ACTIVE_LOW>;
};
wifi2 {
label = "wrc-2533:blue:wifi2g";
gpios = <&pio 85 GPIO_ACTIVE_LOW>;
};
wifi5 {
label = "wrc-2533:blue:wifi5g";
gpios = <&pio 91 GPIO_ACTIVE_LOW>;
};
};
reg_usb_vbus: regulator {
compatible = "regulator-fixed";
regulator-name = "usb_vbus";
regulator-min-microvolt = <5000000>;
regulator-max-microvolt = <5000000>;
gpio = <&pio 22 GPIO_ACTIVE_LOW>;
enable-active-high;
};
memory {
reg = <0 0x40000000 0 0x3F000000>;
};
reg_1p8v: regulator-1p8v {
compatible = "regulator-fixed";
regulator-name = "fixed-1.8V";
regulator-min-microvolt = <1800000>;
regulator-max-microvolt = <1800000>;
regulator-always-on;
};
reg_3p3v: regulator-3p3v {
compatible = "regulator-fixed";
regulator-name = "fixed-3.3V";
regulator-min-microvolt = <3300000>;
regulator-max-microvolt = <3300000>;
regulator-boot-on;
regulator-always-on;
};
rtkgsw: rtkgsw@0 {
compatible = "mediatek,rtk-gsw";
mediatek,ethsys = <&ethsys>;
mediatek,mdio = <&mdio>;
mediatek,reset-pin = <&pio 54 0>;
status = "okay";
};
};
&pcie0 {
pinctrl-names = "default";
pinctrl-0 = <&pcie0_pins>;
status = "okay";
};
&slot0 {
mt7615@0,0 {
reg = <0x0000 0 0 0 0>;
mediatek,mtd-eeprom = <&factory 0x05000>;
};
};
&pio {
/* eMMC is shared pin with parallel NAND */
emmc_pins_default: emmc-pins-default {
mux {
function = "emmc", "emmc_rst";
groups = "emmc";
};
/* "NDL0","NDL1","NDL2","NDL3","NDL4","NDL5","NDL6","NDL7",
* "NRB","NCLE" pins are used as DAT0,DAT1,DAT2,DAT3,DAT4,
* DAT5,DAT6,DAT7,CMD,CLK for eMMC respectively
*/
conf-cmd-dat {
pins = "NDL0", "NDL1", "NDL2",
"NDL3", "NDL4", "NDL5",
"NDL6", "NDL7", "NRB";
input-enable;
bias-pull-up;
};
conf-clk {
pins = "NCLE";
bias-pull-down;
};
};
emmc_pins_uhs: emmc-pins-uhs {
mux {
function = "emmc";
groups = "emmc";
};
conf-cmd-dat {
pins = "NDL0", "NDL1", "NDL2",
"NDL3", "NDL4", "NDL5",
"NDL6", "NDL7", "NRB";
input-enable;
drive-strength = <4>;
bias-pull-up;
};
conf-clk {
pins = "NCLE";
drive-strength = <4>;
bias-pull-down;
};
};
eth_pins: eth-pins {
mux {
function = "eth";
groups = "mdc_mdio", "rgmii_via_gmac2";
};
};
i2c1_pins: i2c1-pins {
mux {
function = "i2c";
groups = "i2c1_0";
};
};
i2c2_pins: i2c2-pins {
mux {
function = "i2c";
groups = "i2c2_0";
};
};
i2s1_pins: i2s1-pins {
mux {
function = "i2s";
groups = "i2s_out_mclk_bclk_ws",
"i2s1_in_data",
"i2s1_out_data";
};
conf {
pins = "I2S1_IN", "I2S1_OUT", "I2S_BCLK",
"I2S_WS", "I2S_MCLK";
drive-strength = <12>;
bias-pull-down;
};
};
irrx_pins: irrx-pins {
mux {
function = "ir";
groups = "ir_1_rx";
};
};
irtx_pins: irtx-pins {
mux {
function = "ir";
groups = "ir_1_tx";
};
};
/* Parallel nand is shared pin with eMMC */
parallel_nand_pins: parallel-nand-pins {
mux {
function = "flash";
groups = "par_nand";
};
};
pcie0_pins: pcie0-pins {
mux {
function = "pcie";
groups = "pcie0_pad_perst",
"pcie0_1_waken",
"pcie0_1_clkreq";
};
};
pcie1_pins: pcie1-pins {
mux {
function = "pcie";
groups = "pcie1_pad_perst",
"pcie1_0_waken",
"pcie1_0_clkreq";
};
};
pmic_bus_pins: pmic-bus-pins {
mux {
function = "pmic";
groups = "pmic_bus";
};
};
pwm7_pins: pwm1-2-pins {
mux {
function = "pwm";
groups = "pwm_ch7_2";
};
};
wled_pins: wled-pins {
mux {
function = "led";
groups = "wled";
};
};
sd0_pins_default: sd0-pins-default {
mux {
function = "sd";
groups = "sd_0";
};
/* "I2S2_OUT, "I2S4_IN"", "I2S3_IN", "I2S2_IN",
* "I2S4_OUT", "I2S3_OUT" are used as DAT0, DAT1,
* DAT2, DAT3, CMD, CLK for SD respectively.
*/
conf-cmd-data {
pins = "I2S2_OUT", "I2S4_IN", "I2S3_IN",
"I2S2_IN","I2S4_OUT";
input-enable;
drive-strength = <8>;
bias-pull-up;
};
conf-clk {
pins = "I2S3_OUT";
drive-strength = <12>;
bias-pull-down;
};
conf-cd {
pins = "TXD3";
bias-pull-up;
};
};
sd0_pins_uhs: sd0-pins-uhs {
mux {
function = "sd";
groups = "sd_0";
};
conf-cmd-data {
pins = "I2S2_OUT", "I2S4_IN", "I2S3_IN",
"I2S2_IN","I2S4_OUT";
input-enable;
bias-pull-up;
};
conf-clk {
pins = "I2S3_OUT";
bias-pull-down;
};
};
/* Serial NAND is shared pin with SPI-NOR */
serial_nand_pins: serial-nand-pins {
mux {
function = "flash";
groups = "snfi";
};
};
spic0_pins: spic0-pins {
mux {
function = "spi";
groups = "spic0_0";
};
};
spic1_pins: spic1-pins {
mux {
function = "spi";
groups = "spic1_0";
};
};
/* SPI-NOR is shared pin with serial NAND */
spi_nor_pins: spi-nor-pins {
mux {
function = "flash";
groups = "spi_nor";
};
};
/* serial NAND is shared pin with SPI-NOR */
serial_nand_pins: serial-nand-pins {
mux {
function = "flash";
groups = "snfi";
};
};
uart0_pins: uart0-pins {
mux {
function = "uart";
groups = "uart0_0_tx_rx" ;
};
};
uart2_pins: uart2-pins {
mux {
function = "uart";
groups = "uart2_1_tx_rx" ;
};
};
watchdog_pins: watchdog-pins {
mux {
function = "watchdog";
groups = "watchdog";
};
};
};
&btif {
status = "disabled";
};
&cir {
pinctrl-names = "default";
pinctrl-0 = <&irrx_pins>;
status = "okay";
};
&eth {
status = "okay";
pinctrl-names = "default";
pinctrl-0 = <&eth_pins>;
gmac0: mac@0 {
compatible = "mediatek,eth-mac";
reg = <0>;
phy-mode = "sgmii";
fixed-link {
speed = <1000>;
full-duplex;
pause;
};
};
gmac1: mac@1 {
compatible = "mediatek,eth-mac";
reg = <1>;
phy-mode = "rgmii";
fixed-link {
speed = <1000>;
full-duplex;
pause;
};
};
mdio: mdio-bus {
#address-cells = <1>;
#size-cells = <0>;
};
};
&i2c1 {
pinctrl-names = "default";
pinctrl-0 = <&i2c1_pins>;
status = "okay";
};
&i2c2 {
pinctrl-names = "default";
pinctrl-0 = <&i2c2_pins>;
status = "okay";
};
&pwm {
pinctrl-names = "default";
pinctrl-0 = <&pwm7_pins>;
status = "okay";
};
&pwrap {
pinctrl-names = "default";
pinctrl-0 = <&pmic_bus_pins>;
status = "okay";
};
&bch {
status = "okay";
};
&snfi {
pinctrl-names = "default";
pinctrl-0 = <&serial_nand_pins>;
status = "okay";
flash@0 {
compatible = "spi-nand";
reg = <0>;
spi-tx-bus-width = <4>;
spi-rx-bus-width = <4>;
nand-ecc-engine = <&snfi>;
partitions {
compatible = "fixed-partitions";
#address-cells = <1>;
#size-cells = <1>;
partition@0 {
label = "Preloader";
reg = <0x00000 0x0080000>;
read-only;
};
partition@80000 {
label = "ATF";
reg = <0x80000 0x0040000>;
read-only;
};
partition@c0000 {
label = "uboot";
reg = <0xc0000 0x0080000>;
read-only;
};
partition@140000 {
label = "uboot-env";
reg = <0x140000 0x0080000>;
read-only;
};
factory: partition@1c0000 {
label = "factory";
reg = <0x1c0000 0x0040000>;
read-only;
};
partition@200000 {
label = "firmware";
reg = <0x200000 0x2000000>;
};
partition@2200000 {
label = "reserved";
reg = <0x2200000 0x4000000>;
};
};
};
};
&spi0 {
pinctrl-names = "default";
pinctrl-0 = <&spic0_pins>;
status = "okay";
};
&spi1 {
pinctrl-names = "default";
pinctrl-0 = <&spic1_pins>;
status = "okay";
};
&ssusb {
vusb33-supply = <&reg_3p3v>;
vbus-supply = <&reg_usb_vbus>;
status = "okay";
};
&u3phy {
status = "okay";
};
&uart0 {
pinctrl-names = "default";
pinctrl-0 = <&uart0_pins>;
status = "okay";
};
&uart2 {
pinctrl-names = "default";
pinctrl-0 = <&uart2_pins>;
status = "okay";
};
&watchdog {
pinctrl-names = "default";
pinctrl-0 = <&watchdog_pins>;
status = "okay";
};
&wmac {
mediatek,mtd-eeprom = <&factory 0x0000>;
status = "okay";
};

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// SPDX-License-Identifier: (GPL-2.0-only OR MIT)
/dts-v1/;
#include "mt7622-linksys-e8450.dtsi"
/ {
model = "Linksys E8450 (UBI)";
compatible = "linksys,e8450-ubi", "mediatek,mt7622";
aliases {
label-mac-device = &wan;
};
};
&snand {
partitions {
compatible = "fixed-partitions";
#address-cells = <1>;
#size-cells = <1>;
partition@0 {
label = "bl2";
reg = <0x0 0x80000>;
read-only;
};
partition@80000 {
label = "fip";
reg = <0x80000 0x140000>;
read-only;
};
factory: partition@1c0000 {
label = "factory";
reg = <0x1c0000 0x100000>;
read-only;
};
partition@300000 {
label = "ubi";
reg = <0x300000 0x7d00000>;
};
};
};
&wmac {
mediatek,mtd-eeprom = <&factory 0x0>;
status = "okay";
};
&wmac1 {
mediatek,mtd-eeprom = <&factory 0x5000>;
};
&gmac0 {
nvmem-cells = <&macaddr_factory_7fff4>;
nvmem-cell-names = "mac-address";
};
&wan {
nvmem-cells = <&macaddr_factory_7fffa>;
nvmem-cell-names = "mac-address";
};
&factory {
compatible = "nvmem-cells";
#address-cells = <1>;
#size-cells = <1>;
macaddr_factory_7fff4: macaddr@7fff4 {
reg = <0x7fff4 0x6>;
};
macaddr_factory_7fffa: macaddr@7fffa {
reg = <0x7fffa 0x6>;
};
};

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// SPDX-License-Identifier: (GPL-2.0-only OR MIT)
/dts-v1/;
#include "mt7622-linksys-e8450.dtsi"
/ {
model = "Linksys E8450";
compatible = "linksys,e8450", "mediatek,mt7622";
aliases {
label-mac-device = &wan;
};
};
&snand {
mediatek,bmt-v2;
mediatek,bmt-table-size = <0x1000>;
partitions {
compatible = "fixed-partitions";
#address-cells = <1>;
#size-cells = <1>;
partition@0 {
label = "Preloader";
reg = <0x00000 0x0080000>;
read-only;
};
partition@80000 {
label = "ATF";
reg = <0x80000 0x0040000>;
};
partition@c0000 {
label = "u-boot";
reg = <0xc0000 0x0080000>;
};
partition@140000 {
label = "u-boot-env";
reg = <0x140000 0x0080000>;
};
factory: partition@1c0000 {
label = "factory";
reg = <0x1c0000 0x0100000>;
};
partition@300000 {
label = "devinfo";
reg = <0x300000 0x020000>;
};
partition@320000 {
label = "senv";
reg = <0x320000 0x020000>;
};
partition@360000 {
label = "bootseq";
reg = <0x360000 0x020000>;
};
partition@500000 {
label = "firmware1";
compatible = "denx,fit";
openwrt,cmdline-match = "mtdparts=master";
reg = <0x500000 0x1E00000>;
};
partition@2300000 {
label = "firmware2";
compatible = "denx,fit";
openwrt,cmdline-match = "mtdparts=slave";
reg = <0x2300000 0x1E00000>;
};
partition@4100000 {
label = "data";
reg = <0x4100000 0x1900000>;
};
partition@5100000 {
label = "mfg";
reg = <0x5a00000 0x1400000>;
};
};
};
&wmac {
mediatek,mtd-eeprom = <&factory 0x0000>;
status = "okay";
};
&wmac1 {
mediatek,mtd-eeprom = <&factory 0x05000>;
};
&gmac0 {
nvmem-cells = <&macaddr_factory_7fff4>;
nvmem-cell-names = "mac-address";
};
&wan {
nvmem-cells = <&macaddr_factory_7fffa>;
nvmem-cell-names = "mac-address";
};
&factory {
compatible = "nvmem-cells";
#address-cells = <1>;
#size-cells = <1>;
macaddr_factory_7fff4: macaddr@7fff4 {
reg = <0x7fff4 0x6>;
};
macaddr_factory_7fffa: macaddr@7fffa {
reg = <0x7fffa 0x6>;
};
};

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// SPDX-License-Identifier: (GPL-2.0-only OR MIT)
/dts-v1/;
#include <dt-bindings/input/input.h>
#include <dt-bindings/gpio/gpio.h>
#include "mt7622.dtsi"
#include "mt6380.dtsi"
/ {
compatible = "linksys,e8450", "mediatek,mt7622";
aliases {
serial0 = &uart0;
led-boot = &led_power;
led-failsafe = &led_power;
led-running = &led_power;
led-upgrade = &led_power;
};
chosen {
stdout-path = "serial0:115200n8";
bootargs = "earlycon=uart8250,mmio32,0x11002000 console=ttyS0,115200n1 swiotlb=512";
};
cpus {
cpu@0 {
proc-supply = <&mt6380_vcpu_reg>;
sram-supply = <&mt6380_vm_reg>;
};
cpu@1 {
proc-supply = <&mt6380_vcpu_reg>;
sram-supply = <&mt6380_vm_reg>;
};
};
gpio-keys {
compatible = "gpio-keys";
factory {
label = "reset";
linux,code = <KEY_RESTART>;
gpios = <&pio 0 GPIO_ACTIVE_LOW>;
};
wps {
label = "wps";
linux,code = <KEY_WPS_BUTTON>;
gpios = <&pio 102 GPIO_ACTIVE_LOW>;
};
};
gpio-leds {
compatible = "gpio-leds";
led_power: power_blue {
label = "power:blue";
gpios = <&pio 95 GPIO_ACTIVE_LOW>;
default-state = "on";
};
power_orange {
label = "power:orange";
gpios = <&pio 96 GPIO_ACTIVE_LOW>;
default-state = "off";
};
inet_blue {
label = "inet:blue";
gpios = <&pio 97 GPIO_ACTIVE_LOW>;
default-state = "off";
};
inet_orange {
label = "inet:orange";
gpios = <&pio 98 GPIO_ACTIVE_LOW>;
default-state = "off";
};
};
memory {
reg = <0 0x40000000 0 0x40000000>;
};
reg_1p8v: regulator-1p8v {
compatible = "regulator-fixed";
regulator-name = "fixed-1.8V";
regulator-min-microvolt = <1800000>;
regulator-max-microvolt = <1800000>;
regulator-always-on;
};
reg_3p3v: regulator-3p3v {
compatible = "regulator-fixed";
regulator-name = "fixed-3.3V";
regulator-min-microvolt = <3300000>;
regulator-max-microvolt = <3300000>;
regulator-boot-on;
regulator-always-on;
};
reg_5v: regulator-5v {
compatible = "regulator-fixed";
regulator-name = "fixed-5V";
regulator-min-microvolt = <5000000>;
regulator-max-microvolt = <5000000>;
regulator-boot-on;
regulator-always-on;
};
};
&btif {
status = "okay";
};
&cir {
pinctrl-names = "default";
pinctrl-0 = <&irrx_pins>;
status = "okay";
};
&eth {
pinctrl-names = "default";
pinctrl-0 = <&eth_pins>;
status = "okay";
gmac0: mac@0 {
compatible = "mediatek,eth-mac";
reg = <0>;
phy-mode = "2500base-x";
fixed-link {
speed = <2500>;
full-duplex;
pause;
};
};
mdio-bus {
#address-cells = <1>;
#size-cells = <0>;
switch@0 {
compatible = "mediatek,mt7531";
reg = <0>;
interrupt-controller;
#interrupt-cells = <1>;
interrupt-parent = <&pio>;
interrupts = <53 IRQ_TYPE_LEVEL_HIGH>;
reset-gpios = <&pio 54 0>;
ports {
#address-cells = <1>;
#size-cells = <0>;
port@0 {
reg = <0>;
label = "lan1";
};
port@1 {
reg = <1>;
label = "lan2";
};
port@2 {
reg = <2>;
label = "lan3";
};
port@3 {
reg = <3>;
label = "lan4";
};
wan: port@4 {
reg = <4>;
label = "wan";
};
port@6 {
reg = <6>;
label = "cpu";
ethernet = <&gmac0>;
phy-mode = "2500base-x";
fixed-link {
speed = <2500>;
full-duplex;
pause;
};
};
};
};
};
};
&pcie0 {
pinctrl-names = "default";
pinctrl-0 = <&pcie0_pins>;
status = "okay";
};
&pcie1 {
pinctrl-names = "default";
pinctrl-0 = <&pcie1_pins>;
status = "okay";
};
&pio {
eth_pins: eth-pins {
mux {
function = "eth";
groups = "mdc_mdio", "rgmii_via_gmac2";
};
};
irrx_pins: irrx-pins {
mux {
function = "ir";
groups = "ir_1_rx";
};
};
irtx_pins: irtx-pins {
mux {
function = "ir";
groups = "ir_1_tx";
};
};
pcie0_pins: pcie0-pins {
mux {
function = "pcie";
groups = "pcie0_pad_perst",
"pcie0_1_waken",
"pcie0_1_clkreq";
};
};
pcie1_pins: pcie1-pins {
mux {
function = "pcie";
groups = "pcie1_pad_perst",
"pcie1_0_waken",
"pcie1_0_clkreq";
};
};
pmic_bus_pins: pmic-bus-pins {
mux {
function = "pmic";
groups = "pmic_bus";
};
};
pwm7_pins: pwm1-2-pins {
mux {
function = "pwm";
groups = "pwm_ch7_2";
};
};
wled_pins: wled-pins {
mux {
function = "led";
groups = "wled";
};
};
/* Serial NAND is shared pin with SPI-NOR */
serial_nand_pins: serial-nand-pins {
mux {
function = "flash";
groups = "snfi";
};
};
spic0_pins: spic0-pins {
mux {
function = "spi";
groups = "spic0_0";
};
};
spic1_pins: spic1-pins {
mux {
function = "spi";
groups = "spic1_0";
};
};
uart0_pins: uart0-pins {
mux {
function = "uart";
groups = "uart0_0_tx_rx" ;
};
};
uart2_pins: uart2-pins {
mux {
function = "uart";
groups = "uart2_1_tx_rx" ;
};
};
watchdog_pins: watchdog-pins {
mux {
function = "watchdog";
groups = "watchdog";
};
};
};
&pwm {
pinctrl-names = "default";
pinctrl-0 = <&pwm7_pins>;
status = "okay";
};
&pwrap {
pinctrl-names = "default";
pinctrl-0 = <&pmic_bus_pins>;
status = "okay";
};
&sata {
status = "disabled";
};
&sata_phy {
status = "disabled";
};
&slot0 {
wmac1: mt7915@0,0 {
reg = <0x0000 0 0 0 0>;
ieee80211-freq-limit = <5000000 6000000>;
};
};
&bch {
status = "okay";
};
&snfi {
pinctrl-names = "default";
pinctrl-0 = <&serial_nand_pins>;
status = "okay";
snand: flash@0 {
compatible = "spi-nand";
reg = <0>;
spi-tx-bus-width = <4>;
spi-rx-bus-width = <4>;
nand-ecc-engine = <&snfi>;
};
};
&spi0 {
pinctrl-names = "default";
pinctrl-0 = <&spic0_pins>;
status = "okay";
};
&spi1 {
pinctrl-names = "default";
pinctrl-0 = <&spic1_pins>;
status = "okay";
};
&ssusb {
vusb33-supply = <&reg_3p3v>;
vbus-supply = <&reg_5v>;
status = "okay";
};
&u3phy {
status = "okay";
};
&uart0 {
pinctrl-names = "default";
pinctrl-0 = <&uart0_pins>;
status = "okay";
};
&uart2 {
pinctrl-names = "default";
pinctrl-0 = <&uart2_pins>;
status = "okay";
};
&rtc {
status = "disabled";
};
&watchdog {
pinctrl-names = "default";
pinctrl-0 = <&watchdog_pins>;
status = "okay";
};

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/dts-v1/;
#include "mt7622-rfb1.dts"
/ {
model = "MT7622_MT7531 RFB (UBI)";
compatible = "mediatek,mt7622-rfb1-ubi";
};
&snfi {
flash@0 {
mediatek,bmt-v2;
mediatek,bmt-remap-range = <0x0 0x6c0000>;
partitions {
compatible = "fixed-partitions";
#address-cells = <1>;
#size-cells = <1>;
partition@0 {
label = "Preloader";
reg = <0x00000 0x0080000>;
read-only;
};
partition@80000 {
label = "ATF";
reg = <0x80000 0x0040000>;
};
partition@c0000 {
label = "Bootloader";
reg = <0xc0000 0x0080000>;
};
partition@140000 {
label = "Config";
reg = <0x140000 0x0080000>;
};
factory: partition@1c0000 {
label = "Factory";
reg = <0x1c0000 0x0100000>;
};
partition@200000 {
label = "kernel";
reg = <0x2c0000 0x400000>;
};
partition@6c0000 {
label = "ubi";
reg = <0x6c0000 0x6f00000>;
};
/delete-node/ partition@2200000;
};
};
};

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// SPDX-License-Identifier: GPL-2.0-or-later OR MIT
/dts-v1/;
#include <dt-bindings/input/input.h>
#include <dt-bindings/gpio/gpio.h>
#include "mt7622.dtsi"
#include "mt6380.dtsi"
/ {
model = "Ruijie RG-EW3200GX PRO";
compatible = "ruijie,rg-ew3200gx-pro", "mediatek,mt7622";
aliases {
ethernet0 = &gmac0;
label-mac-device = &gmac0;
led-boot = &led_system;
led-failsafe = &led_system;
led-running = &led_system;
led-upgrade = &led_system;
serial0 = &uart0;
};
chosen {
stdout-path = "serial0:115200n1";
bootargs = "console=ttyS0,115200n1 swiotlb=512";
};
cpus {
cpu@0 {
proc-supply = <&mt6380_vcpu_reg>;
sram-supply = <&mt6380_vm_reg>;
};
cpu@1 {
proc-supply = <&mt6380_vcpu_reg>;
sram-supply = <&mt6380_vm_reg>;
};
};
gpio-keys {
compatible = "gpio-keys";
reset {
label = "reset";
linux,code = <KEY_RESTART>;
gpios = <&pio 0 GPIO_ACTIVE_LOW>;
};
wps {
label = "wps";
linux,code = <KEY_WPS_BUTTON>;
gpios = <&pio 102 GPIO_ACTIVE_LOW>;
};
};
gpio-leds {
compatible = "gpio-leds";
mesh_green {
label = "green:mesh";
gpios = <&pio 79 GPIO_ACTIVE_LOW>;
};
mesh_red {
label = "red:mesh";
gpios = <&pio 82 GPIO_ACTIVE_LOW>;
};
led_system: system_blue {
label = "blue:system";
gpios = <&pio 81 GPIO_ACTIVE_LOW>;
default-state = "on";
};
};
memory {
reg = <0 0x40000000 0 0x40000000>;
};
};
&eth {
status = "okay";
pinctrl-names = "default";
pinctrl-0 = <&eth_pins>;
gmac0: mac@0 {
compatible = "mediatek,eth-mac";
reg = <0>;
phy-connection-type = "2500base-x";
fixed-link {
speed = <2500>;
full-duplex;
pause;
};
};
mdio: mdio-bus {
#address-cells = <1>;
#size-cells = <0>;
switch@0 {
compatible = "mediatek,mt7531";
reg = <0>;
reset-gpios = <&pio 54 GPIO_ACTIVE_HIGH>;
interrupt-controller;
#interrupt-cells = <2>;
interrupt-parent = <&pio>;
interrupts = <53 IRQ_TYPE_LEVEL_HIGH>;
ports {
#address-cells = <1>;
#size-cells = <0>;
port@0 {
reg = <0>;
label = "lan1";
};
port@1 {
reg = <1>;
label = "lan2";
};
port@2 {
reg = <2>;
label = "lan3";
};
port@3 {
reg = <3>;
label = "lan4";
};
wan: port@4 {
reg = <4>;
label = "wan";
};
port@6 {
reg = <6>;
label = "cpu";
ethernet = <&gmac0>;
phy-mode = "2500base-x";
fixed-link {
speed = <2500>;
full-duplex;
pause;
};
};
};
};
};
};
&pcie0 {
status = "okay";
pinctrl-names = "default";
pinctrl-0 = <&pcie0_pins>;
};
&slot0 {
mt7915@0,0 {
reg = <0x0000 0 0 0 0>;
mediatek,mtd-eeprom = <&factory 0x5000>;
ieee80211-freq-limit = <5000000 6000000>;
};
};
&pio {
epa_elna_pins: epa-elna-pins {
mux {
function = "antsel";
groups = "antsel0", "antsel1", "antsel2", "antsel3",
"antsel4", "antsel5", "antsel6", "antsel7",
"antsel8", "antsel9", "antsel12", "antsel13",
"antsel14", "antsel15", "antsel16", "antsel17";
};
};
eth_pins: eth-pins {
mux {
function = "eth";
groups = "mdc_mdio", "rgmii_via_gmac2";
};
};
pcie0_pins: pcie0-pins {
mux {
function = "pcie";
groups = "pcie0_pad_perst",
"pcie0_0_waken",
"pcie0_0_clkreq";
};
};
pmic_bus_pins: pmic-bus-pins {
mux {
function = "pmic";
groups = "pmic_bus";
};
};
spi_nor_pins: spi-nor-pins {
mux {
function = "flash";
groups = "spi_nor";
};
};
uart0_pins: uart0-pins {
mux {
function = "uart";
groups = "uart0_0_tx_rx";
};
};
watchdog_pins: watchdog-pins {
mux {
function = "watchdog";
groups = "watchdog";
};
};
};
&pwrap {
status = "okay";
pinctrl-names = "default";
pinctrl-0 = <&pmic_bus_pins>;
};
&nor_flash {
status = "okay";
pinctrl-names = "default";
pinctrl-0 = <&spi_nor_pins>;
flash@0 {
compatible = "jedec,spi-nor";
reg = <0>;
spi-max-frequency = <50000000>;
partitions {
compatible = "fixed-partitions";
#address-cells = <1>;
#size-cells = <1>;
partition@0 {
label = "Preloader";
reg = <0x0 0x40000>;
read-only;
};
partition@40000 {
label = "ATF";
reg = <0x40000 0x20000>;
read-only;
};
partition@60000 {
label = "u-boot";
reg = <0x60000 0x50000>;
read-only;
};
partition@B0000 {
label = "u-boot-env";
reg = <0xb0000 0x20000>;
};
factory: partition@D0000 {
label = "Factory";
reg = <0xd0000 0x80000>;
read-only;
};
partition@150000 {
label = "product_info";
reg = <0x150000 0x10000>;
read-only;
};
partition@160000 {
label = "kdump";
reg = <0x160000 0x10000>;
read-only;
};
partition@170000 {
compatible = "denx,fit";
label = "firmware";
reg = <0x170000 0xe90000>;
};
};
};
};
&rtc {
status = "disabled";
};
&uart0 {
status = "okay";
pinctrl-names = "default";
pinctrl-0 = <&uart0_pins>;
};
&watchdog {
status = "okay";
pinctrl-names = "default";
pinctrl-0 = <&watchdog_pins>;
};
&wmac {
status = "okay";
pinctrl-names = "default";
pinctrl-0 = <&epa_elna_pins>;
mediatek,mtd-eeprom = <&factory 0x0>;
};

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// SPDX-License-Identifier: (GPL-2.0-only OR MIT)
/dts-v1/;
#include <dt-bindings/input/input.h>
#include <dt-bindings/gpio/gpio.h>
#include "mt7622.dtsi"
#include "mt6380.dtsi"
/ {
model = "TOTOLINK A8000RU";
compatible = "totolink,a8000ru", "mediatek,mt7622";
aliases {
label-mac-device = &gmac0;
led-boot = &led_status;
led-failsafe = &led_status;
led-running = &led_status;
led-upgrade = &led_status;
serial0 = &uart0;
};
chosen {
stdout-path = "serial0:115200n8";
bootargs = "earlycon=uart8250,mmio32,0x11002000 swiotlb=512";
};
cpus {
cpu@0 {
proc-supply = <&mt6380_vcpu_reg>;
sram-supply = <&mt6380_vm_reg>;
};
cpu@1 {
proc-supply = <&mt6380_vcpu_reg>;
sram-supply = <&mt6380_vm_reg>;
};
};
gpio-keys {
compatible = "gpio-keys";
reset {
label = "reset";
linux,code = <KEY_RESTART>;
gpios = <&pio 0 GPIO_ACTIVE_LOW>;
};
wps {
label = "wps";
linux,code = <KEY_WPS_BUTTON>;
gpios = <&pio 102 GPIO_ACTIVE_LOW>;
};
};
gpio-leds {
compatible = "gpio-leds";
led_status: status_red {
label = "red:status";
gpios = <&pio 81 GPIO_ACTIVE_LOW>;
default-state = "on";
};
};
reg_1p8v: regulator-1p8v {
compatible = "regulator-fixed";
regulator-name = "fixed-1.8V";
regulator-min-microvolt = <1800000>;
regulator-max-microvolt = <1800000>;
regulator-always-on;
};
reg_3p3v: regulator-3p3v {
compatible = "regulator-fixed";
regulator-name = "fixed-3.3V";
regulator-min-microvolt = <3300000>;
regulator-max-microvolt = <3300000>;
regulator-boot-on;
regulator-always-on;
};
rtkgsw: rtkgsw@0 {
compatible = "mediatek,rtk-gsw";
mediatek,ethsys = <&ethsys>;
mediatek,mdio = <&mdio>;
mediatek,reset-pin = <&pio 54 0>;
status = "okay";
};
};
&pcie0 {
pinctrl-names = "default";
pinctrl-0 = <&pcie0_pins>;
status = "okay";
};
&slot0 {
mt7615@0,0 {
reg = <0x0000 0 0 0 0>;
mediatek,mtd-eeprom = <&factory 0x5000>;
ieee80211-freq-limit = <5490000 6000000>;
};
};
&pcie1 {
pinctrl-names = "default";
pinctrl-0 = <&pcie1_pins>;
status = "okay";
};
&slot1 {
mt7615@0,0 {
reg = <0x0000 0 0 0 0>;
mediatek,mtd-eeprom = <&factory 0x10000>;
ieee80211-freq-limit = <5000000 5490000>;
};
};
&pio {
eth_pins: eth-pins {
mux {
function = "eth";
groups = "mdc_mdio", "rgmii_via_gmac2";
};
};
pcie0_pins: pcie0-pins {
mux {
function = "pcie";
groups = "pcie0_pad_perst",
"pcie0_1_waken",
"pcie0_1_clkreq";
};
};
pcie1_pins: pcie1-pins {
mux {
function = "pcie";
groups = "pcie1_pad_perst",
"pcie1_0_waken",
"pcie1_0_clkreq";
};
};
pmic_bus_pins: pmic-bus-pins {
mux {
function = "pmic";
groups = "pmic_bus";
};
};
/* serial NAND is shared pin with SPI-NOR */
serial_nand_pins: serial-nand-pins {
mux {
function = "flash";
groups = "snfi";
};
};
uart0_pins: uart0-pins {
mux {
function = "uart";
groups = "uart0_0_tx_rx" ;
};
};
watchdog_pins: watchdog-pins {
mux {
function = "watchdog";
groups = "watchdog";
};
};
epa_elna_pins: epa-elna-pins {
mux {
function = "antsel";
groups = "antsel0", "antsel1", "antsel2", "antsel3",
"antsel4", "antsel5", "antsel6", "antsel7",
"antsel8", "antsel9", "antsel12", "antsel13",
"antsel14", "antsel15", "antsel16", "antsel17";
};
};
};
&eth {
status = "okay";
pinctrl-names = "default";
pinctrl-0 = <&eth_pins>;
gmac0: mac@0 {
compatible = "mediatek,eth-mac";
reg = <0>;
nvmem-cells = <&macaddr_factory_2a>;
nvmem-cell-names = "mac-address";
phy-connection-type = "2500base-x";
fixed-link {
speed = <2500>;
full-duplex;
pause;
};
};
gmac1: mac@1 {
compatible = "mediatek,eth-mac";
reg = <1>;
phy-mode = "rgmii";
nvmem-cells = <&macaddr_factory_24>;
nvmem-cell-names = "mac-address";
fixed-link {
speed = <1000>;
full-duplex;
pause;
};
};
mdio: mdio-bus {
#address-cells = <1>;
#size-cells = <0>;
};
};
&pwrap {
pinctrl-names = "default";
pinctrl-0 = <&pmic_bus_pins>;
status = "okay";
};
&bch {
status = "okay";
};
&snfi {
pinctrl-names = "default";
pinctrl-0 = <&serial_nand_pins>;
status = "okay";
flash@0 {
compatible = "spi-nand";
reg = <0>;
spi-tx-bus-width = <4>;
spi-rx-bus-width = <4>;
nand-ecc-engine = <&snfi>;
mediatek,bmt-v2;
partitions {
compatible = "fixed-partitions";
#address-cells = <1>;
#size-cells = <1>;
partition@0 {
label = "Preloader";
reg = <0x0 0x80000>;
read-only;
};
partition@80000 {
label = "ATF";
reg = <0x80000 0x40000>;
read-only;
};
partition@c0000 {
label = "u-boot";
reg = <0xc0000 0x80000>;
read-only;
};
partition@140000 {
label = "u-boot-env";
reg = <0x140000 0x80000>;
read-only;
};
factory: partition@1c0000 {
label = "factory";
reg = <0x1c0000 0x40000>;
read-only;
};
partition@200000 {
label = "ubi";
reg = <0x200000 0x6400000>;
};
partition@6600000 {
label = "User_data";
reg = <0x6600000 0x100000>;
};
/* size of this partition varies due to BMT & bad blocks. */
partition@6700000 {
label = "reserved";
reg = <0x6700000 0>;
};
};
};
};
&factory {
compatible = "nvmem-cells";
#address-cells = <1>;
#size-cells = <1>;
macaddr_factory_24: macaddr@24 {
reg = <0x24 0x6>;
};
macaddr_factory_2a: macaddr@2a {
reg = <0x2a 0x6>;
};
};
&ssusb {
vusb33-supply = <&reg_3p3v>;
status = "okay";
};
&u3phy {
status = "okay";
};
&uart0 {
pinctrl-names = "default";
pinctrl-0 = <&uart0_pins>;
status = "okay";
};
&watchdog {
pinctrl-names = "default";
pinctrl-0 = <&watchdog_pins>;
status = "okay";
};
&wmac {
pinctrl-names = "default";
pinctrl-0 = <&epa_elna_pins>;
mediatek,mtd-eeprom = <&factory 0x0>;
status = "okay";
};

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// SPDX-License-Identifier: GPL-2.0-or-later OR MIT
#include "mt7622-ubnt-unifi-6-lr.dtsi"
/ {
model = "Ubiquiti UniFi 6 LR (U-Boot mod)";
compatible = "ubnt,unifi-6-lr-ubootmod", "mediatek,mt7622";
};
&nor_partitions {
partition@0 {
label = "bl2";
reg = <0x0 0x20000>;
};
partition@20000 {
label = "fip";
reg = <0x20000 0xa0000>;
};
partition@c0000 {
label = "u-boot-env";
reg = <0xc0000 0x10000>;
};
factory: partition@d0000 {
label = "factory";
reg = <0xd0000 0x40000>;
read-only;
};
eeprom: partition@110000 {
label = "eeprom";
reg = <0x110000 0x10000>;
read-only;
};
partition@120000 {
label = "recovery";
reg = <0x120000 0xee0000>;
};
partition@1000000 {
compatible = "denx,fit";
label = "firmware";
reg = <0x1000000 0x3000000>;
};
};
&wmac {
mediatek,mtd-eeprom = <&factory 0x0>;
nvmem-cells = <&macaddr_eeprom_0>;
nvmem-cell-names = "mac-address";
status = "okay";
};
&slot0 {
wifi@0,0 {
reg = <0x0 0 0 0 0>;
mediatek,mtd-eeprom = <&factory 0x20000>;
nvmem-cells = <&macaddr_eeprom_6>;
nvmem-cell-names = "mac-address";
ieee80211-freq-limit = <5000000 6000000>;
};
};
&gmac0 {
nvmem-cells = <&macaddr_eeprom_0>;
nvmem-cell-names = "mac-address";
};
&eeprom {
compatible = "nvmem-cells";
#address-cells = <1>;
#size-cells = <1>;
macaddr_eeprom_0: macaddr@0 {
reg = <0x0 0x6>;
};
macaddr_eeprom_6: macaddr@6 {
reg = <0x6 0x6>;
};
};

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// SPDX-License-Identifier: GPL-2.0-or-later OR MIT
#include "mt7622-ubnt-unifi-6-lr.dtsi"
/ {
model = "Ubiquiti UniFi 6 LR";
compatible = "ubnt,unifi-6-lr", "mediatek,mt7622";
};
&nor_partitions {
partition@0 {
label = "preloader";
reg = <0x0 0x40000>;
};
partition@40000 {
label = "atf";
reg = <0x40000 0x20000>;
};
partition@60000 {
label = "u-boot";
reg = <0x60000 0x60000>;
};
partition@c0000 {
label = "u-boot-env";
reg = <0xc0000 0x10000>;
};
factory: partition@d0000 {
label = "factory";
reg = <0xd0000 0x40000>;
read-only;
};
eeprom: partition@110000 {
label = "eeprom";
reg = <0x110000 0x10000>;
read-only;
};
partition@120000 {
label = "bs";
reg = <0x120000 0x10000>;
};
partition@130000 {
label = "cfg";
reg = <0x130000 0x100000>;
read-only;
};
partition@230000 {
compatible = "denx,fit";
label = "firmware";
reg = <0x230000 0x1ee0000>;
};
partition@2110000 {
label = "kernel1";
reg = <0x2110000 0x1ee0000>;
};
};
&wmac {
mediatek,mtd-eeprom = <&factory 0x0>;
nvmem-cells = <&macaddr_eeprom_0>;
nvmem-cell-names = "mac-address";
status = "okay";
};
&slot0 {
wifi@0,0 {
reg = <0x0 0 0 0 0>;
mediatek,mtd-eeprom = <&factory 0x20000>;
nvmem-cells = <&macaddr_eeprom_6>;
nvmem-cell-names = "mac-address";
ieee80211-freq-limit = <5000000 6000000>;
};
};
&gmac0 {
nvmem-cells = <&macaddr_eeprom_0>;
nvmem-cell-names = "mac-address";
};
&eeprom {
compatible = "nvmem-cells";
#address-cells = <1>;
#size-cells = <1>;
macaddr_eeprom_0: macaddr@0 {
reg = <0x0 0x6>;
};
macaddr_eeprom_6: macaddr@6 {
reg = <0x6 0x6>;
};
};

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// SPDX-License-Identifier: GPL-2.0-or-later OR MIT
/dts-v1/;
#include <dt-bindings/input/input.h>
#include <dt-bindings/gpio/gpio.h>
#include <dt-bindings/leds/common.h>
#include "mt7622.dtsi"
#include "mt6380.dtsi"
/ {
aliases {
led-boot = &led_blue;
led-failsafe = &led_blue;
led-running = &led_blue;
led-upgrade = &led_blue;
label-mac-device = &gmac0;
serial0 = &uart0;
};
chosen {
stdout-path = "serial0:115200n8";
bootargs = "earlycon=uart8250,mmio32,0x11002000 swiotlb=512 console=ttyS0,115200n8";
};
cpus {
cpu@0 {
proc-supply = <&mt6380_vcpu_reg>;
sram-supply = <&mt6380_vm_reg>;
};
cpu@1 {
proc-supply = <&mt6380_vcpu_reg>;
sram-supply = <&mt6380_vm_reg>;
};
};
gpio-keys {
compatible = "gpio-keys";
reset {
label = "reset";
linux,code = <KEY_RESTART>;
gpios = <&pio 62 GPIO_ACTIVE_LOW>;
};
};
memory {
reg = <0 0x40000000 0 0x3f000000>;
};
reg_1p8v: regulator-1p8v {
compatible = "regulator-fixed";
regulator-name = "fixed-1.8V";
regulator-min-microvolt = <1800000>;
regulator-max-microvolt = <1800000>;
regulator-always-on;
};
reg_3p3v: regulator-3p3v {
compatible = "regulator-fixed";
regulator-name = "fixed-3.3V";
regulator-min-microvolt = <3300000>;
regulator-max-microvolt = <3300000>;
regulator-boot-on;
regulator-always-on;
};
};
&pcie0 {
pinctrl-names = "default";
pinctrl-0 = <&pcie0_pins>;
status = "okay";
};
&pio {
eth_pins: eth-pins {
mux {
function = "eth";
groups = "mdc_mdio", "rgmii_via_gmac2";
};
};
pcie0_pins: pcie0-pins {
mux {
function = "pcie";
groups = "pcie0_pad_perst",
"pcie0_1_waken",
"pcie0_1_clkreq";
};
};
pcie1_pins: pcie1-pins {
mux {
function = "pcie";
groups = "pcie1_pad_perst",
"pcie1_0_waken",
"pcie1_0_clkreq";
};
};
pmic_bus_pins: pmic-bus-pins {
mux {
function = "pmic";
groups = "pmic_bus";
};
};
spi_nor_pins: spi-nor-pins {
mux {
function = "flash";
groups = "spi_nor";
};
};
uart0_pins: uart0-pins {
mux {
function = "uart";
groups = "uart0_0_tx_rx" ;
};
};
uart3_pins: uart3-pins {
mux {
function = "uart";
groups = "uart3_1_tx_rx" ;
};
};
i2c0_pins: i2c0-pins {
mux {
function = "i2c";
groups = "i2c0";
};
};
watchdog_pins: watchdog-pins {
mux {
function = "watchdog";
groups = "watchdog";
};
};
};
&bch {
status = "okay";
};
&btif {
status = "disabled";
};
&eth {
status = "okay";
pinctrl-names = "default";
pinctrl-0 = <&eth_pins>;
gmac0: mac@0 {
compatible = "mediatek,eth-mac";
reg = <0>;
phy-mode = "2500base-x";
phy-handle = <&phy0>;
phy-connection-type = "2500base-x";
};
mdio: mdio-bus {
#address-cells = <1>;
#size-cells = <0>;
phy0: ethernet-phy@8 {
compatible = "ethernet-phy-ieee802.3-c45";
reg = <0x8>;
};
};
};
&pwrap {
pinctrl-names = "default";
pinctrl-0 = <&pmic_bus_pins>;
status = "okay";
};
&nor_flash {
pinctrl-names = "default";
pinctrl-0 = <&spi_nor_pins>;
status = "okay";
flash@0 {
compatible = "jedec,spi-nor";
reg = <0>;
spi-max-frequency = <50000000>;
nor_partitions: partitions {
compatible = "fixed-partitions";
#address-cells = <1>;
#size-cells = <1>;
};
};
};
&uart0 {
pinctrl-names = "default";
pinctrl-0 = <&uart0_pins>;
status = "okay";
};
&uart3 {
pinctrl-names = "default";
pinctrl-0 = <&uart3_pins>;
status = "okay";
/* MT7915 Bluetooth */
};
&i2c0 {
pinctrl-names = "default";
pinctrl-0 = <&i2c0_pins>;
status = "okay";
led-controller@30 {
compatible = "ubnt,ledbar";
reg = <0x30>;
enable-gpio = <&pio 59 0>;
red {
label = "red";
};
green {
label = "green";
};
led_blue: blue {
label = "blue";
};
};
};
&watchdog {
pinctrl-names = "default";
pinctrl-0 = <&watchdog_pins>;
status = "okay";
};

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// SPDX-License-Identifier: GPL-2.0-or-later OR MIT
/dts-v1/;
#include <dt-bindings/input/input.h>
#include <dt-bindings/gpio/gpio.h>
#include "mt7622.dtsi"
#include "mt6380.dtsi"
/ {
model = "Xiaomi Redmi Router AX6S";
compatible = "xiaomi,redmi-router-ax6s", "mediatek,mt7622";
aliases {
serial0 = &uart0;
led-boot = &led_power_amber;
led-failsafe = &led_power_amber;
led-running = &led_power_blue;
led-upgrade = &led_power_blue;
};
chosen {
stdout-path = "serial0:115200n8";
bootargs = "earlycon=uart8250,mmio32,0x11002000 console=ttyS0,115200n8 swiotlb=512";
};
memory {
reg = <0 0x40000000 0 0x8000000>;
};
leds {
compatible = "gpio-leds";
led_power_blue: power_blue {
label = "blue:power";
gpios = <&pio 18 GPIO_ACTIVE_LOW>;
};
led_power_amber: power_amber {
label = "amber:power";
gpios = <&pio 17 GPIO_ACTIVE_LOW>;
};
led_net_blue: net_blue {
label = "blue:net";
gpios = <&pio 01 GPIO_ACTIVE_LOW>;
};
led_net_amber: net_amber {
label = "amber:net";
gpios = <&pio 16 GPIO_ACTIVE_LOW>;
};
};
keys {
compatible = "gpio-keys";
reset {
label = "reset";
gpios = <&pio 0 GPIO_ACTIVE_LOW>;
linux,code = <KEY_RESTART>;
};
mesh {
label = "mesh";
gpios = <&pio 102 GPIO_ACTIVE_LOW>;
linux,code = <BTN_9>;
linux,input-type = <EV_SW>;
};
};
};
&cpu0 {
proc-supply = <&mt6380_vcpu_reg>;
sram-supply = <&mt6380_vm_reg>;
};
&cpu1 {
proc-supply = <&mt6380_vcpu_reg>;
sram-supply = <&mt6380_vm_reg>;
};
&pio {
eth_pins: eth-pins {
mux {
function = "eth";
groups = "mdc_mdio", "rgmii_via_gmac2";
};
};
pcie0_pins: pcie0-pins {
mux {
function = "pcie";
groups = "pcie0_pad_perst",
"pcie0_1_waken",
"pcie0_1_clkreq";
};
};
pmic_bus_pins: pmic-bus-pins {
mux {
function = "pmic";
groups = "pmic_bus";
};
};
pwm7_pins: pwm1-2-pins {
mux {
function = "pwm";
groups = "pwm_ch7_2";
};
};
/* Serial NAND is shared pin with SPI-NOR */
serial_nand_pins: serial-nand-pins {
mux {
function = "flash";
groups = "snfi";
};
};
uart0_pins: uart0-pins {
mux {
function = "uart";
groups = "uart0_0_tx_rx" ;
};
};
watchdog_pins: watchdog-pins {
mux {
function = "watchdog";
groups = "watchdog";
};
};
};
&eth {
pinctrl-names = "default";
pinctrl-0 = <&eth_pins>;
status = "okay";
gmac0: mac@0 {
compatible = "mediatek,eth-mac";
reg = <0>;
phy-connection-type = "2500base-x";
nvmem-cells = <&macaddr_factory_4>;
nvmem-cell-names = "mac-address";
mac-address-increment = <(-1)>;
fixed-link {
speed = <2500>;
full-duplex;
pause;
};
};
mdio-bus {
#address-cells = <1>;
#size-cells = <0>;
switch@0 {
compatible = "mediatek,mt7531";
reg = <0>;
interrupt-controller;
#interrupt-cells = <1>;
interrupt-parent = <&pio>;
interrupts = <53 IRQ_TYPE_LEVEL_HIGH>;
reset-gpios = <&pio 54 GPIO_ACTIVE_HIGH>;
ports {
#address-cells = <1>;
#size-cells = <0>;
wan: port@1 {
reg = <1>;
label = "wan";
};
port@2 {
reg = <2>;
label = "lan1";
};
port@3 {
reg = <3>;
label = "lan2";
};
port@4 {
reg = <4>;
label = "lan3";
};
port@6 {
reg = <6>;
label = "cpu";
ethernet = <&gmac0>;
phy-mode = "2500base-x";
fixed-link {
speed = <2500>;
full-duplex;
pause;
};
};
};
};
};
};
&bch {
status = "okay";
};
&snfi {
pinctrl-names = "default";
pinctrl-0 = <&serial_nand_pins>;
status = "okay";
flash@0 {
compatible = "spi-nand";
reg = <0>;
spi-tx-bus-width = <4>;
spi-rx-bus-width = <4>;
nand-ecc-engine = <&snfi>;
mediatek,bmt-v2;
mediatek,bmt-table-size = <0x1000>;
mediatek,bmt-remap-range = <0x0 0x6c0000>;
partitions {
compatible = "fixed-partitions";
#address-cells = <1>;
#size-cells = <1>;
partition@0 {
label = "Preloader";
reg = <0x0 0x80000>;
read-only;
};
partition@80000 {
label = "ATF";
reg = <0x80000 0x40000>;
read-only;
};
partition@c0000 {
label = "u-boot";
reg = <0xc0000 0x80000>;
read-only;
};
partition@140000 {
label = "u-boot-env";
reg = <0x140000 0x40000>;
};
partition@180000 {
label = "bdata";
reg = <0x180000 0x40000>;
};
factory: partition@1c0000 {
label = "factory";
reg = <0x1c0000 0x80000>;
read-only;
compatible = "nvmem-cells";
#address-cells = <1>;
#size-cells = <1>;
macaddr_factory_4: macaddr@4 {
reg = <0x4 0x6>;
};
};
partition@240000 {
label = "crash";
reg = <0x240000 0x40000>;
read-only;
};
partition@280000 {
label = "crash_log";
reg = <0x280000 0x40000>;
read-only;
};
/* Shrunk and renamed from "firmware"
* as to not break luci size checks
*/
partition@2c0000 {
label = "kernel";
compatible = "denx,fit";
reg = <0x2c0000 0x400000>;
};
/* ubi partition is the result of squashing
* consecutive stock partitions:
* - firmware (partially)
* - firmware1
* - overlay
* - obr
*/
partition@6c0000 {
label = "ubi";
reg = <0x6C0000 0x6f00000>;
};
};
};
};
&pcie0 {
pinctrl-names = "default";
pinctrl-0 = <&pcie0_pins>;
status = "okay";
};
&slot0 {
status = "okay";
wifi@0,0 {
compatible = "mediatek,mt76";
reg = <0x0000 0 0 0 0>;
mediatek,mtd-eeprom = <&factory 0x5000>;
ieee80211-freq-limit = <5000000 6000000>;
};
};
&pwm {
pinctrl-names = "default";
pinctrl-0 = <&pwm7_pins>;
status = "okay";
};
&pwrap {
pinctrl-names = "default";
pinctrl-0 = <&pmic_bus_pins>;
status = "okay";
};
&rtc {
status = "disabled";
};
&uart0 {
pinctrl-names = "default";
pinctrl-0 = <&uart0_pins>;
status = "okay";
};
&watchdog {
pinctrl-names = "default";
pinctrl-0 = <&watchdog_pins>;
status = "okay";
};
&wmac {
status = "okay";
mediatek,mtd-eeprom = <&factory 0x0>;
};

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// SPDX-License-Identifier: (GPL-2.0-or-later OR MIT)
/*
* Copyright 2018 Kristian Evensen <kristian.evensen@gmail.com>
*/
/dts-v1/;
#include "mt7623a-unielec-u7623-02.dtsi"
/ {
model = "UniElec U7623-02 eMMC (legacy loader, 512M RAM)";
compatible = "unielec,u7623-02-emmc-512m", "unielec,u7623-02", "mediatek,mt7623";
chosen {
bootargs = "earlycon=uart8250,mmio32,0x11004000 console=ttyS0,115200 blkdevparts=mmcblk0:3M@6M(recovery),256M@9M(root) rootfstype=squashfs root=/dev/mmcblk0p2";
};
memory@80000000 {
device_type = "memory";
reg = <0 0x80000000 0 0x20000000>;
};
};

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// SPDX-License-Identifier: (GPL-2.0-or-later OR MIT)
/*
* Copyright 2018 Kristian Evensen <kristian.evensen@gmail.com>
*/
/dts-v1/;
#include "mt7623a-unielec-u7623-02.dtsi"
/ {
model = "UniElec U7623-02 eMMC";
compatible = "unielec,u7623-02", "mediatek,mt7623";
};

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// SPDX-License-Identifier: (GPL-2.0-or-later OR MIT)
/*
* Copyright 2018 Kristian Evensen <kristian.evensen@gmail.com>
*/
#include <dt-bindings/input/input.h>
#include "mt7623.dtsi"
#include "mt6323.dtsi"
/ {
compatible = "unielec,u7623-02", "mediatek,mt7623";
aliases {
serial0 = &uart2;
ethernet0 = &gmac0;
mmc0 = &mmc0;
led-boot = &led3_green;
led-failsafe = &led3_green;
led-running = &led3_green;
led-upgrade = &led3_green;
};
chosen {
stdout-path = "serial0:115200n8";
};
cpus {
cpu@0 {
proc-supply = <&mt6323_vproc_reg>;
};
cpu@1 {
proc-supply = <&mt6323_vproc_reg>;
};
cpu@2 {
proc-supply = <&mt6323_vproc_reg>;
};
cpu@3 {
proc-supply = <&mt6323_vproc_reg>;
};
};
reg_1p8v: regulator-1p8v {
compatible = "regulator-fixed";
regulator-name = "fixed-1.8V";
regulator-min-microvolt = <1800000>;
regulator-max-microvolt = <1800000>;
regulator-boot-on;
regulator-always-on;
};
reg_3p3v: regulator-3p3v {
compatible = "regulator-fixed";
regulator-name = "fixed-3.3V";
regulator-min-microvolt = <3300000>;
regulator-max-microvolt = <3300000>;
regulator-boot-on;
regulator-always-on;
};
reg_5v: regulator-5v {
compatible = "regulator-fixed";
regulator-name = "fixed-5V";
regulator-min-microvolt = <5000000>;
regulator-max-microvolt = <5000000>;
regulator-boot-on;
regulator-always-on;
};
gpio-keys {
compatible = "gpio-keys";
pinctrl-names = "default";
pinctrl-0 = <&key_pins_a>;
factory {
label = "factory";
linux,code = <KEY_RESTART>;
gpios = <&pio 256 GPIO_ACTIVE_LOW>;
};
};
leds {
compatible = "gpio-leds";
pinctrl-names = "default";
pinctrl-0 = <&led_pins_unielec>;
led3_green: led3 {
label = "u7623-01:green:led3";
gpios = <&pio 14 GPIO_ACTIVE_LOW>;
};
led4 {
label = "u7623-01:green:led4";
gpios = <&pio 15 GPIO_ACTIVE_LOW>;
};
};
};
&crypto {
status = "okay";
};
&eth {
status = "okay";
gmac0: mac@0 {
compatible = "mediatek,eth-mac";
reg = <0>;
phy-mode = "trgmii";
fixed-link {
speed = <1000>;
full-duplex;
pause;
};
};
mdio: mdio-bus {
#address-cells = <1>;
#size-cells = <0>;
mt7530: switch@0 {
compatible = "mediatek,mt7530";
};
};
};
&mt7530 {
compatible = "mediatek,mt7530";
#address-cells = <1>;
#size-cells = <0>;
reg = <0>;
pinctrl-names = "default";
mediatek,mcm;
resets = <&ethsys 2>;
reset-names = "mcm";
core-supply = <&mt6323_vpa_reg>;
io-supply = <&mt6323_vemc3v3_reg>;
dsa,mii-bus = <&mdio>;
ports {
#address-cells = <1>;
#size-cells = <0>;
reg = <0>;
port@0 {
reg = <0>;
label = "lan0";
cpu = <&cpu_port0>;
};
port@1 {
reg = <1>;
label = "lan1";
cpu = <&cpu_port0>;
};
port@2 {
reg = <2>;
label = "lan2";
cpu = <&cpu_port0>;
};
port@3 {
reg = <3>;
label = "lan3";
cpu = <&cpu_port0>;
};
port@4 {
reg = <4>;
label = "wan";
cpu = <&cpu_port0>;
};
cpu_port0: port@6 {
reg = <6>;
label = "cpu";
ethernet = <&gmac0>;
phy-mode = "trgmii";
fixed-link {
speed = <1000>;
full-duplex;
};
};
};
};
&mmc0 {
pinctrl-names = "default", "state_uhs";
pinctrl-0 = <&mmc0_pins_default>;
pinctrl-1 = <&mmc0_pins_uhs>;
status = "okay";
bus-width = <8>;
max-frequency = <50000000>;
cap-mmc-highspeed;
vmmc-supply = <&reg_3p3v>;
vqmmc-supply = <&reg_1p8v>;
non-removable;
};
&pio {
key_pins_a: keys-alt {
pins-keys {
pinmux = <MT7623_PIN_256_GPIO256_FUNC_GPIO256>,
<MT7623_PIN_257_GPIO257_FUNC_GPIO257>;
input-enable;
};
};
led_pins_unielec: leds-unielec {
pins-leds {
pinmux = <MT7623_PIN_14_GPIO14_FUNC_GPIO14>,
<MT7623_PIN_15_GPIO15_FUNC_GPIO15>;
};
};
mmc0_pins_default: mmc0default {
pins_cmd_dat {
pinmux = <MT7623_PIN_111_MSDC0_DAT7_FUNC_MSDC0_DAT7>,
<MT7623_PIN_112_MSDC0_DAT6_FUNC_MSDC0_DAT6>,
<MT7623_PIN_113_MSDC0_DAT5_FUNC_MSDC0_DAT5>,
<MT7623_PIN_114_MSDC0_DAT4_FUNC_MSDC0_DAT4>,
<MT7623_PIN_118_MSDC0_DAT3_FUNC_MSDC0_DAT3>,
<MT7623_PIN_119_MSDC0_DAT2_FUNC_MSDC0_DAT2>,
<MT7623_PIN_120_MSDC0_DAT1_FUNC_MSDC0_DAT1>,
<MT7623_PIN_121_MSDC0_DAT0_FUNC_MSDC0_DAT0>,
<MT7623_PIN_116_MSDC0_CMD_FUNC_MSDC0_CMD>;
input-enable;
bias-pull-up;
};
pins_clk {
pinmux = <MT7623_PIN_117_MSDC0_CLK_FUNC_MSDC0_CLK>;
bias-pull-down;
};
pins_rst {
pinmux = <MT7623_PIN_115_MSDC0_RSTB_FUNC_MSDC0_RSTB>;
bias-pull-up;
};
};
mmc0_pins_uhs: mmc0 {
pins_cmd_dat {
pinmux = <MT7623_PIN_111_MSDC0_DAT7_FUNC_MSDC0_DAT7>,
<MT7623_PIN_112_MSDC0_DAT6_FUNC_MSDC0_DAT6>,
<MT7623_PIN_113_MSDC0_DAT5_FUNC_MSDC0_DAT5>,
<MT7623_PIN_114_MSDC0_DAT4_FUNC_MSDC0_DAT4>,
<MT7623_PIN_118_MSDC0_DAT3_FUNC_MSDC0_DAT3>,
<MT7623_PIN_119_MSDC0_DAT2_FUNC_MSDC0_DAT2>,
<MT7623_PIN_120_MSDC0_DAT1_FUNC_MSDC0_DAT1>,
<MT7623_PIN_121_MSDC0_DAT0_FUNC_MSDC0_DAT0>,
<MT7623_PIN_116_MSDC0_CMD_FUNC_MSDC0_CMD>;
input-enable;
drive-strength = <MTK_DRIVE_2mA>;
bias-pull-up = <MTK_PUPD_SET_R1R0_01>;
};
pins_clk {
pinmux = <MT7623_PIN_117_MSDC0_CLK_FUNC_MSDC0_CLK>;
drive-strength = <MTK_DRIVE_2mA>;
bias-pull-down = <MTK_PUPD_SET_R1R0_01>;
};
pins_rst {
pinmux = <MT7623_PIN_115_MSDC0_RSTB_FUNC_MSDC0_RSTB>;
bias-pull-up;
};
};
pcie_default: pcie_pin_default {
pins_cmd_dat {
pinmux = <MT7623_PIN_208_AUD_EXT_CK1_FUNC_PCIE0_PERST_N>,
<MT7623_PIN_209_AUD_EXT_CK2_FUNC_PCIE1_PERST_N>;
bias-disable;
};
};
};
&pwm {
pinctrl-names = "default";
pinctrl-0 = <&pwm_pins_a>;
status = "okay";
};
&pwrap {
mt6323 {
mt6323led: led {
compatible = "mediatek,mt6323-led";
#address-cells = <1>;
#size-cells = <0>;
led@0 {
reg = <0>;
label = "led0";
};
};
};
};
&mt6323keys {
mediatek,long-press-mode = <0>;
};
&uart2 {
pinctrl-names = "default";
pinctrl-0 = <&uart2_pins_b>;
status = "okay";
};
&usb1 {
vusb33-supply = <&reg_3p3v>;
vbus-supply = <&reg_3p3v>;
status = "okay";
};
&u3phy1 {
status = "okay";
};
&u3phy2 {
status = "okay";
mediatek,phy-switch = <&hifsys>;
};
&pcie {
pinctrl-names = "default";
pinctrl-0 = <&pcie_default>;
status = "okay";
pcie@0,0 {
status = "okay";
};
pcie@1,0 {
status = "okay";
};
pcie@2,0 {
status = "okay";
};
};
&pcie0_phy {
status = "okay";
};
&pcie1_phy {
status = "okay";
};