mirror of
https://github.com/Ysurac/openmptcprouter.git
synced 2025-03-09 15:40:20 +00:00
Add first patches for ipq806x, not yet working
This commit is contained in:
Ycarus (Yannick Chabanois)
parent
8b0902eedc
commit
7ba6ee7b09
26 changed files with 2950 additions and 0 deletions
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@ -0,0 +1,355 @@
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--- a/arch/arm/boot/dts/qcom-ipq8064.dtsi
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+++ b/arch/arm/boot/dts/qcom-ipq8064.dtsi
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@@ -8,6 +8,8 @@
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#include <dt-bindings/reset/qcom,gcc-ipq806x.h>
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#include <dt-bindings/soc/qcom,gsbi.h>
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#include <dt-bindings/interrupt-controller/arm-gic.h>
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+#include <dt-bindings/mfd/qcom-rpm.h>
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+#include <dt-bindings/clock/qcom,rpmcc.h>
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/ {
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#address-cells = <1>;
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@@ -28,6 +30,16 @@
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next-level-cache = <&L2>;
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qcom,acc = <&acc0>;
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qcom,saw = <&saw0>;
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+ clocks = <&kraitcc 0>, <&kraitcc 4>;
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+ clock-names = "cpu", "l2";
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+ clock-latency = <100000>;
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+ cpu-supply = <&smb208_s2a>;
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+ operating-points-v2 = <&opp_table0>;
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+ voltage-tolerance = <5>;
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+ cooling-min-state = <0>;
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+ cooling-max-state = <10>;
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+ #cooling-cells = <2>;
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+ cpu-idle-states = <&CPU_SPC>;
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};
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cpu1: cpu@1 {
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@@ -38,16 +50,130 @@
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next-level-cache = <&L2>;
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qcom,acc = <&acc1>;
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qcom,saw = <&saw1>;
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+ clocks = <&kraitcc 1>, <&kraitcc 4>;
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+ clock-names = "cpu", "l2";
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+ clock-latency = <100000>;
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+ cpu-supply = <&smb208_s2b>;
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+ operating-points-v2 = <&opp_table0>;
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+ voltage-tolerance = <5>;
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+ cooling-min-state = <0>;
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+ cooling-max-state = <10>;
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+ #cooling-cells = <2>;
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+ cpu-idle-states = <&CPU_SPC>;
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+ };
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+
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+ idle-states {
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+ CPU_SPC: spc {
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+ compatible = "qcom,idle-state-spc";
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+ status = "disabled";
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+ entry-latency-us = <400>;
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+ exit-latency-us = <900>;
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+ min-residency-us = <3000>;
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+ };
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};
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+ };
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- L2: l2-cache {
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- compatible = "cache";
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- cache-level = <2>;
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+ opp_table_l2: opp_table_l2 {
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+ compatible = "operating-points-v2";
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+
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+ opp-384000000 {
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+ opp-hz = /bits/ 64 <384000000>;
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+ opp-microvolt = <1100000>;
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+ clock-latency-ns = <100000>;
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+ opp-level = <0>;
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+ };
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+
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+ opp-1000000000 {
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+ opp-hz = /bits/ 64 <1000000000>;
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+ opp-microvolt = <1100000>;
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+ clock-latency-ns = <100000>;
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+ opp-level = <1>;
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+ };
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+
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+ opp-1200000000 {
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+ opp-hz = /bits/ 64 <1200000000>;
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+ opp-microvolt = <1150000>;
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+ clock-latency-ns = <100000>;
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+ opp-level = <2>;
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};
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};
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+ opp_table0: opp_table0 {
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+ compatible = "operating-points-v2-kryo-cpu";
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+ nvmem-cells = <&speedbin_efuse>;
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+
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+ /*
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+ * Voltage thresholds are <target min max>
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+ */
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+ opp-384000000 {
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+ opp-hz = /bits/ 64 <384000000>;
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+ opp-microvolt-speed0-pvs0-v0 = <1000000 950000 1050000>;
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+ opp-microvolt-speed0-pvs1-v0 = <925000 878750 971250>;
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+ opp-microvolt-speed0-pvs2-v0 = <875000 831250 918750>;
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+ opp-microvolt-speed0-pvs3-v0 = <800000 760000 840000>;
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+ opp-supported-hw = <0x1>;
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+ clock-latency-ns = <100000>;
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+ opp-level = <0>;
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+ };
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+
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+ opp-600000000 {
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+ opp-hz = /bits/ 64 <600000000>;
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+ opp-microvolt-speed0-pvs0-v0 = <1050000 997500 1102500>;
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+ opp-microvolt-speed0-pvs1-v0 = <975000 926250 1023750>;
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+ opp-microvolt-speed0-pvs2-v0 = <925000 878750 971250>;
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+ opp-microvolt-speed0-pvs3-v0 = <850000 807500 892500>;
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+ opp-supported-hw = <0x1>;
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+ clock-latency-ns = <100000>;
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+ opp-level = <1>;
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+ };
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+
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+ opp-800000000 {
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+ opp-hz = /bits/ 64 <800000000>;
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+ opp-microvolt-speed0-pvs0-v0 = <1100000 1045000 1155000>;
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+ opp-microvolt-speed0-pvs1-v0 = <1025000 973750 1076250>;
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+ opp-microvolt-speed0-pvs2-v0 = <995000 945250 1044750>;
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+ opp-microvolt-speed0-pvs3-v0 = <900000 855000 945000>;
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+ opp-supported-hw = <0x1>;
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+ clock-latency-ns = <100000>;
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+ opp-level = <1>;
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+ };
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+
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+ opp-1000000000 {
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+ opp-hz = /bits/ 64 <1000000000>;
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+ opp-microvolt-speed0-pvs0-v0 = <1150000 1092500 1207500>;
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+ opp-microvolt-speed0-pvs1-v0 = <1075000 1021250 1128750>;
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+ opp-microvolt-speed0-pvs2-v0 = <1025000 973750 1076250>;
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+ opp-microvolt-speed0-pvs3-v0 = <950000 902500 997500>;
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+ opp-supported-hw = <0x1>;
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+ clock-latency-ns = <100000>;
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+ opp-level = <1>;
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+ };
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+
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+ opp-1200000000 {
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+ opp-hz = /bits/ 64 <1200000000>;
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+ opp-microvolt-speed0-pvs0-v0 = <1200000 1140000 1260000>;
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+ opp-microvolt-speed0-pvs1-v0 = <1125000 1068750 1181250>;
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+ opp-microvolt-speed0-pvs2-v0 = <1075000 1021250 1128750>;
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+ opp-microvolt-speed0-pvs3-v0 = <1000000 950000 1050000>;
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+ opp-supported-hw = <0x1>;
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+ clock-latency-ns = <100000>;
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+ opp-level = <2>;
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+ };
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+
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+ opp-1400000000 {
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+ opp-hz = /bits/ 64 <1400000000>;
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+ opp-microvolt-speed0-pvs0-v0 = <1250000 1187500 1312500>;
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+ opp-microvolt-speed0-pvs1-v0 = <1175000 1116250 1233750>;
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+ opp-microvolt-speed0-pvs2-v0 = <1125000 1068750 1181250>;
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+ opp-microvolt-speed0-pvs3-v0 = <1050000 997500 1102500>;
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+ opp-supported-hw = <0x1>;
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+ clock-latency-ns = <100000>;
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+ opp-level = <2>;
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+ };
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+ };
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+
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thermal-zones {
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tsens_tz_sensor0 {
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polling-delay-passive = <0>;
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polling-delay = <0>;
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thermal-sensors = <&tsens 0>;
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@@ -93,6 +441,15 @@
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};
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};
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+ fab-scaling {
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+ compatible = "qcom,fab-scaling";
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+ clocks = <&rpmcc RPM_APPS_FABRIC_A_CLK>, <&rpmcc RPM_EBI1_A_CLK>;
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+ clock-names = "apps-fab-clk", "ddr-fab-clk";
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+ fab_freq_high = <533000000>;
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+ fab_freq_nominal = <400000000>;
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+ cpu_freq_threshold = <1000000000>;
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+ };
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+
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firmware {
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scm {
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compatible = "qcom,scm-ipq806x", "qcom,scm";
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@@ -120,6 +477,17 @@
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reg-names = "lpass-lpaif";
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};
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+ L2: l2-cache {
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+ compatible = "qcom,krait-cache", "cache";
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+ cache-level = <2>;
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+ qcom,saw = <&saw_l2>;
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+
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+ clocks = <&kraitcc 4>;
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+ clock-names = "l2";
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+ l2-supply = <&smb208_s1a>;
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+ operating-points-v2 = <&opp_table_l2>;
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+ };
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+
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qcom_pinmux: pinmux@800000 {
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compatible = "qcom,ipq8064-pinctrl";
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reg = <0x800000 0x4000>;
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@@ -160,6 +589,15 @@
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};
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};
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+ i2c4_pins: i2c4_pinmux {
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+ mux {
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+ pins = "gpio12", "gpio13";
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+ function = "gsbi4";
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+ drive-strength = <12>;
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+ bias-disable;
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+ };
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+ };
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+
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spi_pins: spi_pins {
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mux {
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pins = "gpio18", "gpio19", "gpio21";
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@@ -169,6 +607,28 @@
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};
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};
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+
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+ mdio0_pins: mdio0_pins {
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+ mux {
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+ pins = "gpio0", "gpio1";
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+ function = "mdio";
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+ drive-strength = <8>;
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+ bias-disable;
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+ };
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+ };
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+
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+ rgmii2_pins: rgmii2_pins {
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+ mux {
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+ pins = "gpio27", "gpio28", "gpio29",
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+ "gpio30", "gpio31", "gpio32",
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+ "gpio51", "gpio52", "gpio59",
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+ "gpio60", "gpio61", "gpio62";
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+ function = "rgmii2";
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+ drive-strength = <8>;
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+ bias-disable;
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+ };
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+ };
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+
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leds_pins: leds_pins {
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mux {
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pins = "gpio7", "gpio8", "gpio9",
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@@ -243,6 +739,22 @@
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regulator;
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};
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+ kraitcc: clock-controller {
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+ compatible = "qcom,krait-cc-v1";
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+ #clock-cells = <1>;
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+ };
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+
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+ saw_l2: regulator@02012000 {
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+ compatible = "qcom,saw2", "syscon";
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+ reg = <0x02012000 0x1000>;
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+ regulator;
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+ };
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+
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+ sic_non_secure: sic-non-secure@12100000 {
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+ compatible = "syscon";
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+ reg = <0x12100000 0x10000>;
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+ };
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+
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gsbi2: gsbi@12480000 {
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compatible = "qcom,gsbi-v1.0.0";
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cell-index = <2>;
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@@ -478,6 +985,11 @@
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#reset-cells = <1>;
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};
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+ sfpb_mutex_block: syscon@1200600 {
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+ compatible = "syscon";
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+ reg = <0x01200600 0x100>;
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+ };
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+
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pcie0: pci@1b500000 {
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compatible = "qcom,pcie-ipq8064";
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reg = <0x1b500000 0x1000
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@@ -739,6 +1335,20 @@
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status = "disabled";
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};
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+ mdio0: mdio@37000000 {
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+ #address-cells = <1>;
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+ #size-cells = <0>;
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+
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+ compatible = "qcom,ipq8064-mdio", "syscon";
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+ reg = <0x37000000 0x200000>;
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+ resets = <&gcc GMAC_CORE1_RESET>;
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+ reset-names = "stmmaceth";
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+ clocks = <&gcc GMAC_CORE1_CLK>;
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+ clock-names = "stmmaceth";
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+
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+ status = "disabled";
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+ };
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+
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vsdcc_fixed: vsdcc-regulator {
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compatible = "regulator-fixed";
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regulator-name = "SDCC Power";
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@@ -814,4 +1463,17 @@
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};
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};
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};
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+
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+ sfpb_mutex: sfpb-mutex {
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+ compatible = "qcom,sfpb-mutex";
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+ syscon = <&sfpb_mutex_block 4 4>;
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+
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+ #hwlock-cells = <1>;
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+ };
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+
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+ smem {
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+ compatible = "qcom,smem";
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+ memory-region = <&smem>;
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+ hwlocks = <&sfpb_mutex 3>;
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+ };
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};
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--- a/arch/arm/boot/dts/qcom-ipq8064.dtsi
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+++ b/arch/arm/boot/dts/qcom-ipq8064.dtsi
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@@ -1020,6 +1020,37 @@
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compatible = "qcom,rpmcc-ipq806x", "qcom,rpmcc";
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#clock-cells = <1>;
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};
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+ regulators {
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+ compatible = "qcom,rpm-smb208-regulators";
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+
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+ smb208_s1a: s1a {
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+ regulator-min-microvolt = <1050000>;
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+ regulator-max-microvolt = <1150000>;
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+
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+ qcom,switch-mode-frequency = <1200000>;
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+ };
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+
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+ smb208_s1b: s1b {
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+ regulator-min-microvolt = <1050000>;
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+ regulator-max-microvolt = <1150000>;
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+
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+ qcom,switch-mode-frequency = <1200000>;
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+ };
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+
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+ smb208_s2a: s2a {
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+ regulator-min-microvolt = < 800000>;
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+ regulator-max-microvolt = <1250000>;
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+
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+ qcom,switch-mode-frequency = <1200000>;
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+ };
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+
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+ smb208_s2b: s2b {
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+ regulator-min-microvolt = < 800000>;
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+ regulator-max-microvolt = <1250000>;
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+
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+ qcom,switch-mode-frequency = <1200000>;
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+ };
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+ };
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};
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tcsr: syscon@1a400000 {
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