From 7e5830b6909f8622df973dc47f57f32af8ad847b Mon Sep 17 00:00:00 2001 From: suyuan <175338101@qq.com> Date: Mon, 28 Dec 2020 13:58:16 +0800 Subject: [PATCH] Create 999-ipq40xx-unlock-cpu-frequency.patch --- .../999-ipq40xx-unlock-cpu-frequency.patch | 57 +++++++++++++++++++ 1 file changed, 57 insertions(+) create mode 100644 root/target/linux/ipq40xx/patches-5.4/999-ipq40xx-unlock-cpu-frequency.patch diff --git a/root/target/linux/ipq40xx/patches-5.4/999-ipq40xx-unlock-cpu-frequency.patch b/root/target/linux/ipq40xx/patches-5.4/999-ipq40xx-unlock-cpu-frequency.patch new file mode 100644 index 00000000..dd654f88 --- /dev/null +++ b/root/target/linux/ipq40xx/patches-5.4/999-ipq40xx-unlock-cpu-frequency.patch @@ -0,0 +1,57 @@ +From: William +Subject: [PATCH] ipq40xx: improve CPU clock +Date: Tue, 15 Dec 2020 15:28:10 +0800 + +This patch will match the clock-latency-ns values in the device tree +for those found inside the OEM device tree and kernel source code and +unlock 896Mhz CPU operating points. + +Signed-off-by: William +--- +--- a/arch/arm/boot/dts/qcom-ipq4019.dtsi ++++ b/arch/arm/boot/dts/qcom-ipq4019.dtsi +@@ -121,23 +121,28 @@ + opp-48000000 { + opp-hz = /bits/ 64 <48000000>; + opp-microvolt = <1100000>; +- clock-latency-ns = <256000>; ++ clock-latency-ns = <100000>; + }; + opp-200000000 { + opp-hz = /bits/ 64 <200000000>; + opp-microvolt = <1100000>; +- clock-latency-ns = <256000>; ++ clock-latency-ns = <100000>; + }; + opp-500000000 { + opp-hz = /bits/ 64 <500000000>; + opp-microvolt = <1100000>; +- clock-latency-ns = <256000>; ++ clock-latency-ns = <100000>; + }; + opp-716000000 { + opp-hz = /bits/ 64 <716000000>; + opp-microvolt = <1100000>; +- clock-latency-ns = <256000>; ++ clock-latency-ns = <100000>; + }; ++ opp-896000000 { ++ opp-hz = /bits/ 64 <896000000>; ++ opp-microvolt = <1100000>; ++ clock-latency-ns = <100000>; ++ }; + }; + + pmu { +--- a/drivers/clk/qcom/gcc-ipq4019.c ++++ b/drivers/clk/qcom/gcc-ipq4019.c +@@ -587,6 +587,9 @@ static const struct freq_tbl ftbl_gcc_ap + F(632000000, P_DDRPLLAPSS, 1, 0, 0), + F(672000000, P_DDRPLLAPSS, 1, 0, 0), + F(716000000, P_DDRPLLAPSS, 1, 0, 0), ++ F(768000000, P_DDRPLLAPSS, 1, 0, 0), ++ F(823000000, P_DDRPLLAPSS, 1, 0, 0), ++ F(896000000, P_DDRPLLAPSS, 1, 0, 0), + { } + }; + \ No newline at end of file