From 815c9d374be85a8b33b5cd9cb783b1d0f55d9b0b Mon Sep 17 00:00:00 2001 From: suyuan168 <175338101@qq.com> Date: Sun, 3 Jul 2022 03:29:10 +0800 Subject: [PATCH] fix gpio hog --- .../arm/boot/dts/qcom-ipq4019-nhx4019.dts | 109 +++++++++--------- 1 file changed, 57 insertions(+), 52 deletions(-) diff --git a/root/target/linux/ipq40xx/files/arch/arm/boot/dts/qcom-ipq4019-nhx4019.dts b/root/target/linux/ipq40xx/files/arch/arm/boot/dts/qcom-ipq4019-nhx4019.dts index 00e3b0a0..26935133 100644 --- a/root/target/linux/ipq40xx/files/arch/arm/boot/dts/qcom-ipq4019-nhx4019.dts +++ b/root/target/linux/ipq40xx/files/arch/arm/boot/dts/qcom-ipq4019-nhx4019.dts @@ -148,58 +148,6 @@ linux,code = ; }; }; - - gpio_export { - compatible = "gpio-export"; - #size-cells = <0>; - - 3vpower { - gpio-export,name = "3vpower"; - gpio-export,output = <1>; - gpio = <&tlmm 19 GPIO_ACTIVE_HIGH>; - }; - - m2power { - gpio-export,name = "m2power"; - gpio-export,output = <1>; - gpio = <&tlmm 48 GPIO_ACTIVE_LOW>; - }; - - m2reset { - gpio-export,name = "m2reset"; - gpio-export,output = <1>; - gpio = <&tlmm 49 GPIO_ACTIVE_LOW>; - }; - - m2dcpower { - gpio-export,name = "m2dcpower"; - gpio-export,output = <1>; - gpio = <&tlmm 51 GPIO_ACTIVE_HIGH>; - }; - - pcie1dcpower { - gpio-export,name = "pcie1dcpower"; - gpio-export,output = <1>; - gpio = <&tlmm 50 GPIO_ACTIVE_HIGH>; - }; - - pcie1rst { - gpio-export,name = "pcie1rst"; - gpio-export,output = <1>; - gpio = <&tlmm 42 GPIO_ACTIVE_LOW>; - }; - - pcie2dcpower { - gpio-export,name = "pcie2dcpower"; - gpio-export,output = <1>; - gpio = <&tlmm 46 GPIO_ACTIVE_HIGH>; - }; - pcie2rst { - gpio-export,name = "pcie2rst"; - gpio-export,output = <1>; - gpio = <&tlmm 43 GPIO_ACTIVE_LOW>; - }; - }; }; &blsp_dma { @@ -394,6 +342,63 @@ bias-disable; }; }; + + 3vpower { + line-name = "3vpower"; + gpio = <&tlmm GPIO_ACTIVE_HIGH>; + gpio-hog; + output-high; + + }; + + m2power { + line-name = "m2power"; + gpio = <&tlmm 48 GPIO_ACTIVE_LOW>; + gpio-hog; + output-low; + }; + + m2reset { + line-name = "m2reset"; + gpio = <&tlmm 49 GPIO_ACTIVE_LOW>; + gpio-hog; + output-low; + }; + + m2dcpower { + line-name = "m2dcpower"; + gpio = <&tlmm 51 GPIO_ACTIVE_HIGH>; + gpio-hog; + output-high; + }; + + pcie1dcpower { + line-name = "pcie1dcpower"; + gpio = <&tlmm 50 GPIO_ACTIVE_HIGH>; + gpio-hog; + output-high; + }; + + pcie1rst { + line-name = "pcie1rst"; + gpio = <&tlmm 42 GPIO_ACTIVE_LOW>; + gpio-hog; + output-low; + }; + + pcie2dcpower { + line-name = "pcie2dcpower"; + gpio = <&tlmm 46 GPIO_ACTIVE_HIGH>; + gpio-hog; + output-high; + }; + pcie2rst { + line-name = "pcie2rst"; + gpio = <&tlmm 43 GPIO_ACTIVE_LOW>; + gpio-hog; + output-low; + }; + }; }; &gmac0 {