mirror of
https://github.com/Ysurac/openmptcprouter.git
synced 2025-02-12 19:31:52 +00:00
Add patches for BPI-R2
This commit is contained in:
Ycarus (Yannick Chabanois)
parent
b1be088d7f
commit
8b04e8ac65
23 changed files with 2179 additions and 15 deletions
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@ -7,11 +7,13 @@ CONFIG_PACKAGE_kmod-cryptodev=y
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CONFIG_OPENSSL_HARDWARE_SUPPORT=y
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CONFIG_OPENSSL_HARDWARE_SUPPORT=y
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CONFIG_OPENSSL_ENGINE_CRYPTO=y
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CONFIG_OPENSSL_ENGINE_CRYPTO=y
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CONFIG_OPENSSL_ENGINE_DIGEST=y
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CONFIG_OPENSSL_ENGINE_DIGEST=y
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CONFIG_PACKAGE_wmt=y
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CONFIG_PACKAGE_kmod-mt6625l-wlan-gen2=y
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CONFIG_PACKAGE_u-boot-bpi_r2=y
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CONFIG_PACKAGE_uboot-envtools=y
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CONFIG_PACKAGE_uboot-envtools=y
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CONFIG_PACKAGE_attr=y
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CONFIG_PACKAGE_attr=y
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CONFIG_PACKAGE_f2fs-tools=y
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CONFIG_PACKAGE_f2fs-tools=y
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CONFIG_PACKAGE_f2fsck=y
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CONFIG_PACKAGE_f2fsck=y
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CONFIG_PACKAGE_mkf2fs=y
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CONFIG_PACKAGE_mkf2fs=y
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# CONFIG_PACKAGE_kmod-fs-nfs-v3 is not set
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# CONFIG_PACKAGE_kmod-fs-nfs-v4 is not set
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# CONFIG_PACKAGE_kmod-rtl8812au-ct is not set
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# CONFIG_PACKAGE_kmod-mt6625l-bt is not set
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# CONFIG_PACKAGE_kmod-mt6625l-wlan-gen-2 is not set
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@ -1,12 +1,4 @@
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# CONFIG_AIO is not set
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# CONFIG_AIO is not set
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CONFIG_AHCI_MTK=y
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CONFIG_ATA=y
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CONFIG_SATA_AHCI=y
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CONFIG_SATA_AHCI_PLATFORM=y
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CONFIG_SCSI=y
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CONFIG_BLK_DEV_SD=y
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CONFIG_RTC_DRV_MT7622=y
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CONFIG_WATCHDOG_SYSFS=y
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CONFIG_ALIGNMENT_TRAP=y
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CONFIG_ALIGNMENT_TRAP=y
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CONFIG_ARCH_32BIT_OFF_T=y
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CONFIG_ARCH_32BIT_OFF_T=y
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CONFIG_ARCH_CLOCKSOURCE_DATA=y
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CONFIG_ARCH_CLOCKSOURCE_DATA=y
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@ -50,9 +42,7 @@ CONFIG_ARM=y
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CONFIG_ARM_APPENDED_DTB=y
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CONFIG_ARM_APPENDED_DTB=y
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CONFIG_ARM_ARCH_TIMER=y
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CONFIG_ARM_ARCH_TIMER=y
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CONFIG_ARM_ARCH_TIMER_EVTSTREAM=y
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CONFIG_ARM_ARCH_TIMER_EVTSTREAM=y
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CONFIG_ARM_ATAG_DTB_COMPAT=y
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# CONFIG_ARM_ATAG_DTB_COMPAT is not set
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CONFIG_ARM_ATAG_DTB_COMPAT_CMDLINE_FROM_BOOTLOADER=y
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# CONFIG_ARM_ATAG_DTB_COMPAT_CMDLINE_EXTEND is not set
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CONFIG_ARM_CPU_SUSPEND=y
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CONFIG_ARM_CPU_SUSPEND=y
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# CONFIG_ARM_CPU_TOPOLOGY is not set
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# CONFIG_ARM_CPU_TOPOLOGY is not set
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# CONFIG_ARM_ERRATA_814220 is not set
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# CONFIG_ARM_ERRATA_814220 is not set
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@ -211,7 +201,6 @@ CONFIG_EINT_MTK=y
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CONFIG_ELF_CORE=y
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CONFIG_ELF_CORE=y
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# CONFIG_ENERGY_MODEL is not set
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# CONFIG_ENERGY_MODEL is not set
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CONFIG_EXT4_FS=y
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CONFIG_EXT4_FS=y
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CONFIG_VFAT_FS=y
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# CONFIG_F2FS_CHECK_FS is not set
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# CONFIG_F2FS_CHECK_FS is not set
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CONFIG_F2FS_FS=y
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CONFIG_F2FS_FS=y
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# CONFIG_F2FS_FS_SECURITY is not set
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# CONFIG_F2FS_FS_SECURITY is not set
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@ -0,0 +1,10 @@
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--- a/arch/arm/boot/dts/mt7623n-bananapi-bpi-r2.dts
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+++ b/arch/arm/boot/dts/mt7623n-bananapi-bpi-r2.dts
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@@ -19,6 +19,7 @@
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chosen {
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stdout-path = "serial2:115200n8";
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+ bootargs = "console=ttyS2,115200n8 root=/dev/mmcblk1p2 rootfstype=ext4 rootwait vmalloc=496M";
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};
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cpus {
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@ -0,0 +1,54 @@
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From 97fdec52fff8079d3af104e8723602a3cb9d2a11 Mon Sep 17 00:00:00 2001
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From: Frank Wunderlich <frank-w@public-files.de>
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Date: Thu, 20 Jun 2019 23:06:41 +0200
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Subject: [PATCH] net: dts: add second gmac for bananapi r2
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---
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arch/arm/boot/dts/mt7623n-bananapi-bpi-r2.dts | 18 ++++++++++++++++--
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1 file changed, 16 insertions(+), 2 deletions(-)
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diff --git a/arch/arm/boot/dts/mt7623n-bananapi-bpi-r2.dts b/arch/arm/boot/dts/mt7623n-bananapi-bpi-r2.dts
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index 2b760f90f38c..fad09608b86c 100644
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--- a/arch/arm/boot/dts/mt7623n-bananapi-bpi-r2.dts
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+++ b/arch/arm/boot/dts/mt7623n-bananapi-bpi-r2.dts
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@@ -143,13 +143,25 @@
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};
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};
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+ gmac1: mac@1 {
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+ compatible = "mediatek,eth-mac";
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+ reg = <1>;
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+ label = "wan";
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+ phy-mode = "rgmii";
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+ phy-handle = <&ephy0>;
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+ };
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+
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mdio: mdio-bus {
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#address-cells = <1>;
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#size-cells = <0>;
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- switch@0 {
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- compatible = "mediatek,mt7530";
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+ ephy0: ethernet-phy@0 {
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reg = <0>;
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+ };
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+
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+ switch@1f {
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+ compatible = "mediatek,mt7530";
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+ reg = <0x1f>;
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reset-gpios = <&pio 33 0>;
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core-supply = <&mt6323_vpa_reg>;
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io-supply = <&mt6323_vemc3v3_reg>;
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@@ -158,10 +170,12 @@
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#address-cells = <1>;
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#size-cells = <0>;
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+/* Disabled, is now handled by gmac1 (eth1/wan) via phy-handle!
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port@0 {
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reg = <0>;
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label = "wan";
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};
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+*/
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port@1 {
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reg = <1>;
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@ -0,0 +1,43 @@
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From 35082b70e998d5b419e351010005494e7a5b9412 Mon Sep 17 00:00:00 2001
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From: Landen Chao <landen.chao@mediatek.com>
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Date: Tue, 31 Dec 2019 11:48:41 +0100
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Subject: [PATCH] net: dsa: enable vlan without bridge on dsa user port
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---
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drivers/net/dsa/mt7530.c | 14 ++++++++++++--
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1 file changed, 12 insertions(+), 2 deletions(-)
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diff --git a/drivers/net/dsa/mt7530.c b/drivers/net/dsa/mt7530.c
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index 1d8d36de4d20..7e285aa9bd7c 100644
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--- a/drivers/net/dsa/mt7530.c
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+++ b/drivers/net/dsa/mt7530.c
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@@ -1165,8 +1165,13 @@ mt7530_port_vlan_add(struct dsa_switch *ds, int port,
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/* The port is kept as VLAN-unaware if bridge with vlan_filtering not
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* being set.
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*/
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- if (!dsa_port_is_vlan_filtering(&ds->ports[port]))
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+ if (!dsa_port_is_vlan_filtering(&ds->ports[port])){
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+ /* Enable VLAN tagged in port-based vlan setting. */
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+ if ((vlan->vid_begin != 0) && (vlan->vid_end != 0))
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+ mt7530_rmw(priv, MT7530_PCR_P(port), EG_TAG(3),
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+ EG_TAG(2));
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return;
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+ }
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mutex_lock(&priv->reg_mutex);
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@@ -1196,8 +1201,13 @@ mt7530_port_vlan_del(struct dsa_switch *ds, int port,
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/* The port is kept as VLAN-unaware if bridge with vlan_filtering not
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* being set.
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*/
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- if (!dsa_port_is_vlan_filtering(&ds->ports[port]))
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+ if (!dsa_port_is_vlan_filtering(&ds->ports[port])) {
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+ /* Disable VLAN tagged in port-based vlan setting. */
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+ if ((vlan->vid_begin != 0) && (vlan->vid_end != 0))
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+ mt7530_rmw(priv, MT7530_PCR_P(port), EG_TAG(3),
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+ EG_TAG(0));
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return 0;
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+ }
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mutex_lock(&priv->reg_mutex);
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@ -0,0 +1,389 @@
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From 0277af939e559d5dd77955ad6eed55b9f582dd38 Mon Sep 17 00:00:00 2001
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From: Landen Chao <landen.chao@mediatek.com>
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Date: Tue, 10 Dec 2019 16:14:38 +0800
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Subject: [PATCH] net: dsa: mt7530: Extend device data ready for adding a new
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hardware
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Add a structure holding required operations for each device such as device
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initialization, PHY port read or write, a checker whether PHY interface is
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supported on a certain port, MAC port setup for either bus pad or a
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specific PHY interface.
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The patch is done for ready adding a new hardware MT7531.
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Signed-off-by: Landen Chao <landen.chao@mediatek.com>
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Signed-off-by: Sean Wang <sean.wang@mediatek.com>
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---
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drivers/net/dsa/mt7530.c | 231 +++++++++++++++++++++++++++++----------
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drivers/net/dsa/mt7530.h | 29 ++++-
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2 files changed, 203 insertions(+), 57 deletions(-)
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diff --git a/drivers/net/dsa/mt7530.c b/drivers/net/dsa/mt7530.c
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index 7e285aa9bd7c..a3f3ba95c55b 100644
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--- a/drivers/net/dsa/mt7530.c
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+++ b/drivers/net/dsa/mt7530.c
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@@ -425,7 +425,7 @@ mt7530_fdb_write(struct mt7530_priv *pri
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}
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static int
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-mt7530_pad_clk_setup(struct dsa_switch *ds, int mode)
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+mt7530_pad_clk_setup(struct dsa_switch *ds, phy_interface_t mode)
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{
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struct mt7530_priv *priv = ds->priv;
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u32 ncpo1, ssc_delta, trgint, i, xtal;
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@@ -1447,13 +1447,111 @@ mt7530_setup(struct dsa_switch *ds)
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return 0;
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}
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-static void mt7530_phylink_mac_config(struct dsa_switch *ds, int port,
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+static bool mt7530_phy_supported(struct dsa_switch *ds, int port,
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+ const struct phylink_link_state *state)
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+{
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+ struct mt7530_priv *priv = ds->priv;
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+
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+ switch (port) {
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+ case 0: /* Internal phy */
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+ case 1:
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+ case 2:
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+ case 3:
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+ case 4:
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+ if (state->interface != PHY_INTERFACE_MODE_GMII)
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|
+ goto unsupported;
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|
+ break;
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+ case 5: /* 2nd cpu port with phy of port 0 or 4 / external phy */
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|
+ if (!phy_interface_mode_is_rgmii(state->interface) &&
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|
+ state->interface != PHY_INTERFACE_MODE_MII &&
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|
+ state->interface != PHY_INTERFACE_MODE_GMII)
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|
+ goto unsupported;
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|
+ break;
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|
+ case 6: /* 1st cpu port */
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|
+ if (state->interface != PHY_INTERFACE_MODE_RGMII &&
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|
+ state->interface != PHY_INTERFACE_MODE_TRGMII)
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|
+ goto unsupported;
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|
+ break;
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|
+ default:
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|
+ dev_err(priv->dev, "%s: unsupported port: %i\n", __func__,
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|
+ port);
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|
+ goto unsupported;
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|
+ }
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|
+
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|
+ return true;
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|
+
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|
+unsupported:
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|
+ return false;
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|
+}
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|
+
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|
+static bool mt753x_phy_supported(struct dsa_switch *ds, int port,
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|
+ const struct phylink_link_state *state)
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|
+{
|
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|
+ struct mt7530_priv *priv = ds->priv;
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|
+
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|
+ return priv->info->phy_supported(ds, port, state);
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|
+}
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|
+
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|
+static int
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|
+mt7530_pad_setup(struct dsa_switch *ds, const struct phylink_link_state *state)
|
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|
+{
|
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|
+ struct mt7530_priv *priv = ds->priv;
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|
+
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|
+ /* Setup TX circuit incluing relevant PAD and driving */
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|
+ mt7530_pad_clk_setup(ds, state->interface);
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|
+
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|
+ if (priv->id == ID_MT7530) {
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|
+ /* Setup RX circuit, relevant PAD and driving on the
|
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|
+ * host which must be placed after the setup on the
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|
+ * device side is all finished.
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|
+ */
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|
+ mt7623_pad_clk_setup(ds);
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|
+ }
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|
+
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|
+ return 0;
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|
+}
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|
+
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|
+static int
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|
+mt753x_pad_setup(struct dsa_switch *ds, const struct phylink_link_state *state)
|
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|
+{
|
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|
+ struct mt7530_priv *priv = ds->priv;
|
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|
+
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|
+ return priv->info->pad_setup(ds, state);
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|
+}
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|
+
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|
+static int
|
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|
+mt7530_mac_setup(struct dsa_switch *ds, int port, unsigned int mode,
|
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|
+ const struct phylink_link_state *state)
|
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|
+{
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|
+ struct mt7530_priv *priv = ds->priv;
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|
+
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|
+ /* Only need to setup port5. */
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|
+ if (port != 5)
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|
+ return 0;
|
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|
+
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|
+ mt7530_setup_port5(priv->ds, state->interface);
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|
+
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|
+ return 0;
|
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|
+}
|
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|
+
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|
+static int mt753x_mac_setup(struct dsa_switch *ds, int port, unsigned int mode,
|
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|
+ const struct phylink_link_state *state)
|
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|
+{
|
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|
+ struct mt7530_priv *priv = ds->priv;
|
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|
+
|
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|
+ return priv->info->mac_setup(ds, port, mode, state);
|
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|
+}
|
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|
+
|
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|
+static void mt753x_phylink_mac_config(struct dsa_switch *ds, int port,
|
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|
unsigned int mode,
|
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|
const struct phylink_link_state *state)
|
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|
{
|
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|
struct mt7530_priv *priv = ds->priv;
|
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|
u32 mcr_cur, mcr_new;
|
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|
|
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|
+ if (!mt753x_phy_supported(ds, port, state))
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|
+ return;
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|
+
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|
switch (port) {
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|
case 0: /* Internal phy */
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|
case 1:
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|
@@ -1466,35 +1564,24 @@ static void mt7530_phylink_mac_config(st
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|
case 5: /* 2nd cpu port with phy of port 0 or 4 / external phy */
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|
if (priv->p5_interface == state->interface)
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|
break;
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|
- if (!phy_interface_mode_is_rgmii(state->interface) &&
|
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|
- state->interface != PHY_INTERFACE_MODE_MII &&
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|
- state->interface != PHY_INTERFACE_MODE_GMII)
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|
- return;
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|
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|
- mt7530_setup_port5(ds, state->interface);
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|
+ if (mt753x_mac_setup(ds, port, mode, state) < 0)
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|
+ goto unsupported;
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|
+
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|
break;
|
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|
case 6: /* 1st cpu port */
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|
if (priv->p6_interface == state->interface)
|
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|
break;
|
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|
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|
- if (state->interface != PHY_INTERFACE_MODE_RGMII &&
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|
- state->interface != PHY_INTERFACE_MODE_TRGMII)
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|
- return;
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|
-
|
||||||
|
- /* Setup TX circuit incluing relevant PAD and driving */
|
||||||
|
- mt7530_pad_clk_setup(ds, state->interface);
|
||||||
|
+ mt753x_pad_setup(ds, state);
|
||||||
|
|
||||||
|
- if (priv->id == ID_MT7530) {
|
||||||
|
- /* Setup RX circuit, relevant PAD and driving on the
|
||||||
|
- * host which must be placed after the setup on the
|
||||||
|
- * device side is all finished.
|
||||||
|
- */
|
||||||
|
- mt7623_pad_clk_setup(ds);
|
||||||
|
- }
|
||||||
|
+ if (mt753x_mac_setup(ds, port, mode, state) < 0)
|
||||||
|
+ goto unsupported;
|
||||||
|
|
||||||
|
priv->p6_interface = state->interface;
|
||||||
|
break;
|
||||||
|
default:
|
||||||
|
+unsupported:
|
||||||
|
dev_err(ds->dev, "%s: unsupported port: %i\n", __func__, port);
|
||||||
|
return;
|
||||||
|
}
|
||||||
|
@@ -1555,38 +1642,14 @@ static void mt7530_phylink_mac_link_up(s
|
||||||
|
mt7530_port_set_status(priv, port, 1);
|
||||||
|
}
|
||||||
|
|
||||||
|
-static void mt7530_phylink_validate(struct dsa_switch *ds, int port,
|
||||||
|
+static void mt753x_phylink_validate(struct dsa_switch *ds, int port,
|
||||||
|
unsigned long *supported,
|
||||||
|
struct phylink_link_state *state)
|
||||||
|
{
|
||||||
|
__ETHTOOL_DECLARE_LINK_MODE_MASK(mask) = { 0, };
|
||||||
|
|
||||||
|
- switch (port) {
|
||||||
|
- case 0: /* Internal phy */
|
||||||
|
- case 1:
|
||||||
|
- case 2:
|
||||||
|
- case 3:
|
||||||
|
- case 4:
|
||||||
|
- if (state->interface != PHY_INTERFACE_MODE_NA &&
|
||||||
|
- state->interface != PHY_INTERFACE_MODE_GMII)
|
||||||
|
- goto unsupported;
|
||||||
|
- break;
|
||||||
|
- case 5: /* 2nd cpu port with phy of port 0 or 4 / external phy */
|
||||||
|
- if (state->interface != PHY_INTERFACE_MODE_NA &&
|
||||||
|
- !phy_interface_mode_is_rgmii(state->interface) &&
|
||||||
|
- state->interface != PHY_INTERFACE_MODE_MII &&
|
||||||
|
- state->interface != PHY_INTERFACE_MODE_GMII)
|
||||||
|
- goto unsupported;
|
||||||
|
- break;
|
||||||
|
- case 6: /* 1st cpu port */
|
||||||
|
- if (state->interface != PHY_INTERFACE_MODE_NA &&
|
||||||
|
- state->interface != PHY_INTERFACE_MODE_RGMII &&
|
||||||
|
- state->interface != PHY_INTERFACE_MODE_TRGMII)
|
||||||
|
- goto unsupported;
|
||||||
|
- break;
|
||||||
|
- default:
|
||||||
|
- dev_err(ds->dev, "%s: unsupported port: %i\n", __func__, port);
|
||||||
|
-unsupported:
|
||||||
|
+ if (state->interface != PHY_INTERFACE_MODE_NA &&
|
||||||
|
+ !mt753x_phy_supported(ds, port, state)) {
|
||||||
|
linkmode_zero(supported);
|
||||||
|
return;
|
||||||
|
}
|
||||||
|
@@ -1657,12 +1720,36 @@ mt7530_phylink_mac_link_state(struct dsa
|
||||||
|
return 1;
|
||||||
|
}
|
||||||
|
|
||||||
|
+static int
|
||||||
|
+mt753x_setup(struct dsa_switch *ds)
|
||||||
|
+{
|
||||||
|
+ struct mt7530_priv *priv = ds->priv;
|
||||||
|
+
|
||||||
|
+ return priv->info->setup(ds);
|
||||||
|
+}
|
||||||
|
+
|
||||||
|
+static int
|
||||||
|
+mt753x_phy_read(struct dsa_switch *ds, int port, int regnum)
|
||||||
|
+{
|
||||||
|
+ struct mt7530_priv *priv = ds->priv;
|
||||||
|
+
|
||||||
|
+ return priv->info->phy_read(ds, port, regnum);
|
||||||
|
+}
|
||||||
|
+
|
||||||
|
+static int
|
||||||
|
+mt753x_phy_write(struct dsa_switch *ds, int port, int regnum, u16 val)
|
||||||
|
+{
|
||||||
|
+ struct mt7530_priv *priv = ds->priv;
|
||||||
|
+
|
||||||
|
+ return priv->info->phy_write(ds, port, regnum, val);
|
||||||
|
+}
|
||||||
|
+
|
||||||
|
static const struct dsa_switch_ops mt7530_switch_ops = {
|
||||||
|
.get_tag_protocol = mtk_get_tag_protocol,
|
||||||
|
- .setup = mt7530_setup,
|
||||||
|
+ .setup = mt753x_setup,
|
||||||
|
.get_strings = mt7530_get_strings,
|
||||||
|
- .phy_read = mt7530_phy_read,
|
||||||
|
- .phy_write = mt7530_phy_write,
|
||||||
|
+ .phy_read = mt753x_phy_read,
|
||||||
|
+ .phy_write = mt753x_phy_write,
|
||||||
|
.get_ethtool_stats = mt7530_get_ethtool_stats,
|
||||||
|
.get_sset_count = mt7530_get_sset_count,
|
||||||
|
.port_enable = mt7530_port_enable,
|
||||||
|
@@ -1679,16 +1766,37 @@ static const struct dsa_switch_ops mt753
|
||||||
|
.port_vlan_del = mt7530_port_vlan_del,
|
||||||
|
.port_mirror_add = mt7530_port_mirror_add,
|
||||||
|
.port_mirror_del = mt7530_port_mirror_del,
|
||||||
|
- .phylink_validate = mt7530_phylink_validate,
|
||||||
|
+ .phylink_validate = mt753x_phylink_validate,
|
||||||
|
.phylink_mac_link_state = mt7530_phylink_mac_link_state,
|
||||||
|
- .phylink_mac_config = mt7530_phylink_mac_config,
|
||||||
|
+ .phylink_mac_config = mt753x_phylink_mac_config,
|
||||||
|
.phylink_mac_link_down = mt7530_phylink_mac_link_down,
|
||||||
|
.phylink_mac_link_up = mt7530_phylink_mac_link_up,
|
||||||
|
};
|
||||||
|
|
||||||
|
+static const struct mt753x_info mt753x_table[] = {
|
||||||
|
+ [ID_MT7621] = {
|
||||||
|
+ .id = ID_MT7621,
|
||||||
|
+ .setup = mt7530_setup,
|
||||||
|
+ .phy_read = mt7530_phy_read,
|
||||||
|
+ .phy_write = mt7530_phy_write,
|
||||||
|
+ .phy_supported = mt7530_phy_supported,
|
||||||
|
+ .pad_setup = mt7530_pad_setup,
|
||||||
|
+ .mac_setup = mt7530_mac_setup,
|
||||||
|
+ },
|
||||||
|
+ [ID_MT7530] = {
|
||||||
|
+ .id = ID_MT7530,
|
||||||
|
+ .setup = mt7530_setup,
|
||||||
|
+ .phy_read = mt7530_phy_read,
|
||||||
|
+ .phy_write = mt7530_phy_write,
|
||||||
|
+ .phy_supported = mt7530_phy_supported,
|
||||||
|
+ .pad_setup = mt7530_pad_setup,
|
||||||
|
+ .mac_setup = mt7530_mac_setup,
|
||||||
|
+ },
|
||||||
|
+};
|
||||||
|
+
|
||||||
|
static const struct of_device_id mt7530_of_match[] = {
|
||||||
|
- { .compatible = "mediatek,mt7621", .data = (void *)ID_MT7621, },
|
||||||
|
- { .compatible = "mediatek,mt7530", .data = (void *)ID_MT7530, },
|
||||||
|
+ { .compatible = "mediatek,mt7621", .data = &mt753x_table[ID_MT7621], },
|
||||||
|
+ { .compatible = "mediatek,mt7530", .data = &mt753x_table[ID_MT7530], },
|
||||||
|
{ /* sentinel */ },
|
||||||
|
};
|
||||||
|
MODULE_DEVICE_TABLE(of, mt7530_of_match);
|
||||||
|
@@ -1726,8 +1834,19 @@ mt7530_probe(struct mdio_device *mdiodev
|
||||||
|
/* Get the hardware identifier from the devicetree node.
|
||||||
|
* We will need it for some of the clock and regulator setup.
|
||||||
|
*/
|
||||||
|
- priv->id = (unsigned int)(unsigned long)
|
||||||
|
- of_device_get_match_data(&mdiodev->dev);
|
||||||
|
+ priv->info = of_device_get_match_data(&mdiodev->dev);
|
||||||
|
+ if (!priv->info)
|
||||||
|
+ return -EINVAL;
|
||||||
|
+
|
||||||
|
+ /* Sanity check if these required device operstaions are filled
|
||||||
|
+ * properly.
|
||||||
|
+ */
|
||||||
|
+ if (!priv->info->setup || !priv->info->phy_read ||
|
||||||
|
+ !priv->info->phy_write || !priv->info->phy_supported ||
|
||||||
|
+ !priv->info->pad_setup || !priv->info->mac_setup)
|
||||||
|
+ return -EINVAL;
|
||||||
|
+
|
||||||
|
+ priv->id = priv->info->id;
|
||||||
|
|
||||||
|
if (priv->id == ID_MT7530) {
|
||||||
|
priv->core_pwr = devm_regulator_get(&mdiodev->dev, "core");
|
||||||
|
diff --git a/drivers/net/dsa/mt7530.h b/drivers/net/dsa/mt7530.h
|
||||||
|
index ccb9da8cad0d..aac86e4fc148 100644
|
||||||
|
--- a/drivers/net/dsa/mt7530.h
|
||||||
|
+++ b/drivers/net/dsa/mt7530.h
|
||||||
|
@@ -11,7 +11,7 @@
|
||||||
|
#define MT7530_NUM_FDB_RECORDS 2048
|
||||||
|
#define MT7530_ALL_MEMBERS 0xff
|
||||||
|
|
||||||
|
-enum {
|
||||||
|
+enum mt753x_id {
|
||||||
|
ID_MT7530 = 0,
|
||||||
|
ID_MT7621 = 1,
|
||||||
|
};
|
||||||
|
@@ -428,6 +428,32 @@ static const char *p5_intf_modes(unsigned int p5_interface)
|
||||||
|
}
|
||||||
|
}
|
||||||
|
|
||||||
|
+/* struct mt753x_info - This is the main data structure for holding the specific
|
||||||
|
+ * part for each supported device
|
||||||
|
+ * @setup: Holding the handler to a device initialization
|
||||||
|
+ * @phy_read: Holding the way reading PHY port
|
||||||
|
+ * @phy_write: Holding the way writing PHY port
|
||||||
|
+ * @phy_supported: Check if the PHY type is being supported on a certain
|
||||||
|
+ * port
|
||||||
|
+ * @pad_setup: Holding the way setting up the bus pad for a certain MAC
|
||||||
|
+ * port
|
||||||
|
+ * @mac_setup: Holding the way setting up the PHY attribute for a
|
||||||
|
+ * certain MAC port
|
||||||
|
+ */
|
||||||
|
+struct mt753x_info {
|
||||||
|
+ enum mt753x_id id;
|
||||||
|
+
|
||||||
|
+ int (*setup)(struct dsa_switch *ds);
|
||||||
|
+ int (*phy_read)(struct dsa_switch *ds, int port, int regnum);
|
||||||
|
+ int (*phy_write)(struct dsa_switch *ds, int port, int regnum, u16 val);
|
||||||
|
+ bool (*phy_supported)(struct dsa_switch *ds, int port,
|
||||||
|
+ const struct phylink_link_state *state);
|
||||||
|
+ int (*pad_setup)(struct dsa_switch *ds,
|
||||||
|
+ const struct phylink_link_state *state);
|
||||||
|
+ int (*mac_setup)(struct dsa_switch *ds, int port, unsigned int mode,
|
||||||
|
+ const struct phylink_link_state *state);
|
||||||
|
+};
|
||||||
|
+
|
||||||
|
/* struct mt7530_priv - This is the main data structure for holding the state
|
||||||
|
* of the driver
|
||||||
|
* @dev: The device pointer
|
||||||
|
@@ -455,6 +481,7 @@ struct mt7530_priv {
|
||||||
|
struct regulator *core_pwr;
|
||||||
|
struct regulator *io_pwr;
|
||||||
|
struct gpio_desc *reset;
|
||||||
|
+ const struct mt753x_info *info;
|
||||||
|
unsigned int id;
|
||||||
|
bool mcm;
|
||||||
|
phy_interface_t p6_interface;
|
||||||
|
|
@ -0,0 +1,39 @@
|
||||||
|
From 934747eba782050ba87a29a3a59f805e36410685 Mon Sep 17 00:00:00 2001
|
||||||
|
From: =?UTF-8?q?Ren=C3=A9=20van=20Dorst?= <opensource@vdorst.com>
|
||||||
|
Date: Fri, 21 Jun 2019 10:04:05 +0200
|
||||||
|
Subject: [PATCH] net: ethernet: mediatek: support net-labels
|
||||||
|
MIME-Version: 1.0
|
||||||
|
Content-Type: text/plain; charset=UTF-8
|
||||||
|
Content-Transfer-Encoding: 8bit
|
||||||
|
|
||||||
|
With this patch, device name can be set within dts file in the same way as dsa
|
||||||
|
port can.
|
||||||
|
Add: label = "wan"; to GMAC node.
|
||||||
|
|
||||||
|
Signed-off-by: René van Dorst <opensource@vdorst.com>
|
||||||
|
---
|
||||||
|
drivers/net/ethernet/mediatek/mtk_eth_soc.c | 4 ++++
|
||||||
|
1 file changed, 4 insertions(+)
|
||||||
|
|
||||||
|
diff --git a/drivers/net/ethernet/mediatek/mtk_eth_soc.c b/drivers/net/ethernet/mediatek/mtk_eth_soc.c
|
||||||
|
index c61069340f4f..87ced6269411 100644
|
||||||
|
--- a/drivers/net/ethernet/mediatek/mtk_eth_soc.c
|
||||||
|
+++ b/drivers/net/ethernet/mediatek/mtk_eth_soc.c
|
||||||
|
@@ -2756,6 +2756,7 @@ static const struct net_device_ops mtk_netdev_ops = {
|
||||||
|
|
||||||
|
static int mtk_add_mac(struct mtk_eth *eth, struct device_node *np)
|
||||||
|
{
|
||||||
|
+ const char *name = of_get_property(np, "label", NULL);
|
||||||
|
const __be32 *_id = of_get_property(np, "reg", NULL);
|
||||||
|
struct phylink *phylink;
|
||||||
|
int phy_mode, id, err;
|
||||||
|
@@ -2846,6 +2847,9 @@ static int mtk_add_mac(struct mtk_eth *eth, struct device_node *np)
|
||||||
|
eth->netdev[id]->irq = eth->irq[0];
|
||||||
|
eth->netdev[id]->dev.of_node = np;
|
||||||
|
|
||||||
|
+ if (name)
|
||||||
|
+ strlcpy(eth->netdev[id]->name, name, IFNAMSIZ);
|
||||||
|
+
|
||||||
|
return 0;
|
||||||
|
|
||||||
|
free_netdev:
|
||||||
|
|
@ -0,0 +1,22 @@
|
||||||
|
From 3a466fd3d5b921c085fd3c863cab3f1afdb90c9c Mon Sep 17 00:00:00 2001
|
||||||
|
From: Frank Wunderlich <frank-w@public-files.de>
|
||||||
|
Date: Sun, 12 Jan 2020 16:46:33 +0100
|
||||||
|
Subject: [PATCH] arm: dts: add pause to port6 of switch
|
||||||
|
|
||||||
|
to be same as gmac0
|
||||||
|
---
|
||||||
|
arch/arm/boot/dts/mt7623n-bananapi-bpi-r2.dts | 1 +
|
||||||
|
1 file changed, 1 insertion(+)
|
||||||
|
|
||||||
|
diff --git a/arch/arm/boot/dts/mt7623n-bananapi-bpi-r2.dts b/arch/arm/boot/dts/mt7623n-bananapi-bpi-r2.dts
|
||||||
|
index 52343bd76fe5..7b8383af87e0 100644
|
||||||
|
--- a/arch/arm/boot/dts/mt7623n-bananapi-bpi-r2.dts
|
||||||
|
+++ b/arch/arm/boot/dts/mt7623n-bananapi-bpi-r2.dts
|
||||||
|
@@ -253,6 +253,7 @@
|
||||||
|
fixed-link {
|
||||||
|
speed = <1000>;
|
||||||
|
full-duplex;
|
||||||
|
+ pause;
|
||||||
|
};
|
||||||
|
};
|
||||||
|
};
|
||||||
249
root/target/linux/mediatek/patches-5.4/0110-rtc-mt6397.patch
Normal file
249
root/target/linux/mediatek/patches-5.4/0110-rtc-mt6397.patch
Normal file
|
|
@ -0,0 +1,249 @@
|
||||||
|
--- a/drivers/rtc/rtc-mt6397.c 2020-03-05 23:43:52.000000000 +0800
|
||||||
|
+++ b/drivers/rtc/rtc-mt6397.c 2020-03-18 00:54:20.445907453 +0800
|
||||||
|
@@ -4,48 +4,18 @@
|
||||||
|
* Author: Tianping.Fang <tianping.fang@mediatek.com>
|
||||||
|
*/
|
||||||
|
|
||||||
|
-#include <linux/delay.h>
|
||||||
|
-#include <linux/init.h>
|
||||||
|
+#include <linux/err.h>
|
||||||
|
+#include <linux/interrupt.h>
|
||||||
|
+#include <linux/mfd/mt6397/core.h>
|
||||||
|
#include <linux/module.h>
|
||||||
|
+#include <linux/mutex.h>
|
||||||
|
+#include <linux/platform_device.h>
|
||||||
|
#include <linux/regmap.h>
|
||||||
|
#include <linux/rtc.h>
|
||||||
|
-#include <linux/irqdomain.h>
|
||||||
|
-#include <linux/platform_device.h>
|
||||||
|
-#include <linux/of_address.h>
|
||||||
|
-#include <linux/of_irq.h>
|
||||||
|
-#include <linux/io.h>
|
||||||
|
-#include <linux/mfd/mt6397/core.h>
|
||||||
|
-
|
||||||
|
-#define RTC_BBPU 0x0000
|
||||||
|
-#define RTC_BBPU_CBUSY BIT(6)
|
||||||
|
-
|
||||||
|
-#define RTC_WRTGR 0x003c
|
||||||
|
+#include <linux/mfd/mt6397/rtc.h>
|
||||||
|
+#include <linux/mod_devicetable.h>
|
||||||
|
|
||||||
|
-#define RTC_IRQ_STA 0x0002
|
||||||
|
-#define RTC_IRQ_STA_AL BIT(0)
|
||||||
|
-#define RTC_IRQ_STA_LP BIT(3)
|
||||||
|
-
|
||||||
|
-#define RTC_IRQ_EN 0x0004
|
||||||
|
-#define RTC_IRQ_EN_AL BIT(0)
|
||||||
|
-#define RTC_IRQ_EN_ONESHOT BIT(2)
|
||||||
|
-#define RTC_IRQ_EN_LP BIT(3)
|
||||||
|
-#define RTC_IRQ_EN_ONESHOT_AL (RTC_IRQ_EN_ONESHOT | RTC_IRQ_EN_AL)
|
||||||
|
-
|
||||||
|
-#define RTC_AL_MASK 0x0008
|
||||||
|
-#define RTC_AL_MASK_DOW BIT(4)
|
||||||
|
-
|
||||||
|
-#define RTC_TC_SEC 0x000a
|
||||||
|
-/* Min, Hour, Dom... register offset to RTC_TC_SEC */
|
||||||
|
-#define RTC_OFFSET_SEC 0
|
||||||
|
-#define RTC_OFFSET_MIN 1
|
||||||
|
-#define RTC_OFFSET_HOUR 2
|
||||||
|
-#define RTC_OFFSET_DOM 3
|
||||||
|
-#define RTC_OFFSET_DOW 4
|
||||||
|
-#define RTC_OFFSET_MTH 5
|
||||||
|
-#define RTC_OFFSET_YEAR 6
|
||||||
|
-#define RTC_OFFSET_COUNT 7
|
||||||
|
-
|
||||||
|
-#define RTC_AL_SEC 0x0018
|
||||||
|
+#include <linux/mfd/mt6397/rtc.h>
|
||||||
|
|
||||||
|
#define RTC_AL_SEC_MASK 0x003f
|
||||||
|
#define RTC_AL_MIN_MASK 0x003f
|
||||||
|
@@ -55,26 +25,8 @@
|
||||||
|
#define RTC_AL_MTH_MASK 0x000f
|
||||||
|
#define RTC_AL_YEA_MASK 0x007f
|
||||||
|
|
||||||
|
-#define RTC_PDN2 0x002e
|
||||||
|
-#define RTC_PDN2_PWRON_ALARM BIT(4)
|
||||||
|
-
|
||||||
|
-#define RTC_MIN_YEAR 1968
|
||||||
|
-#define RTC_BASE_YEAR 1900
|
||||||
|
-#define RTC_NUM_YEARS 128
|
||||||
|
-#define RTC_MIN_YEAR_OFFSET (RTC_MIN_YEAR - RTC_BASE_YEAR)
|
||||||
|
-
|
||||||
|
-struct mt6397_rtc {
|
||||||
|
- struct device *dev;
|
||||||
|
- struct rtc_device *rtc_dev;
|
||||||
|
- struct mutex lock;
|
||||||
|
- struct regmap *regmap;
|
||||||
|
- int irq;
|
||||||
|
- u32 addr_base;
|
||||||
|
-};
|
||||||
|
-
|
||||||
|
static int mtk_rtc_write_trigger(struct mt6397_rtc *rtc)
|
||||||
|
{
|
||||||
|
- unsigned long timeout = jiffies + HZ;
|
||||||
|
int ret;
|
||||||
|
u32 data;
|
||||||
|
|
||||||
|
@@ -82,19 +34,13 @@ static int mtk_rtc_write_trigger(struct
|
||||||
|
if (ret < 0)
|
||||||
|
return ret;
|
||||||
|
|
||||||
|
- while (1) {
|
||||||
|
- ret = regmap_read(rtc->regmap, rtc->addr_base + RTC_BBPU,
|
||||||
|
- &data);
|
||||||
|
- if (ret < 0)
|
||||||
|
- break;
|
||||||
|
- if (!(data & RTC_BBPU_CBUSY))
|
||||||
|
- break;
|
||||||
|
- if (time_after(jiffies, timeout)) {
|
||||||
|
- ret = -ETIMEDOUT;
|
||||||
|
- break;
|
||||||
|
- }
|
||||||
|
- cpu_relax();
|
||||||
|
- }
|
||||||
|
+ ret = regmap_read_poll_timeout(rtc->regmap,
|
||||||
|
+ rtc->addr_base + RTC_BBPU, data,
|
||||||
|
+ !(data & RTC_BBPU_CBUSY),
|
||||||
|
+ MTK_RTC_POLL_DELAY_US,
|
||||||
|
+ MTK_RTC_POLL_TIMEOUT);
|
||||||
|
+ if (ret < 0)
|
||||||
|
+ dev_err(rtc->dev, "failed to write WRTGE: %d\n", ret);
|
||||||
|
|
||||||
|
return ret;
|
||||||
|
}
|
||||||
|
@@ -338,19 +284,19 @@ static int mtk_rtc_probe(struct platform
|
||||||
|
return rtc->irq;
|
||||||
|
|
||||||
|
rtc->regmap = mt6397_chip->regmap;
|
||||||
|
- rtc->dev = &pdev->dev;
|
||||||
|
mutex_init(&rtc->lock);
|
||||||
|
|
||||||
|
platform_set_drvdata(pdev, rtc);
|
||||||
|
|
||||||
|
- rtc->rtc_dev = devm_rtc_allocate_device(rtc->dev);
|
||||||
|
+ rtc->rtc_dev = devm_rtc_allocate_device(&pdev->dev);
|
||||||
|
if (IS_ERR(rtc->rtc_dev))
|
||||||
|
return PTR_ERR(rtc->rtc_dev);
|
||||||
|
|
||||||
|
- ret = request_threaded_irq(rtc->irq, NULL,
|
||||||
|
- mtk_rtc_irq_handler_thread,
|
||||||
|
- IRQF_ONESHOT | IRQF_TRIGGER_HIGH,
|
||||||
|
- "mt6397-rtc", rtc);
|
||||||
|
+ ret = devm_request_threaded_irq(&pdev->dev, rtc->irq, NULL,
|
||||||
|
+ mtk_rtc_irq_handler_thread,
|
||||||
|
+ IRQF_ONESHOT | IRQF_TRIGGER_HIGH,
|
||||||
|
+ "mt6397-rtc", rtc);
|
||||||
|
+
|
||||||
|
if (ret) {
|
||||||
|
dev_err(&pdev->dev, "Failed to request alarm IRQ: %d: %d\n",
|
||||||
|
rtc->irq, ret);
|
||||||
|
@@ -372,15 +318,6 @@ out_free_irq:
|
||||||
|
return ret;
|
||||||
|
}
|
||||||
|
|
||||||
|
-static int mtk_rtc_remove(struct platform_device *pdev)
|
||||||
|
-{
|
||||||
|
- struct mt6397_rtc *rtc = platform_get_drvdata(pdev);
|
||||||
|
-
|
||||||
|
- free_irq(rtc->irq, rtc);
|
||||||
|
-
|
||||||
|
- return 0;
|
||||||
|
-}
|
||||||
|
-
|
||||||
|
#ifdef CONFIG_PM_SLEEP
|
||||||
|
static int mt6397_rtc_suspend(struct device *dev)
|
||||||
|
{
|
||||||
|
@@ -407,6 +344,7 @@ static SIMPLE_DEV_PM_OPS(mt6397_pm_ops,
|
||||||
|
mt6397_rtc_resume);
|
||||||
|
|
||||||
|
static const struct of_device_id mt6397_rtc_of_match[] = {
|
||||||
|
+ { .compatible = "mediatek,mt6323-rtc", },
|
||||||
|
{ .compatible = "mediatek,mt6397-rtc", },
|
||||||
|
{ }
|
||||||
|
};
|
||||||
|
@@ -419,7 +357,6 @@ static struct platform_driver mtk_rtc_dr
|
||||||
|
.pm = &mt6397_pm_ops,
|
||||||
|
},
|
||||||
|
.probe = mtk_rtc_probe,
|
||||||
|
- .remove = mtk_rtc_remove,
|
||||||
|
};
|
||||||
|
|
||||||
|
module_platform_driver(mtk_rtc_driver);
|
||||||
|
diff --git a/include/linux/mfd/mt6397/rtc.h b/include/linux/mfd/mt6397/rtc.h
|
||||||
|
new file mode 100644
|
||||||
|
index 000000000000..f84b9163c0ee
|
||||||
|
--- /dev/null
|
||||||
|
+++ b/include/linux/mfd/mt6397/rtc.h
|
||||||
|
@@ -0,0 +1,71 @@
|
||||||
|
+/* SPDX-License-Identifier: GPL-2.0 */
|
||||||
|
+/*
|
||||||
|
+ * Copyright (C) 2014-2019 MediaTek Inc.
|
||||||
|
+ *
|
||||||
|
+ * Author: Tianping.Fang <tianping.fang@mediatek.com>
|
||||||
|
+ * Sean Wang <sean.wang@mediatek.com>
|
||||||
|
+ */
|
||||||
|
+
|
||||||
|
+#ifndef _LINUX_MFD_MT6397_RTC_H_
|
||||||
|
+#define _LINUX_MFD_MT6397_RTC_H_
|
||||||
|
+
|
||||||
|
+#include <linux/jiffies.h>
|
||||||
|
+#include <linux/mutex.h>
|
||||||
|
+#include <linux/regmap.h>
|
||||||
|
+#include <linux/rtc.h>
|
||||||
|
+
|
||||||
|
+#define RTC_BBPU 0x0000
|
||||||
|
+#define RTC_BBPU_CBUSY BIT(6)
|
||||||
|
+#define RTC_BBPU_KEY (0x43 << 8)
|
||||||
|
+
|
||||||
|
+#define RTC_WRTGR 0x003c
|
||||||
|
+
|
||||||
|
+#define RTC_IRQ_STA 0x0002
|
||||||
|
+#define RTC_IRQ_STA_AL BIT(0)
|
||||||
|
+#define RTC_IRQ_STA_LP BIT(3)
|
||||||
|
+
|
||||||
|
+#define RTC_IRQ_EN 0x0004
|
||||||
|
+#define RTC_IRQ_EN_AL BIT(0)
|
||||||
|
+#define RTC_IRQ_EN_ONESHOT BIT(2)
|
||||||
|
+#define RTC_IRQ_EN_LP BIT(3)
|
||||||
|
+#define RTC_IRQ_EN_ONESHOT_AL (RTC_IRQ_EN_ONESHOT | RTC_IRQ_EN_AL)
|
||||||
|
+
|
||||||
|
+#define RTC_AL_MASK 0x0008
|
||||||
|
+#define RTC_AL_MASK_DOW BIT(4)
|
||||||
|
+
|
||||||
|
+#define RTC_TC_SEC 0x000a
|
||||||
|
+/* Min, Hour, Dom... register offset to RTC_TC_SEC */
|
||||||
|
+#define RTC_OFFSET_SEC 0
|
||||||
|
+#define RTC_OFFSET_MIN 1
|
||||||
|
+#define RTC_OFFSET_HOUR 2
|
||||||
|
+#define RTC_OFFSET_DOM 3
|
||||||
|
+#define RTC_OFFSET_DOW 4
|
||||||
|
+#define RTC_OFFSET_MTH 5
|
||||||
|
+#define RTC_OFFSET_YEAR 6
|
||||||
|
+#define RTC_OFFSET_COUNT 7
|
||||||
|
+
|
||||||
|
+#define RTC_AL_SEC 0x0018
|
||||||
|
+
|
||||||
|
+#define RTC_PDN2 0x002e
|
||||||
|
+#define RTC_PDN2_PWRON_ALARM BIT(4)
|
||||||
|
+
|
||||||
|
+#define RTC_MIN_YEAR 1968
|
||||||
|
+#define RTC_BASE_YEAR 1900
|
||||||
|
+#define RTC_NUM_YEARS 128
|
||||||
|
+#define RTC_MIN_YEAR_OFFSET (RTC_MIN_YEAR - RTC_BASE_YEAR)
|
||||||
|
+
|
||||||
|
+#define MTK_RTC_POLL_DELAY_US 10
|
||||||
|
+#define MTK_RTC_POLL_TIMEOUT (jiffies_to_usecs(HZ))
|
||||||
|
+
|
||||||
|
+struct mt6397_rtc {
|
||||||
|
+ struct device *dev;
|
||||||
|
+ struct rtc_device *rtc_dev;
|
||||||
|
+
|
||||||
|
+ /* Protect register access from multiple tasks */
|
||||||
|
+ struct mutex lock;
|
||||||
|
+ struct regmap *regmap;
|
||||||
|
+ int irq;
|
||||||
|
+ u32 addr_base;
|
||||||
|
+};
|
||||||
|
+
|
||||||
|
+#endif /* _LINUX_MFD_MT6397_RTC_H_ */
|
||||||
|
|
||||||
|
|
@ -0,0 +1,160 @@
|
||||||
|
From 559614ab0ae2c85596218226f095be36c12cf0fa Mon Sep 17 00:00:00 2001
|
||||||
|
From: Josef Friedl <josef.friedl@speed.at>
|
||||||
|
Date: Wed, 3 Jul 2019 12:24:52 +0200
|
||||||
|
Subject: [PATCH] power: reset: add driver for mt6323 poweroff
|
||||||
|
|
||||||
|
add poweroff driver for mt6323 and make Makefile and Kconfig-Entries
|
||||||
|
|
||||||
|
Suggested-by: Frank Wunderlich <frank-w@public-files.de>
|
||||||
|
Signed-off-by: Josef Friedl <josef.friedl@speed.at>
|
||||||
|
Signed-off-by: Frank Wunderlich <frank-w@public-files.de>
|
||||||
|
Acked-by: Sebastian Reichel <sebastian.reichel@collabora.com>
|
||||||
|
---
|
||||||
|
changes since v6: none
|
||||||
|
changes since v5: split out mfd/mt6397/core.h
|
||||||
|
changes since v4: none
|
||||||
|
changes since v3: none
|
||||||
|
changes since v2: none (=v2 part 5)
|
||||||
|
---
|
||||||
|
drivers/power/reset/Kconfig | 10 +++
|
||||||
|
drivers/power/reset/Makefile | 1 +
|
||||||
|
drivers/power/reset/mt6323-poweroff.c | 97 +++++++++++++++++++++++++++
|
||||||
|
3 files changed, 108 insertions(+)
|
||||||
|
create mode 100644 drivers/power/reset/mt6323-poweroff.c
|
||||||
|
|
||||||
|
diff --git a/drivers/power/reset/Kconfig b/drivers/power/reset/Kconfig
|
||||||
|
index a564237278ff..c721939767eb 100644
|
||||||
|
--- a/drivers/power/reset/Kconfig
|
||||||
|
+++ b/drivers/power/reset/Kconfig
|
||||||
|
@@ -140,6 +140,16 @@ config POWER_RESET_LTC2952
|
||||||
|
This driver supports an external powerdown trigger and board power
|
||||||
|
down via the LTC2952. Bindings are made in the device tree.
|
||||||
|
|
||||||
|
+config POWER_RESET_MT6323
|
||||||
|
+ bool "MediaTek MT6323 power-off driver"
|
||||||
|
+ depends on MFD_MT6397
|
||||||
|
+ help
|
||||||
|
+ The power-off driver is responsible for externally shutdown down
|
||||||
|
+ the power of a remote MediaTek SoC MT6323 is connected to through
|
||||||
|
+ controlling a tiny circuit BBPU inside MT6323 RTC.
|
||||||
|
+
|
||||||
|
+ Say Y if you have a board where MT6323 could be found.
|
||||||
|
+
|
||||||
|
config POWER_RESET_QNAP
|
||||||
|
bool "QNAP power-off driver"
|
||||||
|
depends on OF_GPIO && PLAT_ORION
|
||||||
|
diff --git a/drivers/power/reset/Makefile b/drivers/power/reset/Makefile
|
||||||
|
index 85da3198e4e0..da37f8b851dc 100644
|
||||||
|
--- a/drivers/power/reset/Makefile
|
||||||
|
+++ b/drivers/power/reset/Makefile
|
||||||
|
@@ -11,6 +11,7 @@ obj-$(CONFIG_POWER_RESET_GPIO) += gpio-poweroff.o
|
||||||
|
obj-$(CONFIG_POWER_RESET_GPIO_RESTART) += gpio-restart.o
|
||||||
|
obj-$(CONFIG_POWER_RESET_HISI) += hisi-reboot.o
|
||||||
|
obj-$(CONFIG_POWER_RESET_MSM) += msm-poweroff.o
|
||||||
|
+obj-$(CONFIG_POWER_RESET_MT6323) += mt6323-poweroff.o
|
||||||
|
obj-$(CONFIG_POWER_RESET_QCOM_PON) += qcom-pon.o
|
||||||
|
obj-$(CONFIG_POWER_RESET_OCELOT_RESET) += ocelot-reset.o
|
||||||
|
obj-$(CONFIG_POWER_RESET_PIIX4_POWEROFF) += piix4-poweroff.o
|
||||||
|
diff --git a/drivers/power/reset/mt6323-poweroff.c b/drivers/power/reset/mt6323-poweroff.c
|
||||||
|
new file mode 100644
|
||||||
|
index 000000000000..1caf43d9e46d
|
||||||
|
--- /dev/null
|
||||||
|
+++ b/drivers/power/reset/mt6323-poweroff.c
|
||||||
|
@@ -0,0 +1,97 @@
|
||||||
|
+// SPDX-License-Identifier: GPL-2.0
|
||||||
|
+/*
|
||||||
|
+ * Power off through MediaTek PMIC
|
||||||
|
+ *
|
||||||
|
+ * Copyright (C) 2018 MediaTek Inc.
|
||||||
|
+ *
|
||||||
|
+ * Author: Sean Wang <sean.wang@mediatek.com>
|
||||||
|
+ *
|
||||||
|
+ */
|
||||||
|
+
|
||||||
|
+#include <linux/err.h>
|
||||||
|
+#include <linux/module.h>
|
||||||
|
+#include <linux/of.h>
|
||||||
|
+#include <linux/platform_device.h>
|
||||||
|
+#include <linux/mfd/mt6397/core.h>
|
||||||
|
+#include <linux/mfd/mt6397/rtc.h>
|
||||||
|
+
|
||||||
|
+struct mt6323_pwrc {
|
||||||
|
+ struct device *dev;
|
||||||
|
+ struct regmap *regmap;
|
||||||
|
+ u32 base;
|
||||||
|
+};
|
||||||
|
+
|
||||||
|
+static struct mt6323_pwrc *mt_pwrc;
|
||||||
|
+
|
||||||
|
+static void mt6323_do_pwroff(void)
|
||||||
|
+{
|
||||||
|
+ struct mt6323_pwrc *pwrc = mt_pwrc;
|
||||||
|
+ unsigned int val;
|
||||||
|
+ int ret;
|
||||||
|
+
|
||||||
|
+ regmap_write(pwrc->regmap, pwrc->base + RTC_BBPU, RTC_BBPU_KEY);
|
||||||
|
+ regmap_write(pwrc->regmap, pwrc->base + RTC_WRTGR, 1);
|
||||||
|
+
|
||||||
|
+ ret = regmap_read_poll_timeout(pwrc->regmap,
|
||||||
|
+ pwrc->base + RTC_BBPU, val,
|
||||||
|
+ !(val & RTC_BBPU_CBUSY),
|
||||||
|
+ MTK_RTC_POLL_DELAY_US,
|
||||||
|
+ MTK_RTC_POLL_TIMEOUT);
|
||||||
|
+ if (ret)
|
||||||
|
+ dev_err(pwrc->dev, "failed to write BBPU: %d\n", ret);
|
||||||
|
+
|
||||||
|
+ /* Wait some time until system down, otherwise, notice with a warn */
|
||||||
|
+ mdelay(1000);
|
||||||
|
+
|
||||||
|
+ WARN_ONCE(1, "Unable to power off system\n");
|
||||||
|
+}
|
||||||
|
+
|
||||||
|
+static int mt6323_pwrc_probe(struct platform_device *pdev)
|
||||||
|
+{
|
||||||
|
+ struct mt6397_chip *mt6397_chip = dev_get_drvdata(pdev->dev.parent);
|
||||||
|
+ struct mt6323_pwrc *pwrc;
|
||||||
|
+ struct resource *res;
|
||||||
|
+
|
||||||
|
+ pwrc = devm_kzalloc(&pdev->dev, sizeof(*pwrc), GFP_KERNEL);
|
||||||
|
+ if (!pwrc)
|
||||||
|
+ return -ENOMEM;
|
||||||
|
+
|
||||||
|
+ res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
|
||||||
|
+ pwrc->base = res->start;
|
||||||
|
+ pwrc->regmap = mt6397_chip->regmap;
|
||||||
|
+ pwrc->dev = &pdev->dev;
|
||||||
|
+ mt_pwrc = pwrc;
|
||||||
|
+
|
||||||
|
+ pm_power_off = &mt6323_do_pwroff;
|
||||||
|
+
|
||||||
|
+ return 0;
|
||||||
|
+}
|
||||||
|
+
|
||||||
|
+static int mt6323_pwrc_remove(struct platform_device *pdev)
|
||||||
|
+{
|
||||||
|
+ if (pm_power_off == &mt6323_do_pwroff)
|
||||||
|
+ pm_power_off = NULL;
|
||||||
|
+
|
||||||
|
+ return 0;
|
||||||
|
+}
|
||||||
|
+
|
||||||
|
+static const struct of_device_id mt6323_pwrc_dt_match[] = {
|
||||||
|
+ { .compatible = "mediatek,mt6323-pwrc" },
|
||||||
|
+ {},
|
||||||
|
+};
|
||||||
|
+MODULE_DEVICE_TABLE(of, mt6323_pwrc_dt_match);
|
||||||
|
+
|
||||||
|
+static struct platform_driver mt6323_pwrc_driver = {
|
||||||
|
+ .probe = mt6323_pwrc_probe,
|
||||||
|
+ .remove = mt6323_pwrc_remove,
|
||||||
|
+ .driver = {
|
||||||
|
+ .name = "mt6323-pwrc",
|
||||||
|
+ .of_match_table = mt6323_pwrc_dt_match,
|
||||||
|
+ },
|
||||||
|
+};
|
||||||
|
+
|
||||||
|
+module_platform_driver(mt6323_pwrc_driver);
|
||||||
|
+
|
||||||
|
+MODULE_DESCRIPTION("Poweroff driver for MT6323 PMIC");
|
||||||
|
+MODULE_AUTHOR("Sean Wang <sean.wang@mediatek.com>");
|
||||||
|
+MODULE_LICENSE("GPL v2");
|
||||||
|
|
@ -0,0 +1,57 @@
|
||||||
|
From c3db4c1163cc20ab0a456086a15c00acb022a67d Mon Sep 17 00:00:00 2001
|
||||||
|
From: Josef Friedl <josef.friedl@speed.at>
|
||||||
|
Date: Thu, 20 Dec 2018 18:27:17 +0100
|
||||||
|
Subject: [PATCH] arm: dts: mt6323: add keys, power-controller, rtc and codec
|
||||||
|
|
||||||
|
support poweroff and power-related keys on bpi-r2
|
||||||
|
|
||||||
|
Suggested-by: Frank Wunderlich <frank-w@public-files.de>
|
||||||
|
Signed-off-by: Josef Friedl <josef.friedl@speed.at>
|
||||||
|
Signed-off-by: Frank Wunderlich <frank-w@public-files.de>
|
||||||
|
---
|
||||||
|
changes since v6: none
|
||||||
|
changes since v5: none
|
||||||
|
changes since v4: none
|
||||||
|
changes since v3: none
|
||||||
|
changes since v2: none (=v2 part 7)
|
||||||
|
---
|
||||||
|
arch/arm/boot/dts/mt6323.dtsi | 27 +++++++++++++++++++++++++++
|
||||||
|
1 file changed, 27 insertions(+)
|
||||||
|
|
||||||
|
diff --git a/arch/arm/boot/dts/mt6323.dtsi b/arch/arm/boot/dts/mt6323.dtsi
|
||||||
|
index ba397407c1dd..7fda40ab5fe8 100644
|
||||||
|
--- a/arch/arm/boot/dts/mt6323.dtsi
|
||||||
|
+++ b/arch/arm/boot/dts/mt6323.dtsi
|
||||||
|
@@ -238,5 +238,32 @@
|
||||||
|
regulator-enable-ramp-delay = <216>;
|
||||||
|
};
|
||||||
|
};
|
||||||
|
+
|
||||||
|
+ mt6323keys: mt6323keys {
|
||||||
|
+ compatible = "mediatek,mt6323-keys";
|
||||||
|
+ mediatek,long-press-mode = <1>;
|
||||||
|
+ power-off-time-sec = <0>;
|
||||||
|
+
|
||||||
|
+ power {
|
||||||
|
+ linux,keycodes = <116>;
|
||||||
|
+ wakeup-source;
|
||||||
|
+ };
|
||||||
|
+
|
||||||
|
+ home {
|
||||||
|
+ linux,keycodes = <114>;
|
||||||
|
+ };
|
||||||
|
+ };
|
||||||
|
+
|
||||||
|
+ codec: mt6397codec {
|
||||||
|
+ compatible = "mediatek,mt6397-codec";
|
||||||
|
+ };
|
||||||
|
+
|
||||||
|
+ power-controller {
|
||||||
|
+ compatible = "mediatek,mt6323-pwrc";
|
||||||
|
+ };
|
||||||
|
+
|
||||||
|
+ rtc {
|
||||||
|
+ compatible = "mediatek,mt6323-rtc";
|
||||||
|
+ };
|
||||||
|
};
|
||||||
|
};
|
||||||
|
|
@ -0,0 +1,500 @@
|
||||||
|
From ae7a8d61a108bb58af8c3ecb16d8e95aad0b1975 Mon Sep 17 00:00:00 2001
|
||||||
|
From: Ryder Lee <ryder.lee@mediatek.com>
|
||||||
|
Date: Wed, 5 Sep 2018 22:09:27 +0800
|
||||||
|
Subject: [PATCH] arm: dts: mt7623: add display subsystem related device nodes
|
||||||
|
|
||||||
|
Add display subsystem related device nodes for MT7623.
|
||||||
|
|
||||||
|
Cc: CK Hu <ck.hu@mediatek.com>
|
||||||
|
Signed-off-by: chunhui dai <chunhui.dai@mediatek.com>
|
||||||
|
Signed-off-by: Bibby Hsieh <bibby.hsieh@mediatek.com>
|
||||||
|
Signed-off-by: Ryder Lee <ryder.lee@mediatek.com>
|
||||||
|
|
||||||
|
additional fixes:
|
||||||
|
|
||||||
|
[hdmi,dts] fixed dts-warnings
|
||||||
|
author: Bibby Hsieh <bibby.hsieh@mediatek.com>
|
||||||
|
|
||||||
|
[dtsi] fix dpi0-node
|
||||||
|
author: Ryder Lee <ryder.lee@mediatek.com>
|
||||||
|
|
||||||
|
Signed-off-by: Frank Wunderlich <frank-w@public-files.de>
|
||||||
|
Tested-by: Frank Wunderlich <frank-w@public-files.de>
|
||||||
|
---
|
||||||
|
arch/arm/boot/dts/mt7623.dtsi | 177 ++++++++++++++++++
|
||||||
|
arch/arm/boot/dts/mt7623n-bananapi-bpi-r2.dts | 85 +++++++++
|
||||||
|
arch/arm/boot/dts/mt7623n-rfb-emmc.dts | 85 +++++++++
|
||||||
|
3 files changed, 347 insertions(+)
|
||||||
|
|
||||||
|
diff --git a/arch/arm/boot/dts/mt7623.dtsi b/arch/arm/boot/dts/mt7623.dtsi
|
||||||
|
index 59e69f3dffa2..f1880ff04193 100644
|
||||||
|
--- a/arch/arm/boot/dts/mt7623.dtsi
|
||||||
|
+++ b/arch/arm/boot/dts/mt7623.dtsi
|
||||||
|
@@ -23,6 +23,11 @@
|
||||||
|
#address-cells = <2>;
|
||||||
|
#size-cells = <2>;
|
||||||
|
|
||||||
|
+ aliases {
|
||||||
|
+ rdma0 = &rdma0;
|
||||||
|
+ rdma1 = &rdma1;
|
||||||
|
+ };
|
||||||
|
+
|
||||||
|
cpu_opp_table: opp-table {
|
||||||
|
compatible = "operating-points-v2";
|
||||||
|
opp-shared;
|
||||||
|
@@ -320,6 +325,25 @@
|
||||||
|
clock-names = "spi", "wrap";
|
||||||
|
};
|
||||||
|
|
||||||
|
+ mipi_tx0: mipi-dphy@10010000 {
|
||||||
|
+ compatible = "mediatek,mt7623-mipi-tx",
|
||||||
|
+ "mediatek,mt2701-mipi-tx";
|
||||||
|
+ reg = <0 0x10010000 0 0x90>;
|
||||||
|
+ clocks = <&clk26m>;
|
||||||
|
+ clock-output-names = "mipi_tx0_pll";
|
||||||
|
+ #clock-cells = <0>;
|
||||||
|
+ #phy-cells = <0>;
|
||||||
|
+ };
|
||||||
|
+
|
||||||
|
+ cec: cec@10012000 {
|
||||||
|
+ compatible = "mediatek,mt7623-cec",
|
||||||
|
+ "mediatek,mt8173-cec";
|
||||||
|
+ reg = <0 0x10012000 0 0xbc>;
|
||||||
|
+ interrupts = <GIC_SPI 182 IRQ_TYPE_LEVEL_LOW>;
|
||||||
|
+ clocks = <&infracfg CLK_INFRA_CEC>;
|
||||||
|
+ status = "disabled";
|
||||||
|
+ };
|
||||||
|
+
|
||||||
|
cir: cir@10013000 {
|
||||||
|
compatible = "mediatek,mt7623-cir";
|
||||||
|
reg = <0 0x10013000 0 0x1000>;
|
||||||
|
@@ -368,6 +392,18 @@
|
||||||
|
#clock-cells = <1>;
|
||||||
|
};
|
||||||
|
|
||||||
|
+ hdmi_phy: phy@10209100 {
|
||||||
|
+ compatible = "mediatek,mt7623-hdmi-phy",
|
||||||
|
+ "mediatek,mt2701-hdmi-phy";
|
||||||
|
+ reg = <0 0x10209100 0 0x24>;
|
||||||
|
+ clocks = <&apmixedsys CLK_APMIXED_HDMI_REF>;
|
||||||
|
+ clock-names = "pll_ref";
|
||||||
|
+ clock-output-names = "hdmitx_dig_cts";
|
||||||
|
+ #clock-cells = <0>;
|
||||||
|
+ #phy-cells = <0>;
|
||||||
|
+ status = "disabled";
|
||||||
|
+ };
|
||||||
|
+
|
||||||
|
rng: rng@1020f000 {
|
||||||
|
compatible = "mediatek,mt7623-rng";
|
||||||
|
reg = <0 0x1020f000 0 0x1000>;
|
||||||
|
@@ -567,6 +603,16 @@
|
||||||
|
status = "disabled";
|
||||||
|
};
|
||||||
|
|
||||||
|
+ hdmiddc0: i2c@11013000 {
|
||||||
|
+ compatible = "mediatek,mt7623-hdmi-ddc",
|
||||||
|
+ "mediatek,mt8173-hdmi-ddc";
|
||||||
|
+ interrupts = <GIC_SPI 81 IRQ_TYPE_LEVEL_LOW>;
|
||||||
|
+ reg = <0 0x11013000 0 0x1C>;
|
||||||
|
+ clocks = <&pericfg CLK_PERI_I2C3>;
|
||||||
|
+ clock-names = "ddc-i2c";
|
||||||
|
+ status = "disabled";
|
||||||
|
+ };
|
||||||
|
+
|
||||||
|
nor_flash: spi@11014000 {
|
||||||
|
compatible = "mediatek,mt7623-nor",
|
||||||
|
"mediatek,mt8173-nor";
|
||||||
|
@@ -741,6 +787,84 @@
|
||||||
|
#clock-cells = <1>;
|
||||||
|
};
|
||||||
|
|
||||||
|
+ display_components: dispsys@14000000 {
|
||||||
|
+ compatible = "mediatek,mt7623-mmsys",
|
||||||
|
+ "mediatek,mt2701-mmsys";
|
||||||
|
+ reg = <0 0x14000000 0 0x1000>;
|
||||||
|
+ power-domains = <&scpsys MT2701_POWER_DOMAIN_DISP>;
|
||||||
|
+ };
|
||||||
|
+
|
||||||
|
+ ovl@14007000 {
|
||||||
|
+ compatible = "mediatek,mt7623-disp-ovl",
|
||||||
|
+ "mediatek,mt2701-disp-ovl";
|
||||||
|
+ reg = <0 0x14007000 0 0x1000>;
|
||||||
|
+ interrupts = <GIC_SPI 153 IRQ_TYPE_LEVEL_LOW>;
|
||||||
|
+ clocks = <&mmsys CLK_MM_DISP_OVL>;
|
||||||
|
+ iommus = <&iommu MT2701_M4U_PORT_DISP_OVL_0>;
|
||||||
|
+ mediatek,larb = <&larb0>;
|
||||||
|
+ };
|
||||||
|
+
|
||||||
|
+ rdma0: rdma@14008000 {
|
||||||
|
+ compatible = "mediatek,mt7623-disp-rdma",
|
||||||
|
+ "mediatek,mt2701-disp-rdma";
|
||||||
|
+ reg = <0 0x14008000 0 0x1000>;
|
||||||
|
+ interrupts = <GIC_SPI 152 IRQ_TYPE_LEVEL_LOW>;
|
||||||
|
+ clocks = <&mmsys CLK_MM_DISP_RDMA>;
|
||||||
|
+ iommus = <&iommu MT2701_M4U_PORT_DISP_RDMA>;
|
||||||
|
+ mediatek,larb = <&larb0>;
|
||||||
|
+ };
|
||||||
|
+
|
||||||
|
+ wdma@14009000 {
|
||||||
|
+ compatible = "mediatek,mt7623-disp-wdma",
|
||||||
|
+ "mediatek,mt2701-disp-wdma";
|
||||||
|
+ reg = <0 0x14009000 0 0x1000>;
|
||||||
|
+ interrupts = <GIC_SPI 154 IRQ_TYPE_LEVEL_LOW>;
|
||||||
|
+ clocks = <&mmsys CLK_MM_DISP_WDMA>;
|
||||||
|
+ iommus = <&iommu MT2701_M4U_PORT_DISP_WDMA>;
|
||||||
|
+ mediatek,larb = <&larb0>;
|
||||||
|
+ };
|
||||||
|
+
|
||||||
|
+ bls: pwm@1400a000 {
|
||||||
|
+ compatible = "mediatek,mt7623-disp-pwm",
|
||||||
|
+ "mediatek,mt2701-disp-pwm";
|
||||||
|
+ reg = <0 0x1400a000 0 0x1000>;
|
||||||
|
+ #pwm-cells = <2>;
|
||||||
|
+ clocks = <&mmsys CLK_MM_MDP_BLS_26M>,
|
||||||
|
+ <&mmsys CLK_MM_DISP_BLS>;
|
||||||
|
+ clock-names = "main", "mm";
|
||||||
|
+ status = "disabled";
|
||||||
|
+ };
|
||||||
|
+
|
||||||
|
+ color@1400b000 {
|
||||||
|
+ compatible = "mediatek,mt7623-disp-color",
|
||||||
|
+ "mediatek,mt2701-disp-color";
|
||||||
|
+ reg = <0 0x1400b000 0 0x1000>;
|
||||||
|
+ interrupts = <GIC_SPI 156 IRQ_TYPE_LEVEL_LOW>;
|
||||||
|
+ clocks = <&mmsys CLK_MM_DISP_COLOR>;
|
||||||
|
+ };
|
||||||
|
+
|
||||||
|
+ dsi: dsi@1400c000 {
|
||||||
|
+ compatible = "mediatek,mt7623-dsi",
|
||||||
|
+ "mediatek,mt2701-dsi";
|
||||||
|
+ reg = <0 0x1400c000 0 0x1000>;
|
||||||
|
+ interrupts = <GIC_SPI 157 IRQ_TYPE_LEVEL_LOW>;
|
||||||
|
+ clocks = <&mmsys CLK_MM_DSI_ENGINE>,
|
||||||
|
+ <&mmsys CLK_MM_DSI_DIG>,
|
||||||
|
+ <&mipi_tx0>;
|
||||||
|
+ clock-names = "engine", "digital", "hs";
|
||||||
|
+ phys = <&mipi_tx0>;
|
||||||
|
+ phy-names = "dphy";
|
||||||
|
+ status = "disabled";
|
||||||
|
+ };
|
||||||
|
+
|
||||||
|
+ mutex: mutex@1400e000 {
|
||||||
|
+ compatible = "mediatek,mt7623-disp-mutex",
|
||||||
|
+ "mediatek,mt2701-disp-mutex";
|
||||||
|
+ reg = <0 0x1400e000 0 0x1000>;
|
||||||
|
+ interrupts = <GIC_SPI 161 IRQ_TYPE_LEVEL_LOW>;
|
||||||
|
+ clocks = <&mmsys CLK_MM_MUTEX_32K>;
|
||||||
|
+ };
|
||||||
|
+
|
||||||
|
larb0: larb@14010000 {
|
||||||
|
compatible = "mediatek,mt7623-smi-larb",
|
||||||
|
"mediatek,mt2701-smi-larb";
|
||||||
|
@@ -753,6 +877,44 @@
|
||||||
|
power-domains = <&scpsys MT2701_POWER_DOMAIN_DISP>;
|
||||||
|
};
|
||||||
|
|
||||||
|
+ rdma1: rdma@14012000 {
|
||||||
|
+ compatible = "mediatek,mt7623-disp-rdma",
|
||||||
|
+ "mediatek,mt2701-disp-rdma";
|
||||||
|
+ reg = <0 0x14012000 0 0x1000>;
|
||||||
|
+ interrupts = <GIC_SPI 164 IRQ_TYPE_LEVEL_LOW>;
|
||||||
|
+ clocks = <&mmsys CLK_MM_DISP_RDMA1>;
|
||||||
|
+ iommus = <&iommu MT2701_M4U_PORT_DISP_RDMA1>;
|
||||||
|
+ mediatek,larb = <&larb0>;
|
||||||
|
+ };
|
||||||
|
+
|
||||||
|
+ dpi0: dpi@14014000 {
|
||||||
|
+ compatible = "mediatek,mt7623-dpi",
|
||||||
|
+ "mediatek,mt2701-dpi";
|
||||||
|
+ reg = <0 0x14014000 0 0x1000>;
|
||||||
|
+ interrupts = <GIC_SPI 194 IRQ_TYPE_LEVEL_LOW>;
|
||||||
|
+ clocks = <&mmsys CLK_MM_DPI1_DIGL>,
|
||||||
|
+ <&mmsys CLK_MM_DPI1_ENGINE>,
|
||||||
|
+ <&apmixedsys CLK_APMIXED_TVDPLL>;
|
||||||
|
+ clock-names = "pixel", "engine", "pll";
|
||||||
|
+ status = "disabled";
|
||||||
|
+ };
|
||||||
|
+
|
||||||
|
+ hdmi0: hdmi@14015000 {
|
||||||
|
+ compatible = "mediatek,mt7623-hdmi",
|
||||||
|
+ "mediatek,mt8173-hdmi";
|
||||||
|
+ reg = <0 0x14015000 0 0x400>;
|
||||||
|
+ clocks = <&mmsys CLK_MM_HDMI_PIXEL>,
|
||||||
|
+ <&mmsys CLK_MM_HDMI_PLL>,
|
||||||
|
+ <&mmsys CLK_MM_HDMI_AUDIO>,
|
||||||
|
+ <&mmsys CLK_MM_HDMI_SPDIF>;
|
||||||
|
+ clock-names = "pixel", "pll", "bclk", "spdif";
|
||||||
|
+ phys = <&hdmi_phy>;
|
||||||
|
+ phy-names = "hdmi";
|
||||||
|
+ mediatek,syscon-hdmi = <&mmsys 0x900>;
|
||||||
|
+ cec = <&cec>;
|
||||||
|
+ status = "disabled";
|
||||||
|
+ };
|
||||||
|
+
|
||||||
|
imgsys: syscon@15000000 {
|
||||||
|
compatible = "mediatek,mt7623-imgsys",
|
||||||
|
"mediatek,mt2701-imgsys",
|
||||||
|
@@ -1077,6 +1239,21 @@
|
||||||
|
};
|
||||||
|
};
|
||||||
|
|
||||||
|
+ hdmi_pins_a: hdmi-default {
|
||||||
|
+ pins-hdmi {
|
||||||
|
+ pinmux = <MT7623_PIN_123_HTPLG_FUNC_HTPLG>;
|
||||||
|
+ input-enable;
|
||||||
|
+ bias-pull-down;
|
||||||
|
+ };
|
||||||
|
+ };
|
||||||
|
+
|
||||||
|
+ hdmi_ddc_pins_a: hdmi_ddc-default {
|
||||||
|
+ pins-hdmi-ddc {
|
||||||
|
+ pinmux = <MT7623_PIN_124_GPIO124_FUNC_HDMISCK>,
|
||||||
|
+ <MT7623_PIN_125_GPIO125_FUNC_HDMISD>;
|
||||||
|
+ };
|
||||||
|
+ };
|
||||||
|
+
|
||||||
|
i2c0_pins_a: i2c0-default {
|
||||||
|
pins-i2c0 {
|
||||||
|
pinmux = <MT7623_PIN_75_SDA0_FUNC_SDA0>,
|
||||||
|
diff --git a/arch/arm/boot/dts/mt7623n-bananapi-bpi-r2.dts b/arch/arm/boot/dts/mt7623n-bananapi-bpi-r2.dts
|
||||||
|
index 2b760f90f38c..7a1763472018 100644
|
||||||
|
--- a/arch/arm/boot/dts/mt7623n-bananapi-bpi-r2.dts
|
||||||
|
+++ b/arch/arm/boot/dts/mt7623n-bananapi-bpi-r2.dts
|
||||||
|
@@ -21,6 +21,19 @@
|
||||||
|
stdout-path = "serial2:115200n8";
|
||||||
|
};
|
||||||
|
|
||||||
|
+ connector {
|
||||||
|
+ compatible = "hdmi-connector";
|
||||||
|
+ label = "hdmi";
|
||||||
|
+ type = "d";
|
||||||
|
+ ddc-i2c-bus = <&hdmiddc0>;
|
||||||
|
+
|
||||||
|
+ port {
|
||||||
|
+ hdmi_connector_in: endpoint {
|
||||||
|
+ remote-endpoint = <&hdmi0_out>;
|
||||||
|
+ };
|
||||||
|
+ };
|
||||||
|
+ };
|
||||||
|
+
|
||||||
|
cpus {
|
||||||
|
cpu@0 {
|
||||||
|
proc-supply = <&mt6323_vproc_reg>;
|
||||||
|
@@ -114,10 +127,24 @@
|
||||||
|
};
|
||||||
|
};
|
||||||
|
|
||||||
|
+&bls {
|
||||||
|
+ status = "okay";
|
||||||
|
+
|
||||||
|
+ port {
|
||||||
|
+ bls_out: endpoint {
|
||||||
|
+ remote-endpoint = <&dpi0_in>;
|
||||||
|
+ };
|
||||||
|
+ };
|
||||||
|
+};
|
||||||
|
+
|
||||||
|
&btif {
|
||||||
|
status = "okay";
|
||||||
|
};
|
||||||
|
|
||||||
|
+&cec {
|
||||||
|
+ status = "okay";
|
||||||
|
+};
|
||||||
|
+
|
||||||
|
&cir {
|
||||||
|
pinctrl-names = "default";
|
||||||
|
pinctrl-0 = <&cir_pins_a>;
|
||||||
|
@@ -128,6 +155,28 @@
|
||||||
|
status = "okay";
|
||||||
|
};
|
||||||
|
|
||||||
|
+&dpi0 {
|
||||||
|
+ status = "okay";
|
||||||
|
+
|
||||||
|
+ ports {
|
||||||
|
+ #address-cells = <1>;
|
||||||
|
+ #size-cells = <0>;
|
||||||
|
+ port@0 {
|
||||||
|
+ reg = <0>;
|
||||||
|
+ dpi0_out: endpoint {
|
||||||
|
+ remote-endpoint = <&hdmi0_in>;
|
||||||
|
+ };
|
||||||
|
+ };
|
||||||
|
+
|
||||||
|
+ port@1 {
|
||||||
|
+ reg = <1>;
|
||||||
|
+ dpi0_in: endpoint {
|
||||||
|
+ remote-endpoint = <&bls_out>;
|
||||||
|
+ };
|
||||||
|
+ };
|
||||||
|
+ };
|
||||||
|
+};
|
||||||
|
+
|
||||||
|
ð {
|
||||||
|
status = "okay";
|
||||||
|
|
||||||
|
@@ -199,6 +248,42 @@
|
||||||
|
};
|
||||||
|
};
|
||||||
|
|
||||||
|
+&hdmi0 {
|
||||||
|
+ pinctrl-names = "default";
|
||||||
|
+ pinctrl-0 = <&hdmi_pins_a>;
|
||||||
|
+ status = "okay";
|
||||||
|
+
|
||||||
|
+ ports {
|
||||||
|
+ #address-cells = <1>;
|
||||||
|
+ #size-cells = <0>;
|
||||||
|
+ port@0 {
|
||||||
|
+ reg = <0>;
|
||||||
|
+ hdmi0_in: endpoint {
|
||||||
|
+ remote-endpoint = <&dpi0_out>;
|
||||||
|
+ };
|
||||||
|
+ };
|
||||||
|
+
|
||||||
|
+ port@1 {
|
||||||
|
+ reg = <1>;
|
||||||
|
+ hdmi0_out: endpoint {
|
||||||
|
+ remote-endpoint = <&hdmi_connector_in>;
|
||||||
|
+ };
|
||||||
|
+ };
|
||||||
|
+ };
|
||||||
|
+};
|
||||||
|
+
|
||||||
|
+&hdmiddc0 {
|
||||||
|
+ pinctrl-names = "default";
|
||||||
|
+ pinctrl-0 = <&hdmi_ddc_pins_a>;
|
||||||
|
+ status = "okay";
|
||||||
|
+};
|
||||||
|
+
|
||||||
|
+&hdmi_phy {
|
||||||
|
+ mediatek,ibias = <0xa>;
|
||||||
|
+ mediatek,ibias_up = <0x1c>;
|
||||||
|
+ status = "okay";
|
||||||
|
+};
|
||||||
|
+
|
||||||
|
&i2c0 {
|
||||||
|
pinctrl-names = "default";
|
||||||
|
pinctrl-0 = <&i2c0_pins_a>;
|
||||||
|
diff --git a/arch/arm/boot/dts/mt7623n-rfb-emmc.dts b/arch/arm/boot/dts/mt7623n-rfb-emmc.dts
|
||||||
|
index b7606130ade9..3e5911d8d6bc 100644
|
||||||
|
--- a/arch/arm/boot/dts/mt7623n-rfb-emmc.dts
|
||||||
|
+++ b/arch/arm/boot/dts/mt7623n-rfb-emmc.dts
|
||||||
|
@@ -24,6 +24,19 @@
|
||||||
|
stdout-path = "serial2:115200n8";
|
||||||
|
};
|
||||||
|
|
||||||
|
+ connector {
|
||||||
|
+ compatible = "hdmi-connector";
|
||||||
|
+ label = "hdmi";
|
||||||
|
+ type = "d";
|
||||||
|
+ ddc-i2c-bus = <&hdmiddc0>;
|
||||||
|
+
|
||||||
|
+ port {
|
||||||
|
+ hdmi_connector_in: endpoint {
|
||||||
|
+ remote-endpoint = <&hdmi0_out>;
|
||||||
|
+ };
|
||||||
|
+ };
|
||||||
|
+ };
|
||||||
|
+
|
||||||
|
cpus {
|
||||||
|
cpu@0 {
|
||||||
|
proc-supply = <&mt6323_vproc_reg>;
|
||||||
|
@@ -106,10 +119,24 @@
|
||||||
|
};
|
||||||
|
};
|
||||||
|
|
||||||
|
+&bls {
|
||||||
|
+ status = "okay";
|
||||||
|
+
|
||||||
|
+ port {
|
||||||
|
+ bls_out: endpoint {
|
||||||
|
+ remote-endpoint = <&dpi0_in>;
|
||||||
|
+ };
|
||||||
|
+ };
|
||||||
|
+};
|
||||||
|
+
|
||||||
|
&btif {
|
||||||
|
status = "okay";
|
||||||
|
};
|
||||||
|
|
||||||
|
+&cec {
|
||||||
|
+ status = "okay";
|
||||||
|
+};
|
||||||
|
+
|
||||||
|
&cir {
|
||||||
|
pinctrl-names = "default";
|
||||||
|
pinctrl-0 = <&cir_pins_a>;
|
||||||
|
@@ -120,6 +147,28 @@
|
||||||
|
status = "okay";
|
||||||
|
};
|
||||||
|
|
||||||
|
+&dpi0 {
|
||||||
|
+ status = "okay";
|
||||||
|
+
|
||||||
|
+ ports {
|
||||||
|
+ #address-cells = <1>;
|
||||||
|
+ #size-cells = <0>;
|
||||||
|
+ port@0 {
|
||||||
|
+ reg = <0>;
|
||||||
|
+ dpi0_out: endpoint {
|
||||||
|
+ remote-endpoint = <&hdmi0_in>;
|
||||||
|
+ };
|
||||||
|
+ };
|
||||||
|
+
|
||||||
|
+ port@1 {
|
||||||
|
+ reg = <1>;
|
||||||
|
+ dpi0_in: endpoint {
|
||||||
|
+ remote-endpoint = <&bls_out>;
|
||||||
|
+ };
|
||||||
|
+ };
|
||||||
|
+ };
|
||||||
|
+};
|
||||||
|
+
|
||||||
|
ð {
|
||||||
|
status = "okay";
|
||||||
|
|
||||||
|
@@ -202,6 +251,42 @@
|
||||||
|
};
|
||||||
|
};
|
||||||
|
|
||||||
|
+&hdmi0 {
|
||||||
|
+ pinctrl-names = "default";
|
||||||
|
+ pinctrl-0 = <&hdmi_pins_a>;
|
||||||
|
+ status = "okay";
|
||||||
|
+
|
||||||
|
+ ports {
|
||||||
|
+ #address-cells = <1>;
|
||||||
|
+ #size-cells = <0>;
|
||||||
|
+ port@0 {
|
||||||
|
+ reg = <0>;
|
||||||
|
+ hdmi0_in: endpoint {
|
||||||
|
+ remote-endpoint = <&dpi0_out>;
|
||||||
|
+ };
|
||||||
|
+ };
|
||||||
|
+
|
||||||
|
+ port@1 {
|
||||||
|
+ reg = <1>;
|
||||||
|
+ hdmi0_out: endpoint {
|
||||||
|
+ remote-endpoint = <&hdmi_connector_in>;
|
||||||
|
+ };
|
||||||
|
+ };
|
||||||
|
+ };
|
||||||
|
+};
|
||||||
|
+
|
||||||
|
+&hdmiddc0 {
|
||||||
|
+ pinctrl-names = "default";
|
||||||
|
+ pinctrl-0 = <&hdmi_ddc_pins_a>;
|
||||||
|
+ status = "okay";
|
||||||
|
+};
|
||||||
|
+
|
||||||
|
+&hdmi_phy {
|
||||||
|
+ mediatek,ibias = <0xa>;
|
||||||
|
+ mediatek,ibias_up = <0x1c>;
|
||||||
|
+ status = "okay";
|
||||||
|
+};
|
||||||
|
+
|
||||||
|
&i2c0 {
|
||||||
|
pinctrl-names = "default";
|
||||||
|
pinctrl-0 = <&i2c0_pins_a>;
|
||||||
|
|
@ -0,0 +1,77 @@
|
||||||
|
From 6468d187f12604f38f0a3acde430fdc5c5390771 Mon Sep 17 00:00:00 2001
|
||||||
|
From: Ryder Lee <ryder.lee@mediatek.com>
|
||||||
|
Date: Tue, 23 Jul 2019 11:32:50 +0800
|
||||||
|
Subject: [PATCH] arm: dts: mt7623: add Mali-450 device nodes
|
||||||
|
|
||||||
|
Add nodes for Mali-450 and iommu larb3.
|
||||||
|
|
||||||
|
Signed-off-by: Sean Wang <sean.wang@mediatek.com>
|
||||||
|
Signed-off-by: Ryder Lee <ryder.lee@mediatek.com>
|
||||||
|
---
|
||||||
|
arch/arm/boot/dts/mt7623.dtsi | 39 ++++++++++++++++++++++++++++++++++-
|
||||||
|
1 file changed, 38 insertions(+), 1 deletion(-)
|
||||||
|
|
||||||
|
diff --git a/arch/arm/boot/dts/mt7623.dtsi b/arch/arm/boot/dts/mt7623.dtsi
|
||||||
|
index 8d0807fd9460..f7905561b30e 100644
|
||||||
|
--- a/arch/arm/boot/dts/mt7623.dtsi
|
||||||
|
+++ b/arch/arm/boot/dts/mt7623.dtsi
|
||||||
|
@@ -3,6 +3,7 @@
|
||||||
|
* Copyright (c) 2017-2018 MediaTek Inc.
|
||||||
|
* Author: John Crispin <john@phrozen.org>
|
||||||
|
* Sean Wang <sean.wang@mediatek.com>
|
||||||
|
+ * Ryder Lee <ryder.lee@mediatek.com>
|
||||||
|
*
|
||||||
|
*/
|
||||||
|
|
||||||
|
@@ -371,7 +372,7 @@
|
||||||
|
interrupts = <GIC_SPI 106 IRQ_TYPE_LEVEL_LOW>;
|
||||||
|
clocks = <&infracfg CLK_INFRA_M4U>;
|
||||||
|
clock-names = "bclk";
|
||||||
|
- mediatek,larbs = <&larb0 &larb1 &larb2>;
|
||||||
|
+ mediatek,larbs = <&larb0 &larb1 &larb2 &larb3>;
|
||||||
|
#iommu-cells = <1>;
|
||||||
|
};
|
||||||
|
|
||||||
|
@@ -794,6 +795,42 @@
|
||||||
|
#reset-cells = <1>;
|
||||||
|
};
|
||||||
|
|
||||||
|
+ larb3: larb@13010000 {
|
||||||
|
+ compatible = "mediatek,mt7623-smi-larb",
|
||||||
|
+ "mediatek,mt2701-smi-larb";
|
||||||
|
+ reg = <0 0x13010000 0 0x1000>;
|
||||||
|
+ mediatek,smi = <&smi_common>;
|
||||||
|
+ mediatek,larb-id = <3>;
|
||||||
|
+ clocks = <&clk26m>, <&clk26m>;
|
||||||
|
+ clock-names = "apb", "smi";
|
||||||
|
+ power-domains = <&scpsys MT2701_POWER_DOMAIN_MFG>;
|
||||||
|
+ };
|
||||||
|
+
|
||||||
|
+ mali: gpu@13040000 {
|
||||||
|
+ compatible = "mediatek,mt7623-mali", "arm,mali-450";
|
||||||
|
+ reg = <0 0x13040000 0 0x30000>;
|
||||||
|
+ interrupts = <GIC_SPI 170 IRQ_TYPE_LEVEL_LOW>,
|
||||||
|
+ <GIC_SPI 171 IRQ_TYPE_LEVEL_LOW>,
|
||||||
|
+ <GIC_SPI 172 IRQ_TYPE_LEVEL_LOW>,
|
||||||
|
+ <GIC_SPI 173 IRQ_TYPE_LEVEL_LOW>,
|
||||||
|
+ <GIC_SPI 174 IRQ_TYPE_LEVEL_LOW>,
|
||||||
|
+ <GIC_SPI 175 IRQ_TYPE_LEVEL_LOW>,
|
||||||
|
+ <GIC_SPI 176 IRQ_TYPE_LEVEL_LOW>,
|
||||||
|
+ <GIC_SPI 177 IRQ_TYPE_LEVEL_LOW>,
|
||||||
|
+ <GIC_SPI 178 IRQ_TYPE_LEVEL_LOW>,
|
||||||
|
+ <GIC_SPI 179 IRQ_TYPE_LEVEL_LOW>,
|
||||||
|
+ <GIC_SPI 180 IRQ_TYPE_LEVEL_LOW>;
|
||||||
|
+ interrupt-names = "gp", "gpmmu", "pp0", "ppmmu0", "pp1",
|
||||||
|
+ "ppmmu1", "pp2", "ppmmu2", "pp3", "ppmmu3",
|
||||||
|
+ "pp";
|
||||||
|
+ clocks = <&topckgen CLK_TOP_MMPLL>,
|
||||||
|
+ <&g3dsys CLK_G3DSYS_CORE>;
|
||||||
|
+ clock-names = "bus", "core";
|
||||||
|
+ power-domains = <&scpsys MT2701_POWER_DOMAIN_MFG>;
|
||||||
|
+ mediatek,larb = <&larb3>;
|
||||||
|
+ resets = <&g3dsys MT2701_G3DSYS_CORE_RST>;
|
||||||
|
+ };
|
||||||
|
+
|
||||||
|
mmsys: syscon@14000000 {
|
||||||
|
compatible = "mediatek,mt7623-mmsys",
|
||||||
|
"mediatek,mt2701-mmsys",
|
||||||
|
|
@ -0,0 +1,68 @@
|
||||||
|
From d87e1a23e51158f9c2923f6213a42d5e942a4091 Mon Sep 17 00:00:00 2001
|
||||||
|
From: Frank Wunderlich <frank-w@public-files.de>
|
||||||
|
Date: Thu, 23 Jan 2020 07:16:30 +0100
|
||||||
|
Subject: [PATCH] lima: power on/off via register (function)
|
||||||
|
|
||||||
|
---
|
||||||
|
drivers/gpu/drm/lima/lima_device.c | 31 ++++++++++++++++++++++++++++++
|
||||||
|
1 file changed, 31 insertions(+)
|
||||||
|
|
||||||
|
diff --git a/drivers/gpu/drm/lima/lima_device.c b/drivers/gpu/drm/lima/lima_device.c
|
||||||
|
index d86b8d81a483..7d5d45e176f2 100644
|
||||||
|
--- a/drivers/gpu/drm/lima/lima_device.c
|
||||||
|
+++ b/drivers/gpu/drm/lima/lima_device.c
|
||||||
|
@@ -6,6 +6,7 @@
|
||||||
|
#include <linux/clk.h>
|
||||||
|
#include <linux/dma-mapping.h>
|
||||||
|
#include <linux/platform_device.h>
|
||||||
|
+#include <linux/pm_runtime.h>
|
||||||
|
|
||||||
|
#include "lima_device.h"
|
||||||
|
#include "lima_gp.h"
|
||||||
|
@@ -287,11 +288,33 @@ static void lima_fini_pp_pipe(struct lima_device *dev)
|
||||||
|
lima_sched_pipe_fini(pipe);
|
||||||
|
}
|
||||||
|
|
||||||
|
+void mtk_set_power(bool on)
|
||||||
|
+{
|
||||||
|
+ if (on) {
|
||||||
|
+ void __iomem *wakeup_register;
|
||||||
|
+ wakeup_register = ioremap(0x10003014 , 0x04);
|
||||||
|
+ writel(0x00000001,wakeup_register); // this may be wrong, may need bitbang 0th bit to 1
|
||||||
|
+ iounmap(wakeup_register);
|
||||||
|
+ }else {
|
||||||
|
+ void __iomem *powerdown_register;
|
||||||
|
+ powerdown_register = ioremap(0x1000300C , 0x04); // powerdown register
|
||||||
|
+ writel(0x00000001,powerdown_register); // this may be wrong, may need bitbang 0th bit to 1
|
||||||
|
+ iounmap(powerdown_register);
|
||||||
|
+ }
|
||||||
|
+}
|
||||||
|
+
|
||||||
|
int lima_device_init(struct lima_device *ldev)
|
||||||
|
{
|
||||||
|
int err, i;
|
||||||
|
struct resource *res;
|
||||||
|
|
||||||
|
+ #ifdef CONFIG_MTK_COMBO_CHIP_CONSYS_7623
|
||||||
|
+ mtk_set_power(true);
|
||||||
|
+ pm_runtime_enable(ldev->dev);
|
||||||
|
+ pm_runtime_set_active(ldev->dev);
|
||||||
|
+ pm_runtime_get_sync(ldev->dev);
|
||||||
|
+ #endif
|
||||||
|
+
|
||||||
|
dma_set_coherent_mask(ldev->dev, DMA_BIT_MASK(32));
|
||||||
|
|
||||||
|
err = lima_clk_init(ldev);
|
||||||
|
@@ -385,4 +408,12 @@ void lima_device_fini(struct lima_device *ldev)
|
||||||
|
lima_regulator_fini(ldev);
|
||||||
|
|
||||||
|
lima_clk_fini(ldev);
|
||||||
|
+
|
||||||
|
+ #ifdef CONFIG_MTK_COMBO_CHIP_CONSYS_7623
|
||||||
|
+ pm_runtime_set_suspended(ldev->dev);
|
||||||
|
+ pm_runtime_put_noidle(ldev->dev);
|
||||||
|
+ pm_runtime_disable(ldev->dev);
|
||||||
|
+
|
||||||
|
+ mtk_set_power(false);
|
||||||
|
+ #endif
|
||||||
|
}
|
||||||
|
|
@ -0,0 +1,84 @@
|
||||||
|
From 452b508468a46ef0fe7357fab6b000c52fd047d3 Mon Sep 17 00:00:00 2001
|
||||||
|
From: Stu Hsieh <stu.hsieh@mediatek.com>
|
||||||
|
Date: Fri, 16 Nov 2018 16:33:00 +0100
|
||||||
|
Subject: [PATCH] drm: Add get_possible_crtc API for dpi, dsi
|
||||||
|
|
||||||
|
Test: build pass and run ok
|
||||||
|
|
||||||
|
Signed-off-by: Stu Hsieh <stu.hsieh@mediatek.com>
|
||||||
|
---
|
||||||
|
drivers/gpu/drm/mediatek/mtk_drm_ddp_comp.c | 40 +++++++++++++++++++++
|
||||||
|
drivers/gpu/drm/mediatek/mtk_drm_ddp_comp.h | 2 ++
|
||||||
|
2 files changed, 42 insertions(+)
|
||||||
|
|
||||||
|
diff --git a/drivers/gpu/drm/mediatek/mtk_drm_ddp_comp.c b/drivers/gpu/drm/mediatek/mtk_drm_ddp_comp.c
|
||||||
|
index efa85973e46b..29796e78b26a 100644
|
||||||
|
--- a/drivers/gpu/drm/mediatek/mtk_drm_ddp_comp.c
|
||||||
|
+++ b/drivers/gpu/drm/mediatek/mtk_drm_ddp_comp.c
|
||||||
|
@@ -237,6 +237,22 @@ static const struct mtk_ddp_comp_match mtk_ddp_matches[DDP_COMPONENT_ID_MAX] = {
|
||||||
|
[DDP_COMPONENT_WDMA1] = { MTK_DISP_WDMA, 1, NULL },
|
||||||
|
};
|
||||||
|
|
||||||
|
+static bool mtk_drm_find_comp_in_ddp(struct mtk_ddp_comp ddp_comp,
|
||||||
|
+ const enum mtk_ddp_comp_id *path,
|
||||||
|
+ unsigned int path_len)
|
||||||
|
+{
|
||||||
|
+ unsigned int i;
|
||||||
|
+
|
||||||
|
+ if (path == NULL)
|
||||||
|
+ return false;
|
||||||
|
+
|
||||||
|
+ for (i = 0U; i < path_len; i++)
|
||||||
|
+ if (ddp_comp.id == path[i])
|
||||||
|
+ return true;
|
||||||
|
+
|
||||||
|
+ return false;
|
||||||
|
+}
|
||||||
|
+
|
||||||
|
int mtk_ddp_comp_get_id(struct device_node *node,
|
||||||
|
enum mtk_ddp_comp_type comp_type)
|
||||||
|
{
|
||||||
|
@@ -252,6 +268,30 @@ int mtk_ddp_comp_get_id(struct device_node *node,
|
||||||
|
return -EINVAL;
|
||||||
|
}
|
||||||
|
|
||||||
|
+unsigned int mtk_drm_find_possible_crtc_by_comp(struct drm_device *drm,
|
||||||
|
+ struct mtk_ddp_comp ddp_comp)
|
||||||
|
+{
|
||||||
|
+ struct mtk_drm_private *private = drm->dev_private;
|
||||||
|
+ unsigned int ret;
|
||||||
|
+
|
||||||
|
+ if (mtk_drm_find_comp_in_ddp(ddp_comp, private->data->main_path,
|
||||||
|
+ private->data->main_len) == true) {
|
||||||
|
+ ret = BIT(0);
|
||||||
|
+ } else if (mtk_drm_find_comp_in_ddp(ddp_comp,
|
||||||
|
+ private->data->ext_path,
|
||||||
|
+ private->data->ext_len) == true) {
|
||||||
|
+ ret = BIT(1);
|
||||||
|
+ } else if (mtk_drm_find_comp_in_ddp(ddp_comp,
|
||||||
|
+ private->data->third_path,
|
||||||
|
+ private->data->third_len) == true) {
|
||||||
|
+ ret = BIT(2);
|
||||||
|
+ } else {
|
||||||
|
+ DRM_INFO("Failed to find comp in ddp table\n");
|
||||||
|
+ ret = 0;
|
||||||
|
+ }
|
||||||
|
+ return ret;
|
||||||
|
+}
|
||||||
|
+
|
||||||
|
int mtk_ddp_comp_init(struct device *dev, struct device_node *node,
|
||||||
|
struct mtk_ddp_comp *comp, enum mtk_ddp_comp_id comp_id,
|
||||||
|
const struct mtk_ddp_comp_funcs *funcs)
|
||||||
|
diff --git a/drivers/gpu/drm/mediatek/mtk_drm_ddp_comp.h b/drivers/gpu/drm/mediatek/mtk_drm_ddp_comp.h
|
||||||
|
index 0ad287f427cc..97be111c3e52 100644
|
||||||
|
--- a/drivers/gpu/drm/mediatek/mtk_drm_ddp_comp.h
|
||||||
|
+++ b/drivers/gpu/drm/mediatek/mtk_drm_ddp_comp.h
|
||||||
|
@@ -160,6 +160,8 @@ static inline void mtk_ddp_gamma_set(struct mtk_ddp_comp *comp,
|
||||||
|
|
||||||
|
int mtk_ddp_comp_get_id(struct device_node *node,
|
||||||
|
enum mtk_ddp_comp_type comp_type);
|
||||||
|
+unsigned int mtk_drm_find_possible_crtc_by_comp(struct drm_device *drm,
|
||||||
|
+ struct mtk_ddp_comp ddp_comp);
|
||||||
|
int mtk_ddp_comp_init(struct device *dev, struct device_node *comp_node,
|
||||||
|
struct mtk_ddp_comp *comp, enum mtk_ddp_comp_id comp_id,
|
||||||
|
const struct mtk_ddp_comp_funcs *funcs);
|
||||||
|
|
@ -0,0 +1,45 @@
|
||||||
|
From f4ca44932ccf088f225062aafef04d2bd629b2c4 Mon Sep 17 00:00:00 2001
|
||||||
|
From: Jitao Shi <jitao.shi@mediatek.com>
|
||||||
|
Date: Fri, 3 May 2019 17:16:19 +0200
|
||||||
|
Subject: [PATCH] drm/mediatek: dpi/dsi: change the getting possible_crtc way
|
||||||
|
|
||||||
|
[Detail]
|
||||||
|
dpi/dsi get the possible_crtc by
|
||||||
|
mtk_drm_find_possible_crtc_by_comp(*drm_dev, ddp_comp)
|
||||||
|
|
||||||
|
Test: build pass and boot to logo
|
||||||
|
|
||||||
|
Signed-off-by: Jitao Shi <jitao.shi@mediatek.com>
|
||||||
|
---
|
||||||
|
drivers/gpu/drm/mediatek/mtk_dpi.c | 3 ++-
|
||||||
|
drivers/gpu/drm/mediatek/mtk_dsi.c | 3 ++-
|
||||||
|
2 files changed, 4 insertions(+), 2 deletions(-)
|
||||||
|
|
||||||
|
diff --git a/drivers/gpu/drm/mediatek/mtk_dpi.c b/drivers/gpu/drm/mediatek/mtk_dpi.c
|
||||||
|
index be6d95c5ff25..00d31b5aa09f 100644
|
||||||
|
--- a/drivers/gpu/drm/mediatek/mtk_dpi.c
|
||||||
|
+++ b/drivers/gpu/drm/mediatek/mtk_dpi.c
|
||||||
|
@@ -604,7 +604,8 @@ static int mtk_dpi_bind(struct device *dev, struct device *master, void *data)
|
||||||
|
drm_encoder_helper_add(&dpi->encoder, &mtk_dpi_encoder_helper_funcs);
|
||||||
|
|
||||||
|
/* Currently DPI0 is fixed to be driven by OVL1 */
|
||||||
|
- dpi->encoder.possible_crtcs = BIT(1);
|
||||||
|
+ dpi->encoder.possible_crtcs =
|
||||||
|
+ mtk_drm_find_possible_crtc_by_comp(drm_dev, dpi->ddp_comp);
|
||||||
|
|
||||||
|
ret = drm_bridge_attach(&dpi->encoder, dpi->bridge, NULL);
|
||||||
|
if (ret) {
|
||||||
|
diff --git a/drivers/gpu/drm/mediatek/mtk_dsi.c b/drivers/gpu/drm/mediatek/mtk_dsi.c
|
||||||
|
index 224afb666881..2c2d3643f3e8 100644
|
||||||
|
--- a/drivers/gpu/drm/mediatek/mtk_dsi.c
|
||||||
|
+++ b/drivers/gpu/drm/mediatek/mtk_dsi.c
|
||||||
|
@@ -817,7 +817,8 @@ static int mtk_dsi_create_conn_enc(struct drm_device *drm, struct mtk_dsi *dsi)
|
||||||
|
* Currently display data paths are statically assigned to a crtc each.
|
||||||
|
* crtc 0 is OVL0 -> COLOR0 -> AAL -> OD -> RDMA0 -> UFOE -> DSI0
|
||||||
|
*/
|
||||||
|
- dsi->encoder.possible_crtcs = 1;
|
||||||
|
+ dsi->encoder.possible_crtcs =
|
||||||
|
+ mtk_drm_find_possible_crtc_by_comp(drm, dsi->ddp_comp);
|
||||||
|
|
||||||
|
/* If there's a bridge, attach to it and let it create the connector */
|
||||||
|
if (dsi->bridge) {
|
||||||
|
|
@ -0,0 +1,21 @@
|
||||||
|
From 34dd2a86c9e3b3ad1a3a00add409edda2b2ed776 Mon Sep 17 00:00:00 2001
|
||||||
|
From: Frank Wunderlich <frank-w@public-files.de>
|
||||||
|
Date: Tue, 1 Oct 2019 11:21:03 +0200
|
||||||
|
Subject: [PATCH] drm: fix implicit declaration of function 'DRM_INFO'
|
||||||
|
|
||||||
|
---
|
||||||
|
drivers/gpu/drm/mediatek/mtk_drm_ddp_comp.c | 1 +
|
||||||
|
1 file changed, 1 insertion(+)
|
||||||
|
|
||||||
|
diff --git a/drivers/gpu/drm/mediatek/mtk_drm_ddp_comp.c b/drivers/gpu/drm/mediatek/mtk_drm_ddp_comp.c
|
||||||
|
index 29796e78b26a..e65d83267563 100644
|
||||||
|
--- a/drivers/gpu/drm/mediatek/mtk_drm_ddp_comp.c
|
||||||
|
+++ b/drivers/gpu/drm/mediatek/mtk_drm_ddp_comp.c
|
||||||
|
@@ -12,6 +12,7 @@
|
||||||
|
#include <linux/of_irq.h>
|
||||||
|
#include <linux/of_platform.h>
|
||||||
|
#include <linux/platform_device.h>
|
||||||
|
+#include <drm/drm_print.h>
|
||||||
|
|
||||||
|
#include "mtk_drm_drv.h"
|
||||||
|
#include "mtk_drm_plane.h"
|
||||||
|
|
@ -0,0 +1,146 @@
|
||||||
|
From 6e3f7375acdcf714d1fcbae1238cd39cc9391560 Mon Sep 17 00:00:00 2001
|
||||||
|
From: Bibby Hsieh <bibby.hsieh@mediatek.com>
|
||||||
|
Date: Fri, 21 Sep 2018 11:28:22 +0800
|
||||||
|
Subject: [PATCH] drm/mediatek: config component output by device node port
|
||||||
|
|
||||||
|
We can select output component by decive node port.
|
||||||
|
Main path default output component is DSI.
|
||||||
|
External path default output component is DPI.
|
||||||
|
|
||||||
|
Signed-off-by: Bibby Hsieh <bibby.hsieh@mediatek.com>
|
||||||
|
|
||||||
|
added small fixes for warnings
|
||||||
|
|
||||||
|
Signed-off-by: Frank Wunderlich <frank-w@public-files.de>
|
||||||
|
Tested-by: Frank Wunderlich <frank-w@public-files.de>
|
||||||
|
---
|
||||||
|
drivers/gpu/drm/mediatek/mtk_drm_drv.c | 46 ++++++++++++++++++++++----
|
||||||
|
drivers/gpu/drm/mediatek/mtk_drm_drv.h | 4 +--
|
||||||
|
2 files changed, 42 insertions(+), 8 deletions(-)
|
||||||
|
|
||||||
|
diff --git a/drivers/gpu/drm/mediatek/mtk_drm_drv.c b/drivers/gpu/drm/mediatek/mtk_drm_drv.c
|
||||||
|
index 352b81a7a670..33511c77b800 100644
|
||||||
|
--- a/drivers/gpu/drm/mediatek/mtk_drm_drv.c
|
||||||
|
+++ b/drivers/gpu/drm/mediatek/mtk_drm_drv.c
|
||||||
|
@@ -21,6 +21,13 @@
|
||||||
|
#include <drm/drm_of.h>
|
||||||
|
#include <drm/drm_probe_helper.h>
|
||||||
|
#include <drm/drm_vblank.h>
|
||||||
|
+#include <linux/component.h>
|
||||||
|
+#include <linux/iommu.h>
|
||||||
|
+#include <linux/of.h>
|
||||||
|
+#include <linux/of_address.h>
|
||||||
|
+#include <linux/of_graph.h>
|
||||||
|
+#include <linux/of_platform.h>
|
||||||
|
+#include <linux/pm_runtime.h>
|
||||||
|
|
||||||
|
#include "mtk_drm_crtc.h"
|
||||||
|
#include "mtk_drm_ddp.h"
|
||||||
|
@@ -121,7 +128,7 @@ static const struct drm_mode_config_funcs mtk_drm_mode_config_funcs = {
|
||||||
|
.atomic_commit = mtk_atomic_commit,
|
||||||
|
};
|
||||||
|
|
||||||
|
-static const enum mtk_ddp_comp_id mt2701_mtk_ddp_main[] = {
|
||||||
|
+static enum mtk_ddp_comp_id mt2701_mtk_ddp_main[] = {
|
||||||
|
DDP_COMPONENT_OVL0,
|
||||||
|
DDP_COMPONENT_RDMA0,
|
||||||
|
DDP_COMPONENT_COLOR0,
|
||||||
|
@@ -129,12 +136,12 @@ static const enum mtk_ddp_comp_id mt2701_mtk_ddp_main[] = {
|
||||||
|
DDP_COMPONENT_DSI0,
|
||||||
|
};
|
||||||
|
|
||||||
|
-static const enum mtk_ddp_comp_id mt2701_mtk_ddp_ext[] = {
|
||||||
|
+static enum mtk_ddp_comp_id mt2701_mtk_ddp_ext[] = {
|
||||||
|
DDP_COMPONENT_RDMA1,
|
||||||
|
DDP_COMPONENT_DPI0,
|
||||||
|
};
|
||||||
|
|
||||||
|
-static const enum mtk_ddp_comp_id mt2712_mtk_ddp_main[] = {
|
||||||
|
+static enum mtk_ddp_comp_id mt2712_mtk_ddp_main[] = {
|
||||||
|
DDP_COMPONENT_OVL0,
|
||||||
|
DDP_COMPONENT_COLOR0,
|
||||||
|
DDP_COMPONENT_AAL0,
|
||||||
|
@@ -144,7 +151,7 @@ static const enum mtk_ddp_comp_id mt2712_mtk_ddp_main[] = {
|
||||||
|
DDP_COMPONENT_PWM0,
|
||||||
|
};
|
||||||
|
|
||||||
|
-static const enum mtk_ddp_comp_id mt2712_mtk_ddp_ext[] = {
|
||||||
|
+static enum mtk_ddp_comp_id mt2712_mtk_ddp_ext[] = {
|
||||||
|
DDP_COMPONENT_OVL1,
|
||||||
|
DDP_COMPONENT_COLOR1,
|
||||||
|
DDP_COMPONENT_AAL1,
|
||||||
|
@@ -160,7 +167,7 @@ static const enum mtk_ddp_comp_id mt2712_mtk_ddp_third[] = {
|
||||||
|
DDP_COMPONENT_PWM2,
|
||||||
|
};
|
||||||
|
|
||||||
|
-static const enum mtk_ddp_comp_id mt8173_mtk_ddp_main[] = {
|
||||||
|
+static enum mtk_ddp_comp_id mt8173_mtk_ddp_main[] = {
|
||||||
|
DDP_COMPONENT_OVL0,
|
||||||
|
DDP_COMPONENT_COLOR0,
|
||||||
|
DDP_COMPONENT_AAL0,
|
||||||
|
@@ -171,7 +178,7 @@ static const enum mtk_ddp_comp_id mt8173_mtk_ddp_main[] = {
|
||||||
|
DDP_COMPONENT_PWM0,
|
||||||
|
};
|
||||||
|
|
||||||
|
-static const enum mtk_ddp_comp_id mt8173_mtk_ddp_ext[] = {
|
||||||
|
+static enum mtk_ddp_comp_id mt8173_mtk_ddp_ext[] = {
|
||||||
|
DDP_COMPONENT_OVL1,
|
||||||
|
DDP_COMPONENT_COLOR1,
|
||||||
|
DDP_COMPONENT_GAMMA,
|
||||||
|
@@ -510,6 +517,7 @@ static int mtk_drm_probe(struct platform_device *pdev)
|
||||||
|
|
||||||
|
/* Iterate over sibling DISP function blocks */
|
||||||
|
for_each_child_of_node(dev->of_node->parent, node) {
|
||||||
|
+ struct device_node *port, *ep, *remote;
|
||||||
|
const struct of_device_id *of_id;
|
||||||
|
enum mtk_ddp_comp_type comp_type;
|
||||||
|
int comp_id;
|
||||||
|
@@ -572,6 +580,32 @@ static int mtk_drm_probe(struct platform_device *pdev)
|
||||||
|
|
||||||
|
private->ddp_comp[comp_id] = comp;
|
||||||
|
}
|
||||||
|
+
|
||||||
|
+ if (comp_type != MTK_DSI && comp_type != MTK_DPI) {
|
||||||
|
+ port = of_graph_get_port_by_id(node, 0);
|
||||||
|
+ if (!port)
|
||||||
|
+ continue;
|
||||||
|
+ ep = of_get_child_by_name(port, "endpoint");
|
||||||
|
+ of_node_put(port);
|
||||||
|
+ if (!ep)
|
||||||
|
+ continue;
|
||||||
|
+ remote = of_graph_get_remote_port_parent(ep);
|
||||||
|
+ of_node_put(ep);
|
||||||
|
+ if (!remote)
|
||||||
|
+ continue;
|
||||||
|
+ of_id = of_match_node(mtk_ddp_comp_dt_ids, remote);
|
||||||
|
+ if (!of_id)
|
||||||
|
+ continue;
|
||||||
|
+ comp_type = (enum mtk_ddp_comp_type)of_id->data;
|
||||||
|
+ for (i = 0; i < private->data->main_len - 1; i++)
|
||||||
|
+ if (private->data->main_path[i] == comp_id)
|
||||||
|
+ private->data->main_path[i + 1] =
|
||||||
|
+ mtk_ddp_comp_get_id(node, comp_type);
|
||||||
|
+ for (i = 0; i < private->data->ext_len - 1; i++)
|
||||||
|
+ if (private->data->ext_path[i] == comp_id)
|
||||||
|
+ private->data->ext_path[i + 1] =
|
||||||
|
+ mtk_ddp_comp_get_id(node, comp_type);
|
||||||
|
+ }
|
||||||
|
}
|
||||||
|
|
||||||
|
if (!private->mutex_node) {
|
||||||
|
diff --git a/drivers/gpu/drm/mediatek/mtk_drm_drv.h b/drivers/gpu/drm/mediatek/mtk_drm_drv.h
|
||||||
|
index e03fea12ff59..5fb723415ff6 100644
|
||||||
|
--- a/drivers/gpu/drm/mediatek/mtk_drm_drv.h
|
||||||
|
+++ b/drivers/gpu/drm/mediatek/mtk_drm_drv.h
|
||||||
|
@@ -21,9 +21,9 @@ struct drm_property;
|
||||||
|
struct regmap;
|
||||||
|
|
||||||
|
struct mtk_mmsys_driver_data {
|
||||||
|
- const enum mtk_ddp_comp_id *main_path;
|
||||||
|
+ enum mtk_ddp_comp_id *main_path;
|
||||||
|
unsigned int main_len;
|
||||||
|
- const enum mtk_ddp_comp_id *ext_path;
|
||||||
|
+ enum mtk_ddp_comp_id *ext_path;
|
||||||
|
unsigned int ext_len;
|
||||||
|
const enum mtk_ddp_comp_id *third_path;
|
||||||
|
unsigned int third_len;
|
||||||
|
|
@ -0,0 +1,55 @@
|
||||||
|
From ba9c6527b05d294bdda7910db224e327f1460166 Mon Sep 17 00:00:00 2001
|
||||||
|
From: chunhui dai <chunhui.dai@mediatek.com>
|
||||||
|
Date: Wed, 31 Oct 2018 16:59:34 +0800
|
||||||
|
Subject: [PATCH] drm/mediatek: fix boot up for 720 and 480 but 1080
|
||||||
|
|
||||||
|
- 1080 plg in/out with ng/ok
|
||||||
|
- support other resolutions like 1280x1024
|
||||||
|
|
||||||
|
Signed-off-by: chunhui dai <chunhui.dai@mediatek.com>
|
||||||
|
Signed-off-by: Frank Wunderlich <frank-w@public-files.de>
|
||||||
|
Tested-by: Frank Wunderlich <frank-w@public-files.de>
|
||||||
|
---
|
||||||
|
drivers/gpu/drm/mediatek/mtk_hdmi_phy.c | 3 +++
|
||||||
|
drivers/gpu/drm/mediatek/mtk_hdmi_phy.h | 1 +
|
||||||
|
drivers/gpu/drm/mediatek/mtk_mt2701_hdmi_phy.c | 1 +
|
||||||
|
3 files changed, 5 insertions(+)
|
||||||
|
|
||||||
|
diff --git a/drivers/gpu/drm/mediatek/mtk_hdmi_phy.c b/drivers/gpu/drm/mediatek/mtk_hdmi_phy.c
|
||||||
|
index 5223498502c4..edadb7a700f1 100644
|
||||||
|
--- a/drivers/gpu/drm/mediatek/mtk_hdmi_phy.c
|
||||||
|
+++ b/drivers/gpu/drm/mediatek/mtk_hdmi_phy.c
|
||||||
|
@@ -184,6 +184,9 @@ static int mtk_hdmi_phy_probe(struct platform_device *pdev)
|
||||||
|
return PTR_ERR(phy_provider);
|
||||||
|
}
|
||||||
|
|
||||||
|
+ if (hdmi_phy->conf->pll_default_off)
|
||||||
|
+ hdmi_phy->conf->hdmi_phy_disable_tmds(hdmi_phy);
|
||||||
|
+
|
||||||
|
return of_clk_add_provider(dev->of_node, of_clk_src_simple_get,
|
||||||
|
hdmi_phy->pll);
|
||||||
|
}
|
||||||
|
diff --git a/drivers/gpu/drm/mediatek/mtk_hdmi_phy.h b/drivers/gpu/drm/mediatek/mtk_hdmi_phy.h
|
||||||
|
index 2d8b3182470d..f472fdeb63dc 100644
|
||||||
|
--- a/drivers/gpu/drm/mediatek/mtk_hdmi_phy.h
|
||||||
|
+++ b/drivers/gpu/drm/mediatek/mtk_hdmi_phy.h
|
||||||
|
@@ -22,6 +22,7 @@ struct mtk_hdmi_phy;
|
||||||
|
struct mtk_hdmi_phy_conf {
|
||||||
|
bool tz_disabled;
|
||||||
|
unsigned long flags;
|
||||||
|
+ bool pll_default_off;
|
||||||
|
const struct clk_ops *hdmi_phy_clk_ops;
|
||||||
|
void (*hdmi_phy_enable_tmds)(struct mtk_hdmi_phy *hdmi_phy);
|
||||||
|
void (*hdmi_phy_disable_tmds)(struct mtk_hdmi_phy *hdmi_phy);
|
||||||
|
diff --git a/drivers/gpu/drm/mediatek/mtk_mt2701_hdmi_phy.c b/drivers/gpu/drm/mediatek/mtk_mt2701_hdmi_phy.c
|
||||||
|
index d3cc4022e988..6fbedacfc1e8 100644
|
||||||
|
--- a/drivers/gpu/drm/mediatek/mtk_mt2701_hdmi_phy.c
|
||||||
|
+++ b/drivers/gpu/drm/mediatek/mtk_mt2701_hdmi_phy.c
|
||||||
|
@@ -239,6 +239,7 @@ static void mtk_hdmi_phy_disable_tmds(struct mtk_hdmi_phy *hdmi_phy)
|
||||||
|
struct mtk_hdmi_phy_conf mtk_hdmi_phy_2701_conf = {
|
||||||
|
.tz_disabled = true,
|
||||||
|
.flags = CLK_SET_RATE_GATE,
|
||||||
|
+ .pll_default_off = true,
|
||||||
|
.hdmi_phy_clk_ops = &mtk_hdmi_phy_pll_ops,
|
||||||
|
.hdmi_phy_enable_tmds = mtk_hdmi_phy_enable_tmds,
|
||||||
|
.hdmi_phy_disable_tmds = mtk_hdmi_phy_disable_tmds,
|
||||||
|
|
@ -0,0 +1,56 @@
|
||||||
|
From aa97a44297179ab6ba1aa8f59e781541a320066b Mon Sep 17 00:00:00 2001
|
||||||
|
From: Frank Wunderlich <frank-w@public-files.de>
|
||||||
|
Date: Fri, 31 Jan 2020 17:28:04 +0100
|
||||||
|
Subject: [PATCH] thermal: mediatek: add sensors-support
|
||||||
|
|
||||||
|
---
|
||||||
|
drivers/thermal/mtk_thermal.c | 22 ++++++++++++++++++++++
|
||||||
|
1 file changed, 22 insertions(+)
|
||||||
|
|
||||||
|
diff --git a/drivers/thermal/mtk_thermal.c b/drivers/thermal/mtk_thermal.c
|
||||||
|
index d1b066383c45..8cf3a69bfa46 100644
|
||||||
|
--- a/drivers/thermal/mtk_thermal.c
|
||||||
|
+++ b/drivers/thermal/mtk_thermal.c
|
||||||
|
@@ -23,6 +23,8 @@
|
||||||
|
#include <linux/reset.h>
|
||||||
|
#include <linux/types.h>
|
||||||
|
|
||||||
|
+#include "thermal_hwmon.h"
|
||||||
|
+
|
||||||
|
/* AUXADC Registers */
|
||||||
|
#define AUXADC_CON1_SET_V 0x008
|
||||||
|
#define AUXADC_CON1_CLR_V 0x00c
|
||||||
|
@@ -990,6 +992,13 @@ static void mtk_thermal_release_periodic_ts(struct mtk_thermal *mt,
|
||||||
|
writel((tmp & (~0x10e)), mt->thermal_base + TEMP_MSRCTL1);
|
||||||
|
}
|
||||||
|
|
||||||
|
+static void mtk_thermal_hwmon_action(void *data)
|
||||||
|
+{
|
||||||
|
+ struct thermal_zone_device *zone = data;
|
||||||
|
+
|
||||||
|
+ thermal_remove_hwmon_sysfs(zone);
|
||||||
|
+}
|
||||||
|
+
|
||||||
|
static int mtk_thermal_probe(struct platform_device *pdev)
|
||||||
|
{
|
||||||
|
int ret, i, ctrl_id;
|
||||||
|
@@ -1094,6 +1103,19 @@ static int mtk_thermal_probe(struct platform_device *pdev)
|
||||||
|
goto err_disable_clk_peri_therm;
|
||||||
|
}
|
||||||
|
|
||||||
|
+ tzdev->tzp->no_hwmon = false;
|
||||||
|
+ ret = thermal_add_hwmon_sysfs(tzdev);
|
||||||
|
+ if (ret)
|
||||||
|
+ dev_err(&pdev->dev,"error in thermal_add_hwmon_sysfs");
|
||||||
|
+ //goto err_disable_clk_peri_therm;
|
||||||
|
+
|
||||||
|
+ ret = devm_add_action(&pdev->dev, mtk_thermal_hwmon_action, tzdev);
|
||||||
|
+ if (ret) {
|
||||||
|
+ dev_err(&pdev->dev,"error in devm_add_action");
|
||||||
|
+ mtk_thermal_hwmon_action(tzdev);
|
||||||
|
+ //goto err_disable_clk_peri_therm;
|
||||||
|
+ }
|
||||||
|
+
|
||||||
|
return 0;
|
||||||
|
|
||||||
|
err_disable_clk_peri_therm:
|
||||||
35
root/target/linux/mediatek/patches-5.4/0191-thermal.patch
Normal file
35
root/target/linux/mediatek/patches-5.4/0191-thermal.patch
Normal file
|
|
@ -0,0 +1,35 @@
|
||||||
|
From 9847677bda4920bbba15499f28009ce095f02c99 Mon Sep 17 00:00:00 2001
|
||||||
|
From: Frank Wunderlich <frank-w@public-files.de>
|
||||||
|
Date: Fri, 31 Jan 2020 18:49:56 +0100
|
||||||
|
Subject: [PATCH] thermal: mediatek: execute hwmon-code only if hwmon_thermal
|
||||||
|
is set
|
||||||
|
|
||||||
|
---
|
||||||
|
drivers/thermal/mtk_thermal.c | 4 ++--
|
||||||
|
1 file changed, 2 insertions(+), 2 deletions(-)
|
||||||
|
|
||||||
|
diff --git a/drivers/thermal/mtk_thermal.c b/drivers/thermal/mtk_thermal.c
|
||||||
|
index 8cf3a69bfa46..3a646b88f587 100644
|
||||||
|
--- a/drivers/thermal/mtk_thermal.c
|
||||||
|
+++ b/drivers/thermal/mtk_thermal.c
|
||||||
|
@@ -1103,18 +1103,18 @@ static int mtk_thermal_probe(struct platform_device *pdev)
|
||||||
|
goto err_disable_clk_peri_therm;
|
||||||
|
}
|
||||||
|
|
||||||
|
+#ifdef CONFIG_THERMAL_HWMON
|
||||||
|
tzdev->tzp->no_hwmon = false;
|
||||||
|
ret = thermal_add_hwmon_sysfs(tzdev);
|
||||||
|
if (ret)
|
||||||
|
dev_err(&pdev->dev,"error in thermal_add_hwmon_sysfs");
|
||||||
|
- //goto err_disable_clk_peri_therm;
|
||||||
|
|
||||||
|
ret = devm_add_action(&pdev->dev, mtk_thermal_hwmon_action, tzdev);
|
||||||
|
if (ret) {
|
||||||
|
dev_err(&pdev->dev,"error in devm_add_action");
|
||||||
|
mtk_thermal_hwmon_action(tzdev);
|
||||||
|
- //goto err_disable_clk_peri_therm;
|
||||||
|
}
|
||||||
|
+#endif
|
||||||
|
|
||||||
|
return 0;
|
||||||
|
|
||||||
14
root/target/linux/mediatek/patches-5.4/0230-pthread.patch
Normal file
14
root/target/linux/mediatek/patches-5.4/0230-pthread.patch
Normal file
|
|
@ -0,0 +1,14 @@
|
||||||
|
--- a/scripts/Makefile 2020-03-21 22:28:13.290800484 +0800
|
||||||
|
+++ b/scripts/Makefile 2020-03-21 22:28:26.230870790 +0800
|
||||||
|
@@ -23,8 +23,8 @@ hostprogs-$(CONFIG_SYSTEM_EXTRA_CERTIFIC
|
||||||
|
|
||||||
|
HOSTCFLAGS_sortextable.o = -I$(srctree)/tools/include
|
||||||
|
HOSTCFLAGS_asn1_compiler.o = -I$(srctree)/include
|
||||||
|
-HOSTLDLIBS_sign-file = -lcrypto
|
||||||
|
-HOSTLDLIBS_extract-cert = -lcrypto
|
||||||
|
+HOSTLDLIBS_sign-file = -lcrypto -lpthread
|
||||||
|
+HOSTLDLIBS_extract-cert = -lcrypto -lpthread
|
||||||
|
|
||||||
|
always := $(hostprogs-y) $(hostprogs-m)
|
||||||
|
|
||||||
|
|
||||||
49
root/target/linux/mediatek/patches-5.4/0999-lan-to-wan.patch
Normal file
49
root/target/linux/mediatek/patches-5.4/0999-lan-to-wan.patch
Normal file
|
|
@ -0,0 +1,49 @@
|
||||||
|
--- a/arch/arm/boot/dts/mt7623n-bananapi-bpi-r2.dts 2020-04-19 11:02:56.505715879 +0200
|
||||||
|
+++ b/arch/arm/boot/dts/mt7623n-bananapi-bpi-r2.dts 2020-04-19 11:03:53.620780390 +0200
|
||||||
|
@@ -196,7 +196,7 @@
|
||||||
|
gmac1: mac@1 {
|
||||||
|
compatible = "mediatek,eth-mac";
|
||||||
|
reg = <1>;
|
||||||
|
- label = "wan";
|
||||||
|
+ label = "lan";
|
||||||
|
phy-mode = "rgmii";
|
||||||
|
phy-handle = <&ephy0>;
|
||||||
|
local-mac-address = [00 0a 35 00 00 02];
|
||||||
|
@@ -221,31 +221,31 @@
|
||||||
|
#address-cells = <1>;
|
||||||
|
#size-cells = <0>;
|
||||||
|
|
||||||
|
-/* Disabled, is now handled by gmac1 (eth1/wan) via phy-handle!
|
||||||
|
+/* Disabled, is now handled by gmac1 (eth1/lan) via phy-handle!
|
||||||
|
port@0 {
|
||||||
|
reg = <0>;
|
||||||
|
- label = "wan";
|
||||||
|
+ label = "lan";
|
||||||
|
};
|
||||||
|
*/
|
||||||
|
|
||||||
|
port@1 {
|
||||||
|
reg = <1>;
|
||||||
|
- label = "lan0";
|
||||||
|
+ label = "wan1";
|
||||||
|
};
|
||||||
|
|
||||||
|
port@2 {
|
||||||
|
reg = <2>;
|
||||||
|
- label = "lan1";
|
||||||
|
+ label = "wan2";
|
||||||
|
};
|
||||||
|
|
||||||
|
port@3 {
|
||||||
|
reg = <3>;
|
||||||
|
- label = "lan2";
|
||||||
|
+ label = "wan3";
|
||||||
|
};
|
||||||
|
|
||||||
|
port@4 {
|
||||||
|
reg = <4>;
|
||||||
|
- label = "lan3";
|
||||||
|
+ label = "wan4";
|
||||||
|
};
|
||||||
|
|
||||||
|
port@6 {
|
||||||
Loading…
Reference in a new issue