diff --git a/6.1/target/linux/ipq806x/files-6.1/arch/arm/boot/dts/qcom-ipq8064-ad7200-c2600.dtsi b/6.1/target/linux/ipq806x/files-6.1/arch/arm/boot/dts/qcom-ipq8064-ad7200-c2600.dtsi index dd57fc02..3494b2bd 100644 --- a/6.1/target/linux/ipq806x/files-6.1/arch/arm/boot/dts/qcom-ipq8064-ad7200-c2600.dtsi +++ b/6.1/target/linux/ipq806x/files-6.1/arch/arm/boot/dts/qcom-ipq8064-ad7200-c2600.dtsi @@ -10,6 +10,17 @@ device_type = "memory"; }; + reserved-memory { + ramoops@42100000 { + compatible = "ramoops"; + reg = <0x42100000 0x40000>; + record-size = <0x4000>; + console-size = <0x4000>; + ftrace-size = <0x4000>; + pmsg-size = <0x4000>; + }; + }; + aliases { mdio-gpio0 = &mdio0; label-mac-device = &gmac2; diff --git a/6.1/target/linux/ipq806x/files-6.1/arch/arm/boot/dts/qcom-ipq8064-asus-onhub.dts b/6.1/target/linux/ipq806x/files-6.1/arch/arm/boot/dts/qcom-ipq8064-asus-onhub.dts new file mode 100644 index 00000000..442bcf19 --- /dev/null +++ b/6.1/target/linux/ipq806x/files-6.1/arch/arm/boot/dts/qcom-ipq8064-asus-onhub.dts @@ -0,0 +1,92 @@ +// SPDX-License-Identifier: GPL-2.0 +/* + * Copyright 2014 The ChromiumOS Authors + */ + +#include "qcom-ipq8064-onhub.dtsi" +#include +#include +#include + +/ { + model = "ASUS OnHub"; + compatible = "asus,onhub", "google,arkham", "qcom,ipq8064"; +}; + +&qcom_pinmux { + ap3223_pins: ap3223_pinmux { + pins = "gpio22"; + function = "gpio"; + bias-none; + }; + + i2c7_pins: i2c7_pinmux { + mux { + pins = "gpio8", "gpio9"; + function = "gsbi7"; + }; + data { + pins = "gpio8"; + bias-disable; + }; + clk { + pins = "gpio9"; + bias-disable; + }; + }; +}; + +&gsbi7 { + status = "okay"; + qcom,mode = ; +}; + +&gsbi7_i2c { + status = "okay"; + clock-frequency = <100000>; + pinctrl-0 = <&i2c7_pins>; + pinctrl-names = "default"; + + ap3223@1c { + compatible = "dynaimage,ap3223"; + reg = <0x1c>; + + pinctrl-0 = <&ap3223_pins>; + pinctrl-names = "default"; + + int-gpio = <&qcom_pinmux 22 GPIO_ACTIVE_LOW>; + }; + + led-controller@32 { + compatible = "national,lp5523"; + reg = <0x32>; + clock-mode = /bits/ 8 <1>; + #address-cells = <1>; + #size-cells = <0>; + + led@4 { + reg = <4>; + color = ; + chan-name = "green:status"; + linux,default-trigger = "default-on"; + led-cur = /bits/ 8 <0xfa>; + max-cur = /bits/ 8 <0xff>; + }; + + led@5 { + reg = <5>; + color = ; + chan-name = "blue:status"; + led-cur = /bits/ 8 <0xfa>; + max-cur = /bits/ 8 <0xff>; + }; + + led@8 { + reg = <8>; + color = ; + chan-name = "red:status"; + led-cur = /bits/ 8 <0xfa>; + max-cur = /bits/ 8 <0xff>; + }; + }; +}; diff --git a/6.1/target/linux/ipq806x/files-6.1/arch/arm/boot/dts/qcom-ipq8064-eax500.dtsi b/6.1/target/linux/ipq806x/files-6.1/arch/arm/boot/dts/qcom-ipq8064-eax500.dtsi index adf5192a..910bd86b 100644 --- a/6.1/target/linux/ipq806x/files-6.1/arch/arm/boot/dts/qcom-ipq8064-eax500.dtsi +++ b/6.1/target/linux/ipq806x/files-6.1/arch/arm/boot/dts/qcom-ipq8064-eax500.dtsi @@ -12,6 +12,18 @@ }; }; +&qcom_pinmux { + /* eax500 routers reuse the pcie2 reset pin for switch reset pin */ + switch_reset: switch_reset_pins { + mux { + pins = "gpio63"; + function = "gpio"; + drive-strength = <12>; + bias-pull-up; + }; + }; +}; + &hs_phy_0 { status = "okay"; }; @@ -46,10 +58,6 @@ status = "okay"; }; -&pcie2 { - status = "okay"; -}; - &nand { status = "okay"; @@ -173,6 +181,10 @@ pinctrl-0 = <&mdio0_pins>; pinctrl-names = "default"; + /* Switch from documentation require at least 10ms for reset */ + reset-gpios = <&qcom_pinmux 63 GPIO_ACTIVE_HIGH>; + reset-post-delay-us = <12000>; + phy0: ethernet-phy@0 { reg = <0>; qca,ar8327-initvals = < diff --git a/6.1/target/linux/ipq806x/files-6.1/arch/arm/boot/dts/qcom-ipq8064-g10.dts b/6.1/target/linux/ipq806x/files-6.1/arch/arm/boot/dts/qcom-ipq8064-g10.dts index 59d5d3ec..63a72b53 100644 --- a/6.1/target/linux/ipq806x/files-6.1/arch/arm/boot/dts/qcom-ipq8064-g10.dts +++ b/6.1/target/linux/ipq806x/files-6.1/arch/arm/boot/dts/qcom-ipq8064-g10.dts @@ -158,71 +158,17 @@ pinctrl-0 = <&mdio0_pins>; pinctrl-names = "default"; - switch@10 { - compatible = "qca,qca8337"; - #address-cells = <1>; - #size-cells = <0>; - reg = <0x10>; - - qca8k,rgmii56_1_8v; - - ports { - #address-cells = <1>; - #size-cells = <0>; - - port@0 { - reg = <0>; - label = "cpu"; - ethernet = <&gmac1>; - phy-mode = "rgmii-id"; - - fixed-link { - speed = <1000>; - full-duplex; - }; - }; - - port@1 { - reg = <1>; - label = "lan1"; - }; - - port@2 { - reg = <2>; - label = "lan2"; - }; - - port@3 { - reg = <3>; - label = "lan3"; - }; - - port@4 { - reg = <4>; - label = "lan4"; - }; - - port@5 { - reg = <5>; - label = "wan"; - }; - - /* - port@6 { - reg = <0>; - label = "cpu"; - ethernet = <&gmac2>; - phy-mode = "rgmii"; - - fixed-link { - speed = <1000>; - full-duplex; - pause; - asym-pause; - }; - }; - */ - }; + ethernet-phy@0 { + reg = <0>; + qca,ar8327-initvals = < + 0x00004 0x7600000 /* PAD0_MODE */ + 0x00008 0x1000000 /* PAD5_MODE */ + 0x0000c 0x80 /* PAD6_MODE */ + 0x000e4 0x6a545 /* MAC_POWER_SEL */ + 0x000e0 0xc74164de /* SGMII_CTRL */ + 0x0007c 0x4e /* PORT0_STATUS */ + 0x00094 0x4e /* PORT6_STATUS */ + >; }; }; diff --git a/6.1/target/linux/ipq806x/files-6.1/arch/arm/boot/dts/qcom-ipq8064-onhub.dtsi b/6.1/target/linux/ipq806x/files-6.1/arch/arm/boot/dts/qcom-ipq8064-onhub.dtsi new file mode 100644 index 00000000..549c4620 --- /dev/null +++ b/6.1/target/linux/ipq806x/files-6.1/arch/arm/boot/dts/qcom-ipq8064-onhub.dtsi @@ -0,0 +1,491 @@ +// SPDX-License-Identifier: GPL-2.0 +/* + * Copyright 2014 The ChromiumOS Authors + */ + +#include "qcom-ipq8064-smb208.dtsi" +#include +#include +#include + +/ { + aliases { + ethernet0 = &gmac0; + ethernet1 = &gmac2; + mdio-gpio0 = &mdio; + serial0 = &gsbi4_serial; + }; + + chosen { + stdout-path = "serial0:115200n8"; + }; + + reserved-memory { + #address-cells = <1>; + #size-cells = <1>; + ranges; + + rsvd@41200000 { + reg = <0x41200000 0x300000>; + no-map; + }; + }; + + keys { + compatible = "gpio-keys"; + pinctrl-0 = <&button_pins>; + pinctrl-names = "default"; + + reset { + label = "reset"; + gpios = <&qcom_pinmux 16 GPIO_ACTIVE_LOW>; + linux,code = ; + debounce-interval = <60>; + wakeup-source; + }; + + dev { + label = "dev"; + gpios = <&qcom_pinmux 15 GPIO_ACTIVE_LOW>; + linux,code = ; + debounce-interval = <60>; + wakeup-source; + }; + }; + + mdio: mdio { + compatible = "virtual,mdio-gpio"; + #address-cells = <1>; + #size-cells = <0>; + gpios = <&qcom_pinmux 1 GPIO_ACTIVE_HIGH>, + <&qcom_pinmux 0 GPIO_ACTIVE_HIGH>; + pinctrl-0 = <&mdio_pins>; + pinctrl-names = "default"; + + phy0: ethernet-phy@0 { + reg = <0>; + qca,ar8327-initvals = < + 0x00004 0x7600000 /* PAD0_MODE */ + 0x00008 0x1000000 /* PAD5_MODE */ + 0x0000c 0x80 /* PAD6_MODE */ + 0x000e4 0xaa545 /* MAC_POWER_SEL */ + 0x000e0 0xc74164de /* SGMII_CTRL */ + 0x0007c 0x4e /* PORT0_STATUS */ + 0x00094 0x4e /* PORT6_STATUS */ + >; + }; + + phy1: ethernet-phy@1 { + reg = <1>; + }; + }; + + soc { + rng@1a500000 { + status = "disabled"; + }; + + sound { + compatible = "google,storm-audio"; + qcom,model = "ipq806x-storm"; + cpu = <&lpass>; + codec = <&max98357a>; + }; + + lpass: lpass@28100000 { + status = "okay"; + pinctrl-names = "default", "idle"; + pinctrl-0 = <&mi2s_default>; + pinctrl-1 = <&mi2s_idle>; + }; + + max98357a: max98357a { + compatible = "maxim,max98357a"; + #sound-dai-cells = <1>; + pinctrl-names = "default"; + pinctrl-0 = <&sdmode_pins>; + sdmode-gpios = <&qcom_pinmux 25 GPIO_ACTIVE_HIGH>; + }; + }; +}; + +&qcom_pinmux { + rgmii0_pins: rgmii0_pins { + mux { + pins = "gpio2", "gpio66"; + drive-strength = <8>; + bias-disable; + }; + }; + mi2s_pins { + mi2s_default: mi2s_default { + dout { + pins = "gpio32"; + function = "mi2s"; + drive-strength = <16>; + bias-disable; + }; + sync { + pins = "gpio27"; + function = "mi2s"; + drive-strength = <16>; + bias-disable; + }; + clk { + pins = "gpio28"; + function = "mi2s"; + drive-strength = <16>; + bias-disable; + }; + }; + mi2s_idle: mi2s_idle { + dout { + pins = "gpio32"; + function = "mi2s"; + drive-strength = <2>; + bias-pull-down; + }; + sync { + pins = "gpio27"; + function = "mi2s"; + drive-strength = <2>; + bias-pull-down; + }; + clk { + pins = "gpio28"; + function = "mi2s"; + drive-strength = <2>; + bias-pull-down; + }; + }; + }; + + mdio_pins: mdio_pins { + mux { + pins = "gpio0", "gpio1"; + function = "gpio"; + drive-strength = <8>; + bias-disable; + }; + rst { + pins = "gpio26"; + output-low; + }; + }; + + sdmode_pins: sdmode_pinmux { + pins = "gpio25"; + function = "gpio"; + drive-strength = <16>; + bias-disable; + }; + + sdcc1_pins: sdcc1_pinmux { + mux { + pins = "gpio38", "gpio39", "gpio40", + "gpio41", "gpio42", "gpio43", + "gpio44", "gpio45", "gpio46", + "gpio47"; + function = "sdc1"; + }; + cmd { + pins = "gpio45"; + drive-strength = <10>; + bias-pull-up; + }; + data { + pins = "gpio38", "gpio39", "gpio40", + "gpio41", "gpio43", "gpio44", + "gpio46", "gpio47"; + drive-strength = <10>; + bias-pull-up; + }; + clk { + pins = "gpio42"; + drive-strength = <16>; + bias-pull-down; + }; + }; + + i2c1_pins: i2c1_pinmux { + pins = "gpio53", "gpio54"; + function = "gsbi1"; + bias-disable; + }; + + rpm_i2c_pinmux: rpm_i2c_pinmux { + mux { + pins = "gpio12", "gpio13"; + function = "gsbi4"; + drive-strength = <12>; + bias-disable; + }; + }; + + spi_pins: spi_pins { + mux { + pins = "gpio18", "gpio19", "gpio21"; + function = "gsbi5"; + bias-pull-down; + /delete-property/ bias-none; + /delete-property/ drive-strength; + }; + data { + pins = "gpio18", "gpio19"; + drive-strength = <10>; + }; + cs { + pins = "gpio20"; + drive-strength = <10>; + bias-pull-up; + }; + clk { + pins = "gpio21"; + drive-strength = <12>; + }; + }; + + fw_pinmux { + wp { + pins = "gpio17"; + output-low; + }; + }; + + button_pins: button_pins { + recovery { + pins = "gpio16"; + function = "gpio"; + bias-none; + }; + developer { + pins = "gpio15"; + function = "gpio"; + bias-none; + }; + }; + + spi6_pins: spi6_pins { + mux { + pins = "gpio55", "gpio56", "gpio58"; + function = "gsbi6"; + bias-pull-down; + }; + data { + pins = "gpio55", "gpio56"; + drive-strength = <10>; + }; + cs { + pins = "gpio57"; + drive-strength = <10>; + bias-pull-up; + output-high; + }; + clk { + pins = "gpio58"; + drive-strength = <12>; + }; + }; +}; + +&gmac0 { + status = "okay"; + phy-mode = "rgmii"; + qcom,id = <0>; + phy-handle = <&phy1>; + + pinctrl-0 = <&rgmii0_pins>; + pinctrl-names = "default"; + + fixed-link { + speed = <1000>; + full-duplex; + }; +}; + +&gmac2 { + status = "okay"; + phy-mode = "sgmii"; + qcom,id = <2>; + phy-handle = <&phy0>; + + fixed-link { + speed = <1000>; + full-duplex; + }; +}; + +&gsbi1 { + status = "okay"; + qcom,mode = ; +}; + +&gsbi1_i2c { + status = "okay"; + + clock-frequency = <100000>; + + pinctrl-0 = <&i2c1_pins>; + pinctrl-names = "default"; + + tpm@20 { + compatible = "infineon,slb9645tt"; + reg = <0x20>; + powered-while-suspended; + }; +}; + +&gsbi4 { + status = "okay"; + qcom,mode = ; +}; + +&gsbi4_serial { + status = "okay"; +}; + +&gsbi5 { + status = "okay"; + qcom,mode = ; + + spi4: spi@1a280000 { + status = "okay"; + spi-max-frequency = <50000000>; + pinctrl-0 = <&spi_pins>; + pinctrl-names = "default"; + + cs-gpios = <&qcom_pinmux 20 0>; + + flash: flash@0 { + compatible = "jedec,spi-nor"; + spi-max-frequency = <50000000>; + reg = <0>; + }; + }; +}; + +&gsbi6 { + status = "okay"; + qcom,mode = ; +}; + +&gsbi6_spi { + status = "okay"; + spi-max-frequency = <25000000>; + + pinctrl-0 = <&spi6_pins>; + pinctrl-names = "default"; + + cs-gpios = <&qcom_pinmux 57 GPIO_ACTIVE_HIGH>; + + dmas = <&adm_dma 8 0xb>, + <&adm_dma 7 0x14>; + dma-names = "rx", "tx"; + + /* + * This "spidev" was included in the manufacturer device tree. I suspect + * it's the (unused) Zigbee radio -- SiliconLabs EM3581 Zigbee? There's + * no driver or binding for this at the moment. + */ + spidev@0 { + compatible = "spidev"; + reg = <0>; + spi-max-frequency = <25000000>; + }; +}; + +&pcie0 { + status = "okay"; + + pcie@0 { + reg = <0 0 0 0 0>; + #interrupt-cells = <1>; + #size-cells = <2>; + #address-cells = <3>; + device_type = "pci"; + + ath10k@0,0 { + reg = <0 0 0 0 0>; + device_type = "pci"; + qcom,ath10k-sa-gpio = <2 3 4 0>; + qcom,ath10k-sa-gpio-func = <5 5 5 0>; + }; + }; +}; + +&pcie1 { + status = "okay"; + + pcie@0 { + reg = <0 0 0 0 0>; + #interrupt-cells = <1>; + #size-cells = <2>; + #address-cells = <3>; + device_type = "pci"; + + ath10k@0,0 { + reg = <0 0 0 0 0>; + device_type = "pci"; + qcom,ath10k-sa-gpio = <2 3 4 0>; + qcom,ath10k-sa-gpio-func = <5 5 5 0>; + }; + }; +}; + +&pcie2 { + status = "okay"; + + pcie@0 { + reg = <0 0 0 0 0>; + #interrupt-cells = <1>; + #size-cells = <2>; + #address-cells = <3>; + device_type = "pci"; + + ath10k@0,0 { + reg = <0 0 0 0 0>; + device_type = "pci"; + }; + }; +}; + +&rpm { + pinctrl-0 = <&rpm_i2c_pinmux>; + pinctrl-names = "default"; +}; + +&sdcc1 { + status = "okay"; + pinctrl-0 = <&sdcc1_pins>; + pinctrl-names = "default"; + /delete-property/ mmc-ddr-1_8v; +}; + +&tcsr { + compatible = "qcom,tcsr-ipq8064", "qcom,tcsr", "syscon"; + qcom,usb-ctrl-select = ; +}; + +&hs_phy_0 { + status = "okay"; +}; + +&ss_phy_0 { + status = "okay"; +}; + +&usb3_0 { + status = "okay"; +}; + +&hs_phy_1 { + status = "okay"; +}; + +&ss_phy_1 { + status = "okay"; +}; + +&usb3_1 { + status = "okay"; +}; diff --git a/6.1/target/linux/ipq806x/files-6.1/arch/arm/boot/dts/qcom-ipq8064-tplink-onhub.dts b/6.1/target/linux/ipq806x/files-6.1/arch/arm/boot/dts/qcom-ipq8064-tplink-onhub.dts new file mode 100644 index 00000000..6adc6be4 --- /dev/null +++ b/6.1/target/linux/ipq806x/files-6.1/arch/arm/boot/dts/qcom-ipq8064-tplink-onhub.dts @@ -0,0 +1,209 @@ +// SPDX-License-Identifier: GPL-2.0 +/* + * Copyright 2014 The ChromiumOS Authors + */ + +#include "qcom-ipq8064-onhub.dtsi" +#include +#include +#include + +/ { + model = "TP-Link OnHub"; + compatible = "tplink,onhub", "google,whirlwind-sp5", "qcom,ipq8064"; +}; + +&qcom_pinmux { + i2c7_pins: i2c7_pinmux { + mux { + pins = "gpio8", "gpio9"; + function = "gsbi7"; + }; + data { + pins = "gpio8"; + bias-disable; + }; + clk { + pins = "gpio9"; + bias-disable; + }; + }; +}; + +&gsbi7 { + status = "okay"; + qcom,mode = ; +}; + +&gsbi7_i2c { + status = "okay"; + clock-frequency = <100000>; + pinctrl-0 = <&i2c7_pins>; + pinctrl-names = "default"; + + led-controller@32 { + compatible = "national,lp5523"; + reg = <0x32>; + clock-mode = /bits/ 8 <1>; + #address-cells = <1>; + #size-cells = <0>; + + led@0 { + reg = <0>; + color = ; + chan-name = "red:status-0"; + linux,default-trigger = "default-on"; + led-cur = /bits/ 8 <0x64>; + max-cur = /bits/ 8 <0x78>; + }; + + led@1 { + reg = <1>; + color = ; + chan-name = "green:status-0"; + led-cur = /bits/ 8 <0x64>; + max-cur = /bits/ 8 <0x78>; + }; + + led@2 { + reg = <2>; + color = ; + chan-name = "blue:status-0"; + led-cur = /bits/ 8 <0x64>; + max-cur = /bits/ 8 <0x78>; + }; + + led@3 { + reg = <3>; + color = ; + chan-name = "red:status-1"; + led-cur = /bits/ 8 <0x64>; + max-cur = /bits/ 8 <0x78>; + }; + + led@4 { + reg = <4>; + color = ; + chan-name = "green:status-1"; + linux,default-trigger = "default-on"; + led-cur = /bits/ 8 <0x64>; + max-cur = /bits/ 8 <0x78>; + }; + + led@5 { + reg = <5>; + color = ; + chan-name = "blue:status-1"; + led-cur = /bits/ 8 <0x64>; + max-cur = /bits/ 8 <0x78>; + }; + + led@6 { + reg = <6>; + color = ; + chan-name = "red:status-2"; + led-cur = /bits/ 8 <0x64>; + max-cur = /bits/ 8 <0x78>; + }; + + led@7 { + reg = <7>; + color = ; + chan-name = "green:status-2"; + led-cur = /bits/ 8 <0x64>; + max-cur = /bits/ 8 <0x78>; + }; + + led@8 { + reg = <8>; + color = ; + chan-name = "blue:status-2"; + linux,default-trigger = "default-on"; + led-cur = /bits/ 8 <0x64>; + max-cur = /bits/ 8 <0x78>; + }; + }; + + led-controller@33 { + compatible = "national,lp5523"; + reg = <0x33>; + clock-mode = /bits/ 8 <1>; + #address-cells = <1>; + #size-cells = <0>; + + led@0 { + reg = <0>; + color = ; + chan-name = "red:status-3"; + linux,default-trigger = "default-on"; + led-cur = /bits/ 8 <0x64>; + max-cur = /bits/ 8 <0x78>; + }; + + led@1 { + reg = <1>; + color = ; + chan-name = "green:status-3"; + led-cur = /bits/ 8 <0x64>; + max-cur = /bits/ 8 <0x78>; + }; + + led@2 { + reg = <2>; + color = ; + chan-name = "blue:status-3"; + led-cur = /bits/ 8 <0x64>; + max-cur = /bits/ 8 <0x78>; + }; + + led@3 { + reg = <3>; + color = ; + chan-name = "red:status-4"; + led-cur = /bits/ 8 <0x64>; + max-cur = /bits/ 8 <0x78>; + }; + + led@4 { + reg = <4>; + color = ; + chan-name = "green:status-4"; + linux,default-trigger = "default-on"; + led-cur = /bits/ 8 <0x64>; + max-cur = /bits/ 8 <0x78>; + }; + + led@5 { + reg = <5>; + color = ; + chan-name = "blue:status-4"; + led-cur = /bits/ 8 <0x64>; + max-cur = /bits/ 8 <0x78>; + }; + + led@6 { + reg = <6>; + color = ; + chan-name = "red:status-5"; + led-cur = /bits/ 8 <0x64>; + max-cur = /bits/ 8 <0x78>; + }; + + led@7 { + reg = <7>; + color = ; + chan-name = "green:status-5"; + led-cur = /bits/ 8 <0x64>; + max-cur = /bits/ 8 <0x78>; + }; + + led@8 { + reg = <8>; + color = ; + chan-name = "blue:status-5"; + linux,default-trigger = "default-on"; + led-cur = /bits/ 8 <0x64>; + max-cur = /bits/ 8 <0x78>; + }; + }; +}; diff --git a/6.1/target/linux/ipq806x/files-6.1/arch/arm/boot/dts/qcom-ipq8064-wpq864.dts b/6.1/target/linux/ipq806x/files-6.1/arch/arm/boot/dts/qcom-ipq8064-wpq864.dts index ee257f9d..359b4cd4 100644 --- a/6.1/target/linux/ipq806x/files-6.1/arch/arm/boot/dts/qcom-ipq8064-wpq864.dts +++ b/6.1/target/linux/ipq806x/files-6.1/arch/arm/boot/dts/qcom-ipq8064-wpq864.dts @@ -119,140 +119,140 @@ nand-ecc-step-size = <512>; nand-is-boot-medium; - qcom,boot-partitions = <0x0 0x1180000 0x5340000 0x6400000>; + qcom,boot-partitions = <0x0 0x1180000 0x5340000 0x10c0000>; partitions { compatible = "fixed-partitions"; #address-cells = <1>; #size-cells = <1>; - SBL1@0 { - label = "SBL1"; + partition@0 { + label = "0:SBL1"; reg = <0x0000000 0x0040000>; read-only; }; - MIBIB@40000 { - label = "MIBIB"; + partition@40000 { + label = "0:MIBIB"; reg = <0x0040000 0x0140000>; read-only; }; - SBL2@180000 { - label = "SBL2"; + partition@180000 { + label = "0:SBL2"; reg = <0x0180000 0x0140000>; read-only; }; - SBL3@2c0000 { - label = "SBL3"; + partition@2c0000 { + label = "0:SBL3"; reg = <0x02c0000 0x0280000>; read-only; }; - DDRCONFIG@540000 { - label = "DDRCONFIG"; + partition@540000 { + label = "0:DDRCONFIG"; reg = <0x0540000 0x0120000>; read-only; }; - SSD@660000 { - label = "SSD"; + partition@660000 { + label = "0:SSD"; reg = <0x0660000 0x0120000>; read-only; }; - TZ@780000 { - label = "TZ"; + partition@780000 { + label = "0:TZ"; reg = <0x0780000 0x0280000>; read-only; }; - RPM@a00000 { - label = "RPM"; + partition@a00000 { + label = "0:RPM"; reg = <0x0a00000 0x0280000>; read-only; }; - APPSBL@c80000 { - label = "APPSBL"; + partition@c80000 { + label = "0:APPSBL"; reg = <0x0c80000 0x0500000>; read-only; }; - APPSBLENV@1180000 { - label = "APPSBLENV"; + partition@1180000 { + label = "0:APPSBLENV"; reg = <0x1180000 0x0080000>; }; - ART@1200000 { - label = "ART"; + partition@1200000 { + label = "0:ART"; reg = <0x1200000 0x0140000>; }; - ubi@1340000 { + partition@1340000 { label = "ubi"; reg = <0x1340000 0x4000000>; }; - BOOTCONFIG@5340000 { - label = "BOOTCONFIG"; + partition@5340000 { + label = "0:BOOTCONFIG"; reg = <0x5340000 0x0060000>; }; - SBL2-1@53a0000- { - label = "SBL2_1"; + partition@53a0000 { + label = "0:SBL2_1"; reg = <0x53a0000 0x0140000>; read-only; }; - SBL3-1@54e0000 { - label = "SBL3_1"; + partition@54e0000 { + label = "0:SBL3_1"; reg = <0x54e0000 0x0280000>; read-only; }; - DDRCONFIG-1@5760000 { - label = "DDRCONFIG_1"; + partition@5760000 { + label = "0:DDRCONFIG_1"; reg = <0x5760000 0x0120000>; read-only; }; - SSD-1@5880000 { - label = "SSD_1"; + partition@5880000 { + label = "0:SSD_1"; reg = <0x5880000 0x0120000>; read-only; }; - TZ-1@59a0000 { - label = "TZ_1"; + partition@59a0000 { + label = "0:TZ_1"; reg = <0x59a0000 0x0280000>; read-only; }; - RPM-1@5c20000 { - label = "RPM_1"; + partition@5c20000 { + label = "0:RPM_1"; reg = <0x5c20000 0x0280000>; read-only; }; - BOOTCONFIG1@5ea0000 { - label = "BOOTCONFIG1"; + partition@5ea0000 { + label = "0:BOOTCONFIG1"; reg = <0x5ea0000 0x0060000>; }; - APPSBL-1@5f00000 { - label = "APPSBL_1"; + partition@5f00000 { + label = "0:APPSBL_1"; reg = <0x5f00000 0x0500000>; read-only; }; - ubi-1@6400000 { + partition@6400000 { label = "ubi_1"; reg = <0x6400000 0x4000000>; }; - unused@a400000 { + partition@a400000 { label = "unused"; reg = <0xa400000 0x5c00000>; }; diff --git a/6.1/target/linux/ipq806x/files-6.1/arch/arm/boot/dts/qcom-ipq8065-ac400i.dts b/6.1/target/linux/ipq806x/files-6.1/arch/arm/boot/dts/qcom-ipq8065-ac400i.dts new file mode 100644 index 00000000..7151f8de --- /dev/null +++ b/6.1/target/linux/ipq806x/files-6.1/arch/arm/boot/dts/qcom-ipq8065-ac400i.dts @@ -0,0 +1,318 @@ +// SPDX-License-Identifier: GPL-2.0-or-later OR MIT + +#include "qcom-ipq8065-smb208.dtsi" +#include + +/ { + model = "Nokia AC400i"; + compatible = "nokia,ac400i", "qcom,ipq8065", "qcom,ipq8064"; + + aliases { + mdio-gpio0 = &mdio0; + ethernet0 = &gmac0; + ethernet1 = &gmac1; + + led-boot = &pwr_red; + led-failsafe = &pwr_red; + led-running = &pwr_green; + led-upgrade = &pwr_green; + }; + + chosen { + bootargs-override = " console=ttyMSM0,115200n8 ubi.mtd=ubi root=/dev/ubiblock0_2"; + }; + + keys { + compatible = "gpio-keys"; + pinctrl-0 = <&button_pins>; + pinctrl-names = "default"; + + reset { + label = "reset"; + gpios = <&qcom_pinmux 15 GPIO_ACTIVE_LOW>; + linux,code = ; + }; + }; + + leds { + compatible = "gpio-leds"; + pinctrl-0 = <&led_pins>; + pinctrl-names = "default"; + + 5g_red { + label = "red:5g"; + gpios = <&qcom_pinmux 65 GPIO_ACTIVE_HIGH>; + }; + + 5g_green { + label = "green:5g"; + gpios = <&qcom_pinmux 64 GPIO_ACTIVE_HIGH>; + }; + + 2g_red { + label = "red:2g"; + gpios = <&qcom_pinmux 53 GPIO_ACTIVE_HIGH>; + }; + + 2g_green { + label = "green:2g"; + gpios = <&qcom_pinmux 54 GPIO_ACTIVE_HIGH>; + }; + + eth1_red { + label = "red:eth1"; + gpios = <&qcom_pinmux 68 GPIO_ACTIVE_HIGH>; + }; + + eth1_green { + label = "green:eth1"; + gpios = <&qcom_pinmux 22 GPIO_ACTIVE_LOW>; + }; + + eth2_red { + label = "red:eth2"; + gpios = <&qcom_pinmux 67 GPIO_ACTIVE_HIGH>; + }; + + eth2_green { + label = "green:eth2"; + gpios = <&qcom_pinmux 23 GPIO_ACTIVE_LOW>; + }; + + ctrl_red { + label = "red:ctrl"; + gpios = <&qcom_pinmux 55 GPIO_ACTIVE_HIGH>; + }; + + ctrl_green { + label = "green:ctrl"; + gpios = <&qcom_pinmux 56 GPIO_ACTIVE_HIGH>; + }; + + pwr_red: pwr_red { + label = "red:pwr"; + gpios = <&qcom_pinmux 2 GPIO_ACTIVE_LOW>; + }; + + pwr_green: pwr_green { + label = "green:pwr"; + gpios = <&qcom_pinmux 26 GPIO_ACTIVE_HIGH>; + }; + }; +}; + +&qcom_pinmux { + spi_pins: spi_pins { + mux { + pins = "gpio18", "gpio19"; + function = "gsbi5"; + drive-strength = <10>; + bias-pull-down; + }; + + clk { + pins = "gpio21"; + function = "gsbi5"; + drive-strength = <12>; + bias-pull-down; + }; + + cs { + pins = "gpio20"; + function = "gpio"; + drive-strength = <10>; + bias-pull-up; + }; + }; + + led_pins: led_pins { + mux { + pins = "gpio65", "gpio64", + "gpio53", "gpio54", + "gpio68", "gpio22", + "gpio67", "gpio23", + "gpio55", "gpio56", + "gpio2", "gpio26"; + function = "gpio"; + drive-strength = <2>; + bias-pull-up; + }; + }; + + button_pins: button_pins { + mux { + pins = "gpio15"; + function = "gpio"; + drive-strength = <2>; + bias-pull-up; + }; + }; + +}; + +&gsbi5 { + qcom,mode = ; + status = "okay"; + + spi4: spi@1a280000 { + status = "okay"; + spi-max-frequency = <50000000>; + + pinctrl-0 = <&spi_pins>; + pinctrl-names = "default"; + + cs-gpios = <&qcom_pinmux 20 GPIO_ACTIVE_HIGH>; + + m25p80@0 { + compatible = "jedec,spi-nor"; + #address-cells = <1>; + #size-cells = <1>; + spi-max-frequency = <50000000>; + reg = <0>; + + partitions { + compatible = "qcom,smem-part"; + }; + }; + }; +}; + +&usb3_0 { + status = "okay"; +}; + +&usb3_1 { + status = "okay"; +}; + +&pcie0 { + status = "okay"; + + /delete-property/ pinctrl-0; + /delete-property/ pinctrl-names; + /delete-property/ perst-gpios; + + bridge@0,0 { + reg = <0x00000000 0 0 0 0>; + #address-cells = <3>; + #size-cells = <2>; + ranges; + + wifi@1,0 { + compatible = "qcom,ath10k"; + status = "okay"; + reg = <0x00010000 0 0 0 0>; + qcom,ath10k-calibration-variant = "Nokia-AC400i"; + }; + }; +}; + +&pcie1 { + status = "okay"; + + /delete-property/ pinctrl-0; + /delete-property/ pinctrl-names; + /delete-property/ perst-gpios; + + bridge@0,0 { + reg = <0x00000000 0 0 0 0>; + #address-cells = <3>; + #size-cells = <2>; + ranges; + + wifi@1,0 { + compatible = "qcom,ath10k"; + status = "okay"; + reg = <0x00010000 0 0 0 0>; + qcom,ath10k-calibration-variant = "Nokia-AC400i"; + }; + }; +}; + +&mdio0 { + status = "okay"; + pinctrl-0 = <&mdio0_pins>; + pinctrl-names = "default"; + + phy0: ethernet-phy@0 { + reg = <0>; + }; + + phy1: ethernet-phy@1 { + reg = <1>; + }; + +}; + +//POE +&gmac0 { + status = "okay"; + qcom,id = <0>; + + pinctrl-0 = <&rgmii2_pins>; + pinctrl-names = "default"; + + mdiobus = <&mdio0>; + phy-handle = <&phy0>; + phy-mode = "rgmii"; + + fixed-link { + speed = <1000>; + full-duplex; + }; +}; + +//LAN1 +&gmac1 { + status = "okay"; + qcom,id = <1>; + + mdiobus = <&mdio0>; + phy-handle = <&phy1>; + phy-mode = "rgmii"; + + fixed-link { + speed = <1000>; + full-duplex; + }; +}; + +&nand { + status = "okay"; + pinctrl-0 = <&nand_pins>; + pinctrl-names = "default"; + + nand@0 { + reg = <0>; + compatible = "qcom,nandcs"; + + nand-ecc-strength = <4>; + nand-bus-width = <8>; + nand-ecc-step-size = <512>; + + partitions { + compatible = "fixed-partitions"; + #address-cells = <1>; + #size-cells = <1>; + + rootfs@0 { + label = "rootfs"; + reg = <0x0000000 0x4000000>; + }; + + rootfs_1@4000000 { + label = "rootfs_1"; + reg = <0x4000000 0x4000000>; + }; + + cfg@8000000 { + label = "cfg"; + reg = <0x8000000 0x8000000>; + }; + }; + }; +}; + +&adm_dma { + status = "okay"; +}; diff --git a/6.1/target/linux/ipq806x/files-6.1/arch/arm/boot/dts/qcom-ipq8065-nbg6817.dts b/6.1/target/linux/ipq806x/files-6.1/arch/arm/boot/dts/qcom-ipq8065-nbg6817.dts index 60a949f4..162b28d2 100644 --- a/6.1/target/linux/ipq806x/files-6.1/arch/arm/boot/dts/qcom-ipq8065-nbg6817.dts +++ b/6.1/target/linux/ipq806x/files-6.1/arch/arm/boot/dts/qcom-ipq8065-nbg6817.dts @@ -321,8 +321,10 @@ }; }; -&sdcc1 { - status = "okay"; +&amba { + sdcc1: sdcc@12400000 { + status = "okay"; + }; }; &adm_dma { diff --git a/6.1/target/linux/ipq806x/files-6.1/arch/arm/boot/dts/qcom-ipq8065-rt4230w-rev6.dts b/6.1/target/linux/ipq806x/files-6.1/arch/arm/boot/dts/qcom-ipq8065-rt4230w-rev6.dts index 10844ecc..8d9601b6 100644 --- a/6.1/target/linux/ipq806x/files-6.1/arch/arm/boot/dts/qcom-ipq8065-rt4230w-rev6.dts +++ b/6.1/target/linux/ipq806x/files-6.1/arch/arm/boot/dts/qcom-ipq8065-rt4230w-rev6.dts @@ -138,7 +138,7 @@ nand-bus-width = <8>; nand-ecc-step-size = <512>; - qcom,boot-partitions = <0x0 0x1180000 0x1340000 0x2400000>; + qcom,boot-partitions = <0x0 0x1180000 0x1340000 0x10c0000>; partitions { compatible = "fixed-partitions"; diff --git a/6.1/target/linux/ipq806x/files-6.1/arch/arm/boot/dts/qcom-ipq8065-tr4400-v2.dts b/6.1/target/linux/ipq806x/files-6.1/arch/arm/boot/dts/qcom-ipq8065-tr4400-v2.dts index 075c1f7e..7b236af2 100644 --- a/6.1/target/linux/ipq806x/files-6.1/arch/arm/boot/dts/qcom-ipq8065-tr4400-v2.dts +++ b/6.1/target/linux/ipq806x/files-6.1/arch/arm/boot/dts/qcom-ipq8065-tr4400-v2.dts @@ -127,7 +127,7 @@ nand-bus-width = <8>; nand-ecc-step-size = <512>; - qcom,boot-partitions = <0x0 0x1180000 0x5340000 0x6400000>; + qcom,boot-partitions = <0x0 0x1180000 0x5340000 0x10c0000>; partitions { compatible = "fixed-partitions";