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Kernel 5.4 RUTX support

This commit is contained in:
Ycarus (Yannick Chabanois) 2023-08-14 17:47:02 +02:00
parent 839fcf1cab
commit cfce9f52b2
7376 changed files with 3902 additions and 546 deletions

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#
# U-boot - Makefile
#
# Copyright (c) 2005-2008 Analog Device Inc.
#
# (C) Copyright 2000-2006
# Wolfgang Denk, DENX Software Engineering, wd@denx.de.
#
# See file CREDITS for list of people who contributed to this
# project.
#
# This program is free software; you can redistribute it and/or
# modify it under the terms of the GNU General Public License as
# published by the Free Software Foundation; either version 2 of
# the License, or (at your option) any later version.
#
# This program is distributed in the hope that it will be useful,
# but WITHOUT ANY WARRANTY; without even the implied warranty of
# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
# GNU General Public License for more details.
#
# You should have received a copy of the GNU General Public License
# along with this program; if not, write to the Free Software
# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
# MA 02111-1307 USA
#
include $(TOPDIR)/config.mk
LIB = $(obj)lib$(BOARD).o
COBJS-y := $(BOARD).o gpio_cfi_flash.o cled.o
COBJS-$(CONFIG_BFIN_MAC) += smsc9303.o
SRCS := $(SOBJS-y:.o=.S) $(COBJS-y:.o=.c)
OBJS := $(addprefix $(obj),$(COBJS-y))
SOBJS := $(addprefix $(obj),$(SOBJS-y))
$(LIB): $(obj).depend $(OBJS) $(SOBJS)
$(call cmd_link_o_target, $(OBJS) $(SOBJS))
# defines $(obj).depend target
include $(SRCTREE)/rules.mk
sinclude $(obj).depend

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/*
* U-boot - main board file for BCT brettl2
*
* Copyright (c) 2010 BCT Electronic GmbH
*
* Licensed under the GPL-2 or later.
*/
#include <common.h>
#include <config.h>
#include <command.h>
#include <asm/blackfin.h>
#include <asm/portmux.h>
#include <asm/gpio.h>
#include <asm/net.h>
#include <net.h>
#include <netdev.h>
#include <miiphy.h>
#include "../cm-bf537e/gpio_cfi_flash.h"
#include "smsc9303.h"
DECLARE_GLOBAL_DATA_PTR;
int checkboard(void)
{
printf("Board: bct-brettl2 board\n");
printf(" Support: http://www.bct-electronic.com/\n");
return 0;
}
#ifdef CONFIG_BFIN_MAC
static void board_init_enetaddr(uchar *mac_addr)
{
puts("Warning: Generating 'random' MAC address\n");
bfin_gen_rand_mac(mac_addr);
eth_setenv_enetaddr("ethaddr", mac_addr);
}
int board_eth_init(bd_t *bis)
{
int retry = 3;
int ret;
ret = bfin_EMAC_initialize(bis);
uchar enetaddr[6];
if (eth_getenv_enetaddr("ethaddr", enetaddr)) {
printf("setting MAC %pM\n", enetaddr);
}
puts(" ");
puts("initialize SMSC LAN9303i ethernet switch\n");
while (retry-- > 0) {
if (init_smsc9303i_mii())
return ret;
}
return ret;
}
#endif
static void init_tlv320aic31(void)
{
puts("Audio: setup TIMER0 to enable 16.384 MHz clock for tlv320aic31\n");
peripheral_request(P_TMR0, "tlv320aic31 clock");
bfin_write_TIMER0_CONFIG(0x020d);
bfin_write_TIMER0_PERIOD(0x0008);
bfin_write_TIMER0_WIDTH(0x0008/2);
bfin_write_TIMER_ENABLE(bfin_read_TIMER_ENABLE() | 1);
SSYNC();
udelay(10000);
puts(" resetting tlv320aic31\n");
gpio_request(GPIO_PF2, "tlv320aic31");
gpio_direction_output(GPIO_PF2, 0);
udelay(10000);
gpio_direction_output(GPIO_PF2, 1);
udelay(10000);
gpio_free(GPIO_PF2);
}
static void init_mute_pin(void)
{
printf(" unmute class D amplifier\n");
gpio_request(GPIO_PF5, "mute");
gpio_direction_output(GPIO_PF5, 1);
gpio_free(GPIO_PF5);
}
/* sometimes LEDs (speech, status) are still on after reboot, turn 'em off */
static void turn_leds_off(void)
{
printf(" turn LEDs off\n");
gpio_request(GPIO_PF6, "led");
gpio_direction_output(GPIO_PF6, 0);
gpio_free(GPIO_PF6);
gpio_request(GPIO_PF15, "led");
gpio_direction_output(GPIO_PF15, 0);
gpio_free(GPIO_PF15);
}
/* miscellaneous platform dependent initialisations */
int misc_init_r(void)
{
#ifdef CONFIG_BFIN_MAC
uchar enetaddr[6];
if (!eth_getenv_enetaddr("ethaddr", enetaddr))
board_init_enetaddr(enetaddr);
#endif
gpio_cfi_flash_init();
init_tlv320aic31();
init_mute_pin();
turn_leds_off();
return 0;
}

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/*
* cled.c - control color led
*
* Copyright (c) 2010 BCT Electronic GmbH
*
* Licensed under the GPL-2 or later.
*/
#include <common.h>
#include <command.h>
#include <asm/blackfin.h>
#include <asm/io.h>
int do_cled(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
{
ulong addr = 0x20000000 + 0x200000; /* AMS2 */
uchar data;
if (argc < 2)
return cmd_usage(cmdtp);
data = simple_strtoul(argv[1], NULL, 10);
outb(data, addr);
printf("cled, write %02x\n", data);
return 0;
}
U_BOOT_CMD(cled, 2, 0, do_cled,
"set/clear color LED",
"");

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#
# Copyright (c) 2005-2008 Analog Device Inc.
#
# (C) Copyright 2001
# Wolfgang Denk, DENX Software Engineering, wd@denx.de.
#
# See file CREDITS for list of people who contributed to this
# project.
#
# This program is free software; you can redistribute it and/or
# modify it under the terms of the GNU General Public License as
# published by the Free Software Foundation; either version 2 of
# the License, or (at your option) any later version.
#
# This program is distributed in the hope that it will be useful,
# but WITHOUT ANY WARRANTY; without even the implied warranty of
# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
# GNU General Public License for more details.
#
# You should have received a copy of the GNU General Public License
# along with this program; if not, write to the Free Software
# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
# MA 02111-1307 USA
#
CFLAGS_lib += -O2
CFLAGS_lib/lzma += -O2
CFLAGS_lib/zlib += -O2

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#define GPIO_PIN_1 GPIO_PG5
#define GPIO_PIN_2 GPIO_PG6
#define GPIO_PIN_3 GPIO_PG7
#include "../cm-bf537e/gpio_cfi_flash.c"

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/*
* smsc9303.c - routines to initialize SMSC 9303 switch
*
* Copyright (c) 2010 BCT Electronic GmbH
*
* Licensed under the GPL-2 or later.
*/
#include <common.h>
#include <config.h>
#include <miiphy.h>
#include <asm/blackfin.h>
#include <asm/gpio.h>
static int smc9303i_write_mii(unsigned char addr, unsigned char reg, unsigned short data)
{
const char *devname = miiphy_get_current_dev();
if (!devname)
return 0;
if (miiphy_write(devname, addr, reg, data) != 0)
return 0;
return 1;
}
static int smc9303i_write_reg(unsigned short reg, unsigned int data)
{
const char *devname = miiphy_get_current_dev();
unsigned char mii_addr = 0x10 | (reg >> 6);
unsigned char mii_reg = (reg & 0x3c) >> 1;
if (!devname)
return 0;
if (miiphy_write(devname, mii_addr, mii_reg|0, data & 0xffff) != 0)
return 0;
if (miiphy_write(devname, mii_addr, mii_reg|1, data >> 16) != 0)
return 0;
return 1;
}
static int smc9303i_read_reg(unsigned short reg, unsigned int *data)
{
const char *devname = miiphy_get_current_dev();
unsigned char mii_addr = 0x10 | (reg >> 6);
unsigned char mii_reg = (reg & 0x3c) >> 1;
unsigned short tmp1, tmp2;
if (!devname)
return 0;
if (miiphy_read(devname, mii_addr, mii_reg|0, &tmp1) != 0)
return 0;
if (miiphy_read(devname, mii_addr, mii_reg|1, &tmp2) != 0)
return 0;
*data = (tmp2 << 16) | tmp1;
return 1;
}
#if 0
static int smc9303i_read_mii(unsigned char addr, unsigned char reg, unsigned short *data)
{
const char *devname = miiphy_get_current_dev();
if (!devname)
return 0;
if (miiphy_read(devname, addr, reg, data) != 0)
return 0;
return 1;
}
#endif
typedef struct {
unsigned short reg;
unsigned int value;
} smsc9303i_config_entry1_t;
static const smsc9303i_config_entry1_t smsc9303i_config_table1[] =
{
{0x1a0, 0x00000006}, /* Port 1 Manual Flow Control Register */
{0x1a4, 0x00000006}, /* Port 2 Manual Flow Control Register */
{0x1a8, 0x00000006}, /* Port 0 Manual Flow Control Register */
};
typedef struct
{
unsigned char addr;
unsigned char reg;
unsigned short value;
} smsc9303i_config_entry2_t;
static const smsc9303i_config_entry2_t smsc9303i_config_table2[] =
{
{0x01, 0x00, 0x0100}, /* Port0 PHY Basic Control Register */
{0x02, 0x00, 0x1100}, /* Port1 PHY Basic Control Register */
{0x03, 0x00, 0x1100}, /* Port2 PHY Basic Control Register */
{0x01, 0x04, 0x0001}, /* Port0 PHY Auto-Negotiation Advertisement Register */
{0x02, 0x04, 0x2de1}, /* Port1 PHY Auto-Negotiation Advertisement Register */
{0x03, 0x04, 0x2de1}, /* Port2 PHY Auto-Negotiation Advertisement Register */
{0x01, 0x11, 0x0000}, /* Port0 PHY Mode Control/Status Register */
{0x02, 0x11, 0x0000}, /* Port1 PHY Mode Control/Status Register */
{0x03, 0x11, 0x0000}, /* Port2 PHY Mode Control/Status Register */
{0x01, 0x12, 0x0021}, /* Port0 PHY Special Modes Register */
{0x02, 0x12, 0x00e2}, /* Port1 PHY Special Modes Register */
{0x03, 0x12, 0x00e3}, /* Port2 PHY Special Modes Register */
{0x01, 0x1b, 0x0000}, /* Port0 PHY Special Control/Status Indication Register */
{0x02, 0x1b, 0x0000}, /* Port1 PHY Special Control/Status Indication Register */
{0x03, 0x1b, 0x0000}, /* Port2 PHY Special Control/Status Indication Register */
{0x01, 0x1e, 0x0000}, /* Port0 PHY Interrupt Source Flags Register */
{0x02, 0x1e, 0x0000}, /* Port1 PHY Interrupt Source Flags Register */
{0x03, 0x1e, 0x0000}, /* Port2 PHY Interrupt Source Flags Register */
};
int init_smsc9303i_mii(void)
{
unsigned int data;
unsigned int i;
printf(" reset SMSC LAN9303i\n");
gpio_request(GPIO_PG10, "smsc9303");
gpio_direction_output(GPIO_PG10, 0);
udelay(10000);
gpio_direction_output(GPIO_PG10, 1);
udelay(10000);
gpio_free(GPIO_PG10);
#if defined(CONFIG_MII_INIT)
mii_init();
#endif
printf(" write SMSC LAN9303i configuration\n");
if (!smc9303i_read_reg(0x50, &data))
return 0;
if ((data >> 16) != 0x9303) {
/* chip id not found */
printf(" error identifying SMSC LAN9303i\n");
return 0;
}
for (i = 0; i < ARRAY_SIZE(smsc9303i_config_table1); i++) {
const smsc9303i_config_entry1_t *entry = &smsc9303i_config_table1[i];
if (!smc9303i_write_reg(entry->reg, entry->value)) {
printf(" error writing SMSC LAN9303i configuration\n");
return 0;
}
}
for (i = 0; i < ARRAY_SIZE(smsc9303i_config_table2); i++) {
const smsc9303i_config_entry2_t *entry = &smsc9303i_config_table2[i];
if (!smc9303i_write_mii(entry->addr, entry->reg, entry->value)) {
printf(" error writing SMSC LAN9303i configuration\n");
return 0;
}
}
return 1;
}

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/*
* smsc9303.h - routines to initialize SMSC 9303 switch
*
* Copyright (c) 2010 BCT Electronic GmbH
*
* Licensed under the GPL-2 or later.
*/
int init_smsc9303i_mii(void);