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Kernel 5.4 RUTX support

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Ycarus (Yannick Chabanois) 2023-08-14 17:47:02 +02:00
parent 839fcf1cab
commit cfce9f52b2
7376 changed files with 3902 additions and 546 deletions
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61
common/package/boot/uboot-ipq40xx/src/drivers/misc/Makefile Normal file
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#
# (C) Copyright 2000-2007
# Wolfgang Denk, DENX Software Engineering, wd@denx.de.
#
# See file CREDITS for list of people who contributed to this
# project.
#
# This program is free software; you can redistribute it and/or
# modify it under the terms of the GNU General Public License as
# published by the Free Software Foundation; either version 2 of
# the License, or (at your option) any later version.
#
# This program is distributed in the hope that it will be useful,
# but WITHOUT ANY WARRANTY; without even the implied warranty of
# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
# GNU General Public License for more details.
#
# You should have received a copy of the GNU General Public License
# along with this program; if not, write to the Free Software
# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
# MA 02111-1307 USA
#
include $(TOPDIR)/config.mk
LIB := $(obj)libmisc.o
COBJS-$(CONFIG_ALI152X) += ali512x.o
COBJS-$(CONFIG_DS4510) += ds4510.o
COBJS-$(CONFIG_FSL_LAW) += fsl_law.o
COBJS-$(CONFIG_GPIO_LED) += gpio_led.o
COBJS-$(CONFIG_FSL_MC9SDZ60) += mc9sdz60.o
COBJS-$(CONFIG_NS87308) += ns87308.o
COBJS-$(CONFIG_PDSP188x) += pdsp188x.o
COBJS-$(CONFIG_STATUS_LED) += status_led.o
COBJS-$(CONFIG_TWL4030_LED) += twl4030_led.o
COBJS-$(CONFIG_PMIC) += pmic_core.o
COBJS-$(CONFIG_DIALOG_PMIC) += pmic_dialog.o
COBJS-$(CONFIG_PMIC_FSL) += pmic_fsl.o
COBJS-$(CONFIG_PMIC_I2C) += pmic_i2c.o
COBJS-$(CONFIG_PMIC_SPI) += pmic_spi.o
COBJS-$(CONFIG_PMIC_MAX8998) += pmic_max8998.o
COBJS-$(CONFIG_PMIC_MAX8997) += pmic_max8997.o
COBJS := $(COBJS-y)
SRCS := $(COBJS:.o=.c)
OBJS := $(addprefix $(obj),$(COBJS))
all: $(LIB)
$(LIB): $(obj).depend $(OBJS)
$(call cmd_link_o_target, $(OBJS))
#########################################################################
# defines $(obj).depend target
include $(SRCTREE)/rules.mk
sinclude $(obj).depend
#########################################################################

418
common/package/boot/uboot-ipq40xx/src/drivers/misc/ali512x.c Normal file
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/*
* (C) Copyright 2002
* Daniel Engström, Omicron Ceti AB <daniel@omicron.se>.
*
* See file CREDITS for list of people who contributed to this
* project.
*
* This program is free software; you can redistribute it and/or
* modify it under the terms of the GNU General Public License as
* published by the Free Software Foundation; either version 2 of
* the License, or (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 59 Temple Place, Suite 330, Boston,
* MA 02111-1307 USA
*/
/*
* Based on sc520cdp.c from rolo 1.6:
*----------------------------------------------------------------------
* (C) Copyright 2000
* Sysgo Real-Time Solutions GmbH
* Klein-Winternheim, Germany
*----------------------------------------------------------------------
*/
#include <config.h>
#include <common.h>
#include <asm/io.h>
#include <ali512x.h>
/* ALI M5123 Logical device numbers:
* 0 FDC
* 1 unused?
* 2 unused?
* 3 lpt
* 4 UART1
* 5 UART2
* 6 RTC
* 7 mouse/kbd
* 8 CIO
*/
/*
************************************************************
* Some access primitives for the ALi chip: *
************************************************************
*/
static void ali_write(u8 index, u8 value)
{
/* write an arbirary register */
outb(index, ALI_INDEX);
outb(value, ALI_DATA);
}
#if 0
static int ali_read(u8 index)
{
outb(index, ALI_INDEX);
return inb(ALI_DATA);
}
#endif
#define ALI_OPEN() \
outb(0x51, ALI_INDEX); \
outb(0x23, ALI_INDEX)
#define ALI_CLOSE() \
outb(0xbb, ALI_INDEX)
/* Select a logical device */
#define ALI_SELDEV(dev) \
ali_write(0x07, dev)
void ali512x_init(void)
{
ALI_OPEN();
ali_write(0x02, 0x01); /* soft reset */
ali_write(0x03, 0x03); /* disable access to CIOs */
ali_write(0x22, 0x00); /* disable direct powerdown */
ali_write(0x23, 0x00); /* disable auto powerdown */
ali_write(0x24, 0x00); /* IR 8 is active hi, pin26 is PDIR */
ALI_CLOSE();
}
void ali512x_set_fdc(int enabled, u16 io, u8 irq, u8 dma_channel)
{
ALI_OPEN();
ALI_SELDEV(0);
ali_write(0x30, enabled?1:0);
if (enabled) {
ali_write(0x60, io >> 8);
ali_write(0x61, io & 0xff);
ali_write(0x70, irq);
ali_write(0x74, dma_channel);
/* AT mode, no drive swap */
ali_write(0xf0, 0x08);
ali_write(0xf1, 0x00);
ali_write(0xf2, 0xff);
ali_write(0xf4, 0x00);
}
ALI_CLOSE();
}
void ali512x_set_pp(int enabled, u16 io, u8 irq, u8 dma_channel)
{
ALI_OPEN();
ALI_SELDEV(3);
ali_write(0x30, enabled?1:0);
if (enabled) {
ali_write(0x60, io >> 8);
ali_write(0x61, io & 0xff);
ali_write(0x70, irq);
ali_write(0x74, dma_channel);
/* mode: EPP 1.9, ECP FIFO threshold = 7, IRQ active low */
ali_write(0xf0, 0xbc);
/* 12 MHz, Burst DMA in ECP */
ali_write(0xf1, 0x05);
}
ALI_CLOSE();
}
void ali512x_set_uart(int enabled, int index, u16 io, u8 irq)
{
ALI_OPEN();
ALI_SELDEV(index?5:4);
ali_write(0x30, enabled?1:0);
if (enabled) {
ali_write(0x60, io >> 8);
ali_write(0x61, io & 0xff);
ali_write(0x70, irq);
ali_write(0xf0, 0x00);
ali_write(0xf1, 0x00);
/* huh? write 0xf2 twice - a typo in rolo
* or some secret ali errata? Who knows?
*/
if (index) {
ali_write(0xf2, 0x00);
}
ali_write(0xf2, 0x0c);
}
ALI_CLOSE();
}
void ali512x_set_uart2_irda(int enabled)
{
ALI_OPEN();
ALI_SELDEV(5);
ali_write(0xf1, enabled?0x48:0x00); /* fullduplex IrDa */
ALI_CLOSE();
}
void ali512x_set_rtc(int enabled, u16 io, u8 irq)
{
ALI_OPEN();
ALI_SELDEV(6);
ali_write(0x30, enabled?1:0);
if (enabled) {
ali_write(0x60, io >> 8);
ali_write(0x61, io & 0xff);
ali_write(0x70, irq);
ali_write(0xf0, 0x00);
}
ALI_CLOSE();
}
void ali512x_set_kbc(int enabled, u8 kbc_irq, u8 mouse_irq)
{
ALI_OPEN();
ALI_SELDEV(7);
ali_write(0x30, enabled?1:0);
if (enabled) {
ali_write(0x70, kbc_irq);
ali_write(0x72, mouse_irq);
ali_write(0xf0, 0x00);
}
ALI_CLOSE();
}
/* Common I/O
*
* (This descripotsion is base on several incompete sources
* since I have not been able to obtain any datasheet for the device
* there may be some mis-understandings burried in here.
* -- Daniel daniel@omicron.se)
*
* There are 22 CIO pins numbered
* 10-17
* 20-25
* 30-37
*
* 20-24 are dedicated CIO pins, the other 17 are muliplexed with
* other functions.
*
* Secondary
* CIO Pin Function Decription
* =======================================================
* CIO10 IRQIN1 Interrupt input 1?
* CIO11 IRQIN2 Interrupt input 2?
* CIO12 IRRX IrDa Receive
* CIO13 IRTX IrDa Transmit
* CIO14 P21 KBC P21 fucntion
* CIO15 P20 KBC P21 fucntion
* CIO16 I2C_CLK I2C Clock
* CIO17 I2C_DAT I2C Data
*
* CIO20 -
* CIO21 -
* CIO22 -
* CIO23 -
* CIO24 -
* CIO25 LOCK Keylock
*
* CIO30 KBC_CLK Keybaord Clock
* CIO31 CS0J General Chip Select decoder CS0J
* CIO32 CS1J General Chip Select decoder CS1J
* CIO33 ALT_KCLK Alternative Keyboard Clock
* CIO34 ALT_KDAT Alternative Keyboard Data
* CIO35 ALT_MCLK Alternative Mouse Clock
* CIO36 ALT_MDAT Alternative Mouse Data
* CIO37 ALT_KBC Alternative KBC select
*
* The CIO use an indirect address scheme.
*
* Reigster 3 in the SIO is used to select the index and data
* port addresses where the CIO I/O registers show up.
* The function selection registers are accessible under
* function SIO 8.
*
* SIO reigster 3 (CIO Address Selection) bit definitions:
* bit 7 CIO index and data registers enabled
* bit 1-0 CIO indirect registers port address select
* 0 index = 0xE0 data = 0xE1
* 1 index = 0xE2 data = 0xE3
* 2 index = 0xE4 data = 0xE5
* 3 index = 0xEA data = 0xEB
*
* There are three CIO I/O register accessed via CIO index port and CIO data port
* 0x01 CIO 10-17 data
* 0x02 CIO 20-25 data (bits 7-6 unused)
* 0x03 CIO 30-37 data
*
*
* The pin function is accessed through normal
* SIO registers, each register have the same format:
*
* Bit Function Value
* 0 Input/output 1=input
* 1 Polarity of signal 1=inverted
* 2 Unused ??
* 3 Function (normal or special) 1=special
* 7-4 Unused
*
* SIO REG
* 0xe0 CIO 10 Config
* 0xe1 CIO 11 Config
* 0xe2 CIO 12 Config
* 0xe3 CIO 13 Config
* 0xe4 CIO 14 Config
* 0xe5 CIO 15 Config
* 0xe6 CIO 16 Config
* 0xe7 CIO 16 Config
*
* 0xe8 CIO 20 Config
* 0xe9 CIO 21 Config
* 0xea CIO 22 Config
* 0xeb CIO 23 Config
* 0xec CIO 24 Config
* 0xed CIO 25 Config
*
* 0xf5 CIO 30 Config
* 0xf6 CIO 31 Config
* 0xf7 CIO 32 Config
* 0xf8 CIO 33 Config
* 0xf9 CIO 34 Config
* 0xfa CIO 35 Config
* 0xfb CIO 36 Config
* 0xfc CIO 37 Config
*
*/
#define ALI_CIO_PORT_SEL 0x83
#define ALI_CIO_INDEX 0xea
#define ALI_CIO_DATA 0xeb
void ali512x_set_cio(int enabled)
{
int i;
ALI_OPEN();
if (enabled) {
ali_write(0x3, ALI_CIO_PORT_SEL); /* Enable CIO data register */
} else {
ali_write(0x3, ALI_CIO_PORT_SEL & ~0x80);
}
ALI_SELDEV(8);
ali_write(0x30, enabled?1:0);
/* set all pins to input to start with */
for (i=0xe0;i<0xee;i++) {
ali_write(i, 1);
}
for (i=0xf5;i<0xfe;i++) {
ali_write(i, 1);
}
ALI_CLOSE();
}
void ali512x_cio_function(int pin, int special, int inv, int input)
{
u8 data;
u8 addr;
/* valid pins are 10-17, 20-25 and 30-37 */
if (pin >= 10 && pin <= 17) {
addr = 0xe0+(pin&7);
} else if (pin >= 20 && pin <= 25) {
addr = 0xe8+(pin&7);
} else if (pin >= 30 && pin <= 37) {
addr = 0xf5+(pin&7);
} else {
return;
}
ALI_OPEN();
ALI_SELDEV(8);
data=0xf4;
if (special) {
data |= 0x08;
} else {
if (inv) {
data |= 0x02;
}
if (input) {
data |= 0x01;
}
}
ali_write(addr, data);
ALI_CLOSE();
}
void ali512x_cio_out(int pin, int value)
{
u8 reg;
u8 data;
u8 bit;
reg = pin/10;
bit = 1 << (pin%10);
outb(reg, ALI_CIO_INDEX); /* select I/O register */
data = inb(ALI_CIO_DATA);
if (value) {
data |= bit;
} else {
data &= ~bit;
}
outb(data, ALI_CIO_DATA);
}
int ali512x_cio_in(int pin)
{
u8 reg;
u8 data;
u8 bit;
/* valid pins are 10-17, 20-25 and 30-37 */
reg = pin/10;
bit = 1 << (pin%10);
outb(reg, ALI_CIO_INDEX); /* select I/O register */
data = inb(ALI_CIO_DATA);
return data & bit;
}

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common/package/boot/uboot-ipq40xx/src/drivers/misc/ds4510.c Normal file
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/*
* Copyright 2008 Extreme Engineering Solutions, Inc.
*
* This program is free software; you can redistribute it and/or
* modify it under the terms of the GNU General Public License
* Version 2 as published by the Free Software Foundation.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 59 Temple Place, Suite 330, Boston,
* MA 02111-1307 USA
*/
/*
* Driver for DS4510, a CPU supervisor with integrated EEPROM, SRAM,
* and 4 programmable non-volatile GPIO pins.
*/
#include <common.h>
#include <i2c.h>
#include <command.h>
#include <ds4510.h>
/* Default to an address that hopefully won't corrupt other i2c devices */
#ifndef CONFIG_SYS_I2C_DS4510_ADDR
#define CONFIG_SYS_I2C_DS4510_ADDR (~0)
#endif
enum {
DS4510_CMD_INFO,
DS4510_CMD_DEVICE,
DS4510_CMD_NV,
DS4510_CMD_RSTDELAY,
DS4510_CMD_OUTPUT,
DS4510_CMD_INPUT,
DS4510_CMD_PULLUP,
DS4510_CMD_EEPROM,
DS4510_CMD_SEEPROM,
DS4510_CMD_SRAM,
};
/*
* Write to DS4510, taking page boundaries into account
*/
int ds4510_mem_write(uint8_t chip, int offset, uint8_t *buf, int count)
{
int wrlen;
int i = 0;
do {
wrlen = DS4510_EEPROM_PAGE_SIZE -
DS4510_EEPROM_PAGE_OFFSET(offset);
if (count < wrlen)
wrlen = count;
if (i2c_write(chip, offset, 1, &buf[i], wrlen))
return -1;
/*
* This delay isn't needed for SRAM writes but shouldn't delay
* things too much, so do it unconditionally for simplicity
*/
udelay(DS4510_EEPROM_PAGE_WRITE_DELAY_MS * 1000);
count -= wrlen;
offset += wrlen;
i += wrlen;
} while (count > 0);
return 0;
}
/*
* General read from DS4510
*/
int ds4510_mem_read(uint8_t chip, int offset, uint8_t *buf, int count)
{
return i2c_read(chip, offset, 1, buf, count);
}
/*
* Write SEE bit in config register.
* nv = 0 - Writes to SEEPROM registers behave like EEPROM
* nv = 1 - Writes to SEEPROM registers behave like SRAM
*/
int ds4510_see_write(uint8_t chip, uint8_t nv)
{
uint8_t data;
if (i2c_read(chip, DS4510_CFG, 1, &data, 1))
return -1;
if (nv) /* Treat SEEPROM bits as EEPROM */
data &= ~DS4510_CFG_SEE;
else /* Treat SEEPROM bits as SRAM */
data |= DS4510_CFG_SEE;
return ds4510_mem_write(chip, DS4510_CFG, &data, 1);
}
/*
* Write de-assertion of reset signal delay
*/
int ds4510_rstdelay_write(uint8_t chip, uint8_t delay)
{
uint8_t data;
if (i2c_read(chip, DS4510_RSTDELAY, 1, &data, 1))
return -1;
data &= ~DS4510_RSTDELAY_MASK;
data |= delay & DS4510_RSTDELAY_MASK;
return ds4510_mem_write(chip, DS4510_RSTDELAY, &data, 1);
}
/*
* Write pullup characteristics of IO pins
*/
int ds4510_pullup_write(uint8_t chip, uint8_t val)
{
val &= DS4510_IO_MASK;
return ds4510_mem_write(chip, DS4510_PULLUP, (uint8_t *)&val, 1);
}
/*
* Read pullup characteristics of IO pins
*/
int ds4510_pullup_read(uint8_t chip)
{
uint8_t val;
if (i2c_read(chip, DS4510_PULLUP, 1, &val, 1))
return -1;
return val & DS4510_IO_MASK;
}
/*
* Write drive level of IO pins
*/
int ds4510_gpio_write(uint8_t chip, uint8_t val)
{
uint8_t data;
int i;
for (i = 0; i < DS4510_NUM_IO; i++) {
if (i2c_read(chip, DS4510_IO0 - i, 1, &data, 1))
return -1;
if (val & (0x1 << i))
data |= 0x1;
else
data &= ~0x1;
if (ds4510_mem_write(chip, DS4510_IO0 - i, &data, 1))
return -1;
}
return 0;
}
/*
* Read drive level of IO pins
*/
int ds4510_gpio_read(uint8_t chip)
{
uint8_t data;
int val = 0;
int i;
for (i = 0; i < DS4510_NUM_IO; i++) {
if (i2c_read(chip, DS4510_IO0 - i, 1, &data, 1))
return -1;
if (data & 1)
val |= (1 << i);
}
return val;
}
/*
* Read physical level of IO pins
*/
int ds4510_gpio_read_val(uint8_t chip)
{
uint8_t val;
if (i2c_read(chip, DS4510_IO_STATUS, 1, &val, 1))
return -1;
return val & DS4510_IO_MASK;
}
#ifdef CONFIG_CMD_DS4510
#ifdef CONFIG_CMD_DS4510_INFO
/*
* Display DS4510 information
*/
static int ds4510_info(uint8_t chip)
{
int i;
int tmp;
uint8_t data;
printf("DS4510 @ 0x%x:\n\n", chip);
if (i2c_read(chip, DS4510_RSTDELAY, 1, &data, 1))
return -1;
printf("rstdelay = 0x%x\n\n", data & DS4510_RSTDELAY_MASK);
if (i2c_read(chip, DS4510_CFG, 1, &data, 1))
return -1;
printf("config = 0x%x\n", data);
printf(" /ready = %d\n", data & DS4510_CFG_READY ? 1 : 0);
printf(" trip pt = %d\n", data & DS4510_CFG_TRIP_POINT ? 1 : 0);
printf(" rst sts = %d\n", data & DS4510_CFG_RESET ? 1 : 0);
printf(" /see = %d\n", data & DS4510_CFG_SEE ? 1 : 0);
printf(" swrst = %d\n\n", data & DS4510_CFG_SWRST ? 1 : 0);
printf("gpio pins: 3210\n");
printf("---------------\n");
printf("pullup ");
tmp = ds4510_pullup_read(chip);
if (tmp == -1)
return tmp;
for (i = DS4510_NUM_IO - 1; i >= 0; i--)
printf("%d", (tmp & (1 << i)) ? 1 : 0);
printf("\n");
printf("driven ");
tmp = ds4510_gpio_read(chip);
if (tmp == -1)
return -1;
for (i = DS4510_NUM_IO - 1; i >= 0; i--)
printf("%d", (tmp & (1 << i)) ? 1 : 0);
printf("\n");
printf("read ");
tmp = ds4510_gpio_read_val(chip);
if (tmp == -1)
return -1;
for (i = DS4510_NUM_IO - 1; i >= 0; i--)
printf("%d", (tmp & (1 << i)) ? 1 : 0);
printf("\n");
return 0;
}
#endif /* CONFIG_CMD_DS4510_INFO */
cmd_tbl_t cmd_ds4510[] = {
U_BOOT_CMD_MKENT(device, 3, 0, (void *)DS4510_CMD_DEVICE, "", ""),
U_BOOT_CMD_MKENT(nv, 3, 0, (void *)DS4510_CMD_NV, "", ""),
U_BOOT_CMD_MKENT(output, 4, 0, (void *)DS4510_CMD_OUTPUT, "", ""),
U_BOOT_CMD_MKENT(input, 3, 0, (void *)DS4510_CMD_INPUT, "", ""),
U_BOOT_CMD_MKENT(pullup, 4, 0, (void *)DS4510_CMD_PULLUP, "", ""),
#ifdef CONFIG_CMD_DS4510_INFO
U_BOOT_CMD_MKENT(info, 2, 0, (void *)DS4510_CMD_INFO, "", ""),
#endif
#ifdef CONFIG_CMD_DS4510_RST
U_BOOT_CMD_MKENT(rstdelay, 3, 0, (void *)DS4510_CMD_RSTDELAY, "", ""),
#endif
#ifdef CONFIG_CMD_DS4510_MEM
U_BOOT_CMD_MKENT(eeprom, 6, 0, (void *)DS4510_CMD_EEPROM, "", ""),
U_BOOT_CMD_MKENT(seeprom, 6, 0, (void *)DS4510_CMD_SEEPROM, "", ""),
U_BOOT_CMD_MKENT(sram, 6, 0, (void *)DS4510_CMD_SRAM, "", ""),
#endif
};
int do_ds4510(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
{
static uint8_t chip = CONFIG_SYS_I2C_DS4510_ADDR;
cmd_tbl_t *c;
ulong ul_arg2 = 0;
ulong ul_arg3 = 0;
int tmp;
#ifdef CONFIG_CMD_DS4510_MEM
ulong addr;
ulong off;
ulong cnt;
int end;
int (*rw_func)(uint8_t, int, uint8_t *, int);
#endif
c = find_cmd_tbl(argv[1], cmd_ds4510, ARRAY_SIZE(cmd_ds4510));
/* All commands but "device" require 'maxargs' arguments */
if (!c || !((argc == (c->maxargs)) ||
(((int)c->cmd == DS4510_CMD_DEVICE) &&
(argc == (c->maxargs - 1))))) {
return cmd_usage(cmdtp);
}
/* arg2 used as chip addr and pin number */
if (argc > 2)
ul_arg2 = simple_strtoul(argv[2], NULL, 16);
/* arg3 used as output/pullup value */
if (argc > 3)
ul_arg3 = simple_strtoul(argv[3], NULL, 16);
switch ((int)c->cmd) {
case DS4510_CMD_DEVICE:
if (argc == 3)
chip = ul_arg2;
printf("Current device address: 0x%x\n", chip);
return 0;
case DS4510_CMD_NV:
return ds4510_see_write(chip, ul_arg2);
case DS4510_CMD_OUTPUT:
tmp = ds4510_gpio_read(chip);
if (tmp == -1)
return -1;
if (ul_arg3)
tmp |= (1 << ul_arg2);
else
tmp &= ~(1 << ul_arg2);
return ds4510_gpio_write(chip, tmp);
case DS4510_CMD_INPUT:
tmp = ds4510_gpio_read_val(chip);
if (tmp == -1)
return -1;
return (tmp & (1 << ul_arg2)) != 0;
case DS4510_CMD_PULLUP:
tmp = ds4510_pullup_read(chip);
if (tmp == -1)
return -1;
if (ul_arg3)
tmp |= (1 << ul_arg2);
else
tmp &= ~(1 << ul_arg2);
return ds4510_pullup_write(chip, tmp);
#ifdef CONFIG_CMD_DS4510_INFO
case DS4510_CMD_INFO:
return ds4510_info(chip);
#endif
#ifdef CONFIG_CMD_DS4510_RST
case DS4510_CMD_RSTDELAY:
return ds4510_rstdelay_write(chip, ul_arg2);
#endif
#ifdef CONFIG_CMD_DS4510_MEM
case DS4510_CMD_EEPROM:
end = DS4510_EEPROM + DS4510_EEPROM_SIZE;
off = DS4510_EEPROM;
break;
case DS4510_CMD_SEEPROM:
end = DS4510_SEEPROM + DS4510_SEEPROM_SIZE;
off = DS4510_SEEPROM;
break;
case DS4510_CMD_SRAM:
end = DS4510_SRAM + DS4510_SRAM_SIZE;
off = DS4510_SRAM;
break;
#endif
default:
/* We should never get here... */
return 1;
}
#ifdef CONFIG_CMD_DS4510_MEM
/* Only eeprom, seeprom, and sram commands should make it here */
if (strcmp(argv[2], "read") == 0)
rw_func = ds4510_mem_read;
else if (strcmp(argv[2], "write") == 0)
rw_func = ds4510_mem_write;
else
return cmd_usage(cmdtp);
addr = simple_strtoul(argv[3], NULL, 16);
off += simple_strtoul(argv[4], NULL, 16);
cnt = simple_strtoul(argv[5], NULL, 16);
if ((off + cnt) > end) {
printf("ERROR: invalid len\n");
return -1;
}
return rw_func(chip, off, (uint8_t *)addr, cnt);
#endif
}
U_BOOT_CMD(
ds4510, 6, 1, do_ds4510,
"ds4510 eeprom/seeprom/sram/gpio access",
"device [dev]\n"
" - show or set current device address\n"
#ifdef CONFIG_CMD_DS4510_INFO
"ds4510 info\n"
" - display ds4510 info\n"
#endif
"ds4510 output pin 0|1\n"
" - set pin low or high-Z\n"
"ds4510 input pin\n"
" - read value of pin\n"
"ds4510 pullup pin 0|1\n"
" - disable/enable pullup on specified pin\n"
"ds4510 nv 0|1\n"
" - make gpio and seeprom writes volatile/non-volatile"
#ifdef CONFIG_CMD_DS4510_RST
"\n"
"ds4510 rstdelay 0-3\n"
" - set reset output delay"
#endif
#ifdef CONFIG_CMD_DS4510_MEM
"\n"
"ds4510 eeprom read addr off cnt\n"
"ds4510 eeprom write addr off cnt\n"
" - read/write 'cnt' bytes at EEPROM offset 'off'\n"
"ds4510 seeprom read addr off cnt\n"
"ds4510 seeprom write addr off cnt\n"
" - read/write 'cnt' bytes at SRAM-shadowed EEPROM offset 'off'\n"
"ds4510 sram read addr off cnt\n"
"ds4510 sram write addr off cnt\n"
" - read/write 'cnt' bytes at SRAM offset 'off'"
#endif
);
#endif /* CONFIG_CMD_DS4510 */

279
common/package/boot/uboot-ipq40xx/src/drivers/misc/fsl_law.c Normal file
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/*
* Copyright 2008-2011 Freescale Semiconductor, Inc.
*
* (C) Copyright 2000
* Wolfgang Denk, DENX Software Engineering, wd@denx.de.
*
* See file CREDITS for list of people who contributed to this
* project.
*
* This program is free software; you can redistribute it and/or
* modify it under the terms of the GNU General Public License as
* published by the Free Software Foundation; either version 2 of
* the License, or (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 59 Temple Place, Suite 330, Boston,
* MA 02111-1307 USA
*/
#include <common.h>
#include <linux/compiler.h>
#include <asm/fsl_law.h>
#include <asm/io.h>
DECLARE_GLOBAL_DATA_PTR;
#define FSL_HW_NUM_LAWS CONFIG_SYS_FSL_NUM_LAWS
#ifdef CONFIG_FSL_CORENET
#define LAW_BASE (CONFIG_SYS_FSL_CORENET_CCM_ADDR)
#define LAWAR_ADDR(x) (&((ccsr_local_t *)LAW_BASE)->law[x].lawar)
#define LAWBARH_ADDR(x) (&((ccsr_local_t *)LAW_BASE)->law[x].lawbarh)
#define LAWBARL_ADDR(x) (&((ccsr_local_t *)LAW_BASE)->law[x].lawbarl)
#define LAWBAR_SHIFT 0
#else
#define LAW_BASE (CONFIG_SYS_IMMR + 0xc08)
#define LAWAR_ADDR(x) ((u32 *)LAW_BASE + 8 * x + 2)
#define LAWBAR_ADDR(x) ((u32 *)LAW_BASE + 8 * x)
#define LAWBAR_SHIFT 12
#endif
static inline phys_addr_t get_law_base_addr(int idx)
{
#ifdef CONFIG_FSL_CORENET
return (phys_addr_t)
((u64)in_be32(LAWBARH_ADDR(idx)) << 32) |
in_be32(LAWBARL_ADDR(idx));
#else
return (phys_addr_t)in_be32(LAWBAR_ADDR(idx)) << LAWBAR_SHIFT;
#endif
}
static inline void set_law_base_addr(int idx, phys_addr_t addr)
{
#ifdef CONFIG_FSL_CORENET
out_be32(LAWBARL_ADDR(idx), addr & 0xffffffff);
out_be32(LAWBARH_ADDR(idx), (u64)addr >> 32);
#else
out_be32(LAWBAR_ADDR(idx), addr >> LAWBAR_SHIFT);
#endif
}
void set_law(u8 idx, phys_addr_t addr, enum law_size sz, enum law_trgt_if id)
{
gd->used_laws |= (1 << idx);
out_be32(LAWAR_ADDR(idx), 0);
set_law_base_addr(idx, addr);
out_be32(LAWAR_ADDR(idx), LAW_EN | ((u32)id << 20) | (u32)sz);
/* Read back so that we sync the writes */
in_be32(LAWAR_ADDR(idx));
}
void disable_law(u8 idx)
{
gd->used_laws &= ~(1 << idx);
out_be32(LAWAR_ADDR(idx), 0);
set_law_base_addr(idx, 0);
/* Read back so that we sync the writes */
in_be32(LAWAR_ADDR(idx));
return;
}
#ifndef CONFIG_NAND_SPL
static int get_law_entry(u8 i, struct law_entry *e)
{
u32 lawar;
lawar = in_be32(LAWAR_ADDR(i));
if (!(lawar & LAW_EN))
return 0;
e->addr = get_law_base_addr(i);
e->size = lawar & 0x3f;
e->trgt_id = (lawar >> 20) & 0xff;
return 1;
}
#endif
int set_next_law(phys_addr_t addr, enum law_size sz, enum law_trgt_if id)
{
u32 idx = ffz(gd->used_laws);
if (idx >= FSL_HW_NUM_LAWS)
return -1;
set_law(idx, addr, sz, id);
return idx;
}
#ifndef CONFIG_NAND_SPL
int set_last_law(phys_addr_t addr, enum law_size sz, enum law_trgt_if id)
{
u32 idx;
/* we have no LAWs free */
if (gd->used_laws == -1)
return -1;
/* grab the last free law */
idx = __ilog2(~(gd->used_laws));
if (idx >= FSL_HW_NUM_LAWS)
return -1;
set_law(idx, addr, sz, id);
return idx;
}
struct law_entry find_law(phys_addr_t addr)
{
struct law_entry entry;
int i;
entry.index = -1;
entry.addr = 0;
entry.size = 0;
entry.trgt_id = 0;
for (i = 0; i < FSL_HW_NUM_LAWS; i++) {
u64 upper;
if (!get_law_entry(i, &entry))
continue;
upper = entry.addr + (2ull << entry.size);
if ((addr >= entry.addr) && (addr < upper)) {
entry.index = i;
break;
}
}
return entry;
}
void print_laws(void)
{
int i;
u32 lawar;
printf("\nLocal Access Window Configuration\n");
for (i = 0; i < FSL_HW_NUM_LAWS; i++) {
lawar = in_be32(LAWAR_ADDR(i));
#ifdef CONFIG_FSL_CORENET
printf("LAWBARH%02d: 0x%08x LAWBARL%02d: 0x%08x",
i, in_be32(LAWBARH_ADDR(i)),
i, in_be32(LAWBARL_ADDR(i)));
#else
printf("LAWBAR%02d: 0x%08x", i, in_be32(LAWBAR_ADDR(i)));
#endif
printf(" LAWAR%02d: 0x%08x\n", i, lawar);
printf("\t(EN: %d TGT: 0x%02x SIZE: ",
(lawar & LAW_EN) ? 1 : 0, (lawar >> 20) & 0xff);
print_size(lawar_size(lawar), ")\n");
}
return;
}
/* use up to 2 LAWs for DDR, used the last available LAWs */
int set_ddr_laws(u64 start, u64 sz, enum law_trgt_if id)
{
u64 start_align, law_sz;
int law_sz_enc;
if (start == 0)
start_align = 1ull << (LAW_SIZE_32G + 1);
else
start_align = 1ull << (ffs64(start) - 1);
law_sz = min(start_align, sz);
law_sz_enc = __ilog2_u64(law_sz) - 1;
if (set_last_law(start, law_sz_enc, id) < 0)
return -1;
/* recalculate size based on what was actually covered by the law */
law_sz = 1ull << __ilog2_u64(law_sz);
/* do we still have anything to map */
sz = sz - law_sz;
if (sz) {
start += law_sz;
start_align = 1ull << (ffs64(start) - 1);
law_sz = min(start_align, sz);
law_sz_enc = __ilog2_u64(law_sz) - 1;
if (set_last_law(start, law_sz_enc, id) < 0)
return -1;
} else {
return 0;
}
/* do we still have anything to map */
sz = sz - law_sz;
if (sz)
return 1;
return 0;
}
#endif
void init_laws(void)
{
int i;
#if FSL_HW_NUM_LAWS < 32
gd->used_laws = ~((1 << FSL_HW_NUM_LAWS) - 1);
#elif FSL_HW_NUM_LAWS == 32
gd->used_laws = 0;
#else
#error FSL_HW_NUM_LAWS can not be greater than 32 w/o code changes
#endif
/*
* Any LAWs that were set up before we booted assume they are meant to
* be around and mark them used.
*/
for (i = 0; i < FSL_HW_NUM_LAWS; i++) {
u32 lawar = in_be32(LAWAR_ADDR(i));
if (lawar & LAW_EN)
gd->used_laws |= (1 << i);
}
#if defined(CONFIG_NAND_U_BOOT) && !defined(CONFIG_NAND_SPL)
/*
* in NAND boot we've already parsed the law_table and setup those LAWs
* so don't do it again.
*/
return;
#endif
for (i = 0; i < num_law_entries; i++) {
if (law_table[i].index == -1)
set_next_law(law_table[i].addr, law_table[i].size,
law_table[i].trgt_id);
else
set_law(law_table[i].index, law_table[i].addr,
law_table[i].size, law_table[i].trgt_id);
}
return ;
}

26
common/package/boot/uboot-ipq40xx/src/drivers/misc/gpio_led.c Normal file
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/*
* Status LED driver based on GPIO access conventions of Linux
*
* Copyright (C) 2010 Thomas Chou <thomas@wytron.com.tw>
* Licensed under the GPL-2 or later.
*/
#include <common.h>
#include <status_led.h>
#include <asm/gpio.h>
void __led_init(led_id_t mask, int state)
{
gpio_request(mask, "gpio_led");
gpio_direction_output(mask, state == STATUS_LED_ON);
}
void __led_set(led_id_t mask, int state)
{
gpio_set_value(mask, state == STATUS_LED_ON);
}
void __led_toggle(led_id_t mask)
{
gpio_set_value(mask, !gpio_get_value(mask));
}

51
common/package/boot/uboot-ipq40xx/src/drivers/misc/mc9sdz60.c Normal file
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/*
* (C) Copyright 2010 Stefano Babic <sbabic@denx.de>
*
* See file CREDITS for list of people who contributed to this
* project.
*
* This program is free software; you can redistribute it and/or
* modify it under the terms of the GNU General Public License as
* published by the Free Software Foundation; either version 2 of
* the License, or (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 59 Temple Place, Suite 330, Boston,
* MA 02111-1307 USA
*/
#include <config.h>
#include <common.h>
#include <asm/errno.h>
#include <linux/types.h>
#include <i2c.h>
#include <mc9sdz60.h>
#ifndef CONFIG_SYS_FSL_MC9SDZ60_I2C_ADDR
#error "You have to configure I2C address for MC9SDZ60"
#endif
u8 mc9sdz60_reg_read(enum mc9sdz60_reg reg)
{
u8 val;
if (i2c_read(CONFIG_SYS_FSL_MC9SDZ60_I2C_ADDR, reg, 1, &val, 1)) {
puts("Error reading MC9SDZ60 register\n");
return -1;
}
return val;
}
void mc9sdz60_reg_write(enum mc9sdz60_reg reg, u8 val)
{
i2c_write(CONFIG_SYS_FSL_MC9SDZ60_I2C_ADDR, reg, 1, &val, 1);
}

117
common/package/boot/uboot-ipq40xx/src/drivers/misc/ns87308.c Normal file
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/*
* (C) Copyright 2000
* Rob Taylor, Flying Pig Systems. robt@flyingpig.com.
*
* See file CREDITS for list of people who contributed to this
* project.
*
* This program is free software; you can redistribute it and/or
* modify it under the terms of the GNU General Public License as
* published by the Free Software Foundation; either version 2 of
* the License, or (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 59 Temple Place, Suite 330, Boston,
* MA 02111-1307 USA
*/
#include <config.h>
#include <ns87308.h>
void initialise_ns87308 (void)
{
#ifdef CONFIG_SYS_NS87308_PS2MOD
unsigned char data;
/*
* Switch floppy drive to PS/2 mode.
*/
read_pnp_config(SUPOERIO_CONF1, &data);
data &= 0xFB;
write_pnp_config(SUPOERIO_CONF1, data);
#endif
#if (CONFIG_SYS_NS87308_DEVS & CONFIG_SYS_NS87308_KBC1)
PNP_SET_DEVICE_BASE(LDEV_KBC1, CONFIG_SYS_NS87308_KBC1_BASE);
write_pnp_config(LUN_CONFIG_REG, 0);
write_pnp_config(CBASE_HIGH, 0x00);
write_pnp_config(CBASE_LOW, 0x64);
#endif
#if (CONFIG_SYS_NS87308_DEVS & CONFIG_SYS_NS87308_MOUSE)
PNP_ACTIVATE_DEVICE(LDEV_MOUSE);
#endif
#if (CONFIG_SYS_NS87308_DEVS & CONFIG_SYS_NS87308_RTC_APC)
PNP_SET_DEVICE_BASE(LDEV_RTC_APC, CONFIG_SYS_NS87308_RTC_BASE);
#endif
#if (CONFIG_SYS_NS87308_DEVS & CONFIG_SYS_NS87308_FDC)
PNP_SET_DEVICE_BASE(LDEV_FDC, CONFIG_SYS_NS87308_FDC_BASE);
write_pnp_config(LUN_CONFIG_REG, 0x40);
#endif
#if (CONFIG_SYS_NS87308_DEVS & CONFIG_SYS_NS87308_RARP)
PNP_SET_DEVICE_BASE(LDEV_PARP, CONFIG_SYS_NS87308_LPT_BASE);
#endif
#if (CONFIG_SYS_NS87308_DEVS & CONFIG_SYS_NS87308_UART1)
PNP_SET_DEVICE_BASE(LDEV_UART1, CONFIG_SYS_NS87308_UART1_BASE);
#endif
#if (CONFIG_SYS_NS87308_DEVS & CONFIG_SYS_NS87308_UART2)
PNP_SET_DEVICE_BASE(LDEV_UART2, CONFIG_SYS_NS87308_UART2_BASE);
#endif
#if (CONFIG_SYS_NS87308_DEVS & CONFIG_SYS_NS87308_GPIO)
PNP_SET_DEVICE_BASE(LDEV_GPIO, CONFIG_SYS_NS87308_GPIO_BASE);
#endif
#if (CONFIG_SYS_NS87308_DEVS & CONFIG_SYS_NS87308_POWRMAN)
#ifndef CONFIG_SYS_NS87308_PWMAN_BASE
PNP_ACTIVATE_DEVICE(LDEV_POWRMAN);
#else
PNP_SET_DEVICE_BASE(LDEV_POWRMAN, CONFIG_SYS_NS87308_PWMAN_BASE);
/*
* Enable all units
*/
write_pm_reg(CONFIG_SYS_NS87308_PWMAN_BASE, PWM_FER1, 0x7d);
write_pm_reg(CONFIG_SYS_NS87308_PWMAN_BASE, PWM_FER2, 0x87);
#ifdef CONFIG_SYS_NS87308_PMC1
write_pm_reg(CONFIG_SYS_NS87308_PWMAN_BASE, PWM_PMC1, CONFIG_SYS_NS87308_PMC1);
#endif
#ifdef CONFIG_SYS_NS87308_PMC2
write_pm_reg(CONFIG_SYS_NS87308_PWMAN_BASE, PWM_PMC2, CONFIG_SYS_NS87308_PMC2);
#endif
#ifdef CONFIG_SYS_NS87308_PMC3
write_pm_reg(CONFIG_SYS_NS87308_PWMAN_BASE, PWM_PMC3, CONFIG_SYS_NS87308_PMC3);
#endif
#endif
#endif
#ifdef CONFIG_SYS_NS87308_CS0_BASE
PNP_PGCS_CSLINE_BASE(0, CONFIG_SYS_NS87308_CS0_BASE);
PNP_PGCS_CSLINE_CONF(0, CONFIG_SYS_NS87308_CS0_CONF);
#endif
#ifdef CONFIG_SYS_NS87308_CS1_BASE
PNP_PGCS_CSLINE_BASE(1, CONFIG_SYS_NS87308_CS1_BASE);
PNP_PGCS_CSLINE_CONF(1, CONFIG_SYS_NS87308_CS1_CONF);
#endif
#ifdef CONFIG_SYS_NS87308_CS2_BASE
PNP_PGCS_CSLINE_BASE(2, CONFIG_SYS_NS87308_CS2_BASE);
PNP_PGCS_CSLINE_CONF(2, CONFIG_SYS_NS87308_CS2_CONF);
#endif
}

57
common/package/boot/uboot-ipq40xx/src/drivers/misc/pdsp188x.c Normal file
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/*
* Copyright 2010 Sergey Poselenov, Emcraft Systems, <sposelenov@emcraft.com>
* Copyright 2010 Ilya Yanok, Emcraft Systems, <yanok@emcraft.com>
*
* This program is free software; you can redistribute it and/or
* modify it under the terms of the GNU General Public License
* as published by the Free Software Foundation; either version 2
* of the License, or (at your option) any later version.
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston,
* MA 02110-1301, USA.
*/
#include <common.h>
#include <led-display.h>
#include <asm/io.h>
#ifdef CONFIG_CMD_DISPLAY
#define CWORD_CLEAR 0x80
#define CLEAR_DELAY (110 * 2)
#define DISPLAY_SIZE 8
static int pos; /* Current display position */
/* Handle different display commands */
void display_set(int cmd)
{
if (cmd & DISPLAY_CLEAR) {
out_8((unsigned char *)CONFIG_SYS_DISP_CWORD, CWORD_CLEAR);
udelay(1000 * CLEAR_DELAY);
}
if (cmd & DISPLAY_HOME) {
pos = 0;
}
}
/*
* Display a character at the current display position.
* Characters beyond the display size are ignored.
*/
int display_putc(char c)
{
if (pos >= DISPLAY_SIZE)
return -1;
out_8((unsigned char *)CONFIG_SYS_DISP_CHR_RAM + pos++, c);
return c;
}
#endif

147
common/package/boot/uboot-ipq40xx/src/drivers/misc/pmic_core.c Normal file
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/*
* Copyright (C) 2011 Samsung Electronics
* Lukasz Majewski <l.majewski@samsung.com>
*
* (C) Copyright 2010
* Stefano Babic, DENX Software Engineering, sbabic@denx.de
*
* (C) Copyright 2008-2009 Freescale Semiconductor, Inc.
*
* See file CREDITS for list of people who contributed to this
* project.
*
* This program is free software; you can redistribute it and/or
* modify it under the terms of the GNU General Public License as
* published by the Free Software Foundation; either version 2 of
* the License, or (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 59 Temple Place, Suite 330, Boston,
* MA 02111-1307 USA
*/
#include <common.h>
#include <linux/types.h>
#include <pmic.h>
static struct pmic pmic;
int check_reg(u32 reg)
{
if (reg >= pmic.number_of_regs) {
printf("<reg num> = %d is invalid. Should be less than %d\n",
reg, pmic.number_of_regs);
return -1;
}
return 0;
}
int pmic_set_output(struct pmic *p, u32 reg, int out, int on)
{
u32 val;
if (pmic_reg_read(p, reg, &val))
return -1;
if (on)
val |= out;
else
val &= ~out;
if (pmic_reg_write(p, reg, val))
return -1;
return 0;
}
static void pmic_show_info(struct pmic *p)
{
printf("PMIC: %s\n", p->name);
}
static void pmic_dump(struct pmic *p)
{
int i, ret;
u32 val;
pmic_show_info(p);
for (i = 0; i < p->number_of_regs; i++) {
ret = pmic_reg_read(p, i, &val);
if (ret)
puts("PMIC: Registers dump failed\n");
if (!(i % 8))
printf("\n0x%02x: ", i);
printf("%08x ", val);
}
puts("\n");
}
struct pmic *get_pmic(void)
{
return &pmic;
}
int do_pmic(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
{
u32 ret, reg, val;
char *cmd;
struct pmic *p = &pmic;
/* at least two arguments please */
if (argc < 2)
return cmd_usage(cmdtp);
cmd = argv[1];
if (strcmp(cmd, "dump") == 0) {
pmic_dump(p);
return 0;
}
if (strcmp(cmd, "read") == 0) {
if (argc < 3)
return cmd_usage(cmdtp);
reg = simple_strtoul(argv[2], NULL, 16);
ret = pmic_reg_read(p, reg, &val);
if (ret)
puts("PMIC: Register read failed\n");
printf("\n0x%02x: 0x%08x\n", reg, val);
return 0;
}
if (strcmp(cmd, "write") == 0) {
if (argc < 4)
return cmd_usage(cmdtp);
reg = simple_strtoul(argv[2], NULL, 16);
val = simple_strtoul(argv[3], NULL, 16);
pmic_reg_write(p, reg, val);
return 0;
}
/* No subcommand found */
return 1;
}
U_BOOT_CMD(
pmic, CONFIG_SYS_MAXARGS, 1, do_pmic,
"PMIC",
"dump - dump PMIC registers\n"
"pmic read <reg> - read register\n"
"pmic write <reg> <value> - write register"
);

37
common/package/boot/uboot-ipq40xx/src/drivers/misc/pmic_dialog.c Normal file
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/*
* Copyright (C) 2011 Samsung Electronics
* Lukasz Majewski <l.majewski@samsung.com>
*
* See file CREDITS for list of people who contributed to this
* project.
*
* This program is free software; you can redistribute it and/or
* modify it under the terms of the GNU General Public License as
* published by the Free Software Foundation; either version 2 of
* the License, or (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*/
#include <common.h>
#include <pmic.h>
#include <dialog_pmic.h>
int pmic_dialog_init(void)
{
struct pmic *p = get_pmic();
static const char name[] = "DIALOG_PMIC";
p->name = name;
p->number_of_regs = DIALOG_NUM_OF_REGS;
p->interface = PMIC_I2C;
p->hw.i2c.addr = CONFIG_SYS_DIALOG_PMIC_I2C_ADDR;
p->hw.i2c.tx_num = 1;
p->bus = I2C_PMIC;
return 0;
}

63
common/package/boot/uboot-ipq40xx/src/drivers/misc/pmic_fsl.c Normal file
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/*
* Copyright (C) 2011 Samsung Electronics
* Lukasz Majewski <l.majewski@samsung.com>
*
* See file CREDITS for list of people who contributed to this
* project.
*
* This program is free software; you can redistribute it and/or
* modify it under the terms of the GNU General Public License as
* published by the Free Software Foundation; either version 2 of
* the License, or (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 59 Temple Place, Suite 330, Boston,
* MA 02111-1307 USA
*/
#include <common.h>
#include <spi.h>
#include <pmic.h>
#include <fsl_pmic.h>
#if defined(CONFIG_PMIC_SPI)
static u32 pmic_spi_prepare_tx(u32 reg, u32 *val, u32 write)
{
return (write << 31) | (reg << 25) | (*val & 0x00FFFFFF);
}
#endif
int pmic_init(void)
{
struct pmic *p = get_pmic();
static const char name[] = "FSL_PMIC";
p->name = name;
p->number_of_regs = PMIC_NUM_OF_REGS;
#if defined(CONFIG_PMIC_SPI)
p->interface = PMIC_SPI;
p->bus = CONFIG_FSL_PMIC_BUS;
p->hw.spi.cs = CONFIG_FSL_PMIC_CS;
p->hw.spi.clk = CONFIG_FSL_PMIC_CLK;
p->hw.spi.mode = CONFIG_FSL_PMIC_MODE;
p->hw.spi.bitlen = CONFIG_FSL_PMIC_BITLEN;
p->hw.spi.flags = SPI_XFER_BEGIN | SPI_XFER_END;
p->hw.spi.prepare_tx = pmic_spi_prepare_tx;
#elif defined(CONFIG_PMIC_I2C)
p->interface = PMIC_I2C;
p->hw.i2c.addr = CONFIG_SYS_FSL_PMIC_I2C_ADDR;
p->hw.i2c.tx_num = 3;
p->bus = I2C_PMIC;
#else
#error "You must select CONFIG_PMIC_SPI or CONFIG_PMIC_I2C"
#endif
return 0;
}

98
common/package/boot/uboot-ipq40xx/src/drivers/misc/pmic_i2c.c Normal file
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/*
* Copyright (C) 2011 Samsung Electronics
* Lukasz Majewski <l.majewski@samsung.com>
*
* (C) Copyright 2010
* Stefano Babic, DENX Software Engineering, sbabic@denx.de
*
* (C) Copyright 2008-2009 Freescale Semiconductor, Inc.
*
* See file CREDITS for list of people who contributed to this
* project.
*
* This program is free software; you can redistribute it and/or
* modify it under the terms of the GNU General Public License as
* published by the Free Software Foundation; either version 2 of
* the License, or (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 59 Temple Place, Suite 330, Boston,
* MA 02111-1307 USA
*/
#include <common.h>
#include <linux/types.h>
#include <pmic.h>
#include <i2c.h>
int pmic_reg_write(struct pmic *p, u32 reg, u32 val)
{
unsigned char buf[4] = { 0 };
if (check_reg(reg))
return -1;
switch (pmic_i2c_tx_num) {
case 3:
buf[0] = (val >> 16) & 0xff;
buf[1] = (val >> 8) & 0xff;
buf[2] = val & 0xff;
break;
case 1:
buf[0] = val & 0xff;
break;
default:
printf("%s: invalid tx_num: %d", __func__, pmic_i2c_tx_num);
return -1;
}
if (i2c_write(pmic_i2c_addr, reg, 1, buf, pmic_i2c_tx_num))
return -1;
return 0;
}
int pmic_reg_read(struct pmic *p, u32 reg, u32 *val)
{
unsigned char buf[4] = { 0 };
u32 ret_val = 0;
if (check_reg(reg))
return -1;
if (i2c_read(pmic_i2c_addr, reg, 1, buf, pmic_i2c_tx_num))
return -1;
switch (pmic_i2c_tx_num) {
case 3:
ret_val = buf[0] << 16 | buf[1] << 8 | buf[2];
break;
case 1:
ret_val = buf[0];
break;
default:
printf("%s: invalid tx_num: %d", __func__, pmic_i2c_tx_num);
return -1;
}
memcpy(val, &ret_val, sizeof(ret_val));
return 0;
}
int pmic_probe(struct pmic *p)
{
I2C_SET_BUS(p->bus);
debug("PMIC:%s probed!\n", p->name);
if (i2c_probe(pmic_i2c_addr)) {
printf("Can't find PMIC:%s\n", p->name);
return -1;
}
return 0;
}

43
common/package/boot/uboot-ipq40xx/src/drivers/misc/pmic_max8997.c Normal file
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/*
* Copyright (C) 2012 Samsung Electronics
* Lukasz Majewski <l.majewski@samsung.com>
*
* See file CREDITS for list of people who contributed to this
* project.
*
* This program is free software; you can redistribute it and/or
* modify it under the terms of the GNU General Public License as
* published by the Free Software Foundation; either version 2 of
* the License, or (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 59 Temple Place, Suite 330, Boston,
* MA 02111-1307 USA
*/
#include <common.h>
#include <pmic.h>
#include <max8997_pmic.h>
int pmic_init(void)
{
struct pmic *p = get_pmic();
static const char name[] = "MAX8997_PMIC";
puts("Board PMIC init\n");
p->name = name;
p->interface = PMIC_I2C;
p->number_of_regs = PMIC_NUM_OF_REGS;
p->hw.i2c.addr = MAX8997_I2C_ADDR;
p->hw.i2c.tx_num = 1;
p->bus = I2C_PMIC;
return 0;
}

43
common/package/boot/uboot-ipq40xx/src/drivers/misc/pmic_max8998.c Normal file
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/*
* Copyright (C) 2011 Samsung Electronics
* Lukasz Majewski <l.majewski@samsung.com>
*
* See file CREDITS for list of people who contributed to this
* project.
*
* This program is free software; you can redistribute it and/or
* modify it under the terms of the GNU General Public License as
* published by the Free Software Foundation; either version 2 of
* the License, or (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 59 Temple Place, Suite 330, Boston,
* MA 02111-1307 USA
*/
#include <common.h>
#include <pmic.h>
#include <max8998_pmic.h>
int pmic_init(void)
{
struct pmic *p = get_pmic();
static const char name[] = "MAX8998_PMIC";
puts("Board PMIC init\n");
p->name = name;
p->interface = PMIC_I2C;
p->number_of_regs = PMIC_NUM_OF_REGS;
p->hw.i2c.addr = MAX8998_I2C_ADDR;
p->hw.i2c.tx_num = 1;
p->bus = I2C_PMIC;
return 0;
}

108
common/package/boot/uboot-ipq40xx/src/drivers/misc/pmic_spi.c Normal file
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/*
* Copyright (C) 2011 Samsung Electronics
* Lukasz Majewski <l.majewski@samsung.com>
*
* (C) Copyright 2010
* Stefano Babic, DENX Software Engineering, sbabic@denx.de
*
* (C) Copyright 2008-2009 Freescale Semiconductor, Inc.
*
* See file CREDITS for list of people who contributed to this
* project.
*
* This program is free software; you can redistribute it and/or
* modify it under the terms of the GNU General Public License as
* published by the Free Software Foundation; either version 2 of
* the License, or (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 59 Temple Place, Suite 330, Boston,
* MA 02111-1307 USA
*/
#include <common.h>
#include <linux/types.h>
#include <pmic.h>
#include <spi.h>
static struct spi_slave *slave;
void pmic_spi_free(struct spi_slave *slave)
{
if (slave)
spi_free_slave(slave);
}
struct spi_slave *pmic_spi_probe(struct pmic *p)
{
return spi_setup_slave(p->bus,
p->hw.spi.cs,
p->hw.spi.clk,
p->hw.spi.mode);
}
static u32 pmic_reg(struct pmic *p, u32 reg, u32 *val, u32 write)
{
u32 pmic_tx, pmic_rx;
u32 tmp;
if (!slave) {
slave = pmic_spi_probe(p);
if (!slave)
return -1;
}
if (check_reg(reg))
return -1;
if (spi_claim_bus(slave))
return -1;
pmic_tx = p->hw.spi.prepare_tx(reg, val, write);
tmp = cpu_to_be32(pmic_tx);
if (spi_xfer(slave, pmic_spi_bitlen, &tmp, &pmic_rx,
pmic_spi_flags)) {
spi_release_bus(slave);
return -1;
}
if (write) {
pmic_tx = p->hw.spi.prepare_tx(reg, val, 0);
tmp = cpu_to_be32(pmic_tx);
if (spi_xfer(slave, pmic_spi_bitlen, &tmp, &pmic_rx,
pmic_spi_flags)) {
spi_release_bus(slave);
return -1;
}
}
spi_release_bus(slave);
*val = cpu_to_be32(pmic_rx);
return 0;
}
int pmic_reg_write(struct pmic *p, u32 reg, u32 val)
{
if (pmic_reg(p, reg, &val, 1))
return -1;
return 0;
}
int pmic_reg_read(struct pmic *p, u32 reg, u32 *val)
{
if (pmic_reg(p, reg, val, 0))
return -1;
return 0;
}

127
common/package/boot/uboot-ipq40xx/src/drivers/misc/status_led.c Normal file
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/*
* (C) Copyright 2000-2003
* Wolfgang Denk, DENX Software Engineering, wd@denx.de.
*
* See file CREDITS for list of people who contributed to this
* project.
*
* This program is free software; you can redistribute it and/or
* modify it under the terms of the GNU General Public License as
* published by the Free Software Foundation; either version 2 of
* the License, or (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 59 Temple Place, Suite 330, Boston,
* MA 02111-1307 USA
*/
#include <common.h>
#include <status_led.h>
/*
* The purpose of this code is to signal the operational status of a
* target which usually boots over the network; while running in
* U-Boot, a status LED is blinking. As soon as a valid BOOTP reply
* message has been received, the LED is turned off. The Linux
* kernel, once it is running, will start blinking the LED again,
* with another frequency.
*/
/* ------------------------------------------------------------------------- */
typedef struct {
led_id_t mask;
int state;
int period;
int cnt;
} led_dev_t;
led_dev_t led_dev[] = {
{ STATUS_LED_BIT,
STATUS_LED_STATE,
STATUS_LED_PERIOD,
0,
},
#if defined(STATUS_LED_BIT1)
{ STATUS_LED_BIT1,
STATUS_LED_STATE1,
STATUS_LED_PERIOD1,
0,
},
#endif
#if defined(STATUS_LED_BIT2)
{ STATUS_LED_BIT2,
STATUS_LED_STATE2,
STATUS_LED_PERIOD2,
0,
},
#endif
#if defined(STATUS_LED_BIT3)
{ STATUS_LED_BIT3,
STATUS_LED_STATE3,
STATUS_LED_PERIOD3,
0,
},
#endif
};
#define MAX_LED_DEV (sizeof(led_dev)/sizeof(led_dev_t))
static int status_led_init_done = 0;
static void status_led_init (void)
{
led_dev_t *ld;
int i;
for (i = 0, ld = led_dev; i < MAX_LED_DEV; i++, ld++)
__led_init (ld->mask, ld->state);
status_led_init_done = 1;
}
void status_led_tick (ulong timestamp)
{
led_dev_t *ld;
int i;
if (!status_led_init_done)
status_led_init ();
for (i = 0, ld = led_dev; i < MAX_LED_DEV; i++, ld++) {
if (ld->state != STATUS_LED_BLINKING)
continue;
if (++ld->cnt >= ld->period) {
__led_toggle (ld->mask);
ld->cnt -= ld->period;
}
}
}
void status_led_set (int led, int state)
{
led_dev_t *ld;
if (led < 0 || led >= MAX_LED_DEV)
return;
if (!status_led_init_done)
status_led_init ();
ld = &led_dev[led];
ld->state = state;
if (state == STATUS_LED_BLINKING) {
ld->cnt = 0; /* always start with full period */
state = STATUS_LED_ON; /* always start with LED _ON_ */
}
__led_set (ld->mask, state);
}

48
common/package/boot/uboot-ipq40xx/src/drivers/misc/twl4030_led.c Normal file
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/*
* Copyright (c) 2009 Wind River Systems, Inc.
* Tom Rix <Tom.Rix at windriver.com>
*
* This program is free software; you can redistribute it and/or
* modify it under the terms of the GNU General Public License as
* published by the Free Software Foundation; either version 2 of
* the License, or (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 59 Temple Place, Suite 330, Boston,
* MA 02111-1307 USA
*
* twl4030_led_init is from cpu/omap3/common.c, power_init_r
*
* (C) Copyright 2004-2008
* Texas Instruments, <www.ti.com>
*
* Author :
* Sunil Kumar <sunilsaini05 at gmail.com>
* Shashi Ranjan <shashiranjanmca05 at gmail.com>
*
* Derived from Beagle Board and 3430 SDP code by
* Richard Woodruff <r-woodruff2 at ti.com>
* Syed Mohammed Khasim <khasim at ti.com>
*
*/
#include <twl4030.h>
void twl4030_led_init(unsigned char ledon_mask)
{
/* LEDs need to have corresponding PWMs enabled */
if (ledon_mask & TWL4030_LED_LEDEN_LEDAON)
ledon_mask |= TWL4030_LED_LEDEN_LEDAPWM;
if (ledon_mask & TWL4030_LED_LEDEN_LEDBON)
ledon_mask |= TWL4030_LED_LEDEN_LEDBPWM;
twl4030_i2c_write_u8(TWL4030_CHIP_LED, ledon_mask,
TWL4030_LED_LEDEN);
}