Update to lastest kernel versions

2025-03-09 15:40:20 +00:00 · 2019-06-18 18:43:58 +02:00 · 2019-06-18 18:43:58 +02:00 · f1e3dc3f73
commit f1e3dc3f73
parent dfd30fd2b8
37 changed files with 767 additions and 2695 deletions
--- a/build.sh
+++ b/build.sh
@ -54,8 +54,7 @@ else
 fi

 #_get_repo source https://github.com/ysurac/openmptcprouter-source "master"
-#_get_repo "$OMR_TARGET/source" https://github.com/openwrt/openwrt "a3ccac6b1d693527befa73532a6cf5abda7134c0"
-_get_repo "$OMR_TARGET/source" https://github.com/openwrt/openwrt "4d11c4c3784196ed3e5b5a1f81fa415d99ef32b0"
+_get_repo "$OMR_TARGET/source" https://github.com/openwrt/openwrt "aa3f9736ea67200dd840093b848606ced27d388e"
 _get_repo feeds/packages https://github.com/openwrt/packages "ae5c8603a7cf4a5b9c7215a3768007f256f51b1c"
 _get_repo feeds/luci https://github.com/openwrt/luci "cffeee49d7be19743cc40459fa1f423517f215c0"

--- a/root/target/linux/brcm2708/bcm2710/config-4.19
+++ b/root/target/linux/brcm2708/bcm2710/config-4.19
@ -76,6 +76,7 @@ CONFIG_ARM64_4K_PAGES=y
 CONFIG_ARM64_CONT_SHIFT=4
 # CONFIG_ARM64_CRYPTO is not set
 CONFIG_ARM64_ERRATUM_1024718=y
+CONFIG_ARM64_ERRATUM_1463225=y
 CONFIG_ARM64_ERRATUM_819472=y
 CONFIG_ARM64_ERRATUM_824069=y
 CONFIG_ARM64_ERRATUM_826319=y
--- a/root/target/linux/brcm2708/patches-4.19/0523-staging-bcm2835-codec-Convert-V4L2-nsec-timestamps-t.patch
+++ b/root/target/linux/brcm2708/patches-4.19/0523-staging-bcm2835-codec-Convert-V4L2-nsec-timestamps-t.patch
@ -0,0 +1,51 @@
+From f41f870c3cf38e766961131e3a79bcb7845a8d55 Mon Sep 17 00:00:00 2001
+From: Dave Stevenson <dave.stevenson@raspberrypi.org>
+Date: Fri, 10 May 2019 14:11:58 +0100
+Subject: [PATCH 523/528] staging: bcm2835-codec: Convert V4L2 nsec timestamps
+ to MMAL usec
+
+V4L2 uses nsecs, whilst MMAL uses usecs, but the code wasn't converting
+between them. This upsets video encode rate control.
+
+Signed-off-by: Dave Stevenson <dave.stevenson@raspberrypi.org>
+---
+ .../vc04_services/bcm2835-codec/bcm2835-v4l2-codec.c     | 9 +++++++--
+ 1 file changed, 7 insertions(+), 2 deletions(-)
+
+diff --git a/drivers/staging/vc04_services/bcm2835-codec/bcm2835-v4l2-codec.c b/drivers/staging/vc04_services/bcm2835-codec/bcm2835-v4l2-codec.c
+index 22588f78287e..5c7fc39cd921 100644
+--- a/drivers/staging/vc04_services/bcm2835-codec/bcm2835-v4l2-codec.c
+++ b/drivers/staging/vc04_services/bcm2835-codec/bcm2835-v4l2-codec.c
+@@ -823,7 +823,8 @@ static void op_buffer_cb(struct vchiq_mmal_instance *instance,
+ 		vb2->flags |= V4L2_BUF_FLAG_LAST;
+ 	}
+ 
+-	vb2->vb2_buf.timestamp = mmal_buf->pts;
+	/* vb2 timestamps in nsecs, mmal in usecs */
+	vb2->vb2_buf.timestamp = mmal_buf->pts * 1000;
+ 
+ 	vb2_set_plane_payload(&vb2->vb2_buf, 0, mmal_buf->length);
+ 	if (mmal_buf->mmal_flags & MMAL_BUFFER_HEADER_FLAG_KEYFRAME)
+@@ -847,6 +848,7 @@ static void op_buffer_cb(struct vchiq_mmal_instance *instance,
+ static void vb2_to_mmal_buffer(struct m2m_mmal_buffer *buf,
+ 			       struct vb2_v4l2_buffer *vb2)
+ {
+	u64 pts;
+ 	buf->mmal.mmal_flags = 0;
+ 	if (vb2->flags & V4L2_BUF_FLAG_KEYFRAME)
+ 		buf->mmal.mmal_flags |= MMAL_BUFFER_HEADER_FLAG_KEYFRAME;
+@@ -869,7 +871,10 @@ static void vb2_to_mmal_buffer(struct m2m_mmal_buffer *buf,
+ 	if (!buf->mmal.length || vb2->flags & V4L2_BUF_FLAG_LAST)
+ 		buf->mmal.mmal_flags |= MMAL_BUFFER_HEADER_FLAG_EOS;
+ 
+-	buf->mmal.pts = vb2->vb2_buf.timestamp;
+	/* vb2 timestamps in nsecs, mmal in usecs */
+	pts = vb2->vb2_buf.timestamp;
+	do_div(pts, 1000);
+	buf->mmal.pts = pts;
+ 	buf->mmal.dts = MMAL_TIME_UNKNOWN;
+ }
+ 
+-- 
+2.19.1
+
--- a/root/target/linux/brcm2708/patches-4.19/0524-staging-bcm2835-codec-Add-support-for-setting-S_PARM.patch
+++ b/root/target/linux/brcm2708/patches-4.19/0524-staging-bcm2835-codec-Add-support-for-setting-S_PARM.patch
@ -0,0 +1,123 @@
+From 16a9ad722bd6dce2e90db11b3cc4d8306d698706 Mon Sep 17 00:00:00 2001
+From: Dave Stevenson <dave.stevenson@raspberrypi.org>
+Date: Fri, 10 May 2019 14:13:11 +0100
+Subject: [PATCH 524/528] staging: bcm2835-codec: Add support for setting
+ S_PARM and G_PARM
+
+Video encode can use the frame rate for rate control calculations,
+therefore plumb it through from V4L2's [S|G]_PARM ioctl.
+
+Signed-off-by: Dave Stevenson <dave.stevenson@raspberrypi.org>
+---
+ .../bcm2835-codec/bcm2835-v4l2-codec.c        | 52 +++++++++++++++++--
+ 1 file changed, 48 insertions(+), 4 deletions(-)
+
+diff --git a/drivers/staging/vc04_services/bcm2835-codec/bcm2835-v4l2-codec.c b/drivers/staging/vc04_services/bcm2835-codec/bcm2835-v4l2-codec.c
+index 5c7fc39cd921..708f76b7aa92 100644
+--- a/drivers/staging/vc04_services/bcm2835-codec/bcm2835-v4l2-codec.c
+++ b/drivers/staging/vc04_services/bcm2835-codec/bcm2835-v4l2-codec.c
+@@ -447,6 +447,8 @@ struct bcm2835_codec_ctx {
+ 	/* Source and destination queue data */
+ 	struct bcm2835_codec_q_data   q_data[2];
+ 	s32  bitrate;
+	unsigned int	framerate_num;
+	unsigned int	framerate_denom;
+ 
+ 	bool aborting;
+ 	int num_ip_buffers;
+@@ -610,8 +612,8 @@ static void setup_mmal_port_format(struct bcm2835_codec_ctx *ctx,
+ 		port->es.video.height = q_data->height;
+ 		port->es.video.crop.width = q_data->crop_width;
+ 		port->es.video.crop.height = q_data->crop_height;
+-		port->es.video.frame_rate.num = 0;
+-		port->es.video.frame_rate.den = 1;
+		port->es.video.frame_rate.num = ctx->framerate_num;
+		port->es.video.frame_rate.den = ctx->framerate_denom;
+ 	} else {
+ 		/* Compressed format - leave resolution as 0 for decode */
+ 		if (ctx->dev->role == DECODE) {
+@@ -625,9 +627,9 @@ static void setup_mmal_port_format(struct bcm2835_codec_ctx *ctx,
+ 			port->es.video.crop.width = q_data->crop_width;
+ 			port->es.video.crop.height = q_data->crop_height;
+ 			port->format.bitrate = ctx->bitrate;
+			port->es.video.frame_rate.num = ctx->framerate_num;
+			port->es.video.frame_rate.den = ctx->framerate_denom;
+ 		}
+-		port->es.video.frame_rate.num = 0;
+-		port->es.video.frame_rate.den = 1;
+ 	}
+ 	port->es.video.crop.x = 0;
+ 	port->es.video.crop.y = 0;
+@@ -1361,6 +1363,41 @@ static int vidioc_s_selection(struct file *file, void *priv,
+ 	return 0;
+ }
+ 
+static int vidioc_s_parm(struct file *file, void *priv,
+			 struct v4l2_streamparm *parm)
+{
+	struct bcm2835_codec_ctx *ctx = file2ctx(file);
+
+	if (parm->type != V4L2_BUF_TYPE_VIDEO_OUTPUT)
+		return -EINVAL;
+
+	ctx->framerate_num =
+			parm->parm.output.timeperframe.denominator;
+	ctx->framerate_denom =
+			parm->parm.output.timeperframe.numerator;
+
+	parm->parm.output.capability = V4L2_CAP_TIMEPERFRAME;
+
+	return 0;
+}
+
+static int vidioc_g_parm(struct file *file, void *priv,
+			 struct v4l2_streamparm *parm)
+{
+	struct bcm2835_codec_ctx *ctx = file2ctx(file);
+
+	if (parm->type != V4L2_BUF_TYPE_VIDEO_OUTPUT)
+		return -EINVAL;
+
+	parm->parm.output.capability = V4L2_CAP_TIMEPERFRAME;
+	parm->parm.output.timeperframe.denominator =
+			ctx->framerate_num;
+	parm->parm.output.timeperframe.numerator =
+			ctx->framerate_denom;
+
+	return 0;
+}
+
+ static int vidioc_subscribe_evt(struct v4l2_fh *fh,
+ 				const struct v4l2_event_subscription *sub)
+ {
+@@ -1725,6 +1762,9 @@ static const struct v4l2_ioctl_ops bcm2835_codec_ioctl_ops = {
+ 	.vidioc_g_selection	= vidioc_g_selection,
+ 	.vidioc_s_selection	= vidioc_s_selection,
+ 
+	.vidioc_g_parm		= vidioc_g_parm,
+	.vidioc_s_parm		= vidioc_s_parm,
+
+ 	.vidioc_subscribe_event = vidioc_subscribe_evt,
+ 	.vidioc_unsubscribe_event = v4l2_event_unsubscribe,
+ 
+@@ -2546,6 +2586,8 @@ static int bcm2835_codec_create(struct platform_device *pdev,
+ 	case DECODE:
+ 		v4l2_disable_ioctl(vfd, VIDIOC_ENCODER_CMD);
+ 		v4l2_disable_ioctl(vfd, VIDIOC_TRY_ENCODER_CMD);
+		v4l2_disable_ioctl(vfd, VIDIOC_S_PARM);
+		v4l2_disable_ioctl(vfd, VIDIOC_G_PARM);
+ 		video_nr = decode_video_nr;
+ 		break;
+ 	case ENCODE:
+@@ -2558,6 +2600,8 @@ static int bcm2835_codec_create(struct platform_device *pdev,
+ 		v4l2_disable_ioctl(vfd, VIDIOC_TRY_ENCODER_CMD);
+ 		v4l2_disable_ioctl(vfd, VIDIOC_DECODER_CMD);
+ 		v4l2_disable_ioctl(vfd, VIDIOC_TRY_DECODER_CMD);
+		v4l2_disable_ioctl(vfd, VIDIOC_S_PARM);
+		v4l2_disable_ioctl(vfd, VIDIOC_G_PARM);
+ 		video_nr = isp_video_nr;
+ 		break;
+ 	default:
+-- 
+2.19.1
+
--- a/root/target/linux/brcm2708/patches-4.19/0525-w1-w1-gpio-Make-GPIO-an-output-for-strong-pullup.patch
+++ b/root/target/linux/brcm2708/patches-4.19/0525-w1-w1-gpio-Make-GPIO-an-output-for-strong-pullup.patch
@ -0,0 +1,32 @@
+From 9e064a15633a1e07b959e09af4d9d2df3dd0d450 Mon Sep 17 00:00:00 2001
+From: Phil Elwell <phil@raspberrypi.org>
+Date: Wed, 12 Jun 2019 17:15:05 +0100
+Subject: [PATCH 525/528] w1: w1-gpio: Make GPIO an output for strong pullup
+
+The logic to drive the data line high to implement a strong pullup
+assumed that the pin was already an output - setting a value does
+not change an input.
+
+See: https://github.com/raspberrypi/firmware/issues/1143
+
+Signed-off-by: Phil Elwell <phil@raspberrypi.org>
+---
+ drivers/w1/masters/w1-gpio.c | 2 +-
+ 1 file changed, 1 insertion(+), 1 deletion(-)
+
+diff --git a/drivers/w1/masters/w1-gpio.c b/drivers/w1/masters/w1-gpio.c
+index 55e11bf8ebaf..6327c88cfcc3 100644
+--- a/drivers/w1/masters/w1-gpio.c
+++ b/drivers/w1/masters/w1-gpio.c
+@@ -33,7 +33,7 @@ static u8 w1_gpio_set_pullup(void *data, int delay)
+ 			 * This will OVERRIDE open drain emulation and force-pull
+ 			 * the line high for some time.
+ 			 */
+-			gpiod_set_raw_value(pdata->gpiod, 1);
+			gpiod_direction_output_raw(pdata->gpiod, 1);
+ 			msleep(pdata->pullup_duration);
+ 			/*
+ 			 * This will simply set the line as input since we are doing
+-- 
+2.19.1
+
--- a/root/target/linux/brcm2708/patches-4.19/0526-overlays-Update-w1-gpio-and-w1-gpio-pullup.patch
+++ b/root/target/linux/brcm2708/patches-4.19/0526-overlays-Update-w1-gpio-and-w1-gpio-pullup.patch
@ -0,0 +1,87 @@
+From f5645ab99474f9800e41544113333d5a7970b9d7 Mon Sep 17 00:00:00 2001
+From: Phil Elwell <phil@raspberrypi.org>
+Date: Wed, 12 Jun 2019 17:32:11 +0100
+Subject: [PATCH 526/528] overlays: Update w1-gpio and w1-gpio-pullup
+
+The parasitic power (power on data) feature is now enabled by
+default in the w1-gpio driver, so update the README and make the
+"pullup" parameter a no-op.
+
+Signed-off-by: Phil Elwell <phil@raspberrypi.org>
+---
+ arch/arm/boot/dts/overlays/README                     | 9 ++-------
+ arch/arm/boot/dts/overlays/w1-gpio-overlay.dts        | 3 +--
+ arch/arm/boot/dts/overlays/w1-gpio-pullup-overlay.dts | 3 +--
+ 3 files changed, 4 insertions(+), 11 deletions(-)
+
+diff --git a/arch/arm/boot/dts/overlays/README b/arch/arm/boot/dts/overlays/README
+index 42265637df37..c1863277cafb 100644
+--- a/arch/arm/boot/dts/overlays/README
+++ b/arch/arm/boot/dts/overlays/README
+@@ -2261,9 +2261,7 @@ Info:   Configures the w1-gpio Onewire interface module.
+         Use this overlay if you *don't* need a GPIO to drive an external pullup.
+ Load:   dtoverlay=w1-gpio,<param>=<val>
+ Params: gpiopin                 GPIO for I/O (default "4")
+-
+-        pullup                  Non-zero, "on", or "y" to enable the parasitic
+-                                power (2-wire, power-on-data) feature
+        pullup                  Now enabled by default (ignored)
+ 
+ 
+ Name:   w1-gpio-pullup
+@@ -2271,11 +2269,8 @@ Info:   Configures the w1-gpio Onewire interface module.
+         Use this overlay if you *do* need a GPIO to drive an external pullup.
+ Load:   dtoverlay=w1-gpio-pullup,<param>=<val>
+ Params: gpiopin                 GPIO for I/O (default "4")
+-
+-        pullup                  Non-zero, "on", or "y" to enable the parasitic
+-                                power (2-wire, power-on-data) feature
+-
+         extpullup               GPIO for external pullup (default "5")
+        pullup                  Now enabled by default (ignored)
+ 
+ 
+ Name:   wittypi
+diff --git a/arch/arm/boot/dts/overlays/w1-gpio-overlay.dts b/arch/arm/boot/dts/overlays/w1-gpio-overlay.dts
+index 59543d69217e..f44e325bc1f2 100644
+--- a/arch/arm/boot/dts/overlays/w1-gpio-overlay.dts
+++ b/arch/arm/boot/dts/overlays/w1-gpio-overlay.dts
+@@ -14,7 +14,6 @@
+ 				pinctrl-names = "default";
+ 				pinctrl-0 = <&w1_pins>;
+ 				gpios = <&gpio 4 0>;
+-				rpi,parasitic-power = <0>;
+ 				status = "okay";
+ 			};
+ 		};
+@@ -36,6 +35,6 @@
+ 				<&w1>,"reg:0",
+ 				<&w1_pins>,"brcm,pins:0",
+ 				<&w1_pins>,"reg:0";
+-		pullup =        <&w1>,"rpi,parasitic-power:0";
+		pullup;		// Silently ignore unneeded parameter
+ 	};
+ };
+diff --git a/arch/arm/boot/dts/overlays/w1-gpio-pullup-overlay.dts b/arch/arm/boot/dts/overlays/w1-gpio-pullup-overlay.dts
+index 000cf0150e43..953c6a1aeab9 100644
+--- a/arch/arm/boot/dts/overlays/w1-gpio-pullup-overlay.dts
+++ b/arch/arm/boot/dts/overlays/w1-gpio-pullup-overlay.dts
+@@ -14,7 +14,6 @@
+ 				pinctrl-names = "default";
+ 				pinctrl-0 = <&w1_pins>;
+ 				gpios = <&gpio 4 0>, <&gpio 5 1>;
+-				rpi,parasitic-power = <0>;
+ 				status = "okay";
+ 			};
+ 		};
+@@ -38,6 +37,6 @@
+ 				<&w1_pins>,"reg:0";
+ 		extpullup =     <&w1>,"gpios:16",
+ 				<&w1_pins>,"brcm,pins:4";
+-		pullup =        <&w1>,"rpi,parasitic-power:0";
+		pullup;		// Silently ignore unneeded parameter
+ 	};
+ };
+-- 
+2.19.1
+
--- a/root/target/linux/brcm2708/patches-4.19/0527-bcm2835-sdhost-Fix-DMA-channel-leak-on-error-remove.patch
+++ b/root/target/linux/brcm2708/patches-4.19/0527-bcm2835-sdhost-Fix-DMA-channel-leak-on-error-remove.patch
@ -0,0 +1,36 @@
+From 5040b4b78e4cb74a6364d9a7c6cca0385e2dffd8 Mon Sep 17 00:00:00 2001
+From: Phil Elwell <phil@raspberrypi.org>
+Date: Wed, 12 Jun 2019 20:45:17 +0100
+Subject: [PATCH 527/528] bcm2835-sdhost: Fix DMA channel leak on error/remove
+
+Signed-off-by: Phil Elwell <phil@raspberrypi.org>
+---
+ drivers/mmc/host/bcm2835-sdhost.c | 5 ++++-
+ 1 file changed, 4 insertions(+), 1 deletion(-)
+
+diff --git a/drivers/mmc/host/bcm2835-sdhost.c b/drivers/mmc/host/bcm2835-sdhost.c
+index d43af85135d3..844bed552bae 100644
+--- a/drivers/mmc/host/bcm2835-sdhost.c
+++ b/drivers/mmc/host/bcm2835-sdhost.c
+@@ -2154,6 +2154,8 @@ static int bcm2835_sdhost_probe(struct platform_device *pdev)
+ 
+ err:
+ 	pr_debug("bcm2835_sdhost_probe -> err %d\n", ret);
+	if (host->dma_chan_rxtx)
+		dma_release_channel(host->dma_chan_rxtx);
+ 	mmc_free_host(mmc);
+ 
+ 	return ret;
+@@ -2174,7 +2176,8 @@ static int bcm2835_sdhost_remove(struct platform_device *pdev)
+ 	del_timer_sync(&host->timer);
+ 
+ 	tasklet_kill(&host->finish_tasklet);
+-
+	if (host->dma_chan_rxtx)
+		dma_release_channel(host->dma_chan_rxtx);
+ 	mmc_free_host(host->mmc);
+ 	platform_set_drvdata(pdev, NULL);
+ 
+-- 
+2.19.1
+
--- a/root/target/linux/brcm2708/patches-4.19/0528-i2c-bcm2835-Model-Divider-in-CCF.patch
+++ b/root/target/linux/brcm2708/patches-4.19/0528-i2c-bcm2835-Model-Divider-in-CCF.patch
@ -0,0 +1,275 @@
+From 2f8d963db206ce596f9a9e951ec425e9c3e1b4d9 Mon Sep 17 00:00:00 2001
+From: Annaliese McDermond <nh6z@nh6z.net>
+Date: Sat, 8 Jun 2019 10:14:43 -0700
+Subject: [PATCH 528/528] i2c: bcm2835: Model Divider in CCF
+
+Commit bebff81fb8b9216eb4fba22cf910553621ae3477 upstream.
+
+Model the I2C bus clock divider as a part of the Core Clock Framework.
+Primarily this removes the clk_get_rate() call from each transfer.
+This call causes problems for slave drivers that themselves have
+internal clock components that are controlled by an I2C interface.
+When the slave's internal clock component is prepared, the prepare
+lock is obtained, and it makes calls to the I2C subsystem to
+command the hardware to activate the clock.  In order to perform
+the I2C transfer, this driver sets the divider, which requires
+it to get the parent clock rate, which it does with clk_get_rate().
+Unfortunately, this function will try to take the clock prepare
+lock, which is already held by the slave's internal clock calls
+creating a deadlock.
+
+Modeling the divider in the CCF natively removes this dependency
+and the divider value is only set upon changing the bus clock
+frequency or changes in the parent clock that cascade down to this
+divisor.  This obviates the need to set the divider with every
+transfer and avoids the deadlock described above.  It also should
+provide better clock debugging and save a few cycles on each
+transfer due to not having to recalcuate the divider value.
+
+Signed-off-by: Annaliese McDermond <nh6z@nh6z.net>
+Acked-by: Stefan Wahren <stefan.wahren@i2se.com>
+Reviewed-by: Eric Anholt <eric@anholt.net>
+Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
+---
+ drivers/i2c/busses/i2c-bcm2835.c | 145 ++++++++++++++++++++++++-------
+ 1 file changed, 114 insertions(+), 31 deletions(-)
+
+diff --git a/drivers/i2c/busses/i2c-bcm2835.c b/drivers/i2c/busses/i2c-bcm2835.c
+index 1426dab2670b..108d2ae4632c 100644
+--- a/drivers/i2c/busses/i2c-bcm2835.c
+++ b/drivers/i2c/busses/i2c-bcm2835.c
+@@ -12,6 +12,8 @@
+  */
+ 
+ #include <linux/clk.h>
+#include <linux/clkdev.h>
+#include <linux/clk-provider.h>
+ #include <linux/completion.h>
+ #include <linux/err.h>
+ #include <linux/i2c.h>
+@@ -71,9 +73,7 @@ struct bcm2835_debug {
+ struct bcm2835_i2c_dev {
+ 	struct device *dev;
+ 	void __iomem *regs;
+-	struct clk *clk;
+ 	int irq;
+-	u32 bus_clk_rate;
+ 	struct i2c_adapter adapter;
+ 	struct completion completion;
+ 	struct i2c_msg *curr_msg;
+@@ -164,12 +164,17 @@ static inline u32 bcm2835_i2c_readl(struct bcm2835_i2c_dev *i2c_dev, u32 reg)
+ 	return readl(i2c_dev->regs + reg);
+ }
+ 
+-static int bcm2835_i2c_set_divider(struct bcm2835_i2c_dev *i2c_dev)
+#define to_clk_bcm2835_i2c(_hw) container_of(_hw, struct clk_bcm2835_i2c, hw)
+struct clk_bcm2835_i2c {
+	struct clk_hw hw;
+	struct bcm2835_i2c_dev *i2c_dev;
+};
+
+static int clk_bcm2835_i2c_calc_divider(unsigned long rate,
+				unsigned long parent_rate)
+ {
+-	u32 divider, redl, fedl;
+	u32 divider = DIV_ROUND_UP(parent_rate, rate);
+ 
+-	divider = DIV_ROUND_UP(clk_get_rate(i2c_dev->clk),
+-			       i2c_dev->bus_clk_rate);
+ 	/*
+ 	 * Per the datasheet, the register is always interpreted as an even
+ 	 * number, by rounding down. In other words, the LSB is ignored. So,
+@@ -178,12 +183,23 @@ static int bcm2835_i2c_set_divider(struct bcm2835_i2c_dev *i2c_dev)
+ 	if (divider & 1)
+ 		divider++;
+ 	if ((divider < BCM2835_I2C_CDIV_MIN) ||
+-	    (divider > BCM2835_I2C_CDIV_MAX)) {
+-		dev_err_ratelimited(i2c_dev->dev, "Invalid clock-frequency\n");
+	    (divider > BCM2835_I2C_CDIV_MAX))
+ 		return -EINVAL;
+-	}
+ 
+-	bcm2835_i2c_writel(i2c_dev, BCM2835_I2C_DIV, divider);
+	return divider;
+}
+
+static int clk_bcm2835_i2c_set_rate(struct clk_hw *hw, unsigned long rate,
+				unsigned long parent_rate)
+{
+	struct clk_bcm2835_i2c *div = to_clk_bcm2835_i2c(hw);
+	u32 redl, fedl;
+	u32 divider = clk_bcm2835_i2c_calc_divider(rate, parent_rate);
+
+	if (divider == -EINVAL)
+		return -EINVAL;
+
+	bcm2835_i2c_writel(div->i2c_dev, BCM2835_I2C_DIV, divider);
+ 
+ 	/*
+ 	 * Number of core clocks to wait after falling edge before
+@@ -198,12 +214,62 @@ static int bcm2835_i2c_set_divider(struct bcm2835_i2c_dev *i2c_dev)
+ 	 */
+ 	redl = max(divider / 4, 1u);
+ 
+-	bcm2835_i2c_writel(i2c_dev, BCM2835_I2C_DEL,
+	bcm2835_i2c_writel(div->i2c_dev, BCM2835_I2C_DEL,
+ 			   (fedl << BCM2835_I2C_FEDL_SHIFT) |
+ 			   (redl << BCM2835_I2C_REDL_SHIFT));
+ 	return 0;
+ }
+ 
+static long clk_bcm2835_i2c_round_rate(struct clk_hw *hw, unsigned long rate,
+				unsigned long *parent_rate)
+{
+	u32 divider = clk_bcm2835_i2c_calc_divider(rate, *parent_rate);
+
+	return DIV_ROUND_UP(*parent_rate, divider);
+}
+
+static unsigned long clk_bcm2835_i2c_recalc_rate(struct clk_hw *hw,
+						unsigned long parent_rate)
+{
+	struct clk_bcm2835_i2c *div = to_clk_bcm2835_i2c(hw);
+	u32 divider = bcm2835_i2c_readl(div->i2c_dev, BCM2835_I2C_DIV);
+
+	return DIV_ROUND_UP(parent_rate, divider);
+}
+
+static const struct clk_ops clk_bcm2835_i2c_ops = {
+	.set_rate = clk_bcm2835_i2c_set_rate,
+	.round_rate = clk_bcm2835_i2c_round_rate,
+	.recalc_rate = clk_bcm2835_i2c_recalc_rate,
+};
+
+static struct clk *bcm2835_i2c_register_div(struct device *dev,
+					const char *mclk_name,
+					struct bcm2835_i2c_dev *i2c_dev)
+{
+	struct clk_init_data init;
+	struct clk_bcm2835_i2c *priv;
+	char name[32];
+
+	snprintf(name, sizeof(name), "%s_div", dev_name(dev));
+
+	init.ops = &clk_bcm2835_i2c_ops;
+	init.name = name;
+	init.parent_names = (const char* []) { mclk_name };
+	init.num_parents = 1;
+	init.flags = 0;
+
+	priv = devm_kzalloc(dev, sizeof(struct clk_bcm2835_i2c), GFP_KERNEL);
+	if (priv == NULL)
+		return ERR_PTR(-ENOMEM);
+
+	priv->hw.init = &init;
+	priv->i2c_dev = i2c_dev;
+
+	clk_hw_register_clkdev(&priv->hw, "div", dev_name(dev));
+	return devm_clk_register(dev, &priv->hw);
+}
+
+ static void bcm2835_fill_txfifo(struct bcm2835_i2c_dev *i2c_dev)
+ {
+ 	u32 val;
+@@ -363,7 +429,7 @@ static int bcm2835_i2c_xfer(struct i2c_adapter *adap, struct i2c_msg msgs[],
+ {
+ 	struct bcm2835_i2c_dev *i2c_dev = i2c_get_adapdata(adap);
+ 	unsigned long time_left;
+-	int i, ret;
+	int i;
+ 
+ 	if (debug)
+ 		i2c_dev->debug_num_msgs = num;
+@@ -379,10 +445,6 @@ static int bcm2835_i2c_xfer(struct i2c_adapter *adap, struct i2c_msg msgs[],
+ 			return -EOPNOTSUPP;
+ 		}
+ 
+-	ret = bcm2835_i2c_set_divider(i2c_dev);
+-	if (ret)
+-		return ret;
+-
+ 	i2c_dev->curr_msg = msgs;
+ 	i2c_dev->num_msgs = num;
+ 	reinit_completion(&i2c_dev->completion);
+@@ -443,6 +505,9 @@ static int bcm2835_i2c_probe(struct platform_device *pdev)
+ 	struct resource *mem, *irq;
+ 	int ret;
+ 	struct i2c_adapter *adap;
+	const char *mclk_name;
+	struct clk *bus_clk;
+	u32 bus_clk_rate;
+ 
+ 	i2c_dev = devm_kzalloc(&pdev->dev, sizeof(*i2c_dev), GFP_KERNEL);
+ 	if (!i2c_dev)
+@@ -456,21 +521,6 @@ static int bcm2835_i2c_probe(struct platform_device *pdev)
+ 	if (IS_ERR(i2c_dev->regs))
+ 		return PTR_ERR(i2c_dev->regs);
+ 
+-	i2c_dev->clk = devm_clk_get(&pdev->dev, NULL);
+-	if (IS_ERR(i2c_dev->clk)) {
+-		if (PTR_ERR(i2c_dev->clk) != -EPROBE_DEFER)
+-			dev_err(&pdev->dev, "Could not get clock\n");
+-		return PTR_ERR(i2c_dev->clk);
+-	}
+-
+-	ret = of_property_read_u32(pdev->dev.of_node, "clock-frequency",
+-				   &i2c_dev->bus_clk_rate);
+-	if (ret < 0) {
+-		dev_warn(&pdev->dev,
+-			 "Could not read clock-frequency property\n");
+-		i2c_dev->bus_clk_rate = 100000;
+-	}
+-
+ 	irq = platform_get_resource(pdev, IORESOURCE_IRQ, 0);
+ 	if (!irq) {
+ 		dev_err(&pdev->dev, "No IRQ resource\n");
+@@ -485,6 +535,35 @@ static int bcm2835_i2c_probe(struct platform_device *pdev)
+ 		return -ENODEV;
+ 	}
+ 
+	mclk_name = of_clk_get_parent_name(pdev->dev.of_node, 0);
+
+	bus_clk = bcm2835_i2c_register_div(&pdev->dev, mclk_name, i2c_dev);
+
+	if (IS_ERR(bus_clk)) {
+		dev_err(&pdev->dev, "Could not register clock\n");
+		return PTR_ERR(bus_clk);
+	}
+
+	ret = of_property_read_u32(pdev->dev.of_node, "clock-frequency",
+				   &bus_clk_rate);
+	if (ret < 0) {
+		dev_warn(&pdev->dev,
+			 "Could not read clock-frequency property\n");
+		bus_clk_rate = 100000;
+	}
+
+	ret = clk_set_rate_exclusive(bus_clk, bus_clk_rate);
+	if (ret < 0) {
+		dev_err(&pdev->dev, "Could not set clock frequency\n");
+		return ret;
+	}
+
+	ret = clk_prepare_enable(bus_clk);
+	if (ret) {
+		dev_err(&pdev->dev, "Couldn't prepare clock");
+		return ret;
+	}
+
+ 	adap = &i2c_dev->adapter;
+ 	i2c_set_adapdata(adap, i2c_dev);
+ 	adap->owner = THIS_MODULE;
+@@ -507,6 +586,10 @@ static int bcm2835_i2c_probe(struct platform_device *pdev)
+ static int bcm2835_i2c_remove(struct platform_device *pdev)
+ {
+ 	struct bcm2835_i2c_dev *i2c_dev = platform_get_drvdata(pdev);
+	struct clk *bus_clk = devm_clk_get(i2c_dev->dev, "div");
+
+	clk_rate_exclusive_put(bus_clk);
+	clk_disable_unprepare(bus_clk);
+ 
+ 	free_irq(i2c_dev->irq, i2c_dev);
+ 	i2c_del_adapter(&i2c_dev->adapter);
+-- 
+2.19.1
+
--- a/root/target/linux/generic/config-4.14
+++ b/root/target/linux/generic/config-4.14
@ -263,6 +263,7 @@ CONFIG_ARCH_MMAP_RND_COMPAT_BITS_MIN=8
 # CONFIG_ARCH_VT8500 is not set
 # CONFIG_ARCH_VULCAN is not set
 # CONFIG_ARCH_W90X900 is not set
+# CONFIG_ARCH_WANTS_THP_SWAP is not set
 # CONFIG_ARCH_WANTS_UBSAN_NO_NULL is not set
 # CONFIG_ARCH_WM8505 is not set
 # CONFIG_ARCH_WM8750 is not set
@ -273,6 +274,7 @@ CONFIG_ARCH_MMAP_RND_COMPAT_BITS_MIN=8
 # CONFIG_ARCH_ZYNQMP is not set
 # CONFIG_ARCNET is not set
 # CONFIG_ARC_EMAC is not set
+# CONFIG_ARM64_ERRATUM_1024718 is not set
 # CONFIG_ARM64_ERRATUM_819472 is not set
 # CONFIG_ARM64_ERRATUM_824069 is not set
 # CONFIG_ARM64_ERRATUM_826319 is not set
@ -283,6 +285,7 @@ CONFIG_ARCH_MMAP_RND_COMPAT_BITS_MIN=8
 # CONFIG_ARM64_ERRATUM_845719 is not set
 # CONFIG_ARM64_ERRATUM_858921 is not set
 # CONFIG_ARM64_RELOC_TEST is not set
+CONFIG_ARM64_SW_TTBR0_PAN=y
 # CONFIG_ARM_APPENDED_DTB is not set
 # CONFIG_ARM_ARCH_TIMER is not set
 # CONFIG_ARM_BIG_LITTLE_CPUFREQ is not set
@ -427,6 +430,7 @@ CONFIG_ATM_CLIP_NO_ICMP=y
 # CONFIG_BACKLIGHT_LV5207LP is not set
 # CONFIG_BACKLIGHT_PANDORA is not set
 # CONFIG_BACKLIGHT_PM8941_WLED is not set
+# CONFIG_BACKLIGHT_PWM is not set
 # CONFIG_BACKLIGHT_RPI is not set
 # CONFIG_BACKLIGHT_SAHARA is not set
 # CONFIG_BACKTRACE_SELF_TEST is not set
@ -592,9 +596,9 @@ CONFIG_BOOKE_WDT_DEFAULT_TIMEOUT=3
 # CONFIG_BOOT_PRINTK_DELAY is not set
 CONFIG_BOOT_RAW=y
 CONFIG_BPF=y
-# CONFIG_BPF_JIT is not set
+CONFIG_BPF_JIT=y
 # CONFIG_BPF_JIT_ALWAYS_ON is not set
-CONFIG_BPF_STREAM_PARSER=y
+# CONFIG_BPF_STREAM_PARSER is not set
 CONFIG_BPF_SYSCALL=y
 # CONFIG_BPQETHER is not set
 CONFIG_BQL=y
@ -626,7 +630,7 @@ CONFIG_BRIDGE=y
 CONFIG_BRIDGE_IGMP_SNOOPING=y
 # CONFIG_BRIDGE_NETFILTER is not set
 # CONFIG_BRIDGE_NF_EBTABLES is not set
-# CONFIG_BRIDGE_VLAN_FILTERING is not set
+CONFIG_BRIDGE_VLAN_FILTERING=y
 # CONFIG_BROADCOM_PHY is not set
 CONFIG_BROKEN_ON_SMP=y
 # CONFIG_BSD_DISKLABEL is not set
@ -725,11 +729,14 @@ CONFIG_CC_STACKPROTECTOR_NONE=y
 # CONFIG_CDROM_PKTCDVD is not set
 # CONFIG_CEPH_FS is not set
 # CONFIG_CEPH_LIB is not set
+# CONFIG_CFQ_GROUP_IOSCHED is not set
 # CONFIG_CFG80211 is not set
 # CONFIG_CFG80211_CERTIFICATION_ONUS is not set
 # CONFIG_CGROUPS is not set
 # CONFIG_CGROUP_BPF is not set
 # CONFIG_CGROUP_DEBUG is not set
+# CONFIG_CGROUP_HUGETLB is not set
+# CONFIG_CGROUP_NET_CLASSID is not set
 # CONFIG_CGROUP_NET_PRIO is not set
 # CONFIG_CGROUP_RDMA is not set
 # CONFIG_CHARGER_BQ2415X is not set
@ -761,7 +768,7 @@ CONFIG_CC_STACKPROTECTOR_NONE=y
 # CONFIG_CICADA_PHY is not set
 # CONFIG_CIFS is not set
 # CONFIG_CIFS_ACL is not set
-# CONFIG_CIFS_ALLOW_INSECURE_LEGACY is not set
+CONFIG_CIFS_ALLOW_INSECURE_LEGACY=y
 # CONFIG_CIFS_DEBUG is not set
 # CONFIG_CIFS_DEBUG2 is not set
 # CONFIG_CIFS_FSCACHE is not set
@ -809,9 +816,12 @@ CONFIG_CMDLINE=""
 # CONFIG_COMMON_CLK_SI5351 is not set
 # CONFIG_COMMON_CLK_SI570 is not set
 # CONFIG_COMMON_CLK_VC5 is not set
+# CONFIG_COMMON_CLK_VERSATILE is not set
+# CONFIG_COMMON_CLK_XGENE is not set
 # CONFIG_COMMON_CLK_XLNX_CLKWZRD is not set
-# CONFIG_COMPACTION is not set
+CONFIG_COMPACTION=y
 # CONFIG_COMPAL_LAPTOP is not set
+# CONFIG_COMPAT is not set
 # CONFIG_COMPAT_BRK is not set
 # CONFIG_COMPILE_TEST is not set
 # CONFIG_CONFIGFS_FS is not set
@ -855,7 +865,6 @@ CONFIG_CRC32_SARWATE=y
 # CONFIG_CRC8 is not set
 # CONFIG_CRC_CCITT is not set
 # CONFIG_CRC_ITU_T is not set
-# CONFIG_CRC_PMIC_OPREGION is not set
 # CONFIG_CRC_T10DIF is not set
 CONFIG_CROSS_COMPILE=""
 # CONFIG_CROSS_MEMORY_ATTACH is not set
@ -895,6 +904,8 @@ CONFIG_CRYPTO_BLKCIPHER2=y
 # CONFIG_CRYPTO_DEFLATE is not set
 # CONFIG_CRYPTO_DES is not set
 # CONFIG_CRYPTO_DEV_ATMEL_AES is not set
+# CONFIG_CRYPTO_DEV_ATMEL_AUTHENC is not set
+# CONFIG_CRYPTO_DEV_ATMEL_ECC is not set
 # CONFIG_CRYPTO_DEV_ATMEL_SHA is not set
 # CONFIG_CRYPTO_DEV_ATMEL_TDES is not set
 # CONFIG_CRYPTO_DEV_CAVIUM_ZIP is not set
@ -906,6 +917,7 @@ CONFIG_CRYPTO_BLKCIPHER2=y
 # CONFIG_CRYPTO_DEV_IMGTEC_HASH is not set
 # CONFIG_CRYPTO_DEV_MARVELL_CESA is not set
 # CONFIG_CRYPTO_DEV_MV_CESA is not set
+# CONFIG_CRYPTO_DEV_MXC_SCC is not set
 # CONFIG_CRYPTO_DEV_MXS_DCP is not set
 # CONFIG_CRYPTO_DEV_NITROX_CNN55XX is not set
 # CONFIG_CRYPTO_DEV_QAT_C3XXX is not set
@ -915,6 +927,8 @@ CONFIG_CRYPTO_BLKCIPHER2=y
 # CONFIG_CRYPTO_DEV_QAT_DH895xCC is not set
 # CONFIG_CRYPTO_DEV_QAT_DH895xCCVF is not set
 # CONFIG_CRYPTO_DEV_QCE is not set
+# CONFIG_CRYPTO_DEV_S5P is not set
+# CONFIG_CRYPTO_DEV_SAFEXCEL is not set
 # CONFIG_CRYPTO_DEV_SAHARA is not set
 # CONFIG_CRYPTO_DEV_TALITOS is not set
 # CONFIG_CRYPTO_DEV_VIRTIO is not set
@ -1041,12 +1055,10 @@ CONFIG_DEBUG_KERNEL=y
 # CONFIG_DEBUG_PINCTRL is not set
 # CONFIG_DEBUG_PI_LIST is not set
 # CONFIG_DEBUG_PREEMPT is not set
-# CONFIG_DEBUG_RODATA is not set
 # CONFIG_DEBUG_RODATA_TEST is not set
 # CONFIG_DEBUG_RT_MUTEXES is not set
 # CONFIG_DEBUG_SECTION_MISMATCH is not set
 # CONFIG_DEBUG_SEMIHOSTING is not set
-# CONFIG_DEBUG_SET_MODULE_RONX is not set
 # CONFIG_DEBUG_SG is not set
 # CONFIG_DEBUG_SHIRQ is not set
 # CONFIG_DEBUG_SLAB is not set
@ -1065,15 +1077,16 @@ CONFIG_DEBUG_KERNEL=y
 # CONFIG_DEBUG_WX is not set
 # CONFIG_DEBUG_ZBOOT is not set
 # CONFIG_DECNET is not set
+CONFIG_DEFAULT_CUBIC=y
 CONFIG_DEFAULT_DEADLINE=y
 CONFIG_DEFAULT_HOSTNAME="(none)"
 CONFIG_DEFAULT_IOSCHED="deadline"
 CONFIG_DEFAULT_MMAP_MIN_ADDR=4096
-# CONFIG_DEFAULT_CFQ is not set
 # CONFIG_DEFAULT_NOOP is not set
 # CONFIG_DEFAULT_RENO is not set
 CONFIG_DEFAULT_SECURITY=""
 CONFIG_DEFAULT_SECURITY_DAC=y
+CONFIG_DEFAULT_TCP_CONG="cubic"
 CONFIG_DEFCONFIG_LIST="/lib/modules/$UNAME_RELEASE/.config"
 # CONFIG_DELL_LAPTOP is not set
 # CONFIG_DELL_RBTN is not set
@ -1113,7 +1126,9 @@ CONFIG_DEVPORT=y
 # CONFIG_DMA_API_DEBUG is not set
 # CONFIG_DMA_ENGINE is not set
 # CONFIG_DMA_FENCE_TRACE is not set
+# CONFIG_DMA_NOOP_OPS is not set
 # CONFIG_DMA_SHARED_BUFFER is not set
+# CONFIG_DMA_VIRT_OPS is not set
 # CONFIG_DM_CACHE is not set
 # CONFIG_DM_DEBUG is not set
 # CONFIG_DM_DELAY is not set
@ -1141,6 +1156,11 @@ CONFIG_DQL=y
 # CONFIG_DRAGONRISE_FF is not set
 # CONFIG_DRM is not set
 # CONFIG_DRM_AMDGPU is not set
+# CONFIG_DRM_AMDGPU_CIK is not set
+# CONFIG_DRM_AMDGPU_GART_DEBUGFS is not set
+# CONFIG_DRM_AMDGPU_SI is not set
+# CONFIG_DRM_AMDGPU_USERPTR is not set
+# CONFIG_DRM_AMD_ACP is not set
 # CONFIG_DRM_ANALOGIX_ANX78XX is not set
 # CONFIG_DRM_ARCPGU is not set
 # CONFIG_DRM_ARMADA is not set
@ -1156,6 +1176,7 @@ CONFIG_DQL=y
 # CONFIG_DRM_EXYNOS is not set
 # CONFIG_DRM_FBDEV_EMULATION is not set
 # CONFIG_DRM_FSL_DCU is not set
+# CONFIG_DRM_GMA500 is not set
 # CONFIG_DRM_HDLCD is not set
 # CONFIG_DRM_HISI_HIBMC is not set
 # CONFIG_DRM_HISI_KIRIN is not set
@ -1163,7 +1184,9 @@ CONFIG_DQL=y
 # CONFIG_DRM_I2C_CH7006 is not set
 # CONFIG_DRM_I2C_NXP_TDA998X is not set
 # CONFIG_DRM_I2C_SIL164 is not set
+# CONFIG_DRM_I915 is not set
 # CONFIG_DRM_LEGACY is not set
+# CONFIG_DRM_LIB_RANDOM is not set
 # CONFIG_DRM_LOAD_EDID_FIRMWARE is not set
 # CONFIG_DRM_LVDS_ENCODER is not set
 # CONFIG_DRM_MALI_DISPLAY is not set
@ -1173,23 +1196,29 @@ CONFIG_DQL=y
 # CONFIG_DRM_NOUVEAU is not set
 # CONFIG_DRM_NXP_PTN3460 is not set
 # CONFIG_DRM_OMAP is not set
+# CONFIG_DRM_PANEL_INNOLUX_P079ZCA is not set
 # CONFIG_DRM_PANEL_JDI_LT070ME05000 is not set
 # CONFIG_DRM_PANEL_LG_LG4573 is not set
+# CONFIG_DRM_PANEL_LVDS is not set
 # CONFIG_DRM_PANEL_PANASONIC_VVX10F034N00 is not set
 # CONFIG_DRM_PANEL_RASPBERRYPI_TOUCHSCREEN is not set
 # CONFIG_DRM_PANEL_SAMSUNG_LD9040 is not set
+# CONFIG_DRM_PANEL_SAMSUNG_S6E3HA2 is not set
 # CONFIG_DRM_PANEL_SAMSUNG_S6E8AA0 is not set
 # CONFIG_DRM_PANEL_SHARP_LQ101R1SX01 is not set
 # CONFIG_DRM_PANEL_SHARP_LS043T1LE01 is not set
+# CONFIG_DRM_PANEL_SITRONIX_ST7789V is not set
 # CONFIG_DRM_PARADE_PS8622 is not set
 # CONFIG_DRM_PL111 is not set
 # CONFIG_DRM_QXL is not set
 # CONFIG_DRM_RADEON is not set
+# CONFIG_DRM_RADEON_USERPTR is not set
 # CONFIG_DRM_RCAR_DW_HDMI is not set
 # CONFIG_DRM_SII902X is not set
 # CONFIG_DRM_SIL_SII8620 is not set
 # CONFIG_DRM_STI is not set
 # CONFIG_DRM_STM is not set
+# CONFIG_DRM_SUN4I is not set
 # CONFIG_DRM_TILCDC is not set
 # CONFIG_DRM_TINYDRM is not set
 # CONFIG_DRM_TI_TFP410 is not set
@ -1197,6 +1226,8 @@ CONFIG_DQL=y
 # CONFIG_DRM_UDL is not set
 # CONFIG_DRM_VBOXVIDEO is not set
 # CONFIG_DRM_VGEM is not set
+# CONFIG_DRM_VIRTIO_GPU is not set
+# CONFIG_DRM_VMWGFX is not set
 # CONFIG_DS1682 is not set
 # CONFIG_DS1803 is not set
 # CONFIG_DST_CACHE is not set
@ -1265,7 +1296,7 @@ CONFIG_ETHERNET=y
 # CONFIG_ETHOC is not set
 CONFIG_EVENTFD=y
 CONFIG_EXPERT=y
-# CONFIG_EXPORTFS is not set
+CONFIG_EXPORTFS=y
 # CONFIG_EXPORTFS_BLOCK_OPS is not set
 # CONFIG_EXT2_FS is not set
 # CONFIG_EXT2_FS_XATTR is not set
@ -1302,7 +1333,7 @@ CONFIG_EXTRA_TARGETS=""
 CONFIG_FAT_DEFAULT_CODEPAGE=437
 CONFIG_FAT_DEFAULT_IOCHARSET="iso8859-1"
 # CONFIG_FAT_DEFAULT_UTF8 is not set
-CONFIG_FAT_FS=y
+# CONFIG_FAT_FS is not set
 # CONFIG_FAULT_INJECTION is not set
 # CONFIG_FB is not set
 # CONFIG_FB_3DFX is not set
@ -1327,6 +1358,7 @@ CONFIG_FAT_FS=y
 # CONFIG_FB_CYBER2000 is not set
 # CONFIG_FB_DA8XX is not set
 # CONFIG_FB_DDC is not set
+# CONFIG_FB_FLEX is not set
 # CONFIG_FB_FOREIGN_ENDIAN is not set
 # CONFIG_FB_GEODE is not set
 # CONFIG_FB_GOLDFISH is not set
@ -1372,6 +1404,39 @@ CONFIG_FB_NOTIFY=y
 # CONFIG_FB_SYS_FOPS is not set
 # CONFIG_FB_SYS_IMAGEBLIT is not set
 # CONFIG_FB_TFT is not set
+# CONFIG_FB_TFT_AGM1264K_FL is not set
+# CONFIG_FB_TFT_BD663474 is not set
+# CONFIG_FB_TFT_FBTFT_DEVICE is not set
+# CONFIG_FB_TFT_HX8340BN is not set
+# CONFIG_FB_TFT_HX8347D is not set
+# CONFIG_FB_TFT_HX8353D is not set
+# CONFIG_FB_TFT_HX8357D is not set
+# CONFIG_FB_TFT_ILI9163 is not set
+# CONFIG_FB_TFT_ILI9320 is not set
+# CONFIG_FB_TFT_ILI9325 is not set
+# CONFIG_FB_TFT_ILI9340 is not set
+# CONFIG_FB_TFT_ILI9341 is not set
+# CONFIG_FB_TFT_ILI9481 is not set
+# CONFIG_FB_TFT_ILI9486 is not set
+# CONFIG_FB_TFT_PCD8544 is not set
+# CONFIG_FB_TFT_RA8875 is not set
+# CONFIG_FB_TFT_S6D02A1 is not set
+# CONFIG_FB_TFT_S6D1121 is not set
+# CONFIG_FB_TFT_SH1106 is not set
+# CONFIG_FB_TFT_SSD1289 is not set
+# CONFIG_FB_TFT_SSD1305 is not set
+# CONFIG_FB_TFT_SSD1306 is not set
+# CONFIG_FB_TFT_SSD1325 is not set
+# CONFIG_FB_TFT_SSD1331 is not set
+# CONFIG_FB_TFT_SSD1351 is not set
+# CONFIG_FB_TFT_ST7735R is not set
+# CONFIG_FB_TFT_ST7789V is not set
+# CONFIG_FB_TFT_TINYLCD is not set
+# CONFIG_FB_TFT_TLS8204 is not set
+# CONFIG_FB_TFT_UC1611 is not set
+# CONFIG_FB_TFT_UC1701 is not set
+# CONFIG_FB_TFT_UPD161704 is not set
+# CONFIG_FB_TFT_WATTEROTT is not set
 # CONFIG_FB_TILEBLITTING is not set
 # CONFIG_FB_TMIO is not set
 # CONFIG_FB_TRIDENT is not set
@ -1439,6 +1504,7 @@ CONFIG_FSNOTIFY=y
 # CONFIG_FUSION_SAS is not set
 # CONFIG_FUSION_SPI is not set
 CONFIG_FUTEX=y
+CONFIG_FUTEX_PI=y
 # CONFIG_FW_CFG_SYSFS is not set
 CONFIG_FW_LOADER=y
 CONFIG_FW_LOADER_USER_HELPER=y
@ -1531,8 +1597,8 @@ CONFIG_GENERIC_NET_UTILS=y
 # CONFIG_HAMACHI is not set
 # CONFIG_HAMRADIO is not set
 # CONFIG_HAPPYMEAL is not set
-# CONFIG_HARDENED_USERCOPY is not set
-# CONFIG_HARDEN_BRANCH_PREDICTOR is not set
+CONFIG_HARDENED_USERCOPY=y
+# CONFIG_HARDENED_USERCOPY_PAGESPAN is not set
 # CONFIG_HARDLOCKUP_DETECTOR is not set
 # CONFIG_HAVE_AOUT is not set
 CONFIG_HAVE_ARCH_HARDENED_USERCOPY=y
@ -1701,10 +1767,12 @@ CONFIG_HW_PERF_EVENTS=y
 # CONFIG_HW_RANDOM is not set
 # CONFIG_HW_RANDOM_AMD is not set
 # CONFIG_HW_RANDOM_ATMEL is not set
+# CONFIG_HW_RANDOM_CAVIUM is not set
 # CONFIG_HW_RANDOM_EXYNOS is not set
 # CONFIG_HW_RANDOM_GEODE is not set
 # CONFIG_HW_RANDOM_INTEL is not set
 # CONFIG_HW_RANDOM_IPROC_RNG200 is not set
+# CONFIG_HW_RANDOM_OMAP is not set
 # CONFIG_HW_RANDOM_OMAP3_ROM is not set
 # CONFIG_HW_RANDOM_PPC4XX is not set
 # CONFIG_HW_RANDOM_TIMERIOMEM is not set
@ -1788,6 +1856,7 @@ CONFIG_HZ_100=y
 # CONFIG_I2C_RCAR is not set
 # CONFIG_I2C_RK3X is not set
 # CONFIG_I2C_ROBOTFUZZ_OSIF is not set
+# CONFIG_I2C_S3C2410 is not set
 # CONFIG_I2C_SCMI is not set
 # CONFIG_I2C_SH_MOBILE is not set
 # CONFIG_I2C_SIMTEC is not set
@ -1920,6 +1989,7 @@ CONFIG_INOTIFY_USER=y
 # CONFIG_INPUT_ATI_REMOTE2 is not set
 # CONFIG_INPUT_ATLAS_BTNS is not set
 # CONFIG_INPUT_ATMEL_CAPTOUCH is not set
+# CONFIG_INPUT_AXP20X_PEK is not set
 # CONFIG_INPUT_BMA150 is not set
 # CONFIG_INPUT_CM109 is not set
 # CONFIG_INPUT_CMA3000 is not set
@ -1944,6 +2014,7 @@ CONFIG_INOTIFY_USER=y
 # CONFIG_INPUT_KXTJ9 is not set
 # CONFIG_INPUT_LEDS is not set
 # CONFIG_INPUT_MATRIXKMAP is not set
+# CONFIG_INPUT_MAX8997_HAPTIC is not set
 CONFIG_INPUT_MISC=y
 # CONFIG_INPUT_MMA8450 is not set
 # CONFIG_INPUT_MOUSE is not set
@ -2211,10 +2282,12 @@ CONFIG_KERNFS=y
 # CONFIG_KEYBOARD_SAMSUNG is not set
 # CONFIG_KEYBOARD_SH_KEYSC is not set
 # CONFIG_KEYBOARD_SNVS_PWRKEY is not set
+# CONFIG_KEYBOARD_STMPE is not set
 # CONFIG_KEYBOARD_STOWAWAY is not set
 # CONFIG_KEYBOARD_SUNKBD is not set
 # CONFIG_KEYBOARD_TCA6416 is not set
 # CONFIG_KEYBOARD_TCA8418 is not set
+# CONFIG_KEYBOARD_TEGRA is not set
 # CONFIG_KEYBOARD_TM2_TOUCHKEY is not set
 # CONFIG_KEYBOARD_TWL4030 is not set
 # CONFIG_KEYBOARD_XTKBD is not set
@ -2260,9 +2333,9 @@ CONFIG_LBDAF=y
 # CONFIG_LCD_S6E63M0 is not set
 # CONFIG_LCD_TDO24M is not set
 # CONFIG_LCD_VGG2432A4 is not set
+CONFIG_LDISC_AUTOLOAD=y
 # CONFIG_LDM_PARTITION is not set
 CONFIG_LD_DEAD_CODE_DATA_ELIMINATION=y
-CONFIG_LDISC_AUTOLOAD=y
 # CONFIG_LEDS_BCM6328 is not set
 # CONFIG_LEDS_BCM6358 is not set
 # CONFIG_LEDS_BD2802 is not set
@ -2621,6 +2694,7 @@ CONFIG_MISC_FILESYSTEMS=y
 # CONFIG_MMC_BLOCK is not set
 CONFIG_MMC_BLOCK_BOUNCE=y
 CONFIG_MMC_BLOCK_MINORS=8
+# CONFIG_MMC_CAVIUM_THUNDERX is not set
 # CONFIG_MMC_CB710 is not set
 # CONFIG_MMC_DEBUG is not set
 # CONFIG_MMC_DW is not set
@ -2640,6 +2714,7 @@ CONFIG_MMC_BLOCK_MINORS=8
 # CONFIG_MMC_SDHCI_OF_HLWD is not set
 # CONFIG_MMC_SDHCI_PXAV2 is not set
 # CONFIG_MMC_SDHCI_PXAV3 is not set
+# CONFIG_MMC_SDHCI_S3C is not set
 # CONFIG_MMC_SDHCI_XENON is not set
 # CONFIG_MMC_SDRICOH_CS is not set
 # CONFIG_MMC_SPI is not set
@ -3154,7 +3229,6 @@ CONFIG_NFS_V3=y
 # CONFIG_NFT_SET_BITMAP is not set
 # CONFIG_NF_CONNTRACK is not set
 # CONFIG_NF_CONNTRACK_AMANDA is not set
-CONFIG_NF_CONNTRACK_CUSTOM=2
 # CONFIG_NF_CONNTRACK_EVENTS is not set
 # CONFIG_NF_CONNTRACK_FTP is not set
 # CONFIG_NF_CONNTRACK_H323 is not set
@ -3283,6 +3357,7 @@ CONFIG_NMI_LOG_BUF_SHIFT=13
 # CONFIG_NTP_PPS is not set
 # CONFIG_NVM is not set
 # CONFIG_NVMEM is not set
+# CONFIG_NVMEM_BCM_OCOTP is not set
 # CONFIG_NVMEM_IMX_OCOTP is not set
 # CONFIG_NVME_FC is not set
 # CONFIG_NVME_TARGET is not set
@ -3306,7 +3381,7 @@ CONFIG_NMI_LOG_BUF_SHIFT=13
 # CONFIG_OPROFILE is not set
 # CONFIG_OPROFILE_EVENT_MULTIPLEX is not set
 # CONFIG_OPT3001 is not set
-CONFIG_OPTIMIZE_INLINING=y
+# CONFIG_OPTIMIZE_INLINING is not set
 # CONFIG_ORANGEFS_FS is not set
 # CONFIG_ORION_WATCHDOG is not set
 # CONFIG_OSF_PARTITION is not set
@ -3411,6 +3486,7 @@ CONFIG_PARTITION_ADVANCED=y
 # CONFIG_PCIE_DW_PLAT is not set
 # CONFIG_PCIE_ECRC is not set
 # CONFIG_PCIE_IPROC is not set
+# CONFIG_PCIE_KIRIN is not set
 # CONFIG_PCIE_PTM is not set
 # CONFIG_PCIPCWATCHDOG is not set
 # CONFIG_PCI_ATMEL is not set
@ -3421,6 +3497,7 @@ CONFIG_PARTITION_ADVANCED=y
 # CONFIG_PCI_ENDPOINT_TEST is not set
 # CONFIG_PCI_FTPCI100 is not set
 # CONFIG_PCI_HERMES is not set
+# CONFIG_PCI_HISI is not set
 # CONFIG_PCI_HOST_GENERIC is not set
 # CONFIG_PCI_HOST_THUNDER_ECAM is not set
 # CONFIG_PCI_HOST_THUNDER_PEM is not set
@ -3434,6 +3511,7 @@ CONFIG_PCI_QUIRKS=y
 # CONFIG_PCI_STUB is not set
 # CONFIG_PCI_SW_SWITCHTEC is not set
 CONFIG_PCI_SYSCALL=y
+# CONFIG_PCI_XGENE is not set
 # CONFIG_PCMCIA is not set
 # CONFIG_PCMCIA_3C574 is not set
 # CONFIG_PCMCIA_3C589 is not set
@ -3477,6 +3555,7 @@ CONFIG_PCI_SYSCALL=y
 # CONFIG_PHY_PXA_28NM_USB2 is not set
 # CONFIG_PHY_QCOM_DWC3 is not set
 # CONFIG_PHY_SAMSUNG_USB2 is not set
+# CONFIG_PHY_XGENE is not set
 # CONFIG_PI433 is not set
 # CONFIG_PID_IN_CONTEXTIDR is not set
 # CONFIG_PID_NS is not set
@ -3995,7 +4074,7 @@ CONFIG_SCSI_PROC_FS=y
 CONFIG_SECTION_MISMATCH_WARN_ONLY=y
 # CONFIG_SECURITY is not set
 # CONFIG_SECURITYFS is not set
-# CONFIG_SECURITY_DMESG_RESTRICT is not set
+CONFIG_SECURITY_DMESG_RESTRICT=y
 CONFIG_SELECT_MEMORY_MODEL=y
 # CONFIG_SENSORS_ABITUGURU is not set
 # CONFIG_SENSORS_ABITUGURU3 is not set
@ -4172,6 +4251,7 @@ CONFIG_SELECT_MEMORY_MODEL=y
 # CONFIG_SENSORS_W83L785TS is not set
 # CONFIG_SENSORS_W83L786NG is not set
 # CONFIG_SENSORS_XGENE is not set
+# CONFIG_SENSORS_ZL6100 is not set
 CONFIG_SERIAL_8250=y
 # CONFIG_SERIAL_8250_ACCENT is not set
 # CONFIG_SERIAL_8250_ASPEED_VUART is not set
@ -4492,6 +4572,7 @@ CONFIG_SND_PROC_FS=y
 # CONFIG_SND_SOC_FSL_SPDIF is not set
 # CONFIG_SND_SOC_FSL_SSI is not set
 # CONFIG_SND_SOC_GTM601 is not set
+# CONFIG_SND_SOC_ICS43432 is not set
 # CONFIG_SND_SOC_IMG is not set
 # CONFIG_SND_SOC_IMX_AUDMUX is not set
 # CONFIG_SND_SOC_IMX_ES8328 is not set
@ -4671,6 +4752,7 @@ CONFIG_SND_X86=y
 # CONFIG_SPI_PXA2XX is not set
 # CONFIG_SPI_PXA2XX_PCI is not set
 # CONFIG_SPI_ROCKCHIP is not set
+# CONFIG_SPI_S3C64XX is not set
 # CONFIG_SPI_SC18IS602 is not set
 # CONFIG_SPI_SLAVE is not set
 # CONFIG_SPI_SPIDEV is not set
@ -4689,7 +4771,7 @@ CONFIG_SQUASHFS=y
 # CONFIG_SQUASHFS_DECOMP_MULTI is not set
 CONFIG_SQUASHFS_DECOMP_MULTI_PERCPU=y
 # CONFIG_SQUASHFS_DECOMP_SINGLE is not set
-# CONFIG_SQUASHFS_EMBEDDED is not set
+CONFIG_SQUASHFS_EMBEDDED=y
 # CONFIG_SQUASHFS_FILE_CACHE is not set
 CONFIG_SQUASHFS_FILE_DIRECT=y
 CONFIG_SQUASHFS_FRAGMENT_CACHE_SIZE=3
@ -4752,12 +4834,12 @@ CONFIG_STRIP_ASM_SYMS=y
 # CONFIG_SURFACE_3_BUTTON is not set
 # CONFIG_SUSPEND is not set
 # CONFIG_SUSPEND_SKIP_SYNC is not set
-# CONFIG_SW_SYNC is not set
 CONFIG_SWAP=y
 # CONFIG_SWCONFIG is not set
 # CONFIG_SWCONFIG_B53 is not set
 # CONFIG_SWCONFIG_B53_SPI_DRIVER is not set
 # CONFIG_SWCONFIG_LEDS is not set
+# CONFIG_SW_SYNC is not set
 # CONFIG_SX9500 is not set
 # CONFIG_SXGBE_ETH is not set
 # CONFIG_SYNCLINK_CS is not set
@ -4804,7 +4886,7 @@ CONFIG_SYSVIPC_SYSCTL=y
 # CONFIG_TCG_XEN is not set
 # CONFIG_TCIC is not set
 CONFIG_TCP_CONG_ADVANCED=y
-CONFIG_TCP_CONG_BBR=y
+# CONFIG_TCP_CONG_BBR is not set
 # CONFIG_TCP_CONG_BIC is not set
 # CONFIG_TCP_CONG_CDG is not set
 CONFIG_TCP_CONG_CUBIC=y
@ -4864,6 +4946,7 @@ CONFIG_TEXTSEARCH=y
 # CONFIG_THERMAL_HWMON is not set
 # CONFIG_THERMAL_WRITABLE_TRIPS is not set
 # CONFIG_THINKPAD_ACPI is not set
+CONFIG_THIN_ARCHIVES=y
 # CONFIG_THRUSTMASTER_FF is not set
 # CONFIG_THUNDERBOLT is not set
 # CONFIG_THUNDER_NIC_BGX is not set
@ -4910,6 +4993,7 @@ CONFIG_TMPFS_XATTR=y
 # CONFIG_TOPSTAR_LAPTOP is not set
 # CONFIG_TORTURE_TEST is not set
 # CONFIG_TOSHIBA_HAPS is not set
+# CONFIG_TOUCHSCREEN_88PM860X is not set
 # CONFIG_TOUCHSCREEN_AD7877 is not set
 # CONFIG_TOUCHSCREEN_AD7879 is not set
 # CONFIG_TOUCHSCREEN_AD7879_I2C is not set
@ -4917,12 +5001,20 @@ CONFIG_TMPFS_XATTR=y
 # CONFIG_TOUCHSCREEN_ADS7846 is not set
 # CONFIG_TOUCHSCREEN_AR1021_I2C is not set
 # CONFIG_TOUCHSCREEN_ATMEL_MXT is not set
+# CONFIG_TOUCHSCREEN_ATMEL_MXT_T37 is not set
 # CONFIG_TOUCHSCREEN_AUO_PIXCIR is not set
 # CONFIG_TOUCHSCREEN_BU21013 is not set
 # CONFIG_TOUCHSCREEN_CHIPONE_ICN8318 is not set
+# CONFIG_TOUCHSCREEN_COLIBRI_VF50 is not set
 # CONFIG_TOUCHSCREEN_CY8CTMG110 is not set
 # CONFIG_TOUCHSCREEN_CYTTSP4_CORE is not set
+# CONFIG_TOUCHSCREEN_CYTTSP4_I2C is not set
+# CONFIG_TOUCHSCREEN_CYTTSP4_SPI is not set
 # CONFIG_TOUCHSCREEN_CYTTSP_CORE is not set
+# CONFIG_TOUCHSCREEN_CYTTSP_I2C is not set
+# CONFIG_TOUCHSCREEN_CYTTSP_SPI is not set
+# CONFIG_TOUCHSCREEN_DA9034 is not set
+# CONFIG_TOUCHSCREEN_DA9052 is not set
 # CONFIG_TOUCHSCREEN_DYNAPRO is not set
 # CONFIG_TOUCHSCREEN_EDT_FT5X06 is not set
 # CONFIG_TOUCHSCREEN_EETI is not set
@ -4931,50 +5023,89 @@ CONFIG_TMPFS_XATTR=y
 # CONFIG_TOUCHSCREEN_EKTF2127 is not set
 # CONFIG_TOUCHSCREEN_ELAN is not set
 # CONFIG_TOUCHSCREEN_ELO is not set
-# CONFIG_TOUCHSCREEN_EXC3000 is not set
-# CONFIG_TOUCHSCREEN_FT6236 is not set
 # CONFIG_TOUCHSCREEN_FUJITSU is not set
 # CONFIG_TOUCHSCREEN_GOODIX is not set
 # CONFIG_TOUCHSCREEN_GUNZE is not set
 # CONFIG_TOUCHSCREEN_HAMPSHIRE is not set
+# CONFIG_TOUCHSCREEN_HP600 is not set
+# CONFIG_TOUCHSCREEN_HP7XX is not set
 # CONFIG_TOUCHSCREEN_HTCPEN is not set
 # CONFIG_TOUCHSCREEN_ILI210X is not set
 # CONFIG_TOUCHSCREEN_IMX6UL_TSC is not set
 # CONFIG_TOUCHSCREEN_INEXIO is not set
+# CONFIG_TOUCHSCREEN_IPAQ_MICRO is not set
+# CONFIG_TOUCHSCREEN_IPROC is not set
+# CONFIG_TOUCHSCREEN_LPC32XX is not set
 # CONFIG_TOUCHSCREEN_MAX11801 is not set
+# CONFIG_TOUCHSCREEN_MC13783 is not set
 # CONFIG_TOUCHSCREEN_MCS5000 is not set
 # CONFIG_TOUCHSCREEN_MELFAS_MIP4 is not set
+# CONFIG_TOUCHSCREEN_MIGOR is not set
 # CONFIG_TOUCHSCREEN_MK712 is not set
 # CONFIG_TOUCHSCREEN_MMS114 is not set
 # CONFIG_TOUCHSCREEN_MTOUCH is not set
+# CONFIG_TOUCHSCREEN_MX25 is not set
+# CONFIG_TOUCHSCREEN_MXS_LRADC is not set
+# CONFIG_TOUCHSCREEN_PCAP is not set
 # CONFIG_TOUCHSCREEN_PENMOUNT is not set
 # CONFIG_TOUCHSCREEN_PIXCIR is not set
+# CONFIG_TOUCHSCREEN_PROPERTIES is not set
 # CONFIG_TOUCHSCREEN_RM_TS is not set
 # CONFIG_TOUCHSCREEN_ROHM_BU21023 is not set
-# CONFIG_TOUCHSCREEN_RPI_FT5406 is not set
 # CONFIG_TOUCHSCREEN_S3C2410 is not set
 # CONFIG_TOUCHSCREEN_SILEAD is not set
 # CONFIG_TOUCHSCREEN_SIS_I2C is not set
 # CONFIG_TOUCHSCREEN_ST1232 is not set
 # CONFIG_TOUCHSCREEN_STMFTS is not set
+# CONFIG_TOUCHSCREEN_STMPE is not set
+# CONFIG_TOUCHSCREEN_SUN4I is not set
 # CONFIG_TOUCHSCREEN_SUR40 is not set
 # CONFIG_TOUCHSCREEN_SURFACE3_SPI is not set
 # CONFIG_TOUCHSCREEN_SX8654 is not set
-# CONFIG_TOUCHSCREEN_SYNAPTICS_I2C_RMI4 is not set
+# CONFIG_TOUCHSCREEN_TI_AM335X_TSC is not set
 # CONFIG_TOUCHSCREEN_TOUCHIT213 is not set
 # CONFIG_TOUCHSCREEN_TOUCHRIGHT is not set
 # CONFIG_TOUCHSCREEN_TOUCHWIN is not set
 # CONFIG_TOUCHSCREEN_TPS6507X is not set
+# CONFIG_TOUCHSCREEN_TS4800 is not set
 # CONFIG_TOUCHSCREEN_TSC2004 is not set
 # CONFIG_TOUCHSCREEN_TSC2005 is not set
 # CONFIG_TOUCHSCREEN_TSC2007 is not set
+# CONFIG_TOUCHSCREEN_TSC2007_IIO is not set
+# CONFIG_TOUCHSCREEN_TSC200X_CORE is not set
 # CONFIG_TOUCHSCREEN_TSC_SERIO is not set
+# CONFIG_TOUCHSCREEN_UCB1400 is not set
+# CONFIG_TOUCHSCREEN_USB_3M is not set
 # CONFIG_TOUCHSCREEN_USB_COMPOSITE is not set
+# CONFIG_TOUCHSCREEN_USB_DMC_TSC10 is not set
+# CONFIG_TOUCHSCREEN_USB_E2I is not set
+# CONFIG_TOUCHSCREEN_USB_EASYTOUCH is not set
+# CONFIG_TOUCHSCREEN_USB_EGALAX is not set
+# CONFIG_TOUCHSCREEN_USB_ELO is not set
+# CONFIG_TOUCHSCREEN_USB_ETT_TC45USB is not set
+# CONFIG_TOUCHSCREEN_USB_ETURBO is not set
+# CONFIG_TOUCHSCREEN_USB_GENERAL_TOUCH is not set
+# CONFIG_TOUCHSCREEN_USB_GOTOP is not set
+# CONFIG_TOUCHSCREEN_USB_GUNZE is not set
+# CONFIG_TOUCHSCREEN_USB_IDEALTEK is not set
+# CONFIG_TOUCHSCREEN_USB_IRTOUCH is not set
+# CONFIG_TOUCHSCREEN_USB_ITM is not set
+# CONFIG_TOUCHSCREEN_USB_JASTEC is not set
+# CONFIG_TOUCHSCREEN_USB_NEXIO is not set
+# CONFIG_TOUCHSCREEN_USB_PANJIT is not set
+# CONFIG_TOUCHSCREEN_USB_ZYTRONIC is not set
 # CONFIG_TOUCHSCREEN_W90X900 is not set
 # CONFIG_TOUCHSCREEN_WACOM_I2C is not set
 # CONFIG_TOUCHSCREEN_WACOM_W8001 is not set
 # CONFIG_TOUCHSCREEN_WDT87XX_I2C is not set
+# CONFIG_TOUCHSCREEN_WM831X is not set
+# CONFIG_TOUCHSCREEN_WM9705 is not set
+# CONFIG_TOUCHSCREEN_WM9712 is not set
+# CONFIG_TOUCHSCREEN_WM9713 is not set
 # CONFIG_TOUCHSCREEN_WM97XX is not set
+# CONFIG_TOUCHSCREEN_WM97XX_ATMEL is not set
+# CONFIG_TOUCHSCREEN_WM97XX_MAINSTONE is not set
+# CONFIG_TOUCHSCREEN_WM97XX_ZYLONITE is not set
 # CONFIG_TOUCHSCREEN_ZET6223 is not set
 # CONFIG_TOUCHSCREEN_ZFORCE is not set
 # CONFIG_TPL0102 is not set
@ -5035,10 +5166,9 @@ CONFIG_UNIX=y
 CONFIG_UNIX98_PTYS=y
 # CONFIG_UNIXWARE_DISKLABEL is not set
 # CONFIG_UNIX_DIAG is not set
-# CONFIG_UNMAP_KERNEL_AT_EL0 is not set
 # CONFIG_UNUSED_SYMBOLS is not set
 # CONFIG_UPROBES is not set
-# CONFIG_UPROBE_EVENT is not set
+# CONFIG_UPROBE_EVENTS is not set
 # CONFIG_US5182D is not set
 # CONFIG_USB is not set
 # CONFIG_USBIP_CORE is not set
@ -5179,6 +5309,7 @@ CONFIG_USB_GADGET_VBUS_DRAW=2
 # CONFIG_USB_HUB_USB251XB is not set
 # CONFIG_USB_HWA_HCD is not set
 # CONFIG_USB_IDMOUSE is not set
+# CONFIG_USB_IMX21_HCD is not set
 # CONFIG_USB_IOWARRIOR is not set
 # CONFIG_USB_IPHETH is not set
 # CONFIG_USB_ISIGHTFW is not set
@ -5208,6 +5339,7 @@ CONFIG_USB_GADGET_VBUS_DRAW=2
 # CONFIG_USB_MON is not set
 # CONFIG_USB_MOUSE is not set
 # CONFIG_USB_MSM_OTG is not set
+# CONFIG_USB_MTU3 is not set
 # CONFIG_USB_MUSB_HDRC is not set
 # CONFIG_USB_MV_U3D is not set
 # CONFIG_USB_MV_UDC is not set
@ -5375,6 +5507,7 @@ CONFIG_USB_VIDEO_CLASS_INPUT_EVDEV=y
 # CONFIG_USB_WUSB is not set
 # CONFIG_USB_WUSB_CBAF is not set
 # CONFIG_USB_XHCI_HCD is not set
+# CONFIG_USB_XHCI_TEGRA is not set
 # CONFIG_USB_XUSBATM is not set
 # CONFIG_USB_YUREX is not set
 # CONFIG_USB_ZD1201 is not set
@ -5395,7 +5528,7 @@ CONFIG_USB_VIDEO_CLASS_INPUT_EVDEV=y
 # CONFIG_VEXPRESS_CONFIG is not set
 # CONFIG_VF610_ADC is not set
 # CONFIG_VF610_DAC is not set
-CONFIG_VFAT_FS=y
+# CONFIG_VFAT_FS is not set
 # CONFIG_VGASTATE is not set
 # CONFIG_VGA_ARB is not set
 # CONFIG_VGA_SWITCHEROO is not set
@ -5656,31 +5789,3 @@ CONFIG_ZONE_DMA=y
 # CONFIG_ZRAM is not set
 # CONFIG_ZSMALLOC is not set
 # CONFIG_ZX_TDM is not set
-CONFIG_TCP_CONG_LIA=y
-CONFIG_TCP_CONG_OLIA=y
-CONFIG_TCP_CONG_WVEGAS=y
-CONFIG_TCP_CONG_BALIA=y
-CONFIG_DEFAULT_TCP_CONG="cubic"
-CONFIG_MPTCP=y
-# CONFIG_DEFAULT_BALIA is not set
-# CONFIG_DEFAULT_LIA is not set
-# CONFIG_DEFAULT_OLIA is not set
-# CONFIG_DEFAULT_WVEGAS is not set
-# CONFIG_DEFAULT_BBR is not set
-CONFIG_DEFAULT_CUBIC=y
-CONFIG_DEFAULT_MPTCP_PM="default"
-CONFIG_DEFAULT_MPTCP_SCHED="default"
-CONFIG_MPTCP_PM_ADVANCED=y
-CONFIG_MPTCP_SCHED_ADVANCED=y
-CONFIG_MPTCP_FULLMESH=y
-CONFIG_MPTCP_NDIFFPORTS=y
-CONFIG_MPTCP_BINDER=y
-CONFIG_MPTCP_ROUNDROBIN=y
-CONFIG_MPTCP_REDUNDANT=y
-CONFIG_DEFAULT_FULLMESH=y
-CONFIG_DEFAULT_SCHEDULER=y
-# CONFIG_DEFAULT_NDIFFPORTS is not set
-# CONFIG_DEFAULT_BINDER is not set
-# CONFIG_DEFAULT_DUMMY is not set
-# CONFIG_DEFAULT_ROUNDROBIN is not set
-# CONFIG_DEFAULT_REDUNDANT is not set
--- a/root/target/linux/generic/config-4.19
+++ b/root/target/linux/generic/config-4.19
@ -503,6 +503,7 @@ CONFIG_BINFMT_ELF=y
 # CONFIG_BINFMT_MISC is not set
 CONFIG_BINFMT_SCRIPT=y
 CONFIG_BITREVERSE=y
+# CONFIG_BLK_CGROUP_IOLATENCY is not set
 # CONFIG_BLK_CMDLINE_PARSER is not set
 # CONFIG_BLK_CPQ_CISS_DA is not set
 # CONFIG_BLK_CPQ_DA is not set
--- a/root/target/linux/mvebu/files-4.19/arch/arm/boot/dts/armada-385-linksys-venom.dts
+++ b/root/target/linux/mvebu/files-4.19/arch/arm/boot/dts/armada-385-linksys-venom.dts
@ -1,207 +0,0 @@
-/*
- * Device Tree file for the Linksys WRT32X (Venom)
- *
- * Copyright (C) 2017 Imre Kaloz <kaloz@openwrt.org>
- *
- *
- * This file is dual-licensed: you can use it either under the terms
- * of the GPL or the X11 license, at your option. Note that this dual
- * licensing only applies to this file, and not this project as a
- * whole.
- *
- *  a) This file is licensed under the terms of the GNU General Public
- *     License version 2.  This program is licensed "as is" without
- *     any warranty of any kind, whether express or implied.
- *
- * Or, alternatively,
- *
- *  b) Permission is hereby granted, free of charge, to any person
- *     obtaining a copy of this software and associated documentation
- *     files (the "Software"), to deal in the Software without
- *     restriction, including without limitation the rights to use,
- *     copy, modify, merge, publish, distribute, sublicense, and/or
- *     sell copies of the Software, and to permit persons to whom the
- *     Software is furnished to do so, subject to the following
- *     conditions:
- *
- *     The above copyright notice and this permission notice shall be
- *     included in all copies or substantial portions of the Software.
- *
- *     THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
- *     EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
- *     OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
- *     NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
- *     HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
- *     WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
- *     FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
- *     OTHER DEALINGS IN THE SOFTWARE.
- */
-
-/dts-v1/;
-#include <dt-bindings/gpio/gpio.h>
-#include <dt-bindings/input/input.h>
-#include "armada-385-linksys.dtsi"
-
-/ {
-	model = "Linksys WRT32X";
-	compatible = "linksys,venom", "linksys,armada385", "marvell,armada385",
-		     "marvell,armada380";
-
-	chosen {
-		bootargs = "console=ttyS0,115200";
-		stdout-path = "serial0:115200n8";
-		append-rootblock = "root=/dev/mtdblock";
-	};
-};
-
-	&expander0 {
-			wan_amber@0 {
-				label = "venom:amber:wan";
-				reg = <0x0>;
-			};
-
-			wan_blue@1 {
-				label = "venom:blue:wan";
-				reg = <0x1>;
-			};
-
-			usb2@5 {
-				label = "venom:blue:usb2";
-				reg = <0x5>;
-			};
-
-			usb3_1@6 {
-				label = "venom:blue:usb3_1";
-				reg = <0x6>;
-			};
-
-			usb3_2@7 {
-				label = "venom:blue:usb3_2";
-				reg = <0x7>;
-			};
-
-			wps_blue@8 {
-				label = "venom:blue:wps";
-				reg = <0x8>;
-			};
-
-			wps_amber@9 {
-				label = "venom:amber:wps";
-				reg = <0x9>;
-			};
-	};
-
-	&gpio_leds {
-			power {
-				gpios = <&gpio1 24 GPIO_ACTIVE_HIGH>;
-				label = "venom:blue:power";
-			};
-
-			sata {
-				gpios = <&gpio1 21 GPIO_ACTIVE_LOW>;
-				label = "venom:blue:sata";
-			};
-
-			wlan_2g {
-				gpios = <&gpio1 13 GPIO_ACTIVE_LOW>;
-				label = "venom:blue:wlan_2g";
-			};
-
-			wlan_5g {
-				gpios = <&gpio1 14 GPIO_ACTIVE_LOW>;
-				label = "venom:blue:wlan_5g";
-			};
-	};
-
-	&gpio_leds_pins {
-			marvell,pins = "mpp21", "mpp45", "mpp46", "mpp56";
-	};
-
-	&nand {
-			/* Spansion S34ML02G2 256MiB, OEM Layout */
-			partition@0 {
-				label = "u-boot";
-				reg = <0x0000000 0x200000>;	/* 2MB */
-				read-only;
-			};
-
-			partition@200000 {
-				label = "u_env";
-				reg = <0x200000 0x20000>;	/* 128KB */
-			};
-
-			partition@220000 {
-				label = "s_env";
-				reg = <0x220000 0x40000>;	/* 256KB */
-			};
-
-			partition@180000 {
-				label = "unused_area";
-				reg = <0x260000 0x5c0000>;	/* 5.75MB */
-			};
-
-			partition@7e0000 {
-				label = "devinfo";
-				reg = <0x7e0000 0x40000>;	/* 256KB */
-				read-only;
-			};
-
-			/* kernel1 overlaps with rootfs1 by design */
-			partition@900000 {
-				label = "kernel1";
-				reg = <0x900000 0x7b00000>;	/* 123MB */
-			};
-
-			partition@c00000 {
-				label = "rootfs1";
-				reg = <0xc00000 0x7800000>;	/* 120MB */
-			};
-
-			/* kernel2 overlaps with rootfs2 by design */
-			partition@8400000 {
-				label = "kernel2";
-				reg = <0x8400000 0x7b00000>;	/* 123MB */
-			};
-
-			partition@8700000 {
-				label = "rootfs2";
-				reg = <0x8700000 0x7800000>;	/* 120MB */
-			};
-
-			/* last MB is for the BBT, not writable */
-			partition@ff00000 {
-				label = "BBT";
-				reg = <0xff00000 0x100000>;
-			};
-	};
-
-
-	&pcie1 {
-			mwlwifi {
-				marvell,chainmask = <4 4>;
-			};
-	};
-
-	&pcie2 {
-			mwlwifi {
-				marvell,chainmask = <4 4>;
-			};
-	};
-
-	&sdhci {
-		pinctrl-names = "default";
-		pinctrl-0 = <&sdhci_pins>;
-		no-1-8-v;
-		non-removable;
-		wp-inverted;
-		bus-width = <8>;
-		status = "okay";
-	};
-
-	&usb3_1_vbus {
-		gpio = <&gpio1 12 GPIO_ACTIVE_HIGH>;
-	};
-
-	&usb3_1_vbus_pins {
-		marvell,pins = "mpp44";
-	};
--- a/root/target/linux/mvebu/patches-4.19/002-add_powertables.patch
+++ b/root/target/linux/mvebu/patches-4.19/002-add_powertables.patch
@ -1,770 +0,0 @@
--- a/arch/arm/boot/dts/armada-385-linksys.dtsi
-+++ b/arch/arm/boot/dts/armada-385-linksys.dtsi
-@@ -212,11 +212,19 @@
- &pcie1 {
- 	/* Marvell 88W8864, 5GHz-only */
- 	status = "okay";
-+
-+	mwlwifi {
-+		marvell,2ghz = <0>;
-+	};
- };
- 
- &pcie2 {
- 	/* Marvell 88W8864, 2GHz-only */
- 	status = "okay";
-+
-+	mwlwifi {
-+		marvell,5ghz = <0>;
-+	};
- };
- 
- &pinctrl {
--- a/arch/arm/boot/dts/armada-385-linksys-caiman.dts
-+++ b/arch/arm/boot/dts/armada-385-linksys-caiman.dts
-@@ -142,3 +142,205 @@
- 		};
- 	};
- };
-+
-+&pcie1 {
-+	mwlwifi {
-+		marvell,chainmask = <2 2>;
-+		marvell,powertable {
-+			AU =
-+				<36 0 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0 0xf>,
-+				<40 0 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0 0xf>,
-+				<44 0 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0 0xf>,
-+				<48 0 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0 0xf>,
-+				<52 0 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0 0xf>,
-+				<56 0 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0 0xf>,
-+				<60 0 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0 0xf>,
-+				<64 0 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0 0xf>,
-+				<100 0 0x17 0x17 0x17 0x17 0x17 0x17 0x17 0x15 0x17 0x17 0x17 0x14 0x17 0x17 0x17 0x14 0 0xf>,
-+				<104 0 0x17 0x17 0x17 0x17 0x17 0x17 0x17 0x15 0x17 0x17 0x17 0x14 0x17 0x17 0x17 0x14 0 0xf>,
-+				<108 0 0x17 0x17 0x17 0x17 0x17 0x17 0x17 0x15 0x17 0x17 0x17 0x14 0x17 0x17 0x17 0x14 0 0xf>,
-+				<112 0 0x17 0x17 0x17 0x17 0x17 0x17 0x17 0x15 0x17 0x17 0x17 0x14 0x17 0x17 0x17 0x14 0 0xf>,
-+				<116 0 0x17 0x17 0x17 0x17 0x17 0x17 0x17 0x15 0x17 0x17 0x17 0x14 0x17 0x17 0x17 0x14 0 0xf>,
-+				<120 0 0x17 0x17 0x17 0x17 0x17 0x17 0x17 0x15 0x17 0x17 0x17 0x14 0x17 0x17 0x17 0x14 0 0xf>,
-+				<124 0 0x17 0x17 0x17 0x17 0x17 0x17 0x17 0x15 0x17 0x17 0x17 0x14 0x17 0x17 0x17 0x14 0 0xf>,
-+				<128 0 0x17 0x17 0x17 0x17 0x17 0x17 0x17 0x15 0x17 0x17 0x17 0x14 0x17 0x17 0x17 0x14 0 0xf>,
-+				<132 0 0x17 0x17 0x17 0x17 0x17 0x17 0x17 0x15 0x17 0x17 0x17 0x14 0x17 0x17 0x17 0x14 0 0xf>,
-+				<136 0 0x17 0x17 0x17 0x17 0x17 0x17 0x17 0x15 0x17 0x17 0x17 0x14 0x17 0x17 0x17 0x14 0 0xf>,
-+				<140 0 0x17 0x17 0x17 0x17 0x17 0x17 0x17 0x15 0x17 0x17 0x17 0x14 0x17 0x17 0x17 0x14 0 0xf>,
-+				<149 0 0x1a 0x1a 0x18 0x17 0x1a 0x1a 0x17 0x15 0x1a 0x1a 0x17 0x14 0x1a 0x1a 0x17 0x14 0 0xf>,
-+				<153 0 0x1a 0x1a 0x18 0x17 0x1a 0x1a 0x17 0x15 0x1a 0x1a 0x17 0x14 0x1a 0x1a 0x17 0x14 0 0xf>,
-+				<157 0 0x1a 0x1a 0x18 0x17 0x1a 0x1a 0x17 0x15 0x1a 0x1a 0x17 0x14 0x1a 0x1a 0x17 0x14 0 0xf>,
-+				<161 0 0x1a 0x1a 0x18 0x17 0x1a 0x1a 0x17 0x15 0x1a 0x1a 0x17 0x14 0x1a 0x1a 0x17 0x14 0 0xf>,
-+				<165 0 0x1a 0x1a 0x18 0x17 0x1a 0x1a 0x17 0x15 0x1a 0x1a 0x17 0x14 0x1a 0x1a 0x17 0x14 0 0xf>;
-+			CA =
-+				<36 0 0xf 0xf 0xf 0xf 0xf 0xf 0xf 0xf 0xf 0xf 0xf 0xf 0xf 0xf 0xf 0xf 0 0xf>,
-+				<40 0 0xf 0xf 0xf 0xf 0xf 0xf 0xf 0xf 0xf 0xf 0xf 0xf 0xf 0xf 0xf 0xf 0 0xf>,
-+				<44 0 0xf 0xf 0xf 0xf 0xf 0xf 0xf 0xf 0xf 0xf 0xf 0xf 0xf 0xf 0xf 0xf 0 0xf>,
-+				<48 0 0xf 0xf 0xf 0xf 0xf 0xf 0xf 0xf 0xf 0xf 0xf 0xf 0xf 0xf 0xf 0xf 0 0xf>,
-+				<52 0 0x11 0x11 0x11 0x11 0x10 0x10 0x10 0x10 0x12 0x12 0x12 0x12 0x10 0x10 0x10 0x10 0 0xf>,
-+				<56 0 0x11 0x11 0x11 0x11 0x10 0x10 0x10 0x10 0x12 0x12 0x12 0x12 0x10 0x10 0x10 0x10 0 0xf>,
-+				<60 0 0x11 0x11 0x11 0x11 0x10 0x10 0x10 0x10 0x12 0x12 0x12 0x12 0x10 0x10 0x10 0x10 0 0xf>,
-+				<64 0 0x11 0x11 0x11 0x11 0x10 0x10 0x10 0x10 0x12 0x12 0x12 0x12 0x10 0x10 0x10 0x10 0 0xf>,
-+				<100 0 0x10 0x10 0x10 0x10 0x11 0x11 0x11 0x11 0x12 0x12 0x12 0x12 0x10 0x10 0x10 0x10 0 0xf>,
-+				<104 0 0x11 0x11 0x11 0x11 0x10 0x10 0x10 0x10 0x12 0x12 0x12 0x12 0x10 0x10 0x10 0x10 0 0xf>,
-+				<108 0 0x11 0x11 0x11 0x11 0x10 0x10 0x10 0x10 0x11 0x11 0x11 0x11 0x10 0x10 0x10 0x10 0 0xf>,
-+				<112 0 0x11 0x11 0x11 0x11 0x10 0x10 0x10 0x10 0x11 0x11 0x11 0x11 0x10 0x10 0x10 0x10 0 0xf>,
-+				<116 0 0x11 0x11 0x11 0x11 0x10 0x10 0x10 0x10 0x11 0x11 0x11 0x11 0x10 0x10 0x10 0x10 0 0xf>,
-+				<120 0 0x11 0x11 0x11 0x11 0x10 0x10 0x10 0x10 0x11 0x11 0x11 0x11 0x10 0x10 0x10 0x10 0 0xf>,
-+				<124 0 0x11 0x11 0x11 0x11 0x10 0x10 0x10 0x10 0x11 0x11 0x11 0x11 0x10 0x10 0x10 0x10 0 0xf>,
-+				<128 0 0x11 0x11 0x11 0x11 0x10 0x10 0x10 0x10 0x11 0x11 0x11 0x11 0x10 0x10 0x10 0x10 0 0xf>,
-+				<132 0 0x11 0x11 0x11 0x11 0x10 0x10 0x10 0x10 0x11 0x11 0x11 0x11 0x10 0x10 0x10 0x10 0 0xf>,
-+				<136 0 0x11 0x11 0x11 0x11 0x10 0x10 0x10 0x10 0x11 0x11 0x11 0x11 0x10 0x10 0x10 0x10 0 0xf>,
-+				<140 0 0x11 0x11 0x11 0x11 0x10 0x10 0x10 0x10 0x11 0x11 0x11 0x11 0x10 0x10 0x10 0x10 0 0xf>,
-+				<149 0 0x1a 0x1a 0x18 0x17 0x19 0x19 0x17 0x15 0x18 0x18 0x17 0x14 0x15 0x15 0x15 0x14 0 0xf>,
-+				<153 0 0x1a 0x1a 0x18 0x17 0x1a 0x1a 0x17 0x15 0x1a 0x1a 0x17 0x14 0x15 0x15 0x15 0x14 0 0xf>,
-+				<157 0 0x1a 0x1a 0x18 0x17 0x1a 0x1a 0x17 0x15 0x1a 0x1a 0x17 0x14 0x15 0x15 0x15 0x14 0 0xf>,
-+				<161 0 0x1a 0x1a 0x18 0x17 0x1a 0x1a 0x17 0x15 0x1a 0x1a 0x17 0x14 0x15 0x15 0x15 0x14 0 0xf>,
-+				<165 0 0x1a 0x1a 0x18 0x17 0x1a 0x1a 0x17 0x15 0x1a 0x1a 0x17 0x14 0x15 0x15 0x15 0x14 0 0xf>;
-+			CN =
-+				<36 0 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0 0xf>,
-+				<40 0 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0 0xf>,
-+				<44 0 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0 0xf>,
-+				<48 0 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0 0xf>,
-+				<52 0 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0 0xf>,
-+				<56 0 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0 0xf>,
-+				<60 0 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0 0xf>,
-+				<64 0 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0 0xf>,
-+				<100 0 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0 0xf>,
-+				<104 0 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0 0xf>,
-+				<108 0 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0 0xf>,
-+				<112 0 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0 0xf>,
-+				<116 0 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0 0xf>,
-+				<120 0 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0 0xf>,
-+				<124 0 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0 0xf>,
-+				<128 0 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0 0xf>,
-+				<132 0 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0 0xf>,
-+				<136 0 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0 0xf>,
-+				<140 0 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0 0xf>,
-+				<149 0 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0x14 0x14 0x14 0x14 0x11 0x11 0x11 0x11 0 0xf>,
-+				<153 0 0x1a 0x1a 0x18 0x17 0x1a 0x1a 0x17 0x15 0x16 0x16 0x16 0x14 0x11 0x11 0x11 0x11 0 0xf>,
-+				<157 0 0x1a 0x1a 0x18 0x17 0x1a 0x1a 0x17 0x15 0x16 0x16 0x16 0x14 0x11 0x11 0x11 0x11 0 0xf>,
-+				<161 0 0x1a 0x1a 0x18 0x17 0x1a 0x1a 0x17 0x15 0x16 0x16 0x16 0x14 0x11 0x11 0x11 0x11 0 0xf>,
-+				<165 0 0x15 0x15 0x15 0x15 0x16 0x16 0x16 0x15 0x16 0x16 0x16 0x14 0x11 0x11 0x11 0x11 0 0xf>;
-+			ETSI =
-+				<36 0 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0 0xf>,
-+				<40 0 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0 0xf>,
-+				<44 0 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0 0xf>,
-+				<48 0 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0 0xf>,
-+				<52 0 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0 0xf>,
-+				<56 0 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0 0xf>,
-+				<60 0 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0 0xf>,
-+				<64 0 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0 0xf>,
-+				<100 0 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0 0xf>,
-+				<104 0 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0 0xf>,
-+				<108 0 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0 0xf>,
-+				<112 0 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0 0xf>,
-+				<116 0 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0 0xf>,
-+				<120 0 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0 0xf>,
-+				<124 0 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0 0xf>,
-+				<128 0 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0 0xf>,
-+				<132 0 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0 0xf>,
-+				<136 0 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0 0xf>,
-+				<140 0 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0 0xf>,
-+				<149 0 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0 0xf>;
-+			FCC =
-+				<36 0 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0x12 0x12 0x12 0x12 0x10 0x10 0x10 0x10 0 0xf>,
-+				<40 0 0x19 0x19 0x18 0x17 0x19 0x19 0x17 0x15 0x17 0x17 0x17 0x14 0x10 0x10 0x10 0x10 0 0xf>,
-+				<44 0 0x19 0x19 0x18 0x17 0x19 0x19 0x17 0x15 0x17 0x17 0x17 0x14 0x10 0x10 0x10 0x10 0 0xf>,
-+				<48 0 0x1a 0x1a 0x18 0x17 0x1a 0x1a 0x17 0x15 0x17 0x17 0x17 0x14 0x10 0x10 0x10 0x10 0 0xf>,
-+				<52 0 0x11 0x11 0x11 0x11 0x10 0x10 0x10 0x10 0x12 0x12 0x12 0x12 0x10 0x10 0x10 0x10 0 0xf>,
-+				<56 0 0x11 0x11 0x11 0x11 0x10 0x10 0x10 0x10 0x12 0x12 0x12 0x12 0x10 0x10 0x10 0x10 0 0xf>,
-+				<60 0 0x11 0x11 0x11 0x11 0x10 0x10 0x10 0x10 0x12 0x12 0x12 0x12 0x10 0x10 0x10 0x10 0 0xf>,
-+				<64 0 0x11 0x11 0x11 0x11 0x10 0x10 0x10 0x10 0x12 0x12 0x12 0x12 0x10 0x10 0x10 0x10 0 0xf>,
-+				<100 0 0x10 0x10 0x10 0x10 0x11 0x11 0x11 0x11 0x12 0x12 0x12 0x12 0x10 0x10 0x10 0x10 0 0xf>,
-+				<104 0 0x11 0x11 0x11 0x11 0x10 0x10 0x10 0x10 0x12 0x12 0x12 0x12 0x10 0x10 0x10 0x10 0 0xf>,
-+				<108 0 0x11 0x11 0x11 0x11 0x10 0x10 0x10 0x10 0x11 0x11 0x11 0x11 0x10 0x10 0x10 0x10 0 0xf>,
-+				<112 0 0x11 0x11 0x11 0x11 0x10 0x10 0x10 0x10 0x11 0x11 0x11 0x11 0x10 0x10 0x10 0x10 0 0xf>,
-+				<116 0 0x11 0x11 0x11 0x11 0x10 0x10 0x10 0x10 0x11 0x11 0x11 0x11 0x10 0x10 0x10 0x10 0 0xf>,
-+				<120 0 0x11 0x11 0x11 0x11 0x10 0x10 0x10 0x10 0x11 0x11 0x11 0x11 0x10 0x10 0x10 0x10 0 0xf>,
-+				<124 0 0x11 0x11 0x11 0x11 0x10 0x10 0x10 0x10 0x11 0x11 0x11 0x11 0x10 0x10 0x10 0x10 0 0xf>,
-+				<128 0 0x11 0x11 0x11 0x11 0x10 0x10 0x10 0x10 0x11 0x11 0x11 0x11 0x10 0x10 0x10 0x10 0 0xf>,
-+				<132 0 0x11 0x11 0x11 0x11 0x10 0x10 0x10 0x10 0x11 0x11 0x11 0x11 0x10 0x10 0x10 0x10 0 0xf>,
-+				<136 0 0x11 0x11 0x11 0x11 0x10 0x10 0x10 0x10 0x11 0x11 0x11 0x11 0x10 0x10 0x10 0x10 0 0xf>,
-+				<140 0 0x11 0x11 0x11 0x11 0x10 0x10 0x10 0x10 0x11 0x11 0x11 0x11 0x10 0x10 0x10 0x10 0 0xf>,
-+				<149 0 0x1a 0x1a 0x18 0x17 0x19 0x19 0x17 0x15 0x18 0x18 0x17 0x14 0x15 0x15 0x15 0x14 0 0xf>,
-+				<153 0 0x1a 0x1a 0x18 0x17 0x1a 0x1a 0x17 0x15 0x1a 0x1a 0x17 0x14 0x15 0x15 0x15 0x14 0 0xf>,
-+				<157 0 0x1a 0x1a 0x18 0x17 0x1a 0x1a 0x17 0x15 0x1a 0x1a 0x17 0x14 0x15 0x15 0x15 0x14 0 0xf>,
-+				<161 0 0x1a 0x1a 0x18 0x17 0x1a 0x1a 0x17 0x15 0x1a 0x1a 0x17 0x14 0x15 0x15 0x15 0x14 0 0xf>,
-+				<165 0 0x1a 0x1a 0x18 0x17 0x1a 0x1a 0x17 0x15 0x1a 0x1a 0x17 0x14 0x15 0x15 0x15 0x14 0 0xf>;
-+		};
-+	};
-+};
-+
-+&pcie2 {
-+	mwlwifi {
-+		marvell,chainmask = <2 2>;
-+		marvell,powertable {
-+			AU =
-+				<1 0 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0x0 0x0 0x0 0x0 0 0xf>,
-+				<2 0 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0x0 0x0 0x0 0x0 0 0xf>,
-+				<3 0 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0x0 0x0 0x0 0x0 0 0xf>,
-+				<4 0 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0x0 0x0 0x0 0x0 0 0xf>,
-+				<5 0 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0x0 0x0 0x0 0x0 0 0xf>,
-+				<6 0 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0x0 0x0 0x0 0x0 0 0xf>,
-+				<7 0 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0x0 0x0 0x0 0x0 0 0xf>,
-+				<8 0 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0x0 0x0 0x0 0x0 0 0xf>,
-+				<9 0 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0x0 0x0 0x0 0x0 0 0xf>,
-+				<10 0 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0x0 0x0 0x0 0x0 0 0xf>,
-+				<11 0 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0x0 0x0 0x0 0x0 0 0xf>;
-+			CA =
-+				<1 0 0x19 0x14 0x14 0x14 0x13 0x13 0x13 0x13 0x10 0x10 0x10 0x10 0x00 0x00 0x00 0x00 0 0xf>,
-+				<2 0 0x1a 0x19 0x18 0x17 0x19 0x19 0x17 0x16 0x14 0x14 0x14 0x14 0x00 0x00 0x00 0x00 0 0xf>,
-+				<3 0 0x1a 0x19 0x18 0x17 0x19 0x19 0x17 0x16 0x14 0x14 0x14 0x14 0x00 0x00 0x00 0x00 0 0xf>,
-+				<4 0 0x1a 0x19 0x18 0x17 0x19 0x19 0x17 0x16 0x14 0x14 0x14 0x14 0x00 0x00 0x00 0x00 0 0xf>,
-+				<5 0 0x1a 0x19 0x18 0x17 0x19 0x19 0x17 0x16 0x14 0x14 0x14 0x14 0x00 0x00 0x00 0x00 0 0xf>,
-+				<6 0 0x1a 0x19 0x18 0x17 0x19 0x19 0x17 0x16 0x14 0x14 0x14 0x14 0x00 0x00 0x00 0x00 0 0xf>,
-+				<7 0 0x1a 0x19 0x18 0x17 0x19 0x19 0x17 0x16 0x14 0x14 0x14 0x14 0x00 0x00 0x00 0x00 0 0xf>,
-+				<8 0 0x1a 0x19 0x18 0x17 0x19 0x19 0x17 0x16 0x14 0x14 0x14 0x14 0x00 0x00 0x00 0x00 0 0xf>,
-+				<9 0 0x1a 0x19 0x18 0x17 0x19 0x19 0x17 0x16 0x14 0x14 0x14 0x14 0x00 0x00 0x00 0x00 0 0xf>,
-+				<10 0 0x1a 0x19 0x18 0x17 0x19 0x19 0x17 0x16 0x14 0x14 0x14 0x14 0x00 0x00 0x00 0x00 0 0xf>,
-+				<11 0 0x19 0x15 0x15 0x15 0x14 0x14 0x14 0x14 0x13 0x13 0x13 0x13 0x00 0x00 0x00 0x00 0 0xf>;
-+			CN =
-+				<1 0 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0x0 0x0 0x0 0x0 0 0xf>,
-+				<2 0 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0x0 0x0 0x0 0x0 0 0xf>,
-+				<3 0 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0x0 0x0 0x0 0x0 0 0xf>,
-+				<4 0 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0x0 0x0 0x0 0x0 0 0xf>,
-+				<5 0 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0x0 0x0 0x0 0x0 0 0xf>,
-+				<6 0 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0x0 0x0 0x0 0x0 0 0xf>,
-+				<7 0 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0x0 0x0 0x0 0x0 0 0xf>,
-+				<8 0 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0x0 0x0 0x0 0x0 0 0xf>,
-+				<9 0 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0x0 0x0 0x0 0x0 0 0xf>,
-+				<10 0 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0x0 0x0 0x0 0x0 0 0xf>,
-+				<11 0 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0x0 0x0 0x0 0x0 0 0xf>,
-+				<12 0 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0x0 0x0 0x0 0x0 0 0xf>,
-+				<13 0 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0x0 0x0 0x0 0x0 0 0xf>,
-+				<14 0 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0x0 0x0 0x0 0x0 0 0xf>;
-+			ETSI =
-+				<1 0 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0x0 0x0 0x0 0x0 0 0xf>,
-+				<2 0 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0x0 0x0 0x0 0x0 0 0xf>,
-+				<3 0 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0x0 0x0 0x0 0x0 0 0xf>,
-+				<4 0 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0x0 0x0 0x0 0x0 0 0xf>,
-+				<5 0 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0x0 0x0 0x0 0x0 0 0xf>,
-+				<6 0 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0x0 0x0 0x0 0x0 0 0xf>,
-+				<7 0 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0x0 0x0 0x0 0x0 0 0xf>,
-+				<8 0 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0x0 0x0 0x0 0x0 0 0xf>,
-+				<9 0 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0x0 0x0 0x0 0x0 0 0xf>,
-+				<10 0 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0x0 0x0 0x0 0x0 0 0xf>,
-+				<11 0 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0x0 0x0 0x0 0x0 0 0xf>,
-+				<12 0 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0x0 0x0 0x0 0x0 0 0xf>,
-+				<13 0 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0x0 0x0 0x0 0x0 0 0xf>;
-+			FCC =
-+				<1 0 0x19 0x14 0x14 0x14 0x13 0x13 0x13 0x13 0x10 0x10 0x10 0x10 0x0 0x0 0x0 0x0 0 0xf>,
-+				<2 0 0x1a 0x19 0x18 0x17 0x19 0x19 0x17 0x16 0x14 0x14 0x14 0x14 0x0 0x0 0x0 0x0 0 0xf>,
-+				<3 0 0x1a 0x19 0x18 0x17 0x19 0x19 0x17 0x16 0x14 0x14 0x14 0x14 0x0 0x0 0x0 0x0 0 0xf>,
-+				<4 0 0x1a 0x19 0x18 0x17 0x19 0x19 0x17 0x16 0x14 0x14 0x14 0x14 0x0 0x0 0x0 0x0 0 0xf>,
-+				<5 0 0x1a 0x19 0x18 0x17 0x19 0x19 0x17 0x16 0x14 0x14 0x14 0x14 0x0 0x0 0x0 0x0 0 0xf>,
-+				<6 0 0x1a 0x19 0x18 0x17 0x19 0x19 0x17 0x16 0x14 0x14 0x14 0x14 0x0 0x0 0x0 0x0 0 0xf>,
-+				<7 0 0x1a 0x19 0x18 0x17 0x19 0x19 0x17 0x16 0x14 0x14 0x14 0x14 0x0 0x0 0x0 0x0 0 0xf>,
-+				<8 0 0x1a 0x19 0x18 0x17 0x19 0x19 0x17 0x16 0x14 0x14 0x14 0x14 0x0 0x0 0x0 0x0 0 0xf>,
-+				<9 0 0x1a 0x19 0x18 0x17 0x19 0x19 0x17 0x16 0x14 0x14 0x14 0x14 0x0 0x0 0x0 0x0 0 0xf>,
-+				<10 0 0x1a 0x19 0x18 0x17 0x19 0x19 0x17 0x16 0x14 0x14 0x14 0x14 0x0 0x0 0x0 0x0 0 0xf>,
-+				<11 0 0x19 0x15 0x15 0x15 0x14 0x14 0x14 0x14 0x13 0x13 0x13 0x13 0x0 0x0 0x0 0x0 0 0xf>;
-+		};
-+	};
-+};
--- a/arch/arm/boot/dts/armada-385-linksys-cobra.dts
-+++ b/arch/arm/boot/dts/armada-385-linksys-cobra.dts
-@@ -142,3 +142,205 @@
- 		};
- 	};
- };
-+
-+&pcie1 {
-+	mwlwifi {
-+		marvell,chainmask = <4 4>;
-+		marvell,powertable {
-+			AU =
-+				<36 0 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0 0xf>,
-+				<40 0 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0 0xf>,
-+				<44 0 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0 0xf>,
-+				<48 0 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0 0xf>,
-+				<52 0 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0 0xf>,
-+				<56 0 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0 0xf>,
-+				<60 0 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0 0xf>,
-+				<64 0 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0 0xf>,
-+				<100 0 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0 0xf>,
-+				<104 0 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0 0xf>,
-+				<108 0 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0 0xf>,
-+				<112 0 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0 0xf>,
-+				<116 0 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0 0xf>,
-+				<120 0 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0 0xf>,
-+				<124 0 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0 0xf>,
-+				<128 0 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0 0xf>,
-+				<132 0 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0 0xf>,
-+				<136 0 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0 0xf>,
-+				<140 0 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0 0xf>,
-+				<149 0 0x19 0x19 0x19 0x17 0x19 0x19 0x16 0x15 0x19 0x19 0x16 0x15 0x19 0x19 0x16 0x15 0 0xf>,
-+				<153 0 0x19 0x19 0x19 0x17 0x19 0x19 0x16 0x15 0x19 0x19 0x16 0x15 0x19 0x19 0x16 0x15 0 0xf>,
-+				<157 0 0x19 0x19 0x19 0x17 0x19 0x19 0x16 0x15 0x19 0x19 0x16 0x15 0x19 0x19 0x16 0x15 0 0xf>,
-+				<161 0 0x19 0x19 0x19 0x17 0x19 0x19 0x16 0x15 0x19 0x19 0x16 0x15 0x19 0x19 0x16 0x15 0 0xf>,
-+				<165 0 0x19 0x19 0x19 0x17 0x19 0x19 0x16 0x15 0x19 0x19 0x16 0x15 0x19 0x19 0x16 0x15 0 0xf>;
-+			CA =
-+				<36 0 0x9 0x9 0x9 0x9 0x9 0x9 0x9 0x9 0x9 0x9 0x9 0x9 0x9 0x9 0x9 0x9 0 0xf>,
-+				<40 0 0x9 0x9 0x9 0x9 0x9 0x9 0x9 0x9 0x9 0x9 0x9 0x9 0x9 0x9 0x9 0x9 0 0xf>,
-+				<44 0 0x9 0x9 0x9 0x9 0x9 0x9 0x9 0x9 0x9 0x9 0x9 0x9 0x9 0x9 0x9 0x9 0 0xf>,
-+				<48 0 0x9 0x9 0x9 0x9 0x9 0x9 0x9 0x9 0x9 0x9 0x9 0x9 0x9 0x9 0x9 0x9 0 0xf>,
-+				<52 0 0x11 0x11 0x11 0x11 0x10 0x10 0x10 0x10 0x12 0x12 0x12 0x12 0x10 0x10 0x10 0x10 0 0xf>,
-+				<56 0 0x11 0x11 0x11 0x11 0x10 0x10 0x10 0x10 0x12 0x12 0x12 0x12 0x10 0x10 0x10 0x10 0 0xf>,
-+				<60 0 0x11 0x11 0x11 0x11 0x10 0x10 0x10 0x10 0x12 0x12 0x12 0x12 0x10 0x10 0x10 0x10 0 0xf>,
-+				<64 0 0x11 0x11 0x11 0x11 0x10 0x10 0x10 0x10 0x12 0x12 0x12 0x12 0x10 0x10 0x10 0x10 0 0xf>,
-+				<100 0 0x10 0x10 0x10 0x10 0x11 0x11 0x11 0x11 0x12 0x12 0x12 0x12 0x10 0x10 0x10 0x10 0 0xf>,
-+				<104 0 0x11 0x11 0x11 0x11 0x10 0x10 0x10 0x10 0x12 0x12 0x12 0x12 0x10 0x10 0x10 0x10 0 0xf>,
-+				<108 0 0x11 0x11 0x11 0x11 0x10 0x10 0x10 0x10 0x11 0x11 0x11 0x11 0x10 0x10 0x10 0x10 0 0xf>,
-+				<112 0 0x11 0x11 0x11 0x11 0x10 0x10 0x10 0x10 0x11 0x11 0x11 0x11 0x10 0x10 0x10 0x10 0 0xf>,
-+				<116 0 0x11 0x11 0x11 0x11 0x10 0x10 0x10 0x10 0x11 0x11 0x11 0x11 0x10 0x10 0x10 0x10 0 0xf>,
-+				<120 0 0x11 0x11 0x11 0x11 0x10 0x10 0x10 0x10 0x11 0x11 0x11 0x11 0x10 0x10 0x10 0x10 0 0xf>,
-+				<124 0 0x11 0x11 0x11 0x11 0x10 0x10 0x10 0x10 0x11 0x11 0x11 0x11 0x10 0x10 0x10 0x10 0 0xf>,
-+				<128 0 0x11 0x11 0x11 0x11 0x10 0x10 0x10 0x10 0x11 0x11 0x11 0x11 0x10 0x10 0x10 0x10 0 0xf>,
-+				<132 0 0x11 0x11 0x11 0x11 0x10 0x10 0x10 0x10 0x11 0x11 0x11 0x11 0x10 0x10 0x10 0x10 0 0xf>,
-+				<136 0 0x11 0x11 0x11 0x11 0x10 0x10 0x10 0x10 0x11 0x11 0x11 0x11 0x10 0x10 0x10 0x10 0 0xf>,
-+				<140 0 0x11 0x11 0x11 0x11 0x10 0x10 0x10 0x10 0x11 0x11 0x11 0x11 0x10 0x10 0x10 0x10 0 0xf>,
-+				<149 0 0x16 0x16 0x16 0x16 0x16 0x16 0x16 0x16 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0 0xf>,
-+				<153 0 0x16 0x16 0x16 0x16 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0 0xf>,
-+				<157 0 0x16 0x16 0x16 0x16 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0 0xf>,
-+				<161 0 0x16 0x16 0x16 0x16 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0 0xf>,
-+				<165 0 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0 0xf>;
-+			CN =
-+				<36 0 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0 0xf>,
-+				<40 0 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0 0xf>,
-+				<44 0 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0 0xf>,
-+				<48 0 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0 0xf>,
-+				<52 0 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0 0xf>,
-+				<56 0 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0 0xf>,
-+				<60 0 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0 0xf>,
-+				<64 0 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0 0xf>,
-+				<100 0 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0 0xf>,
-+				<104 0 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0 0xf>,
-+				<108 0 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0 0xf>,
-+				<112 0 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0 0xf>,
-+				<116 0 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0 0xf>,
-+				<120 0 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0 0xf>,
-+				<124 0 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0 0xf>,
-+				<128 0 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0 0xf>,
-+				<132 0 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0 0xf>,
-+				<136 0 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0 0xf>,
-+				<140 0 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0 0xf>,
-+				<149 0 0x14 0x14 0x14 0x14 0x13 0x13 0x13 0x13 0x11 0x11 0x11 0x11 0x10 0x10 0x10 0x10 0 0xf>,
-+				<153 0 0x16 0x16 0x16 0x16 0x15 0x15 0x15 0x15 0x14 0x14 0x14 0x14 0x10 0x10 0x10 0x10 0 0xf>,
-+				<157 0 0x16 0x16 0x16 0x16 0x15 0x15 0x15 0x15 0x14 0x14 0x14 0x14 0x10 0x10 0x10 0x10 0 0xf>,
-+				<161 0 0x16 0x16 0x16 0x16 0x15 0x15 0x15 0x15 0x14 0x14 0x14 0x14 0x10 0x10 0x10 0x10 0 0xf>,
-+				<165 0 0x13 0x13 0x13 0x13 0x13 0x13 0x13 0x13 0x14 0x14 0x14 0x14 0x10 0x10 0x10 0x10 0 0xf>;
-+			ETSI =
-+				<36 0 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0 0xf>,
-+				<40 0 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0 0xf>,
-+				<44 0 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0 0xf>,
-+				<48 0 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0 0xf>,
-+				<52 0 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0 0xf>,
-+				<56 0 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0 0xf>,
-+				<60 0 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0 0xf>,
-+				<64 0 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0 0xf>,
-+				<100 0 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0 0xf>,
-+				<104 0 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0 0xf>,
-+				<108 0 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0 0xf>,
-+				<112 0 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0 0xf>,
-+				<116 0 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0 0xf>,
-+				<120 0 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0 0xf>,
-+				<124 0 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0 0xf>,
-+				<128 0 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0 0xf>,
-+				<132 0 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0 0xf>,
-+				<136 0 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0 0xf>,
-+				<140 0 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0 0xf>,
-+				<149 0 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0 0xf>;
-+			FCC =
-+				<36 0 0x12 0x12 0x12 0x12 0x12 0x12 0x12 0x12 0x10 0x10 0x10 0x10 0xf 0xf 0xf 0xf 0 0xf>,
-+				<40 0 0x16 0x16 0x16 0x16 0x16 0x16 0x16 0x16 0x16 0x16 0x16 0x16 0xf 0xf 0xf 0xf 0 0xf>,
-+				<44 0 0x16 0x16 0x16 0x16 0x16 0x16 0x16 0x16 0x16 0x16 0x16 0x16 0xf 0xf 0xf 0xf 0 0xf>,
-+				<48 0 0x16 0x16 0x16 0x16 0x16 0x16 0x16 0x16 0x16 0x16 0x16 0x16 0xf 0xf 0xf 0xf 0 0xf>,
-+				<52 0 0x11 0x11 0x11 0x11 0x10 0x10 0x10 0x10 0x12 0x12 0x12 0x12 0x10 0x10 0x10 0x10 0 0xf>,
-+				<56 0 0x11 0x11 0x11 0x11 0x10 0x10 0x10 0x10 0x12 0x12 0x12 0x12 0x10 0x10 0x10 0x10 0 0xf>,
-+				<60 0 0x11 0x11 0x11 0x11 0x10 0x10 0x10 0x10 0x12 0x12 0x12 0x12 0x10 0x10 0x10 0x10 0 0xf>,
-+				<64 0 0x11 0x11 0x11 0x11 0x10 0x10 0x10 0x10 0x12 0x12 0x12 0x12 0x10 0x10 0x10 0x10 0 0xf>,
-+				<100 0 0x10 0x10 0x10 0x10 0x11 0x11 0x11 0x11 0x12 0x12 0x12 0x12 0x10 0x10 0x10 0x10 0 0xf>,
-+				<104 0 0x11 0x11 0x11 0x11 0x10 0x10 0x10 0x10 0x12 0x12 0x12 0x12 0x10 0x10 0x10 0x10 0 0xf>,
-+				<108 0 0x11 0x11 0x11 0x11 0x10 0x10 0x10 0x10 0x11 0x11 0x11 0x11 0x10 0x10 0x10 0x10 0 0xf>,
-+				<112 0 0x11 0x11 0x11 0x11 0x10 0x10 0x10 0x10 0x11 0x11 0x11 0x11 0x10 0x10 0x10 0x10 0 0xf>,
-+				<116 0 0x11 0x11 0x11 0x11 0x10 0x10 0x10 0x10 0x11 0x11 0x11 0x11 0x10 0x10 0x10 0x10 0 0xf>,
-+				<120 0 0x11 0x11 0x11 0x11 0x10 0x10 0x10 0x10 0x11 0x11 0x11 0x11 0x10 0x10 0x10 0x10 0 0xf>,
-+				<124 0 0x11 0x11 0x11 0x11 0x10 0x10 0x10 0x10 0x11 0x11 0x11 0x11 0x10 0x10 0x10 0x10 0 0xf>,
-+				<128 0 0x11 0x11 0x11 0x11 0x10 0x10 0x10 0x10 0x11 0x11 0x11 0x11 0x10 0x10 0x10 0x10 0 0xf>,
-+				<132 0 0x11 0x11 0x11 0x11 0x10 0x10 0x10 0x10 0x11 0x11 0x11 0x11 0x10 0x10 0x10 0x10 0 0xf>,
-+				<136 0 0x11 0x11 0x11 0x11 0x10 0x10 0x10 0x10 0x11 0x11 0x11 0x11 0x10 0x10 0x10 0x10 0 0xf>,
-+				<140 0 0x11 0x11 0x11 0x11 0x10 0x10 0x10 0x10 0x11 0x11 0x11 0x11 0x10 0x10 0x10 0x10 0 0xf>,
-+				<149 0 0x16 0x16 0x16 0x16 0x16 0x16 0x16 0x16 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0 0xf>,
-+				<153 0 0x16 0x16 0x16 0x16 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0 0xf>,
-+				<157 0 0x16 0x16 0x16 0x16 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0 0xf>,
-+				<161 0 0x16 0x16 0x16 0x16 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0 0xf>,
-+				<165 0 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0 0xf>;
-+		};
-+	};
-+};
-+
-+&pcie2 {
-+	mwlwifi {
-+		marvell,chainmask = <4 4>;
-+		marvell,powertable {
-+			AU =
-+				<1 0 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0x0 0x0 0x0 0x0 0 0xf>,
-+				<2 0 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0x0 0x0 0x0 0x0 0 0xf>,
-+				<3 0 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0x0 0x0 0x0 0x0 0 0xf>,
-+				<4 0 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0x0 0x0 0x0 0x0 0 0xf>,
-+				<5 0 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0x0 0x0 0x0 0x0 0 0xf>,
-+				<6 0 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0x0 0x0 0x0 0x0 0 0xf>,
-+				<7 0 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0x0 0x0 0x0 0x0 0 0xf>,
-+				<8 0 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0x0 0x0 0x0 0x0 0 0xf>,
-+				<9 0 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0x0 0x0 0x0 0x0 0 0xf>,
-+				<10 0 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0x0 0x0 0x0 0x0 0 0xf>,
-+				<11 0 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0x0 0x0 0x0 0x0 0 0xf>;
-+			CA =
-+				<1 0 0x17 0x10 0x10 0x10 0xf 0xf 0xf 0xf 0xe 0xe 0xe 0xe 0x0 0x0 0x0 0x0 0 0xf>,
-+				<2 0 0x18 0x16 0x16 0x16 0x16 0x16 0x16 0x14 0x11 0x11 0x11 0x11 0x0 0x0 0x0 0x0 0 0xf>,
-+				<3 0 0x18 0x16 0x16 0x16 0x16 0x16 0x16 0x14 0x11 0x11 0x11 0x11 0x0 0x0 0x0 0x0 0 0xf>,
-+				<4 0 0x18 0x16 0x16 0x16 0x16 0x16 0x16 0x14 0x11 0x11 0x11 0x11 0x0 0x0 0x0 0x0 0 0xf>,
-+				<5 0 0x18 0x16 0x16 0x16 0x16 0x16 0x16 0x14 0x11 0x11 0x11 0x11 0x0 0x0 0x0 0x0 0 0xf>,
-+				<6 0 0x18 0x16 0x16 0x16 0x16 0x16 0x16 0x14 0x11 0x11 0x11 0x11 0x0 0x0 0x0 0x0 0 0xf>,
-+				<7 0 0x18 0x16 0x16 0x16 0x16 0x16 0x16 0x14 0x11 0x11 0x11 0x11 0x0 0x0 0x0 0x0 0 0xf>,
-+				<8 0 0x18 0x16 0x16 0x16 0x16 0x16 0x16 0x14 0x11 0x11 0x11 0x11 0x0 0x0 0x0 0x0 0 0xf>,
-+				<9 0 0x18 0x16 0x16 0x16 0x16 0x16 0x16 0x14 0x11 0x11 0x11 0x11 0x0 0x0 0x0 0x0 0 0xf>,
-+				<10 0 0x18 0x16 0x16 0x16 0x16 0x16 0x16 0x14 0x11 0x11 0x11 0x11 0x0 0x0 0x0 0x0 0 0xf>,
-+				<11 0 0x17 0x12 0x12 0x12 0x13 0x13 0x13 0x13 0xf 0xf 0xf 0xf 0x0 0x0 0x0 0x0 0 0xf>;
-+			CN =
-+				<1 0 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0x0 0x0 0x0 0x0 0 0xf>,
-+				<2 0 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0x0 0x0 0x0 0x0 0 0xf>,
-+				<3 0 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0x0 0x0 0x0 0x0 0 0xf>,
-+				<4 0 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0x0 0x0 0x0 0x0 0 0xf>,
-+				<5 0 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0x0 0x0 0x0 0x0 0 0xf>,
-+				<6 0 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0x0 0x0 0x0 0x0 0 0xf>,
-+				<7 0 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0x0 0x0 0x0 0x0 0 0xf>,
-+				<8 0 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0x0 0x0 0x0 0x0 0 0xf>,
-+				<9 0 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0x0 0x0 0x0 0x0 0 0xf>,
-+				<10 0 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0x0 0x0 0x0 0x0 0 0xf>,
-+				<11 0 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0x0 0x0 0x0 0x0 0 0xf>,
-+				<12 0 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0x0 0x0 0x0 0x0 0 0xf>,
-+				<13 0 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0x0 0x0 0x0 0x0 0 0xf>,
-+				<14 0 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0x0 0x0 0x0 0x0 0 0xf>;
-+			ETSI =
-+				<1 0 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0x0 0x0 0x0 0x0 0 0xf>,
-+				<2 0 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0x0 0x0 0x0 0x0 0 0xf>,
-+				<3 0 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0x0 0x0 0x0 0x0 0 0xf>,
-+				<4 0 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0x0 0x0 0x0 0x0 0 0xf>,
-+				<5 0 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0x0 0x0 0x0 0x0 0 0xf>,
-+				<6 0 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0x0 0x0 0x0 0x0 0 0xf>,
-+				<7 0 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0x0 0x0 0x0 0x0 0 0xf>,
-+				<8 0 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0x0 0x0 0x0 0x0 0 0xf>,
-+				<9 0 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0x0 0x0 0x0 0x0 0 0xf>,
-+				<10 0 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0x0 0x0 0x0 0x0 0 0xf>,
-+				<11 0 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0x0 0x0 0x0 0x0 0 0xf>,
-+				<12 0 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0x0 0x0 0x0 0x0 0 0xf>,
-+				<13 0 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0x0 0x0 0x0 0x0 0 0xf>;
-+			FCC =
-+				<1 0 0x17 0x10 0x10 0x10 0xf 0xf 0xf 0xf 0xe 0xe 0xe 0xe 0x0 0x0 0x0 0x0 0 0xf>,
-+				<2 0 0x18 0x16 0x16 0x16 0x16 0x16 0x16 0x14 0x11 0x11 0x11 0x11 0x0 0x0 0x0 0x0 0 0xf>,
-+				<3 0 0x18 0x16 0x16 0x16 0x16 0x16 0x16 0x14 0x11 0x11 0x11 0x11 0x0 0x0 0x0 0x0 0 0xf>,
-+				<4 0 0x18 0x16 0x16 0x16 0x16 0x16 0x16 0x14 0x11 0x11 0x11 0x11 0x0 0x0 0x0 0x0 0 0xf>,
-+				<5 0 0x18 0x16 0x16 0x16 0x16 0x16 0x16 0x14 0x11 0x11 0x11 0x11 0x0 0x0 0x0 0x0 0 0xf>,
-+				<6 0 0x18 0x16 0x16 0x16 0x16 0x16 0x16 0x14 0x11 0x11 0x11 0x11 0x0 0x0 0x0 0x0 0 0xf>,
-+				<7 0 0x18 0x16 0x16 0x16 0x16 0x16 0x16 0x14 0x11 0x11 0x11 0x11 0x0 0x0 0x0 0x0 0 0xf>,
-+				<8 0 0x18 0x16 0x16 0x16 0x16 0x16 0x16 0x14 0x11 0x11 0x11 0x11 0x0 0x0 0x0 0x0 0 0xf>,
-+				<9 0 0x18 0x16 0x16 0x16 0x16 0x16 0x16 0x14 0x11 0x11 0x11 0x11 0x0 0x0 0x0 0x0 0 0xf>,
-+				<10 0 0x18 0x16 0x16 0x16 0x16 0x16 0x16 0x14 0x11 0x11 0x11 0x11 0x0 0x0 0x0 0x0 0 0xf>,
-+				<11 0 0x17 0x12 0x12 0x12 0x13 0x13 0x13 0x13 0xf 0xf 0xf 0xf 0x0 0x0 0x0 0x0 0 0xf>;
-+		};
-+	};
-+};
--- a/arch/arm/boot/dts/armada-385-linksys-shelby.dts
-+++ b/arch/arm/boot/dts/armada-385-linksys-shelby.dts
-@@ -142,3 +142,205 @@
- 		};
- 	};
- };
-+
-+&pcie1 {
-+	mwlwifi {
-+		marvell,chainmask = <4 4>;
-+		marvell,powertable {
-+			AU =
-+				<36 0 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0 0xf>,
-+				<40 0 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0 0xf>,
-+				<44 0 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0 0xf>,
-+				<48 0 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0 0xf>,
-+				<52 0 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0 0xf>,
-+				<56 0 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0 0xf>,
-+				<60 0 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0 0xf>,
-+				<64 0 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0 0xf>,
-+				<100 0 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0 0xf>,
-+				<104 0 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0 0xf>,
-+				<108 0 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0 0xf>,
-+				<112 0 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0 0xf>,
-+				<116 0 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0 0xf>,
-+				<120 0 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0 0xf>,
-+				<124 0 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0 0xf>,
-+				<128 0 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0 0xf>,
-+				<132 0 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0 0xf>,
-+				<136 0 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0 0xf>,
-+				<140 0 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0 0xf>,
-+				<149 0 0x19 0x19 0x19 0x17 0x19 0x19 0x16 0x15 0x19 0x19 0x16 0x15 0x19 0x19 0x16 0x15 0 0xf>,
-+				<153 0 0x19 0x19 0x19 0x17 0x19 0x19 0x16 0x15 0x19 0x19 0x16 0x15 0x19 0x19 0x16 0x15 0 0xf>,
-+				<157 0 0x19 0x19 0x19 0x17 0x19 0x19 0x16 0x15 0x19 0x19 0x16 0x15 0x19 0x19 0x16 0x15 0 0xf>,
-+				<161 0 0x19 0x19 0x19 0x17 0x19 0x19 0x16 0x15 0x19 0x19 0x16 0x15 0x19 0x19 0x16 0x15 0 0xf>,
-+				<165 0 0x19 0x19 0x19 0x17 0x19 0x19 0x16 0x15 0x19 0x19 0x16 0x15 0x19 0x19 0x16 0x15 0 0xf>;
-+			CA =
-+				<36 0 0x9 0x9 0x9 0x9 0x9 0x9 0x9 0x9 0x9 0x9 0x9 0x9 0x9 0x9 0x9 0x9 0 0xf>,
-+				<40 0 0x9 0x9 0x9 0x9 0x9 0x9 0x9 0x9 0x9 0x9 0x9 0x9 0x9 0x9 0x9 0x9 0 0xf>,
-+				<44 0 0x9 0x9 0x9 0x9 0x9 0x9 0x9 0x9 0x9 0x9 0x9 0x9 0x9 0x9 0x9 0x9 0 0xf>,
-+				<48 0 0x9 0x9 0x9 0x9 0x9 0x9 0x9 0x9 0x9 0x9 0x9 0x9 0x9 0x9 0x9 0x9 0 0xf>,
-+				<52 0 0x11 0x11 0x11 0x11 0x10 0x10 0x10 0x10 0x12 0x12 0x12 0x12 0x10 0x10 0x10 0x10 0 0xf>,
-+				<56 0 0x11 0x11 0x11 0x11 0x10 0x10 0x10 0x10 0x12 0x12 0x12 0x12 0x10 0x10 0x10 0x10 0 0xf>,
-+				<60 0 0x11 0x11 0x11 0x11 0x10 0x10 0x10 0x10 0x12 0x12 0x12 0x12 0x10 0x10 0x10 0x10 0 0xf>,
-+				<64 0 0x11 0x11 0x11 0x11 0x10 0x10 0x10 0x10 0x12 0x12 0x12 0x12 0x10 0x10 0x10 0x10 0 0xf>,
-+				<100 0 0x10 0x10 0x10 0x10 0x11 0x11 0x11 0x11 0x12 0x12 0x12 0x12 0x10 0x10 0x10 0x10 0 0xf>,
-+				<104 0 0x11 0x11 0x11 0x11 0x10 0x10 0x10 0x10 0x12 0x12 0x12 0x12 0x10 0x10 0x10 0x10 0 0xf>,
-+				<108 0 0x11 0x11 0x11 0x11 0x10 0x10 0x10 0x10 0x11 0x11 0x11 0x11 0x10 0x10 0x10 0x10 0 0xf>,
-+				<112 0 0x11 0x11 0x11 0x11 0x10 0x10 0x10 0x10 0x11 0x11 0x11 0x11 0x10 0x10 0x10 0x10 0 0xf>,
-+				<116 0 0x11 0x11 0x11 0x11 0x10 0x10 0x10 0x10 0x11 0x11 0x11 0x11 0x10 0x10 0x10 0x10 0 0xf>,
-+				<120 0 0x11 0x11 0x11 0x11 0x10 0x10 0x10 0x10 0x11 0x11 0x11 0x11 0x10 0x10 0x10 0x10 0 0xf>,
-+				<124 0 0x11 0x11 0x11 0x11 0x10 0x10 0x10 0x10 0x11 0x11 0x11 0x11 0x10 0x10 0x10 0x10 0 0xf>,
-+				<128 0 0x11 0x11 0x11 0x11 0x10 0x10 0x10 0x10 0x11 0x11 0x11 0x11 0x10 0x10 0x10 0x10 0 0xf>,
-+				<132 0 0x11 0x11 0x11 0x11 0x10 0x10 0x10 0x10 0x11 0x11 0x11 0x11 0x10 0x10 0x10 0x10 0 0xf>,
-+				<136 0 0x11 0x11 0x11 0x11 0x10 0x10 0x10 0x10 0x11 0x11 0x11 0x11 0x10 0x10 0x10 0x10 0 0xf>,
-+				<140 0 0x11 0x11 0x11 0x11 0x10 0x10 0x10 0x10 0x11 0x11 0x11 0x11 0x10 0x10 0x10 0x10 0 0xf>,
-+				<149 0 0x16 0x16 0x16 0x16 0x16 0x16 0x16 0x16 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0 0xf>,
-+				<153 0 0x16 0x16 0x16 0x16 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0 0xf>,
-+				<157 0 0x16 0x16 0x16 0x16 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0 0xf>,
-+				<161 0 0x16 0x16 0x16 0x16 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0 0xf>,
-+				<165 0 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0 0xf>;
-+			CN =
-+				<36 0 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0 0xf>,
-+				<40 0 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0 0xf>,
-+				<44 0 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0 0xf>,
-+				<48 0 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0 0xf>,
-+				<52 0 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0 0xf>,
-+				<56 0 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0 0xf>,
-+				<60 0 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0 0xf>,
-+				<64 0 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0 0xf>,
-+				<100 0 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0 0xf>,
-+				<104 0 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0 0xf>,
-+				<108 0 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0 0xf>,
-+				<112 0 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0 0xf>,
-+				<116 0 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0 0xf>,
-+				<120 0 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0 0xf>,
-+				<124 0 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0 0xf>,
-+				<128 0 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0 0xf>,
-+				<132 0 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0 0xf>,
-+				<136 0 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0 0xf>,
-+				<140 0 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0 0xf>,
-+				<149 0 0x14 0x14 0x14 0x14 0x13 0x13 0x13 0x13 0x11 0x11 0x11 0x11 0x10 0x10 0x10 0x10 0 0xf>,
-+				<153 0 0x16 0x16 0x16 0x16 0x15 0x15 0x15 0x15 0x14 0x14 0x14 0x14 0x10 0x10 0x10 0x10 0 0xf>,
-+				<157 0 0x16 0x16 0x16 0x16 0x15 0x15 0x15 0x15 0x14 0x14 0x14 0x14 0x10 0x10 0x10 0x10 0 0xf>,
-+				<161 0 0x16 0x16 0x16 0x16 0x15 0x15 0x15 0x15 0x14 0x14 0x14 0x14 0x10 0x10 0x10 0x10 0 0xf>,
-+				<165 0 0x13 0x13 0x13 0x13 0x13 0x13 0x13 0x13 0x14 0x14 0x14 0x14 0x10 0x10 0x10 0x10 0 0xf>;
-+			ETSI =
-+				<36 0 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0 0xf>,
-+				<40 0 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0 0xf>,
-+				<44 0 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0 0xf>,
-+				<48 0 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0 0xf>,
-+				<52 0 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0 0xf>,
-+				<56 0 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0 0xf>,
-+				<60 0 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0 0xf>,
-+				<64 0 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0 0xf>,
-+				<100 0 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0 0xf>,
-+				<104 0 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0 0xf>,
-+				<108 0 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0 0xf>,
-+				<112 0 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0 0xf>,
-+				<116 0 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0 0xf>,
-+				<120 0 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0 0xf>,
-+				<124 0 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0 0xf>,
-+				<128 0 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0 0xf>,
-+				<132 0 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0 0xf>,
-+				<136 0 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0 0xf>,
-+				<140 0 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0 0xf>,
-+				<149 0 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0 0xf>;
-+			FCC =
-+				<36 0 0x12 0x12 0x12 0x12 0x12 0x12 0x12 0x12 0x10 0x10 0x10 0x10 0xf 0xf 0xf 0xf 0 0xf>,
-+				<40 0 0x16 0x16 0x16 0x16 0x16 0x16 0x16 0x16 0x16 0x16 0x16 0x16 0xf 0xf 0xf 0xf 0 0xf>,
-+				<44 0 0x16 0x16 0x16 0x16 0x16 0x16 0x16 0x16 0x16 0x16 0x16 0x16 0xf 0xf 0xf 0xf 0 0xf>,
-+				<48 0 0x16 0x16 0x16 0x16 0x16 0x16 0x16 0x16 0x16 0x16 0x16 0x16 0xf 0xf 0xf 0xf 0 0xf>,
-+				<52 0 0x11 0x11 0x11 0x11 0x10 0x10 0x10 0x10 0x12 0x12 0x12 0x12 0x10 0x10 0x10 0x10 0 0xf>,
-+				<56 0 0x11 0x11 0x11 0x11 0x10 0x10 0x10 0x10 0x12 0x12 0x12 0x12 0x10 0x10 0x10 0x10 0 0xf>,
-+				<60 0 0x11 0x11 0x11 0x11 0x10 0x10 0x10 0x10 0x12 0x12 0x12 0x12 0x10 0x10 0x10 0x10 0 0xf>,
-+				<64 0 0x11 0x11 0x11 0x11 0x10 0x10 0x10 0x10 0x12 0x12 0x12 0x12 0x10 0x10 0x10 0x10 0 0xf>,
-+				<100 0 0x10 0x10 0x10 0x10 0x11 0x11 0x11 0x11 0x12 0x12 0x12 0x12 0x10 0x10 0x10 0x10 0 0xf>,
-+				<104 0 0x11 0x11 0x11 0x11 0x10 0x10 0x10 0x10 0x12 0x12 0x12 0x12 0x10 0x10 0x10 0x10 0 0xf>,
-+				<108 0 0x11 0x11 0x11 0x11 0x10 0x10 0x10 0x10 0x11 0x11 0x11 0x11 0x10 0x10 0x10 0x10 0 0xf>,
-+				<112 0 0x11 0x11 0x11 0x11 0x10 0x10 0x10 0x10 0x11 0x11 0x11 0x11 0x10 0x10 0x10 0x10 0 0xf>,
-+				<116 0 0x11 0x11 0x11 0x11 0x10 0x10 0x10 0x10 0x11 0x11 0x11 0x11 0x10 0x10 0x10 0x10 0 0xf>,
-+				<120 0 0x11 0x11 0x11 0x11 0x10 0x10 0x10 0x10 0x11 0x11 0x11 0x11 0x10 0x10 0x10 0x10 0 0xf>,
-+				<124 0 0x11 0x11 0x11 0x11 0x10 0x10 0x10 0x10 0x11 0x11 0x11 0x11 0x10 0x10 0x10 0x10 0 0xf>,
-+				<128 0 0x11 0x11 0x11 0x11 0x10 0x10 0x10 0x10 0x11 0x11 0x11 0x11 0x10 0x10 0x10 0x10 0 0xf>,
-+				<132 0 0x11 0x11 0x11 0x11 0x10 0x10 0x10 0x10 0x11 0x11 0x11 0x11 0x10 0x10 0x10 0x10 0 0xf>,
-+				<136 0 0x11 0x11 0x11 0x11 0x10 0x10 0x10 0x10 0x11 0x11 0x11 0x11 0x10 0x10 0x10 0x10 0 0xf>,
-+				<140 0 0x11 0x11 0x11 0x11 0x10 0x10 0x10 0x10 0x11 0x11 0x11 0x11 0x10 0x10 0x10 0x10 0 0xf>,
-+				<149 0 0x16 0x16 0x16 0x16 0x16 0x16 0x16 0x16 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0 0xf>,
-+				<153 0 0x16 0x16 0x16 0x16 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0 0xf>,
-+				<157 0 0x16 0x16 0x16 0x16 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0 0xf>,
-+				<161 0 0x16 0x16 0x16 0x16 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0 0xf>,
-+				<165 0 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0 0xf>;
-+		};
-+	};
-+};
-+
-+&pcie2 {
-+	mwlwifi {
-+		marvell,chainmask = <4 4>;
-+		marvell,powertable {
-+			AU =
-+				<1 0 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0x0 0x0 0x0 0x0 0 0xf>,
-+				<2 0 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0x0 0x0 0x0 0x0 0 0xf>,
-+				<3 0 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0x0 0x0 0x0 0x0 0 0xf>,
-+				<4 0 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0x0 0x0 0x0 0x0 0 0xf>,
-+				<5 0 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0x0 0x0 0x0 0x0 0 0xf>,
-+				<6 0 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0x0 0x0 0x0 0x0 0 0xf>,
-+				<7 0 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0x0 0x0 0x0 0x0 0 0xf>,
-+				<8 0 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0x0 0x0 0x0 0x0 0 0xf>,
-+				<9 0 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0x0 0x0 0x0 0x0 0 0xf>,
-+				<10 0 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0x0 0x0 0x0 0x0 0 0xf>,
-+				<11 0 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0x0 0x0 0x0 0x0 0 0xf>;
-+			CA =
-+				<1 0 0x17 0x10 0x10 0x10 0xf 0xf 0xf 0xf 0xe 0xe 0xe 0xe 0x0 0x0 0x0 0x0 0 0xf>,
-+				<2 0 0x18 0x16 0x16 0x16 0x16 0x16 0x16 0x14 0x11 0x11 0x11 0x11 0x0 0x0 0x0 0x0 0 0xf>,
-+				<3 0 0x18 0x16 0x16 0x16 0x16 0x16 0x16 0x14 0x11 0x11 0x11 0x11 0x0 0x0 0x0 0x0 0 0xf>,
-+				<4 0 0x18 0x16 0x16 0x16 0x16 0x16 0x16 0x14 0x11 0x11 0x11 0x11 0x0 0x0 0x0 0x0 0 0xf>,
-+				<5 0 0x18 0x16 0x16 0x16 0x16 0x16 0x16 0x14 0x11 0x11 0x11 0x11 0x0 0x0 0x0 0x0 0 0xf>,
-+				<6 0 0x18 0x16 0x16 0x16 0x16 0x16 0x16 0x14 0x11 0x11 0x11 0x11 0x0 0x0 0x0 0x0 0 0xf>,
-+				<7 0 0x18 0x16 0x16 0x16 0x16 0x16 0x16 0x14 0x11 0x11 0x11 0x11 0x0 0x0 0x0 0x0 0 0xf>,
-+				<8 0 0x18 0x16 0x16 0x16 0x16 0x16 0x16 0x14 0x11 0x11 0x11 0x11 0x0 0x0 0x0 0x0 0 0xf>,
-+				<9 0 0x18 0x16 0x16 0x16 0x16 0x16 0x16 0x14 0x11 0x11 0x11 0x11 0x0 0x0 0x0 0x0 0 0xf>,
-+				<10 0 0x18 0x16 0x16 0x16 0x16 0x16 0x16 0x14 0x11 0x11 0x11 0x11 0x0 0x0 0x0 0x0 0 0xf>,
-+				<11 0 0x17 0x12 0x12 0x12 0x13 0x13 0x13 0x13 0xf 0xf 0xf 0xf 0x0 0x0 0x0 0x0 0 0xf>;
-+			CN =
-+				<1 0 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0x0 0x0 0x0 0x0 0 0xf>,
-+				<2 0 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0x0 0x0 0x0 0x0 0 0xf>,
-+				<3 0 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0x0 0x0 0x0 0x0 0 0xf>,
-+				<4 0 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0x0 0x0 0x0 0x0 0 0xf>,
-+				<5 0 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0x0 0x0 0x0 0x0 0 0xf>,
-+				<6 0 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0x0 0x0 0x0 0x0 0 0xf>,
-+				<7 0 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0x0 0x0 0x0 0x0 0 0xf>,
-+				<8 0 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0x0 0x0 0x0 0x0 0 0xf>,
-+				<9 0 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0x0 0x0 0x0 0x0 0 0xf>,
-+				<10 0 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0x0 0x0 0x0 0x0 0 0xf>,
-+				<11 0 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0x0 0x0 0x0 0x0 0 0xf>,
-+				<12 0 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0x0 0x0 0x0 0x0 0 0xf>,
-+				<13 0 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0x0 0x0 0x0 0x0 0 0xf>,
-+				<14 0 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0x0 0x0 0x0 0x0 0 0xf>;
-+			ETSI =
-+				<1 0 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0x0 0x0 0x0 0x0 0 0xf>,
-+				<2 0 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0x0 0x0 0x0 0x0 0 0xf>,
-+				<3 0 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0x0 0x0 0x0 0x0 0 0xf>,
-+				<4 0 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0x0 0x0 0x0 0x0 0 0xf>,
-+				<5 0 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0x0 0x0 0x0 0x0 0 0xf>,
-+				<6 0 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0x0 0x0 0x0 0x0 0 0xf>,
-+				<7 0 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0x0 0x0 0x0 0x0 0 0xf>,
-+				<8 0 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0x0 0x0 0x0 0x0 0 0xf>,
-+				<9 0 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0x0 0x0 0x0 0x0 0 0xf>,
-+				<10 0 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0x0 0x0 0x0 0x0 0 0xf>,
-+				<11 0 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0x0 0x0 0x0 0x0 0 0xf>,
-+				<12 0 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0x0 0x0 0x0 0x0 0 0xf>,
-+				<13 0 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0x0 0x0 0x0 0x0 0 0xf>;
-+			FCC =
-+				<1 0 0x17 0x10 0x10 0x10 0xf 0xf 0xf 0xf 0xe 0xe 0xe 0xe 0x0 0x0 0x0 0x0 0 0xf>,
-+				<2 0 0x18 0x16 0x16 0x16 0x16 0x16 0x16 0x14 0x11 0x11 0x11 0x11 0x0 0x0 0x0 0x0 0 0xf>,
-+				<3 0 0x18 0x16 0x16 0x16 0x16 0x16 0x16 0x14 0x11 0x11 0x11 0x11 0x0 0x0 0x0 0x0 0 0xf>,
-+				<4 0 0x18 0x16 0x16 0x16 0x16 0x16 0x16 0x14 0x11 0x11 0x11 0x11 0x0 0x0 0x0 0x0 0 0xf>,
-+				<5 0 0x18 0x16 0x16 0x16 0x16 0x16 0x16 0x14 0x11 0x11 0x11 0x11 0x0 0x0 0x0 0x0 0 0xf>,
-+				<6 0 0x18 0x16 0x16 0x16 0x16 0x16 0x16 0x14 0x11 0x11 0x11 0x11 0x0 0x0 0x0 0x0 0 0xf>,
-+				<7 0 0x18 0x16 0x16 0x16 0x16 0x16 0x16 0x14 0x11 0x11 0x11 0x11 0x0 0x0 0x0 0x0 0 0xf>,
-+				<8 0 0x18 0x16 0x16 0x16 0x16 0x16 0x16 0x14 0x11 0x11 0x11 0x11 0x0 0x0 0x0 0x0 0 0xf>,
-+				<9 0 0x18 0x16 0x16 0x16 0x16 0x16 0x16 0x14 0x11 0x11 0x11 0x11 0x0 0x0 0x0 0x0 0 0xf>,
-+				<10 0 0x18 0x16 0x16 0x16 0x16 0x16 0x16 0x14 0x11 0x11 0x11 0x11 0x0 0x0 0x0 0x0 0 0xf>,
-+				<11 0 0x17 0x12 0x12 0x12 0x13 0x13 0x13 0x13 0xf 0xf 0xf 0xf 0x0 0x0 0x0 0x0 0 0xf>;
-+		};
-+	};
-+};
--- a/arch/arm/boot/dts/armada-385-linksys-rango.dts
-+++ b/arch/arm/boot/dts/armada-385-linksys-rango.dts
-@@ -157,6 +157,18 @@
- 	};
- };
- 
-+&pcie1 {
-+	mwlwifi {
-+		marvell,chainmask = <4 4>;
-+	};
-+};
-+
-+&pcie2 {
-+	mwlwifi {
-+		marvell,chainmask = <4 4>;
-+	};
-+};
-+
- &sdhci {
- 	pinctrl-names = "default";
- 	pinctrl-0 = <&sdhci_pins>;
--- a/arch/arm/boot/dts/armada-xp-linksys-mamba.dts
-+++ b/arch/arm/boot/dts/armada-xp-linksys-mamba.dts
-@@ -272,12 +272,100 @@
- 	pcie@2,0 {
- 		/* Port 0, Lane 1 */
- 		status = "okay";
-+
-+		mwlwifi {
-+			marvell,5ghz = <0>;
-+			marvell,chainmask = <4 4>;
-+			marvell,powertable {
-+				FCC =
-+					<1 0 0x17 0x11 0x11 0x11 0x10 0x10 0x10 0x10 0xf 0xf 0xf 0xf 0x0 0x0 0x0 0x0 0 0xf>,
-+					<2 0 0x17 0x16 0x16 0x16 0x16 0x16 0x16 0x14 0x10 0x10 0x10 0x10 0x0 0x0 0x0 0x0 0 0xf>,
-+					<3 0 0x17 0x16 0x16 0x16 0x16 0x16 0x16 0x14 0x10 0x10 0x10 0x10 0x0 0x0 0x0 0x0 0 0xf>,
-+					<4 0 0x17 0x16 0x16 0x16 0x16 0x16 0x16 0x14 0x10 0x10 0x10 0x10 0x0 0x0 0x0 0x0 0 0xf>,
-+					<5 0 0x17 0x16 0x16 0x16 0x16 0x16 0x16 0x14 0x10 0x10 0x10 0x10 0x0 0x0 0x0 0x0 0 0xf>,
-+					<6 0 0x17 0x16 0x16 0x16 0x16 0x16 0x16 0x14 0x10 0x10 0x10 0x10 0x0 0x0 0x0 0x0 0 0xf>,
-+					<7 0 0x17 0x16 0x16 0x16 0x16 0x16 0x16 0x14 0x10 0x10 0x10 0x10 0x0 0x0 0x0 0x0 0 0xf>,
-+					<8 0 0x17 0x16 0x16 0x16 0x16 0x16 0x16 0x14 0x10 0x10 0x10 0x10 0x0 0x0 0x0 0x0 0 0xf>,
-+					<9 0 0x17 0x16 0x16 0x16 0x16 0x16 0x16 0x14 0x10 0x10 0x10 0x10 0x0 0x0 0x0 0x0 0 0xf>,
-+					<10 0 0x17 0x16 0x16 0x16 0x16 0x16 0x16 0x14 0x10 0x10 0x10 0x10 0x0 0x0 0x0 0x0 0 0xf>,
-+					<11 0 0x17 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x10 0x10 0x10 0x10 0x0 0x0 0x0 0x0 0 0xf>;
-+
-+				ETSI =
-+					<1 0 0xb 0xb 0xb 0xb 0xb 0xb 0xb 0xb 0xb 0xb 0xb 0xb 0x0 0x0 0x0 0x0 0 0xf>,
-+					<2 0 0xb 0xb 0xb 0xb 0xb 0xb 0xb 0xb 0xb 0xb 0xb 0xb 0x0 0x0 0x0 0x0 0 0xf>,
-+					<3 0 0xb 0xb 0xb 0xb 0xb 0xb 0xb 0xb 0xb 0xb 0xb 0xb 0x0 0x0 0x0 0x0 0 0xf>,
-+					<4 0 0xb 0xb 0xb 0xb 0xb 0xb 0xb 0xb 0xb 0xb 0xb 0xb 0x0 0x0 0x0 0x0 0 0xf>,
-+					<5 0 0xb 0xb 0xb 0xb 0xb 0xb 0xb 0xb 0xb 0xb 0xb 0xb 0x0 0x0 0x0 0x0 0 0xf>,
-+					<6 0 0xb 0xb 0xb 0xb 0xb 0xb 0xb 0xb 0xb 0xb 0xb 0xb 0x0 0x0 0x0 0x0 0 0xf>,
-+					<7 0 0xb 0xb 0xb 0xb 0xb 0xb 0xb 0xb 0xb 0xb 0xb 0xb 0x0 0x0 0x0 0x0 0 0xf>,
-+					<8 0 0xb 0xb 0xb 0xb 0xb 0xb 0xb 0xb 0xb 0xb 0xb 0xb 0x0 0x0 0x0 0x0 0 0xf>,
-+					<9 0 0xb 0xb 0xb 0xb 0xb 0xb 0xb 0xb 0xb 0xb 0xb 0xb 0x0 0x0 0x0 0x0 0 0xf>,
-+					<10 0 0xb 0xb 0xb 0xb 0xb 0xb 0xb 0xb 0xb 0xb 0xb 0xb 0x0 0x0 0x0 0x0 0 0xf>,
-+					<11 0 0xb 0xb 0xb 0xb 0xb 0xb 0xb 0xb 0xb 0xb 0xb 0xb 0x0 0x0 0x0 0x0 0 0xf>,
-+					<12 0 0xb 0xb 0xb 0xb 0xb 0xb 0xb 0xb 0xb 0xb 0xb 0xb 0x0 0x0 0x0 0x0 0 0xf>,
-+					<13 0 0xb 0xb 0xb 0xb 0xb 0xb 0xb 0xb 0xb 0xb 0xb 0xb 0x0 0x0 0x0 0x0 0 0xf>;
-+			};
-+		};
- 	};
- 
- 	/* Second mini-PCIe port */
- 	pcie@3,0 {
- 		/* Port 0, Lane 3 */
- 		status = "okay";
-+
-+		mwlwifi {
-+			marvell,2ghz = <0>;
-+			marvell,chainmask = <4 4>;
-+			marvell,powertable {
-+				FCC =
-+					<36 0 0x8 0x8 0x8 0x8 0x8 0x8 0x8 0x8 0x9 0x9 0x9 0x9 0x9 0x9 0x9 0x9 0 0xf>,
-+					<40 0 0x8 0x8 0x8 0x8 0x9 0x9 0x9 0x9 0x9 0x9 0x9 0x9 0x9 0x9 0x9 0x9 0 0xf>,
-+					<44 0 0x8 0x8 0x8 0x8 0x9 0x9 0x9 0x9 0x9 0x9 0x9 0x9 0x9 0x9 0x9 0x9 0 0xf>,
-+					<48 0 0x8 0x8 0x8 0x8 0x9 0x9 0x9 0x9 0x9 0x9 0x9 0x9 0x9 0x9 0x9 0x9 0 0xf>,
-+					<52 0 0xf 0xf 0xf 0xf 0xf 0xf 0xf 0xf 0x12 0x12 0x12 0x12 0x12 0x12 0x12 0x12 0 0xf>,
-+					<56 0 0xf 0xf 0xf 0xf 0xf 0xf 0xf 0xf 0x12 0x12 0x12 0x12 0x12 0x12 0x12 0x12 0 0xf>,
-+					<60 0 0xf 0xf 0xf 0xf 0xf 0xf 0xf 0xf 0x12 0x12 0x12 0x12 0x12 0x12 0x12 0x12 0 0xf>,
-+					<64 0 0xf 0xf 0xf 0xf 0xf 0xf 0xf 0xf 0x12 0x12 0x12 0x12 0x12 0x12 0x12 0x12 0 0xf>,
-+					<100 0 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0 0xf>,
-+					<104 0 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0 0xf>,
-+					<108 0 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0 0xf>,
-+					<112 0 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0 0xf>,
-+					<116 0 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0 0xf>,
-+					<120 0 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0 0xf>,
-+					<124 0 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0 0xf>,
-+					<128 0 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0 0xf>,
-+					<132 0 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0 0xf>,
-+					<136 0 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0 0xf>,
-+					<140 0 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0 0xf>,
-+					<149 0 0x16 0x16 0x16 0x16 0x14 0x14 0x14 0x14 0x15 0x15 0x15 0x15 0x14 0x14 0x14 0x14 0 0xf>,
-+					<153 0 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0x14 0x14 0x14 0x14 0 0xf>,
-+					<157 0 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0x14 0x14 0x14 0x14 0 0xf>,
-+					<161 0 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0x14 0x14 0x14 0x14 0 0xf>,
-+					<165 0 0x16 0x16 0x16 0x16 0x16 0x16 0x16 0x16 0x15 0x15 0x15 0x15 0x14 0x14 0x14 0x14 0 0xf>;
-+
-+				ETSI =
-+					<36 0 0xc 0xc 0xc 0xc 0xc 0xc 0xc 0xc 0xd 0xd 0xd 0xd 0xc 0xc 0xc 0xc 0 0xf>,
-+					<40 0 0xc 0xc 0xc 0xc 0xc 0xc 0xc 0xc 0xd 0xd 0xd 0xd 0xc 0xc 0xc 0xc 0 0xf>,
-+					<44 0 0xc 0xc 0xc 0xc 0xc 0xc 0xc 0xc 0xd 0xd 0xd 0xd 0xc 0xc 0xc 0xc 0 0xf>,
-+					<48 0 0xc 0xc 0xc 0xc 0xc 0xc 0xc 0xc 0xd 0xd 0xd 0xd 0xc 0xc 0xc 0xc 0 0xf>,
-+					<52 0 0xc 0xc 0xc 0xc 0xc 0xc 0xc 0xc 0xd 0xd 0xd 0xd 0xc 0xc 0xc 0xc 0 0xf>,
-+					<56 0 0xc 0xc 0xc 0xc 0xc 0xc 0xc 0xc 0xd 0xd 0xd 0xd 0xc 0xc 0xc 0xc 0 0xf>,
-+					<60 0 0xc 0xc 0xc 0xc 0xc 0xc 0xc 0xc 0xd 0xd 0xd 0xd 0xc 0xc 0xc 0xc 0 0xf>,
-+					<64 0 0xc 0xc 0xc 0xc 0xc 0xc 0xc 0xc 0xd 0xd 0xd 0xd 0xc 0xc 0xc 0xc 0 0xf>,
-+					<100 0 0xc 0xc 0xc 0xc 0xc 0xc 0xc 0xc 0xd 0xd 0xd 0xd 0xc 0xc 0xc 0xc 0 0xf>,
-+					<104 0 0xc 0xc 0xc 0xc 0xc 0xc 0xc 0xc 0xd 0xd 0xd 0xd 0xc 0xc 0xc 0xc 0 0xf>,
-+					<108 0 0xc 0xc 0xc 0xc 0xc 0xc 0xc 0xc 0xd 0xd 0xd 0xd 0xc 0xc 0xc 0xc 0 0xf>,
-+					<112 0 0xc 0xc 0xc 0xc 0xc 0xc 0xc 0xc 0xd 0xd 0xd 0xd 0xc 0xc 0xc 0xc 0 0xf>,
-+					<116 0 0xc 0xc 0xc 0xc 0xc 0xc 0xc 0xc 0xd 0xd 0xd 0xd 0xc 0xc 0xc 0xc 0 0xf>,
-+					<120 0 0xc 0xc 0xc 0xc 0xc 0xc 0xc 0xc 0xd 0xd 0xd 0xd 0xc 0xc 0xc 0xc 0 0xf>,
-+					<124 0 0xc 0xc 0xc 0xc 0xc 0xc 0xc 0xc 0xd 0xd 0xd 0xd 0xc 0xc 0xc 0xc 0 0xf>,
-+					<128 0 0xc 0xc 0xc 0xc 0xc 0xc 0xc 0xc 0xd 0xd 0xd 0xd 0xc 0xc 0xc 0xc 0 0xf>,
-+					<132 0 0xc 0xc 0xc 0xc 0xc 0xc 0xc 0xc 0xd 0xd 0xd 0xd 0xc 0xc 0xc 0xc 0 0xf>,
-+					<136 0 0xc 0xc 0xc 0xc 0xc 0xc 0xc 0xc 0xd 0xd 0xd 0xd 0xc 0xc 0xc 0xc 0 0xf>,
-+					<140 0 0xc 0xc 0xc 0xc 0xc 0xc 0xc 0xc 0xd 0xd 0xd 0xd 0xc 0xc 0xc 0xc 0 0xf>,
-+					<149 0 0xc 0xc 0xc 0xc 0xc 0xc 0xc 0xc 0xd 0xd 0xd 0xd 0xc 0xc 0xc 0xc 0 0xf>;
-+			};
-+		};
- 	};
- };
- 
--- a/root/target/linux/mvebu/patches-4.19/003-add_switch_nodes.patch
+++ b/root/target/linux/mvebu/patches-4.19/003-add_switch_nodes.patch
@ -1,40 +0,0 @@
--- a/arch/arm/boot/dts/armada-xp-linksys-mamba.dts
-+++ b/arch/arm/boot/dts/armada-xp-linksys-mamba.dts
-@@ -257,6 +257,16 @@
- 			};
- 		};
- 	};
-+
-+	mvsw61xx {
-+		compatible = "marvell,88e6172";
-+		status = "okay";
-+		reg = <0x10>;
-+
-+		mii-bus = <&mdio>;
-+		cpu-port-0 = <5>;
-+		cpu-port-1 = <6>;
-+	};
- };
- 
- &pciec {
--- a/arch/arm/boot/dts/armada-385-linksys.dtsi
-+++ b/arch/arm/boot/dts/armada-385-linksys.dtsi
-@@ -82,6 +82,18 @@
- 			linux,default-trigger = "disk-activity";
- 		};
- 	};
-+
-+	mvsw61xx {
-+		#address-cells = <1>;
-+		#size-cells = <0>;
-+		compatible = "marvell,88e6176";
-+		status = "okay";
-+		reg = <0x10>;
-+
-+		mii-bus = <&mdio>;
-+		cpu-port-0 = <5>;
-+		cpu-port-1 = <6>;
-+	};
- };
- 
- &ahci0 {
--- a/root/target/linux/mvebu/patches-4.19/004-add_sata_disk_activity_trigger.patch
+++ b/root/target/linux/mvebu/patches-4.19/004-add_sata_disk_activity_trigger.patch
@ -1,39 +0,0 @@
-From 172230195068703b78ad5733a09492f5d6814c09 Mon Sep 17 00:00:00 2001
-From: Ansuel Smith <ansuelsmth@gmail.com>
-Date: Tue, 28 Feb 2017 14:15:50 +0100
-Subject: [PATCH] ARM: dts: armada: Add default trigger for sata led
-
-In others board we have the sata led set to function
-with the sata led trigger by default.
-This patch makes the same for these board that have sata
-led but get disabled by not associating it to any trigger.
-
-Signed-off-by: Ansuel Smith <ansuelsmth@gmail.com>
-Acked-by: Jason Cooper <jason@lakedaemon.net>
-Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com>
---
- arch/arm/boot/dts/armada-385-linksys-caiman.dts | 1 +
- arch/arm/boot/dts/armada-385-linksys-cobra.dts  | 1 +
- arch/arm/boot/dts/armada-xp-linksys-mamba.dts   | 1 +
- 3 files changed, 3 insertions(+)
-
--- a/arch/arm/boot/dts/armada-385-linksys-caiman.dts
-+++ b/arch/arm/boot/dts/armada-385-linksys-caiman.dts
-@@ -68,6 +68,7 @@
- 
- 	sata {
- 		label = "caiman:white:sata";
-+		linux,default-trigger = "disk-activity";
- 	};
- };
- 
--- a/arch/arm/boot/dts/armada-385-linksys-cobra.dts
-+++ b/arch/arm/boot/dts/armada-385-linksys-cobra.dts
-@@ -68,6 +68,7 @@
- 
- 	sata {
- 		label = "cobra:white:sata";
-+		linux,default-trigger = "disk-activity";
- 	};
- };
- 
--- a/root/target/linux/mvebu/patches-4.19/005-linksys_hardcode_nand_ecc_settings.patch
+++ b/root/target/linux/mvebu/patches-4.19/005-linksys_hardcode_nand_ecc_settings.patch
@ -1,17 +0,0 @@
-Newer Linksys boards might come with a Winbond W29N02GV which can be
-configured in different ways. Make sure we configure it the same way
-as the older chips so everything keeps working.
-
-Signed-off-by: Imre Kaloz <kaloz@openwrt.org>
-
--- a/arch/arm/boot/dts/armada-385-linksys.dtsi
-+++ b/arch/arm/boot/dts/armada-385-linksys.dtsi
-@@ -160,6 +160,8 @@
- 		reg = <0>;
- 		label = "pxa3xx_nand-0";
- 		nand-rb = <0>;
-+		nand-ecc-strength = <4>;
-+		nand-ecc-step-size = <512>;
- 		marvell,nand-keep-config;
- 		nand-on-flash-bbt;
- 	};
--- a/root/target/linux/mvebu/patches-4.19/006-mvebu-Mangle-bootloader-s-kernel-arguments.patch
+++ b/root/target/linux/mvebu/patches-4.19/006-mvebu-Mangle-bootloader-s-kernel-arguments.patch
@ -1,201 +0,0 @@
-From 71270226b14733a4b1f2cde58ea9265caa50b38d Mon Sep 17 00:00:00 2001
-From: Adrian Panella <ianchi74@outlook.com>
-Date: Thu, 9 Mar 2017 09:37:17 +0100
-Subject: [PATCH 67/69] generic: Mangle bootloader's kernel arguments
-
-The command-line arguments provided by the boot loader will be
-appended to a new device tree property: bootloader-args.
-If there is a property "append-rootblock" in DT under /chosen
-and a root= option in bootloaders command line it will be parsed
-and added to DT bootargs with the form: <append-rootblock>XX.
-Only command line ATAG will be processed, the rest of the ATAGs
-sent by bootloader will be ignored.
-This is usefull in dual boot systems, to get the current root partition
-without afecting the rest of the system.
-
-Signed-off-by: Adrian Panella <ianchi74@outlook.com>
-
-This patch has been modified to be mvebu specific. The original patch 
-did not pass the bootloader cmdline on if no append-rootblock stanza 
-was found, resulting in blank cmdline and failure to boot.
-
-Signed-off-by: Michael Gray <michael.gray@lantisproject.com>
---
- arch/arm/Kconfig                        | 11 +++++
- arch/arm/boot/compressed/atags_to_fdt.c | 72 ++++++++++++++++++++++++++++++++-
- init/main.c                             | 16 ++++++++
- 3 files changed, 98 insertions(+), 1 deletion(-)
-
--- a/arch/arm/Kconfig
-+++ b/arch/arm/Kconfig
-@@ -1922,6 +1922,17 @@
- 	  The command-line arguments provided by the boot loader will be
- 	  appended to the the device tree bootargs property.
- 
-+config ARM_ATAG_DTB_COMPAT_CMDLINE_MANGLE
-+	bool "Append rootblock parsing bootloader's kernel arguments"
-+	help
-+	  The command-line arguments provided by the boot loader will be
-+	  appended to a new device tree property: bootloader-args.
-+	  If there is a property "append-rootblock" in DT under /chosen 
-+	  and a root= option in bootloaders command line it will be parsed 
-+	  and added to DT bootargs with the form: <append-rootblock>XX.
-+	  Only command line ATAG will be processed, the rest of the ATAGs
-+	  sent by bootloader will be ignored.
-+
- endchoice
- 
- config CMDLINE
--- a/arch/arm/boot/compressed/atags_to_fdt.c
-+++ b/arch/arm/boot/compressed/atags_to_fdt.c
-@@ -4,6 +4,8 @@
- 
- #if defined(CONFIG_ARM_ATAG_DTB_COMPAT_CMDLINE_EXTEND)
- #define do_extend_cmdline 1
-+#elif defined(CONFIG_ARM_ATAG_DTB_COMPAT_CMDLINE_MANGLE)
-+#define do_extend_cmdline 1
- #else
- #define do_extend_cmdline 0
- #endif
-@@ -67,6 +69,65 @@
- 	return cell_size;
- }
- 
-+#if defined(CONFIG_ARM_ATAG_DTB_COMPAT_CMDLINE_MANGLE)
-+
-+static char *append_rootblock(char *dest, const char *str, int len, void *fdt)
-+{
-+	char *ptr, *end;
-+	char *root="root=";
-+	int i, l;
-+	const char *rootblock;
-+
-+	//ARM doesn't have __HAVE_ARCH_STRSTR, so search manually
-+	ptr = str - 1;
-+
-+	do {
-+		//first find an 'r' at the begining or after a space
-+		do {
-+			ptr++;
-+			ptr = strchr(ptr, 'r');
-+			if(!ptr) return dest;
-+
-+		} while (ptr != str && *(ptr-1) != ' ');
-+
-+		//then check for the rest
-+		for(i = 1; i <= 4; i++)
-+			if(*(ptr+i) != *(root+i)) break;
-+
-+	} while (i != 5);
-+
-+	end = strchr(ptr, ' ');
-+	end = end ? (end - 1) : (strchr(ptr, 0) - 1);
-+
-+	//find partition number (assumes format root=/dev/mtdXX | /dev/mtdblockXX | yy:XX )
-+	for( i = 0; end >= ptr && *end >= '0' && *end <= '9'; end--, i++);
-+	ptr = end + 1;
-+
-+	/* if append-rootblock property is set use it to append to command line */
-+	rootblock = getprop(fdt, "/chosen", "append-rootblock", &l);
-+	if(rootblock != NULL) {
-+		if(*dest != ' ') {
-+			*dest = ' ';
-+			dest++;
-+			len++;
-+		}
-+		if (len + l + i <= COMMAND_LINE_SIZE) {
-+			memcpy(dest, rootblock, l);
-+			dest += l - 1;
-+			memcpy(dest, ptr, i);
-+			dest += i;
-+		}
-+	} else {
-+		len = strlen(str);
-+		if (len + 1 < COMMAND_LINE_SIZE) {
-+			memcpy(dest, str, len);
-+			dest += len;
-+		}
-+	}
-+	return dest;
-+}
-+#endif
-+
- static void merge_fdt_bootargs(void *fdt, const char *fdt_cmdline)
- {
- 	char cmdline[COMMAND_LINE_SIZE];
-@@ -86,12 +147,21 @@
- 
- 	/* and append the ATAG_CMDLINE */
- 	if (fdt_cmdline) {
-+
-+#if defined(CONFIG_ARM_ATAG_DTB_COMPAT_CMDLINE_MANGLE)
-+		//save original bootloader args
-+		//and append ubi.mtd with root partition number to current cmdline
-+		setprop_string(fdt, "/chosen", "bootloader-args", fdt_cmdline);
-+		ptr = append_rootblock(ptr, fdt_cmdline, len, fdt);
-+
-+#else
- 		len = strlen(fdt_cmdline);
- 		if (ptr - cmdline + len + 2 < COMMAND_LINE_SIZE) {
- 			*ptr++ = ' ';
- 			memcpy(ptr, fdt_cmdline, len);
- 			ptr += len;
- 		}
-+#endif
- 	}
- 	*ptr = '\0';
- 
-@@ -148,7 +218,9 @@
- 			else
- 				setprop_string(fdt, "/chosen", "bootargs",
- 					       atag->u.cmdline.cmdline);
-		} else if (atag->hdr.tag == ATAG_MEM) {
-+		}
-+#ifndef CONFIG_ARM_ATAG_DTB_COMPAT_CMDLINE_MANGLE
-+		else if (atag->hdr.tag == ATAG_MEM) {
- 			if (memcount >= sizeof(mem_reg_property)/4)
- 				continue;
- 			if (!atag->u.mem.size)
-@@ -187,6 +259,10 @@
- 		setprop(fdt, "/memory", "reg", mem_reg_property,
- 			4 * memcount * memsize);
- 	}
-+#else
-+
-+	}
-+#endif
- 
- 	return fdt_pack(fdt);
- }
--- a/init/main.c
-+++ b/init/main.c
-@@ -102,6 +102,10 @@
- #define CREATE_TRACE_POINTS
- #include <trace/events/initcall.h>
- 
-+#if defined(CONFIG_ARM_ATAG_DTB_COMPAT_CMDLINE_MANGLE)
-+#include <linux/of.h>
-+#endif
-+
- static int kernel_init(void *);
- 
- extern void init_IRQ(void);
-@@ -592,6 +596,18 @@
- 	page_alloc_init();
- 
- 	pr_notice("Kernel command line: %s\n", boot_command_line);
-+
-+#if defined(CONFIG_ARM_ATAG_DTB_COMPAT_CMDLINE_MANGLE)
-+	//Show bootloader's original command line for reference
-+	if(of_chosen) {
-+		const char *prop = of_get_property(of_chosen, "bootloader-args", NULL);
-+		if(prop)
-+			pr_notice("Bootloader command line (ignored): %s\n", prop);
-+		else
-+			pr_notice("Bootloader command line not present\n");
-+	}
-+#endif
-+
- 	parse_early_param();
- 	after_dashes = parse_args("Booting kernel",
- 				  static_command_line, __start___param,
--- a/root/target/linux/mvebu/patches-4.19/100-find_active_root.patch
+++ b/root/target/linux/mvebu/patches-4.19/100-find_active_root.patch
@ -1,60 +0,0 @@
-The WRT1900AC among other Linksys routers uses a dual-firmware layout.
-Dynamically rename the active partition to "ubi".
-
-Signed-off-by: Imre Kaloz <kaloz@openwrt.org>
-
--- a/drivers/mtd/ofpart.c
-+++ b/drivers/mtd/ofpart.c
-@@ -25,6 +25,8 @@
- 	return of_get_property(pp, "compatible", NULL);
- }
- 
-+static int mangled_rootblock;
-+
- static int parse_fixed_partitions(struct mtd_info *master,
- 				  const struct mtd_partition **pparts,
- 				  struct mtd_part_parser_data *data)
-@@ -33,6 +35,7 @@
- 	struct device_node *mtd_node;
- 	struct device_node *ofpart_node;
- 	const char *partname;
-+	const char *owrtpart = "ubi";
- 	struct device_node *pp;
- 	int nr_parts, i, ret = 0;
- 	bool dedicated = true;
-@@ -110,9 +113,13 @@
- 		parts[i].size = of_read_number(reg + a_cells, s_cells);
- 		parts[i].of_node = pp;
- 
-		partname = of_get_property(pp, "label", &len);
-		if (!partname)
-			partname = of_get_property(pp, "name", &len);
-+		if (mangled_rootblock && (i == mangled_rootblock)) {
-+			partname = owrtpart;
-+		} else {
-+			partname = of_get_property(pp, "label", &len);
-+			if (!partname)
-+				partname = of_get_property(pp, "name", &len);
-+		}
- 		parts[i].name = partname;
- 
- 		if (of_get_property(pp, "read-only", &len))
-@@ -219,6 +226,18 @@
- 	return 0;
- }
- 
-+static int __init active_root(char *str)
-+{
-+	get_option(&str, &mangled_rootblock);
-+
-+	if (!mangled_rootblock)
-+		return 1;
-+
-+	return 1;
-+}
-+
-+__setup("mangled_rootblock=", active_root);
-+
- static void __exit ofpart_parser_exit(void)
- {
- 	deregister_mtd_parser(&ofpart_parser);
--- a/root/target/linux/mvebu/patches-4.19/102-revert_i2c_delay.patch
+++ b/root/target/linux/mvebu/patches-4.19/102-revert_i2c_delay.patch
@ -1,15 +0,0 @@
--- a/arch/arm/boot/dts/armada-xp.dtsi
-+++ b/arch/arm/boot/dts/armada-xp.dtsi
-@@ -237,12 +237,10 @@
- };
- 
- &i2c0 {
-	compatible = "marvell,mv78230-i2c", "marvell,mv64xxx-i2c";
- 	reg = <0x11000 0x100>;
- };
- 
- &i2c1 {
-	compatible = "marvell,mv78230-i2c", "marvell,mv64xxx-i2c";
- 	reg = <0x11100 0x100>;
- };
- 
--- a/root/target/linux/mvebu/patches-4.19/104-linksys_mamba_disable_keep_config.patch
+++ b/root/target/linux/mvebu/patches-4.19/104-linksys_mamba_disable_keep_config.patch
@ -1,10 +0,0 @@
--- a/arch/arm/boot/dts/armada-xp-linksys-mamba.dts
-+++ b/arch/arm/boot/dts/armada-xp-linksys-mamba.dts
-@@ -467,7 +467,6 @@
- 		reg = <0>;
- 		label = "pxa3xx_nand-0";
- 		nand-rb = <0>;
-		marvell,nand-keep-config;
- 		nand-on-flash-bbt;
- 		nand-ecc-strength = <4>;
- 		nand-ecc-step-size = <512>;
--- a/root/target/linux/mvebu/patches-4.19/105-build_new_dtbs.patch
+++ b/root/target/linux/mvebu/patches-4.19/105-build_new_dtbs.patch
@ -1,10 +0,0 @@
--- a/arch/arm/boot/dts/Makefile
-+++ b/arch/arm/boot/dts/Makefile
-@@ -1154,6 +1154,7 @@
- 	armada-385-linksys-cobra.dtb \
- 	armada-385-linksys-rango.dtb \
- 	armada-385-linksys-shelby.dtb \
-+	armada-385-linksys-venom.dtb \
- 	armada-385-synology-ds116.dtb \
- 	armada-385-turris-omnia.dtb \
- 	armada-388-clearfog.dtb \
--- a/root/target/linux/mvebu/patches-4.19/205-armada-385-rd-mtd-partitions.patch
+++ b/root/target/linux/mvebu/patches-4.19/205-armada-385-rd-mtd-partitions.patch
@ -1,19 +0,0 @@
--- a/arch/arm/boot/dts/armada-388-rd.dts
-+++ b/arch/arm/boot/dts/armada-388-rd.dts
-@@ -103,6 +103,16 @@
- 		compatible = "st,m25p128", "jedec,spi-nor";
- 		reg = <0>; /* Chip select 0 */
- 		spi-max-frequency = <108000000>;
-+
-+		partition@0 {
-+			label = "uboot";
-+			reg = <0 0x400000>;
-+		};
-+
-+		partition@1 {
-+			label = "firmware";
-+			reg = <0x400000 0xc00000>;
-+		};
- 	};
- };
- 
--- a/root/target/linux/mvebu/patches-4.19/206-ARM-mvebu-385-ap-Add-partitions.patch
+++ b/root/target/linux/mvebu/patches-4.19/206-ARM-mvebu-385-ap-Add-partitions.patch
@ -1,35 +0,0 @@
-From 9861f93a59142a3131870df2521eb2deb73026d7 Mon Sep 17 00:00:00 2001
-From: Maxime Ripard <maxime.ripard@free-electrons.com>
-Date: Tue, 13 Jan 2015 11:14:09 +0100
-Subject: [PATCH 2/2] ARM: mvebu: 385-ap: Add partitions
-
-Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
---
- arch/arm/boot/dts/armada-385-db-ap.dts | 15 +++++++++++++++
- 1 file changed, 15 insertions(+)
-
--- a/arch/arm/boot/dts/armada-385-db-ap.dts
-+++ b/arch/arm/boot/dts/armada-385-db-ap.dts
-@@ -218,19 +218,19 @@
- 			#size-cells = <1>;
- 
- 			partition@0 {
-				label = "U-Boot";
-+				label = "u-boot";
- 				reg = <0x00000000 0x00800000>;
- 				read-only;
- 			};
- 
- 			partition@800000 {
-				label = "uImage";
-+				label = "kernel";
- 				reg = <0x00800000 0x00400000>;
- 				read-only;
- 			};
- 
- 			partition@c00000 {
-				label = "Root";
-+				label = "ubi";
- 				reg = <0x00c00000 0x3f400000>;
- 			};
- 		};
--- a/root/target/linux/mvebu/patches-4.19/210-clearfog_switch_node.patch
+++ b/root/target/linux/mvebu/patches-4.19/210-clearfog_switch_node.patch
@ -1,21 +0,0 @@
--- a/arch/arm/boot/dts/armada-388-clearfog.dts
-+++ b/arch/arm/boot/dts/armada-388-clearfog.dts
-@@ -88,6 +88,18 @@
- 		};
- 	};
- 
-+	mvsw61xx {
-+		#address-cells = <1>;
-+		#size-cells = <0>;
-+		compatible = "marvell,88e6176";
-+		status = "okay";
-+		reg = <0x4>;
-+		is-indirect;
-+
-+		mii-bus = <&mdio>;
-+		cpu-port-0 = <5>;
-+	};
-+
- 	gpio-keys {
- 		compatible = "gpio-keys";
- 		pinctrl-0 = <&rear_button_pins>;
--- a/root/target/linux/mvebu/patches-4.19/220-disable-untested-dsa-boards.patch
+++ b/root/target/linux/mvebu/patches-4.19/220-disable-untested-dsa-boards.patch
@ -1,30 +0,0 @@
--- a/arch/arm/boot/dts/armada-385-linksys.dtsi
-+++ b/arch/arm/boot/dts/armada-385-linksys.dtsi
-@@ -171,6 +171,7 @@
- 	status = "okay";
- 
- 	switch@0 {
-+		status = "disabled";
- 		compatible = "marvell,mv88e6085";
- 		#address-cells = <1>;
- 		#size-cells = <0>;
--- a/arch/arm/boot/dts/armada-388-clearfog.dts
-+++ b/arch/arm/boot/dts/armada-388-clearfog.dts
-@@ -161,6 +161,7 @@
- 	status = "okay";
- 
- 	switch@4 {
-+		status = "disabled";
- 		compatible = "marvell,mv88e6085";
- 		#address-cells = <1>;
- 		#size-cells = <0>;
--- a/arch/arm/boot/dts/armada-xp-linksys-mamba.dts
-+++ b/arch/arm/boot/dts/armada-xp-linksys-mamba.dts
-@@ -413,6 +413,7 @@
- 	status = "okay";
- 
- 	switch@0 {
-+		status = "disabled";
- 		compatible = "marvell,mv88e6085";
- 		#address-cells = <1>;
- 		#size-cells = <0>;
--- a/root/target/linux/mvebu/patches-4.19/230-armada-xp-linksys-mamba-broken-idle.patch
+++ b/root/target/linux/mvebu/patches-4.19/230-armada-xp-linksys-mamba-broken-idle.patch
@ -1,10 +0,0 @@
--- a/arch/arm/boot/dts/armada-xp-linksys-mamba.dts
-+++ b/arch/arm/boot/dts/armada-xp-linksys-mamba.dts
-@@ -542,3 +542,7 @@
- 		};
- 	};
- };
-+
-+&coherencyfab {
-+	broken-idle;
-+};
--- a/root/target/linux/mvebu/patches-4.19/300-mvneta-tx-queue-workaround.patch
+++ b/root/target/linux/mvebu/patches-4.19/300-mvneta-tx-queue-workaround.patch
@ -1,35 +0,0 @@
-The hardware queue scheduling is apparently configured with fixed
-priorities, which creates a nasty fairness issue where traffic from one
-CPU can starve traffic from all other CPUs.
-
-Work around this issue by forcing all tx packets to go through one CPU,
-until this issue is fixed properly.
-
-Signed-off-by: Felix Fietkau <nbd@nbd.name>
---
--- a/drivers/net/ethernet/marvell/mvneta.c
-+++ b/drivers/net/ethernet/marvell/mvneta.c
-@@ -4257,6 +4257,15 @@
- 	return phylink_ethtool_set_eee(pp->phylink, eee);
- }
- 
-+static u16 mvneta_select_queue(struct net_device *dev, struct sk_buff *skb,
-+			       struct net_device *sb_dev,
-+			       select_queue_fallback_t fallback)
-+{
-+	/* XXX: hardware queue scheduling is broken,
-+	 * use only one queue until it is fixed */
-+	return 0;
-+}
-+
- static const struct net_device_ops mvneta_netdev_ops = {
- 	.ndo_open            = mvneta_open,
- 	.ndo_stop            = mvneta_stop,
-@@ -4267,6 +4276,7 @@
- 	.ndo_fix_features    = mvneta_fix_features,
- 	.ndo_get_stats64     = mvneta_get_stats64,
- 	.ndo_do_ioctl        = mvneta_ioctl,
-+	.ndo_select_queue    = mvneta_select_queue,
- };
- 
- static const struct ethtool_ops mvneta_eth_tool_ops = {
--- a/root/target/linux/mvebu/patches-4.19/301-PCI-armada8k-add-support-for-gpio-controlled-reset-signal.patch
+++ b/root/target/linux/mvebu/patches-4.19/301-PCI-armada8k-add-support-for-gpio-controlled-reset-signal.patch
@ -1,48 +0,0 @@
-diff --git a/drivers/pci/controller/dwc/pcie-armada8k.c b/drivers/pci/controller/dwc/pcie-armada8k.c
-index 0c389a30ef5d..b171b6bc15c8 100644
--- a/drivers/pci/controller/dwc/pcie-armada8k.c
-+++ b/drivers/pci/controller/dwc/pcie-armada8k.c
-@@ -22,6 +22,7 @@
- #include <linux/resource.h>
- #include <linux/of_pci.h>
- #include <linux/of_irq.h>
-+#include <linux/gpio/consumer.h>
- 
- #include "pcie-designware.h"
- 
-@@ -29,6 +30,7 @@ struct armada8k_pcie {
- 	struct dw_pcie *pci;
- 	struct clk *clk;
- 	struct clk *clk_reg;
-+	struct gpio_desc *reset_gpio;
- };
- 
- #define PCIE_VENDOR_REGS_OFFSET		0x8000
-@@ -137,6 +139,12 @@ static int armada8k_pcie_host_init(struct pcie_port *pp)
- 	struct dw_pcie *pci = to_dw_pcie_from_pp(pp);
- 	struct armada8k_pcie *pcie = to_armada8k_pcie(pci);
- 
-+	if (pcie->reset_gpio) {
-+		/* assert and then deassert the reset signal */
-+		gpiod_set_value_cansleep(pcie->reset_gpio, 1);
-+		msleep(100);
-+		gpiod_set_value_cansleep(pcie->reset_gpio, 0);
-+	}
- 	dw_pcie_setup_rc(pp);
- 	armada8k_pcie_establish_link(pcie);
- 
-@@ -249,6 +257,14 @@ static int armada8k_pcie_probe(struct platform_device *pdev)
- 		goto fail_clkreg;
- 	}
- 
-+	/* Get reset gpio signal and hold asserted (logically high) */
-+	pcie->reset_gpio = devm_gpiod_get_optional(dev, "reset",
-+						   GPIOD_OUT_HIGH);
-+	if (IS_ERR(pcie->reset_gpio)) {
-+		ret = PTR_ERR(pcie->reset_gpio);
-+		goto fail_clkreg;
-+	}
-+
- 	platform_set_drvdata(pdev, pcie);
- 
- 	ret = armada8k_add_pcie_port(pcie, pdev);
--- a/root/target/linux/mvebu/patches-4.19/302-Armada-8040-clearfog-gt-8k.dts.patch
+++ b/root/target/linux/mvebu/patches-4.19/302-Armada-8040-clearfog-gt-8k.dts.patch
@ -1,475 +0,0 @@
-diff --git a/arch/arm64/boot/dts/marvell/Makefile b/arch/arm64/boot/dts/marvell/Makefile
-index ea9d49f2a911..eca8bac6303a 100644
--- a/arch/arm64/boot/dts/marvell/Makefile
-+++ b/arch/arm64/boot/dts/marvell/Makefile
-@@ -3,6 +3,7 @@
- dtb-$(CONFIG_ARCH_MVEBU) += armada-3720-db.dtb
- dtb-$(CONFIG_ARCH_MVEBU) += armada-3720-espressobin.dtb
- dtb-$(CONFIG_ARCH_MVEBU) += armada-7040-db.dtb
-+dtb-$(CONFIG_ARCH_MVEBU) += armada-8040-clearfog-gt-8k.dtb
- dtb-$(CONFIG_ARCH_MVEBU) += armada-8040-db.dtb
- dtb-$(CONFIG_ARCH_MVEBU) += armada-8040-mcbin.dtb
- dtb-$(CONFIG_ARCH_MVEBU) += armada-8080-db.dtb
-diff --git a/arch/arm64/boot/dts/marvell/armada-8040-clearfog-gt-8k.dts b/arch/arm64/boot/dts/marvell/armada-8040-clearfog-gt-8k.dts
-new file mode 100644
-index 000000000000..2e06d82bec58
--- /dev/null
-+++ b/arch/arm64/boot/dts/marvell/armada-8040-clearfog-gt-8k.dts
-@@ -0,0 +1,457 @@
-+// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
-+/*
-+ * Copyright (C) 2018 SolidRun ltd.
-+ * Based on Marvell MACCHIATOBin board
-+ *
-+ * Device Tree file for SolidRun's ClearFog GT 8K
-+ */
-+
-+#include "armada-8040.dtsi"
-+
-+#include <dt-bindings/input/input.h>
-+#include <dt-bindings/gpio/gpio.h>
-+
-+/ {
-+	model = "SolidRun ClearFog GT 8K";
-+	compatible = "solidrun,clearfog-gt-8k", "marvell,armada8040",
-+			"marvell,armada-ap806-quad", "marvell,armada-ap806";
-+
-+	chosen {
-+		stdout-path = "serial0:115200n8";
-+	};
-+
-+	memory@00000000 {
-+		device_type = "memory";
-+		reg = <0x0 0x0 0x0 0x80000000>;
-+	};
-+
-+	aliases {
-+		ethernet0 = &cp1_eth1;
-+		ethernet1 = &cp0_eth0;
-+		ethernet2 = &cp1_eth2;
-+	};
-+
-+	v_3_3: regulator-3-3v {
-+		compatible = "regulator-fixed";
-+		regulator-name = "v_3_3";
-+		regulator-min-microvolt = <3300000>;
-+		regulator-max-microvolt = <3300000>;
-+		regulator-always-on;
-+		status = "okay";
-+	};
-+
-+	v_5v0_usb3_hst_vbus: regulator-usb3-vbus0 {
-+		compatible = "regulator-fixed";
-+		gpio = <&cp0_gpio2 15 GPIO_ACTIVE_LOW>;
-+		pinctrl-names = "default";
-+		pinctrl-0 = <&cp0_xhci_vbus_pins>;
-+		regulator-name = "v_5v0_usb3_hst_vbus";
-+		regulator-min-microvolt = <5000000>;
-+		regulator-max-microvolt = <5000000>;
-+		status = "okay";
-+	};
-+
-+	usb3h0_phy: usb3_phy0 {
-+		compatible = "usb-nop-xceiv";
-+		vcc-supply = <&v_5v0_usb3_hst_vbus>;
-+	};
-+
-+	sfp_cp0_eth0: sfp-cp0-eth0 {
-+		compatible = "sff,sfp";
-+		i2c-bus = <&cp0_i2c1>;
-+		mod-def0-gpio = <&cp0_gpio2 17 GPIO_ACTIVE_LOW>;
-+		tx-disable-gpio = <&cp1_gpio1 29 GPIO_ACTIVE_HIGH>;
-+		pinctrl-names = "default";
-+		pinctrl-0 = <&cp0_sfp_present_pins &cp1_sfp_tx_disable_pins>;
-+	};
-+
-+	leds {
-+		compatible = "gpio-leds";
-+		pinctrl-0 = <&cp0_led0_pins
-+			     &cp0_led1_pins>;
-+		pinctrl-names = "default";
-+		/* No designated function for these LEDs at the moment */
-+		led0 {
-+			label = "clearfog-gt-8k:green:led0";
-+			gpios = <&cp0_gpio2 8 GPIO_ACTIVE_LOW>;
-+			default-state = "on";
-+		};
-+		led1 {
-+			label = "clearfog-gt-8k:green:led1";
-+			gpios = <&cp0_gpio2 9 GPIO_ACTIVE_LOW>;
-+			default-state = "on";
-+		};
-+	};
-+
-+	keys {
-+		compatible = "gpio-keys";
-+		pinctrl-0 = <&cp0_gpio_reset_pins &cp1_wps_button_pins>;
-+		pinctrl-names = "default";
-+
-+		button_0 {
-+			/* The rear button */
-+			label = "Rear Button";
-+			gpios = <&cp0_gpio2 7 GPIO_ACTIVE_LOW>;
-+			linux,can-disable;
-+			linux,code = <BTN_0>;
-+		};
-+
-+		button_1 {
-+			/* The wps button */
-+			label = "WPS Button";
-+			gpios = <&cp1_gpio1 30 GPIO_ACTIVE_LOW>;
-+			linux,can-disable;
-+			linux,code = <KEY_WPS_BUTTON>;
-+		};
-+	};
-+};
-+
-+&uart0 {
-+	status = "okay";
-+	pinctrl-0 = <&uart0_pins>;
-+	pinctrl-names = "default";
-+};
-+
-+&ap_sdhci0 {
-+	bus-width = <8>;
-+	no-1-8-v;
-+	no-sd;
-+	no-sdio;
-+	non-removable;
-+	status = "okay";
-+	vqmmc-supply = <&v_3_3>;
-+};
-+
-+&cp0_i2c0 {
-+	clock-frequency = <100000>;
-+	pinctrl-names = "default";
-+	pinctrl-0 = <&cp0_i2c0_pins>;
-+	status = "okay";
-+};
-+
-+&cp0_i2c1 {
-+	clock-frequency = <100000>;
-+	pinctrl-names = "default";
-+	pinctrl-0 = <&cp0_i2c1_pins>;
-+	status = "okay";
-+};
-+
-+&cp0_pinctrl {
-+	/*
-+	* MPP Bus:
-+	* [0-31] = 0xff: Keep default CP0_shared_pins:
-+	* [11] CLKOUT_MPP_11 (out)
-+	* [23] LINK_RD_IN_CP2CP (in)
-+	* [25] CLKOUT_MPP_25 (out)
-+	* [29] AVS_FB_IN_CP2CP (in)
-+	* [32, 33, 34] pci0/1/2 reset
-+	* [35-38] CP0 I2C1 and I2C0
-+	* [39] GPIO reset button
-+	* [40,41] LED0 and LED1
-+	* [43] 1512 phy reset
-+	* [47] USB VBUS EN (active low)
-+	* [48] FAN PWM
-+	* [49] SFP+ present signal
-+	* [50] TPM interrupt
-+	* [51] WLAN0 disable
-+	* [52] WLAN1 disable
-+	* [53] LTE disable
-+	* [54] NFC reset
-+	* [55] Micro SD card detect
-+	* [56-61] Micro SD
-+	*/
-+
-+	cp0_pci0_reset_pins: pci0-reset-pins {
-+		marvell,pins = "mpp32";
-+		marvell,function = "gpio";
-+	};
-+
-+	cp0_pci1_reset_pins: pci1-reset-pins {
-+		marvell,pins = "mpp33";
-+		marvell,function = "gpio";
-+	};
-+
-+	cp0_pci2_reset_pins: pci2-reset-pins {
-+		marvell,pins = "mpp34";
-+		marvell,function = "gpio";
-+	};
-+
-+	cp0_i2c1_pins: i2c1-pins {
-+		marvell,pins = "mpp35", "mpp36";
-+		marvell,function = "i2c1";
-+	};
-+
-+	cp0_i2c0_pins: i2c0-pins {
-+		marvell,pins = "mpp37", "mpp38";
-+		marvell,function = "i2c0";
-+	};
-+
-+	cp0_gpio_reset_pins: gpio-reset-pins {
-+		marvell,pins = "mpp39";
-+		marvell,function = "gpio";
-+	};
-+
-+	cp0_led0_pins: led0-pins {
-+		marvell,pins = "mpp40";
-+		marvell,function = "gpio";
-+	};
-+
-+	cp0_led1_pins: led1-pins {
-+		marvell,pins = "mpp41";
-+		marvell,function = "gpio";
-+	};
-+
-+	cp0_copper_eth_phy_reset: copper-eth-phy-reset {
-+		marvell,pins = "mpp43";
-+		marvell,function = "gpio";
-+	};
-+
-+	cp0_xhci_vbus_pins: xhci0-vbus-pins {
-+		marvell,pins = "mpp47";
-+		marvell,function = "gpio";
-+	};
-+
-+	cp0_fan_pwm_pins: fan-pwm-pins {
-+		marvell,pins = "mpp48";
-+		marvell,function = "gpio";
-+	};
-+
-+	cp0_sfp_present_pins: sfp-present-pins {
-+		marvell,pins = "mpp49";
-+		marvell,function = "gpio";
-+	};
-+
-+	cp0_tpm_irq_pins: tpm-irq-pins {
-+		marvell,pins = "mpp50";
-+		marvell,function = "gpio";
-+	};
-+
-+	cp0_sdhci_pins: sdhci-pins {
-+		marvell,pins = "mpp55", "mpp56", "mpp57", "mpp58", "mpp59",
-+			       "mpp60", "mpp61";
-+		marvell,function = "sdio";
-+	};
-+};
-+
-+&cp0_pcie0 {
-+	pinctrl-names = "default";
-+	pinctrl-0 = <&cp0_pci0_reset_pins>;
-+	reset-gpios = <&cp0_gpio2 0 GPIO_ACTIVE_LOW>;
-+	status = "okay";
-+};
-+
-+&cp0_gpio2 {
-+	sata_reset {
-+		gpio-hog;
-+		gpios = <1 GPIO_ACTIVE_HIGH>;
-+		output-high;
-+	};
-+
-+	lte_reset {
-+		gpio-hog;
-+		gpios = <2 GPIO_ACTIVE_LOW>;
-+		output-low;
-+	};
-+
-+	lte_disable {
-+		gpio-hog;
-+		gpios = <21 GPIO_ACTIVE_LOW>;
-+		output-low;
-+	};
-+};
-+
-+&cp0_ethernet {
-+	status = "okay";
-+};
-+
-+/* SFP */
-+&cp0_eth0 {
-+	status = "okay";
-+	phy-mode = "10gbase-kr";
-+	managed = "in-band-status";
-+	phys = <&cp0_comphy2 0>;
-+	sfp = <&sfp_cp0_eth0>;
-+};
-+
-+&cp0_sdhci0 {
-+	broken-cd;
-+	bus-width = <4>;
-+	pinctrl-names = "default";
-+	pinctrl-0 = <&cp0_sdhci_pins>;
-+	status = "okay";
-+	vqmmc-supply = <&v_3_3>;
-+};
-+
-+&cp1_pinctrl {
-+	/*
-+	 * MPP Bus:
-+	 * [0-5] TDM
-+	 * [6]   VHV Enable
-+	 * [7]   CP1 SPI0 CSn1 (FXS)
-+	 * [8]   CP1 SPI0 CSn0 (TPM)
-+	 * [9.11]CP1 SPI0 MOSI/MISO/CLK
-+	 * [13]  CP1 SPI1 MISO (TDM and SPI ROM shared)
-+	 * [14]  CP1 SPI1 CS0n (64Mb SPI ROM)
-+	 * [15]  CP1 SPI1 MOSI (TDM and SPI ROM shared)
-+	 * [16]  CP1 SPI1 CLK (TDM and SPI ROM shared)
-+	 * [24]  Topaz switch reset
-+	 * [26]  Buzzer
-+	 * [27]  CP1 SMI MDIO
-+	 * [28]  CP1 SMI MDC
-+	 * [29]  CP0 10G SFP TX Disable
-+	 * [30]  WPS button
-+	 * [31]  Front panel button
-+	 */
-+
-+	cp1_spi1_pins: spi1-pins {
-+		marvell,pins = "mpp13", "mpp14", "mpp15", "mpp16";
-+		marvell,function = "spi1";
-+	};
-+
-+	cp1_switch_reset_pins: switch-reset-pins {
-+		marvell,pins = "mpp24";
-+		marvell,function = "gpio";
-+	};
-+
-+	cp1_ge_mdio_pins: ge-mdio-pins {
-+		marvell,pins = "mpp27", "mpp28";
-+		marvell,function = "ge";
-+	};
-+
-+	cp1_sfp_tx_disable_pins: sfp-tx-disable-pins {
-+		marvell,pins = "mpp29";
-+		marvell,function = "gpio";
-+	};
-+
-+	cp1_wps_button_pins: wps-button-pins {
-+		marvell,pins = "mpp30";
-+		marvell,function = "gpio";
-+	};
-+};
-+
-+&cp1_sata0 {
-+	pinctrl-0 = <&cp0_pci1_reset_pins>;
-+	status = "okay";
-+};
-+
-+&cp1_mdio {
-+	pinctrl-names = "default";
-+	pinctrl-0 = <&cp1_ge_mdio_pins>;
-+	status = "okay";
-+
-+	ge_phy: ethernet-phy@0 {
-+		/* LED0 - GB link
-+		 * LED1 - on: link, blink: activity
-+		 */
-+		marvell,reg-init = <3 16 0 0x1017>;
-+		reg = <0>;
-+		pinctrl-names = "default";
-+		pinctrl-0 = <&cp0_copper_eth_phy_reset>;
-+		reset-gpios = <&cp1_gpio1 11 GPIO_ACTIVE_LOW>;
-+		reset-assert-us = <10000>;
-+	};
-+
-+	switch0: switch0@4 {
-+		compatible = "marvell,mv88e6085";
-+		reg = <4>;
-+		pinctrl-names = "default";
-+		pinctrl-0 = <&cp1_switch_reset_pins>;
-+		reset-gpios = <&cp1_gpio1 24 GPIO_ACTIVE_LOW>;
-+
-+		ports {
-+			#address-cells = <1>;
-+			#size-cells = <0>;
-+
-+			port@1 {
-+				reg = <1>;
-+				label = "lan2";
-+				phy-handle = <&switch0phy0>;
-+			};
-+
-+			port@2 {
-+				reg = <2>;
-+				label = "lan1";
-+				phy-handle = <&switch0phy1>;
-+			};
-+
-+			port@3 {
-+				reg = <3>;
-+				label = "lan4";
-+				phy-handle = <&switch0phy2>;
-+			};
-+
-+			port@4 {
-+				reg = <4>;
-+				label = "lan3";
-+				phy-handle = <&switch0phy3>;
-+			};
-+
-+			port@5 {
-+				reg = <5>;
-+				label = "cpu";
-+				ethernet = <&cp1_eth2>;
-+			};
-+		};
-+
-+		mdio {
-+			#address-cells = <1>;
-+			#size-cells = <0>;
-+
-+			switch0phy0: switch0phy0@11 {
-+				reg = <0x11>;
-+			};
-+
-+			switch0phy1: switch0phy1@12 {
-+				reg = <0x12>;
-+			};
-+
-+			switch0phy2: switch0phy2@13 {
-+				reg = <0x13>;
-+			};
-+
-+			switch0phy3: switch0phy3@14 {
-+				reg = <0x14>;
-+			};
-+		};
-+	};
-+};
-+
-+&cp1_ethernet {
-+	status = "okay";
-+};
-+
-+/* 1G copper */
-+&cp1_eth1 {
-+	status = "okay";
-+	phy-mode = "sgmii";
-+	phy = <&ge_phy>;
-+	phys = <&cp1_comphy3 1>;
-+};
-+
-+/* Switch uplink */
-+&cp1_eth2 {
-+	status = "okay";
-+	phy-mode = "2500base-x";
-+	phys = <&cp1_comphy5 2>;
-+	fixed-link {
-+		speed = <2500>;
-+		full-duplex;
-+	};
-+};
-+
-+&cp1_spi1 {
-+	pinctrl-names = "default";
-+	pinctrl-0 = <&cp1_spi1_pins>;
-+	status = "okay";
-+
-+	spi-flash@0 {
-+		compatible = "st,w25q32";
-+		spi-max-frequency = <50000000>;
-+		reg = <0>;
-+	};
-+};
-+
-+&cp1_usb3_0 {
-+	usb-phy = <&usb3h0_phy>;
-+	status = "okay";
-+};
--- a/root/target/linux/mvebu/patches-4.19/400-cpuidle-mvebu-indicate-failure-to-enter-deeper-sleep.patch
+++ b/root/target/linux/mvebu/patches-4.19/400-cpuidle-mvebu-indicate-failure-to-enter-deeper-sleep.patch
@ -1,40 +0,0 @@
-From c28b2d367da8a471482e6a4aa8337ab6369a80c2 Mon Sep 17 00:00:00 2001
-From: Russell King <rmk+kernel@arm.linux.org.uk>
-Date: Sat, 3 Oct 2015 09:13:05 +0100
-Subject: cpuidle: mvebu: indicate failure to enter deeper sleep states
-
-The cpuidle ->enter method expects the return value to be the sleep
-state we entered.  Returning negative numbers or other codes is not
-permissible since coupled CPU idle was merged.
-
-At least some of the mvebu_v7_cpu_suspend() implementations return the
-value from cpu_suspend(), which returns zero if the CPU vectors back
-into the kernel via cpu_resume() (the success case), or the non-zero
-return value of the suspend actor, or one (failure cases).
-
-We do not want to be returning the failure case value back to CPU idle
-as that indicates that we successfully entered one of the deeper idle
-states.  Always return zero instead, indicating that we slept for the
-shortest amount of time.
-
-Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
---
- drivers/cpuidle/cpuidle-mvebu-v7.c | 6 +++++-
- 1 file changed, 5 insertions(+), 1 deletion(-)
-
--- a/drivers/cpuidle/cpuidle-mvebu-v7.c
-+++ b/drivers/cpuidle/cpuidle-mvebu-v7.c
-@@ -39,8 +39,12 @@
- 	ret = mvebu_v7_cpu_suspend(deepidle);
- 	cpu_pm_exit();
- 
-+	/*
-+	 * If we failed to enter the desired state, indicate that we
-+	 * slept lightly.
-+	 */
- 	if (ret)
-		return ret;
-+		return 0;
- 
- 	return index;
- }
--- a/root/target/linux/mvebu/patches-4.19/401-pci-mvebu-time-out-reset-on-link-up.patch
+++ b/root/target/linux/mvebu/patches-4.19/401-pci-mvebu-time-out-reset-on-link-up.patch
@ -1,60 +0,0 @@
-From 287b9df160b6159f8d385424904f8bac501280c1 Mon Sep 17 00:00:00 2001
-From: Russell King <rmk+kernel@armlinux.org.uk>
-Date: Sat, 9 Jul 2016 10:58:16 +0100
-Subject: pci: mvebu: time out reset on link up
-
-If the port reports that the link is up while we are resetting, there's
-little point in waiting for the full duration.
-
-Signed-off-by: Russell King <rmk+kernel@armlinux.org.uk>
---
- drivers/pci/controller/pci-mvebu.c | 20 ++++++++++++++------
- 1 file changed, 14 insertions(+), 6 deletions(-)
-
--- a/drivers/pci/controller/pci-mvebu.c
-+++ b/drivers/pci/controller/pci-mvebu.c
-@@ -1112,6 +1112,7 @@
- 
- 	if (port->reset_gpio) {
- 		u32 reset_udelay = PCI_PM_D3COLD_WAIT * 1000;
-+		unsigned int i;
- 
- 		of_property_read_u32(port->dn, "reset-delay-us",
- 				     &reset_udelay);
-@@ -1119,7 +1120,13 @@
- 		udelay(100);
- 
- 		gpiod_set_value_cansleep(port->reset_gpio, 0);
-		msleep(reset_udelay / 1000);
-+		for (i = 0; i < reset_udelay; i += 1000) {
-+			if (mvebu_pcie_link_up(port))
-+				break;
-+			msleep(1);
-+		}
-+
-+		printk("%s: reset completed in %dus\n", port->name, i);
- 	}
- 
- 	return 0;
-@@ -1283,15 +1290,16 @@
- 		if (!child)
- 			continue;
- 
-		ret = mvebu_pcie_powerup(port);
-		if (ret < 0)
-			continue;
-
- 		port->base = mvebu_pcie_map_registers(pdev, child, port);
- 		if (IS_ERR(port->base)) {
- 			dev_err(dev, "%s: cannot map registers\n", port->name);
- 			port->base = NULL;
-			mvebu_pcie_powerdown(port);
-+			continue;
-+		}
-+
-+		ret = mvebu_pcie_powerup(port);
-+		if (ret < 0) {
-+			port->base = NULL;
- 			continue;
- 		}
- 
--- a/root/target/linux/mvebu/patches-4.19/412-ARM-dts-armada388-clearfog-emmc-on-clearfog-base.patch
+++ b/root/target/linux/mvebu/patches-4.19/412-ARM-dts-armada388-clearfog-emmc-on-clearfog-base.patch
@ -1,87 +0,0 @@
-From 8137da20701c776ad3481115305a5e8e410871ba Mon Sep 17 00:00:00 2001
-From: Russell King <rmk+kernel@armlinux.org.uk>
-Date: Tue, 29 Nov 2016 10:15:45 +0000
-Subject: ARM: dts: armada388-clearfog: emmc on clearfog base
-
-Signed-off-by: Russell King <rmk+kernel@armlinux.org.uk>
---
- arch/arm/boot/dts/armada-388-clearfog-base.dts     |  1 +
- .../dts/armada-38x-solidrun-microsom-emmc.dtsi     | 62 ++++++++++++++++++++++
- 2 files changed, 63 insertions(+)
- create mode 100644 arch/arm/boot/dts/armada-38x-solidrun-microsom-emmc.dtsi
-
--- a/arch/arm/boot/dts/armada-388-clearfog-base.dts
-+++ b/arch/arm/boot/dts/armada-388-clearfog-base.dts
-@@ -7,6 +7,7 @@
- 
- /dts-v1/;
- #include "armada-388-clearfog.dtsi"
-+#include "armada-38x-solidrun-microsom-emmc.dtsi"
- 
- / {
- 	model = "SolidRun Clearfog Base A1";
--- /dev/null
-+++ b/arch/arm/boot/dts/armada-38x-solidrun-microsom-emmc.dtsi
-@@ -0,0 +1,62 @@
-+/*
-+ * Device Tree file for SolidRun Armada 38x Microsom add-on for eMMC
-+ *
-+ *  Copyright (C) 2015 Russell King
-+ *
-+ * This board is in development; the contents of this file work with
-+ * the A1 rev 2.0 of the board, which does not represent final
-+ * production board.  Things will change, don't expect this file to
-+ * remain compatible info the future.
-+ *
-+ * This file is dual-licensed: you can use it either under the terms
-+ * of the GPL or the X11 license, at your option. Note that this dual
-+ * licensing only applies to this file, and not this project as a
-+ * whole.
-+ *
-+ *  a) This file is free software; you can redistribute it and/or
-+ *     modify it under the terms of the GNU General Public License
-+ *     version 2 as published by the Free Software Foundation.
-+ *
-+ *     This file is distributed in the hope that it will be useful
-+ *     but WITHOUT ANY WARRANTY; without even the implied warranty of
-+ *     MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
-+ *     GNU General Public License for more details.
-+ *
-+ * Or, alternatively
-+ *
-+ *  b) Permission is hereby granted, free of charge, to any person
-+ *     obtaining a copy of this software and associated documentation
-+ *     files (the "Software"), to deal in the Software without
-+ *     restriction, including without limitation the rights to use
-+ *     copy, modify, merge, publish, distribute, sublicense, and/or
-+ *     sell copies of the Software, and to permit persons to whom the
-+ *     Software is furnished to do so, subject to the following
-+ *     conditions:
-+ *
-+ *     The above copyright notice and this permission notice shall be
-+ *     included in all copies or substantial portions of the Software.
-+ *
-+ *     THE SOFTWARE IS PROVIDED , WITHOUT WARRANTY OF ANY KIND
-+ *     EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
-+ *     OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
-+ *     NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
-+ *     HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY
-+ *     WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
-+ *     FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
-+ *     OTHER DEALINGS IN THE SOFTWARE.
-+ */
-+/ {
-+	soc {
-+		internal-regs {
-+			sdhci@d8000 {
-+				bus-width = <4>;
-+				no-1-8-v;
-+				non-removable;
-+				pinctrl-0 = <&microsom_sdhci_pins>;
-+				pinctrl-names = "default";
-+				status = "okay";
-+				wp-inverted;
-+			};
-+		};
-+	};
-+};
--- a/root/target/linux/mvebu/patches-4.19/415-ARM-dts-armada388-clearfog-document-MPP-usage.patch
+++ b/root/target/linux/mvebu/patches-4.19/415-ARM-dts-armada388-clearfog-document-MPP-usage.patch
@ -1,124 +0,0 @@
-From 09a0122c74ec076e08512f1b00b7ccb8a450282f Mon Sep 17 00:00:00 2001
-From: Russell King <rmk+kernel@arm.linux.org.uk>
-Date: Tue, 29 Nov 2016 10:15:43 +0000
-Subject: ARM: dts: armada388-clearfog: document MPP usage
-
-Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
---
- arch/arm/boot/dts/armada-388-clearfog-base.dts | 51 ++++++++++++++++++++++++++
- arch/arm/boot/dts/armada-388-clearfog.dts      | 50 +++++++++++++++++++++++++
- 2 files changed, 101 insertions(+)
-
--- a/arch/arm/boot/dts/armada-388-clearfog-base.dts
-+++ b/arch/arm/boot/dts/armada-388-clearfog-base.dts
-@@ -67,3 +67,54 @@
- 		marvell,function = "gpio";
- 	};
- };
-+
-+/*
-+MPP
-+18: pu	gpio		pca9655 int
-+19:	gpio		phy reset
-+20: pu	gpio		sd0 detect
-+21:	sd0:cmd
-+22: pd	gpio		mikro int
-+23:
-+
-+24:	ua1:rxd		mikro rx
-+25:	ua1:txd		mikro tx
-+26: pu	i2c1:sck
-+27: pu	i2c1:sda
-+28:	sd0:clk
-+29: pd	gpio		mikro rst
-+30:
-+31:
-+
-+32:
-+33:
-+34:
-+35:
-+36:
-+37:	sd0:d3
-+38:	sd0:d0
-+39:	sd0:d1
-+
-+40:	sd0:d2
-+41:
-+42:
-+43:	spi1:cs2	mikro cs
-+44:	gpio		rear button sw3
-+45:	ref:clk_out0	phy#0 clock
-+46:	ref:clk_out1	phy#1 clock
-+47:
-+
-+48:	gpio		J18 spare gpio
-+49:	gpio		U10 I2C_IRQ(GNSS)
-+50:	gpio		board id?
-+51:
-+52:
-+53:
-+54:	gpio		mikro pwm
-+55:
-+
-+56: pu	spi1:mosi	mikro mosi
-+57: pd	spi1:sck	mikro sck
-+58:	spi1:miso	mikro miso
-+59:
-+*/
--- a/arch/arm/boot/dts/armada-388-clearfog.dts
-+++ b/arch/arm/boot/dts/armada-388-clearfog.dts
-@@ -249,3 +249,53 @@
- 	 */
- 	pinctrl-0 = <&spi1_pins &clearfog_spi1_cs_pins &mikro_spi_pins>;
- };
-+/*
-++#define A38x_CUSTOMER_BOARD_1_MPP16_23         0x00400011
-+MPP18: gpio		? (pca9655 int?)
-+MPP19: gpio		? (clkreq?)
-+MPP20: gpio		? (sd0 detect)
-+MPP21: sd0:cmd		x sd0
-+MPP22: gpio		x mikro int
-+MPP23: gpio		x switch irq
-++#define A38x_CUSTOMER_BOARD_1_MPP24_31         0x22043333
-+MPP24: ua1:rxd		x mikro rx
-+MPP25: ua1:txd		x mikro tx
-+MPP26: i2c1:sck		x mikro sck
-+MPP27: i2c1:sda		x mikro sda
-+MPP28: sd0:clk		x sd0
-+MPP29: gpio		x mikro rst
-+MPP30: ge1:txd2		? (config)
-+MPP31: ge1:txd3		? (config)
-++#define A38x_CUSTOMER_BOARD_1_MPP32_39         0x44400002
-+MPP32: ge1:txctl	? (unused)
-+MPP33: gpio		? (pic_com0)
-+MPP34: gpio		x rear button (pic_com1)
-+MPP35: gpio		? (pic_com2)
-+MPP36: gpio		? (unused)
-+MPP37: sd0:d3		x sd0
-+MPP38: sd0:d0		x sd0
-+MPP39: sd0:d1		x sd0
-++#define A38x_CUSTOMER_BOARD_1_MPP40_47         0x41144004
-+MPP40: sd0:d2		x sd0
-+MPP41: gpio		x switch reset
-+MPP42: gpio		? sw1-1
-+MPP43: spi1:cs2		x mikro cs
-+MPP44: sata3:prsnt	? (unused)
-+MPP45: ref:clk_out0	?
-+MPP46: ref:clk_out1	x switch clk
-+MPP47: 4		? (unused)
-++#define A38x_CUSTOMER_BOARD_1_MPP48_55         0x40333333
-+MPP48: tdm:pclk
-+MPP49: tdm:fsync
-+MPP50: tdm:drx
-+MPP51: tdm:dtx
-+MPP52: tdm:int
-+MPP53: tdm:rst
-+MPP54: gpio		? (pwm)
-+MPP55: spi1:cs1		x slic
-++#define A38x_CUSTOMER_BOARD_1_MPP56_63         0x00004444
-+MPP56: spi1:mosi	x mikro mosi
-+MPP57: spi1:sck		x mikro sck
-+MPP58: spi1:miso	x mikro miso
-+MPP59: spi1:cs0		x w25q32
-+*/
--- a/root/target/linux/mvebu/patches-4.19/450-reprobe_sfp_phy.patch
+++ b/root/target/linux/mvebu/patches-4.19/450-reprobe_sfp_phy.patch
@ -1,94 +0,0 @@
-From 28baa5e2635285b178326b301f534ed95c65dd01 Mon Sep 17 00:00:00 2001
-From: Jonas Gorski <jonas.gorski@gmail.com>
-Date: Thu, 29 Sep 2016 11:44:39 +0200
-Subject: [PATCH] sfp: retry phy probe if unsuccessful
-
-Some phys seem to take longer than 50 ms to come out of reset, so retry
-until we find a phy.
-
-Signed-off-by: Jonas Gorski <jonas.gorski@gmail.com>
---
- drivers/net/phy/sfp.c | 38 +++++++++++++++++++++++++-------------
- 1 file changed, 25 insertions(+), 13 deletions(-)
-
--- a/drivers/net/phy/sfp.c
-+++ b/drivers/net/phy/sfp.c
-@@ -1177,7 +1177,7 @@
- 	sfp->mod_phy = NULL;
- }
- 
-static void sfp_sm_probe_phy(struct sfp *sfp)
-+static int sfp_sm_probe_phy(struct sfp *sfp)
- {
- 	struct phy_device *phy;
- 	int err;
-@@ -1187,11 +1187,11 @@
- 	phy = mdiobus_scan(sfp->i2c_mii, SFP_PHY_ADDR);
- 	if (phy == ERR_PTR(-ENODEV)) {
- 		dev_info(sfp->dev, "no PHY detected\n");
-		return;
-+		return -EAGAIN;
- 	}
- 	if (IS_ERR(phy)) {
- 		dev_err(sfp->dev, "mdiobus scan returned %ld\n", PTR_ERR(phy));
-		return;
-+		return PTR_ERR(phy);
- 	}
- 
- 	err = sfp_add_phy(sfp->sfp_bus, phy);
-@@ -1199,11 +1199,13 @@
- 		phy_device_remove(phy);
- 		phy_device_free(phy);
- 		dev_err(sfp->dev, "sfp_add_phy failed: %d\n", err);
-		return;
-+		return err;
- 	}
- 
- 	sfp->mod_phy = phy;
- 	phy_start(phy);
-+
-+	return 0;
- }
- 
- static void sfp_sm_link_up(struct sfp *sfp)
-@@ -1267,14 +1269,9 @@
- 
- static void sfp_sm_mod_init(struct sfp *sfp)
- {
-	sfp_module_tx_enable(sfp);
-+	int ret = 0;
- 
-	/* Wait t_init before indicating that the link is up, provided the
-	 * current state indicates no TX_FAULT.  If TX_FAULT clears before
-	 * this time, that's fine too.
-	 */
-	sfp_sm_next(sfp, SFP_S_INIT, T_INIT_JIFFIES);
-	sfp->sm_retries = 5;
-+	sfp_module_tx_enable(sfp);
- 
- 	/* Setting the serdes link mode is guesswork: there's no
- 	 * field in the EEPROM which indicates what mode should
-@@ -1288,7 +1285,22 @@
- 	if (sfp->id.base.e1000_base_t ||
- 	    sfp->id.base.e100_base_lx ||
- 	    sfp->id.base.e100_base_fx)
-		sfp_sm_probe_phy(sfp);
-+		ret = sfp_sm_probe_phy(sfp);
-+
-+	if (!ret) {
-+		/* Wait t_init before indicating that the link is up, provided
-+		 * the current state indicates no TX_FAULT.  If TX_FAULT clears
-+		 * this time, that's fine too.
-+		 */
-+		sfp_sm_next(sfp, SFP_S_INIT, T_INIT_JIFFIES);
-+		sfp->sm_retries = 5;
-+		return;
-+	}
-+
-+	if (ret == -EAGAIN)
-+		sfp_sm_set_timer(sfp, T_PROBE_RETRY);
-+	else
-+		sfp_sm_next(sfp, SFP_S_TX_DISABLE, 0);
- }
- 
- static int sfp_sm_mod_hpower(struct sfp *sfp)
--- a/root/target/linux/mvebu/patches-4.19/520-arm64-dts-marvell-armada37xx-Add-eth0-alias.patch
+++ b/root/target/linux/mvebu/patches-4.19/520-arm64-dts-marvell-armada37xx-Add-eth0-alias.patch
@ -1,20 +0,0 @@
-From be893f672e340b56ca60f2f6c32fdd713a5852f5 Mon Sep 17 00:00:00 2001
-From: Kevin Mihelich <kevin@archlinuxarm.org>
-Date: Tue, 4 Jul 2017 19:25:28 -0600
-Subject: arm64: dts: marvell: armada37xx: Add eth0 alias
-
-Signed-off-by: Kevin Mihelich <kevin@archlinuxarm.org>
---
- arch/arm64/boot/dts/marvell/armada-37xx.dtsi | 1 +
- 1 file changed, 1 insertion(+)
-
--- a/arch/arm64/boot/dts/marvell/armada-37xx.dtsi
-+++ b/arch/arm64/boot/dts/marvell/armada-37xx.dtsi
-@@ -18,6 +18,7 @@
- 	#size-cells = <2>;
- 
- 	aliases {
-+		ethernet0 = &eth0;
- 		serial0 = &uart0;
- 		serial1 = &uart1;
- 	};
--- a/root/target/linux/mvebu/patches-4.19/526-PCI-aardvark-disable-LOS-state-by-default.patch
+++ b/root/target/linux/mvebu/patches-4.19/526-PCI-aardvark-disable-LOS-state-by-default.patch
@ -1,55 +0,0 @@
-From patchwork Thu Sep 28 12:58:36 2017
-Content-Type: text/plain; charset="utf-8"
-MIME-Version: 1.0
-Content-Transfer-Encoding: 7bit
-Subject: [v2,5/7] PCI: aardvark: disable LOS state by default
-X-Patchwork-Submitter: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
-X-Patchwork-Id: 819590
-Message-Id: <20170928125838.11887-6-thomas.petazzoni@free-electrons.com>
-To: Bjorn Helgaas <bhelgaas@google.com>, linux-pci@vger.kernel.org
-Cc: Jason Cooper <jason@lakedaemon.net>, Andrew Lunn <andrew@lunn.ch>,
- Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com>, Gregory Clement
- <gregory.clement@free-electrons.com>, 
- Nadav Haklai <nadavh@marvell.com>, Hanna Hawa <hannah@marvell.com>,
- Yehuda Yitschak <yehuday@marvell.com>,
- linux-arm-kernel@lists.infradead.org, Antoine Tenart
- <antoine.tenart@free-electrons.com>, =?utf-8?q?Miqu=C3=A8l_Raynal?=
- <miquel.raynal@free-electrons.com>, Victor Gu <xigu@marvell.com>,
- Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
-Date: Thu, 28 Sep 2017 14:58:36 +0200
-From: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
-List-Id: <linux-pci.vger.kernel.org>
-
-From: Victor Gu <xigu@marvell.com>
-
-Some PCIe devices do not support LOS, and will cause timeouts if the
-root complex forces the LOS state. This patch disables the LOS state
-by default.
-
-This is part of fixing bug
-https://bugzilla.kernel.org/show_bug.cgi?id=196339, this commit was
-reported as the user to be important to get a Intel 7260 mini-PCIe
-WiFi card working.
-
-Fixes: 8c39d710363c1 ("PCI: aardvark: Add Aardvark PCI host controller driver")
-Signed-off-by: Victor Gu <xigu@marvell.com>
-Reviewed-by: Evan Wang <xswang@marvell.com>
-Reviewed-by: Nadav Haklai <nadavh@marvell.com>
-[Thomas: tweak commit log.]
-Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
---
- drivers/pci/controller/pci-aardvark.c | 3 +--
- 1 file changed, 1 insertion(+), 2 deletions(-)
-
--- a/drivers/pci/controller/pci-aardvark.c
-+++ b/drivers/pci/controller/pci-aardvark.c
-@@ -321,8 +321,7 @@
- 
- 	advk_pcie_wait_for_link(pcie);
- 
-	reg = PCIE_CORE_LINK_L0S_ENTRY |
-		(1 << PCIE_CORE_LINK_WIDTH_SHIFT);
-+	reg = (1 << PCIE_CORE_LINK_WIDTH_SHIFT);
- 	advk_writel(pcie, reg, PCIE_CORE_LINK_CTRL_STAT_REG);
- 
- 	reg = advk_readl(pcie, PCIE_CORE_CMD_STATUS_REG);
--- a/root/target/linux/mvebu/patches-4.19/527-PCI-aardvark-allow-to-specify-link-capability.patch
+++ b/root/target/linux/mvebu/patches-4.19/527-PCI-aardvark-allow-to-specify-link-capability.patch
@ -1,43 +0,0 @@
-From f70b629e488cc3f2a325ac35476f4f7ae502c5d0 Mon Sep 17 00:00:00 2001
-From: Tomasz Maciej Nowak <tmn505@gmail.com>
-Date: Thu, 14 Jun 2018 14:24:40 +0200
-Subject: [PATCH 1/2] PCI: aardvark: allow to specify link capability
-
-Use DT of_pci_get_max_link_speed() facility to allow specifying link
-capability. If none or unspecified value is given it falls back to gen2,
-which is default for Armada 3700 SoC.
-
-Signed-off-by: Tomasz Maciej Nowak <tmn505@gmail.com>
---
- drivers/pci/controller/pci-aardvark.c | 11 +++++++++--
- 1 file changed, 9 insertions(+), 2 deletions(-)
-
--- a/drivers/pci/controller/pci-aardvark.c
-+++ b/drivers/pci/controller/pci-aardvark.c
-@@ -231,6 +231,8 @@
- 
- static void advk_pcie_setup_hw(struct advk_pcie *pcie)
- {
-+	struct device *dev = &pcie->pdev->dev;
-+	struct device_node *node = dev->of_node;
- 	u32 reg;
- 
- 	/* Set to Direct mode */
-@@ -264,10 +266,15 @@
- 		PCIE_CORE_CTRL2_TD_ENABLE;
- 	advk_writel(pcie, reg, PCIE_CORE_CTRL2_REG);
- 
-	/* Set GEN2 */
-+	/* Set GEN */
- 	reg = advk_readl(pcie, PCIE_CORE_CTRL0_REG);
- 	reg &= ~PCIE_GEN_SEL_MSK;
-	reg |= SPEED_GEN_2;
-+	if (of_pci_get_max_link_speed(node) == 1)
-+		reg |= SPEED_GEN_1;
-+	else if (of_pci_get_max_link_speed(node) == 3)
-+		reg |= SPEED_GEN_3;
-+	else
-+		reg |= SPEED_GEN_2;
- 	advk_writel(pcie, reg, PCIE_CORE_CTRL0_REG);
- 
- 	/* Set lane X1 */
--- a/root/target/linux/mvebu/patches-4.19/528-arm64-dts-armada-3720-espressobin-set-max-link-to-ge.patch
+++ b/root/target/linux/mvebu/patches-4.19/528-arm64-dts-armada-3720-espressobin-set-max-link-to-ge.patch
@ -1,73 +0,0 @@
-From 33f8fdcedb01680427328d710594facef7a0092c Mon Sep 17 00:00:00 2001
-From: Tomasz Maciej Nowak <tmn505@gmail.com>
-Date: Thu, 14 Jun 2018 14:40:26 +0200
-Subject: [PATCH 2/2] arm64: dts: armada-3720-espressobin: set max link to gen1
-
-Since the beginning there's been an issue with initializing the Atheros
-based MiniPCIe wireless cards. Here's an example of kerenel log:
-
- OF: PCI: host bridge /soc/pcie@d0070000 ranges:
- OF: PCI:   MEM 0xe8000000..0xe8ffffff -> 0xe8000000
- OF: PCI:    IO 0xe9000000..0xe900ffff -> 0xe9000000
- advk-pcie d0070000.pcie: link up
- advk-pcie d0070000.pcie: PCI host bridge to bus 0000:00
- pci_bus 0000:00: root bus resource [bus 00-ff]
- pci_bus 0000:00: root bus resource [mem0xe8000000-0xe8ffffff]
- pci_bus 0000:00: root bus resource [io  0x0000-0xffff](bus address [0xe9000000-0xe900ffff])
- pci 0000:00:00.0: BAR 0: assigned [mem0xe8000000-0xe801ffff 64bit]
- pci 0000:00:00.0: BAR 6: assigned [mem0xe8020000-0xe802ffff pref]
- [...]
- advk-pcie d0070000.pcie: Posted PIO Response Status: CA,0xe00 @ 0x3c
- advk-pcie d0070000.pcie: Posted PIO Response Status: CA,0xe00 @ 0x44
- advk-pcie d0070000.pcie: Posted PIO Response Status: CA,0xe00 @ 0x4
- ath9k 0000:00:00.0: enabling device (0000 -> 0002)
- advk-pcie d0070000.pcie: Posted PIO Response Status: CA,0xe00 @ 0x3c
- advk-pcie d0070000.pcie: Posted PIO Response Status: CA,0xe00 @ 0xc
- advk-pcie d0070000.pcie: Posted PIO Response Status: CA,0xe00 @ 0x4
- advk-pcie d0070000.pcie: Posted PIO Response Status: CA,0xe00 @ 0x40
- ath9k 0000:00:00.0: request_irq failed
- advk-pcie d0070000.pcie: Posted PIO Response Status: CA,0xe00 @ 0x4
- ath9k: probe of 0000:00:00.0 failed with error -22
-
-The same happens for ath5k cards, while ath10k card didn't appear at
-all (not detected):
-
- OF: PCI: host bridge /soc/pcie@d0070000 ranges:
- OF: PCI:   MEM 0xe8000000..0xe8ffffff -> 0xe8000000
- OF: PCI:    IO 0xe9000000..0xe900ffff -> 0xe9000000
- advk-pcie d0070000.pcie: link never came up
- advk-pcie d0070000.pcie: PCI host bridge to bus 0000:00
- pci_bus 0000:00: root bus resource [bus 00-ff]
- pci_bus 0000:00: root bus resource [mem0xe8000000-0xe8ffffff]
- pci_bus 0000:00: root bus resource [io  0x0000-0xffff](bus address [0xe9000000-0xe900ffff])
- advk-pcie d0070000.pcie: config read/write timed out
-
-Following the issue on esppressobin.net forum [1] the workaround seems
-to be limiting the speed of PCIe bridge to 1st generation. This fixed
-the initialisation of all tested Atheros wireless cards.
-The patch in the forum thread swaped registers which would limit speed
-for all Armada 3700 based boards. The approach in this patch, in
-conjunction with "PCI: aardvark: allow to specify link capability" patch
-is less invasive, it only touches the affected board.
-
-For the record, the iwlwifi and mt76 cards were not affected by this
-issue.
-
-1. http://espressobin.net/forums/topic/which-pcie-wlan-cards-are-supported
-
-Signed-off-by: Tomasz Maciej Nowak <tmn505@gmail.com>
---
- arch/arm64/boot/dts/marvell/armada-3720-espressobin.dts | 2 ++
- 1 file changed, 2 insertions(+)
-
--- a/arch/arm64/boot/dts/marvell/armada-3720-espressobin.dts
-+++ b/arch/arm64/boot/dts/marvell/armada-3720-espressobin.dts
-@@ -46,6 +46,8 @@
- /* J9 */
- &pcie0 {
- 	status = "okay";
-+
-+	max-link-speed = <1>;
- };
- 
- /* J6 */