mirror of
https://github.com/Ysurac/openmptcprouter.git
synced 2025-03-09 15:40:20 +00:00
Remove not working patches for bcm27xx kernel 6.12
This commit is contained in:
parent
22419b341e
commit
f9bd99a1b1
2 changed files with 0 additions and 411 deletions
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@ -1,380 +0,0 @@
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From e0a2250e98b19cf3555db55376dc23cbe7139718 Mon Sep 17 00:00:00 2001
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From: Jonathan Bell <jonathan@raspberrypi.com>
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Date: Mon, 13 Sep 2021 11:14:32 +0100
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Subject: [PATCH 350/697] usb: dwc3: Set DMA and coherent masks early
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dwc3 allocates scratch and event buffers in the top-level driver. Hack the
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probe function to set the DMA mask before trying to allocate these.
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I think the event buffers are only used in device mode, but the scratch
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buffers may be used if core hibernation is enabled.
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usb: dwc3: add support for new DT quirks
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Apply the optional axi-pipe-limit and dis-in-autoretry-quirk properties
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during driver probe.
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Signed-off-by: Jonathan Bell <jonathan@raspberrypi.com>
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phy: phy-brcm-usb: Add 2712 support
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usb: dwc3: if the host controller instance number is present in DT, use it
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If two instances of a dwc3 host controller are specified in devicetree,
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then the probe order may be arbitrary which results in the device names
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swapping on a per-boot basis.
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If a "usb" alias with the instance number is specified, then use
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that to construct the device name instead of autogenerating one.
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Signed-off-by: Jonathan Bell <jonathan@raspberrypi.com>
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rp1 dwc3 changes
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drivers: usb: dwc3: allow setting GTXTHRCFG on dwc_usb3.0 hardware
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Equivalent register fields exist in the SuperSpeed Host version of the
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hardware, so allow the use of TX thresholds if specified in devicetree.
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Signed-off-by: Jonathan Bell <jonathan@raspberrypi.com>
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drivers: usb: dwc3: remove downstream quirk dis-in-autoretry
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Upstream have unilaterally disabled the feature.
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Partially reverts 6e9142a26ee0fdc3a5adc49ed6cedc0b16ec2ed1 (downstream)
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Signed-off-by: Jonathan Bell <jonathan@raspberrypi.com>
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---
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drivers/phy/broadcom/Kconfig | 2 +-
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.../phy/broadcom/phy-brcm-usb-init-synopsys.c | 59 +++++++++++++++++++
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drivers/phy/broadcom/phy-brcm-usb-init.h | 2 +
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drivers/phy/broadcom/phy-brcm-usb.c | 18 +++++-
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drivers/usb/dwc3/core.c | 53 +++++++++++++++++
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drivers/usb/dwc3/core.h | 5 ++
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drivers/usb/dwc3/host.c | 9 ++-
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7 files changed, 145 insertions(+), 3 deletions(-)
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--- a/drivers/phy/broadcom/Kconfig
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+++ b/drivers/phy/broadcom/Kconfig
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@@ -93,7 +93,7 @@ config PHY_BRCM_SATA
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config PHY_BRCM_USB
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tristate "Broadcom STB USB PHY driver"
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- depends on ARCH_BCMBCA || ARCH_BRCMSTB || COMPILE_TEST
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+ depends on ARCH_BCMBCA || ARCH_BRCMSTB || ARCH_BCM2835 || COMPILE_TEST
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depends on OF
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select GENERIC_PHY
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select SOC_BRCMSTB if ARCH_BRCMSTB
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--- a/drivers/phy/broadcom/phy-brcm-usb-init-synopsys.c
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+++ b/drivers/phy/broadcom/phy-brcm-usb-init-synopsys.c
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@@ -341,6 +341,36 @@ static void usb_init_common_7216(struct
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usb_init_common(params);
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}
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+static void usb_init_common_2712(struct brcm_usb_init_params *params)
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+{
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+ void __iomem *ctrl = params->regs[BRCM_REGS_CTRL];
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+ void __iomem *bdc_ec = params->regs[BRCM_REGS_BDC_EC];
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+ u32 reg;
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+
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+ if (params->syscon_piarbctl)
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+ syscon_piarbctl_init(params->syscon_piarbctl);
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+
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+ USB_CTRL_UNSET(ctrl, USB_PM, USB_PWRDN);
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+
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+ usb_wake_enable_7211b0(params, false);
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+
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+ usb_init_common(params);
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+
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+ /*
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+ * The BDC controller will get occasional failures with
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+ * the default "Read Transaction Size" of 6 (1024 bytes).
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+ * Set it to 4 (256 bytes).
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+ */
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+ if ((params->supported_port_modes != USB_CTLR_MODE_HOST) && bdc_ec) {
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+ reg = brcm_usb_readl(bdc_ec + BDC_EC_AXIRDA);
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+ reg &= ~BDC_EC_AXIRDA_RTS_MASK;
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+ reg |= (0x4 << BDC_EC_AXIRDA_RTS_SHIFT);
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+ brcm_usb_writel(reg, bdc_ec + BDC_EC_AXIRDA);
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+ }
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+
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+ usb2_eye_fix_7211b0(params);
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+}
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+
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static void usb_init_xhci(struct brcm_usb_init_params *params)
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{
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pr_debug("%s\n", __func__);
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@@ -386,6 +416,18 @@ static void usb_uninit_common_7211b0(str
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}
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+static void usb_uninit_common_2712(struct brcm_usb_init_params *params)
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+{
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+ void __iomem *ctrl = params->regs[BRCM_REGS_CTRL];
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+
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+ if (params->wake_enabled) {
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+ USB_CTRL_SET(ctrl, TEST_PORT_CTL, TPOUT_SEL_PME_GEN);
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+ usb_wake_enable_7211b0(params, true);
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+ } else {
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+ USB_CTRL_SET(ctrl, USB_PM, USB_PWRDN);
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+ }
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+}
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+
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static void usb_uninit_xhci(struct brcm_usb_init_params *params)
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{
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@@ -440,6 +482,16 @@ static const struct brcm_usb_init_ops bc
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.set_dual_select = usb_set_dual_select,
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};
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+static const struct brcm_usb_init_ops bcm2712_ops = {
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+ .init_ipp = usb_init_ipp,
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+ .init_common = usb_init_common_2712,
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+ .init_xhci = usb_init_xhci,
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+ .uninit_common = usb_uninit_common_2712,
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+ .uninit_xhci = usb_uninit_xhci,
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+ .get_dual_select = usb_get_dual_select,
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+ .set_dual_select = usb_set_dual_select,
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+};
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+
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void brcm_usb_dvr_init_7216(struct brcm_usb_init_params *params)
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{
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@@ -457,3 +509,10 @@ void brcm_usb_dvr_init_7211b0(struct brc
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params->family_name = "7211";
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params->ops = &bcm7211b0_ops;
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}
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+
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+void brcm_usb_dvr_init_2712(struct brcm_usb_init_params *params)
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+{
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+ params->family_name = "2712";
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+ params->ops = &bcm2712_ops;
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+ params->suspend_with_clocks = true;
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+}
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--- a/drivers/phy/broadcom/phy-brcm-usb-init.h
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+++ b/drivers/phy/broadcom/phy-brcm-usb-init.h
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@@ -70,12 +70,14 @@ struct brcm_usb_init_params {
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const struct brcm_usb_init_ops *ops;
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struct regmap *syscon_piarbctl;
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bool wake_enabled;
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+ bool suspend_with_clocks;
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};
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void brcm_usb_dvr_init_4908(struct brcm_usb_init_params *params);
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void brcm_usb_dvr_init_7445(struct brcm_usb_init_params *params);
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void brcm_usb_dvr_init_7216(struct brcm_usb_init_params *params);
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void brcm_usb_dvr_init_7211b0(struct brcm_usb_init_params *params);
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+void brcm_usb_dvr_init_2712(struct brcm_usb_init_params *params);
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static inline u32 brcm_usb_readl(void __iomem *addr)
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{
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--- a/drivers/phy/broadcom/phy-brcm-usb.c
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+++ b/drivers/phy/broadcom/phy-brcm-usb.c
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@@ -75,7 +75,7 @@ struct brcm_usb_phy_data {
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};
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static s8 *node_reg_names[BRCM_REGS_MAX] = {
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- "crtl", "xhci_ec", "xhci_gbl", "usb_phy", "usb_mdio", "bdc_ec"
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+ "ctrl", "xhci_ec", "xhci_gbl", "usb_phy", "usb_mdio", "bdc_ec"
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};
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static int brcm_pm_notifier(struct notifier_block *notifier,
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@@ -315,6 +315,18 @@ static const struct match_chip_info chip
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.optional_reg = BRCM_REGS_BDC_EC,
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};
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+static const struct match_chip_info chip_info_2712 = {
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+ .init_func = &brcm_usb_dvr_init_2712,
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+ .required_regs = {
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+ BRCM_REGS_CTRL,
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+ BRCM_REGS_XHCI_EC,
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+ BRCM_REGS_XHCI_GBL,
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+ BRCM_REGS_USB_MDIO,
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+ -1,
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+ },
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+ .optional_reg = BRCM_REGS_BDC_EC,
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+};
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+
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static const struct match_chip_info chip_info_7445 = {
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.init_func = &brcm_usb_dvr_init_7445,
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.required_regs = {
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@@ -338,6 +350,10 @@ static const struct of_device_id brcm_us
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.data = &chip_info_7211b0,
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},
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{
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+ .compatible = "brcm,bcm2712-usb-phy",
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+ .data = &chip_info_2712,
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+ },
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+ {
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.compatible = "brcm,brcmstb-usb-phy",
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.data = &chip_info_7445,
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},
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--- a/drivers/usb/dwc3/core.c
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+++ b/drivers/usb/dwc3/core.c
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@@ -1304,6 +1304,24 @@ static void dwc3_config_threshold(struct
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}
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}
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+static void dwc3_set_axi_pipe_limit(struct dwc3 *dwc)
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+{
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+ struct device *dev = dwc->dev;
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+ u32 cfg;
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+
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+ if (!dwc->axi_pipe_limit)
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+ return;
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+ if (dwc->axi_pipe_limit > 16) {
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+ dev_err(dev, "Invalid axi_pipe_limit property\n");
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+ return;
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+ }
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+ cfg = dwc3_readl(dwc->regs, DWC3_GSBUSCFG1);
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+ cfg &= ~DWC3_GSBUSCFG1_PIPETRANSLIMIT(15);
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+ cfg |= DWC3_GSBUSCFG1_PIPETRANSLIMIT(dwc->axi_pipe_limit - 1);
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+
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+ dwc3_writel(dwc->regs, DWC3_GSBUSCFG1, cfg);
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+}
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+
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/**
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* dwc3_core_init - Low-level initialization of DWC3 Core
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* @dwc: Pointer to our controller context structure
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@@ -1371,6 +1389,8 @@ static int dwc3_core_init(struct dwc3 *d
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dwc3_config_soc_bus(dwc);
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+ dwc3_set_axi_pipe_limit(dwc);
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+
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ret = dwc3_phy_power_on(dwc);
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if (ret)
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goto err_exit_phy;
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@@ -1475,6 +1495,24 @@ static int dwc3_core_init(struct dwc3 *d
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dwc3_writel(dwc->regs, DWC3_LLUCTL, reg);
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}
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+ if (DWC3_IP_IS(DWC3) && dwc->dr_mode == USB_DR_MODE_HOST) {
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+ u8 tx_thr_num = dwc->tx_thr_num_pkt_prd;
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+ u8 tx_maxburst = dwc->tx_max_burst_prd;
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+
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+ if (tx_thr_num && tx_maxburst) {
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+ reg = dwc3_readl(dwc->regs, DWC3_GTXTHRCFG);
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+ reg |= DWC3_GTXTHRCFG_PKTCNTSEL;
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+
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+ reg &= ~DWC3_GTXTHRCFG_TXPKTCNT(~0);
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+ reg |= DWC3_GTXTHRCFG_TXPKTCNT(tx_thr_num);
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+
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+ reg &= ~DWC3_GTXTHRCFG_MAXTXBURSTSIZE(~0);
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+ reg |= DWC3_GTXTHRCFG_MAXTXBURSTSIZE(tx_maxburst);
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+
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+ dwc3_writel(dwc->regs, DWC3_GTXTHRCFG, reg);
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+ }
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+ }
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+
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return 0;
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err_power_off_phy:
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@@ -1660,6 +1698,7 @@ static void dwc3_get_properties(struct d
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u8 tx_thr_num_pkt_prd = 0;
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u8 tx_max_burst_prd = 0;
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u8 tx_fifo_resize_max_num;
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+ u8 axi_pipe_limit;
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const char *usb_psy_name;
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int ret;
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@@ -1682,6 +1721,9 @@ static void dwc3_get_properties(struct d
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*/
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tx_fifo_resize_max_num = 6;
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+ /* Default to 0 (don't override hardware defaults) */
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+ axi_pipe_limit = 0;
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+
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dwc->maximum_speed = usb_get_maximum_speed(dev);
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dwc->max_ssp_rate = usb_get_maximum_ssp_rate(dev);
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dwc->dr_mode = usb_get_dr_mode(dev);
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@@ -1803,6 +1845,9 @@ static void dwc3_get_properties(struct d
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dwc->dis_split_quirk = device_property_read_bool(dev,
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"snps,dis-split-quirk");
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+ device_property_read_u8(dev, "snps,axi-pipe-limit",
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+ &axi_pipe_limit);
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+
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dwc->lpm_nyet_threshold = lpm_nyet_threshold;
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dwc->tx_de_emphasis = tx_de_emphasis;
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@@ -1820,6 +1865,8 @@ static void dwc3_get_properties(struct d
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dwc->tx_thr_num_pkt_prd = tx_thr_num_pkt_prd;
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dwc->tx_max_burst_prd = tx_max_burst_prd;
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+ dwc->axi_pipe_limit = axi_pipe_limit;
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+
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dwc->imod_interval = 0;
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dwc->tx_fifo_resize_max_num = tx_fifo_resize_max_num;
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@@ -2161,6 +2208,12 @@ static int dwc3_probe(struct platform_de
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dwc3_get_software_properties(dwc);
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+ if (!dwc->sysdev_is_parent) {
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+ ret = dma_set_mask_and_coherent(dwc->sysdev, DMA_BIT_MASK(64));
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+ if (ret)
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+ return ret;
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+ }
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+
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dwc->reset = devm_reset_control_array_get_optional_shared(dev);
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if (IS_ERR(dwc->reset)) {
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ret = PTR_ERR(dwc->reset);
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--- a/drivers/usb/dwc3/core.h
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+++ b/drivers/usb/dwc3/core.h
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@@ -198,6 +198,9 @@
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#define DWC3_GSBUSCFG0_REQINFO(n) (((n) & 0xffff) << 16)
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#define DWC3_GSBUSCFG0_REQINFO_UNSPECIFIED 0xffffffff
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+/* Global SoC Bus Configuration Register 1 */
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+#define DWC3_GSBUSCFG1_PIPETRANSLIMIT(n) (((n) & 0xf) << 8)
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+
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/* Global Debug LSP MUX Select */
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#define DWC3_GDBGLSPMUX_ENDBC BIT(15) /* Host only */
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#define DWC3_GDBGLSPMUX_HOSTSELECT(n) ((n) & 0x3fff)
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@@ -1086,6 +1089,7 @@ struct dwc3_scratchpad_array {
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* @tx_max_burst_prd: max periodic ESS transmit burst size
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* @tx_fifo_resize_max_num: max number of fifos allocated during txfifo resize
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* @clear_stall_protocol: endpoint number that requires a delayed status phase
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+ * @axi_max_pipe: set to override the maximum number of pipelined AXI transfers
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* @hsphy_interface: "utmi" or "ulpi"
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* @connected: true when we're connected to a host, false otherwise
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* @softconnect: true when gadget connect is called, false when disconnect runs
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@@ -1333,6 +1337,7 @@ struct dwc3 {
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u8 tx_max_burst_prd;
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u8 tx_fifo_resize_max_num;
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u8 clear_stall_protocol;
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+ u8 axi_pipe_limit;
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const char *hsphy_interface;
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--- a/drivers/usb/dwc3/host.c
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+++ b/drivers/usb/dwc3/host.c
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@@ -126,10 +126,12 @@ out:
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int dwc3_host_init(struct dwc3 *dwc)
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{
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+ struct platform_device *pdev = to_platform_device(dwc->dev);
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struct property_entry props[6];
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struct platform_device *xhci;
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int ret, irq;
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int prop_idx = 0;
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+ int id;
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/*
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* Some platforms need to power off all Root hub ports immediately after DWC3 set to host
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@@ -141,7 +143,12 @@ int dwc3_host_init(struct dwc3 *dwc)
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if (irq < 0)
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return irq;
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- xhci = platform_device_alloc("xhci-hcd", PLATFORM_DEVID_AUTO);
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+ id = of_alias_get_id(pdev->dev.of_node, "usb");
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+ if (id >= 0)
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+ xhci = platform_device_alloc("xhci-hcd", id);
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+ else
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+ xhci = platform_device_alloc("xhci-hcd", PLATFORM_DEVID_AUTO);
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+
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if (!xhci) {
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dev_err(dwc->dev, "couldn't allocate xHCI device\n");
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return -ENOMEM;
|
|
@ -1,31 +0,0 @@
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From ac1e5f4bf230b954e07c5133e694e0ba696b34b0 Mon Sep 17 00:00:00 2001
|
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From: Dave Stevenson <dave.stevenson@raspberrypi.com>
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||||
Date: Mon, 9 Dec 2024 10:43:18 +0000
|
||||
Subject: [PATCH 696/697] media: i2c: ov9282: Correct the exposure offset
|
||||
|
||||
The datasheet lists that "Maximum exposure time is frame
|
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length -25 row periods, where frame length is set by
|
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registers {0x380E, 0x380F}".
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However this driver had OV9282_EXPOSURE_OFFSET set to 12
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which allowed that restriction to be violated, and would
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result in very under-exposed images.
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|
||||
Correct the offset.
|
||||
|
||||
Fixes: 14ea315bbeb7 ("media: i2c: Add ov9282 camera sensor driver")
|
||||
Signed-off-by: Dave Stevenson <dave.stevenson@raspberrypi.com>
|
||||
---
|
||||
drivers/media/i2c/ov9282.c | 2 +-
|
||||
1 file changed, 1 insertion(+), 1 deletion(-)
|
||||
|
||||
--- a/drivers/media/i2c/ov9282.c
|
||||
+++ b/drivers/media/i2c/ov9282.c
|
||||
@@ -40,7 +40,7 @@
|
||||
/* Exposure control */
|
||||
#define OV9282_REG_EXPOSURE 0x3500
|
||||
#define OV9282_EXPOSURE_MIN 1
|
||||
-#define OV9282_EXPOSURE_OFFSET 12
|
||||
+#define OV9282_EXPOSURE_OFFSET 25
|
||||
#define OV9282_EXPOSURE_STEP 1
|
||||
#define OV9282_EXPOSURE_DEFAULT 0x0282
|
||||
|
Loading…
Add table
Add a link
Reference in a new issue