Test for RUTX 6.1 compilation

6.1/target/linux/ipq40xx/patches-6.1/400-mmc-sdhci-sdhci-msm-use-sdhci_set_clock-instead-of-s.patch

@@ -1,24 +0,0 @@
-From f63ea127643a605da97090ce585fdd7c2d17fa42 Mon Sep 17 00:00:00 2001
-From: Robert Marko <robert.marko@sartura.hr>
-Date: Mon, 14 Dec 2020 13:35:35 +0100
-Subject: [PATCH] mmc: sdhci-msm: use sdhci_set_clock
-
-When using sdhci_msm_set_clock clock setting will fail, so lets
-use the generic sdhci_set_clock.
-
-Signed-off-by: Robert Marko <robert.marko@sartura.hr>
----
- drivers/mmc/host/sdhci-msm.c | 2 +-
- 1 file changed, 1 insertion(+), 1 deletion(-)
-
---- a/drivers/mmc/host/sdhci-msm.c
-+++ b/drivers/mmc/host/sdhci-msm.c
-@@ -2447,7 +2447,7 @@ MODULE_DEVICE_TABLE(of, sdhci_msm_dt_mat
- 
- static const struct sdhci_ops sdhci_msm_ops = {
- 	.reset = sdhci_msm_reset,
--	.set_clock = sdhci_msm_set_clock,
-+	.set_clock = sdhci_set_clock,
- 	.get_min_clock = sdhci_msm_get_min_clock,
- 	.get_max_clock = sdhci_msm_get_max_clock,
- 	.set_bus_width = sdhci_set_bus_width,

6.1/target/linux/ipq40xx/patches-6.1/704-net-phy-define-PSGMII-PHY-interface-mode.patch

@@ -1,61 +0,0 @@
-From 3e1825e00dafb68eec25df389b63f3ab3d905b59 Mon Sep 17 00:00:00 2001
-From: Gabor Juhos <j4g8y7@gmail.com>
-Date: Fri, 25 Dec 2020 08:02:47 +0100
-Subject: [PATCH] net: phy: define PSGMII PHY interface mode
-
-The PSGMII interface is similar to QSGMII. The main difference
-is that the PSGMII interface combines five SGMII lines into a
-single link while in QSGMII only four lines are combined.
-
-Similarly to the QSGMII, this interface mode might also needs
-special handling within the MAC driver.
-
-Add definitions for the PHY layer to allow to express this type
-of connection between the MAC and PHY.
-
-Signed-off-by: Gabor Juhos <j4g8y7@gmail.com>
----
- Documentation/devicetree/bindings/net/ethernet-controller.yaml | 1 +
- drivers/net/phy/phylink.c                                      | 1 +
- include/linux/phy.h                                            | 3 +++
- 3 files changed, 5 insertions(+)
-
---- a/Documentation/devicetree/bindings/net/ethernet-controller.yaml
-+++ b/Documentation/devicetree/bindings/net/ethernet-controller.yaml
-@@ -64,6 +64,7 @@ properties:
-       - mii
-       - gmii
-       - sgmii
-+      - psgmii
-       - qsgmii
-       - tbi
-       - rev-mii
---- a/drivers/net/phy/phylink.c
-+++ b/drivers/net/phy/phylink.c
-@@ -629,6 +629,7 @@ static int phylink_parse_mode(struct phy
- 
- 		switch (pl->link_config.interface) {
- 		case PHY_INTERFACE_MODE_SGMII:
-+		case PHY_INTERFACE_MODE_PSGMII:
- 		case PHY_INTERFACE_MODE_QSGMII:
- 			phylink_set(pl->supported, 10baseT_Half);
- 			phylink_set(pl->supported, 10baseT_Full);
---- a/include/linux/phy.h
-+++ b/include/linux/phy.h
-@@ -138,6 +138,7 @@ typedef enum {
- 	PHY_INTERFACE_MODE_XGMII,
- 	PHY_INTERFACE_MODE_XLGMII,
- 	PHY_INTERFACE_MODE_MOCA,
-+	PHY_INTERFACE_MODE_PSGMII,
- 	PHY_INTERFACE_MODE_QSGMII,
- 	PHY_INTERFACE_MODE_TRGMII,
- 	PHY_INTERFACE_MODE_100BASEX,
-@@ -243,6 +244,8 @@ static inline const char *phy_modes(phy_
- 		return "xlgmii";
- 	case PHY_INTERFACE_MODE_MOCA:
- 		return "moca";
-+	case PHY_INTERFACE_MODE_PSGMII:
-+		return "psgmii";
- 	case PHY_INTERFACE_MODE_QSGMII:
- 		return "qsgmii";
- 	case PHY_INTERFACE_MODE_TRGMII: