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# SPDX-License-Identifier: GPL-2.0-only
#
# Copyright (C) 2006-2020 OpenWrt.org
ifdef CONFIG_STRIP_KERNEL_EXPORTS
KERNEL_MAKEOPTS_IMAGE += \
EXTRA_LDSFLAGS="-I$(KERNEL_BUILD_DIR) -include symtab.h"
endif
INITRAMFS_EXTRA_FILES ?= $(GENERIC_PLATFORM_DIR)/image/initramfs-base-files.txt
ifneq (,$(KERNEL_CC))
KERNEL_MAKEOPTS += CC="$(KERNEL_CC)"
endif
export HOST_EXTRACFLAGS=-I$(STAGING_DIR_HOST)/include
# defined in quilt.mk
Kernel/Patch:=$(Kernel/Patch/Default)
ifneq (,$(findstring .xz,$(LINUX_SOURCE)))
LINUX_CAT:=xzcat
else
LINUX_CAT:=gzip -dc
endif
ifeq ($(strip $(CONFIG_EXTERNAL_KERNEL_TREE)),"")
ifeq ($(strip $(CONFIG_KERNEL_GIT_CLONE_URI)),"")
define Kernel/Prepare/Default
$(LINUX_CAT) $(DL_DIR)/$(LINUX_SOURCE) | $(TAR) -C $(KERNEL_BUILD_DIR) $(TAR_OPTIONS)
$(Kernel/Patch)
$(if $(QUILT),touch $(LINUX_DIR)/.quilt_used)
endef
else
define Kernel/Prepare/Default
$(LINUX_CAT) $(DL_DIR)/$(LINUX_SOURCE) | $(TAR) -C $(KERNEL_BUILD_DIR) $(TAR_OPTIONS)
endef
endif
else
define Kernel/Prepare/Default
mkdir -p $(KERNEL_BUILD_DIR)
if [ -d $(LINUX_DIR) ]; then \
rmdir $(LINUX_DIR); \
fi
ln -s $(CONFIG_EXTERNAL_KERNEL_TREE) $(LINUX_DIR)
if [ -d $(LINUX_DIR)/user_headers ]; then \
rm -rf $(LINUX_DIR)/user_headers; \
fi
endef
endif
ifeq ($(CONFIG_TARGET_ROOTFS_INITRAMFS),y)
ifeq ($(CONFIG_TARGET_ROOTFS_INITRAMFS_SEPARATE),y)
define Kernel/SetInitramfs/PreConfigure
grep -v -e CONFIG_BLK_DEV_INITRD $(LINUX_DIR)/.config.old > $(LINUX_DIR)/.config
echo 'CONFIG_BLK_DEV_INITRD=y' >> $(LINUX_DIR)/.config
echo 'CONFIG_INITRAMFS_SOURCE=""' >> $(LINUX_DIR)/.config
endef
else
ifeq ($(strip $(CONFIG_EXTERNAL_CPIO)),"")
define Kernel/SetInitramfs/PreConfigure
grep -v -e INITRAMFS -e CONFIG_RD_ -e CONFIG_BLK_DEV_INITRD $(LINUX_DIR)/.config.old > $(LINUX_DIR)/.config
echo 'CONFIG_BLK_DEV_INITRD=y' >> $(LINUX_DIR)/.config
echo 'CONFIG_INITRAMFS_SOURCE="$(strip $(TARGET_DIR) $(INITRAMFS_EXTRA_FILES))"' >> $(LINUX_DIR)/.config
endef
else
define Kernel/SetInitramfs/PreConfigure
grep -v INITRAMFS $(LINUX_DIR)/.config.old > $(LINUX_DIR)/.config
echo 'CONFIG_INITRAMFS_SOURCE="$(call qstrip,$(CONFIG_EXTERNAL_CPIO))"' >> $(LINUX_DIR)/.config
endef
endif
endif
define Kernel/SetInitramfs
rm -f $(LINUX_DIR)/.config.prev
mv $(LINUX_DIR)/.config $(LINUX_DIR)/.config.old
$(call Kernel/SetInitramfs/PreConfigure)
echo "# CONFIG_INITRAMFS_PRESERVE_MTIME is not set" >> $(LINUX_DIR)/.config
ifneq ($(CONFIG_TARGET_ROOTFS_INITRAMFS_SEPARATE),y)
echo 'CONFIG_INITRAMFS_ROOT_UID=$(shell id -u)' >> $(LINUX_DIR)/.config
echo 'CONFIG_INITRAMFS_ROOT_GID=$(shell id -g)' >> $(LINUX_DIR)/.config
echo "$(if $(CONFIG_TARGET_INITRAMFS_FORCE),CONFIG_INITRAMFS_FORCE=y,# CONFIG_INITRAMFS_FORCE is not set)" >> $(LINUX_DIR)/.config
else
echo "# CONFIG_INITRAMFS_FORCE is not set" >> $(LINUX_DIR)/.config
endif
echo "$(if $(CONFIG_TARGET_INITRAMFS_COMPRESSION_NONE),CONFIG_INITRAMFS_COMPRESSION_NONE=y,# CONFIG_INITRAMFS_COMPRESSION_NONE is not set)" >> $(LINUX_DIR)/.config
echo -e "$(if $(CONFIG_TARGET_INITRAMFS_COMPRESSION_GZIP),CONFIG_INITRAMFS_COMPRESSION_GZIP=y\nCONFIG_RD_GZIP=y,# CONFIG_INITRAMFS_COMPRESSION_GZIP is not set\n# CONFIG_RD_GZIP is not set)" >> $(LINUX_DIR)/.config
echo -e "$(if $(CONFIG_TARGET_INITRAMFS_COMPRESSION_BZIP2),CONFIG_INITRAMFS_COMPRESSION_BZIP2=y\nCONFIG_RD_BZIP2=y,# CONFIG_INITRAMFS_COMPRESSION_BZIP2 is not set\n# CONFIG_RD_BZIP2 is not set)" >> $(LINUX_DIR)/.config
echo -e "$(if $(CONFIG_TARGET_INITRAMFS_COMPRESSION_LZMA),CONFIG_INITRAMFS_COMPRESSION_LZMA=y\nCONFIG_RD_LZMA=y,# CONFIG_INITRAMFS_COMPRESSION_LZMA is not set\n# CONFIG_RD_LZMA is not set)" >> $(LINUX_DIR)/.config
echo -e "$(if $(CONFIG_TARGET_INITRAMFS_COMPRESSION_LZO),CONFIG_INITRAMFS_COMPRESSION_LZO=y\nCONFIG_RD_LZO=y,# CONFIG_INITRAMFS_COMPRESSION_LZO is not set\n# CONFIG_RD_LZO is not set)" >> $(LINUX_DIR)/.config
echo -e "$(if $(CONFIG_TARGET_INITRAMFS_COMPRESSION_XZ),CONFIG_INITRAMFS_COMPRESSION_XZ=y\nCONFIG_RD_XZ=y,# CONFIG_INITRAMFS_COMPRESSION_XZ is not set\n# CONFIG_RD_XZ is not set)" >> $(LINUX_DIR)/.config
echo -e "$(if $(CONFIG_TARGET_INITRAMFS_COMPRESSION_LZ4),CONFIG_INITRAMFS_COMPRESSION_LZ4=y\nCONFIG_RD_LZ4=y,# CONFIG_INITRAMFS_COMPRESSION_LZ4 is not set\n# CONFIG_RD_LZ4 is not set)" >> $(LINUX_DIR)/.config
echo -e "$(if $(CONFIG_TARGET_INITRAMFS_COMPRESSION_ZSTD),CONFIG_INITRAMFS_COMPRESSION_ZSTD=y\nCONFIG_RD_ZSTD=y,# CONFIG_INITRAMFS_COMPRESSION_ZSTD is not set\n# CONFIG_RD_ZSTD is not set)" >> $(LINUX_DIR)/.config
endef
else
endif
define Kernel/SetNoInitramfs
mv $(LINUX_DIR)/.config.set $(LINUX_DIR)/.config.old
grep -v INITRAMFS $(LINUX_DIR)/.config.old > $(LINUX_DIR)/.config.set
echo 'CONFIG_INITRAMFS_SOURCE=""' >> $(LINUX_DIR)/.config.set
echo '# CONFIG_INITRAMFS_FORCE is not set' >> $(LINUX_DIR)/.config.set
echo "# CONFIG_INITRAMFS_PRESERVE_MTIME is not set" >> $(LINUX_DIR)/.config.set
endef
define Kernel/Configure/Default
rm -f $(LINUX_DIR)/localversion
$(LINUX_CONF_CMD) > $(LINUX_DIR)/.config.target
# copy CONFIG_KERNEL_* settings over to .config.target
awk '/^(#[[:space:]]+)?CONFIG_KERNEL/{sub("CONFIG_KERNEL_","CONFIG_");print}' $(TOPDIR)/.config >> $(LINUX_DIR)/.config.target
echo "# CONFIG_KALLSYMS_EXTRA_PASS is not set" >> $(LINUX_DIR)/.config.target
echo "# CONFIG_KALLSYMS_ALL is not set" >> $(LINUX_DIR)/.config.target
echo "CONFIG_KALLSYMS_UNCOMPRESSED=y" >> $(LINUX_DIR)/.config.target
$(SCRIPT_DIR)/package-metadata.pl kconfig $(TMP_DIR)/.packageinfo $(TOPDIR)/.config $(KERNEL_PATCHVER) > $(LINUX_DIR)/.config.override
$(SCRIPT_DIR)/kconfig.pl 'm+' '+' $(LINUX_DIR)/.config.target /dev/null $(LINUX_DIR)/.config.override > $(LINUX_DIR)/.config.set
$(call Kernel/SetNoInitramfs)
rm -rf $(KERNEL_BUILD_DIR)/modules
cmp -s $(LINUX_DIR)/.config.set $(LINUX_DIR)/.config.prev || { \
cp $(LINUX_DIR)/.config.set $(LINUX_DIR)/.config; \
cp $(LINUX_DIR)/.config.set $(LINUX_DIR)/.config.prev; \
}
$(_SINGLE) [ -d $(LINUX_DIR)/user_headers ] || $(KERNEL_MAKE) $(if $(findstring uml,$(BOARD)),ARCH=$(ARCH)) INSTALL_HDR_PATH=$(LINUX_DIR)/user_headers headers_install
grep '=[ym]' $(LINUX_DIR)/.config.set | LC_ALL=C sort | mkhash md5 > $(LINUX_DIR)/.vermagic
endef
define Kernel/Configure/Initramfs
$(call Kernel/SetInitramfs)
endef
define Kernel/CompileModules/Default
rm -f $(LINUX_DIR)/vmlinux $(LINUX_DIR)/System.map
+$(KERNEL_MAKE) $(if $(KERNELNAME),$(KERNELNAME),all) modules
# If .config did not change, use the previous timestamp to avoid package rebuilds
cmp -s $(LINUX_DIR)/.config $(LINUX_DIR)/.config.modules.save && \
mv $(LINUX_DIR)/.config.modules.save $(LINUX_DIR)/.config; \
$(CP) $(LINUX_DIR)/.config $(LINUX_DIR)/.config.modules.save
endef
OBJCOPY_STRIP = -R .reginfo -R .notes -R .note -R .comment -R .mdebug -R .note.gnu.build-id
# AMD64 shares the location with x86
ifeq ($(LINUX_KARCH),x86_64)
IMAGES_DIR:=../../x86/boot
endif
define Kernel/CopyImage
cmp -s $(LINUX_DIR)/vmlinux $(KERNEL_BUILD_DIR)/vmlinux$(1).debug || { \
$(KERNEL_CROSS)objcopy -O binary $(OBJCOPY_STRIP) -S $(LINUX_DIR)/vmlinux $(LINUX_KERNEL)$(1); \
$(KERNEL_CROSS)objcopy $(OBJCOPY_STRIP) -S $(LINUX_DIR)/vmlinux $(KERNEL_BUILD_DIR)/vmlinux$(1).elf; \
$(CP) $(LINUX_DIR)/vmlinux $(KERNEL_BUILD_DIR)/vmlinux$(1).debug; \
$(foreach k, \
$(if $(KERNEL_IMAGES),$(KERNEL_IMAGES),$(filter-out vmlinux dtbs,$(KERNELNAME))), \
$(CP) $(LINUX_DIR)/arch/$(LINUX_KARCH)/boot/$(IMAGES_DIR)/$(k) $(KERNEL_BUILD_DIR)/$(k)$(1); \
) \
}
endef
# Always add "modules" so a proper Module.symvers file is written that
# also contains symbols from the kernel modules. Without these symbols
# external packages that depend on exported symbols from kernel modules
# will fail to build.
define Kernel/CompileImage/Default
rm -f $(TARGET_DIR)/init
+$(KERNEL_MAKE) $(KERNEL_MAKEOPTS_IMAGE) $(if $(KERNELNAME),$(KERNELNAME),all) modules
$(call Kernel/CopyImage)
endef
# Here as well, always add "modules", see comment above.
ifneq ($(CONFIG_TARGET_ROOTFS_INITRAMFS),)
define Kernel/CompileImage/Initramfs
$(call Kernel/Configure/Initramfs)
$(CP) $(GENERIC_PLATFORM_DIR)/other-files/init $(TARGET_DIR)/init
$(if $(SOURCE_DATE_EPOCH),touch -hcd "@$(SOURCE_DATE_EPOCH)" $(TARGET_DIR) $(TARGET_DIR)/init)
rm -rf $(KERNEL_BUILD_DIR)/linux-$(LINUX_VERSION)/usr/initramfs_data.cpio*
ifeq ($(CONFIG_TARGET_ROOTFS_INITRAMFS_SEPARATE),y)
ifneq ($(qstrip $(CONFIG_EXTERNAL_CPIO)),)
$(CP) $(CONFIG_EXTERNAL_CPIO) $(KERNEL_BUILD_DIR)/initrd.cpio
else
( cd $(TARGET_DIR); find . | LC_ALL=C sort | $(STAGING_DIR_HOST)/bin/cpio --reproducible -o -H newc -R 0:0 > $(KERNEL_BUILD_DIR)/initrd.cpio )
endif
$(if $(SOURCE_DATE_EPOCH),touch -hcd "@$(SOURCE_DATE_EPOCH)" $(KERNEL_BUILD_DIR)/initrd.cpio)
$(if $(CONFIG_TARGET_INITRAMFS_COMPRESSION_BZIP2),bzip2 -9 -c < $(KERNEL_BUILD_DIR)/initrd.cpio > $(KERNEL_BUILD_DIR)/initrd.cpio.bzip2)
$(if $(CONFIG_TARGET_INITRAMFS_COMPRESSION_GZIP),gzip -n -f -S .gzip -9n $(KERNEL_BUILD_DIR)/initrd.cpio)
$(if $(CONFIG_TARGET_INITRAMFS_COMPRESSION_LZMA),$(STAGING_DIR_HOST)/bin/lzma e -lc1 -lp2 -pb2 $(KERNEL_BUILD_DIR)/initrd.cpio $(KERNEL_BUILD_DIR)/initrd.cpio.lzma)
# ? $(if $(CONFIG_TARGET_INITRAMFS_COMPRESSION_LZO),)
$(if $(CONFIG_TARGET_INITRAMFS_COMPRESSION_XZ),$(STAGING_DIR_HOST)/bin/xz -T$(if $(filter 1,$(NPROC)),2,0) -9 -fz --check=crc32 $(KERNEL_BUILD_DIR)/initrd.cpio)
# ? $(if $(CONFIG_TARGET_INITRAMFS_COMPRESSION_LZ4),)
$(if $(CONFIG_TARGET_INITRAMFS_COMPRESSION_ZSTD),$(STAGING_DIR_HOST)/bin/zstd -T0 -f -o $(KERNEL_BUILD_DIR)/initrd.cpio.zstd $(KERNEL_BUILD_DIR)/initrd.cpio)
endif
+$(KERNEL_MAKE) $(KERNEL_MAKEOPTS_IMAGE) $(if $(KERNELNAME),$(KERNELNAME),all) modules
$(call Kernel/CopyImage,-initramfs)
endef
else
define Kernel/CompileImage/Initramfs
endef
endif
define Kernel/Clean/Default
rm -f $(KERNEL_BUILD_DIR)/linux-$(LINUX_VERSION)/.configured
rm -f $(LINUX_KERNEL)
$(_SINGLE)$(MAKE) -C $(KERNEL_BUILD_DIR)/linux-$(LINUX_VERSION) clean
endef

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# Use the default kernel version if the Makefile doesn't override it
LINUX_RELEASE?=1
ifdef CONFIG_TESTING_KERNEL
KERNEL_PATCHVER:=$(KERNEL_TESTING_PATCHVER)
endif
LINUX_VERSION-5.4 = .238
LINUX_VERSION-5.15 = .86
LINUX_VERSION-6.1 = .10
LINUX_KERNEL_HASH-5.4.132 = 8466adbfb3579e751ede683496df7bb20f258b5f882250f3dd82be63736d00ef
LINUX_KERNEL_HASH-5.4.182 = b2f1201f64f010e9e3c85d6f303a559a7944a80a0244a86b8f5035bd23f1f40d
LINUX_KERNEL_HASH-5.4.188 = 9fbc8bfdc28c9fce2307bdf7cf1172c9819df673397a411c40a5c3d0a570fdbc
LINUX_KERNEL_HASH-5.4.194 = 284157891929f26f34ddd4c447980c1ce364c78df4f89b64edeac8ff9a1d3df6
LINUX_KERNEL_HASH-5.4.203 = fc933f5b13066cfa54aacb5e86747a167bad1d8d23972e4a03ab5ee36c29798a
LINUX_KERNEL_HASH-5.4.238 = 70a2b2da85598eba6a73cdc0749e441cbdf3011d9babcb7028a46aa8d98aa91f
LINUX_KERNEL_HASH-5.15.4 = 549d0fb75e65f6158e6f4becc648f249d386843da0e1211460bde8b1ea99cbca
LINUX_KERNEL_HASH-5.15.15 = 1d3c57cf8071af174933df3e5d77da801e240a59da3c5e8406f7769de2c83a5a
LINUX_KERNEL_HASH-5.15.17 = 2787f5c0cc59984902fd97916dc604f39718c73817497c25f963141bfb70abde
LINUX_KERNEL_HASH-5.15.29 = 5905e684602c47ae95746d4003cb834335e5451aca4ac7c3013f15dd49ed876e
LINUX_KERNEL_HASH-5.15.36 = 36345db17a937c197c72ca9c7f34c262b3a12f927c237ff7770193014e29c690
LINUX_KERNEL_HASH-5.15.50 = 554d507d37a23810fe8c83912761e4a4f73c40794bc685ff7ca98042fe1bd70f
LINUX_KERNEL_HASH-5.15.63 = 6dd3cd1e5a629d0002bc6c6ec7e8ea96710104f38664122dd56c83dfd4eb7341
LINUX_KERNEL_HASH-5.15.77 = 142f841f33796a84c62fae2f2b96d2120bd8bbf9e0aac4ce157692cdb0afe9f9
LINUX_KERNEL_HASH-5.15.78 = 0db99f7347a38c27b8c155f3c9c8b260011aea0a4ded85ee95e6095b1e69a499
LINUX_KERNEL_HASH-6.1 = 2ca1f17051a430f6fed1196e4952717507171acfd97d96577212502703b25deb
LINUX_KERNEL_HASH-5.15.83 = 40590843c04c85789105157f69efbd71a4efe87ae2568e40d1b7258c3f747ff3
LINUX_KERNEL_HASH-6.1.3 = 6dc89ae7a7513e433c597c7346ed7ff4bfd115ea43a3b5e27a6bdb38c5580317
LINUX_KERNEL_HASH-5.4.225 = 59f596f6714317955cf481590babcf015aff2bc1900bd8e8dc8f7af73bc560aa
LINUX_KERNEL_HASH-5.15.86 = 80fcd9efa443502de9e2750f6dfb59e8de43a5d87a6d2be09dca748d79b5f2ee
LINUX_KERNEL_HASH-6.1.8 = b60bb53ab8ba370a270454b11e93d41af29126fc72bd6ede517673e2e57b816d
LINUX_KERNEL_HASH-6.1.10 = 0be2919ba91cf5873a4cb4d429de78aad0469120d624e333a43b4b011d74d19d
remove_uri_prefix=$(subst git://,,$(subst http://,,$(subst https://,,$(1))))
sanitize_uri=$(call qstrip,$(subst @,_,$(subst :,_,$(subst .,_,$(subst -,_,$(subst /,_,$(1)))))))
ifneq ($(call qstrip,$(CONFIG_KERNEL_GIT_CLONE_URI)),)
LINUX_VERSION:=$(call sanitize_uri,$(call remove_uri_prefix,$(CONFIG_KERNEL_GIT_CLONE_URI)))
ifeq ($(call qstrip,$(CONFIG_KERNEL_GIT_REF)),)
CONFIG_KERNEL_GIT_REF:=HEAD
endif
LINUX_VERSION:=$(LINUX_VERSION)-$(call sanitize_uri,$(CONFIG_KERNEL_GIT_REF))
else
ifdef KERNEL_PATCHVER
LINUX_VERSION:=$(KERNEL_PATCHVER)$(strip $(LINUX_VERSION-$(KERNEL_PATCHVER)))
endif
ifdef KERNEL_TESTING_PATCHVER
LINUX_TESTING_VERSION:=$(KERNEL_TESTING_PATCHVER)$(strip $(LINUX_VERSION-$(KERNEL_TESTING_PATCHVER)))
endif
endif
split_version=$(subst ., ,$(1))
merge_version=$(subst $(space),.,$(1))
KERNEL_BASE=$(firstword $(subst -, ,$(LINUX_VERSION)))
KERNEL=$(call merge_version,$(wordlist 1,2,$(call split_version,$(KERNEL_BASE))))
KERNEL_PATCHVER ?= $(KERNEL)
# disable the md5sum check for unknown kernel versions
LINUX_KERNEL_HASH:=$(LINUX_KERNEL_HASH-$(strip $(LINUX_VERSION)))
LINUX_KERNEL_HASH?=x

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# To build your package using meson:
#
# include $(INCLUDE_DIR)/meson.mk
# MESON_ARGS+=-Dfoo -Dbar=baz
#
# To pass additional environment variables to meson:
#
# MESON_VARS+=FOO=bar
#
# Default configure/compile/install targets are provided, but can be
# overwritten if required:
#
# define Build/Configure
# $(call Build/Configure/Meson)
# ...
# endef
#
# same for Build/Compile and Build/Install
#
# Host packages are built in the same fashion, just use these vars instead:
#
# MESON_HOST_ARGS+=-Dfoo -Dbar=baz
# MESON_HOST_VARS+=FOO=bar
MESON_DIR:=$(STAGING_DIR_HOST)/lib/meson
MESON_HOST_BUILD_DIR:=$(HOST_BUILD_DIR)/openwrt-build
MESON_HOST_VARS:=
MESON_HOST_ARGS:=
MESON_BUILD_DIR:=$(PKG_BUILD_DIR)/openwrt-build
MESON_VARS:=
MESON_ARGS:=
ifneq ($(findstring i386,$(CONFIG_ARCH)),)
MESON_ARCH:="x86"
else ifneq ($(findstring powerpc64,$(CONFIG_ARCH)),)
MESON_ARCH:="ppc64"
else ifneq ($(findstring powerpc,$(CONFIG_ARCH)),)
MESON_ARCH:="ppc"
else ifneq ($(findstring mips64el,$(CONFIG_ARCH)),)
MESON_ARCH:="mips64"
else ifneq ($(findstring mipsel,$(CONFIG_ARCH)),)
MESON_ARCH:="mips"
else ifneq ($(findstring armeb,$(CONFIG_ARCH)),)
MESON_ARCH:="arm"
else
MESON_ARCH:=$(CONFIG_ARCH)
endif
# this is undefined for just x64_64
ifeq ($(origin CPU_TYPE),undefined)
MESON_CPU:="generic"
else
MESON_CPU:="$(CPU_TYPE)$(if $(CPU_SUBTYPE),+$(CPU_SUBTYPE))"
endif
define Meson
$(2) $(STAGING_DIR_HOST)/bin/$(PYTHON) $(STAGING_DIR_HOST)/bin/meson.py $(1)
endef
define Meson/CreateNativeFile
$(STAGING_DIR_HOST)/bin/sed \
-e "s|@CC@|$(foreach BIN,$(HOSTCC),'$(BIN)',)|" \
-e "s|@CXX@|$(foreach BIN,$(HOSTCXX),'$(BIN)',)|" \
-e "s|@PKGCONFIG@|$(PKG_CONFIG)|" \
-e "s|@CMAKE@|$(STAGING_DIR_HOST)/bin/cmake|" \
-e "s|@PYTHON@|$(STAGING_DIR_HOST)/bin/python3|" \
-e "s|@CFLAGS@|$(foreach FLAG,$(HOST_CFLAGS) $(HOST_CPPFLAGS),'$(FLAG)',)|" \
-e "s|@CXXFLAGS@|$(foreach FLAG,$(HOST_CXXFLAGS) $(HOST_CPPFLAGS),'$(FLAG)',)|" \
-e "s|@LDFLAGS@|$(foreach FLAG,$(HOST_LDFLAGS),'$(FLAG)',)|" \
-e "s|@PREFIX@|$(HOST_BUILD_PREFIX)|" \
< $(MESON_DIR)/openwrt-native.txt.in \
> $(1)
endef
define Meson/CreateCrossFile
$(STAGING_DIR_HOST)/bin/sed \
-e "s|@CC@|$(foreach BIN,$(TARGET_CC),'$(BIN)',)|" \
-e "s|@CXX@|$(foreach BIN,$(TARGET_CXX),'$(BIN)',)|" \
-e "s|@AR@|$(TARGET_AR)|" \
-e "s|@STRIP@|$(TARGET_CROSS)strip|" \
-e "s|@NM@|$(TARGET_NM)|" \
-e "s|@PKGCONFIG@|$(PKG_CONFIG)|" \
-e "s|@CMAKE@|$(STAGING_DIR_HOST)/bin/cmake|" \
-e "s|@PYTHON@|$(STAGING_DIR_HOST)/bin/python3|" \
-e "s|@CFLAGS@|$(foreach FLAG,$(TARGET_CFLAGS) $(EXTRA_CFLAGS) $(TARGET_CPPFLAGS) $(EXTRA_CPPFLAGS),'$(FLAG)',)|" \
-e "s|@CXXFLAGS@|$(foreach FLAG,$(TARGET_CXXFLAGS) $(EXTRA_CXXFLAGS) $(TARGET_CPPFLAGS) $(EXTRA_CPPFLAGS),'$(FLAG)',)|" \
-e "s|@LDFLAGS@|$(foreach FLAG,$(TARGET_LDFLAGS) $(EXTRA_LDFLAGS),'$(FLAG)',)|" \
-e "s|@ARCH@|$(MESON_ARCH)|" \
-e "s|@CPU@|$(MESON_CPU)|" \
-e "s|@ENDIAN@|$(if $(CONFIG_BIG_ENDIAN),big,little)|" \
< $(MESON_DIR)/openwrt-cross.txt.in \
> $(1)
endef
define Host/Configure/Meson
$(call Meson/CreateNativeFile,$(HOST_BUILD_DIR)/openwrt-native.txt)
$(call Meson, \
--native-file $(HOST_BUILD_DIR)/openwrt-native.txt \
$(MESON_HOST_ARGS) \
$(MESON_HOST_BUILD_DIR) \
$(MESON_HOST_BUILD_DIR)/.., \
$(MESON_HOST_VARS))
endef
define Host/Compile/Meson
+$(NINJA) -C $(MESON_HOST_BUILD_DIR) $(1)
endef
define Host/Install/Meson
+$(NINJA) -C $(MESON_HOST_BUILD_DIR) install
endef
define Host/Uninstall/Meson
+$(NINJA) -C $(MESON_HOST_BUILD_DIR) uninstall || true
endef
define Build/Configure/Meson
$(call Meson/CreateNativeFile,$(PKG_BUILD_DIR)/openwrt-native.txt)
$(call Meson/CreateCrossFile,$(PKG_BUILD_DIR)/openwrt-cross.txt)
$(call Meson, \
--buildtype plain \
--native-file $(PKG_BUILD_DIR)/openwrt-native.txt \
--cross-file $(PKG_BUILD_DIR)/openwrt-cross.txt \
$(MESON_ARGS) \
$(MESON_BUILD_DIR) \
$(MESON_BUILD_DIR)/.., \
$(MESON_VARS))
endef
define Build/Compile/Meson
+$(NINJA) -C $(MESON_BUILD_DIR) $(1)
endef
define Build/Install/Meson
+DESTDIR="$(PKG_INSTALL_DIR)" $(NINJA) -C $(MESON_BUILD_DIR) install
endef
Host/Configure=$(call Host/Configure/Meson)
Host/Compile=$(call Host/Compile/Meson)
Host/Install=$(call Host/Install/Meson)
Host/Uninstall=$(call Host/Uninstall/Meson)
Build/Configure=$(call Build/Configure/Meson)
Build/Compile=$(call Build/Compile/Meson)
Build/Install=$(call Build/Install/Meson)

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@ -1,389 +0,0 @@
# SPDX-License-Identifier: GPL-2.0-only
#
# Copyright (C) 2006-2020 OpenWrt.org
ifneq ($(__inc_netfilter),1)
__inc_netfilter:=1
ifeq ($(NF_KMOD),1)
P_V4:=ipv4/netfilter/
P_V6:=ipv6/netfilter/
P_XT:=netfilter/
P_EBT:=bridge/netfilter/
endif
# 1: variable
# 2: kconfig symbols
# 3: file list
# 4: version dependency
define nf_add
$(if $(4),ifeq ($$(strip $$(call CompareKernelPatchVer,$$(KERNEL_PATCHVER),$(firstword $(4)),$(lastword $(4)))),1))
$(1)-$$($(2)) += $(3)
$(if $(4),endif)
KCONFIG_$(1) = $(filter-out $(2),$(KCONFIG_$(1))) $(2)
endef
# core
# kernel only
$(eval $(if $(NF_KMOD),$(call nf_add,NF_REJECT,CONFIG_NF_REJECT_IPV4, $(P_V4)nf_reject_ipv4),))
$(eval $(if $(NF_KMOD),$(call nf_add,NF_IPT,CONFIG_IP_NF_IPTABLES, $(P_V4)ip_tables),))
$(eval $(if $(NF_KMOD),$(call nf_add,NF_IPT,CONFIG_NETFILTER_XTABLES, $(P_XT)x_tables),))
$(eval $(if $(NF_KMOD),$(call nf_add,IPT_CORE,CONFIG_NETFILTER_XTABLES, $(P_XT)xt_tcpudp),))
$(eval $(if $(NF_KMOD),$(call nf_add,IPT_CORE,CONFIG_IP_NF_FILTER, $(P_V4)iptable_filter),))
$(eval $(if $(NF_KMOD),$(call nf_add,IPT_CORE,CONFIG_IP_NF_MANGLE, $(P_V4)iptable_mangle),))
# userland only
$(eval $(if $(NF_KMOD),,$(call nf_add,IPT_CORE,CONFIG_IP_NF_IPTABLES, xt_standard ipt_icmp xt_tcp xt_udp xt_comment xt_set xt_SET)))
$(eval $(call nf_add,IPT_CORE,CONFIG_NETFILTER_XT_MATCH_LIMIT, $(P_XT)xt_limit))
$(eval $(call nf_add,IPT_CORE,CONFIG_NETFILTER_XT_MATCH_MAC, $(P_XT)xt_mac))
$(eval $(call nf_add,IPT_CORE,CONFIG_NETFILTER_XT_MATCH_MULTIPORT, $(P_XT)xt_multiport))
$(eval $(call nf_add,IPT_CORE,CONFIG_NETFILTER_XT_MATCH_COMMENT, $(P_XT)xt_comment))
#cluster
$(eval $(call nf_add,IPT_CLUSTER,CONFIG_NETFILTER_XT_MATCH_CLUSTER, $(P_XT)xt_cluster))
$(eval $(call nf_add,IPT_CORE,CONFIG_NETFILTER_XT_TARGET_LOG, $(P_XT)xt_LOG))
$(eval $(call nf_add,IPT_CORE,CONFIG_NETFILTER_XT_TARGET_LOG, $(P_XT)nf_log_common, lt 5.13))
$(eval $(call nf_add,IPT_CORE,CONFIG_NETFILTER_XT_TARGET_LOG, $(P_V4)nf_log_ipv4, lt 5.13))
$(eval $(call nf_add,IPT_CORE,CONFIG_NETFILTER_XT_TARGET_LOG, $(P_XT)nf_log_syslog, ge 5.13))
$(eval $(call nf_add,IPT_CORE,CONFIG_NETFILTER_XT_TARGET_TCPMSS, $(P_XT)xt_TCPMSS))
$(eval $(call nf_add,IPT_CORE,CONFIG_IP_NF_TARGET_REJECT, $(P_V4)ipt_REJECT))
$(eval $(call nf_add,IPT_CORE,CONFIG_NETFILTER_XT_MATCH_TIME, $(P_XT)xt_time))
$(eval $(call nf_add,IPT_CORE,CONFIG_NETFILTER_XT_MARK, $(P_XT)xt_mark))
# kernel has xt_MARK.ko merged into xt_mark.ko, userspace is still separate
# userland: xt_MARK.so
$(eval $(if $(NF_KMOD),,$(call nf_add,IPT_CORE,CONFIG_NETFILTER_XT_MARK, $(P_XT)xt_MARK)))
# conntrack
# kernel only
$(eval $(if $(NF_KMOD),$(call nf_add,NF_CONNTRACK,CONFIG_NF_CONNTRACK, $(P_XT)nf_conntrack),))
$(eval $(if $(NF_KMOD),$(call nf_add,NF_CONNTRACK,CONFIG_NF_DEFRAG_IPV4, $(P_V4)nf_defrag_ipv4),))
$(eval $(call nf_add,IPT_CONNTRACK,CONFIG_NETFILTER_XT_MATCH_STATE, $(P_XT)xt_state))
$(eval $(call nf_add,IPT_CONNTRACK,CONFIG_NETFILTER_XT_TARGET_CT, $(P_XT)xt_CT))
$(eval $(call nf_add,IPT_CONNTRACK,CONFIG_NETFILTER_XT_MATCH_CONNTRACK, $(P_XT)xt_conntrack))
# conntrack-extra
$(eval $(call nf_add,IPT_CONNTRACK_EXTRA,CONFIG_NETFILTER_XT_MATCH_CONNBYTES, $(P_XT)xt_connbytes))
$(eval $(call nf_add,IPT_CONNTRACK_EXTRA,CONFIG_NETFILTER_XT_MATCH_CONNLIMIT, $(P_XT)xt_connlimit))
$(eval $(call nf_add,IPT_CONNTRACK_EXTRA,CONFIG_NETFILTER_CONNCOUNT, $(P_XT)nf_conncount))
$(eval $(call nf_add,IPT_CONNTRACK_EXTRA,CONFIG_NETFILTER_XT_CONNMARK, $(P_XT)xt_connmark))
$(eval $(call nf_add,IPT_CONNTRACK_EXTRA,CONFIG_NETFILTER_XT_MATCH_HELPER, $(P_XT)xt_helper))
$(eval $(call nf_add,IPT_CONNTRACK_EXTRA,CONFIG_NETFILTER_XT_MATCH_RECENT, $(P_XT)xt_recent))
$(eval $(if $(NF_KMOD),,$(call nf_add,IPT_CONNTRACK_EXTRA,CONFIG_NETFILTER_XT_CONNMARK, $(P_XT)xt_CONNMARK)))
#conntrack-label
$(eval $(call nf_add,IPT_CONNTRACK_LABEL,CONFIG_NETFILTER_XT_MATCH_CONNLABEL, $(P_XT)xt_connlabel))
# extra
$(eval $(call nf_add,IPT_EXTRA,CONFIG_NETFILTER_XT_MATCH_ADDRTYPE, $(if $(NF_KMOD),$(P_XT)xt_addrtype,$(P_XT)ipt_addrtype)))
$(eval $(call nf_add,IPT_EXTRA,CONFIG_NETFILTER_XT_MATCH_OWNER, $(P_XT)xt_owner))
$(eval $(call nf_add,IPT_EXTRA,CONFIG_NETFILTER_XT_MATCH_PKTTYPE, $(P_XT)xt_pkttype))
$(eval $(call nf_add,IPT_EXTRA,CONFIG_NETFILTER_XT_MATCH_QUOTA, $(P_XT)xt_quota))
$(eval $(call nf_add,IPT_EXTRA,CONFIG_NETFILTER_XT_MATCH_CGROUP, $(P_XT)xt_cgroup))
#$(eval $(call nf_add,IPT_EXTRA,CONFIG_IP_NF_TARGET_ROUTE, $(P_V4)ipt_ROUTE))
# physdev
$(eval $(call nf_add,IPT_PHYSDEV,CONFIG_NETFILTER_XT_MATCH_PHYSDEV, $(P_XT)xt_physdev))
# filter
$(eval $(call nf_add,IPT_FILTER,CONFIG_NETFILTER_XT_MATCH_STRING, $(P_XT)xt_string))
$(eval $(call nf_add,IPT_FILTER,CONFIG_NETFILTER_XT_MATCH_BPF, $(P_XT)xt_bpf))
# ipopt
$(eval $(call nf_add,IPT_IPOPT,CONFIG_NETFILTER_XT_MATCH_DSCP, $(P_XT)xt_dscp))
$(eval $(call nf_add,IPT_IPOPT,CONFIG_NETFILTER_XT_TARGET_DSCP, $(P_XT)xt_DSCP))
$(eval $(call nf_add,IPT_HASHLIMIT,CONFIG_NETFILTER_XT_MATCH_HASHLIMIT, $(P_XT)xt_hashlimit))
$(eval $(call nf_add,IPT_RPFILTER,CONFIG_IP_NF_MATCH_RPFILTER, $(P_V4)ipt_rpfilter))
$(eval $(call nf_add,IPT_RPFILTER,CONFIG_IP6_NF_MATCH_RPFILTER, $(P_V6)ip6t_rpfilter))
$(eval $(call nf_add,IPT_IPOPT,CONFIG_NETFILTER_XT_MATCH_LENGTH, $(P_XT)xt_length))
$(eval $(call nf_add,IPT_IPOPT,CONFIG_NETFILTER_XT_MATCH_STATISTIC, $(P_XT)xt_statistic))
$(eval $(call nf_add,IPT_IPOPT,CONFIG_NETFILTER_XT_MATCH_TCPMSS, $(P_XT)xt_tcpmss))
$(eval $(call nf_add,IPT_IPOPT,CONFIG_NETFILTER_XT_TARGET_CLASSIFY, $(P_XT)xt_CLASSIFY))
$(eval $(call nf_add,IPT_IPOPT,CONFIG_IP_NF_TARGET_ECN, $(P_V4)ipt_ECN))
$(eval $(call nf_add,IPT_IPOPT,CONFIG_NETFILTER_XT_MATCH_ECN, $(P_XT)xt_ecn))
# userland only
$(eval $(if $(NF_KMOD),,$(call nf_add,IPT_IPOPT,CONFIG_NETFILTER_XT_MATCH_DSCP, xt_tos)))
$(eval $(if $(NF_KMOD),,$(call nf_add,IPT_IPOPT,CONFIG_NETFILTER_XT_TARGET_DSCP, xt_TOS)))
$(eval $(if $(NF_KMOD),,$(call nf_add,IPT_IPOPT,CONFIG_NETFILTER_XT_MATCH_HL, ipt_ttl)))
$(eval $(if $(NF_KMOD),,$(call nf_add,IPT_IPOPT,CONFIG_NETFILTER_XT_TARGET_HL, ipt_TTL)))
$(eval $(call nf_add,IPT_IPOPT,CONFIG_NETFILTER_XT_MATCH_HL, $(P_XT)xt_hl))
$(eval $(call nf_add,IPT_IPOPT,CONFIG_NETFILTER_XT_TARGET_HL, $(P_XT)xt_HL))
# iprange
$(eval $(call nf_add,IPT_IPRANGE,CONFIG_NETFILTER_XT_MATCH_IPRANGE, $(P_XT)xt_iprange))
#clusterip
$(eval $(call nf_add,IPT_CLUSTERIP,CONFIG_IP_NF_TARGET_CLUSTERIP, $(P_V4)ipt_CLUSTERIP))
# ipsec
$(eval $(call nf_add,IPT_IPSEC,CONFIG_IP_NF_MATCH_AH, $(P_V4)ipt_ah))
$(eval $(call nf_add,IPT_IPSEC,CONFIG_NETFILTER_XT_MATCH_ESP, $(P_XT)xt_esp))
$(eval $(call nf_add,IPT_IPSEC,CONFIG_NETFILTER_XT_MATCH_POLICY, $(P_XT)xt_policy))
# flow offload support
$(eval $(call nf_add,IPT_FLOW,CONFIG_NETFILTER_XT_TARGET_FLOWOFFLOAD, $(P_XT)xt_FLOWOFFLOAD))
# IPv6
# kernel only
$(eval $(if $(NF_KMOD),$(call nf_add,NF_REJECT6,CONFIG_NF_REJECT_IPV6, $(P_V6)nf_reject_ipv6),))
$(eval $(if $(NF_KMOD),$(call nf_add,NF_IPT6,CONFIG_IP6_NF_IPTABLES, $(P_V6)ip6_tables),))
$(eval $(if $(NF_KMOD),$(call nf_add,NF_CONNTRACK,CONFIG_NF_DEFRAG_IPV6, $(P_V6)nf_defrag_ipv6),))
$(eval $(if $(NF_KMOD),$(call nf_add,IPT_IPV6,CONFIG_IP6_NF_FILTER, $(P_V6)ip6table_filter),))
$(eval $(if $(NF_KMOD),$(call nf_add,IPT_IPV6,CONFIG_IP6_NF_MANGLE, $(P_V6)ip6table_mangle),))
$(eval $(if $(NF_KMOD),$(call nf_add,IPT_IPV6,CONFIG_NF_LOG_IPV6, $(P_V6)nf_log_ipv6,lt 5.13),))
$(eval $(if $(NF_KMOD),,$(call nf_add,IPT_IPV6,CONFIG_IP6_NF_IPTABLES, ip6t_icmp6)))
$(eval $(call nf_add,IPT_IPV6,CONFIG_IP6_NF_TARGET_REJECT, $(P_V6)ip6t_REJECT))
# ipv6 extra
$(eval $(call nf_add,IPT_IPV6_EXTRA,CONFIG_IP6_NF_MATCH_IPV6HEADER, $(P_V6)ip6t_ipv6header))
$(eval $(call nf_add,IPT_IPV6_EXTRA,CONFIG_IP6_NF_MATCH_AH, $(P_V6)ip6t_ah))
$(eval $(call nf_add,IPT_IPV6_EXTRA,CONFIG_IP6_NF_MATCH_MH, $(P_V6)ip6t_mh))
$(eval $(call nf_add,IPT_IPV6_EXTRA,CONFIG_IP6_NF_MATCH_EUI64, $(P_V6)ip6t_eui64))
$(eval $(call nf_add,IPT_IPV6_EXTRA,CONFIG_IP6_NF_MATCH_OPTS, $(P_V6)ip6t_hbh))
$(eval $(call nf_add,IPT_IPV6_EXTRA,CONFIG_IP6_NF_MATCH_FRAG, $(P_V6)ip6t_frag))
$(eval $(call nf_add,IPT_IPV6_EXTRA,CONFIG_IP6_NF_MATCH_RT, $(P_V6)ip6t_rt))
# nat
# kernel only
$(eval $(if $(NF_KMOD),$(call nf_add,NF_NAT,CONFIG_NF_NAT, $(P_XT)nf_nat),))
$(eval $(if $(NF_KMOD),$(call nf_add,IPT_NAT,CONFIG_NETFILTER_XT_NAT, $(P_XT)xt_nat),))
$(eval $(if $(NF_KMOD),$(call nf_add,IPT_NAT,CONFIG_IP_NF_NAT, $(P_V4)iptable_nat),))
$(eval $(if $(NF_KMOD),$(call nf_add,IPT_NAT6,CONFIG_IP6_NF_NAT, $(P_V6)ip6table_nat),))
$(eval $(if $(NF_KMOD),$(call nf_add,IPT_NAT6,CONFIG_IP6_NF_TARGET_NPT, $(P_V6)ip6t_NPT),))
# userland only
$(eval $(if $(NF_KMOD),,$(call nf_add,IPT_NAT,CONFIG_NF_NAT, ipt_SNAT ipt_DNAT)))
$(eval $(if $(NF_KMOD),,$(call nf_add,IPT_NAT6,CONFIG_IP6_NF_TARGET_NPT, ip6t_DNPT ip6t_SNPT)))
$(eval $(call nf_add,IPT_NAT,CONFIG_NETFILTER_XT_TARGET_MASQUERADE, $(P_XT)xt_MASQUERADE))
$(eval $(call nf_add,IPT_NAT,CONFIG_NETFILTER_XT_TARGET_REDIRECT, $(P_XT)xt_REDIRECT))
# nat-extra
$(eval $(call nf_add,IPT_NAT_EXTRA,CONFIG_IP_NF_TARGET_NETMAP, $(P_XT)xt_NETMAP))
# nathelper
$(eval $(call nf_add,NF_NATHELPER,CONFIG_NF_CONNTRACK_FTP, $(P_XT)nf_conntrack_ftp))
$(eval $(call nf_add,NF_NATHELPER,CONFIG_NF_NAT_FTP, $(P_XT)nf_nat_ftp))
# nathelper-extra
$(eval $(call nf_add,NF_NATHELPER_EXTRA,CONFIG_NF_CONNTRACK_BROADCAST, $(P_XT)nf_conntrack_broadcast))
$(eval $(call nf_add,NF_NATHELPER_EXTRA,CONFIG_NF_CONNTRACK_AMANDA, $(P_XT)nf_conntrack_amanda))
$(eval $(call nf_add,NF_NATHELPER_EXTRA,CONFIG_NF_NAT_AMANDA, $(P_XT)nf_nat_amanda))
$(eval $(call nf_add,NF_NATHELPER_EXTRA,CONFIG_NF_CONNTRACK_H323, $(P_XT)nf_conntrack_h323))
$(eval $(call nf_add,NF_NATHELPER_EXTRA,CONFIG_NF_NAT_H323, $(P_V4)nf_nat_h323))
$(eval $(call nf_add,NF_NATHELPER_EXTRA,CONFIG_NF_CONNTRACK_PPTP, $(P_XT)nf_conntrack_pptp))
$(eval $(call nf_add,NF_NATHELPER_EXTRA,CONFIG_NF_NAT_PPTP, $(P_V4)nf_nat_pptp))
$(eval $(call nf_add,NF_NATHELPER_EXTRA,CONFIG_NF_CONNTRACK_SIP, $(P_XT)nf_conntrack_sip))
$(eval $(call nf_add,NF_NATHELPER_EXTRA,CONFIG_NF_NAT_SIP, $(P_XT)nf_nat_sip))
$(eval $(call nf_add,NF_NATHELPER_EXTRA,CONFIG_NF_CONNTRACK_SNMP, $(P_XT)nf_conntrack_snmp))
$(eval $(call nf_add,NF_NATHELPER_EXTRA,CONFIG_NF_NAT_SNMP_BASIC, $(P_V4)nf_nat_snmp_basic))
$(eval $(call nf_add,NF_NATHELPER_EXTRA,CONFIG_NF_CONNTRACK_TFTP, $(P_XT)nf_conntrack_tftp))
$(eval $(call nf_add,NF_NATHELPER_EXTRA,CONFIG_NF_NAT_TFTP, $(P_XT)nf_nat_tftp))
$(eval $(call nf_add,NF_NATHELPER_EXTRA,CONFIG_NF_CONNTRACK_IRC, $(P_XT)nf_conntrack_irc))
$(eval $(call nf_add,NF_NATHELPER_EXTRA,CONFIG_NF_NAT_IRC, $(P_XT)nf_nat_irc))
# ulog
$(eval $(call nf_add,IPT_ULOG,CONFIG_IP_NF_TARGET_ULOG, $(P_V4)ipt_ULOG))
# nflog
$(eval $(call nf_add,IPT_NFLOG,CONFIG_NETFILTER_XT_TARGET_NFLOG, $(P_XT)xt_NFLOG))
# nfqueue
$(eval $(call nf_add,IPT_NFQUEUE,CONFIG_NETFILTER_XT_TARGET_NFQUEUE, $(P_XT)xt_NFQUEUE))
# debugging
$(eval $(call nf_add,IPT_DEBUG,CONFIG_NETFILTER_XT_TARGET_TRACE, $(P_XT)xt_TRACE))
# tproxy
$(eval $(call nf_add,IPT_TPROXY,CONFIG_NETFILTER_XT_MATCH_SOCKET, $(P_XT)xt_socket))
$(eval $(call nf_add,IPT_TPROXY,CONFIG_NF_SOCKET_IPV4, $(P_V4)nf_socket_ipv4))
$(eval $(call nf_add,IPT_TPROXY,CONFIG_NF_SOCKET_IPV6, $(P_V6)nf_socket_ipv6))
$(eval $(call nf_add,IPT_TPROXY,CONFIG_NETFILTER_XT_TARGET_TPROXY, $(P_XT)xt_TPROXY))
$(eval $(call nf_add,IPT_TPROXY,CONFIG_NF_TPROXY_IPV4, $(P_V4)nf_tproxy_ipv4))
$(eval $(call nf_add,IPT_TPROXY,CONFIG_NF_TPROXY_IPV6, $(P_V6)nf_tproxy_ipv6))
# led
$(eval $(call nf_add,IPT_LED,CONFIG_NETFILTER_XT_TARGET_LED, $(P_XT)xt_LED))
# tee
$(eval $(call nf_add,IPT_TEE,CONFIG_NETFILTER_XT_TARGET_TEE, $(P_XT)xt_TEE))
$(eval $(if $(NF_KMOD),$(call nf_add,IPT_TEE,CONFIG_NF_DUP_IPV4, $(P_V4)nf_dup_ipv4),))
$(eval $(if $(NF_KMOD),$(call nf_add,IPT_TEE,CONFIG_NF_DUP_IPV6, $(P_V6)nf_dup_ipv6),))
# u32
$(eval $(call nf_add,IPT_U32,CONFIG_NETFILTER_XT_MATCH_U32, $(P_XT)xt_u32))
# checksum
$(eval $(call nf_add,IPT_CHECKSUM,CONFIG_NETFILTER_XT_TARGET_CHECKSUM, $(P_XT)xt_CHECKSUM))
# netlink
$(eval $(call nf_add,NFNETLINK,CONFIG_NETFILTER_NETLINK, $(P_XT)nfnetlink))
# nflog
$(eval $(call nf_add,NFNETLINK_LOG,CONFIG_NETFILTER_NETLINK_LOG, $(P_XT)nfnetlink_log))
# nfqueue
$(eval $(call nf_add,NFNETLINK_QUEUE,CONFIG_NETFILTER_NETLINK_QUEUE, $(P_XT)nfnetlink_queue))
#
# ebtables
#
$(eval $(if $(NF_KMOD),$(call nf_add,EBTABLES,CONFIG_BRIDGE_NF_EBTABLES, $(P_EBT)ebtables),))
# ebtables: tables
$(eval $(call nf_add,EBTABLES,CONFIG_BRIDGE_EBT_BROUTE, $(P_EBT)ebtable_broute))
$(eval $(call nf_add,EBTABLES,CONFIG_BRIDGE_EBT_T_FILTER, $(P_EBT)ebtable_filter))
$(eval $(call nf_add,EBTABLES,CONFIG_BRIDGE_EBT_T_NAT, $(P_EBT)ebtable_nat))
# ebtables: matches
$(eval $(call nf_add,EBTABLES,CONFIG_BRIDGE_EBT_802_3, $(P_EBT)ebt_802_3))
$(eval $(call nf_add,EBTABLES,CONFIG_BRIDGE_EBT_AMONG, $(P_EBT)ebt_among))
$(eval $(call nf_add,EBTABLES_IP4,CONFIG_BRIDGE_EBT_ARP, $(P_EBT)ebt_arp))
$(eval $(call nf_add,EBTABLES_IP4,CONFIG_BRIDGE_EBT_IP, $(P_EBT)ebt_ip))
$(eval $(call nf_add,EBTABLES_IP6,CONFIG_BRIDGE_EBT_IP6, $(P_EBT)ebt_ip6))
$(eval $(call nf_add,EBTABLES,CONFIG_BRIDGE_EBT_LIMIT, $(P_EBT)ebt_limit))
$(eval $(call nf_add,EBTABLES,CONFIG_BRIDGE_EBT_MARK, $(P_EBT)ebt_mark_m))
$(eval $(call nf_add,EBTABLES,CONFIG_BRIDGE_EBT_PKTTYPE, $(P_EBT)ebt_pkttype))
$(eval $(call nf_add,EBTABLES,CONFIG_BRIDGE_EBT_STP, $(P_EBT)ebt_stp))
$(eval $(call nf_add,EBTABLES,CONFIG_BRIDGE_EBT_VLAN, $(P_EBT)ebt_vlan))
# targets
$(eval $(call nf_add,EBTABLES_IP4,CONFIG_BRIDGE_EBT_ARPREPLY, $(P_EBT)ebt_arpreply))
$(eval $(call nf_add,EBTABLES,CONFIG_BRIDGE_EBT_MARK_T, $(P_EBT)ebt_mark))
$(eval $(call nf_add,EBTABLES_IP4,CONFIG_BRIDGE_EBT_DNAT, $(P_EBT)ebt_dnat))
$(eval $(call nf_add,EBTABLES,CONFIG_BRIDGE_EBT_REDIRECT, $(P_EBT)ebt_redirect))
$(eval $(call nf_add,EBTABLES_IP4,CONFIG_BRIDGE_EBT_SNAT, $(P_EBT)ebt_snat))
# watchers
$(eval $(call nf_add,EBTABLES_WATCHERS,CONFIG_BRIDGE_EBT_LOG, $(P_EBT)ebt_log))
$(eval $(call nf_add,EBTABLES_WATCHERS,CONFIG_BRIDGE_EBT_ULOG, $(P_EBT)ebt_ulog))
$(eval $(call nf_add,EBTABLES_WATCHERS,CONFIG_BRIDGE_EBT_NFLOG, $(P_EBT)ebt_nflog))
$(eval $(call nf_add,EBTABLES_WATCHERS,CONFIG_BRIDGE_EBT_NFQUEUE, $(P_EBT)ebt_nfqueue))
# nftables
$(eval $(if $(NF_KMOD),$(call nf_add,NFT_CORE,CONFIG_NF_TABLES, $(P_XT)nf_tables),))
$(eval $(if $(NF_KMOD),$(call nf_add,NFT_CORE,CONFIG_NF_TABLES_SET, $(P_XT)nf_tables_set),))
$(eval $(if $(NF_KMOD),$(call nf_add,NFT_CORE,CONFIG_NFT_COUNTER, $(P_XT)nft_counter),))
$(eval $(if $(NF_KMOD),$(call nf_add,NFT_CORE,CONFIG_NFT_CT, $(P_XT)nft_ct),))
$(eval $(if $(NF_KMOD),$(call nf_add,NFT_CORE,CONFIG_NFT_HASH, $(P_XT)nft_hash),))
$(eval $(if $(NF_KMOD),$(call nf_add,NFT_CORE,CONFIG_NFT_LIMIT, $(P_XT)nft_limit),))
$(eval $(if $(NF_KMOD),$(call nf_add,NFT_CORE,CONFIG_NFT_LOG, $(P_XT)nft_log),))
$(eval $(if $(NF_KMOD),$(call nf_add,NFT_CORE,CONFIG_NFT_META, $(P_XT)nft_meta),))
$(eval $(if $(NF_KMOD),$(call nf_add,NFT_CORE,CONFIG_NFT_NUMGEN, $(P_XT)nft_numgen),))
$(eval $(if $(NF_KMOD),$(call nf_add,NFT_CORE,CONFIG_NFT_OBJREF, $(P_XT)nft_objref),))
$(eval $(if $(NF_KMOD),$(call nf_add,NFT_CORE,CONFIG_NFT_QUOTA, $(P_XT)nft_quota),))
$(eval $(if $(NF_KMOD),$(call nf_add,NFT_CORE,CONFIG_NFT_REDIR, $(P_XT)nft_redir),))
$(eval $(if $(NF_KMOD),$(call nf_add,NFT_CORE,CONFIG_NFT_REJECT, $(P_XT)nft_reject $(P_V4)nft_reject_ipv4 $(P_V6)nft_reject_ipv6),))
$(eval $(if $(NF_KMOD),$(call nf_add,NFT_CORE,CONFIG_NFT_REJECT_INET, $(P_XT)nft_reject_inet),))
$(eval $(if $(NF_KMOD),$(call nf_add,NFT_BRIDGE,CONFIG_NFT_BRIDGE_META, $(P_EBT)nft_meta_bridge),))
$(eval $(if $(NF_KMOD),$(call nf_add,NFT_BRIDGE,CONFIG_NFT_BRIDGE_REJECT, $(P_EBT)nft_reject_bridge),))
$(eval $(if $(NF_KMOD),$(call nf_add,NFT_NAT,CONFIG_NFT_NAT, $(P_XT)nft_nat),))
$(eval $(if $(NF_KMOD),$(call nf_add,NFT_NAT,CONFIG_NFT_NAT, $(P_XT)nft_chain_nat),))
$(eval $(if $(NF_KMOD),$(call nf_add,NFT_NAT,CONFIG_NFT_REDIR_IPV4, $(P_V4)nft_redir_ipv4),))
$(eval $(if $(NF_KMOD),$(call nf_add,NFT_NAT,CONFIG_NFT_MASQ, $(P_XT)nft_masq),))
$(eval $(if $(NF_KMOD),$(call nf_add,NFT_NAT,CONFIG_NFT_MASQ_IPV4, $(P_V4)nft_masq_ipv4),))
$(eval $(if $(NF_KMOD),$(call nf_add,NFT_NAT6,CONFIG_NFT_REDIR_IPV6, $(P_V6)nft_redir_ipv6),))
$(eval $(if $(NF_KMOD),$(call nf_add,NFT_NAT6,CONFIG_NFT_MASQ_IPV6, $(P_V6)nft_masq_ipv6),))
$(eval $(if $(NF_KMOD),$(call nf_add,NFT_FIB,CONFIG_NFT_FIB, $(P_XT)nft_fib),))
$(eval $(if $(NF_KMOD),$(call nf_add,NFT_FIB,CONFIG_NFT_FIB_INET, $(P_XT)nft_fib_inet),))
$(eval $(if $(NF_KMOD),$(call nf_add,NFT_FIB,CONFIG_NFT_FIB_IPV4, $(P_V4)nft_fib_ipv4),))
$(eval $(if $(NF_KMOD),$(call nf_add,NFT_FIB,CONFIG_NFT_FIB_IPV6, $(P_V6)nft_fib_ipv6),))
$(eval $(if $(NF_KMOD),$(call nf_add,NFT_QUEUE,CONFIG_NFT_QUEUE, $(P_XT)nft_queue),))
$(eval $(if $(NF_KMOD),$(call nf_add,NFT_COMPAT,CONFIG_NFT_COMPAT, $(P_XT)nft_compat),))
# userland only
IPT_BUILTIN += $(NF_IPT-y) $(NF_IPT-m)
IPT_BUILTIN += $(IPT_CORE-y) $(IPT_CORE-m)
IPT_BUILTIN += $(NF_CONNTRACK-y)
IPT_BUILTIN += $(NF_CONNTRACK6-y)
IPT_BUILTIN += $(IPT_CONNTRACK-y)
IPT_BUILTIN += $(IPT_CONNTRACK_EXTRA-y)
IPT_BUILTIN += $(IPT_EXTRA-y)
IPT_BUILTIN += $(IPT_PHYSDEV-y)
IPT_BUILTIN += $(IPT_FILTER-y)
IPT_BUILTIN += $(IPT_FLOW-y) $(IPT_FLOW-m)
IPT_BUILTIN += $(IPT_IPOPT-y)
IPT_BUILTIN += $(IPT_IPRANGE-y)
IPT_BUILTIN += $(IPT_CLUSTER-y)
IPT_BUILTIN += $(IPT_CLUSTERIP-y)
IPT_BUILTIN += $(IPT_IPSEC-y)
IPT_BUILTIN += $(IPT_IPV6-y) $(IPT_IPV6-m)
IPT_BUILTIN += $(NF_NAT-y)
IPT_BUILTIN += $(NF_NAT6-y)
IPT_BUILTIN += $(IPT_NAT-y)
IPT_BUILTIN += $(IPT_NAT6-y)
IPT_BUILTIN += $(IPT_NAT_EXTRA-y)
IPT_BUILTIN += $(NF_NATHELPER-y)
IPT_BUILTIN += $(NF_NATHELPER_EXTRA-y)
IPT_BUILTIN += $(IPT_ULOG-y)
IPT_BUILTIN += $(IPT_TPROXY-y)
IPT_BUILTIN += $(NFNETLINK-y)
IPT_BUILTIN += $(NFNETLINK_LOG-y)
IPT_BUILTIN += $(NFNETLINK_QUEUE-y)
IPT_BUILTIN += $(EBTABLES-y)
IPT_BUILTIN += $(EBTABLES_IP4-y)
IPT_BUILTIN += $(EBTABLES_IP6-y)
IPT_BUILTIN += $(EBTABLES_WATCHERS-y)
endif # __inc_netfilter

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@ -1,81 +0,0 @@
# SPDX-License-Identifier: GPL-2.0-only
#
# Copyright (C) 2022 ImmortalWrt.org
include $(TOPDIR)/rules.mk
PKG_NAME:=arm-trusted-firmware-rockchip-vendor
PKG_RELEASE:=$(AUTORELEASE)
PKG_SOURCE_PROTO:=git
PKG_SOURCE_URL=https://github.com/rockchip-linux/rkbin.git
PKG_SOURCE_DATE:=2022-08-01
PKG_SOURCE_VERSION:=b0c100f1a260d807df450019774993c761beb79d
PKG_MIRROR_HASH:=17723ac8f6ec446c759444ee29ba4fe544cebb3785e26d8e10c91c54b9df3f1a
PKG_MAINTAINER:=Tianling Shen <cnsztl@immortalwrt.org>
MAKE_PATH:=$(PKG_NAME)
include $(INCLUDE_DIR)/package.mk
define Package/arm-trusted-firmware-rockchip-vendor
SECTION:=boot
CATEGORY:=Boot Loaders
TITLE:=ARM Trusted Firmware for Rockchip
endef
define Package/arm-trusted-firmware-rk3328
$(Package/arm-trusted-firmware-rockchip-vendor)
DEPENDS:=@TARGET_rockchip_armv8
VARIANT:=rk3328
endef
define Package/arm-trusted-firmware-rk3399
$(Package/arm-trusted-firmware-rockchip-vendor)
DEPENDS:=@TARGET_rockchip_armv8
VARIANT:=rk3399
endef
define Package/arm-trusted-firmware-rk3566
$(Package/arm-trusted-firmware-rockchip-vendor)
DEPENDS:=@TARGET_rockchip_armv8
VARIANT:=rk3566
endef
define Package/arm-trusted-firmware-rk3568
$(Package/arm-trusted-firmware-rockchip-vendor)
DEPENDS:=@TARGET_rockchip_armv8
VARIANT:=rk3568
endef
define Build/Configure
$(SED) 's,$$$$(PKG_BUILD_DIR),$(PKG_BUILD_DIR),g' $(PKG_BUILD_DIR)/trust.ini
$(SED) 's,$$$$(VARIANT),$(BUILD_VARIANT),g' $(PKG_BUILD_DIR)/trust.ini
$(call Build/Configure/Default)
endef
define Build/Compile
$(CURDIR)/pack-firmware.sh build $(BUILD_VARIANT) '$(PKG_BUILD_DIR)'
endef
define Build/InstallDev
$(CURDIR)/pack-firmware.sh install $(BUILD_VARIANT) '$(PKG_BUILD_DIR)' '$(STAGING_DIR_IMAGE)'
endef
define Package/arm-trusted-firmware-rk3328/install
endef
define Package/arm-trusted-firmware-rk3399/install
endef
define Package/arm-trusted-firmware-rk3566/install
endef
define Package/arm-trusted-firmware-rk3568/install
endef
$(eval $(call BuildPackage,arm-trusted-firmware-rk3328))
$(eval $(call BuildPackage,arm-trusted-firmware-rk3399))
$(eval $(call BuildPackage,arm-trusted-firmware-rk3566))
$(eval $(call BuildPackage,arm-trusted-firmware-rk3568))

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@ -1,60 +0,0 @@
#!/bin/bash
# Copyright (C) 2021 ImmortalWrt.org
ACTION="$1"
VARIANT="$2"
PKG_BUILD_DIR="$3"
STAGING_DIR_IMAGE="$4"
case "$VARIANT" in
"rk3328")
ATF="rk33/rk322xh_bl31_v1.49.elf"
DDR="rk33/rk3328_ddr_333MHz_v1.19.bin"
LOADER="rk33/rk322xh_miniloader_v2.50.bin"
;;
"rk3399")
ATF="rk33/rk3399_bl31_v1.35.elf"
DDR="rk33/rk3399_ddr_800MHz_v1.27.bin"
LOADER="rk33/rk3399_miniloader_v1.26.bin"
;;
"rk3566")
ATF="rk35/rk3568_bl31_v1.34.elf"
DDR="rk35/rk3566_ddr_1056MHz_v1.13.bin"
;;
"rk3568")
ATF="rk35/rk3568_bl31_v1.34.elf"
DDR="rk35/rk3568_ddr_1560MHz_v1.13.bin"
;;
*)
echo -e "Not compatible with your platform: $VARIANT."
exit 1
;;
esac
set -x
if [ "$ACTION" == "build" ]; then
case "$VARIANT" in
rk33*)
"$PKG_BUILD_DIR"/tools/mkimage -n "$VARIANT" -T "rksd" -d "$PKG_BUILD_DIR/bin/$DDR" "$PKG_BUILD_DIR/$VARIANT-idbloader.bin"
cat "$PKG_BUILD_DIR/bin/$LOADER" >> "$PKG_BUILD_DIR/$VARIANT-idbloader.bin"
"$PKG_BUILD_DIR/tools/trust_merger" --replace "bl31.elf" "$PKG_BUILD_DIR/bin/$ATF" "$PKG_BUILD_DIR/trust.ini"
;;
esac
elif [ "$ACTION" == "install" ]; then
mkdir -p "$STAGING_DIR_IMAGE"
cp -fp "$PKG_BUILD_DIR/bin/$ATF" "$STAGING_DIR_IMAGE"/
case "$VARIANT" in
rk33*)
cp -fp "$PKG_BUILD_DIR/tools/loaderimage" "$STAGING_DIR_IMAGE"/
cp -fp "$PKG_BUILD_DIR/$VARIANT-idbloader.bin" "$STAGING_DIR_IMAGE"/
cp -fp "$PKG_BUILD_DIR/$VARIANT-trust.bin" "$STAGING_DIR_IMAGE"/
;;
rk35*)
cp -fp "$PKG_BUILD_DIR/bin/$DDR" "$STAGING_DIR_IMAGE"/
;;
esac
else
echo -e "Unknown operation: $ACTION."
exit 1
fi
set +x

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@ -1,15 +0,0 @@
[VERSION]
MAJOR=1
MINOR=0
[BL30_OPTION]
SEC=0
[BL31_OPTION]
SEC=1
PATH=bl31.elf
ADDR=0x10000
[BL32_OPTION]
SEC=0
[BL33_OPTION]
SEC=0
[OUTPUT]
PATH=$(PKG_BUILD_DIR)/$(VARIANT)-trust.bin

View file

@ -1,49 +0,0 @@
#
# Copyright (C) 2020 Tobias Maedel <openwrt@tbspace.de>
#
# This is free software, licensed under the GNU General Public License v2.
# See /LICENSE for more information.
#
include $(TOPDIR)/rules.mk
PKG_NAME:=arm-trusted-firmware-rockchip
PKG_VERSION:=2.8
PKG_RELEASE:=1
PKG_SOURCE:=atf-v$(PKG_VERSION).tar.gz
PKG_SOURCE_URL:=https://github.com/atf-builds/atf/releases/download/v$(PKG_VERSION)/atf-v$(PKG_VERSION).tar.gz?
PKG_HASH:=61df69619fd611da9e43abf66be28d6d59722feef559587fad0ca4cd9e499758
PKG_LICENSE:=BSD-3-Clause
PKG_LICENSE_FILES:=license.md
PKG_MAINTAINER:=Tobias Maedel <openwrt@tbspace.de>
MAKE_PATH:=$(PKG_NAME)
include $(INCLUDE_DIR)/package.mk
define Package/arm-trusted-firmware-rockchip
SECTION:=boot
CATEGORY:=Boot Loaders
TITLE:=ARM Trusted Firmware for Rockchip
DEPENDS:=@TARGET_rockchip_armv8
endef
define Build/Prepare
$(TAR) -C $(PKG_BUILD_DIR) -xf $(DL_DIR)/$(PKG_SOURCE)
endef
define Build/Compile
endef
define Build/InstallDev
$(INSTALL_DIR) -p $(STAGING_DIR_IMAGE)
$(CP) $(PKG_BUILD_DIR)/rk*.elf $(STAGING_DIR_IMAGE)/
endef
define Package/arm-trusted-firmware-rockchip/install
endef
$(eval $(call BuildPackage,arm-trusted-firmware-rockchip))

View file

@ -1,322 +0,0 @@
#
# This is free software, licensed under the GNU General Public License v2.
# See /LICENSE for more information.
#
include $(TOPDIR)/rules.mk
include $(INCLUDE_DIR)/kernel.mk
PKG_VERSION:=2023.04
PKG_RELEASE:=$(AUTORELEASE)
PKG_HASH:=e31cac91545ff41b71cec5d8c22afd695645cd6e2a442ccdacacd60534069341
PKG_MAINTAINER:=Tobias Maedel <openwrt@tbspace.de>
include $(INCLUDE_DIR)/u-boot.mk
include $(INCLUDE_DIR)/package.mk
define U-Boot/Default
BUILD_TARGET:=rockchip
UENV:=default
HIDDEN:=1
endef
# RK3328 boards
define U-Boot/nanopi-r2c-rk3328
BUILD_SUBTARGET:=armv8
NAME:=NanoPi R2C
BUILD_DEVICES:= \
friendlyarm_nanopi-r2c
DEPENDS:=+PACKAGE_u-boot-nanopi-r2c-rk3328:arm-trusted-firmware-rk3328
PKG_BUILD_DEPENDS:=arm-trusted-firmware-rockchip-vendor
ATF:=rk322xh_bl31_v1.49.elf
USE_RKBIN:=1
endef
define U-Boot/nanopi-r2s-rk3328
BUILD_SUBTARGET:=armv8
NAME:=NanoPi R2S
BUILD_DEVICES:= \
friendlyarm_nanopi-r2s \
friendlyarm_nanopi-neo3
DEPENDS:=+PACKAGE_u-boot-nanopi-r2s-rk3328:arm-trusted-firmware-rk3328
PKG_BUILD_DEPENDS:=arm-trusted-firmware-rockchip-vendor
ATF:=rk322xh_bl31_v1.49.elf
USE_RKBIN:=1
endef
define U-Boot/orangepi-r1-plus-rk3328
BUILD_SUBTARGET:=armv8
NAME:=Orange Pi R1 Plus
BUILD_DEVICES:= \
xunlong_orangepi-r1-plus
DEPENDS:=+PACKAGE_u-boot-orangepi-r1-plus-rk3328:arm-trusted-firmware-rk3328
PKG_BUILD_DEPENDS:=arm-trusted-firmware-rockchip-vendor
ATF:=rk322xh_bl31_v1.49.elf
USE_RKBIN:=1
endef
define U-Boot/orangepi-r1-plus-lts-rk3328
BUILD_SUBTARGET:=armv8
NAME:=Orange Pi R1 Plus LTS
BUILD_DEVICES:= \
xunlong_orangepi-r1-plus-lts
DEPENDS:=+PACKAGE_u-boot-orangepi-r1-plus-lts-rk3328:arm-trusted-firmware-rk3328
PKG_BUILD_DEPENDS:=arm-trusted-firmware-rockchip-vendor
ATF:=rk322xh_bl31_v1.49.elf
USE_RKBIN:=1
endef
# RK3399 boards
define U-Boot/guangmiao-g4c-rk3399
BUILD_SUBTARGET:=armv8
NAME:=GuangMiao G4C
BUILD_DEVICES:= \
sharevdi_guangmiao-g4c
DEPENDS:=+PACKAGE_u-boot-guangmiao-g4c-rk3399:arm-trusted-firmware-rockchip
PKG_BUILD_DEPENDS:=arm-trusted-firmware-rockchip
ATF:=rk3399_bl31.elf
endef
define U-Boot/nanopi-r4s-rk3399
BUILD_SUBTARGET:=armv8
NAME:=NanoPi R4S
BUILD_DEVICES:= \
friendlyarm_nanopi-r4s
DEPENDS:=+PACKAGE_u-boot-nanopi-r4s-rk3399:arm-trusted-firmware-rk3399
PKG_BUILD_DEPENDS:=arm-trusted-firmware-rockchip-vendor
ATF:=rk3399_bl31_v1.35.elf
USE_RKBIN:=1
endef
define U-Boot/nanopi-r4se-rk3399
BUILD_SUBTARGET:=armv8
NAME:=NanoPi R4SE
BUILD_DEVICES:= \
friendlyarm_nanopi-r4se
DEPENDS:=+PACKAGE_u-boot-nanopi-r4se-rk3399:arm-trusted-firmware-rk3399
PKG_BUILD_DEPENDS:=arm-trusted-firmware-rockchip-vendor
ATF:=rk3399_bl31_v1.35.elf
USE_RKBIN:=1
endef
define U-Boot/rock-pi-4-rk3399
BUILD_SUBTARGET:=armv8
NAME:=Rock Pi 4
BUILD_DEVICES:= \
radxa_rock-pi-4
DEPENDS:=+PACKAGE_u-boot-rock-pi-4-rk3399:arm-trusted-firmware-rockchip
PKG_BUILD_DEPENDS:=arm-trusted-firmware-rockchip
ATF:=rk3399_bl31.elf
endef
define U-Boot/rockpro64-rk3399
BUILD_SUBTARGET:=armv8
NAME:=RockPro64
BUILD_DEVICES:= \
pine64_rockpro64
DEPENDS:=+PACKAGE_u-boot-rockpro64-rk3399:arm-trusted-firmware-rockchip
PKG_BUILD_DEPENDS:=arm-trusted-firmware-rockchip
ATF:=rk3399_bl31.elf
endef
define U-Boot/rongpin-king3399-rk3399
BUILD_SUBTARGET:=armv8
NAME:=Rongpin King3399
BUILD_DEVICES:= \
rongpin_king3399
DEPENDS:=+PACKAGE_u-boot-rongpin-king3399-rk3399:arm-trusted-firmware-rk3399
PKG_BUILD_DEPENDS:=arm-trusted-firmware-rockchip-vendor
ATF:=rk3399_bl31_v1.35.elf
USE_RKBIN:=1
endef
define U-Boot/rocktech-mpc1903-rk3399
BUILD_SUBTARGET:=armv8
NAME:=Rocktech MPC1903
BUILD_DEVICES:= \
rocktech_mpc1903
DEPENDS:=+PACKAGE_u-boot-rocktech-mpc1903-rk3399:arm-trusted-firmware-rk3399
PKG_BUILD_DEPENDS:=arm-trusted-firmware-rockchip-vendor
ATF:=rk3399_bl31_v1.35.elf
USE_RKBIN:=1
endef
define U-Boot/sharevdi-h3399pc-rk3399
BUILD_SUBTARGET:=armv8
NAME:=SHAREVDI H3399PC
BUILD_DEVICES:= \
sharevdi_h3399pc
DEPENDS:=+PACKAGE_u-boot-sharevdi-h3399pc-rk3399:arm-trusted-firmware-rk3399
PKG_BUILD_DEPENDS:=arm-trusted-firmware-rockchip-vendor
ATF:=rk3399_bl31_v1.35.elf
USE_RKBIN:=1
endef
define U-Boot/dilusense-dlfr100-rk3399
BUILD_SUBTARGET:=armv8
NAME:=Dilusense DLFR100
BUILD_DEVICES:= \
dilusense_dlfr100
DEPENDS:=+PACKAGE_u-boot-dilusense-dlfr100-rk3399:arm-trusted-firmware-rk3399
PKG_BUILD_DEPENDS:=arm-trusted-firmware-rockchip-vendor
ATF:=rk3399_bl31_v1.35.elf
USE_RKBIN:=1
endef
# RK3568 boards
define U-Boot/mrkaio-m68s-rk3568
BUILD_SUBTARGET:=armv8
NAME:=Mrkaio M68S
BUILD_DEVICES:= \
ezpro_mrkaio-m68s \
ezpro_mrkaio-m68s-plus
DEPENDS:=+PACKAGE_u-boot-mrkaio-m68s-rk3568:arm-trusted-firmware-rk3568
PKG_BUILD_DEPENDS:=arm-trusted-firmware-rockchip-vendor
ATF:=rk3568_bl31_v1.34.elf
DDR:=rk3568_ddr_1560MHz_v1.13.bin
endef
define U-Boot/nanopi-r5s-rk3568
BUILD_SUBTARGET:=armv8
NAME:=NanoPi R5S
BUILD_DEVICES:= \
friendlyarm_nanopi-r5c \
friendlyarm_nanopi-r5s
DEPENDS:=+PACKAGE_u-boot-nanopi-r5s-rk3568:arm-trusted-firmware-rk3568
PKG_BUILD_DEPENDS:=arm-trusted-firmware-rockchip-vendor
ATF:=rk3568_bl31_v1.34.elf
DDR:=rk3568_ddr_1560MHz_v1.13.bin
endef
define U-Boot/opc-h68k-rk3568
BUILD_SUBTARGET:=armv8
NAME:=OPC-H68K Board
BUILD_DEVICES:= \
hinlink_opc-h66k \
hinlink_opc-h68k \
hinlink_opc-h69k
DEPENDS:=+PACKAGE_u-boot-opc-h68k-rk3568:arm-trusted-firmware-rk3568
PKG_BUILD_DEPENDS:=arm-trusted-firmware-rockchip-vendor
ATF:=rk3568_bl31_v1.34.elf
DDR:=rk3568_ddr_1560MHz_v1.13.bin
endef
define U-Boot/photonicat-rk3568
BUILD_SUBTARGET:=armv8
NAME:=Ariaboard Photonicat
BUILD_DEVICES:= \
ariaboard_photonicat
DEPENDS:=+PACKAGE_u-boot-photonicat-rk3568:arm-trusted-firmware-rk3568
PKG_BUILD_DEPENDS:=arm-trusted-firmware-rockchip-vendor
ATF:=rk3568_bl31_v1.34.elf
DDR:=rk3568_ddr_1560MHz_v1.13.bin
endef
define U-Boot/radxa-e25-rk3568
BUILD_SUBTARGET:=armv8
NAME:=Radxa E25
BUILD_DEVICES:= \
radxa_e25
DEPENDS:=+PACKAGE_u-boot-radxa-e25-rk3568:arm-trusted-firmware-rk3568
PKG_BUILD_DEPENDS:=arm-trusted-firmware-rockchip-vendor
ATF:=rk3568_bl31_v1.34.elf
DDR:=rk3568_ddr_1560MHz_v1.13.bin
endef
define U-Boot/rock-3a-rk3568
BUILD_SUBTARGET:=armv8
NAME:=ROCK3 Model A
BUILD_DEVICES:= \
radxa_rock-3a
DEPENDS:=+PACKAGE_u-boot-rock-3a-rk3568:arm-trusted-firmware-rk3568
PKG_BUILD_DEPENDS:=arm-trusted-firmware-rockchip-vendor
ATF:=rk3568_bl31_v1.34.elf
DDR:=rk3568_ddr_1560MHz_v1.13.bin
endef
define U-Boot/r66s-rk3568
BUILD_SUBTARGET:=armv8
NAME:=R66S/R68S
BUILD_DEVICES:= \
fastrhino_r66s \
fastrhino_r68s
DEPENDS:=+PACKAGE_u-boot-r66s-rk3568:arm-trusted-firmware-rk3568
PKG_BUILD_DEPENDS:=arm-trusted-firmware-rockchip-vendor
ATF:=rk3568_bl31_v1.34.elf
DDR:=rk3568_ddr_1560MHz_v1.13.bin
endef
define U-Boot/station-p2-rk3568
BUILD_SUBTARGET:=armv8
NAME:=StationP2
BUILD_DEVICES:= \
firefly_station-p2
DEPENDS:=+PACKAGE_u-boot-station-p2-rk3568:arm-trusted-firmware-rk3568
PKG_BUILD_DEPENDS:=arm-trusted-firmware-rockchip-vendor
ATF:=rk3568_bl31_v1.34.elf
DDR:=rk3568_ddr_1560MHz_v1.13.bin
endef
UBOOT_TARGETS := \
mrkaio-m68s-rk3568 \
opc-h68k-rk3568 \
photonicat-rk3568 \
radxa-e25-rk3568 \
rock-3a-rk3568 \
r66s-rk3568 \
station-p2-rk3568 \
sharevdi-h3399pc-rk3399 \
guangmiao-g4c-rk3399 \
nanopi-r4s-rk3399 \
nanopi-r4se-rk3399 \
nanopi-r5s-rk3568 \
rock-pi-4-rk3399 \
rockpro64-rk3399 \
rongpin-king3399-rk3399 \
rocktech-mpc1903-rk3399 \
dilusense-dlfr100-rk3399 \
nanopi-r2c-rk3328 \
nanopi-r2s-rk3328 \
orangepi-r1-plus-rk3328 \
orangepi-r1-plus-lts-rk3328
UBOOT_CONFIGURE_VARS += USE_PRIVATE_LIBGCC=yes
UBOOT_MAKE_FLAGS += \
PATH=$(STAGING_DIR_HOST)/bin:$(PATH) \
BL31=$(STAGING_DIR_IMAGE)/$(ATF)
ifeq ($(CONFIG_PACKAGE_arm-trusted-firmware-rk3568),y)
UBOOT_MAKE_FLAGS += \
ROCKCHIP_TPL=$(STAGING_DIR_IMAGE)/$(DDR)
endif
define Build/Configure
$(call Build/Configure/U-Boot)
$(SED) 's/CONFIG_TOOLS_LIBCRYPTO=y/# CONFIG_TOOLS_LIBCRYPTO is not set/' $(PKG_BUILD_DIR)/.config
$(SED) 's#CONFIG_MKIMAGE_DTC_PATH=.*#CONFIG_MKIMAGE_DTC_PATH="$(PKG_BUILD_DIR)/scripts/dtc/dtc"#g' $(PKG_BUILD_DIR)/.config
echo 'CONFIG_IDENT_STRING=" OpenWrt"' >> $(PKG_BUILD_DIR)/.config
endef
define Build/InstallDev
$(INSTALL_DIR) $(STAGING_DIR_IMAGE)
ifneq ($(USE_RKBIN),)
$(STAGING_DIR_IMAGE)/loaderimage --pack --uboot $(PKG_BUILD_DIR)/u-boot-dtb.bin $(PKG_BUILD_DIR)/uboot.img 0x200000
$(CP) $(PKG_BUILD_DIR)/uboot.img $(STAGING_DIR_IMAGE)/$(BUILD_VARIANT)-uboot.img
else
$(CP) $(PKG_BUILD_DIR)/idbloader.img $(STAGING_DIR_IMAGE)/$(BUILD_VARIANT)-idbloader.img
$(CP) $(PKG_BUILD_DIR)/u-boot.itb $(STAGING_DIR_IMAGE)/$(BUILD_VARIANT)-u-boot.itb
endif
endef
define Package/u-boot/install/default
endef
$(eval $(call BuildPackage/U-Boot))

View file

@ -1,26 +0,0 @@
From 1ab5d2b9cf1b9c1c7ccb58243992fb163c64a14d Mon Sep 17 00:00:00 2001
From: Tianling Shen <cnsztl@immortalwrt.org>
Date: Wed, 5 Apr 2023 21:06:19 +0800
Subject: [PATCH 1/3] Revert "rockchip: rk3399: Drop altbootcmd"
This reverts commit d00fb6421c8fad639f608f55f9291305061ffb17.
Signed-off-by: Tianling Shen <cnsztl@immortalwrt.org>
---
include/configs/rk3399_common.h | 5 ++++-
1 file changed, 4 insertions(+), 1 deletion(-)
--- a/include/configs/rk3399_common.h
+++ b/include/configs/rk3399_common.h
@@ -52,7 +52,10 @@
"fdtfile=" CONFIG_DEFAULT_FDT_FILE "\0" \
"partitions=" PARTS_DEFAULT \
ROCKCHIP_DEVICE_SETTINGS \
- "boot_targets=" BOOT_TARGETS "\0"
+ "boot_targets=" BOOT_TARGETS "\0" \
+ "altbootcmd=" \
+ "setenv boot_syslinux_conf extlinux/extlinux-rollback.conf;" \
+ "run distro_bootcmd\0"
#endif

View file

@ -1,24 +0,0 @@
From 535b09f84be0660ef5e85431328746e74cc8e6b7 Mon Sep 17 00:00:00 2001
From: Tianling Shen <cnsztl@immortalwrt.org>
Date: Wed, 5 Apr 2023 21:08:21 +0800
Subject: [PATCH 2/3] Revert "rockchip: Disable DISTRO_DEFAULTS for rk3399
boards"
This reverts commit 2b9cc7845cf96955db363519faab9a78e166c453.
Signed-off-by: Tianling Shen <cnsztl@immortalwrt.org>
---
arch/arm/Kconfig | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
--- a/arch/arm/Kconfig
+++ b/arch/arm/Kconfig
@@ -1955,7 +1955,7 @@ config ARCH_ROCKCHIP
imply ADC
imply CMD_DM
imply DEBUG_UART_BOARD_INIT
- imply DISTRO_DEFAULTS if !ROCKCHIP_RK3399
+ imply DISTRO_DEFAULTS
imply BOOTSTD_DEFAULTS if !DISTRO_DEFAULTS
imply FAT_WRITE
imply SARADC_ROCKCHIP

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@ -1,50 +0,0 @@
From 93ac12531f7c672ef1fe7689cf8b67ec2372efef Mon Sep 17 00:00:00 2001
From: Tianling Shen <cnsztl@immortalwrt.org>
Date: Wed, 5 Apr 2023 21:08:27 +0800
Subject: [PATCH 3/3] Revert "rockchip: Convert rockpro64-rk3399 to use
standard boot"
This reverts commit 3891c68ef50eda38d78c95ecd03aed030aa6bb53.
Signed-off-by: Tianling Shen <cnsztl@immortalwrt.org>
---
include/configs/rk3399_common.h | 5 ++++-
include/configs/rockchip-common.h | 2 --
2 files changed, 4 insertions(+), 3 deletions(-)
--- a/include/configs/rk3399_common.h
+++ b/include/configs/rk3399_common.h
@@ -47,12 +47,15 @@
#define ROCKCHIP_DEVICE_SETTINGS
#endif
+#include <config_distro_bootcmd.h>
+#include <environment/distro/sf.h>
#define CFG_EXTRA_ENV_SETTINGS \
ENV_MEM_LAYOUT_SETTINGS \
"fdtfile=" CONFIG_DEFAULT_FDT_FILE "\0" \
"partitions=" PARTS_DEFAULT \
ROCKCHIP_DEVICE_SETTINGS \
- "boot_targets=" BOOT_TARGETS "\0" \
+ BOOTENV \
+ BOOTENV_SF \
"altbootcmd=" \
"setenv boot_syslinux_conf extlinux/extlinux-rollback.conf;" \
"run distro_bootcmd\0"
--- a/include/configs/rockchip-common.h
+++ b/include/configs/rockchip-common.h
@@ -67,14 +67,12 @@
BOOT_TARGET_PXE(func) \
BOOT_TARGET_DHCP(func) \
BOOT_TARGET_SF(func)
-#define BOOT_TARGETS "mmc1 mmc0 nvme scsi usb pxe dhcp spi"
#else
#define BOOT_TARGET_DEVICES(func) \
BOOT_TARGET_MMC(func) \
BOOT_TARGET_USB(func) \
BOOT_TARGET_PXE(func) \
BOOT_TARGET_DHCP(func)
-#define BOOT_TARGETS "mmc1 mmc0 usb pxe dhcp"
#endif
#ifdef CONFIG_ARM64

View file

@ -1,169 +0,0 @@
From 872197ee382688701f85fc486a14dc02d2113811 Mon Sep 17 00:00:00 2001
From: Marty Jones <mj8263788@gmail.com>
Date: Tue, 31 May 2022 00:51:23 -0400
Subject: [PATCH] uboot: add NanoPi R5S board
Signed-off-by: Marty Jones <mj8263788@gmail.com>
---
arch/arm/dts/Makefile | 1 +
arch/arm/dts/rk3568-nanopi-r5s-u-boot.dtsi | 25 +++++
arch/arm/dts/rk3568-nanopi-r5s.dts | 9 ++
arch/arm/mach-rockchip/rk3568/Kconfig | 6 ++
board/friendlyelec/nanopi-r5s-rk3568/Kconfig | 15 +++
board/friendlyelec/nanopi-r5s-rk3568/Makefile | 4 +
.../nanopi-r5s-rk3568/nanopi-r5s-rk3568.c | 4 +
configs/nanopi-r5s-rk3568_defconfig | 97 +++++++++++++++++++
include/configs/nanopi-r5s-rk3568.h | 17 ++++
9 files changed, 178 insertions(+)
create mode 100644 arch/arm/dts/rk3568-nanopi-r5s-u-boot.dtsi
create mode 100644 arch/arm/dts/rk3568-nanopi-r5s.dts
create mode 100644 board/friendlyelec/nanopi-r5s-rk3568/Kconfig
create mode 100644 board/friendlyelec/nanopi-r5s-rk3568/Makefile
create mode 100644 board/friendlyelec/nanopi-r5s-rk3568/nanopi-r5s-rk3568.c
create mode 100644 configs/nanopi-r5s-rk3568_defconfig
create mode 100644 include/configs/nanopi-r5s-rk3568.h
--- a/arch/arm/dts/Makefile
+++ b/arch/arm/dts/Makefile
@@ -166,6 +166,7 @@ dtb-$(CONFIG_ROCKCHIP_RK3399) += \
dtb-$(CONFIG_ROCKCHIP_RK3568) += \
rk3568-evb.dtb \
+ rk3568-nanopi-r5s.dtb \
rk3566-radxa-cm3-io.dtb \
rk3568-rock-3a.dtb
--- /dev/null
+++ b/arch/arm/dts/rk3568-nanopi-r5s-u-boot.dtsi
@@ -0,0 +1,25 @@
+// SPDX-License-Identifier: GPL-2.0+
+/*
+ * (C) Copyright 2021 Rockchip Electronics Co., Ltd
+ */
+
+#include "rk356x-u-boot.dtsi"
+
+/ {
+ chosen {
+ stdout-path = &uart2;
+ u-boot,spl-boot-order = "same-as-spl", &sdmmc0, &sdhci;
+ };
+};
+
+&sdmmc0 {
+ bus-width = <4>;
+ u-boot,dm-spl;
+ u-boot,spl-fifo-mode;
+};
+
+&uart2 {
+ clock-frequency = <24000000>;
+ u-boot,dm-spl;
+ status = "okay";
+};
--- /dev/null
+++ b/arch/arm/dts/rk3568-nanopi-r5s.dts
@@ -0,0 +1,9 @@
+// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
+
+/dts-v1/;
+#include "rk3568-evb.dts"
+
+/ {
+ model = "FriendlyElec NanoPi R5S";
+ compatible = "friendlyelec,nanopi-r5s", "rockchip,rk3568";
+};
--- /dev/null
+++ b/configs/nanopi-r5s-rk3568_defconfig
@@ -0,0 +1,91 @@
+CONFIG_ARM=y
+CONFIG_SKIP_LOWLEVEL_INIT=y
+CONFIG_COUNTER_FREQUENCY=24000000
+CONFIG_ARCH_ROCKCHIP=y
+CONFIG_TEXT_BASE=0x00a00000
+CONFIG_SPL_LIBCOMMON_SUPPORT=y
+CONFIG_SPL_LIBGENERIC_SUPPORT=y
+CONFIG_NR_DRAM_BANKS=2
+CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y
+CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0xc00000
+CONFIG_DEFAULT_DEVICE_TREE="rk3568-nanopi-r5s"
+CONFIG_ROCKCHIP_RK3568=y
+CONFIG_SPL_ROCKCHIP_BACK_TO_BROM=y
+CONFIG_SPL_ROCKCHIP_COMMON_BOARD=y
+CONFIG_SPL_BOARD_INIT=y
+CONFIG_SPL_MMC=y
+CONFIG_SPL_SERIAL=y
+CONFIG_SPL_STACK_R_ADDR=0x600000
+CONFIG_TARGET_EVB_RK3568=y
+CONFIG_SPL_STACK=0x400000
+CONFIG_DEBUG_UART_BASE=0xFE660000
+CONFIG_DEBUG_UART_CLOCK=24000000
+CONFIG_SYS_LOAD_ADDR=0xc00800
+CONFIG_DEBUG_UART=y
+CONFIG_FIT=y
+CONFIG_FIT_VERBOSE=y
+CONFIG_SPL_LOAD_FIT=y
+CONFIG_DEFAULT_FDT_FILE="rockchip/rk3568-nanopi-r5s.dtb"
+# CONFIG_DISPLAY_CPUINFO is not set
+CONFIG_DISPLAY_BOARDINFO_LATE=y
+CONFIG_SPL_MAX_SIZE=0x40000
+CONFIG_SPL_PAD_TO=0x7f8000
+CONFIG_SPL_HAS_BSS_LINKER_SECTION=y
+CONFIG_SPL_BSS_START_ADDR=0x4000000
+CONFIG_SPL_BSS_MAX_SIZE=0x4000
+# CONFIG_SPL_RAW_IMAGE_SUPPORT is not set
+# CONFIG_SPL_SHARES_INIT_SP_ADDR is not set
+CONFIG_SPL_STACK_R=y
+CONFIG_SPL_ADC=y
+CONFIG_SPL_ATF=y
+CONFIG_CMD_ADC=y
+CONFIG_CMD_GPIO=y
+CONFIG_CMD_GPT=y
+CONFIG_CMD_I2C=y
+CONFIG_CMD_MMC=y
+CONFIG_CMD_USB=y
+CONFIG_CMD_REGULATOR=y
+# CONFIG_CMD_SETEXPR is not set
+# CONFIG_SPL_DOS_PARTITION is not set
+CONFIG_SPL_OF_CONTROL=y
+CONFIG_OF_LIVE=y
+CONFIG_NET_RANDOM_ETHADDR=y
+CONFIG_SPL_REGMAP=y
+CONFIG_SPL_SYSCON=y
+CONFIG_SPL_CLK=y
+CONFIG_CLK_SCMI=y
+CONFIG_RESET_SCMI=y
+CONFIG_ROCKCHIP_GPIO=y
+CONFIG_SYS_I2C_ROCKCHIP=y
+CONFIG_MISC=y
+CONFIG_SUPPORT_EMMC_RPMB=y
+CONFIG_MMC_DW=y
+CONFIG_MMC_DW_ROCKCHIP=y
+CONFIG_MMC_SDHCI=y
+CONFIG_MMC_SDHCI_SDMA=y
+CONFIG_MMC_SDHCI_ROCKCHIP=y
+CONFIG_ETH_DESIGNWARE=y
+CONFIG_GMAC_ROCKCHIP=y
+CONFIG_DM_PMIC=y
+CONFIG_PMIC_RK8XX=y
+CONFIG_SPL_PMIC_RK8XX=y
+CONFIG_PHY_ROCKCHIP_INNO_USB2=y
+CONFIG_PHY_ROCKCHIP_NANENG_COMBOPHY=y
+CONFIG_REGULATOR_PWM=y
+CONFIG_DM_REGULATOR_FIXED=y
+CONFIG_SPL_DM_REGULATOR_FIXED=y
+CONFIG_REGULATOR_RK8XX=y
+CONFIG_PWM_ROCKCHIP=y
+CONFIG_SPL_RAM=y
+CONFIG_BAUDRATE=1500000
+CONFIG_DEBUG_UART_SHIFT=2
+CONFIG_SYS_NS16550_MEM32=y
+CONFIG_SYSRESET=y
+CONFIG_USB=y
+CONFIG_USB_XHCI_HCD=y
+CONFIG_USB_XHCI_DWC3=y
+CONFIG_USB_EHCI_HCD=y
+CONFIG_USB_EHCI_GENERIC=y
+CONFIG_USB_DWC3=y
+CONFIG_USB_DWC3_GENERIC=y
+CONFIG_ERRNO_STR=y

View file

@ -1,35 +0,0 @@
From 2d7c904f271ffd19086cafe7cd6548ec5b1a5a83 Mon Sep 17 00:00:00 2001
From: Jason Zhu <jason.zhu@rock-chips.com>
Date: Thu, 12 Mar 2020 15:04:51 +0800
Subject: [PATCH] driver: Makefile: support adc in SPL
Signed-off-by: Jason Zhu <jason.zhu@rock-chips.com>
Change-Id: I915becbf9597aa070001d3368d8daf9079565fc9
---
common/spl/Kconfig | 6 ++++++
drivers/Makefile | 2 +-
2 files changed, 7 insertions(+), 1 deletion(-)
--- a/common/spl/Kconfig
+++ b/common/spl/Kconfig
@@ -587,6 +587,11 @@ config SPL_FIT_IMAGE_TINY
ensure this information is available to the next image
invoked).
+config SPL_ADC
+ bool "Support ADC drivers in SPL"
+ help
+ Enable ADC drivers in SPL.
+
config SPL_CACHE
bool "Support CACHE drivers"
help
--- a/drivers/Makefile
+++ b/drivers/Makefile
@@ -1,5 +1,6 @@
# SPDX-License-Identifier: GPL-2.0+
+obj-$(CONFIG_$(SPL_)ADC) += adc/
obj-$(CONFIG_$(SPL_TPL_)BLK) += block/
obj-$(CONFIG_$(SPL_TPL_)BOOTCOUNT_LIMIT) += bootcount/
obj-$(CONFIG_$(SPL_TPL_)BUTTON) += button/

View file

@ -1,144 +0,0 @@
From 79cb33b9da0c9475486ca0759341057854b25e38 Mon Sep 17 00:00:00 2001
From: Peter Geis <pgwipeout@gmail.com>
Date: Sun, 20 Feb 2022 07:57:50 -0500
Subject: [PATCH] rockchip: handle bootrom mode in spl
Signed-off-by: Peter Geis <pgwipeout@gmail.com>
---
arch/arm/mach-rockchip/Makefile | 6 +--
arch/arm/mach-rockchip/boot_mode.c | 4 +-
arch/arm/mach-rockchip/rk3568/rk3568.c | 54 +++++++++++++++++++++++++-
3 files changed, 59 insertions(+), 5 deletions(-)
--- a/arch/arm/mach-rockchip/Makefile
+++ b/arch/arm/mach-rockchip/Makefile
@@ -15,13 +15,13 @@ obj-tpl-$(CONFIG_ROCKCHIP_PX30) += px30-board-tpl.o
obj-spl-$(CONFIG_ROCKCHIP_RK3036) += rk3036-board-spl.o
-ifeq ($(CONFIG_SPL_BUILD)$(CONFIG_TPL_BUILD),)
-
# Always include boot_mode.o, as we bypass it (i.e. turn it off)
# inside of boot_mode.c when CONFIG_ROCKCHIP_BOOT_MODE_REG is 0. This way,
# we can have the preprocessor correctly recognise both 0x0 and 0
# meaning "turn it off".
-obj-y += boot_mode.o
+obj-$(CONFIG_ARCH_ROCKCHIP) += boot_mode.o
+
+ifeq ($(CONFIG_SPL_BUILD)$(CONFIG_TPL_BUILD),)
obj-$(CONFIG_ROCKCHIP_COMMON_BOARD) += board.o
obj-$(CONFIG_MISC_INIT_R) += misc.o
endif
--- a/arch/arm/mach-rockchip/boot_mode.c
+++ b/arch/arm/mach-rockchip/boot_mode.c
@@ -51,7 +51,7 @@ __weak int rockchip_dnl_key_pressed(void)
ret = -ENODEV;
uclass_foreach_dev(dev, uc) {
if (!strncmp(dev->name, "saradc", 6)) {
- ret = adc_channel_single_shot(dev->name, 1, &val);
+ ret = adc_channel_single_shot(dev->name, 0, &val);
break;
}
}
@@ -89,6 +89,7 @@ int setup_boot_mode(void)
boot_mode = readl(reg);
debug("%s: boot mode 0x%08x\n", __func__, boot_mode);
+#if !defined(CONFIG_SPL_BUILD) && !defined(CONFIG_TPL_BUILD)
/* Clear boot mode */
writel(BOOT_NORMAL, reg);
@@ -102,6 +103,7 @@ int setup_boot_mode(void)
env_set("preboot", "setenv preboot; ums mmc 0");
break;
}
+#endif
return 0;
}
--- a/arch/arm/mach-rockchip/rk3568/rk3568.c
+++ b/arch/arm/mach-rockchip/rk3568/rk3568.c
@@ -9,19 +9,30 @@
#include <asm/armv8/mmu.h>
#include <asm/io.h>
#include <asm/arch-rockchip/bootrom.h>
+#include <asm/arch-rockchip/boot_mode.h>
#include <asm/arch-rockchip/grf_rk3568.h>
#include <asm/arch-rockchip/hardware.h>
#include <dt-bindings/clock/rk3568-cru.h>
#define PMUGRF_BASE 0xfdc20000
#define GRF_BASE 0xfdc60000
+#define GRF_GPIO1B_IOMUX_H 0x0c
+#define GRF_GPIO1C_IOMUX_L 0x10
+#define GRF_GPIO1C_IOMUX_H 0x14
+#define GRF_GPIO1D_IOMUX_L 0x18
+#define GRF_GPIO1D_IOMUX_H 0x1c
+#define GRF_GPIO2A_IOMUX_L 0x20
#define GRF_GPIO1B_DS_2 0x218
#define GRF_GPIO1B_DS_3 0x21c
#define GRF_GPIO1C_DS_0 0x220
#define GRF_GPIO1C_DS_1 0x224
#define GRF_GPIO1C_DS_2 0x228
#define GRF_GPIO1C_DS_3 0x22c
-#define SGRF_BASE 0xFDD18000
+#define GRF_GPIO1D_DS_0 0x230
+#define GRF_GPIO1D_DS_1 0x234
+#define GRF_GPIO1D_DS_2 0x238
+#define SGRF_BASE 0xfdd18000
+#define SGRF_SOC_CON3 0x0c
#define SGRF_SOC_CON4 0x10
#define EMMC_HPROT_SECURE_CTRL 0x03
#define SDMMC0_HPROT_SECURE_CTRL 0x01
@@ -133,6 +144,24 @@ int arch_cpu_init(void)
writel(0x3f3f0707, GRF_BASE + GRF_GPIO1C_DS_1);
writel(0x3f3f0707, GRF_BASE + GRF_GPIO1C_DS_2);
writel(0x3f3f0707, GRF_BASE + GRF_GPIO1C_DS_3);
+
+ /* emmc, sfc, and sdmmc iomux */
+ writel((0x7777UL << 16) | (0x1111), GRF_BASE + GRF_GPIO1B_IOMUX_H);
+ writel((0x7777UL << 16) | (0x1111), GRF_BASE + GRF_GPIO1C_IOMUX_L);
+ writel((0x7777UL << 16) | (0x2111), GRF_BASE + GRF_GPIO1C_IOMUX_H);
+ writel((0x7777UL << 16) | (0x1111), GRF_BASE + GRF_GPIO1D_IOMUX_L);
+ writel((0x7777UL << 16) | (0x1111), GRF_BASE + GRF_GPIO1D_IOMUX_H);
+ writel((0x7777UL << 16) | (0x1111), GRF_BASE + GRF_GPIO2A_IOMUX_L);
+
+ /* set the fspi d0~3 cs0 to level 2 */
+ writel(0x3f000700, GRF_BASE + GRF_GPIO1C_DS_3);
+ writel(0x3f000700, GRF_BASE + GRF_GPIO1D_DS_0);
+ writel(0x3f3f0707, GRF_BASE + GRF_GPIO1D_DS_1);
+ writel(0x003f0007, GRF_BASE + GRF_GPIO1D_DS_2);
+
+ /* Set the fspi to secure */
+ writel(((0x1 << 14) << 16) | (0x0 << 14), SGRF_BASE + SGRF_SOC_CON3);
+
#endif
return 0;
}
@@ -164,3 +193,26 @@ int ft_system_setup(void *blob, struct bd_info *bd)
#endif
return 0;
}
+
+#ifdef CONFIG_SPL_BUILD
+
+void __weak led_setup(void)
+{
+}
+
+void spl_board_init(void)
+{
+ led_setup();
+
+#if defined(SPL_DM_REGULATOR)
+ /*
+ * Turning the eMMC and SPI back on (if disabled via the Qseven
+ * BIOS_ENABLE) signal is done through a always-on regulator).
+ */
+ if (regulators_enable_boot_on(false))
+ debug("%s: Cannot enable boot on regulator\n", __func__);
+#endif
+
+ setup_boot_mode();
+}
+#endif

View file

@ -1,45 +0,0 @@
--- a/configs/rock-3a-rk3568_defconfig
+++ b/configs/rock-3a-rk3568_defconfig
@@ -39,6 +39,8 @@
CONFIG_CMD_GPT=y
CONFIG_CMD_I2C=y
CONFIG_CMD_MMC=y
+CONFIG_CMD_USB=y
+CONFIG_CMD_REGULATOR=y
# CONFIG_CMD_SETEXPR is not set
# CONFIG_SPL_DOS_PARTITION is not set
CONFIG_SPL_OF_CONTROL=y
@@ -47,6 +49,8 @@
CONFIG_SPL_REGMAP=y
CONFIG_SPL_SYSCON=y
CONFIG_SPL_CLK=y
+CONFIG_CLK_SCMI=y
+CONFIG_RESET_SCMI=y
CONFIG_ROCKCHIP_GPIO=y
CONFIG_SYS_I2C_ROCKCHIP=y
CONFIG_MISC=y
@@ -61,7 +65,11 @@
CONFIG_DM_PMIC=y
CONFIG_PMIC_RK8XX=y
CONFIG_SPL_PMIC_RK8XX=y
+CONFIG_PHY_ROCKCHIP_INNO_USB2=y
+CONFIG_PHY_ROCKCHIP_NANENG_COMBOPHY=y
CONFIG_REGULATOR_PWM=y
+CONFIG_DM_REGULATOR_FIXED=y
+CONFIG_SPL_DM_REGULATOR_FIXED=y
CONFIG_REGULATOR_RK8XX=y
CONFIG_PWM_ROCKCHIP=y
CONFIG_SPL_RAM=y
@@ -69,5 +77,11 @@
CONFIG_DEBUG_UART_SHIFT=2
CONFIG_SYS_NS16550_MEM32=y
CONFIG_SYSRESET=y
-# CONFIG_BINMAN_FDT is not set
+CONFIG_USB=y
+CONFIG_USB_XHCI_HCD=y
+CONFIG_USB_XHCI_DWC3=y
+CONFIG_USB_EHCI_HCD=y
+CONFIG_USB_EHCI_GENERIC=y
+CONFIG_USB_DWC3=y
+CONFIG_USB_DWC3_GENERIC=y
CONFIG_ERRNO_STR=y

View file

@ -1,10 +0,0 @@
--- a/tools/Makefile
+++ b/tools/Makefile
@@ -113,7 +113,6 @@ dumpimage-mkimage-objs := aisimage.o \
imximage.o \
imx8image.o \
imx8mimage.o \
- kwbimage.o \
lib/md5.o \
lpc32xximage.o \
mxsimage.o \

View file

@ -1,30 +0,0 @@
--- a/Makefile
+++ b/Makefile
@@ -2000,26 +2000,7 @@ endif
# Check dtc and pylibfdt, if DTC is provided, else build them
PHONY += scripts_dtc
scripts_dtc: scripts_basic
- $(Q)if test "$(DTC)" = "$(DTC_INTREE)"; then \
- $(MAKE) $(build)=scripts/dtc; \
- else \
- if ! $(DTC) -v >/dev/null; then \
- echo '*** Failed to check dtc version: $(DTC)'; \
- false; \
- else \
- if test "$(call dtc-version)" -lt $(DTC_MIN_VERSION); then \
- echo '*** Your dtc is too old, please upgrade to dtc $(DTC_MIN_VERSION) or newer'; \
- false; \
- else \
- if [ -n "$(CONFIG_PYLIBFDT)" ]; then \
- if ! echo "import libfdt" | $(PYTHON3) 2>/dev/null; then \
- echo '*** pylibfdt does not seem to be available with $(PYTHON3)'; \
- false; \
- fi; \
- fi; \
- fi; \
- fi; \
- fi
+ $(MAKE) $(build)=scripts/dtc
# ---------------------------------------------------------------------------
quiet_cmd_cpp_lds = LDS $@

View file

@ -1,24 +0,0 @@
--- a/tools/image-host.c
+++ b/tools/image-host.c
@@ -1125,6 +1125,7 @@ static int fit_config_add_verification_d
* 2) get public key (X509_get_pubkey)
* 3) provide der format (d2i_RSAPublicKey)
*/
+#ifdef CONFIG_TOOLS_LIBCRYPTO
static int read_pub_key(const char *keydir, const void *name,
unsigned char **pubkey, int *pubkey_len)
{
@@ -1178,6 +1179,13 @@ err_cert:
fclose(f);
return ret;
}
+#else
+static int read_pub_key(const char *keydir, const void *name,
+ unsigned char **pubkey, int *pubkey_len)
+{
+ return -ENOSYS;
+}
+#endif
int fit_pre_load_data(const char *keydir, void *keydest, void *fit)
{

View file

@ -1,72 +0,0 @@
From 734b9d9e33919efbec63b1bfe48f25ce16dbd59a Mon Sep 17 00:00:00 2001
From: Jonas Karlman <jonas@kwiboo.se>
Date: Fri, 17 Mar 2023 19:16:45 +0000
Subject: [PATCH] clk: scmi: Add Kconfig option for SPL
Building U-Boot SPL with CLK_SCMI and SCMI_FIRMWARE Kconfig options
enabled and SPL_FIRMWARE disabled result in the following error.
drivers/clk/clk_scmi.o: in function `scmi_clk_gate':
drivers/clk/clk_scmi.c:84: undefined reference to `devm_scmi_process_msg'
drivers/clk/clk_scmi.c:88: undefined reference to `scmi_to_linux_errno'
drivers/clk/clk_scmi.o: in function `scmi_clk_get_rate':
drivers/clk/clk_scmi.c:113: undefined reference to `devm_scmi_process_msg'
drivers/clk/clk_scmi.c:117: undefined reference to `scmi_to_linux_errno'
drivers/clk/clk_scmi.o: in function `scmi_clk_set_rate':
drivers/clk/clk_scmi.c:139: undefined reference to `devm_scmi_process_msg'
drivers/clk/clk_scmi.c:143: undefined reference to `scmi_to_linux_errno'
drivers/clk/clk_scmi.o: in function `scmi_clk_probe':
drivers/clk/clk_scmi.c:157: undefined reference to `devm_scmi_of_get_channel'
make[1]: *** [scripts/Makefile.spl:527: spl/u-boot-spl] Error 1
make: *** [Makefile:2043: spl/u-boot-spl] Error 2
Add Kconfig option so that CLK_SCMI can be disabled in SPL to fix this.
Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
Link: https://patchwork.ozlabs.org/project/uboot/patch/20230317191638.2558279-2-jonas@kwiboo.se/
---
drivers/clk/Kconfig | 8 ++++++++
drivers/clk/Makefile | 2 +-
drivers/firmware/scmi/scmi_agent-uclass.c | 2 +-
3 files changed, 10 insertions(+), 2 deletions(-)
--- a/drivers/clk/Kconfig
+++ b/drivers/clk/Kconfig
@@ -166,6 +166,14 @@ config CLK_SCMI
by a SCMI agent based on SCMI clock protocol communication
with a SCMI server.
+config SPL_CLK_SCMI
+ bool "Enable SCMI clock driver in SPL"
+ depends on SCMI_FIRMWARE && SPL_FIRMWARE
+ help
+ Enable this option if you want to support clock devices exposed
+ by a SCMI agent based on SCMI clock protocol communication
+ with a SCMI server in SPL.
+
config CLK_HSDK
bool "Enable cgu clock driver for HSDK boards"
depends on CLK && TARGET_HSDK
--- a/drivers/clk/Makefile
+++ b/drivers/clk/Makefile
@@ -39,7 +39,7 @@ obj-$(CONFIG_CLK_MVEBU) += mvebu/
obj-$(CONFIG_CLK_OCTEON) += clk_octeon.o
obj-$(CONFIG_CLK_OWL) += owl/
obj-$(CONFIG_CLK_RENESAS) += renesas/
-obj-$(CONFIG_CLK_SCMI) += clk_scmi.o
+obj-$(CONFIG_$(SPL_TPL_)CLK_SCMI) += clk_scmi.o
obj-$(CONFIG_CLK_SIFIVE) += sifive/
obj-$(CONFIG_CLK_UNIPHIER) += uniphier/
obj-$(CONFIG_CLK_VERSACLOCK) += clk_versaclock.o
--- a/drivers/firmware/scmi/scmi_agent-uclass.c
+++ b/drivers/firmware/scmi/scmi_agent-uclass.c
@@ -75,7 +75,7 @@ static int scmi_bind_protocols(struct udevice *dev)
name = ofnode_get_name(node);
switch (protocol_id) {
case SCMI_PROTOCOL_ID_CLOCK:
- if (IS_ENABLED(CONFIG_CLK_SCMI))
+ if (CONFIG_IS_ENABLED(CLK_SCMI))
drv = DM_DRIVER_GET(scmi_clock);
break;
case SCMI_PROTOCOL_ID_RESET_DOMAIN:

View file

@ -1,126 +0,0 @@
From 7db635cf638dfad08a50e26a6d02e1b6e7a9d7c5 Mon Sep 17 00:00:00 2001
From: Jonas Karlman <jonas@kwiboo.se>
Date: Sat, 18 Mar 2023 23:30:42 +0000
Subject: [PATCH] pinctrl: rockchip: Fix IO mux selection on RK3568
IO mux selection is not working correctly for all pins. Sync mux route
data from linux to add any missing and update wrong trigger pins to fix
this. Also apply the pull-up fix needed for GPIO0 D3-D6.
Fixes: 1977d746aa54 ("rockchip: rk3568: add rk3568 pinctrl driver")
Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
Link: https://patchwork.ozlabs.org/project/uboot/patch/20230318233039.799975-1-jonas@kwiboo.se/
---
drivers/pinctrl/rockchip/pinctrl-rk3568.c | 66 +++++++++++++----------
1 file changed, 38 insertions(+), 28 deletions(-)
--- a/drivers/pinctrl/rockchip/pinctrl-rk3568.c
+++ b/drivers/pinctrl/rockchip/pinctrl-rk3568.c
@@ -13,6 +13,12 @@
#include "pinctrl-rockchip.h"
static struct rockchip_mux_route_data rk3568_mux_route_data[] = {
+ MR_PMUGRF(RK_GPIO0, RK_PB7, RK_FUNC_1, 0x0110, RK_GENMASK_VAL(1, 0, 0)), /* PWM0 IO mux selection M0 */
+ MR_PMUGRF(RK_GPIO0, RK_PC7, RK_FUNC_2, 0x0110, RK_GENMASK_VAL(1, 0, 1)), /* PWM0 IO mux selection M1 */
+ MR_PMUGRF(RK_GPIO0, RK_PC0, RK_FUNC_1, 0x0110, RK_GENMASK_VAL(3, 2, 0)), /* PWM1 IO mux selection M0 */
+ MR_PMUGRF(RK_GPIO0, RK_PB5, RK_FUNC_4, 0x0110, RK_GENMASK_VAL(3, 2, 1)), /* PWM1 IO mux selection M1 */
+ MR_PMUGRF(RK_GPIO0, RK_PC1, RK_FUNC_1, 0x0110, RK_GENMASK_VAL(5, 4, 0)), /* PWM2 IO mux selection M0 */
+ MR_PMUGRF(RK_GPIO0, RK_PB6, RK_FUNC_4, 0x0110, RK_GENMASK_VAL(5, 4, 1)), /* PWM2 IO mux selection M1 */
MR_TOPGRF(RK_GPIO0, RK_PB3, RK_FUNC_2, 0x0300, RK_GENMASK_VAL(0, 0, 0)), /* CAN0 IO mux selection M0 */
MR_TOPGRF(RK_GPIO2, RK_PA1, RK_FUNC_4, 0x0300, RK_GENMASK_VAL(0, 0, 1)), /* CAN0 IO mux selection M1 */
MR_TOPGRF(RK_GPIO1, RK_PA1, RK_FUNC_3, 0x0300, RK_GENMASK_VAL(2, 2, 0)), /* CAN1 IO mux selection M0 */
@@ -33,30 +39,22 @@ static struct rockchip_mux_route_data rk3568_mux_route_data[] = {
MR_TOPGRF(RK_GPIO2, RK_PB1, RK_FUNC_2, 0x0304, RK_GENMASK_VAL(2, 2, 1)), /* I2C4 IO mux selection M1 */
MR_TOPGRF(RK_GPIO3, RK_PB4, RK_FUNC_4, 0x0304, RK_GENMASK_VAL(4, 4, 0)), /* I2C5 IO mux selection M0 */
MR_TOPGRF(RK_GPIO4, RK_PD0, RK_FUNC_2, 0x0304, RK_GENMASK_VAL(4, 4, 1)), /* I2C5 IO mux selection M1 */
- MR_TOPGRF(RK_GPIO3, RK_PD2, RK_FUNC_1, 0x0304, RK_GENMASK_VAL(6, 6, 0)), /* PWM4 IO mux selection M0 */
- MR_TOPGRF(RK_GPIO3, RK_PD2, RK_FUNC_1, 0x0304, RK_GENMASK_VAL(6, 6, 1)), /* PWM4 IO mux selection M1 */
- MR_TOPGRF(RK_GPIO3, RK_PD2, RK_FUNC_1, 0x0304, RK_GENMASK_VAL(8, 8, 0)), /* PWM5 IO mux selection M0 */
- MR_TOPGRF(RK_GPIO3, RK_PD2, RK_FUNC_1, 0x0304, RK_GENMASK_VAL(8, 8, 1)), /* PWM5 IO mux selection M1 */
- MR_TOPGRF(RK_GPIO3, RK_PD2, RK_FUNC_1, 0x0304, RK_GENMASK_VAL(10, 10, 0)), /* PWM6 IO mux selection M0 */
- MR_TOPGRF(RK_GPIO3, RK_PD2, RK_FUNC_1, 0x0304, RK_GENMASK_VAL(10, 10, 1)), /* PWM6 IO mux selection M1 */
- MR_TOPGRF(RK_GPIO3, RK_PD2, RK_FUNC_1, 0x0304, RK_GENMASK_VAL(12, 12, 0)), /* PWM7 IO mux selection M0 */
- MR_TOPGRF(RK_GPIO3, RK_PD2, RK_FUNC_1, 0x0304, RK_GENMASK_VAL(12, 12, 1)), /* PWM7 IO mux selection M1 */
- MR_TOPGRF(RK_GPIO3, RK_PD2, RK_FUNC_1, 0x0304, RK_GENMASK_VAL(14, 14, 0)), /* PWM8 IO mux selection M0 */
- MR_TOPGRF(RK_GPIO3, RK_PD2, RK_FUNC_1, 0x0304, RK_GENMASK_VAL(14, 14, 1)), /* PWM8 IO mux selection M1 */
- MR_TOPGRF(RK_GPIO3, RK_PD2, RK_FUNC_1, 0x0308, RK_GENMASK_VAL(0, 0, 0)), /* PWM9 IO mux selection M0 */
- MR_TOPGRF(RK_GPIO3, RK_PD2, RK_FUNC_1, 0x0308, RK_GENMASK_VAL(0, 0, 1)), /* PWM9 IO mux selection M1 */
- MR_TOPGRF(RK_GPIO3, RK_PD2, RK_FUNC_1, 0x0308, RK_GENMASK_VAL(2, 2, 0)), /* PWM10 IO mux selection M0 */
- MR_TOPGRF(RK_GPIO3, RK_PD2, RK_FUNC_1, 0x0308, RK_GENMASK_VAL(2, 2, 1)), /* PWM10 IO mux selection M1 */
- MR_TOPGRF(RK_GPIO3, RK_PD2, RK_FUNC_1, 0x0308, RK_GENMASK_VAL(4, 4, 0)), /* PWM11 IO mux selection M0 */
- MR_TOPGRF(RK_GPIO3, RK_PD2, RK_FUNC_1, 0x0308, RK_GENMASK_VAL(4, 4, 1)), /* PWM11 IO mux selection M1 */
- MR_TOPGRF(RK_GPIO3, RK_PD2, RK_FUNC_1, 0x0308, RK_GENMASK_VAL(6, 6, 0)), /* PWM12 IO mux selection M0 */
- MR_TOPGRF(RK_GPIO3, RK_PD2, RK_FUNC_1, 0x0308, RK_GENMASK_VAL(6, 6, 1)), /* PWM12 IO mux selection M1 */
- MR_TOPGRF(RK_GPIO3, RK_PD2, RK_FUNC_1, 0x0308, RK_GENMASK_VAL(8, 8, 0)), /* PWM13 IO mux selection M0 */
- MR_TOPGRF(RK_GPIO3, RK_PD2, RK_FUNC_1, 0x0308, RK_GENMASK_VAL(8, 8, 1)), /* PWM13 IO mux selection M1 */
- MR_TOPGRF(RK_GPIO3, RK_PD2, RK_FUNC_1, 0x0308, RK_GENMASK_VAL(10, 10, 0)), /* PWM14 IO mux selection M0 */
- MR_TOPGRF(RK_GPIO3, RK_PD2, RK_FUNC_1, 0x0308, RK_GENMASK_VAL(10, 10, 1)), /* PWM14 IO mux selection M1 */
- MR_TOPGRF(RK_GPIO3, RK_PD2, RK_FUNC_1, 0x0308, RK_GENMASK_VAL(12, 12, 0)), /* PWM15 IO mux selection M0 */
- MR_TOPGRF(RK_GPIO3, RK_PD2, RK_FUNC_1, 0x0308, RK_GENMASK_VAL(12, 12, 1)), /* PWM15 IO mux selection M1 */
+ MR_TOPGRF(RK_GPIO3, RK_PB1, RK_FUNC_5, 0x0304, RK_GENMASK_VAL(14, 14, 0)), /* PWM8 IO mux selection M0 */
+ MR_TOPGRF(RK_GPIO1, RK_PD5, RK_FUNC_4, 0x0304, RK_GENMASK_VAL(14, 14, 1)), /* PWM8 IO mux selection M1 */
+ MR_TOPGRF(RK_GPIO3, RK_PB2, RK_FUNC_5, 0x0308, RK_GENMASK_VAL(0, 0, 0)), /* PWM9 IO mux selection M0 */
+ MR_TOPGRF(RK_GPIO1, RK_PD6, RK_FUNC_4, 0x0308, RK_GENMASK_VAL(0, 0, 1)), /* PWM9 IO mux selection M1 */
+ MR_TOPGRF(RK_GPIO3, RK_PB5, RK_FUNC_5, 0x0308, RK_GENMASK_VAL(2, 2, 0)), /* PWM10 IO mux selection M0 */
+ MR_TOPGRF(RK_GPIO2, RK_PA1, RK_FUNC_2, 0x0308, RK_GENMASK_VAL(2, 2, 1)), /* PWM10 IO mux selection M1 */
+ MR_TOPGRF(RK_GPIO3, RK_PB6, RK_FUNC_5, 0x0308, RK_GENMASK_VAL(4, 4, 0)), /* PWM11 IO mux selection M0 */
+ MR_TOPGRF(RK_GPIO4, RK_PC0, RK_FUNC_3, 0x0308, RK_GENMASK_VAL(4, 4, 1)), /* PWM11 IO mux selection M1 */
+ MR_TOPGRF(RK_GPIO3, RK_PB7, RK_FUNC_2, 0x0308, RK_GENMASK_VAL(6, 6, 0)), /* PWM12 IO mux selection M0 */
+ MR_TOPGRF(RK_GPIO4, RK_PC5, RK_FUNC_1, 0x0308, RK_GENMASK_VAL(6, 6, 1)), /* PWM12 IO mux selection M1 */
+ MR_TOPGRF(RK_GPIO3, RK_PC0, RK_FUNC_2, 0x0308, RK_GENMASK_VAL(8, 8, 0)), /* PWM13 IO mux selection M0 */
+ MR_TOPGRF(RK_GPIO4, RK_PC6, RK_FUNC_1, 0x0308, RK_GENMASK_VAL(8, 8, 1)), /* PWM13 IO mux selection M1 */
+ MR_TOPGRF(RK_GPIO3, RK_PC4, RK_FUNC_1, 0x0308, RK_GENMASK_VAL(10, 10, 0)), /* PWM14 IO mux selection M0 */
+ MR_TOPGRF(RK_GPIO4, RK_PC2, RK_FUNC_1, 0x0308, RK_GENMASK_VAL(10, 10, 1)), /* PWM14 IO mux selection M1 */
+ MR_TOPGRF(RK_GPIO3, RK_PC5, RK_FUNC_1, 0x0308, RK_GENMASK_VAL(12, 12, 0)), /* PWM15 IO mux selection M0 */
+ MR_TOPGRF(RK_GPIO4, RK_PC3, RK_FUNC_1, 0x0308, RK_GENMASK_VAL(12, 12, 1)), /* PWM15 IO mux selection M1 */
MR_TOPGRF(RK_GPIO3, RK_PD2, RK_FUNC_3, 0x0308, RK_GENMASK_VAL(14, 14, 0)), /* SDMMC2 IO mux selection M0 */
MR_TOPGRF(RK_GPIO3, RK_PA5, RK_FUNC_5, 0x0308, RK_GENMASK_VAL(14, 14, 1)), /* SDMMC2 IO mux selection M1 */
MR_TOPGRF(RK_GPIO0, RK_PB5, RK_FUNC_2, 0x030c, RK_GENMASK_VAL(0, 0, 0)), /* SPI0 IO mux selection M0 */
@@ -68,7 +66,7 @@ static struct rockchip_mux_route_data rk3568_mux_route_data[] = {
MR_TOPGRF(RK_GPIO4, RK_PB3, RK_FUNC_4, 0x030c, RK_GENMASK_VAL(6, 6, 0)), /* SPI3 IO mux selection M0 */
MR_TOPGRF(RK_GPIO4, RK_PC2, RK_FUNC_2, 0x030c, RK_GENMASK_VAL(6, 6, 1)), /* SPI3 IO mux selection M1 */
MR_TOPGRF(RK_GPIO2, RK_PB4, RK_FUNC_2, 0x030c, RK_GENMASK_VAL(8, 8, 0)), /* UART1 IO mux selection M0 */
- MR_TOPGRF(RK_GPIO0, RK_PD1, RK_FUNC_1, 0x030c, RK_GENMASK_VAL(8, 8, 1)), /* UART1 IO mux selection M1 */
+ MR_TOPGRF(RK_GPIO3, RK_PD6, RK_FUNC_4, 0x030c, RK_GENMASK_VAL(8, 8, 1)), /* UART1 IO mux selection M1 */
MR_TOPGRF(RK_GPIO0, RK_PD1, RK_FUNC_1, 0x030c, RK_GENMASK_VAL(10, 10, 0)), /* UART2 IO mux selection M0 */
MR_TOPGRF(RK_GPIO1, RK_PD5, RK_FUNC_2, 0x030c, RK_GENMASK_VAL(10, 10, 1)), /* UART2 IO mux selection M1 */
MR_TOPGRF(RK_GPIO1, RK_PA1, RK_FUNC_2, 0x030c, RK_GENMASK_VAL(12, 12, 0)), /* UART3 IO mux selection M0 */
@@ -81,7 +79,7 @@ static struct rockchip_mux_route_data rk3568_mux_route_data[] = {
MR_TOPGRF(RK_GPIO1, RK_PD5, RK_FUNC_3, 0x0310, RK_GENMASK_VAL(2, 2, 1)), /* UART6 IO mux selection M1 */
MR_TOPGRF(RK_GPIO2, RK_PA6, RK_FUNC_3, 0x0310, RK_GENMASK_VAL(5, 4, 0)), /* UART7 IO mux selection M0 */
MR_TOPGRF(RK_GPIO3, RK_PC4, RK_FUNC_4, 0x0310, RK_GENMASK_VAL(5, 4, 1)), /* UART7 IO mux selection M1 */
- MR_TOPGRF(RK_GPIO3, RK_PD2, RK_FUNC_1, 0x0310, RK_GENMASK_VAL(5, 4, 2)), /* UART7 IO mux selection M2 */
+ MR_TOPGRF(RK_GPIO4, RK_PA2, RK_FUNC_4, 0x0310, RK_GENMASK_VAL(5, 4, 2)), /* UART7 IO mux selection M2 */
MR_TOPGRF(RK_GPIO2, RK_PC5, RK_FUNC_3, 0x0310, RK_GENMASK_VAL(6, 6, 0)), /* UART8 IO mux selection M0 */
MR_TOPGRF(RK_GPIO2, RK_PD7, RK_FUNC_4, 0x0310, RK_GENMASK_VAL(6, 6, 1)), /* UART8 IO mux selection M1 */
MR_TOPGRF(RK_GPIO2, RK_PB0, RK_FUNC_3, 0x0310, RK_GENMASK_VAL(9, 8, 0)), /* UART9 IO mux selection M0 */
@@ -94,8 +92,11 @@ static struct rockchip_mux_route_data rk3568_mux_route_data[] = {
MR_TOPGRF(RK_GPIO4, RK_PB6, RK_FUNC_5, 0x0310, RK_GENMASK_VAL(12, 12, 1)), /* I2S2 IO mux selection M1 */
MR_TOPGRF(RK_GPIO3, RK_PA2, RK_FUNC_4, 0x0310, RK_GENMASK_VAL(14, 14, 0)), /* I2S3 IO mux selection M0 */
MR_TOPGRF(RK_GPIO4, RK_PC2, RK_FUNC_5, 0x0310, RK_GENMASK_VAL(14, 14, 1)), /* I2S3 IO mux selection M1 */
- MR_TOPGRF(RK_GPIO1, RK_PA6, RK_FUNC_3, 0x0314, RK_GENMASK_VAL(0, 0, 0)), /* PDM IO mux selection M0 */
- MR_TOPGRF(RK_GPIO3, RK_PD6, RK_FUNC_5, 0x0314, RK_GENMASK_VAL(0, 0, 1)), /* PDM IO mux selection M1 */
+ MR_TOPGRF(RK_GPIO1, RK_PA4, RK_FUNC_3, 0x0314, RK_GENMASK_VAL(1, 0, 0)), /* PDM IO mux selection M0 */
+ MR_TOPGRF(RK_GPIO1, RK_PA6, RK_FUNC_3, 0x0314, RK_GENMASK_VAL(1, 0, 0)), /* PDM IO mux selection M0 */
+ MR_TOPGRF(RK_GPIO3, RK_PD6, RK_FUNC_5, 0x0314, RK_GENMASK_VAL(1, 0, 1)), /* PDM IO mux selection M1 */
+ MR_TOPGRF(RK_GPIO4, RK_PA0, RK_FUNC_4, 0x0314, RK_GENMASK_VAL(1, 0, 1)), /* PDM IO mux selection M1 */
+ MR_TOPGRF(RK_GPIO3, RK_PC4, RK_FUNC_5, 0x0314, RK_GENMASK_VAL(1, 0, 2)), /* PDM IO mux selection M2 */
MR_TOPGRF(RK_GPIO0, RK_PA5, RK_FUNC_3, 0x0314, RK_GENMASK_VAL(3, 2, 0)), /* PCIE20 IO mux selection M0 */
MR_TOPGRF(RK_GPIO2, RK_PD0, RK_FUNC_4, 0x0314, RK_GENMASK_VAL(3, 2, 1)), /* PCIE20 IO mux selection M1 */
MR_TOPGRF(RK_GPIO1, RK_PB0, RK_FUNC_4, 0x0314, RK_GENMASK_VAL(3, 2, 2)), /* PCIE20 IO mux selection M2 */
@@ -237,6 +238,15 @@ static int rk3568_set_pull(struct rockchip_pin_bank *bank,
return ret;
}
+ /*
+ * In the TRM, pull-up being 1 for everything except the GPIO0_D3-D6,
+ * where that pull up value becomes 3.
+ */
+ if (bank->bank_num == 0 && pin_num >= 27 && pin_num <= 30) {
+ if (ret == 1)
+ ret = 3;
+ }
+
/* enable the write to the equivalent lower bits */
data = ((1 << ROCKCHIP_PULL_BITS_PER_PIN) - 1) << (bit + 16);

View file

@ -1,27 +0,0 @@
From 2114d68b3c755ec8043ae9e43ac8e9753e0cec84 Mon Sep 17 00:00:00 2001
From: Marty Jones <mj8263788@gmail.com>
Date: Sun, 17 Jan 2021 15:26:09 -0500
Subject: [PATCH] rockpro64: disable CONFIG_USE_PREBOOT
On commit https://github.com/u-boot/u-boot/commit/f81f9f0ebac596bae7f27db095f4f0272b606cc3
CONFIG_USE_PREBOOT was enabled on the RockPro64.
When the board is booting, U-Boot hangs as soon as it disables the USB
controller. This is a workaround until a final solution is deployed
upstream.
Signed-off-by: Marty Jones <mj8263788@gmail.com>
---
configs/rockpro64-rk3399_defconfig | 1 -
1 file changed, 1 deletion(-)
--- a/configs/rockpro64-rk3399_defconfig
+++ b/configs/rockpro64-rk3399_defconfig
@@ -21,7 +21,6 @@ CONFIG_SPL_SPI_FLASH_SUPPORT=y
CONFIG_DEBUG_UART=y
CONFIG_BOOTSTAGE=y
CONFIG_BOOTSTAGE_REPORT=y
-CONFIG_USE_PREBOOT=y
CONFIG_DEFAULT_FDT_FILE="rockchip/rk3399-rockpro64.dtb"
CONFIG_DISPLAY_BOARDINFO_LATE=y
CONFIG_MISC_INIT_R=y

View file

@ -1,43 +0,0 @@
From c13b8e588bd2da6381a6d337df51acb2a61f03b8 Mon Sep 17 00:00:00 2001
From: Jonas Karlman <jonas@kwiboo.se>
Date: Tue, 21 Mar 2023 21:43:07 +0000
Subject: [PATCH] rockchip: rk35xx: Fix boot with a large fdt blob
The TF-A blobs used to boot RK3568 and RK3588 boards is based on atf
v2.3. Mainline atf v2.3 contains an issue that could lead to a crash
when it fails to parse the fdt blob being passed as the platform param.
An issue that was fixed in atf v2.4.
The vendor TF-A seem to suffer from a similar issue, and this prevents
booting when fdt blob is large enough to trigger this condition.
Fix this by implying SPL_ATF_NO_PLATFORM_PARAM to let u-boot pass a
NULL pointer instead of the fdt blob as the platform param.
This fixes booting Radxa ROCK 3A after recent sync of device tree.
Fixes: 073d911ae64a ("rockchip: rk3568-rock-3a: Sync device tree from linux")
Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
Link: https://patchwork.ozlabs.org/project/uboot/patch/20230321214301.2590326-4-jonas@kwiboo.se/
---
arch/arm/mach-rockchip/Kconfig | 2 ++
1 file changed, 2 insertions(+)
--- a/arch/arm/mach-rockchip/Kconfig
+++ b/arch/arm/mach-rockchip/Kconfig
@@ -288,6 +288,7 @@ config ROCKCHIP_RK3568
select BOARD_LATE_INIT
select DM_REGULATOR_FIXED
select DM_RESET
+ imply SPL_ATF_NO_PLATFORM_PARAM if SPL_ATF
imply ROCKCHIP_COMMON_BOARD
imply ROCKCHIP_OTP
imply MISC_INIT_R
@@ -309,6 +310,7 @@ config ROCKCHIP_RK3588
select REGMAP
select SYSCON
select BOARD_LATE_INIT
+ imply SPL_ATF_NO_PLATFORM_PARAM if SPL_ATF
imply ROCKCHIP_COMMON_BOARD
imply ROCKCHIP_OTP
imply MISC_INIT_R

View file

@ -1,740 +0,0 @@
--- a/arch/arm/dts/Makefile
+++ b/arch/arm/dts/Makefile
@@ -124,6 +124,7 @@ dtb-$(CONFIG_ROCKCHIP_RK3399) += \
rk3399-ficus.dtb \
rk3399-firefly.dtb \
rk3399-gru-bob.dtb \
+ rk3399-guangmiao-g4c.dtb \
rk3399-gru-kevin.dtb \
rk3399-khadas-edge.dtb \
rk3399-khadas-edge-captain.dtb \
--- /dev/null
+++ b/configs/guangmiao-g4c-rk3399_defconfig
@@ -0,0 +1,57 @@
+CONFIG_ARM=y
+CONFIG_ARCH_ROCKCHIP=y
+CONFIG_TEXT_BASE=0x00200000
+CONFIG_ENV_OFFSET=0x3F8000
+CONFIG_ROCKCHIP_RK3399=y
+CONFIG_TARGET_EVB_RK3399=y
+CONFIG_NR_DRAM_BANKS=1
+CONFIG_SYS_LOAD_ADDR=0x800800
+CONFIG_DEBUG_UART_BASE=0xFF1A0000
+CONFIG_DEBUG_UART_CLOCK=24000000
+CONFIG_DEBUG_UART=y
+CONFIG_DEFAULT_FDT_FILE="rockchip/rk3399-guangmiao-g4c.dtb"
+CONFIG_DISPLAY_BOARDINFO_LATE=y
+CONFIG_SPL_STACK_R=y
+CONFIG_SPL_STACK_R_MALLOC_SIMPLE_LEN=0x10000
+CONFIG_TPL=y
+CONFIG_CMD_BOOTZ=y
+CONFIG_CMD_GPT=y
+CONFIG_CMD_MMC=y
+CONFIG_CMD_USB=y
+# CONFIG_CMD_SETEXPR is not set
+CONFIG_CMD_TIME=y
+CONFIG_SPL_OF_CONTROL=y
+CONFIG_DEFAULT_DEVICE_TREE="rk3399-guangmiao-g4c"
+CONFIG_OF_SPL_REMOVE_PROPS="pinctrl-0 pinctrl-names clock-names interrupt-parent assigned-clocks assigned-clock-rates assigned-clock-parents"
+CONFIG_ENV_IS_IN_MMC=y
+CONFIG_SYS_RELOC_GD_ENV_ADDR=y
+CONFIG_ROCKCHIP_GPIO=y
+CONFIG_SYS_I2C_ROCKCHIP=y
+CONFIG_MMC_DW=y
+CONFIG_MMC_DW_ROCKCHIP=y
+CONFIG_MMC_SDHCI=y
+CONFIG_MMC_SDHCI_ROCKCHIP=y
+CONFIG_DM_ETH=y
+CONFIG_ETH_DESIGNWARE=y
+CONFIG_GMAC_ROCKCHIP=y
+CONFIG_PMIC_RK8XX=y
+CONFIG_REGULATOR_PWM=y
+CONFIG_REGULATOR_RK8XX=y
+CONFIG_PWM_ROCKCHIP=y
+CONFIG_RAM_RK3399_LPDDR4=y
+CONFIG_BAUDRATE=1500000
+CONFIG_DEBUG_UART_SHIFT=2
+CONFIG_SYSRESET=y
+CONFIG_USB=y
+CONFIG_USB_XHCI_HCD=y
+CONFIG_USB_XHCI_DWC3=y
+CONFIG_USB_EHCI_HCD=y
+CONFIG_USB_EHCI_GENERIC=y
+CONFIG_USB_HOST_ETHER=y
+CONFIG_USB_ETHER_ASIX=y
+CONFIG_USB_ETHER_ASIX88179=y
+CONFIG_USB_ETHER_MCS7830=y
+CONFIG_USB_ETHER_RTL8152=y
+CONFIG_USB_ETHER_SMSC95XX=y
+CONFIG_SPL_TINY_MEMSET=y
+CONFIG_ERRNO_STR=y
--- /dev/null
+++ b/arch/arm/dts/rk3399-guangmiao-g4c-u-boot.dtsi
@@ -0,0 +1,18 @@
+// SPDX-License-Identifier: GPL-2.0+
+
+#include "rk3399-u-boot.dtsi"
+#include "rk3399-sdram-lpddr4-100.dtsi"
+
+/ {
+ chosen {
+ u-boot,spl-boot-order = "same-as-spl", &sdhci, &sdmmc;
+ };
+};
+
+&sdmmc {
+ pinctrl-0 = <&sdmmc_bus4 &sdmmc_clk &sdmmc_cmd &sdmmc_cd>;
+};
+
+&vdd_log {
+ regulator-init-microvolt = <950000>;
+};
--- /dev/null
+++ b/arch/arm/dts/rk3399-guangmiao-g4c.dts
@@ -0,0 +1,646 @@
+// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
+
+/dts-v1/;
+#include <dt-bindings/input/linux-event-codes.h>
+#include "rk3399.dtsi"
+#include "rk3399-opp.dtsi"
+
+/ {
+ model = "SHAREVDI GuangMiao G4C";
+ compatible = "sharevdi,guangmiao-g4c", "rockchip,rk3399";
+
+ /delete-node/ display-subsystem;
+
+ chosen {
+ stdout-path = "serial2:1500000n8";
+ };
+
+ clkin_gmac: external-gmac-clock {
+ compatible = "fixed-clock";
+ clock-frequency = <125000000>;
+ clock-output-names = "clkin_gmac";
+ #clock-cells = <0>;
+ };
+
+ vcc_sys: vcc-sys {
+ compatible = "regulator-fixed";
+ regulator-always-on;
+ regulator-boot-on;
+ regulator-min-microvolt = <5000000>;
+ regulator-max-microvolt = <5000000>;
+ regulator-name = "vcc_sys";
+ };
+
+ vcc3v3_sys: vcc3v3-sys {
+ compatible = "regulator-fixed";
+ regulator-always-on;
+ regulator-boot-on;
+ regulator-min-microvolt = <3300000>;
+ regulator-max-microvolt = <3300000>;
+ regulator-name = "vcc3v3_sys";
+ vin-supply = <&vcc_sys>;
+ };
+
+ vcc_0v9: vcc-0v9 {
+ compatible = "regulator-fixed";
+ regulator-always-on;
+ regulator-boot-on;
+ regulator-min-microvolt = <900000>;
+ regulator-max-microvolt = <900000>;
+ regulator-name = "vcc_0v9";
+ vin-supply = <&vcc3v3_sys>;
+ };
+
+ vcc5v0_host0: vcc5v0-host0 {
+ compatible = "regulator-fixed";
+ regulator-always-on;
+ regulator-boot-on;
+ regulator-name = "vcc5v0_host0";
+ vin-supply = <&vcc_sys>;
+ };
+
+ vdd_log: vdd-log {
+ compatible = "pwm-regulator";
+ pwms = <&pwm2 0 25000 1>;
+ regulator-always-on;
+ regulator-boot-on;
+ regulator-min-microvolt = <800000>;
+ regulator-max-microvolt = <1400000>;
+ regulator-name = "vdd_log";
+ vin-supply = <&vcc_sys>;
+ };
+
+ gpio-keys {
+ compatible = "gpio-keys";
+ autorepeat;
+ pinctrl-names = "default";
+ pinctrl-0 = <&reset_button_pin>;
+
+ reset {
+ debounce-interval = <100>;
+ gpios = <&gpio0 RK_PA5 GPIO_ACTIVE_LOW>;
+ label = "reset";
+ linux,code = <KEY_RESTART>;
+ wakeup-source;
+ };
+ };
+
+ gpio-leds {
+ compatible = "gpio-leds";
+ pinctrl-names = "default";
+ pinctrl-0 = <&lan_led_pin>, <&status_led_pin>, <&wan_led_pin>;
+
+ lan_led: led-lan {
+ gpios = <&gpio0 RK_PA3 GPIO_ACTIVE_HIGH>;
+ label = "green:lan";
+ };
+
+ status_led: led-status {
+ gpios = <&gpio0 RK_PB3 GPIO_ACTIVE_HIGH>;
+ label = "green:status";
+ };
+
+ wan_led: led-wan {
+ gpios = <&gpio0 RK_PB2 GPIO_ACTIVE_HIGH>;
+ label = "green:wan";
+ };
+ };
+};
+
+&cpu_b0 {
+ cpu-supply = <&vdd_cpu_b>;
+};
+
+&cpu_b1 {
+ cpu-supply = <&vdd_cpu_b>;
+};
+
+&cpu_l0 {
+ cpu-supply = <&vdd_cpu_l>;
+};
+
+&cpu_l1 {
+ cpu-supply = <&vdd_cpu_l>;
+};
+
+&cpu_l2 {
+ cpu-supply = <&vdd_cpu_l>;
+};
+
+&cpu_l3 {
+ cpu-supply = <&vdd_cpu_l>;
+};
+
+&emmc_phy {
+ status = "okay";
+};
+
+&gmac {
+ assigned-clock-parents = <&clkin_gmac>;
+ assigned-clocks = <&cru SCLK_RMII_SRC>;
+ clock_in_out = "input";
+ pinctrl-names = "default";
+ pinctrl-0 = <&rgmii_pins>, <&phy_intb>, <&phy_pmeb>, <&phy_rstb>;
+ phy-handle = <&rtl8211e>;
+ phy-mode = "rgmii";
+ phy-supply = <&vcc3v3_s3>;
+ tx_delay = <0x28>;
+ rx_delay = <0x11>;
+ status = "okay";
+
+ mdio {
+ compatible = "snps,dwmac-mdio";
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ rtl8211e: ethernet-phy@1 {
+ reg = <1>;
+ interrupt-parent = <&gpio3>;
+ interrupts = <RK_PB2 IRQ_TYPE_LEVEL_LOW>;
+ reset-assert-us = <10000>;
+ reset-deassert-us = <30000>;
+ reset-gpios = <&gpio3 RK_PB7 GPIO_ACTIVE_LOW>;
+ };
+ };
+};
+
+&gpu {
+ mali-supply = <&vdd_gpu>;
+ status = "okay";
+};
+
+&i2c0 {
+ clock-frequency = <400000>;
+ i2c-scl-rising-time-ns = <160>;
+ i2c-scl-falling-time-ns = <30>;
+ status = "okay";
+
+ vdd_cpu_b: regulator@40 {
+ compatible = "silergy,syr827";
+ reg = <0x40>;
+ fcs,suspend-voltage-selector = <1>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&cpu_b_sleep>;
+ regulator-always-on;
+ regulator-boot-on;
+ regulator-min-microvolt = <712500>;
+ regulator-max-microvolt = <1500000>;
+ regulator-name = "vdd_cpu_b";
+ regulator-ramp-delay = <1000>;
+ vin-supply = <&vcc_sys>;
+
+ regulator-state-mem {
+ regulator-off-in-suspend;
+ };
+ };
+
+ vdd_gpu: regulator@41 {
+ compatible = "silergy,syr828";
+ reg = <0x41>;
+ fcs,suspend-voltage-selector = <1>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&gpu_sleep>;
+ regulator-always-on;
+ regulator-boot-on;
+ regulator-min-microvolt = <712500>;
+ regulator-max-microvolt = <1500000>;
+ regulator-name = "vdd_gpu";
+ regulator-ramp-delay = <1000>;
+ vin-supply = <&vcc_sys>;
+
+ regulator-state-mem {
+ regulator-off-in-suspend;
+ };
+ };
+
+ rk808: pmic@1b {
+ compatible = "rockchip,rk808";
+ reg = <0x1b>;
+ clock-output-names = "rtc_clko_soc", "rtc_clko_wifi";
+ #clock-cells = <1>;
+ interrupt-parent = <&gpio1>;
+ interrupts = <21 IRQ_TYPE_LEVEL_LOW>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&pmic_int_l>;
+ rockchip,system-power-controller;
+ wakeup-source;
+
+ vcc1-supply = <&vcc_sys>;
+ vcc2-supply = <&vcc_sys>;
+ vcc3-supply = <&vcc_sys>;
+ vcc4-supply = <&vcc_sys>;
+ vcc6-supply = <&vcc_sys>;
+ vcc7-supply = <&vcc_sys>;
+ vcc8-supply = <&vcc_3v0>;
+ vcc9-supply = <&vcc_sys>;
+ vcc10-supply = <&vcc_sys>;
+ vcc11-supply = <&vcc_sys>;
+ vcc12-supply = <&vcc_sys>;
+ vddio-supply = <&vcc_3v0>;
+
+ regulators {
+ vdd_center: DCDC_REG1 {
+ regulator-always-on;
+ regulator-boot-on;
+ regulator-min-microvolt = <750000>;
+ regulator-max-microvolt = <1350000>;
+ regulator-name = "vdd_center";
+ regulator-ramp-delay = <6001>;
+
+ regulator-state-mem {
+ regulator-off-in-suspend;
+ };
+ };
+
+ vdd_cpu_l: DCDC_REG2 {
+ regulator-always-on;
+ regulator-boot-on;
+ regulator-min-microvolt = <750000>;
+ regulator-max-microvolt = <1350000>;
+ regulator-name = "vdd_cpu_l";
+ regulator-ramp-delay = <6001>;
+
+ regulator-state-mem {
+ regulator-off-in-suspend;
+ };
+ };
+
+ vcc_ddr: DCDC_REG3 {
+ regulator-always-on;
+ regulator-boot-on;
+ regulator-name = "vcc_ddr";
+
+ regulator-state-mem {
+ regulator-on-in-suspend;
+ };
+ };
+
+ vcc_1v8: DCDC_REG4 {
+ regulator-always-on;
+ regulator-boot-on;
+ regulator-min-microvolt = <1800000>;
+ regulator-max-microvolt = <1800000>;
+ regulator-name = "vcc_1v8";
+
+ regulator-state-mem {
+ regulator-on-in-suspend;
+ regulator-suspend-microvolt = <1800000>;
+ };
+ };
+
+ vcc_vldo1: LDO_REG1 {
+ regulator-always-on;
+ regulator-boot-on;
+ regulator-min-microvolt = <1800000>;
+ regulator-max-microvolt = <1800000>;
+ regulator-name = "vcc_vldo1";
+
+ regulator-state-mem {
+ regulator-off-in-suspend;
+ };
+ };
+
+ vcc_vldo2: LDO_REG2 {
+ regulator-always-on;
+ regulator-boot-on;
+ regulator-min-microvolt = <1800000>;
+ regulator-max-microvolt = <1800000>;
+ regulator-name = "vcc_vldo2";
+
+ regulator-state-mem {
+ regulator-off-in-suspend;
+ };
+ };
+
+ vcca_1v8: LDO_REG3 {
+ regulator-always-on;
+ regulator-boot-on;
+ regulator-min-microvolt = <1800000>;
+ regulator-max-microvolt = <1800000>;
+ regulator-name = "vcca_1v8";
+
+ regulator-state-mem {
+ regulator-on-in-suspend;
+ regulator-suspend-microvolt = <1800000>;
+ };
+ };
+
+ vcc_sdio: LDO_REG4 {
+ regulator-always-on;
+ regulator-boot-on;
+ regulator-min-microvolt = <1800000>;
+ regulator-max-microvolt = <3300000>;
+ regulator-name = "vcc_sdio";
+
+ regulator-state-mem {
+ regulator-on-in-suspend;
+ regulator-suspend-microvolt = <3300000>;
+ };
+ };
+
+ vcc3v0_sd: LDO_REG5 {
+ regulator-always-on;
+ regulator-boot-on;
+ regulator-min-microvolt = <3000000>;
+ regulator-max-microvolt = <3000000>;
+ regulator-name = "vcc3v0_sd";
+
+ regulator-state-mem {
+ regulator-on-in-suspend;
+ regulator-suspend-microvolt = <3000000>;
+ };
+ };
+
+ vcc_1v5: LDO_REG6 {
+ regulator-always-on;
+ regulator-boot-on;
+ regulator-min-microvolt = <1500000>;
+ regulator-max-microvolt = <1500000>;
+ regulator-name = "vcc_1v5";
+
+ regulator-state-mem {
+ regulator-on-in-suspend;
+ regulator-suspend-microvolt = <1500000>;
+ };
+ };
+
+ vcca1v8_codec: LDO_REG7 {
+ regulator-always-on;
+ regulator-boot-on;
+ regulator-min-microvolt = <1800000>;
+ regulator-max-microvolt = <1800000>;
+ regulator-name = "vcca1v8_codec";
+
+ regulator-state-mem {
+ regulator-off-in-suspend;
+ };
+ };
+
+ vcc_3v0: LDO_REG8 {
+ regulator-always-on;
+ regulator-boot-on;
+ regulator-min-microvolt = <3000000>;
+ regulator-max-microvolt = <3000000>;
+ regulator-name = "vcc_3v0";
+
+ regulator-state-mem {
+ regulator-on-in-suspend;
+ regulator-suspend-microvolt = <3000000>;
+ };
+ };
+
+ vcc3v3_s3: SWITCH_REG1 {
+ regulator-always-on;
+ regulator-boot-on;
+ regulator-name = "vcc3v3_s3";
+
+ regulator-state-mem {
+ regulator-off-in-suspend;
+ };
+ };
+
+ vcc3v3_s0: SWITCH_REG2 {
+ regulator-always-on;
+ regulator-boot-on;
+ regulator-name = "vcc3v3_s0";
+
+ regulator-state-mem {
+ regulator-off-in-suspend;
+ };
+ };
+ };
+ };
+};
+
+&i2c3 {
+ i2c-scl-rising-time-ns = <450>;
+ i2c-scl-falling-time-ns = <15>;
+ status = "okay";
+};
+
+&io_domains {
+ bt656-supply = <&vcc_1v8>;
+ audio-supply = <&vcca1v8_codec>;
+ sdmmc-supply = <&vcc_sdio>;
+ gpio1830-supply = <&vcc_3v0>;
+ status = "okay";
+};
+
+&pcie_phy {
+ assigned-clock-parents = <&cru SCLK_PCIEPHY_REF100M>;
+ assigned-clock-rates = <100000000>;
+ assigned-clocks = <&cru SCLK_PCIEPHY_REF>;
+ status = "okay";
+};
+
+&pcie0 {
+ ep-gpios = <&gpio4 RK_PD2 GPIO_ACTIVE_HIGH>;
+ max-link-speed = <1>;
+ num-lanes = <1>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&pcie_clkreqnb_cpm>;
+ vpcie0v9-supply = <&vcc_0v9>;
+ vpcie1v8-supply = <&vcca_1v8>;
+ vpcie3v3-supply = <&vcc3v3_sys>;
+ status = "okay";
+};
+
+&pinctrl {
+ gpio-leds {
+ lan_led_pin: lan-led-pin {
+ rockchip,pins = <0 RK_PA3 RK_FUNC_GPIO &pcfg_pull_none>;
+ };
+
+ status_led_pin: status-led-pin {
+ rockchip,pins = <0 RK_PB3 RK_FUNC_GPIO &pcfg_pull_none>;
+ };
+
+ wan_led_pin: wan-led-pin {
+ rockchip,pins = <0 RK_PB2 RK_FUNC_GPIO &pcfg_pull_none>;
+ };
+ };
+
+ gmac {
+ phy_intb: phy-intb {
+ rockchip,pins = <3 RK_PB2 RK_FUNC_GPIO &pcfg_pull_up>;
+ };
+
+ phy_pmeb: phy-pmeb {
+ rockchip,pins = <0 RK_PA1 RK_FUNC_GPIO &pcfg_pull_up>;
+ };
+
+ phy_rstb: phy-rstb {
+ rockchip,pins = <3 RK_PB7 RK_FUNC_GPIO &pcfg_pull_none>;
+ };
+ };
+
+ pmic {
+ cpu_b_sleep: cpu-b-sleep {
+ rockchip,pins = <1 RK_PC2 RK_FUNC_GPIO &pcfg_pull_down>;
+ };
+
+ gpu_sleep: gpu-sleep {
+ rockchip,pins = <1 RK_PB6 RK_FUNC_GPIO &pcfg_pull_down>;
+ };
+
+ pmic_int_l: pmic-int-l {
+ rockchip,pins = <1 RK_PC5 RK_FUNC_GPIO &pcfg_pull_up>;
+ };
+ };
+
+ rockchip-key {
+ reset_button_pin: reset-button-pin {
+ rockchip,pins = <0 RK_PA5 RK_FUNC_GPIO &pcfg_pull_up>;
+ };
+ };
+
+ sdio {
+ bt_reg_on_h: bt-reg-on-h {
+ /* external pullup to VCC1V8_PMUPLL */
+ rockchip,pins = <0 RK_PB1 RK_FUNC_GPIO &pcfg_pull_none>;
+ };
+ };
+
+ sdmmc {
+ sdmmc0_det_l: sdmmc0-det-l {
+ rockchip,pins = <0 RK_PA7 RK_FUNC_GPIO &pcfg_pull_up>;
+ };
+ };
+};
+
+&pmu_io_domains {
+ pmu1830-supply = <&vcc_3v0>;
+ status = "okay";
+};
+
+&pwm0 {
+ status = "okay";
+};
+
+&pwm1 {
+ status = "okay";
+};
+
+&pwm2 {
+ pinctrl-names = "active";
+ pinctrl-0 = <&pwm2_pin_pull_down>;
+ status = "okay";
+};
+
+&saradc {
+ vref-supply = <&vcc_1v8>;
+ status = "okay";
+};
+
+&sdhci {
+ bus-width = <8>;
+ mmc-hs200-1_8v;
+ non-removable;
+ status = "okay";
+};
+
+&sdmmc {
+ bus-width = <4>;
+ cap-mmc-highspeed;
+ cap-sd-highspeed;
+ cd-gpios = <&gpio0 RK_PA7 GPIO_ACTIVE_LOW>;
+ disable-wp;
+ pinctrl-names = "default";
+ pinctrl-0 = <&sdmmc_bus4 &sdmmc_clk &sdmmc_cmd &sdmmc0_det_l>;
+ vqmmc-supply = <&vcc_sdio>;
+ status = "okay";
+};
+
+&tcphy0 {
+ status = "okay";
+};
+
+&tcphy1 {
+ status = "okay";
+};
+
+&tsadc {
+ rockchip,hw-tshut-mode = <1>;
+ rockchip,hw-tshut-polarity = <1>;
+ status = "okay";
+};
+
+&u2phy0 {
+ status = "okay";
+};
+
+&u2phy0_host {
+ phy-supply = <&vcc5v0_host0>;
+ status = "okay";
+};
+
+&u2phy0_otg {
+ status = "okay";
+};
+
+&u2phy1 {
+ status = "okay";
+};
+
+&u2phy1_host {
+ phy-supply = <&vcc5v0_host0>;
+ status = "okay";
+};
+
+&u2phy1_otg {
+ status = "okay";
+};
+
+&uart2 {
+ status = "okay";
+};
+
+&usbdrd3_0 {
+ status = "okay";
+};
+
+&usbdrd3_1 {
+ status = "okay";
+};
+
+&usbdrd_dwc3_0 {
+ dr_mode = "host";
+ status = "okay";
+};
+
+&usbdrd_dwc3_1 {
+ dr_mode = "host";
+ status = "okay";
+};
+
+&usb_host0_ehci {
+ status = "okay";
+};
+
+&usb_host0_ohci {
+ status = "okay";
+};
+
+&usb_host1_ehci {
+ status = "okay";
+};
+
+&usb_host1_ohci {
+ status = "okay";
+};
+
+&vopb {
+ status = "okay";
+};
+
+&vopb_mmu {
+ status = "okay";
+};
+
+&vopl {
+ status = "okay";
+};
+
+&vopl_mmu {
+ status = "okay";
+};

View file

@ -1,157 +0,0 @@
--- a/arch/arm/dts/Makefile
+++ b/arch/arm/dts/Makefile
@@ -109,6 +109,7 @@ dtb-$(CONFIG_ROCKCHIP_RK3308) += \
dtb-$(CONFIG_ROCKCHIP_RK3328) += \
rk3328-evb.dtb \
rk3328-nanopi-r2s.dtb \
+ rk3328-orangepi-r1-plus.dtb \
rk3328-roc-cc.dtb \
rk3328-rock64.dtb \
rk3328-rock-pi-e.dtb
--- /dev/null
+++ b/arch/arm/dts/rk3328-orangepi-r1-plus-u-boot.dtsi
@@ -0,0 +1,1 @@
+#include "rk3328-nanopi-r2s-u-boot.dtsi"
--- /dev/null
+++ b/arch/arm/dts/rk3328-orangepi-r1-plus.dts
@@ -0,0 +1,25 @@
+// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
+#include "rk3328-nanopi-r2s.dts"
+
+/ {
+ model = "Xunlong Orange Pi R1 Plus";
+ compatible = "xunlong,orangepi-r1-plus", "rockchip,rk3328";
+};
+
+&spi0 {
+ status = "okay";
+
+ flash@0 {
+ compatible = "jedec,spi-nor";
+ reg = <0>;
+ spi-max-frequency = <50000000>;
+ };
+};
+
+&sys_led {
+ gpios = <&gpio3 RK_PC5 GPIO_ACTIVE_HIGH>;
+};
+
+&sys_led_pin {
+ rockchip,pins = <3 RK_PC5 RK_FUNC_GPIO &pcfg_pull_none>;
+};
--- /dev/null
+++ b/configs/orangepi-r1-plus-rk3328_defconfig
@@ -0,0 +1,112 @@
+CONFIG_ARM=y
+CONFIG_SKIP_LOWLEVEL_INIT=y
+CONFIG_COUNTER_FREQUENCY=24000000
+CONFIG_ARCH_ROCKCHIP=y
+CONFIG_TEXT_BASE=0x00200000
+CONFIG_SPL_GPIO=y
+CONFIG_NR_DRAM_BANKS=1
+CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y
+CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x300000
+CONFIG_ENV_OFFSET=0x3F8000
+CONFIG_DEFAULT_DEVICE_TREE="rk3328-orangepi-r1-plus"
+CONFIG_DM_RESET=y
+CONFIG_ROCKCHIP_RK3328=y
+CONFIG_TPL_ROCKCHIP_COMMON_BOARD=y
+CONFIG_TPL_LIBCOMMON_SUPPORT=y
+CONFIG_TPL_LIBGENERIC_SUPPORT=y
+CONFIG_SPL_DRIVERS_MISC=y
+CONFIG_SPL_STACK_R_ADDR=0x600000
+CONFIG_SPL_STACK=0x400000
+CONFIG_TPL_SYS_MALLOC_F_LEN=0x800
+CONFIG_DEBUG_UART_BASE=0xFF130000
+CONFIG_DEBUG_UART_CLOCK=24000000
+CONFIG_SYS_LOAD_ADDR=0x800800
+CONFIG_DEBUG_UART=y
+# CONFIG_ANDROID_BOOT_IMAGE is not set
+CONFIG_FIT=y
+CONFIG_FIT_VERBOSE=y
+CONFIG_SPL_LOAD_FIT=y
+CONFIG_DEFAULT_FDT_FILE="rockchip/rk3328-orangepi-r1-plus.dtb"
+# CONFIG_DISPLAY_CPUINFO is not set
+CONFIG_DISPLAY_BOARDINFO_LATE=y
+CONFIG_MISC_INIT_R=y
+CONFIG_SPL_MAX_SIZE=0x40000
+CONFIG_SPL_PAD_TO=0x7f8000
+CONFIG_SPL_HAS_BSS_LINKER_SECTION=y
+CONFIG_SPL_BSS_START_ADDR=0x2000000
+CONFIG_SPL_BSS_MAX_SIZE=0x2000
+# CONFIG_SPL_RAW_IMAGE_SUPPORT is not set
+# CONFIG_SPL_SHARES_INIT_SP_ADDR is not set
+CONFIG_SPL_STACK_R=y
+CONFIG_SPL_I2C=y
+CONFIG_SPL_POWER=y
+CONFIG_SPL_ATF=y
+CONFIG_SPL_ATF_NO_PLATFORM_PARAM=y
+CONFIG_TPL_SYS_MALLOC_SIMPLE=y
+CONFIG_CMD_BOOTZ=y
+CONFIG_CMD_GPT=y
+CONFIG_CMD_MMC=y
+CONFIG_CMD_USB=y
+# CONFIG_CMD_SETEXPR is not set
+CONFIG_CMD_TIME=y
+CONFIG_SPL_OF_CONTROL=y
+CONFIG_TPL_OF_CONTROL=y
+CONFIG_OF_SPL_REMOVE_PROPS="clock-names interrupt-parent assigned-clocks assigned-clock-rates assigned-clock-parents"
+CONFIG_TPL_OF_PLATDATA=y
+CONFIG_ENV_IS_IN_MMC=y
+CONFIG_SYS_RELOC_GD_ENV_ADDR=y
+CONFIG_SYS_MMC_ENV_DEV=1
+CONFIG_NET_RANDOM_ETHADDR=y
+CONFIG_TPL_DM=y
+CONFIG_REGMAP=y
+CONFIG_SPL_REGMAP=y
+CONFIG_TPL_REGMAP=y
+CONFIG_SYSCON=y
+CONFIG_SPL_SYSCON=y
+CONFIG_TPL_SYSCON=y
+CONFIG_CLK=y
+CONFIG_SPL_CLK=y
+CONFIG_FASTBOOT_BUF_ADDR=0x800800
+CONFIG_FASTBOOT_CMD_OEM_FORMAT=y
+CONFIG_ROCKCHIP_GPIO=y
+CONFIG_SYS_I2C_ROCKCHIP=y
+CONFIG_MMC_DW=y
+CONFIG_MMC_DW_ROCKCHIP=y
+CONFIG_SF_DEFAULT_SPEED=20000000
+CONFIG_ETH_DESIGNWARE=y
+CONFIG_GMAC_ROCKCHIP=y
+CONFIG_PINCTRL=y
+CONFIG_SPL_PINCTRL=y
+CONFIG_DM_PMIC=y
+CONFIG_PMIC_RK8XX=y
+CONFIG_SPL_PMIC_RK8XX=y
+CONFIG_SPL_DM_REGULATOR=y
+CONFIG_REGULATOR_PWM=y
+CONFIG_DM_REGULATOR_FIXED=y
+CONFIG_SPL_DM_REGULATOR_FIXED=y
+CONFIG_REGULATOR_RK8XX=y
+CONFIG_PWM_ROCKCHIP=y
+CONFIG_RAM=y
+CONFIG_SPL_RAM=y
+CONFIG_TPL_RAM=y
+CONFIG_BAUDRATE=1500000
+CONFIG_DEBUG_UART_SHIFT=2
+CONFIG_SYS_NS16550_MEM32=y
+CONFIG_SYSINFO=y
+CONFIG_SYSRESET=y
+# CONFIG_TPL_SYSRESET is not set
+CONFIG_USB=y
+CONFIG_USB_XHCI_HCD=y
+CONFIG_USB_XHCI_DWC3=y
+CONFIG_USB_EHCI_HCD=y
+CONFIG_USB_EHCI_GENERIC=y
+CONFIG_USB_OHCI_HCD=y
+CONFIG_USB_OHCI_GENERIC=y
+CONFIG_USB_DWC2=y
+CONFIG_USB_DWC3=y
+# CONFIG_USB_DWC3_GADGET is not set
+CONFIG_USB_GADGET=y
+CONFIG_USB_GADGET_DWC2_OTG=y
+CONFIG_SPL_TINY_MEMSET=y
+CONFIG_TPL_TINY_MEMSET=y
+CONFIG_ERRNO_STR=y

View file

@ -1,152 +0,0 @@
From 68836b81f7d6328a1a5a6cce5a00bf4010f742e5 Mon Sep 17 00:00:00 2001
From: baiywt <baiywt_gj@163.com>
Date: Wed, 24 Nov 2021 19:59:38 +0800
Subject: [PATCH] Add support for Orangepi R1 Plus LTS
---
arch/arm/dts/Makefile | 1 +
arch/arm/dts/rk3328-orangepi-r1-plus-lts.dts | 7 ++
configs/orangepi-r1-plus-lts-rk3328_defconfig | 98 +++++++++++++++++++
3 files changed, 106 insertions(+)
create mode 100644 arch/arm/dts/rk3328-orangepi-r1-plus-lts.dts
create mode 100644 configs/orangepi-r1-plus-lts-rk3328_defconfig
--- a/arch/arm/dts/Makefile
+++ b/arch/arm/dts/Makefile
@@ -110,6 +110,7 @@ dtb-$(CONFIG_ROCKCHIP_RK3328) += \
rk3328-evb.dtb \
rk3328-nanopi-r2s.dtb \
rk3328-orangepi-r1-plus.dtb \
+ rk3328-orangepi-r1-plus-lts.dtb \
rk3328-roc-cc.dtb \
rk3328-rock64.dtb \
rk3328-rock-pi-e.dtb
--- /dev/null
+++ b/arch/arm/dts/rk3328-orangepi-r1-plus-lts-u-boot.dtsi
@@ -0,0 +1,1 @@
+#include "rk3328-nanopi-r2s-u-boot.dtsi"
--- /dev/null
+++ b/arch/arm/dts/rk3328-orangepi-r1-plus-lts.dts
@@ -0,0 +1,7 @@
+// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
+#include "rk3328-orangepi-r1-plus.dts"
+
+/ {
+ model = "Xunlong Orange Pi R1 Plus LTS";
+ compatible = "xunlong,orangepi-r1-plus-lts", "rockchip,rk3328";
+};
--- /dev/null
+++ b/configs/orangepi-r1-plus-lts-rk3328_defconfig
@@ -0,0 +1,112 @@
+CONFIG_ARM=y
+CONFIG_SKIP_LOWLEVEL_INIT=y
+CONFIG_COUNTER_FREQUENCY=24000000
+CONFIG_ARCH_ROCKCHIP=y
+CONFIG_TEXT_BASE=0x00200000
+CONFIG_SPL_GPIO=y
+CONFIG_NR_DRAM_BANKS=1
+CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y
+CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x300000
+CONFIG_ENV_OFFSET=0x3F8000
+CONFIG_DEFAULT_DEVICE_TREE="rk3328-orangepi-r1-plus-lts"
+CONFIG_DM_RESET=y
+CONFIG_ROCKCHIP_RK3328=y
+CONFIG_TPL_ROCKCHIP_COMMON_BOARD=y
+CONFIG_TPL_LIBCOMMON_SUPPORT=y
+CONFIG_TPL_LIBGENERIC_SUPPORT=y
+CONFIG_SPL_DRIVERS_MISC=y
+CONFIG_SPL_STACK_R_ADDR=0x600000
+CONFIG_SPL_STACK=0x400000
+CONFIG_TPL_SYS_MALLOC_F_LEN=0x800
+CONFIG_DEBUG_UART_BASE=0xFF130000
+CONFIG_DEBUG_UART_CLOCK=24000000
+CONFIG_SYS_LOAD_ADDR=0x800800
+CONFIG_DEBUG_UART=y
+# CONFIG_ANDROID_BOOT_IMAGE is not set
+CONFIG_FIT=y
+CONFIG_FIT_VERBOSE=y
+CONFIG_SPL_LOAD_FIT=y
+CONFIG_DEFAULT_FDT_FILE="rockchip/rk3328-orangepi-r1-plus-lts.dtb"
+# CONFIG_DISPLAY_CPUINFO is not set
+CONFIG_DISPLAY_BOARDINFO_LATE=y
+CONFIG_MISC_INIT_R=y
+CONFIG_SPL_MAX_SIZE=0x40000
+CONFIG_SPL_PAD_TO=0x7f8000
+CONFIG_SPL_HAS_BSS_LINKER_SECTION=y
+CONFIG_SPL_BSS_START_ADDR=0x2000000
+CONFIG_SPL_BSS_MAX_SIZE=0x2000
+# CONFIG_SPL_RAW_IMAGE_SUPPORT is not set
+# CONFIG_SPL_SHARES_INIT_SP_ADDR is not set
+CONFIG_SPL_STACK_R=y
+CONFIG_SPL_I2C=y
+CONFIG_SPL_POWER=y
+CONFIG_SPL_ATF=y
+CONFIG_SPL_ATF_NO_PLATFORM_PARAM=y
+CONFIG_TPL_SYS_MALLOC_SIMPLE=y
+CONFIG_CMD_BOOTZ=y
+CONFIG_CMD_GPT=y
+CONFIG_CMD_MMC=y
+CONFIG_CMD_USB=y
+# CONFIG_CMD_SETEXPR is not set
+CONFIG_CMD_TIME=y
+CONFIG_SPL_OF_CONTROL=y
+CONFIG_TPL_OF_CONTROL=y
+CONFIG_OF_SPL_REMOVE_PROPS="clock-names interrupt-parent assigned-clocks assigned-clock-rates assigned-clock-parents"
+CONFIG_TPL_OF_PLATDATA=y
+CONFIG_ENV_IS_IN_MMC=y
+CONFIG_SYS_RELOC_GD_ENV_ADDR=y
+CONFIG_SYS_MMC_ENV_DEV=1
+CONFIG_NET_RANDOM_ETHADDR=y
+CONFIG_TPL_DM=y
+CONFIG_REGMAP=y
+CONFIG_SPL_REGMAP=y
+CONFIG_TPL_REGMAP=y
+CONFIG_SYSCON=y
+CONFIG_SPL_SYSCON=y
+CONFIG_TPL_SYSCON=y
+CONFIG_CLK=y
+CONFIG_SPL_CLK=y
+CONFIG_FASTBOOT_BUF_ADDR=0x800800
+CONFIG_FASTBOOT_CMD_OEM_FORMAT=y
+CONFIG_ROCKCHIP_GPIO=y
+CONFIG_SYS_I2C_ROCKCHIP=y
+CONFIG_MMC_DW=y
+CONFIG_MMC_DW_ROCKCHIP=y
+CONFIG_SF_DEFAULT_SPEED=20000000
+CONFIG_ETH_DESIGNWARE=y
+CONFIG_GMAC_ROCKCHIP=y
+CONFIG_PINCTRL=y
+CONFIG_SPL_PINCTRL=y
+CONFIG_DM_PMIC=y
+CONFIG_PMIC_RK8XX=y
+CONFIG_SPL_PMIC_RK8XX=y
+CONFIG_SPL_DM_REGULATOR=y
+CONFIG_REGULATOR_PWM=y
+CONFIG_DM_REGULATOR_FIXED=y
+CONFIG_SPL_DM_REGULATOR_FIXED=y
+CONFIG_REGULATOR_RK8XX=y
+CONFIG_PWM_ROCKCHIP=y
+CONFIG_RAM=y
+CONFIG_SPL_RAM=y
+CONFIG_TPL_RAM=y
+CONFIG_BAUDRATE=1500000
+CONFIG_DEBUG_UART_SHIFT=2
+CONFIG_SYS_NS16550_MEM32=y
+CONFIG_SYSINFO=y
+CONFIG_SYSRESET=y
+# CONFIG_TPL_SYSRESET is not set
+CONFIG_USB=y
+CONFIG_USB_XHCI_HCD=y
+CONFIG_USB_XHCI_DWC3=y
+CONFIG_USB_EHCI_HCD=y
+CONFIG_USB_EHCI_GENERIC=y
+CONFIG_USB_OHCI_HCD=y
+CONFIG_USB_OHCI_GENERIC=y
+CONFIG_USB_DWC2=y
+CONFIG_USB_DWC3=y
+# CONFIG_USB_DWC3_GADGET is not set
+CONFIG_USB_GADGET=y
+CONFIG_USB_GADGET_DWC2_OTG=y
+CONFIG_SPL_TINY_MEMSET=y
+CONFIG_TPL_TINY_MEMSET=y
+CONFIG_ERRNO_STR=y

View file

@ -1,196 +0,0 @@
diff --git a/arch/arm/dts/Makefile b/arch/arm/dts/Makefile
index d3e89ca3ba..d5f64ac432 100644
--- a/arch/arm/dts/Makefile
+++ b/arch/arm/dts/Makefile
@@ -108,6 +108,7 @@ dtb-$(CONFIG_ROCKCHIP_RK3308) += \
dtb-$(CONFIG_ROCKCHIP_RK3328) += \
rk3328-evb.dtb \
+ rk3328-nanopi-r2c.dtb \
rk3328-nanopi-r2s.dtb \
rk3328-orangepi-r1-plus.dtb \
rk3328-roc-cc.dtb \
diff --git a/arch/arm/dts/rk3328-nanopi-r2c-u-boot.dtsi b/arch/arm/dts/rk3328-nanopi-r2c-u-boot.dtsi
new file mode 100644
index 0000000000..c2e86d0f0e
--- /dev/null
+++ b/arch/arm/dts/rk3328-nanopi-r2c-u-boot.dtsi
@@ -0,0 +1,7 @@
+// SPDX-License-Identifier: GPL-2.0+
+/*
+ * (C) Copyright 2018-2019 Rockchip Electronics Co., Ltd
+ * (C) Copyright 2021 Tianling Shen
+ */
+
+#include "rk3328-nanopi-r2s-u-boot.dtsi"
diff --git a/arch/arm/dts/rk3328-nanopi-r2c.dts b/arch/arm/dts/rk3328-nanopi-r2c.dts
new file mode 100644
index 0000000000..adf91a0306
--- /dev/null
+++ b/arch/arm/dts/rk3328-nanopi-r2c.dts
@@ -0,0 +1,47 @@
+// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
+/*
+ * Copyright (c) 2021 FriendlyElec Computer Tech. Co., Ltd.
+ * (http://www.friendlyarm.com)
+ *
+ * Copyright (c) 2021 Tianling Shen <cnsztl@immortalwrt.org>
+ */
+
+/dts-v1/;
+
+#include "rk3328-nanopi-r2s.dts"
+
+/ {
+ model = "FriendlyElec NanoPi R2C";
+ compatible = "friendlyarm,nanopi-r2c", "rockchip,rk3328";
+};
+
+&gmac2io {
+ phy-handle = <&yt8521s>;
+
+ mdio {
+ /delete-node/ ethernet-phy@1;
+
+ yt8521s: ethernet-phy@3 {
+ compatible = "ethernet-phy-id0000.011a",
+ "ethernet-phy-ieee802.3-c22";
+ reg = <3>;
+ pinctrl-0 = <&eth_phy_reset_pin>;
+ pinctrl-names = "default";
+ reset-assert-us = <10000>;
+ reset-deassert-us = <50000>;
+ reset-gpios = <&gpio1 RK_PC2 GPIO_ACTIVE_LOW>;
+ };
+ };
+};
+
+&lan_led {
+ label = "nanopi-r2c:green:lan";
+};
+
+&sys_led {
+ label = "nanopi-r2c:red:sys";
+};
+
+&wan_led {
+ label = "nanopi-r2c:green:wan";
+};
diff --git a/configs/nanopi-r2c-rk3328_defconfig b/configs/nanopi-r2c-rk3328_defconfig
new file mode 100644
index 0000000000..7bc7a3274f
--- /dev/null
+++ b/configs/nanopi-r2c-rk3328_defconfig
@@ -0,0 +1,112 @@
+CONFIG_ARM=y
+CONFIG_SKIP_LOWLEVEL_INIT=y
+CONFIG_COUNTER_FREQUENCY=24000000
+CONFIG_ARCH_ROCKCHIP=y
+CONFIG_TEXT_BASE=0x00200000
+CONFIG_SPL_GPIO=y
+CONFIG_NR_DRAM_BANKS=1
+CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y
+CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x300000
+CONFIG_ENV_OFFSET=0x3F8000
+CONFIG_DEFAULT_DEVICE_TREE="rk3328-nanopi-r2c"
+CONFIG_DM_RESET=y
+CONFIG_ROCKCHIP_RK3328=y
+CONFIG_TPL_ROCKCHIP_COMMON_BOARD=y
+CONFIG_TPL_LIBCOMMON_SUPPORT=y
+CONFIG_TPL_LIBGENERIC_SUPPORT=y
+CONFIG_SPL_DRIVERS_MISC=y
+CONFIG_SPL_STACK_R_ADDR=0x600000
+CONFIG_SPL_STACK=0x400000
+CONFIG_TPL_SYS_MALLOC_F_LEN=0x800
+CONFIG_DEBUG_UART_BASE=0xFF130000
+CONFIG_DEBUG_UART_CLOCK=24000000
+CONFIG_SYS_LOAD_ADDR=0x800800
+CONFIG_DEBUG_UART=y
+# CONFIG_ANDROID_BOOT_IMAGE is not set
+CONFIG_FIT=y
+CONFIG_FIT_VERBOSE=y
+CONFIG_SPL_LOAD_FIT=y
+CONFIG_DEFAULT_FDT_FILE="rockchip/rk3328-nanopi-r2c.dtb"
+# CONFIG_DISPLAY_CPUINFO is not set
+CONFIG_DISPLAY_BOARDINFO_LATE=y
+CONFIG_MISC_INIT_R=y
+CONFIG_SPL_MAX_SIZE=0x40000
+CONFIG_SPL_PAD_TO=0x7f8000
+CONFIG_SPL_HAS_BSS_LINKER_SECTION=y
+CONFIG_SPL_BSS_START_ADDR=0x2000000
+CONFIG_SPL_BSS_MAX_SIZE=0x2000
+# CONFIG_SPL_RAW_IMAGE_SUPPORT is not set
+# CONFIG_SPL_SHARES_INIT_SP_ADDR is not set
+CONFIG_SPL_STACK_R=y
+CONFIG_SPL_I2C=y
+CONFIG_SPL_POWER=y
+CONFIG_SPL_ATF=y
+CONFIG_SPL_ATF_NO_PLATFORM_PARAM=y
+CONFIG_TPL_SYS_MALLOC_SIMPLE=y
+CONFIG_CMD_BOOTZ=y
+CONFIG_CMD_GPT=y
+CONFIG_CMD_MMC=y
+CONFIG_CMD_USB=y
+# CONFIG_CMD_SETEXPR is not set
+CONFIG_CMD_TIME=y
+CONFIG_SPL_OF_CONTROL=y
+CONFIG_TPL_OF_CONTROL=y
+CONFIG_OF_SPL_REMOVE_PROPS="clock-names interrupt-parent assigned-clocks assigned-clock-rates assigned-clock-parents"
+CONFIG_TPL_OF_PLATDATA=y
+CONFIG_ENV_IS_IN_MMC=y
+CONFIG_SYS_RELOC_GD_ENV_ADDR=y
+CONFIG_SYS_MMC_ENV_DEV=1
+CONFIG_NET_RANDOM_ETHADDR=y
+CONFIG_TPL_DM=y
+CONFIG_REGMAP=y
+CONFIG_SPL_REGMAP=y
+CONFIG_TPL_REGMAP=y
+CONFIG_SYSCON=y
+CONFIG_SPL_SYSCON=y
+CONFIG_TPL_SYSCON=y
+CONFIG_CLK=y
+CONFIG_SPL_CLK=y
+CONFIG_FASTBOOT_BUF_ADDR=0x800800
+CONFIG_FASTBOOT_CMD_OEM_FORMAT=y
+CONFIG_ROCKCHIP_GPIO=y
+CONFIG_SYS_I2C_ROCKCHIP=y
+CONFIG_MMC_DW=y
+CONFIG_MMC_DW_ROCKCHIP=y
+CONFIG_SF_DEFAULT_SPEED=20000000
+CONFIG_ETH_DESIGNWARE=y
+CONFIG_GMAC_ROCKCHIP=y
+CONFIG_PINCTRL=y
+CONFIG_SPL_PINCTRL=y
+CONFIG_DM_PMIC=y
+CONFIG_PMIC_RK8XX=y
+CONFIG_SPL_PMIC_RK8XX=y
+CONFIG_SPL_DM_REGULATOR=y
+CONFIG_REGULATOR_PWM=y
+CONFIG_DM_REGULATOR_FIXED=y
+CONFIG_SPL_DM_REGULATOR_FIXED=y
+CONFIG_REGULATOR_RK8XX=y
+CONFIG_PWM_ROCKCHIP=y
+CONFIG_RAM=y
+CONFIG_SPL_RAM=y
+CONFIG_TPL_RAM=y
+CONFIG_BAUDRATE=1500000
+CONFIG_DEBUG_UART_SHIFT=2
+CONFIG_SYS_NS16550_MEM32=y
+CONFIG_SYSINFO=y
+CONFIG_SYSRESET=y
+# CONFIG_TPL_SYSRESET is not set
+CONFIG_USB=y
+CONFIG_USB_XHCI_HCD=y
+CONFIG_USB_XHCI_DWC3=y
+CONFIG_USB_EHCI_HCD=y
+CONFIG_USB_EHCI_GENERIC=y
+CONFIG_USB_OHCI_HCD=y
+CONFIG_USB_OHCI_GENERIC=y
+CONFIG_USB_DWC2=y
+CONFIG_USB_DWC3=y
+# CONFIG_USB_DWC3_GADGET is not set
+CONFIG_USB_GADGET=y
+CONFIG_USB_GADGET_DWC2_OTG=y
+CONFIG_SPL_TINY_MEMSET=y
+CONFIG_TPL_TINY_MEMSET=y
+CONFIG_ERRNO_STR=y

View file

@ -1,121 +0,0 @@
--- a/arch/arm/dts/Makefile
+++ b/arch/arm/dts/Makefile
@@ -157,6 +157,7 @@
rk3399-nanopi-m4b.dtb \
rk3399-nanopi-neo4.dtb \
rk3399-nanopi-r4s.dtb \
+ rk3399-nanopi-r4se.dtb \
rk3399-orangepi.dtb \
rk3399-pinebook-pro.dtb \
rk3399-puma-haikou.dtb \
--- /dev/null
+++ b/arch/arm/dts/rk3399-nanopi-r4se.dts
@@ -0,0 +1,32 @@
+// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
+/*
+ * FriendlyElec NanoPC-T4 board device tree source
+ *
+ * Copyright (c) 2020 FriendlyElec Computer Tech. Co., Ltd.
+ * (http://www.friendlyarm.com)
+ *
+ * Copyright (c) 2018 Collabora Ltd.
+ *
+ * Copyright (c) 2020 Jensen Huang <jensenhuang@friendlyarm.com>
+ */
+
+/dts-v1/;
+#include "rk3399-nanopi-r4s.dts"
+
+/ {
+ model = "FriendlyElec NanoPi R4SE";
+ compatible = "friendlyarm,nanopi-r4se", "rockchip,rk3399";
+};
+
+&emmc_phy {
+ status = "okay";
+};
+
+&sdhci {
+ bus-width = <8>;
+ non-removable;
+ status = "okay";
+};
+&sdmmc {
+ pinctrl-0 = <&sdmmc_cd>;
+};
--- /dev/null
+++ b/configs/nanopi-r4se-rk3399_defconfig
@@ -0,0 +1,73 @@
+CONFIG_ARM=y
+CONFIG_SKIP_LOWLEVEL_INIT=y
+CONFIG_COUNTER_FREQUENCY=24000000
+CONFIG_ARCH_ROCKCHIP=y
+CONFIG_TEXT_BASE=0x00200000
+CONFIG_NR_DRAM_BANKS=1
+CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y
+CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x300000
+CONFIG_ENV_OFFSET=0x3F8000
+CONFIG_DEFAULT_DEVICE_TREE="rk3399-nanopi-r4se"
+CONFIG_ROCKCHIP_RK3399=y
+CONFIG_TARGET_EVB_RK3399=y
+CONFIG_SPL_STACK=0x400000
+CONFIG_DEBUG_UART_BASE=0xFF1A0000
+CONFIG_DEBUG_UART_CLOCK=24000000
+CONFIG_SYS_LOAD_ADDR=0x800800
+CONFIG_DEBUG_UART=y
+CONFIG_DEFAULT_FDT_FILE="rockchip/rk3399-nanopi-r4se.dtb"
+CONFIG_DISPLAY_BOARDINFO_LATE=y
+CONFIG_SPL_MAX_SIZE=0x2e000
+CONFIG_SPL_PAD_TO=0x7f8000
+CONFIG_SPL_HAS_BSS_LINKER_SECTION=y
+CONFIG_SPL_BSS_START_ADDR=0x400000
+CONFIG_SPL_BSS_MAX_SIZE=0x2000
+# CONFIG_SPL_RAW_IMAGE_SUPPORT is not set
+# CONFIG_SPL_SHARES_INIT_SP_ADDR is not set
+CONFIG_SPL_STACK_R=y
+CONFIG_SPL_STACK_R_MALLOC_SIMPLE_LEN=0x10000
+CONFIG_TPL=y
+CONFIG_CMD_BOOTZ=y
+CONFIG_CMD_GPT=y
+CONFIG_CMD_MMC=y
+CONFIG_CMD_USB=y
+# CONFIG_CMD_SETEXPR is not set
+CONFIG_CMD_TIME=y
+CONFIG_SPL_OF_CONTROL=y
+CONFIG_OF_SPL_REMOVE_PROPS="pinctrl-0 pinctrl-names clock-names interrupt-parent assigned-clocks assigned-clock-rates assigned-clock-parents"
+CONFIG_ENV_IS_IN_MMC=y
+CONFIG_SYS_RELOC_GD_ENV_ADDR=y
+CONFIG_ROCKCHIP_GPIO=y
+CONFIG_SYS_I2C_ROCKCHIP=y
+CONFIG_MMC_DW=y
+CONFIG_MMC_DW_ROCKCHIP=y
+CONFIG_MMC_SDHCI=y
+CONFIG_MMC_SDHCI_ROCKCHIP=y
+CONFIG_ETH_DESIGNWARE=y
+CONFIG_GMAC_ROCKCHIP=y
+CONFIG_PMIC_RK8XX=y
+CONFIG_REGULATOR_PWM=y
+CONFIG_REGULATOR_RK8XX=y
+CONFIG_PWM_ROCKCHIP=y
+CONFIG_RAM_ROCKCHIP_LPDDR4=y
+CONFIG_BAUDRATE=1500000
+CONFIG_DEBUG_UART_SHIFT=2
+CONFIG_SYS_NS16550_MEM32=y
+CONFIG_SYSRESET=y
+CONFIG_USB=y
+CONFIG_USB_XHCI_HCD=y
+CONFIG_USB_XHCI_DWC3=y
+CONFIG_USB_EHCI_HCD=y
+CONFIG_USB_EHCI_GENERIC=y
+CONFIG_USB_HOST_ETHER=y
+CONFIG_USB_ETHER_ASIX=y
+CONFIG_USB_ETHER_ASIX88179=y
+CONFIG_USB_ETHER_MCS7830=y
+CONFIG_USB_ETHER_RTL8152=y
+CONFIG_USB_ETHER_SMSC95XX=y
+CONFIG_VIDEO=y
+CONFIG_DISPLAY=y
+CONFIG_VIDEO_ROCKCHIP=y
+CONFIG_DISPLAY_ROCKCHIP_HDMI=y
+CONFIG_SPL_TINY_MEMSET=y
+CONFIG_ERRNO_STR=y

View file

@ -1,76 +0,0 @@
--- /dev/null
+++ b/configs/rongpin-king3399-rk3399_defconfig
@@ -0,0 +1,73 @@
+CONFIG_ARM=y
+CONFIG_SKIP_LOWLEVEL_INIT=y
+CONFIG_COUNTER_FREQUENCY=24000000
+CONFIG_ARCH_ROCKCHIP=y
+CONFIG_TEXT_BASE=0x00200000
+CONFIG_NR_DRAM_BANKS=1
+CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y
+CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x300000
+CONFIG_ENV_OFFSET=0x3F8000
+CONFIG_DEFAULT_DEVICE_TREE="rk3399-nanopi-r4se"
+CONFIG_ROCKCHIP_RK3399=y
+CONFIG_TARGET_EVB_RK3399=y
+CONFIG_SPL_STACK=0x400000
+CONFIG_DEBUG_UART_BASE=0xFF1A0000
+CONFIG_DEBUG_UART_CLOCK=24000000
+CONFIG_SYS_LOAD_ADDR=0x800800
+CONFIG_DEBUG_UART=y
+CONFIG_DEFAULT_FDT_FILE="rockchip/rk3399-nanopi-r4se.dtb"
+CONFIG_DISPLAY_BOARDINFO_LATE=y
+CONFIG_SPL_MAX_SIZE=0x2e000
+CONFIG_SPL_PAD_TO=0x7f8000
+CONFIG_SPL_HAS_BSS_LINKER_SECTION=y
+CONFIG_SPL_BSS_START_ADDR=0x400000
+CONFIG_SPL_BSS_MAX_SIZE=0x2000
+# CONFIG_SPL_RAW_IMAGE_SUPPORT is not set
+# CONFIG_SPL_SHARES_INIT_SP_ADDR is not set
+CONFIG_SPL_STACK_R=y
+CONFIG_SPL_STACK_R_MALLOC_SIMPLE_LEN=0x10000
+CONFIG_TPL=y
+CONFIG_CMD_BOOTZ=y
+CONFIG_CMD_GPT=y
+CONFIG_CMD_MMC=y
+CONFIG_CMD_USB=y
+# CONFIG_CMD_SETEXPR is not set
+CONFIG_CMD_TIME=y
+CONFIG_SPL_OF_CONTROL=y
+CONFIG_OF_SPL_REMOVE_PROPS="pinctrl-0 pinctrl-names clock-names interrupt-parent assigned-clocks assigned-clock-rates assigned-clock-parents"
+CONFIG_ENV_IS_IN_MMC=y
+CONFIG_SYS_RELOC_GD_ENV_ADDR=y
+CONFIG_ROCKCHIP_GPIO=y
+CONFIG_SYS_I2C_ROCKCHIP=y
+CONFIG_MMC_DW=y
+CONFIG_MMC_DW_ROCKCHIP=y
+CONFIG_MMC_SDHCI=y
+CONFIG_MMC_SDHCI_ROCKCHIP=y
+CONFIG_ETH_DESIGNWARE=y
+CONFIG_GMAC_ROCKCHIP=y
+CONFIG_PMIC_RK8XX=y
+CONFIG_REGULATOR_PWM=y
+CONFIG_REGULATOR_RK8XX=y
+CONFIG_PWM_ROCKCHIP=y
+CONFIG_RAM_ROCKCHIP_LPDDR4=y
+CONFIG_BAUDRATE=1500000
+CONFIG_DEBUG_UART_SHIFT=2
+CONFIG_SYS_NS16550_MEM32=y
+CONFIG_SYSRESET=y
+CONFIG_USB=y
+CONFIG_USB_XHCI_HCD=y
+CONFIG_USB_XHCI_DWC3=y
+CONFIG_USB_EHCI_HCD=y
+CONFIG_USB_EHCI_GENERIC=y
+CONFIG_USB_HOST_ETHER=y
+CONFIG_USB_ETHER_ASIX=y
+CONFIG_USB_ETHER_ASIX88179=y
+CONFIG_USB_ETHER_MCS7830=y
+CONFIG_USB_ETHER_RTL8152=y
+CONFIG_USB_ETHER_SMSC95XX=y
+CONFIG_VIDEO=y
+CONFIG_DISPLAY=y
+CONFIG_VIDEO_ROCKCHIP=y
+CONFIG_DISPLAY_ROCKCHIP_HDMI=y
+CONFIG_SPL_TINY_MEMSET=y
+CONFIG_ERRNO_STR=y

View file

@ -1,793 +0,0 @@
--- a/arch/arm/dts/Makefile
+++ b/arch/arm/dts/Makefile
@@ -165,6 +165,7 @@ dtb-$(CONFIG_ROCKCHIP_RK3399) += \
rk3399-rock-pi-4b.dtb \
rk3399-rock-pi-4c.dtb \
rk3399-rock960.dtb \
+ rk3399-mpc1903.dtb \
rk3399-rockpro64.dtb \
rk3399pro-rock-pi-n10.dtb
--- /dev/null
+++ b/arch/arm/dts/rk3399-mpc1903.dts
@@ -0,0 +1,688 @@
+// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
+
+/dts-v1/;
+#include <dt-bindings/input/linux-event-codes.h>
+#include "rk3399.dtsi"
+#include "rk3399-opp.dtsi"
+
+/ {
+ model = "Rocktech MPC1903";
+ compatible = "rocktech,mpc1903", "rockchip,rk3399";
+
+ aliases {
+ mmc0 = &sdmmc;
+ mmc1 = &sdhci;
+ };
+
+ chosen {
+ stdout-path = "serial2:1500000n8";
+ };
+
+ clkin_gmac: external-gmac-clock {
+ compatible = "fixed-clock";
+ clock-frequency = <125000000>;
+ clock-output-names = "clkin_gmac";
+ #clock-cells = <0>;
+ };
+
+ vcc12v_dcin: dc-12v {
+ compatible = "regulator-fixed";
+ regulator-name = "vcc12v_dcin";
+ regulator-always-on;
+ regulator-boot-on;
+ regulator-min-microvolt = <12000000>;
+ regulator-max-microvolt = <12000000>;
+ };
+
+ sdio_pwrseq: sdio-pwrseq {
+ compatible = "mmc-pwrseq-simple";
+ clocks = <&rk808 1>;
+ clock-names = "ext_clock";
+ pinctrl-names = "default";
+ pinctrl-0 = <&wifi_enable_h>;
+ reset-gpios = <&gpio2 RK_PD4 GPIO_ACTIVE_LOW>;
+ };
+
+ vcc5v0_sys: vcc-sys {
+ compatible = "regulator-fixed";
+ regulator-name = "vcc5v0_sys";
+ regulator-always-on;
+ regulator-boot-on;
+ regulator-min-microvolt = <5000000>;
+ regulator-max-microvolt = <5000000>;
+ vin-supply = <&vcc12v_dcin>;
+ };
+
+ vcc3v3_sys: vcc3v3-sys {
+ compatible = "regulator-fixed";
+ regulator-name = "vcc3v3_sys";
+ regulator-always-on;
+ regulator-boot-on;
+ regulator-min-microvolt = <3300000>;
+ regulator-max-microvolt = <3300000>;
+ vin-supply = <&vcc5v0_sys>;
+ };
+
+ vcc5v0_host: vcc5v0-host-regulator {
+ compatible = "regulator-fixed";
+ enable-active-high;
+ gpio = <&gpio4 RK_PD1 GPIO_ACTIVE_HIGH>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&vcc5v0_host_en>;
+ regulator-name = "vcc5v0_host";
+ regulator-always-on;
+ vin-supply = <&vcc5v0_sys>;
+ };
+
+ vcc_lan: vcc-phy-regulator {
+ compatible = "regulator-fixed";
+ regulator-name = "vcc_lan";
+ regulator-always-on;
+ regulator-boot-on;
+ regulator-min-microvolt = <3300000>;
+ regulator-max-microvolt = <3300000>;
+ };
+
+ vdd_log: vdd-log {
+ compatible = "pwm-regulator";
+ pwms = <&pwm2 0 25000 1>;
+ regulator-name = "vdd_log";
+ regulator-always-on;
+ regulator-boot-on;
+ regulator-min-microvolt = <800000>;
+ regulator-max-microvolt = <1400000>;
+ vin-supply = <&vcc5v0_sys>;
+ };
+
+ leds {
+ compatible = "gpio-leds";
+ pinctrl-names = "default";
+ pinctrl-0 = <&status_led_pin>;
+
+ status_led: led-status-led {
+ label = "status_led";
+ linux,default-trigger = "heartbeat";
+ gpios = <&gpio1 RK_PD0 GPIO_ACTIVE_LOW>;
+ };
+ };
+
+ hub_control {
+ compatible = "rocktech,hub-control";
+ pinctrl-names = "default";
+ pinctrl-0 = <&hub_pwr>;
+ hub-pwr-gpio = <&gpio1 RK_PC4 GPIO_ACTIVE_HIGH>;
+ status = "okay";
+ };
+};
+
+&cpu_l0 {
+ cpu-supply = <&vdd_cpu_l>;
+};
+
+&cpu_l1 {
+ cpu-supply = <&vdd_cpu_l>;
+};
+
+&cpu_l2 {
+ cpu-supply = <&vdd_cpu_l>;
+};
+
+&cpu_l3 {
+ cpu-supply = <&vdd_cpu_l>;
+};
+
+&cpu_b0 {
+ cpu-supply = <&vdd_cpu_b>;
+};
+
+&cpu_b1 {
+ cpu-supply = <&vdd_cpu_b>;
+};
+
+&emmc_phy {
+ status = "okay";
+};
+
+&gmac {
+ assigned-clocks = <&cru SCLK_RMII_SRC>;
+ assigned-clock-parents = <&clkin_gmac>;
+ clock_in_out = "input";
+ phy-supply = <&vcc_lan>;
+ phy-mode = "rmgii";
+ pinctrl-names = "default";
+ pinctrl-0 = <&rgmii_pins>;
+ snps,reset-gpio = <&gpio3 RK_PB7 GPIO_ACTIVE_LOW>;
+ snps,reset-active-low;
+ snps,reset-delays-us = <0 10000 50000>;
+ tx_delay = <0x28>;
+ rx_delay = <0x11>;
+ status = "okay";
+};
+
+&gpu {
+ mali-supply = <&vdd_gpu>;
+ status = "okay";
+};
+
+&hdmi {
+ ddc-i2c-bus = <&i2c3>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&hdmi_i2c_xfer>;
+ status = "okay";
+};
+
+&hdmi_sound {
+ status = "okay";
+};
+
+&i2c0 {
+ clock-frequency = <400000>;
+ i2c-scl-rising-time-ns = <168>;
+ i2c-scl-falling-time-ns = <4>;
+ status = "okay";
+
+ rk808: pmic@1b {
+ compatible = "rockchip,rk808";
+ reg = <0x1b>;
+ interrupt-parent = <&gpio1>;
+ interrupts = <21 IRQ_TYPE_LEVEL_LOW>;
+ #clock-cells = <1>;
+ clock-output-names = "xin32k", "rk808-clkout2";
+ pinctrl-names = "default";
+ pinctrl-0 = <&pmic_int_l>;
+ rockchip,system-power-controller;
+ wakeup-source;
+
+ vcc1-supply = <&vcc5v0_sys>;
+ vcc2-supply = <&vcc5v0_sys>;
+ vcc3-supply = <&vcc5v0_sys>;
+ vcc4-supply = <&vcc5v0_sys>;
+ vcc6-supply = <&vcc5v0_sys>;
+ vcc7-supply = <&vcc5v0_sys>;
+ vcc8-supply = <&vcc3v3_sys>;
+ vcc9-supply = <&vcc5v0_sys>;
+ vcc10-supply = <&vcc5v0_sys>;
+ vcc11-supply = <&vcc5v0_sys>;
+ vcc12-supply = <&vcc3v3_sys>;
+ vddio-supply = <&vcc_3v0>;
+
+ regulators {
+ vdd_center: DCDC_REG1 {
+ regulator-name = "vdd_center";
+ regulator-always-on;
+ regulator-boot-on;
+ regulator-min-microvolt = <750000>;
+ regulator-max-microvolt = <1350000>;
+ regulator-ramp-delay = <6001>;
+
+ regulator-state-mem {
+ regulator-off-in-suspend;
+ };
+ };
+
+ vdd_cpu_l: DCDC_REG2 {
+ regulator-name = "vdd_cpu_l";
+ regulator-always-on;
+ regulator-boot-on;
+ regulator-min-microvolt = <750000>;
+ regulator-max-microvolt = <1350000>;
+ regulator-ramp-delay = <6001>;
+
+ regulator-state-mem {
+ regulator-off-in-suspend;
+ };
+ };
+
+ vcc_ddr: DCDC_REG3 {
+ regulator-name = "vcc_ddr";
+ regulator-always-on;
+ regulator-boot-on;
+
+ regulator-state-mem {
+ regulator-on-in-suspend;
+ };
+ };
+
+ vcc_1v8: DCDC_REG4 {
+ regulator-name = "vcc_1v8";
+ regulator-always-on;
+ regulator-boot-on;
+ regulator-min-microvolt = <1800000>;
+ regulator-max-microvolt = <1800000>;
+
+ regulator-state-mem {
+ regulator-on-in-suspend;
+ regulator-suspend-microvolt = <1800000>;
+ };
+ };
+
+ gen_1v8: LDO_REG1 {
+ regulator-name = "gen_1v8";
+ regulator-always-on;
+ regulator-boot-on;
+ regulator-min-microvolt = <1800000>;
+ regulator-max-microvolt = <1800000>;
+
+ regulator-state-mem {
+ regulator-off-in-suspend;
+ };
+ };
+
+ gen_3v0: LDO_REG2 {
+ regulator-name = "gen_3v0";
+ regulator-always-on;
+ regulator-boot-on;
+ regulator-min-microvolt = <3000000>;
+ regulator-max-microvolt = <3000000>;
+
+ regulator-state-mem {
+ regulator-on-in-suspend;
+ regulator-suspend-microvolt = <3000000>;
+ };
+ };
+
+ vcc1v8_pmu: LDO_REG3 {
+ regulator-name = "vcc1v8_pmu";
+ regulator-always-on;
+ regulator-boot-on;
+ regulator-min-microvolt = <1800000>;
+ regulator-max-microvolt = <1800000>;
+
+ regulator-state-mem {
+ regulator-on-in-suspend;
+ regulator-suspend-microvolt = <1800000>;
+ };
+ };
+
+ vcc_sdio: LDO_REG4 {
+ regulator-name = "vcc_sdio";
+ regulator-always-on;
+ regulator-boot-on;
+ regulator-min-microvolt = <3000000>;
+ regulator-max-microvolt = <3000000>;
+
+ regulator-state-mem {
+ regulator-on-in-suspend;
+ regulator-suspend-microvolt = <3000000>;
+ };
+ };
+
+ vcca3v0_codec: LDO_REG5 {
+ regulator-name = "vcca3v0_codec";
+ regulator-always-on;
+ regulator-boot-on;
+ regulator-min-microvolt = <3000000>;
+ regulator-max-microvolt = <3000000>;
+
+ regulator-state-mem {
+ regulator-off-in-suspend;
+ };
+ };
+
+ vcc_1v5: LDO_REG6 {
+ regulator-name = "vcc_1v5";
+ regulator-always-on;
+ regulator-boot-on;
+ regulator-min-microvolt = <1500000>;
+ regulator-max-microvolt = <1500000>;
+
+ regulator-state-mem {
+ regulator-off-in-suspend;
+ };
+ };
+
+ vcc1v8_codec: LDO_REG7 {
+ regulator-name = "vcc1v8_codec";
+ regulator-always-on;
+ regulator-boot-on;
+ regulator-min-microvolt = <1800000>;
+ regulator-max-microvolt = <1800000>;
+
+ regulator-state-mem {
+ regulator-off-in-suspend;
+ regulator-suspend-microvolt = <1800000>;
+ };
+ };
+
+ vcc_3v0: LDO_REG8 {
+ regulator-name = "vcc_3v0";
+ regulator-always-on;
+ regulator-boot-on;
+ regulator-min-microvolt = <3000000>;
+ regulator-max-microvolt = <3000000>;
+
+ regulator-state-mem {
+ regulator-on-in-suspend;
+ regulator-suspend-microvolt = <3000000>;
+ };
+ };
+
+ vcc3v3_s3: SWITCH_REG1 {
+ regulator-always-on;
+ regulator-boot-on;
+ regulator-name = "vcc3v3_s3";
+
+ regulator-state-mem {
+ regulator-off-in-suspend;
+ };
+ };
+
+ vcc3v3_s0: SWITCH_REG2 {
+ regulator-always-on;
+ regulator-boot-on;
+ regulator-name = "vcc3v3_s0";
+
+ regulator-state-mem {
+ regulator-off-in-suspend;
+ };
+ };
+ };
+ };
+
+ vdd_cpu_b: regulator@40 {
+ compatible = "silergy,syr827";
+ reg = <0x40>;
+ fcs,suspend-voltage-selector = <1>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&vsel1_pin>;
+ regulator-name = "vdd_cpu_b";
+ regulator-min-microvolt = <712500>;
+ regulator-max-microvolt = <1500000>;
+ regulator-ramp-delay = <1000>;
+ regulator-always-on;
+ regulator-boot-on;
+ vin-supply = <&vcc5v0_sys>;
+
+ regulator-state-mem {
+ regulator-off-in-suspend;
+ };
+ };
+
+ vdd_gpu: regulator@41 {
+ compatible = "silergy,syr828";
+ reg = <0x41>;
+ fcs,suspend-voltage-selector = <1>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&vsel2_pin>;
+ regulator-name = "vdd_gpu";
+ regulator-min-microvolt = <712500>;
+ regulator-max-microvolt = <1500000>;
+ regulator-ramp-delay = <1000>;
+ regulator-always-on;
+ regulator-boot-on;
+ vin-supply = <&vcc5v0_sys>;
+
+ regulator-state-mem {
+ regulator-off-in-suspend;
+ };
+ };
+
+ rtc: pcf85263@51 {
+ compatible = "nxp,pcf85263";
+ reg = <0x51>;
+ pinctrl-0 = <&rtc_int>;
+ rtc_int_gpio = <&gpio2 RK_PB4 GPIO_ACTIVE_HIGH>;
+ };
+};
+
+&i2c1 {
+ i2c-scl-rising-time-ns = <300>;
+ i2c-scl-falling-time-ns = <15>;
+ status = "okay";
+};
+
+&i2s2 {
+ status = "okay";
+};
+
+&i2c4 {
+ i2c-scl-rising-time-ns = <600>;
+ i2c-scl-falling-time-ns = <20>;
+ status = "okay";
+};
+
+&i2c6 {
+ status = "okay";
+};
+
+&i2s0 {
+ rockchip,i2s-broken-burst-len;
+ rockchip,playback-channels = <8>;
+ rockchip,capture-channels = <8>;
+ status = "okay";
+};
+
+&i2s2 {
+ rockchip,bclk-fs = <128>;
+ status = "okay";
+};
+
+&io_domains {
+ status = "okay";
+
+ bt656-supply = <&vcc_3v0>;
+ audio-supply = <&vcc1v8_codec>;
+ sdmmc-supply = <&vcc_sdio>;
+ gpio1830-supply = <&vcc_3v0>;
+};
+
+&pmu_io_domains {
+ status = "okay";
+
+ pmu1830-supply = <&vcc_3v0>;
+};
+
+&pinctrl {
+ bt {
+ uart0_gpios: uart0-gpios {
+ rockchip,pins = <2 RK_PC3 RK_FUNC_GPIO &pcfg_pull_none>;
+ };
+ };
+
+ pmic {
+ pmic_int_l: pmic-int-l {
+ rockchip,pins = <1 RK_PC5 RK_FUNC_GPIO &pcfg_pull_up>;
+ };
+
+ vsel1_pin: vsel1-pin {
+ rockchip,pins = <1 RK_PC1 RK_FUNC_GPIO &pcfg_pull_down>;
+ };
+
+ vsel2_pin: vsel2-pin {
+ rockchip,pins = <1 RK_PB6 RK_FUNC_GPIO &pcfg_pull_down>;
+ };
+ };
+
+ usb2 {
+ vcc5v0_host_en: vcc5v0-host-en {
+ rockchip,pins = <1 RK_PA0 RK_FUNC_GPIO &pcfg_pull_none>;
+ };
+
+ hub_pwr: hub-pwr {
+ rockchip,pins = <1 RK_PC4 RK_FUNC_GPIO &pcfg_pull_up>;
+ };
+ };
+
+ wifi {
+ wifi_enable_h: wifi-enable-h {
+ rockchip,pins = <0 RK_PD4 RK_FUNC_GPIO &pcfg_pull_none>;
+ };
+ };
+
+ rtc {
+ rtc_int: rtc-int {
+ rockchip,pins = <2 RK_PB5 RK_FUNC_GPIO &pcfg_pull_up>;
+ };
+ };
+
+ led {
+ status_led_pin: status-led-pin {
+ rockchip,pins = <1 RK_PD0 RK_FUNC_GPIO &pcfg_pull_up>;
+ };
+ };
+
+ rockchip-key {
+ power_key: power-key {
+ rockchip,pins = <0 RK_PA2 RK_FUNC_GPIO &pcfg_pull_up>;
+ };
+ };
+};
+
+&pwm0 {
+ status = "okay";
+};
+
+&pwm1 {
+ status = "okay";
+};
+
+&pwm2 {
+ status = "okay";
+};
+
+&saradc {
+ status = "okay";
+ vref-supply = <&vcc_1v8>;
+};
+
+&sdio0 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ bus-width = <4>;
+ clock-frequency = <50000000>;
+ cap-sdio-irq;
+ cap-sd-highspeed;
+ keep-power-in-suspend;
+ mmc-pwrseq = <&sdio_pwrseq>;
+ non-removable;
+ pinctrl-names = "default";
+ pinctrl-0 = <&sdio0_bus4 &sdio0_cmd &sdio0_clk>;
+ sd-uhs-sdr104;
+ status = "okay";
+};
+
+&sdmmc {
+ clock-freq-min-max = <400000 150000000>;
+ bus-width = <4>;
+ cap-mmc-highspeed;
+ cap-sd-highspeed;
+ supports-sd;
+ disable-wp;
+ num-slots = <1>;
+ vqmmc-supply = <&vcc_sdio>;
+ max-frequency = <150000000>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&sdmmc_clk &sdmmc_cd &sdmmc_cmd &sdmmc_bus4>;
+ status = "okay";
+};
+
+&sdhci {
+ bus-width = <8>;
+ keep-power-in-suspend;
+ mmc-hs400-1_8v;
+ mmc-hs400-enhanced-strobe;
+ non-removable;
+ supports-emmc;
+ status = "okay";
+};
+
+&tcphy0 {
+ status = "okay";
+};
+
+&tcphy1 {
+ status = "okay";
+};
+
+&tsadc {
+ status = "okay";
+ rockchip,hw-tshut-temp = <120000>;
+ /* tshut mode 0:CRU 1:GPIO */
+ rockchip,hw-tshut-mode = <1>;
+ /* tshut polarity 0:LOW 1:HIGH */
+ rockchip,hw-tshut-polarity = <1>;
+};
+
+&u2phy0 {
+ status = "okay";
+};
+
+
+&u2phy0_otg {
+ status = "okay";
+};
+
+&u2phy0_host {
+ status = "okay";
+};
+
+&u2phy1 {
+ status = "okay";
+};
+
+&u2phy1_otg {
+ status = "okay";
+};
+
+&u2phy1_host {
+ status = "okay";
+};
+
+&uart0 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&uart0_xfer &uart0_cts &uart0_rts>;
+};
+
+&uart2 {
+ status = "okay";
+};
+
+&usb_host0_ehci {
+ status = "okay";
+};
+
+&usb_host0_ohci {
+ status = "okay";
+};
+
+&usb_host1_ehci {
+ status = "okay";
+};
+
+&usb_host1_ohci {
+ status = "okay";
+};
+
+&usbdrd3_0 {
+ status = "okay";
+};
+
+&usbdrd_dwc3_0 {
+ status = "okay";
+ dr_mode = "host";
+};
+
+&usbdrd3_1 {
+ status = "okay";
+};
+
+&usbdrd_dwc3_1 {
+ status = "okay";
+ dr_mode = "host";
+};
+
+&vopb {
+ status = "okay";
+};
+
+&vopb_mmu {
+ status = "okay";
+};
+
+&vopl {
+ status = "okay";
+};
+
+&vopl_mmu {
+ status = "okay";
+};
--- /dev/null
+++ b/arch/arm/dts/rk3399-mpc1903-u-boot.dtsi
@@ -0,0 +1,14 @@
+// SPDX-License-Identifier: GPL-2.0+
+
+#include "rk3399-u-boot.dtsi"
+#include "rk3399-sdram-lpddr3-4GB-1600.dtsi"
+
+/ {
+ chosen {
+ u-boot,spl-boot-order = "same-as-spl", &sdhci, &sdmmc;
+ };
+};
+
+&sdmmc {
+ pinctrl-0 = <&sdmmc_bus4 &sdmmc_clk &sdmmc_cmd &sdmmc_cd>;
+};
--- /dev/null
+++ b/configs/rocktech-mpc1903-rk3399_defconfig
@@ -0,0 +1,72 @@
+CONFIG_ARM=y
+CONFIG_SKIP_LOWLEVEL_INIT=y
+CONFIG_COUNTER_FREQUENCY=24000000
+CONFIG_ARCH_ROCKCHIP=y
+CONFIG_TEXT_BASE=0x00200000
+CONFIG_NR_DRAM_BANKS=1
+CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y
+CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x300000
+CONFIG_ENV_OFFSET=0x3F8000
+CONFIG_DEFAULT_DEVICE_TREE="rk3399-mpc1903"
+CONFIG_ROCKCHIP_RK3399=y
+CONFIG_TARGET_EVB_RK3399=y
+CONFIG_SPL_STACK=0x400000
+CONFIG_DEBUG_UART_BASE=0xFF1A0000
+CONFIG_DEBUG_UART_CLOCK=24000000
+CONFIG_SYS_LOAD_ADDR=0x800800
+CONFIG_DEBUG_UART=y
+CONFIG_DEFAULT_FDT_FILE="rockchip/rk3399-mpc1903.dtb"
+CONFIG_DISPLAY_BOARDINFO_LATE=y
+CONFIG_SPL_MAX_SIZE=0x2e000
+CONFIG_SPL_PAD_TO=0x7f8000
+CONFIG_SPL_HAS_BSS_LINKER_SECTION=y
+CONFIG_SPL_BSS_START_ADDR=0x400000
+CONFIG_SPL_BSS_MAX_SIZE=0x2000
+# CONFIG_SPL_RAW_IMAGE_SUPPORT is not set
+# CONFIG_SPL_SHARES_INIT_SP_ADDR is not set
+CONFIG_SPL_STACK_R=y
+CONFIG_SPL_STACK_R_MALLOC_SIMPLE_LEN=0x10000
+CONFIG_TPL=y
+CONFIG_CMD_BOOTZ=y
+CONFIG_CMD_GPT=y
+CONFIG_CMD_MMC=y
+CONFIG_CMD_USB=y
+# CONFIG_CMD_SETEXPR is not set
+CONFIG_CMD_TIME=y
+CONFIG_SPL_OF_CONTROL=y
+CONFIG_OF_SPL_REMOVE_PROPS="pinctrl-0 pinctrl-names clock-names interrupt-parent assigned-clocks assigned-clock-rates assigned-clock-parents"
+CONFIG_ENV_IS_IN_MMC=y
+CONFIG_SYS_RELOC_GD_ENV_ADDR=y
+CONFIG_ROCKCHIP_GPIO=y
+CONFIG_SYS_I2C_ROCKCHIP=y
+CONFIG_MMC_DW=y
+CONFIG_MMC_DW_ROCKCHIP=y
+CONFIG_MMC_SDHCI=y
+CONFIG_MMC_SDHCI_ROCKCHIP=y
+CONFIG_ETH_DESIGNWARE=y
+CONFIG_GMAC_ROCKCHIP=y
+CONFIG_PMIC_RK8XX=y
+CONFIG_REGULATOR_PWM=y
+CONFIG_REGULATOR_RK8XX=y
+CONFIG_PWM_ROCKCHIP=y
+CONFIG_BAUDRATE=1500000
+CONFIG_DEBUG_UART_SHIFT=2
+CONFIG_SYS_NS16550_MEM32=y
+CONFIG_SYSRESET=y
+CONFIG_USB=y
+CONFIG_USB_XHCI_HCD=y
+CONFIG_USB_XHCI_DWC3=y
+CONFIG_USB_EHCI_HCD=y
+CONFIG_USB_EHCI_GENERIC=y
+CONFIG_USB_HOST_ETHER=y
+CONFIG_USB_ETHER_ASIX=y
+CONFIG_USB_ETHER_ASIX88179=y
+CONFIG_USB_ETHER_MCS7830=y
+CONFIG_USB_ETHER_RTL8152=y
+CONFIG_USB_ETHER_SMSC95XX=y
+CONFIG_VIDEO=y
+CONFIG_DISPLAY=y
+CONFIG_VIDEO_ROCKCHIP=y
+CONFIG_DISPLAY_ROCKCHIP_HDMI=y
+CONFIG_SPL_TINY_MEMSET=y
+CONFIG_ERRNO_STR=y

View file

@ -1,933 +0,0 @@
--- a/arch/arm/dts/Makefile
+++ b/arch/arm/dts/Makefile
@@ -145,6 +145,7 @@ dtb-$(CONFIG_ROCKCHIP_RK3399) += \
rk3399-gru-bob.dtb \
rk3399-guangmiao-g4c.dtb \
rk3399-gru-kevin.dtb \
+ rk3399-h3399pc.dtb \
rk3399-khadas-edge.dtb \
rk3399-khadas-edge-captain.dtb \
rk3399-khadas-edge-v.dtb \
--- /dev/null
+++ b/arch/arm/dts/rk3399-h3399pc.dts
@@ -0,0 +1,828 @@
+// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
+/*
+ * Copyright (c) 2017 Fuzhou Rockchip Electronics Co., Ltd.
+ */
+
+/dts-v1/;
+#include <dt-bindings/input/linux-event-codes.h>
+#include "rk3399.dtsi"
+#include "rk3399-opp.dtsi"
+
+/ {
+ model = "SHAREVDI H3399PC";
+ compatible = "sharevdi,h3399pc", "rockchip,rk3399";
+
+ aliases {
+ mmc0 = &sdio0;
+ mmc1 = &sdmmc;
+ mmc2 = &sdhci;
+ };
+
+ chosen {
+ stdout-path = "serial2:1500000n8";
+ };
+
+ clkin_gmac: external-gmac-clock {
+ compatible = "fixed-clock";
+ clock-frequency = <125000000>;
+ clock-output-names = "clkin_gmac";
+ #clock-cells = <0>;
+ };
+
+ dc_12v: dc-12v {
+ compatible = "regulator-fixed";
+ regulator-name = "dc_12v";
+ regulator-always-on;
+ regulator-boot-on;
+ regulator-min-microvolt = <12000000>;
+ regulator-max-microvolt = <12000000>;
+ };
+
+ gpio-keys {
+ compatible = "gpio-keys";
+ autorepeat;
+
+ power {
+ debounce-interval = <100>;
+ gpios = <&gpio0 RK_PA5 GPIO_ACTIVE_LOW>;
+ label = "GPIO Key Power";
+ linux,code = <KEY_POWER>;
+ wakeup-source;
+ };
+ };
+
+ leds {
+ compatible = "gpio-leds";
+ pinctrl-names = "default";
+ pinctrl-0 = <&work_led_pin>, <&diy_led_pin>;
+
+ work_led: led-0 {
+ label = "work";
+ default-state = "on";
+ gpios = <&gpio0 RK_PB4 GPIO_ACTIVE_HIGH>;
+ };
+
+ diy_led: led-1 {
+ label = "diy";
+ default-state = "off";
+ gpios = <&gpio0 RK_PB5 GPIO_ACTIVE_HIGH>;
+ };
+ };
+
+ sound: sound {
+ compatible = "audio-graph-card";
+ label = "Analog";
+ dais = <&i2s0_p0>;
+ };
+
+ sound-dit {
+ compatible = "audio-graph-card";
+ label = "SPDIF";
+ dais = <&spdif_p0>;
+ };
+
+ spdif-dit {
+ compatible = "linux,spdif-dit";
+ #sound-dai-cells = <0>;
+
+ port {
+ dit_p0_0: endpoint {
+ remote-endpoint = <&spdif_p0_0>;
+ };
+ };
+ };
+
+ sdio_pwrseq: sdio-pwrseq {
+ compatible = "mmc-pwrseq-simple";
+ clocks = <&rk808 1>;
+ clock-names = "ext_clock";
+ pinctrl-names = "default";
+ pinctrl-0 = <&wifi_enable_h>;
+
+ /*
+ * On the module itself this is one of these (depending
+ * on the actual card populated):
+ * - SDIO_RESET_L_WL_REG_ON
+ * - PDN (power down when low)
+ */
+ reset-gpios = <&gpio0 RK_PB2 GPIO_ACTIVE_LOW>;
+ };
+
+ sound-dit {
+ compatible = "audio-graph-card";
+ label = "SPDIF";
+ dais = <&spdif_p0>;
+ };
+
+ spdif-dit {
+ compatible = "linux,spdif-dit";
+ #sound-dai-cells = <0>;
+
+ port {
+ dit_p0_0: endpoint {
+ remote-endpoint = <&spdif_p0_0>;
+ };
+ };
+ };
+
+ /* switched by pmic_sleep */
+ vcc1v8_s3: vcca1v8_s3: vcc1v8-s3 {
+ compatible = "regulator-fixed";
+ regulator-name = "vcc1v8_s3";
+ regulator-always-on;
+ regulator-boot-on;
+ regulator-min-microvolt = <1800000>;
+ regulator-max-microvolt = <1800000>;
+ vin-supply = <&vcc_1v8>;
+ };
+
+ vcc1v8_sys: vcc1v8-sys {
+ compatible = "regulator-fixed";
+ regulator-name = "vcc1v8_sys";
+ regulator-always-on;
+ regulator-boot-on;
+ regulator-min-microvolt = <1800000>;
+ regulator-max-microvolt = <1800000>;
+ };
+
+ vcc3v3_pcie: vcc3v3-pcie-regulator {
+ compatible = "regulator-fixed";
+ enable-active-high;
+ gpio = <&gpio4 RK_PD5 GPIO_ACTIVE_HIGH>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&pcie_pwr_en>;
+ regulator-name = "vcc3v3_pcie";
+ regulator-always-on;
+ regulator-boot-on;
+ vin-supply = <&dc_12v>;
+ };
+
+ vcc3v3_3g: vcc3v3-3g-regulator {
+ compatible = "regulator-fixed";
+ enable-active-high;
+ regulator-always-on;
+ regulator-boot-on;
+ gpio = <&gpio0 RK_PA2 GPIO_ACTIVE_HIGH>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&pcie_3g_drv>;
+ regulator-name = "vcc3v3_3g";
+ };
+
+ vcc3v3_sys: vcc3v3-sys {
+ compatible = "regulator-fixed";
+ regulator-name = "vcc3v3_sys";
+ regulator-always-on;
+ regulator-boot-on;
+ regulator-min-microvolt = <3300000>;
+ regulator-max-microvolt = <3300000>;
+ vin-supply = <&vcc_sys>;
+ };
+
+ /* Actually 3 regulators (host0, 1, 2) controlled by the same gpio */
+ vcc5v0_host: vcc5v0-host-regulator {
+ compatible = "regulator-fixed";
+ enable-active-high;
+ gpio = <&gpio1 RK_PA0 GPIO_ACTIVE_HIGH>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&vcc5v0_host_en>;
+ regulator-name = "vcc5v0_host";
+ regulator-always-on;
+ vin-supply = <&vcc_sys>;
+ };
+
+ vcc5v0_hub: vcc5v0-hub-regulator {
+ compatible = "regulator-fixed";
+ enable-active-high;
+ gpio = <&gpio4 RK_PD6 GPIO_ACTIVE_HIGH>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&vcc5v0_hub_en>;
+ regulator-name = "vcc5v0_hub";
+ regulator-always-on;
+ vin-supply = <&vcc_sys>;
+ };
+
+ vcc_sys: vcc-sys {
+ compatible = "regulator-fixed";
+ regulator-name = "vcc_sys";
+ regulator-always-on;
+ regulator-boot-on;
+ regulator-min-microvolt = <5000000>;
+ regulator-max-microvolt = <5000000>;
+ vin-supply = <&dc_12v>;
+ };
+
+ vdd_log: vdd-log {
+ compatible = "pwm-regulator";
+ pwms = <&pwm2 0 25000 1>;
+ regulator-name = "vdd_log";
+ regulator-always-on;
+ regulator-boot-on;
+ regulator-min-microvolt = <800000>;
+ regulator-max-microvolt = <1100000>;
+ vin-supply = <&vcc_sys>;
+ };
+
+ vcc_phy: vcc-phy-regulator {
+ compatible = "regulator-fixed";
+ regulator-name = "vcc_phy";
+ regulator-always-on;
+ regulator-boot-on;
+ };
+};
+
+&cpu_l0 {
+ cpu-supply = <&vdd_cpu_l>;
+};
+
+&cpu_l1 {
+ cpu-supply = <&vdd_cpu_l>;
+};
+
+&cpu_l2 {
+ cpu-supply = <&vdd_cpu_l>;
+};
+
+&cpu_l3 {
+ cpu-supply = <&vdd_cpu_l>;
+};
+
+&cpu_b0 {
+ cpu-supply = <&vdd_cpu_b>;
+};
+
+&cpu_b1 {
+ cpu-supply = <&vdd_cpu_b>;
+};
+
+&emmc_phy {
+ status = "okay";
+};
+
+&gmac {
+ assigned-clocks = <&cru SCLK_RMII_SRC>;
+ assigned-clock-parents = <&clkin_gmac>;
+ clock_in_out = "input";
+ phy-supply = <&vcc_lan>;
+ phy-mode = "rgmii";
+ pinctrl-names = "default";
+ pinctrl-0 = <&rgmii_pins>;
+ snps,reset-gpio = <&gpio3 RK_PB7 GPIO_ACTIVE_LOW>;
+ snps,reset-active-low;
+ snps,reset-delays-us = <0 10000 50000>;
+ tx_delay = <0x28>;
+ rx_delay = <0x11>;
+ status = "okay";
+};
+
+&hdmi {
+ ddc-i2c-bus = <&i2c3>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&hdmi_cec>;
+ status = "okay";
+};
+
+&i2c0 {
+ clock-frequency = <400000>;
+ i2c-scl-rising-time-ns = <168>;
+ i2c-scl-falling-time-ns = <4>;
+ status = "okay";
+
+ rk808: pmic@1b {
+ compatible = "rockchip,rk808";
+ reg = <0x1b>;
+ interrupt-parent = <&gpio1>;
+ interrupts = <21 IRQ_TYPE_LEVEL_LOW>;
+ #clock-cells = <1>;
+ clock-output-names = "xin32k", "rk808-clkout2";
+ pinctrl-names = "default";
+ pinctrl-0 = <&pmic_int_l>;
+ rockchip,system-power-controller;
+ wakeup-source;
+
+ vcc1-supply = <&vcc3v3_sys>;
+ vcc2-supply = <&vcc3v3_sys>;
+ vcc3-supply = <&vcc3v3_sys>;
+ vcc4-supply = <&vcc3v3_sys>;
+ vcc6-supply = <&vcc3v3_sys>;
+ vcc7-supply = <&vcc3v3_sys>;
+ vcc8-supply = <&vcc3v3_sys>;
+ vcc9-supply = <&vcc3v3_sys>;
+ vcc10-supply = <&vcc3v3_sys>;
+ vcc11-supply = <&vcc3v3_sys>;
+ vcc12-supply = <&vcc3v3_sys>;
+ vddio-supply = <&vcc1v8_pmu>;
+
+ regulators {
+ vdd_center: DCDC_REG1 {
+ regulator-name = "vdd_center";
+ regulator-always-on;
+ regulator-boot-on;
+ regulator-min-microvolt = <750000>;
+ regulator-max-microvolt = <1350000>;
+ regulator-ramp-delay = <6001>;
+
+ regulator-state-mem {
+ regulator-off-in-suspend;
+ };
+ };
+
+ vdd_cpu_l: DCDC_REG2 {
+ regulator-name = "vdd_cpu_l";
+ regulator-always-on;
+ regulator-boot-on;
+ regulator-min-microvolt = <750000>;
+ regulator-max-microvolt = <1350000>;
+ regulator-ramp-delay = <6001>;
+
+ regulator-state-mem {
+ regulator-off-in-suspend;
+ };
+ };
+
+ vcc_ddr: DCDC_REG3 {
+ regulator-name = "vcc_ddr";
+ regulator-always-on;
+ regulator-boot-on;
+
+ regulator-state-mem {
+ regulator-on-in-suspend;
+ };
+ };
+
+ vcc_1v8: DCDC_REG4 {
+ regulator-name = "vcc_1v8";
+ regulator-always-on;
+ regulator-boot-on;
+ regulator-min-microvolt = <1800000>;
+ regulator-max-microvolt = <1800000>;
+
+ regulator-state-mem {
+ regulator-on-in-suspend;
+ regulator-suspend-microvolt = <1800000>;
+ };
+ };
+
+ vcc2v8_dvp: LDO_REG1 {
+ regulator-name = "vcc2v8_dvp";
+ regulator-always-on;
+ regulator-boot-on;
+ regulator-min-microvolt = <2800000>;
+ regulator-max-microvolt = <2800000>;
+
+ regulator-state-mem {
+ regulator-off-in-suspend;
+ };
+ };
+
+
+ vcc1v8_dvp: LDO_REG2 {
+ regulator-name = "vcc1v8_dvp";
+ regulator-always-on;
+ regulator-boot-on;
+ regulator-min-microvolt = <1800000>;
+ regulator-max-microvolt = <1800000>;
+
+ regulator-state-mem {
+ regulator-off-in-suspend;
+ };
+ };
+
+ vcc1v8_pmu: LDO_REG3 {
+ regulator-name = "vcc1v8_pmu";
+ regulator-always-on;
+ regulator-boot-on;
+ regulator-min-microvolt = <1800000>;
+ regulator-max-microvolt = <1800000>;
+
+ regulator-state-mem {
+ regulator-on-in-suspend;
+ regulator-suspend-microvolt = <1800000>;
+ };
+ };
+
+ vcc_sdio: LDO_REG4 {
+ regulator-name = "vcc_sdio";
+ regulator-always-on;
+ regulator-boot-on;
+ regulator-min-microvolt = <1800000>;
+ regulator-max-microvolt = <3000000>;
+
+ regulator-state-mem {
+ regulator-on-in-suspend;
+ regulator-suspend-microvolt = <3000000>;
+ };
+ };
+
+ vcca3v0_codec: LDO_REG5 {
+ regulator-name = "vcca3v0_codec";
+ regulator-always-on;
+ regulator-boot-on;
+ regulator-min-microvolt = <3000000>;
+ regulator-max-microvolt = <3000000>;
+
+ regulator-state-mem {
+ regulator-off-in-suspend;
+ };
+ };
+
+ vcc_1v5: LDO_REG6 {
+ regulator-name = "vcc_1v5";
+ regulator-always-on;
+ regulator-boot-on;
+ regulator-min-microvolt = <1500000>;
+ regulator-max-microvolt = <1500000>;
+
+ regulator-state-mem {
+ regulator-on-in-suspend;
+ regulator-suspend-microvolt = <1500000>;
+ };
+ };
+
+ vcca1v8_codec: LDO_REG7 {
+ regulator-name = "vcca1v8_codec";
+ regulator-always-on;
+ regulator-boot-on;
+ regulator-min-microvolt = <1800000>;
+ regulator-max-microvolt = <1800000>;
+
+ regulator-state-mem {
+ regulator-off-in-suspend;
+ };
+ };
+
+ vcc_3v0: LDO_REG8 {
+ regulator-name = "vcc_3v0";
+ regulator-always-on;
+ regulator-boot-on;
+ regulator-min-microvolt = <3000000>;
+ regulator-max-microvolt = <3000000>;
+
+ regulator-state-mem {
+ regulator-on-in-suspend;
+ regulator-suspend-microvolt = <3000000>;
+ };
+ };
+
+ vcc3v3_s3: vcc_lan: SWITCH_REG1 {
+ regulator-name = "vcc3v3_s3";
+ regulator-always-on;
+ regulator-boot-on;
+
+ regulator-state-mem {
+ regulator-off-in-suspend;
+ };
+ };
+
+ vcc3v3_s0: SWITCH_REG2 {
+ regulator-name = "vcc3v3_s0";
+ regulator-always-on;
+ regulator-boot-on;
+
+ regulator-state-mem {
+ regulator-off-in-suspend;
+ };
+ };
+ };
+ };
+
+ vdd_cpu_b: regulator@40 {
+ compatible = "silergy,syr827";
+ reg = <0x40>;
+ fcs,suspend-voltage-selector = <0>;
+ regulator-name = "vdd_cpu_b";
+ regulator-min-microvolt = <712500>;
+ regulator-max-microvolt = <1500000>;
+ regulator-ramp-delay = <1000>;
+ regulator-always-on;
+ regulator-boot-on;
+ vin-supply = <&vcc_sys>;
+
+ regulator-state-mem {
+ regulator-off-in-suspend;
+ };
+ };
+
+ vdd_gpu: regulator@41 {
+ compatible = "silergy,syr828";
+ reg = <0x41>;
+ fcs,suspend-voltage-selector = <1>;
+ regulator-name = "vdd_gpu";
+ regulator-min-microvolt = <712500>;
+ regulator-max-microvolt = <1500000>;
+ regulator-ramp-delay = <1000>;
+ regulator-always-on;
+ regulator-boot-on;
+ vin-supply = <&vcc_sys>;
+
+ regulator-state-mem {
+ regulator-off-in-suspend;
+ };
+ };
+};
+
+&i2c1 {
+ i2c-scl-rising-time-ns = <300>;
+ i2c-scl-falling-time-ns = <15>;
+ status = "okay";
+
+ es8316: codec@11 {
+ compatible = "everest,es8316";
+ reg = <0x11>;
+ clocks = <&cru SCLK_I2S_8CH_OUT>;
+ clock-names = "mclk";
+ #sound-dai-cells = <0>;
+ pinctrl-0 = <&i2s_8ch_mclk>;
+ spk-con-gpio = <&gpio3 RK_PD6 GPIO_ACTIVE_HIGH>;
+ hp-det-gpio = <&gpio3 RK_PD7 GPIO_ACTIVE_HIGH>;
+
+ port {
+ es8316_p0_0: endpoint {
+ remote-endpoint = <&i2s0_p0_0>;
+ };
+ };
+ };
+};
+
+&i2c2 {
+ status = "okay";
+};
+
+&i2s0 {
+ rockchip,playback-channels = <8>;
+ rockchip,capture-channels = <8>;
+ status = "okay";
+
+ i2s0_p0: port {
+ i2s0_p0_0: endpoint {
+ dai-format = "i2s";
+ mclk-fs = <256>;
+ remote-endpoint = <&es8316_p0_0>;
+ };
+ };
+};
+
+&i2s1 {
+ rockchip,playback-channels = <2>;
+ rockchip,capture-channels = <2>;
+ status = "okay";
+};
+
+&i2s2 {
+ status = "okay";
+};
+
+&io_domains {
+ status = "okay";
+
+ bt656-supply = <&vcc1v8_dvp>;
+ audio-supply = <&vcca1v8_codec>;
+ sdmmc-supply = <&vcc_sdio>;
+ gpio1830-supply = <&vcc_3v0>;
+};
+
+&pcie_phy {
+ status = "okay";
+};
+
+&pcie0 {
+ ep-gpios = <&gpio4 RK_PD3 GPIO_ACTIVE_HIGH>;
+ num-lanes = <4>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&pcie_clkreqn_cpm>;
+ status = "okay";
+ vpcie3v3-supply = <&vcc3v3_pcie>;
+};
+
+&pmu_io_domains {
+ pmu1830-supply = <&vcc_3v0>;
+ status = "okay";
+};
+
+&pinctrl {
+ i2s0 {
+ i2s_8ch_mclk: i2s-8ch-mclk {
+ rockchip,pins = <4 RK_PB4 1 &pcfg_pull_none>;
+ };
+ };
+
+ leds {
+ work_led_pin: work-led-pin {
+ rockchip,pins = <0 RK_PB4 RK_FUNC_GPIO &pcfg_pull_none>;
+ };
+
+ diy_led_pin: diy-led-pin {
+ rockchip,pins = <0 RK_PB5 RK_FUNC_GPIO &pcfg_pull_none>;
+ };
+ };
+
+ pcie {
+ pcie_pwr_en: pcie-pwr-en {
+ rockchip,pins = <4 RK_PD5 RK_FUNC_GPIO &pcfg_pull_up>;
+ };
+
+ pcie_3g_drv: pcie-3g-drv {
+ rockchip,pins = <0 RK_PA2 RK_FUNC_GPIO &pcfg_pull_up>;
+ };
+ };
+
+ pmic {
+ pmic_int_l: pmic-int-l {
+ rockchip,pins = <1 RK_PC5 RK_FUNC_GPIO &pcfg_pull_up>;
+ };
+
+ vsel1_pin: vsel1-pin {
+ rockchip,pins = <1 RK_PC2 RK_FUNC_GPIO &pcfg_pull_down>;
+ };
+
+ vsel2_pin: vsel2-pin {
+ rockchip,pins = <1 RK_PB6 RK_FUNC_GPIO &pcfg_pull_down>;
+ };
+ };
+
+ sdio-pwrseq {
+ wifi_enable_h: wifi-enable-h {
+ rockchip,pins = <0 RK_PB2 RK_FUNC_GPIO &pcfg_pull_none>;
+ };
+ };
+
+ usb2 {
+ vcc5v0_host_en: vcc5v0-host-en {
+ rockchip,pins = <1 RK_PA0 RK_FUNC_GPIO &pcfg_pull_up>;
+ };
+
+ vcc5v0_host3_en: vcc5v0-host3-en {
+ rockchip,pins = <1 RK_PA3 RK_FUNC_GPIO &pcfg_pull_up>;
+ };
+
+ vcc5v0_hub_en: vcc5v0-hub-en {
+ rockchip,pins = <4 RK_PD6 RK_FUNC_GPIO &pcfg_pull_up>;
+ };
+ };
+};
+
+&pwm0 {
+ status = "okay";
+};
+
+&pwm2 {
+ status = "okay";
+};
+
+&saradc {
+ vref-supply = <&vcca1v8_s3>;
+ status = "okay";
+};
+
+&sdio0 {
+ /* WiFi & BT combo module Ampak AP6356S */
+ bus-width = <4>;
+ cap-sdio-irq;
+ cap-sd-highspeed;
+ keep-power-in-suspend;
+ mmc-pwrseq = <&sdio_pwrseq>;
+ non-removable;
+ pinctrl-names = "default";
+ pinctrl-0 = <&sdio0_bus4 &sdio0_cmd &sdio0_clk>;
+ sd-uhs-sdr104;
+
+ /* Power supply */
+ vqmmc-supply = <&vcc1v8_s3>; /* IO line */
+ vmmc-supply = <&vcc_sdio>; /* card's power */
+
+ #address-cells = <1>;
+ #size-cells = <0>;
+ status = "okay";
+};
+
+&sdmmc {
+ bus-width = <4>;
+ cap-mmc-highspeed;
+ cap-sd-highspeed;
+ cd-gpios = <&gpio0 7 GPIO_ACTIVE_LOW>;
+ disable-wp;
+ max-frequency = <150000000>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&sdmmc_clk &sdmmc_cmd &sdmmc_bus4>;
+ status = "okay";
+};
+
+&sdhci {
+ bus-width = <8>;
+ mmc-hs400-1_8v;
+ mmc-hs400-enhanced-strobe;
+ non-removable;
+ status = "okay";
+};
+
+&spdif {
+ pinctrl-0 = <&spdif_bus_1>;
+ status = "okay";
+
+ spdif_p0: port {
+ spdif_p0_0: endpoint {
+ remote-endpoint = <&dit_p0_0>;
+ };
+ };
+};
+
+&tcphy0 {
+ status = "okay";
+};
+
+&tcphy1 {
+ status = "okay";
+};
+
+&tsadc {
+ /* tshut mode 0:CRU 1:GPIO */
+ rockchip,hw-tshut-mode = <1>;
+ /* tshut polarity 0:LOW 1:HIGH */
+ rockchip,hw-tshut-polarity = <1>;
+ status = "okay";
+};
+
+&u2phy0 {
+ status = "okay";
+};
+
+&u2phy0_otg {
+ status = "okay";
+};
+
+&u2phy0_host {
+ phy-supply = <&vcc5v0_host>;
+ status = "okay";
+};
+
+&u2phy1 {
+ status = "okay";
+};
+
+&u2phy1_otg {
+ status = "okay";
+};
+
+&u2phy1_host {
+ phy-supply = <&vcc5v0_host>;
+ status = "okay";
+};
+
+&uart0 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&uart0_xfer &uart0_cts>;
+ status = "okay";
+};
+
+&uart2 {
+ status = "okay";
+};
+
+&usb_host0_ehci {
+ status = "okay";
+};
+
+&usb_host0_ohci {
+ status = "okay";
+};
+
+&usb_host1_ehci {
+ status = "okay";
+};
+
+&usb_host1_ohci {
+ status = "okay";
+};
+
+&usbdrd3_0 {
+ status = "okay";
+};
+
+&usbdrd_dwc3_0 {
+ status = "okay";
+ dr_mode = "otg";
+};
+
+&usbdrd3_1 {
+ status = "okay";
+};
+
+&usbdrd_dwc3_1 {
+ status = "okay";
+ dr_mode = "host";
+};
+
+&vopb {
+ status = "okay";
+};
+
+&vopb_mmu {
+ status = "okay";
+};
+
+&vopl {
+ status = "okay";
+};
+
+&vopl_mmu {
+ status = "okay";
+};
--- /dev/null
+++ b/arch/arm/dts/rk3399-h3399pc-u-boot.dtsi
@@ -0,0 +1,14 @@
+// SPDX-License-Identifier: GPL-2.0+
+
+#include "rk3399-u-boot.dtsi"
+#include "rk3399-sdram-ddr3-1600.dtsi"
+
+/ {
+ chosen {
+ u-boot,spl-boot-order = "same-as-spl", &sdhci, &sdmmc;
+ };
+};
+
+&sdmmc {
+ pinctrl-0 = <&sdmmc_bus4 &sdmmc_clk &sdmmc_cmd &sdmmc_cd>;
+};
--- /dev/null
+++ b/configs/sharevdi-h3399pc-rk3399_defconfig
@@ -0,0 +1,72 @@
+CONFIG_ARM=y
+CONFIG_SKIP_LOWLEVEL_INIT=y
+CONFIG_COUNTER_FREQUENCY=24000000
+CONFIG_ARCH_ROCKCHIP=y
+CONFIG_TEXT_BASE=0x00200000
+CONFIG_NR_DRAM_BANKS=1
+CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y
+CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x300000
+CONFIG_ENV_OFFSET=0x3F8000
+CONFIG_DEFAULT_DEVICE_TREE="rk3399-h3399pc"
+CONFIG_ROCKCHIP_RK3399=y
+CONFIG_TARGET_EVB_RK3399=y
+CONFIG_SPL_STACK=0x400000
+CONFIG_DEBUG_UART_BASE=0xFF1A0000
+CONFIG_DEBUG_UART_CLOCK=24000000
+CONFIG_SYS_LOAD_ADDR=0x800800
+CONFIG_DEBUG_UART=y
+CONFIG_DEFAULT_FDT_FILE="rockchip/rk3399-h3399pc.dtb"
+CONFIG_DISPLAY_BOARDINFO_LATE=y
+CONFIG_SPL_MAX_SIZE=0x2e000
+CONFIG_SPL_PAD_TO=0x7f8000
+CONFIG_SPL_HAS_BSS_LINKER_SECTION=y
+CONFIG_SPL_BSS_START_ADDR=0x400000
+CONFIG_SPL_BSS_MAX_SIZE=0x2000
+# CONFIG_SPL_RAW_IMAGE_SUPPORT is not set
+# CONFIG_SPL_SHARES_INIT_SP_ADDR is not set
+CONFIG_SPL_STACK_R=y
+CONFIG_SPL_STACK_R_MALLOC_SIMPLE_LEN=0x10000
+CONFIG_TPL=y
+CONFIG_CMD_BOOTZ=y
+CONFIG_CMD_GPT=y
+CONFIG_CMD_MMC=y
+CONFIG_CMD_USB=y
+# CONFIG_CMD_SETEXPR is not set
+CONFIG_CMD_TIME=y
+CONFIG_SPL_OF_CONTROL=y
+CONFIG_OF_SPL_REMOVE_PROPS="pinctrl-0 pinctrl-names clock-names interrupt-parent assigned-clocks assigned-clock-rates assigned-clock-parents"
+CONFIG_ENV_IS_IN_MMC=y
+CONFIG_SYS_RELOC_GD_ENV_ADDR=y
+CONFIG_ROCKCHIP_GPIO=y
+CONFIG_SYS_I2C_ROCKCHIP=y
+CONFIG_MMC_DW=y
+CONFIG_MMC_DW_ROCKCHIP=y
+CONFIG_MMC_SDHCI=y
+CONFIG_MMC_SDHCI_ROCKCHIP=y
+CONFIG_ETH_DESIGNWARE=y
+CONFIG_GMAC_ROCKCHIP=y
+CONFIG_PMIC_RK8XX=y
+CONFIG_REGULATOR_PWM=y
+CONFIG_REGULATOR_RK8XX=y
+CONFIG_PWM_ROCKCHIP=y
+CONFIG_BAUDRATE=1500000
+CONFIG_DEBUG_UART_SHIFT=2
+CONFIG_SYS_NS16550_MEM32=y
+CONFIG_SYSRESET=y
+CONFIG_USB=y
+CONFIG_USB_XHCI_HCD=y
+CONFIG_USB_XHCI_DWC3=y
+CONFIG_USB_EHCI_HCD=y
+CONFIG_USB_EHCI_GENERIC=y
+CONFIG_USB_HOST_ETHER=y
+CONFIG_USB_ETHER_ASIX=y
+CONFIG_USB_ETHER_ASIX88179=y
+CONFIG_USB_ETHER_MCS7830=y
+CONFIG_USB_ETHER_RTL8152=y
+CONFIG_USB_ETHER_SMSC95XX=y
+CONFIG_VIDEO=y
+CONFIG_DISPLAY=y
+CONFIG_VIDEO_ROCKCHIP=y
+CONFIG_DISPLAY_ROCKCHIP_HDMI=y
+CONFIG_SPL_TINY_MEMSET=y
+CONFIG_ERRNO_STR=y

View file

@ -1,782 +0,0 @@
--- a/arch/arm/dts/Makefile
+++ b/arch/arm/dts/Makefile
@@ -139,6 +139,7 @@ dtb-$(CONFIG_ROCKCHIP_RK3368) += \
rk3368-px5-evb.dtb \
dtb-$(CONFIG_ROCKCHIP_RK3399) += \
+ rk3399-dlfr100.dtb \
rk3399-evb.dtb \
rk3399-ficus.dtb \
rk3399-firefly.dtb \
--- /dev/null
+++ b/arch/arm/dts/rk3399-dlfr100.dts
@@ -0,0 +1,668 @@
+// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
+/*
+ * Copyright (c) 2016 Fuzhou Rockchip Electronics Co., Ltd
+ */
+
+/dts-v1/;
+#include <dt-bindings/pwm/pwm.h>
+#include <dt-bindings/input/input.h>
+#include "rk3399.dtsi"
+#include "rk3399-opp.dtsi"
+
+/ {
+ model = "Dilusense DLFR100";
+ compatible = "dilusense,dlfr100", "rockchip,rk3399";
+
+ chosen {
+ stdout-path = "serial2:1500000n8";
+ };
+
+ sdio_pwrseq: sdio-pwrseq {
+ compatible = "mmc-pwrseq-simple";
+ clocks = <&rk808 1>;
+ clock-names = "ext_clock";
+ pinctrl-names = "default";
+ pinctrl-0 = <&wifi_enable_h>;
+ reset-gpios = <&gpio3 RK_PD4 GPIO_ACTIVE_LOW>;
+ };
+
+ clkin_gmac: external-gmac-clock {
+ compatible = "fixed-clock";
+ clock-frequency = <125000000>;
+ clock-output-names = "clkin_gmac";
+ #clock-cells = <0>;
+ };
+
+ vcc3v3_sys: vcc3v3-sys {
+ compatible = "regulator-fixed";
+ regulator-name = "vcc3v3_sys";
+ regulator-always-on;
+ regulator-boot-on;
+ regulator-min-microvolt = <3300000>;
+ regulator-max-microvolt = <3300000>;
+ };
+
+ vcc5v0_sys: vcc5v0-sys {
+ compatible = "regulator-fixed";
+ regulator-name = "vcc5v0_sys";
+ regulator-always-on;
+ regulator-boot-on;
+ regulator-min-microvolt = <5000000>;
+ regulator-max-microvolt = <5000000>;
+ };
+
+ vcc5v0_host: vcc5v0-host-regulator {
+ compatible = "regulator-fixed";
+ enable-active-high;
+ gpio = <&gpio1 RK_PA4 GPIO_ACTIVE_HIGH>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&vcc5v0_host_en>;
+ regulator-name = "vcc5v0_host";
+ };
+
+ vcc_phy: vcc-phy-regulator {
+ compatible = "regulator-fixed";
+ regulator-name = "vcc_phy";
+ regulator-always-on;
+ regulator-boot-on;
+ };
+
+ vcc_sd: vcc-sd {
+ compatible = "regulator-fixed";
+ enable-active-high;
+ gpio = <&gpio0 RK_PA1 GPIO_ACTIVE_LOW>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&vcc_sd_h>;
+ regulator-name = "vcc_sd";
+ regulator-min-microvolt = <3300000>;
+ regulator-max-microvolt = <3300000>;
+ };
+
+ adc-keys {
+ compatible = "adc-keys";
+ io-channels = <&saradc 1>;
+ io-channel-names = "buttons";
+ keyup-threshold-microvolt = <1800000>;
+ poll-interval = <100>;
+
+ button-up {
+ label = "Volume Up";
+ linux,code = <KEY_VOLUMEUP>;
+ press-threshold-microvolt = <100000>;
+ };
+
+ button-down {
+ label = "Volume Down";
+ linux,code = <KEY_VOLUMEDOWN>;
+ press-threshold-microvolt = <300000>;
+ };
+
+ back {
+ label = "Back";
+ linux,code = <KEY_BACK>;
+ press-threshold-microvolt = <985000>;
+ };
+
+ menu {
+ label = "Menu";
+ linux,code = <KEY_MENU>;
+ press-threshold-microvolt = <0x1314000>;
+ };
+ };
+
+ gpio-keys {
+ compatible = "gpio-keys";
+ autorepeat;
+ pinctrl-0 = <&pwr_btn>;
+
+ power {
+ debounce-interval = <100>;
+ gpios = <&gpio0 RK_PA5 GPIO_ACTIVE_LOW>;
+ label = "GPIO Key Power";
+ linux,code = <KEY_POWER>;
+ wakeup-source;
+ };
+ };
+};
+
+&cpu_l0 {
+ cpu-supply = <&vdd_cpu_l>;
+};
+
+&cpu_l1 {
+ cpu-supply = <&vdd_cpu_l>;
+};
+
+&cpu_l2 {
+ cpu-supply = <&vdd_cpu_l>;
+};
+
+&cpu_l3 {
+ cpu-supply = <&vdd_cpu_l>;
+};
+
+&cpu_b0 {
+ cpu-supply = <&vdd_cpu_b>;
+};
+
+&cpu_b1 {
+ cpu-supply = <&vdd_cpu_b>;
+};
+
+&emmc_phy {
+ status = "okay";
+};
+
+&gmac {
+ assigned-clocks = <&cru SCLK_RMII_SRC>;
+ assigned-clock-parents = <&clkin_gmac>;
+ clock_in_out = "input";
+ phy-supply = <&vcc_phy>;
+ phy-mode = "rgmii";
+ pinctrl-names = "default";
+ pinctrl-0 = <&rgmii_pins>;
+ snps,reset-gpio = <&gpio3 RK_PB7 GPIO_ACTIVE_LOW>;
+ snps,reset-active-low;
+ snps,reset-delays-us = <0 10000 50000>;
+ tx_delay = <0x28>;
+ rx_delay = <0x11>;
+ status = "okay";
+};
+
+&i2c0 {
+ status = "okay";
+
+ rk808: pmic@1b {
+ compatible = "rockchip,rk808";
+ reg = <0x1b>;
+ interrupt-parent = <&gpio1>;
+ interrupts = <21 IRQ_TYPE_LEVEL_LOW>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&pmic_int_l &pmic_dvs2>;
+ rockchip,system-power-controller;
+ wakeup-source;
+ #clock-cells = <1>;
+ clock-output-names = "rk808-clkout1", "rk808-clkout2";
+
+ vcc1-supply = <&vcc3v3_sys>;
+ vcc2-supply = <&vcc3v3_sys>;
+ vcc3-supply = <&vcc3v3_sys>;
+ vcc4-supply = <&vcc3v3_sys>;
+ vcc6-supply = <&vcc3v3_sys>;
+ vcc7-supply = <&vcc3v3_sys>;
+ vcc8-supply = <&vcc3v3_sys>;
+ vcc9-supply = <&vcc3v3_sys>;
+ vcc10-supply = <&vcc3v3_sys>;
+ vcc11-supply = <&vcc3v3_sys>;
+ vcc12-supply = <&vcc3v3_sys>;
+ vddio-supply = <&vcc1v8_pmu>;
+
+ regulators {
+ vdd_center: DCDC_REG1 {
+ regulator-name = "vdd_center";
+ regulator-min-microvolt = <750000>;
+ regulator-max-microvolt = <1350000>;
+ regulator-ramp-delay = <6001>;
+ regulator-always-on;
+ regulator-boot-on;
+
+ regulator-state-mem {
+ regulator-off-in-suspend;
+ };
+ };
+
+ vdd_cpu_l: DCDC_REG2 {
+ regulator-name = "vdd_cpu_l";
+ regulator-min-microvolt = <750000>;
+ regulator-max-microvolt = <1350000>;
+ regulator-ramp-delay = <6001>;
+ regulator-always-on;
+ regulator-boot-on;
+
+ regulator-state-mem {
+ regulator-off-in-suspend;
+ };
+ };
+
+ vcc_ddr: DCDC_REG3 {
+ regulator-name = "vcc_ddr";
+ regulator-always-on;
+ regulator-boot-on;
+
+ regulator-state-mem {
+ regulator-on-in-suspend;
+ };
+ };
+
+ vcc_1v8: DCDC_REG4 {
+ regulator-name = "vcc_1v8";
+ regulator-min-microvolt = <1800000>;
+ regulator-max-microvolt = <1800000>;
+ regulator-always-on;
+ regulator-boot-on;
+
+ regulator-state-mem {
+ regulator-on-in-suspend;
+ regulator-suspend-microvolt = <1800000>;
+ };
+ };
+
+ vcc1v8_dvp: LDO_REG1 {
+ regulator-name = "vcc1v8_dvp";
+ regulator-min-microvolt = <1800000>;
+ regulator-max-microvolt = <1800000>;
+ regulator-always-on;
+ regulator-boot-on;
+
+ regulator-state-mem {
+ regulator-off-in-suspend;
+ };
+ };
+
+ vcc3v0_tp: LDO_REG2 {
+ regulator-name = "vcc3v0_tp";
+ regulator-min-microvolt = <3000000>;
+ regulator-max-microvolt = <3000000>;
+ regulator-always-on;
+ regulator-boot-on;
+
+ regulator-state-mem {
+ regulator-off-in-suspend;
+ };
+ };
+
+ vcc1v8_pmu: LDO_REG3 {
+ regulator-name = "vcc1v8_pmu";
+ regulator-min-microvolt = <1800000>;
+ regulator-max-microvolt = <1800000>;
+ regulator-always-on;
+ regulator-boot-on;
+
+ regulator-state-mem {
+ regulator-on-in-suspend;
+ regulator-suspend-microvolt = <1800000>;
+ };
+ };
+
+ vcc_sdio: LDO_REG4 {
+ regulator-name = "vcc_sdio";
+ regulator-min-microvolt = <1800000>;
+ regulator-max-microvolt = <3000000>;
+ regulator-always-on;
+ regulator-boot-on;
+
+ regulator-state-mem {
+ regulator-on-in-suspend;
+ regulator-suspend-microvolt = <3000000>;
+ };
+ };
+
+ vcca3v0_codec: LDO_REG5 {
+ regulator-name = "vcca3v0_codec";
+ regulator-min-microvolt = <3000000>;
+ regulator-max-microvolt = <3000000>;
+ regulator-always-on;
+ regulator-boot-on;
+
+ regulator-state-mem {
+ regulator-off-in-suspend;
+ };
+ };
+
+ vcc_1v5: LDO_REG6 {
+ regulator-name = "vcc_1v5";
+ regulator-min-microvolt = <1500000>;
+ regulator-max-microvolt = <1500000>;
+ regulator-always-on;
+ regulator-boot-on;
+
+ regulator-state-mem {
+ regulator-on-in-suspend;
+ regulator-suspend-microvolt = <1500000>;
+ };
+ };
+
+ vcca1v8_codec: LDO_REG7 {
+ regulator-name = "vcca1v8_codec";
+ regulator-min-microvolt = <1800000>;
+ regulator-max-microvolt = <1800000>;
+ regulator-always-on;
+ regulator-boot-on;
+
+ regulator-state-mem {
+ regulator-off-in-suspend;
+ };
+ };
+
+ vcc_3v0: LDO_REG8 {
+ regulator-name = "vcc_3v0";
+ regulator-min-microvolt = <3000000>;
+ regulator-max-microvolt = <3000000>;
+ regulator-always-on;
+ regulator-boot-on;
+
+ regulator-state-mem {
+ regulator-on-in-suspend;
+ regulator-suspend-microvolt = <3000000>;
+ };
+ };
+
+ vcc3v3_s3: SWITCH_REG1 {
+ regulator-name = "vcc3v3_s3";
+ regulator-always-on;
+ regulator-boot-on;
+
+ regulator-state-mem {
+ regulator-off-in-suspend;
+ };
+ };
+
+ vcc3v3_s0: SWITCH_REG2 {
+ regulator-name = "vcc3v3_s0";
+ regulator-always-on;
+ regulator-boot-on;
+
+ regulator-state-mem {
+ regulator-off-in-suspend;
+ };
+ };
+ };
+ };
+
+ vdd_cpu_b: regulator@40 {
+ compatible = "silergy,syr827";
+ reg = <0x40>;
+ pinctrl-0 = <&vsel1_pin>;
+ pinctrl-names = "default";
+ fcs,suspend-voltage-selector = <1>;
+ regulator-name = "vdd_cpu_b";
+ regulator-min-microvolt = <712500>;
+ regulator-max-microvolt = <1500000>;
+ regulator-ramp-delay = <1000>;
+ regulator-always-on;
+ regulator-boot-on;
+ regulator-initial-state = <3>;
+ vsel-gpios = <&gpio1 RK_PC1 GPIO_ACTIVE_HIGH>;
+ vin-supply = <&vcc3v3_sys>;
+
+ regulator-state-mem {
+ regulator-off-in-suspend;
+ };
+ };
+
+ vdd_gpu: regulator@41 {
+ compatible = "silergy,syr828";
+ reg = <0x41>;
+ pinctrl-0 = <&vsel2_pin>;
+ pinctrl-names = "default";
+ fcs,suspend-voltage-selector = <1>;
+ regulator-name = "vdd_gpu";
+ regulator-min-microvolt = <712500>;
+ regulator-max-microvolt = <1500000>;
+ regulator-ramp-delay = <1000>;
+ regulator-always-on;
+ regulator-boot-on;
+ regulator-initial-state = <3>;
+ vsel-gpios = <&gpio1 RK_PB5 GPIO_ACTIVE_HIGH>;
+ vin-supply = <&vcc3v3_sys>;
+
+ regulator-state-mem {
+ regulator-off-in-suspend;
+ };
+ };
+
+ isl1208@6f {
+ compatible = "isil,isl1208";
+ reg = <0x6f>;
+ };
+};
+
+&i2c1 {
+ i2c-scl-rising-time-ns = <300>;
+ i2c-scl-falling-time-ns = <15>;
+ status = "okay";
+};
+
+&i2c2 {
+ status = "okay";
+};
+
+&i2c3 {
+ status = "okay";
+};
+
+&i2s0 {
+ rockchip,playback-channels = <8>;
+ rockchip,capture-channels = <8>;
+ status = "okay";
+};
+
+&i2s2 {
+ status = "okay";
+};
+
+&io_domains {
+ status = "okay";
+
+ bt656-supply = <&vcc_3v0>;
+ audio-supply = <&vcca1v8_codec>;
+ sdmmc-supply = <&vcc_sdio>;
+ gpio1830-supply = <&vcc_3v0>;
+};
+
+&pwm0 {
+ status = "okay";
+};
+
+&pwm1 {
+ status = "okay";
+};
+
+&pwm2 {
+ status = "okay";
+};
+
+&pwm3 {
+ status = "okay";
+};
+
+&sdio0 {
+ bus-width = <4>;
+ disable-wp;
+ cap-sd-highspeed;
+ cap-sdio-irq;
+ keep-power-in-suspend;
+ clock-frequency = <50000000>;
+ mmc-pwrseq = <&sdio_pwrseq>;
+ non-removable;
+ pinctrl-names = "default";
+ pinctrl-0 = <&sdio0_bus4 &sdio0_cmd &sdio0_clk>;
+ status = "okay";
+};
+
+&sdmmc {
+ bus-width = <4>;
+ cap-sd-highspeed;
+ cap-mmc-highspeed;
+ clock-frequency = <150000000>;
+ disable-wp;
+ pinctrl-names = "default";
+ pinctrl-0 = <&sdmmc_bus4 &sdmmc_clk &sdmmc_cmd &sdmmc_cd>;
+ sd-uhs-sdr104;
+ vmmc-supply = <&vcc_sd>;
+ vqmmc-supply = <&vcc_sdio>;
+ status = "okay";
+};
+
+&sdhci {
+ bus-width = <8>;
+ mmc-hs400-1_8v;
+ mmc-hs400-enhanced-strobe;
+ non-removable;
+ status = "okay";
+};
+
+&pcie_phy {
+ status = "okay";
+};
+
+&pcie0 {
+ ep-gpios = <&gpio4 RK_PD2 GPIO_ACTIVE_HIGH>;
+ max-link-speed = <1>;
+ num-lanes = <1>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&pcie_clkreqn_cpm>;
+ status = "okay";
+};
+
+&pinctrl {
+ buttons {
+ pwr_btn: pwr-btn {
+ rockchip,pins = <0 RK_PA5 RK_FUNC_GPIO &pcfg_pull_up>;
+ };
+ };
+
+ i2s0 {
+ i2s_8ch_mclk: i2s-8ch-mclk {
+ rockchip,pins = <4 RK_PA0 1 &pcfg_pull_none>;
+ };
+ };
+
+ pmic {
+ pmic_int_l: pmic-int-l {
+ rockchip,pins = <1 RK_PC5 RK_FUNC_GPIO &pcfg_pull_up>;
+ };
+
+ vsel1_pin: vsel1-pin {
+ rockchip,pins = <1 RK_PC1 RK_FUNC_GPIO &pcfg_pull_down>;
+ };
+
+ vsel2_pin: vsel2-pin {
+ rockchip,pins = <1 RK_PB5 RK_FUNC_GPIO &pcfg_pull_down>;
+ };
+
+ pmic_dvs2:pmic-dvs2 {
+ rockchip,pins = <1 RK_PC2 RK_FUNC_GPIO &pcfg_pull_down>;
+ };
+ };
+
+ sdio-pwrseq {
+ wifi_enable_h: wifi-enable-h {
+ rockchip,pins = <3 RK_PD4 RK_FUNC_GPIO &pcfg_pull_none>;
+ };
+ };
+
+ usb2 {
+ vcc5v0_host_en: vcc5v0-host-en {
+ rockchip,pins = <1 RK_PA4 RK_FUNC_GPIO &pcfg_pull_none>;
+ };
+ };
+
+ vcc_sd {
+ vcc_sd_h: vcc-sd-h {
+ rockchip,pins = <0 RK_PA1 RK_FUNC_GPIO &pcfg_pull_up>;
+ };
+ };
+};
+
+&tcphy0 {
+ status = "okay";
+};
+
+&tcphy1 {
+ status = "okay";
+};
+
+&tsadc {
+ /* tshut mode 0:CRU 1:GPIO */
+ rockchip,hw-tshut-mode = <1>;
+ /* tshut polarity 0:LOW 1:HIGH */
+ rockchip,hw-tshut-polarity = <1>;
+ status = "okay";
+};
+
+&u2phy0 {
+ status = "okay";
+};
+
+&u2phy0_otg {
+ status = "okay";
+};
+
+&u2phy0_host {
+ phy-supply = <&vcc5v0_host>;
+ status = "okay";
+};
+
+&u2phy1 {
+ status = "okay";
+};
+
+&u2phy1_otg {
+ status = "okay";
+};
+
+&u2phy1_host {
+ phy-supply = <&vcc5v0_host>;
+ status = "okay";
+};
+
+&uart0 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&uart0_xfer &uart0_cts>;
+ status = "okay";
+};
+
+&uart2 {
+ status = "okay";
+};
+
+&usb_host0_ehci {
+ status = "okay";
+};
+
+&usb_host0_ohci {
+ status = "okay";
+};
+
+&usb_host1_ehci {
+ status = "okay";
+};
+
+&usb_host1_ohci {
+ status = "okay";
+};
+
+&usbdrd3_0 {
+ status = "okay";
+};
+
+&usbdrd_dwc3_0 {
+ status = "okay";
+ dr_mode = "host";
+};
+
+&usbdrd3_1 {
+ status = "okay";
+};
+
+&usbdrd_dwc3_1 {
+ status = "okay";
+ dr_mode = "host";
+};
+
+&vopb {
+ status = "okay";
+};
+
+&vopb_mmu {
+ status = "okay";
+};
+
+&vopl {
+ status = "okay";
+};
+
+&vopl_mmu {
+ status = "okay";
+};
--- /dev/null
+++ b/arch/arm/dts/rk3399-dlfr100-u-boot.dtsi
@@ -0,0 +1,23 @@
+// SPDX-License-Identifier: GPL-2.0+
+
+#include "rk3399-u-boot.dtsi"
+#include "rk3399-sdram-lpddr3-4GB-1600.dtsi"
+
+/ {
+ chosen {
+ stdout-path = "serial2:1500000n8";
+ u-boot,spl-boot-order = "same-as-spl", &sdhci, &sdmmc;
+ };
+};
+
+&sdmmc {
+ u-boot,dm-pre-reloc;
+ bus-width = <4>;
+ cap-mmc-highspeed;
+ cap-sd-highspeed;
+ disable-wp;
+ max-frequency = <150000000>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&sdmmc_bus4 &sdmmc_clk &sdmmc_cmd &sdmmc_cd>;
+ status = "okay";
+};
--- /dev/null
+++ b/configs/dilusense-dlfr100-rk3399_defconfig
@@ -0,0 +1,72 @@
+CONFIG_ARM=y
+CONFIG_SKIP_LOWLEVEL_INIT=y
+CONFIG_COUNTER_FREQUENCY=24000000
+CONFIG_ARCH_ROCKCHIP=y
+CONFIG_TEXT_BASE=0x00200000
+CONFIG_NR_DRAM_BANKS=1
+CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y
+CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x300000
+CONFIG_ENV_OFFSET=0x3F8000
+CONFIG_DEFAULT_DEVICE_TREE="rk3399-dlfr100"
+CONFIG_ROCKCHIP_RK3399=y
+CONFIG_TARGET_EVB_RK3399=y
+CONFIG_SPL_STACK=0x400000
+CONFIG_DEBUG_UART_BASE=0xFF1A0000
+CONFIG_DEBUG_UART_CLOCK=24000000
+CONFIG_SYS_LOAD_ADDR=0x800800
+CONFIG_DEBUG_UART=y
+CONFIG_DEFAULT_FDT_FILE="rockchip/rk3399-dlfr100.dtb"
+CONFIG_DISPLAY_BOARDINFO_LATE=y
+CONFIG_SPL_MAX_SIZE=0x2e000
+CONFIG_SPL_PAD_TO=0x7f8000
+CONFIG_SPL_HAS_BSS_LINKER_SECTION=y
+CONFIG_SPL_BSS_START_ADDR=0x400000
+CONFIG_SPL_BSS_MAX_SIZE=0x2000
+# CONFIG_SPL_RAW_IMAGE_SUPPORT is not set
+# CONFIG_SPL_SHARES_INIT_SP_ADDR is not set
+CONFIG_SPL_STACK_R=y
+CONFIG_SPL_STACK_R_MALLOC_SIMPLE_LEN=0x10000
+CONFIG_TPL=y
+CONFIG_CMD_BOOTZ=y
+CONFIG_CMD_GPT=y
+CONFIG_CMD_MMC=y
+CONFIG_CMD_USB=y
+# CONFIG_CMD_SETEXPR is not set
+CONFIG_CMD_TIME=y
+CONFIG_SPL_OF_CONTROL=y
+CONFIG_OF_SPL_REMOVE_PROPS="pinctrl-0 pinctrl-names clock-names interrupt-parent assigned-clocks assigned-clock-rates assigned-clock-parents"
+CONFIG_ENV_IS_IN_MMC=y
+CONFIG_SYS_RELOC_GD_ENV_ADDR=y
+CONFIG_ROCKCHIP_GPIO=y
+CONFIG_SYS_I2C_ROCKCHIP=y
+CONFIG_MMC_DW=y
+CONFIG_MMC_DW_ROCKCHIP=y
+CONFIG_MMC_SDHCI=y
+CONFIG_MMC_SDHCI_ROCKCHIP=y
+CONFIG_ETH_DESIGNWARE=y
+CONFIG_GMAC_ROCKCHIP=y
+CONFIG_PMIC_RK8XX=y
+CONFIG_REGULATOR_PWM=y
+CONFIG_REGULATOR_RK8XX=y
+CONFIG_PWM_ROCKCHIP=y
+CONFIG_BAUDRATE=1500000
+CONFIG_DEBUG_UART_SHIFT=2
+CONFIG_SYS_NS16550_MEM32=y
+CONFIG_SYSRESET=y
+CONFIG_USB=y
+CONFIG_USB_XHCI_HCD=y
+CONFIG_USB_XHCI_DWC3=y
+CONFIG_USB_EHCI_HCD=y
+CONFIG_USB_EHCI_GENERIC=y
+CONFIG_USB_HOST_ETHER=y
+CONFIG_USB_ETHER_ASIX=y
+CONFIG_USB_ETHER_ASIX88179=y
+CONFIG_USB_ETHER_MCS7830=y
+CONFIG_USB_ETHER_RTL8152=y
+CONFIG_USB_ETHER_SMSC95XX=y
+CONFIG_VIDEO=y
+CONFIG_DISPLAY=y
+CONFIG_VIDEO_ROCKCHIP=y
+CONFIG_DISPLAY_ROCKCHIP_HDMI=y
+CONFIG_SPL_TINY_MEMSET=y
+CONFIG_ERRNO_STR=y

View file

@ -1,399 +0,0 @@
--- a/arch/arm/dts/Makefile
+++ b/arch/arm/dts/Makefile
@@ -171,6 +171,7 @@ dtb-$(CONFIG_ROCKCHIP_RK3399) += \
dtb-$(CONFIG_ROCKCHIP_RK3568) += \
rk3568-evb.dtb \
+ rk3568-mrkaio-m68s.dtb \
rk3568-nanopi-r5s.dtb \
rk3566-radxa-cm3-io.dtb \
rk3568-rock-3a.dtb
--- /dev/null
+++ b/arch/arm/dts/rk3568-mrkaio-m68s-u-boot.dtsi
@@ -0,0 +1,21 @@
+// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
+
+#include "rk356x-u-boot.dtsi"
+
+/ {
+ chosen {
+ stdout-path = &uart2;
+ u-boot,spl-boot-order = "same-as-spl", &sdmmc0, &sdhci;
+ };
+};
+
+&sdmmc0 {
+ bus-width = <4>;
+ u-boot,spl-fifo-mode;
+};
+
+&uart2 {
+ u-boot,dm-spl;
+ clock-frequency = <24000000>;
+ status = "okay";
+};
--- /dev/null
+++ b/arch/arm/dts/rk3568-mrkaio-m68s.dts
@@ -0,0 +1,268 @@
+// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
+
+#include "rk3568-evb.dts"
+
+/ {
+ model = "EZPRO Mrkaio M68S";
+ compatible = "ezpro,mrkaio-m68s", "rockchip,rk3568";
+
+ aliases {
+ mmc0 = &sdmmc0;
+ mmc1 = &sdhci;
+ };
+};
+
+&cpu0 {
+ cpu-supply = <&vdd_cpu>;
+};
+
+&cpu1 {
+ cpu-supply = <&vdd_cpu>;
+};
+
+&cpu2 {
+ cpu-supply = <&vdd_cpu>;
+};
+
+&cpu3 {
+ cpu-supply = <&vdd_cpu>;
+};
+
+&i2c0 {
+ status = "okay";
+
+ vdd_cpu: regulator@1c {
+ compatible = "tcs,tcs4525";
+ reg = <0x1c>;
+ fcs,suspend-voltage-selector = <1>;
+ regulator-name = "vdd_cpu";
+ regulator-always-on;
+ regulator-boot-on;
+ regulator-min-microvolt = <712500>;
+ regulator-max-microvolt = <1150000>;
+ regulator-ramp-delay = <2300>;
+ vin-supply = <&vcc5v0_sys>;
+
+ regulator-state-mem {
+ regulator-off-in-suspend;
+ };
+ };
+
+ rk809: pmic@20 {
+ compatible = "rockchip,rk809";
+ reg = <0x20>;
+ interrupt-parent = <&gpio0>;
+ interrupts = <RK_PA3 IRQ_TYPE_LEVEL_LOW>;
+ #clock-cells = <1>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&pmic_int>;
+ rockchip,system-power-controller;
+
+ vcc1-supply = <&vcc3v3_sys>;
+ vcc2-supply = <&vcc3v3_sys>;
+ vcc3-supply = <&vcc3v3_sys>;
+ vcc4-supply = <&vcc3v3_sys>;
+ vcc5-supply = <&vcc3v3_sys>;
+ vcc6-supply = <&vcc3v3_sys>;
+ vcc7-supply = <&vcc3v3_sys>;
+ vcc8-supply = <&vcc3v3_sys>;
+ vcc9-supply = <&vcc3v3_sys>;
+ wakeup-source;
+
+ regulators {
+ vdd_logic: DCDC_REG1 {
+ regulator-name = "vdd_logic";
+ regulator-always-on;
+ regulator-boot-on;
+ regulator-init-microvolt = <900000>;
+ regulator-initial-mode = <0x2>;
+ regulator-min-microvolt = <500000>;
+ regulator-max-microvolt = <1350000>;
+ regulator-ramp-delay = <6001>;
+
+ regulator-state-mem {
+ regulator-off-in-suspend;
+ };
+ };
+
+ vdd_gpu: DCDC_REG2 {
+ regulator-name = "vdd_gpu";
+ regulator-always-on;
+ regulator-init-microvolt = <900000>;
+ regulator-initial-mode = <0x2>;
+ regulator-min-microvolt = <500000>;
+ regulator-max-microvolt = <1350000>;
+ regulator-ramp-delay = <6001>;
+
+ regulator-state-mem {
+ regulator-off-in-suspend;
+ };
+ };
+
+ vcc_ddr: DCDC_REG3 {
+ regulator-name = "vcc_ddr";
+ regulator-always-on;
+ regulator-boot-on;
+ regulator-initial-mode = <0x2>;
+
+ regulator-state-mem {
+ regulator-on-in-suspend;
+ };
+ };
+
+ vdd_npu: DCDC_REG4 {
+ regulator-name = "vdd_npu";
+ regulator-init-microvolt = <900000>;
+ regulator-initial-mode = <0x2>;
+ regulator-min-microvolt = <500000>;
+ regulator-max-microvolt = <1350000>;
+ regulator-ramp-delay = <6001>;
+
+ regulator-state-mem {
+ regulator-off-in-suspend;
+ };
+ };
+
+ vcc_1v8: DCDC_REG5 {
+ regulator-name = "vcc_1v8";
+ regulator-always-on;
+ regulator-boot-on;
+ regulator-min-microvolt = <1800000>;
+ regulator-max-microvolt = <1800000>;
+
+ regulator-state-mem {
+ regulator-off-in-suspend;
+ };
+ };
+
+ vdda0v9_image: LDO_REG1 {
+ regulator-name = "vdda0v9_image";
+ regulator-min-microvolt = <900000>;
+ regulator-max-microvolt = <900000>;
+
+ regulator-state-mem {
+ regulator-off-in-suspend;
+ };
+ };
+
+ vdda_0v9: LDO_REG2 {
+ regulator-name = "vdda_0v9";
+ regulator-always-on;
+ regulator-boot-on;
+ regulator-min-microvolt = <900000>;
+ regulator-max-microvolt = <900000>;
+
+ regulator-state-mem {
+ regulator-off-in-suspend;
+ };
+ };
+
+ vdda0v9_pmu: LDO_REG3 {
+ regulator-name = "vdda0v9_pmu";
+ regulator-always-on;
+ regulator-boot-on;
+ regulator-min-microvolt = <900000>;
+ regulator-max-microvolt = <900000>;
+
+ regulator-state-mem {
+ regulator-on-in-suspend;
+ regulator-suspend-microvolt = <900000>;
+ };
+ };
+
+ vccio_acodec: LDO_REG4 {
+ regulator-name = "vccio_acodec";
+ regulator-min-microvolt = <3300000>;
+ regulator-max-microvolt = <3300000>;
+
+ regulator-state-mem {
+ regulator-off-in-suspend;
+ };
+ };
+
+ vccio_sd: LDO_REG5 {
+ regulator-name = "vccio_sd";
+ regulator-min-microvolt = <1800000>;
+ regulator-max-microvolt = <3300000>;
+
+ regulator-state-mem {
+ regulator-off-in-suspend;
+ };
+ };
+
+ vcc3v3_pmu: LDO_REG6 {
+ regulator-name = "vcc3v3_pmu";
+ regulator-always-on;
+ regulator-boot-on;
+ regulator-min-microvolt = <3300000>;
+ regulator-max-microvolt = <3300000>;
+
+ regulator-state-mem {
+ regulator-on-in-suspend;
+ regulator-suspend-microvolt = <3300000>;
+ };
+ };
+
+ vcca_1v8: LDO_REG7 {
+ regulator-name = "vcca_1v8";
+ regulator-always-on;
+ regulator-boot-on;
+ regulator-min-microvolt = <1800000>;
+ regulator-max-microvolt = <1800000>;
+
+ regulator-state-mem {
+ regulator-off-in-suspend;
+ };
+ };
+
+ vcca1v8_pmu: LDO_REG8 {
+ regulator-name = "vcca1v8_pmu";
+ regulator-always-on;
+ regulator-boot-on;
+ regulator-min-microvolt = <1800000>;
+ regulator-max-microvolt = <1800000>;
+
+ regulator-state-mem {
+ regulator-on-in-suspend;
+ regulator-suspend-microvolt = <1800000>;
+ };
+ };
+
+ vcca1v8_image: LDO_REG9 {
+ regulator-name = "vcca1v8_image";
+ regulator-min-microvolt = <1800000>;
+ regulator-max-microvolt = <1800000>;
+
+ regulator-state-mem {
+ regulator-off-in-suspend;
+ };
+ };
+
+ vcc_3v3: SWITCH_REG1 {
+ regulator-name = "vcc_3v3";
+ regulator-always-on;
+ regulator-boot-on;
+
+ regulator-state-mem {
+ regulator-off-in-suspend;
+ };
+ };
+
+ vcc3v3_sd: SWITCH_REG2 {
+ regulator-name = "vcc3v3_sd";
+
+ regulator-state-mem {
+ regulator-off-in-suspend;
+ };
+ };
+ };
+ };
+};
+
+&pinctrl {
+ pmic {
+ pmic_int: pmic_int {
+ rockchip,pins = <0 RK_PA3 RK_FUNC_GPIO &pcfg_pull_up>;
+ };
+ };
+};
--- /dev/null
+++ b/configs/mrkaio-m68s-rk3568_defconfig
@@ -0,0 +1,91 @@
+CONFIG_ARM=y
+CONFIG_SKIP_LOWLEVEL_INIT=y
+CONFIG_COUNTER_FREQUENCY=24000000
+CONFIG_ARCH_ROCKCHIP=y
+CONFIG_TEXT_BASE=0x00a00000
+CONFIG_SPL_LIBCOMMON_SUPPORT=y
+CONFIG_SPL_LIBGENERIC_SUPPORT=y
+CONFIG_NR_DRAM_BANKS=2
+CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y
+CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0xc00000
+CONFIG_DEFAULT_DEVICE_TREE="rk3568-mrkaio-m68s"
+CONFIG_ROCKCHIP_RK3568=y
+CONFIG_SPL_ROCKCHIP_BACK_TO_BROM=y
+CONFIG_SPL_ROCKCHIP_COMMON_BOARD=y
+CONFIG_SPL_BOARD_INIT=y
+CONFIG_SPL_MMC=y
+CONFIG_SPL_SERIAL=y
+CONFIG_SPL_STACK_R_ADDR=0x600000
+CONFIG_TARGET_EVB_RK3568=y
+CONFIG_SPL_STACK=0x400000
+CONFIG_DEBUG_UART_BASE=0xFE660000
+CONFIG_DEBUG_UART_CLOCK=24000000
+CONFIG_SYS_LOAD_ADDR=0xc00800
+CONFIG_DEBUG_UART=y
+CONFIG_FIT=y
+CONFIG_FIT_VERBOSE=y
+CONFIG_SPL_LOAD_FIT=y
+CONFIG_DEFAULT_FDT_FILE="rockchip/rk3568-mrkaio-m68s.dtb"
+# CONFIG_DISPLAY_CPUINFO is not set
+CONFIG_DISPLAY_BOARDINFO_LATE=y
+CONFIG_SPL_MAX_SIZE=0x40000
+CONFIG_SPL_PAD_TO=0x7f8000
+CONFIG_SPL_HAS_BSS_LINKER_SECTION=y
+CONFIG_SPL_BSS_START_ADDR=0x4000000
+CONFIG_SPL_BSS_MAX_SIZE=0x4000
+# CONFIG_SPL_RAW_IMAGE_SUPPORT is not set
+# CONFIG_SPL_SHARES_INIT_SP_ADDR is not set
+CONFIG_SPL_STACK_R=y
+CONFIG_SPL_ADC=y
+CONFIG_SPL_ATF=y
+CONFIG_CMD_ADC=y
+CONFIG_CMD_GPIO=y
+CONFIG_CMD_GPT=y
+CONFIG_CMD_I2C=y
+CONFIG_CMD_MMC=y
+CONFIG_CMD_USB=y
+CONFIG_CMD_REGULATOR=y
+# CONFIG_CMD_SETEXPR is not set
+# CONFIG_SPL_DOS_PARTITION is not set
+CONFIG_SPL_OF_CONTROL=y
+CONFIG_OF_LIVE=y
+CONFIG_NET_RANDOM_ETHADDR=y
+CONFIG_SPL_REGMAP=y
+CONFIG_SPL_SYSCON=y
+CONFIG_SPL_CLK=y
+CONFIG_CLK_SCMI=y
+CONFIG_RESET_SCMI=y
+CONFIG_ROCKCHIP_GPIO=y
+CONFIG_SYS_I2C_ROCKCHIP=y
+CONFIG_MISC=y
+CONFIG_SUPPORT_EMMC_RPMB=y
+CONFIG_MMC_DW=y
+CONFIG_MMC_DW_ROCKCHIP=y
+CONFIG_MMC_SDHCI=y
+CONFIG_MMC_SDHCI_SDMA=y
+CONFIG_MMC_SDHCI_ROCKCHIP=y
+CONFIG_ETH_DESIGNWARE=y
+CONFIG_GMAC_ROCKCHIP=y
+CONFIG_DM_PMIC=y
+CONFIG_PMIC_RK8XX=y
+CONFIG_SPL_PMIC_RK8XX=y
+CONFIG_PHY_ROCKCHIP_INNO_USB2=y
+CONFIG_PHY_ROCKCHIP_NANENG_COMBOPHY=y
+CONFIG_REGULATOR_PWM=y
+CONFIG_DM_REGULATOR_FIXED=y
+CONFIG_SPL_DM_REGULATOR_FIXED=y
+CONFIG_REGULATOR_RK8XX=y
+CONFIG_PWM_ROCKCHIP=y
+CONFIG_SPL_RAM=y
+CONFIG_BAUDRATE=1500000
+CONFIG_DEBUG_UART_SHIFT=2
+CONFIG_SYS_NS16550_MEM32=y
+CONFIG_SYSRESET=y
+CONFIG_USB=y
+CONFIG_USB_XHCI_HCD=y
+CONFIG_USB_XHCI_DWC3=y
+CONFIG_USB_EHCI_HCD=y
+CONFIG_USB_EHCI_GENERIC=y
+CONFIG_USB_DWC3=y
+CONFIG_USB_DWC3_GENERIC=y
+CONFIG_ERRNO_STR=y

View file

@ -1,408 +0,0 @@
--- a/arch/arm/dts/Makefile
+++ b/arch/arm/dts/Makefile
@@ -171,6 +171,7 @@ dtb-$(CONFIG_ROCKCHIP_RK3399) += \
dtb-$(CONFIG_ROCKCHIP_RK3568) += \
rk3568-evb.dtb \
+ rk3568-opc-h68k.dtb \
rk3568-mrkaio-m68s.dtb \
rk3568-nanopi-r5s.dtb \
rk3566-radxa-cm3-io.dtb \
--- /dev/null
+++ b/arch/arm/dts/rk3568-opc-h68k-u-boot.dtsi
@@ -0,0 +1,21 @@
+// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
+
+#include "rk356x-u-boot.dtsi"
+
+/ {
+ chosen {
+ stdout-path = &uart2;
+ u-boot,spl-boot-order = "same-as-spl", &sdmmc0, &sdhci;
+ };
+};
+
+&sdmmc0 {
+ bus-width = <4>;
+ u-boot,spl-fifo-mode;
+};
+
+&uart2 {
+ u-boot,dm-spl;
+ clock-frequency = <24000000>;
+ status = "okay";
+};
--- /dev/null
+++ b/arch/arm/dts/rk3568-opc-h68k.dts
@@ -0,0 +1,277 @@
+// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
+
+#include "rk3568-evb.dts"
+
+/ {
+ model = "HINLINK OPC-H68K Board";
+ compatible = "hinlink,opc-h68k", "rockchip,rk3568";
+
+ aliases {
+ mmc0 = &sdmmc0;
+ mmc1 = &sdhci;
+ };
+};
+
+&cpu0 {
+ cpu-supply = <&vdd_cpu>;
+};
+
+&cpu1 {
+ cpu-supply = <&vdd_cpu>;
+};
+
+&cpu2 {
+ cpu-supply = <&vdd_cpu>;
+};
+
+&cpu3 {
+ cpu-supply = <&vdd_cpu>;
+};
+
+&i2c0 {
+ status = "okay";
+
+ vdd_cpu: regulator@1c {
+ compatible = "tcs,tcs4525";
+ reg = <0x1c>;
+ fcs,suspend-voltage-selector = <1>;
+ regulator-name = "vdd_cpu";
+ regulator-always-on;
+ regulator-boot-on;
+ regulator-min-microvolt = <800000>;
+ regulator-max-microvolt = <1150000>;
+ regulator-ramp-delay = <2300>;
+ vin-supply = <&vcc5v0_sys>;
+
+ regulator-state-mem {
+ regulator-off-in-suspend;
+ };
+ };
+
+ rk809: pmic@20 {
+ compatible = "rockchip,rk809";
+ reg = <0x20>;
+ interrupt-parent = <&gpio0>;
+ interrupts = <RK_PA3 IRQ_TYPE_LEVEL_LOW>;
+ assigned-clocks = <&cru I2S1_MCLKOUT_TX>;
+ assigned-clock-parents = <&cru CLK_I2S1_8CH_TX>;
+ #clock-cells = <1>;
+ clock-names = "mclk";
+ clocks = <&cru I2S1_MCLKOUT_TX>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&pmic_int>, <&i2s1m0_mclk>;
+ rockchip,system-power-controller;
+ #sound-dai-cells = <0>;
+ vcc1-supply = <&vcc3v3_sys>;
+ vcc2-supply = <&vcc3v3_sys>;
+ vcc3-supply = <&vcc3v3_sys>;
+ vcc4-supply = <&vcc3v3_sys>;
+ vcc5-supply = <&vcc3v3_sys>;
+ vcc6-supply = <&vcc3v3_sys>;
+ vcc7-supply = <&vcc3v3_sys>;
+ vcc8-supply = <&vcc3v3_sys>;
+ vcc9-supply = <&vcc3v3_sys>;
+ wakeup-source;
+
+ regulators {
+ vdd_logic: DCDC_REG1 {
+ regulator-name = "vdd_logic";
+ regulator-always-on;
+ regulator-boot-on;
+ regulator-init-microvolt = <900000>;
+ regulator-initial-mode = <0x2>;
+ regulator-min-microvolt = <500000>;
+ regulator-max-microvolt = <1350000>;
+ regulator-ramp-delay = <6001>;
+
+ regulator-state-mem {
+ regulator-off-in-suspend;
+ };
+ };
+
+ vdd_gpu: DCDC_REG2 {
+ regulator-name = "vdd_gpu";
+ regulator-always-on;
+ regulator-init-microvolt = <900000>;
+ regulator-initial-mode = <0x2>;
+ regulator-min-microvolt = <500000>;
+ regulator-max-microvolt = <1350000>;
+ regulator-ramp-delay = <6001>;
+
+ regulator-state-mem {
+ regulator-off-in-suspend;
+ };
+ };
+
+ vcc_ddr: DCDC_REG3 {
+ regulator-name = "vcc_ddr";
+ regulator-always-on;
+ regulator-boot-on;
+ regulator-initial-mode = <0x2>;
+
+ regulator-state-mem {
+ regulator-on-in-suspend;
+ };
+ };
+
+ vdd_npu: DCDC_REG4 {
+ regulator-name = "vdd_npu";
+ regulator-init-microvolt = <900000>;
+ regulator-initial-mode = <0x2>;
+ regulator-min-microvolt = <500000>;
+ regulator-max-microvolt = <1350000>;
+ regulator-ramp-delay = <6001>;
+
+ regulator-state-mem {
+ regulator-off-in-suspend;
+ };
+ };
+
+ vcc_1v8: DCDC_REG5 {
+ regulator-name = "vcc_1v8";
+ regulator-always-on;
+ regulator-boot-on;
+ regulator-min-microvolt = <1800000>;
+ regulator-max-microvolt = <1800000>;
+
+ regulator-state-mem {
+ regulator-off-in-suspend;
+ };
+ };
+
+ vdda0v9_image: LDO_REG1 {
+ regulator-name = "vdda0v9_image";
+ regulator-min-microvolt = <900000>;
+ regulator-max-microvolt = <900000>;
+
+ regulator-state-mem {
+ regulator-off-in-suspend;
+ };
+ };
+
+ vdda_0v9: LDO_REG2 {
+ regulator-name = "vdda_0v9";
+ regulator-always-on;
+ regulator-boot-on;
+ regulator-min-microvolt = <900000>;
+ regulator-max-microvolt = <900000>;
+
+ regulator-state-mem {
+ regulator-off-in-suspend;
+ };
+ };
+
+ vdda0v9_pmu: LDO_REG3 {
+ regulator-name = "vdda0v9_pmu";
+ regulator-always-on;
+ regulator-boot-on;
+ regulator-min-microvolt = <900000>;
+ regulator-max-microvolt = <900000>;
+
+ regulator-state-mem {
+ regulator-on-in-suspend;
+ regulator-suspend-microvolt = <900000>;
+ };
+ };
+
+ vccio_acodec: LDO_REG4 {
+ regulator-name = "vccio_acodec";
+ regulator-always-on;
+ regulator-min-microvolt = <3300000>;
+ regulator-max-microvolt = <3300000>;
+
+ regulator-state-mem {
+ regulator-off-in-suspend;
+ };
+ };
+
+ vccio_sd: LDO_REG5 {
+ regulator-name = "vccio_sd";
+ regulator-min-microvolt = <1800000>;
+ regulator-max-microvolt = <3300000>;
+
+ regulator-state-mem {
+ regulator-off-in-suspend;
+ };
+ };
+
+ vcc3v3_pmu: LDO_REG6 {
+ regulator-name = "vcc3v3_pmu";
+ regulator-always-on;
+ regulator-boot-on;
+ regulator-min-microvolt = <3300000>;
+ regulator-max-microvolt = <3300000>;
+
+ regulator-state-mem {
+ regulator-on-in-suspend;
+ regulator-suspend-microvolt = <3300000>;
+ };
+ };
+
+ vcca_1v8: LDO_REG7 {
+ regulator-name = "vcca_1v8";
+ regulator-always-on;
+ regulator-boot-on;
+ regulator-min-microvolt = <1800000>;
+ regulator-max-microvolt = <1800000>;
+
+ regulator-state-mem {
+ regulator-off-in-suspend;
+ };
+ };
+
+ vcca1v8_pmu: LDO_REG8 {
+ regulator-name = "vcca1v8_pmu";
+ regulator-always-on;
+ regulator-boot-on;
+ regulator-min-microvolt = <1800000>;
+ regulator-max-microvolt = <1800000>;
+
+ regulator-state-mem {
+ regulator-on-in-suspend;
+ regulator-suspend-microvolt = <1800000>;
+ };
+ };
+
+ vcca1v8_image: LDO_REG9 {
+ regulator-name = "vcca1v8_image";
+ regulator-min-microvolt = <1800000>;
+ regulator-max-microvolt = <1800000>;
+
+ regulator-state-mem {
+ regulator-off-in-suspend;
+ };
+ };
+
+ vcc_3v3: SWITCH_REG1 {
+ regulator-name = "vcc_3v3";
+ regulator-always-on;
+ regulator-boot-on;
+
+ regulator-state-mem {
+ regulator-off-in-suspend;
+ };
+ };
+
+ vcc3v3_sd: SWITCH_REG2 {
+ regulator-name = "vcc3v3_sd";
+
+ regulator-state-mem {
+ regulator-off-in-suspend;
+ };
+ };
+ };
+
+ codec {
+ mic-in-differential;
+ };
+ };
+};
+
+&pinctrl {
+ pmic {
+ pmic_int: pmic_int {
+ rockchip,pins = <0 RK_PA3 RK_FUNC_GPIO &pcfg_pull_up>;
+ };
+ };
+};
--- /dev/null
+++ b/configs/opc-h68k-rk3568_defconfig
@@ -0,0 +1,91 @@
+CONFIG_ARM=y
+CONFIG_SKIP_LOWLEVEL_INIT=y
+CONFIG_COUNTER_FREQUENCY=24000000
+CONFIG_ARCH_ROCKCHIP=y
+CONFIG_TEXT_BASE=0x00a00000
+CONFIG_SPL_LIBCOMMON_SUPPORT=y
+CONFIG_SPL_LIBGENERIC_SUPPORT=y
+CONFIG_NR_DRAM_BANKS=2
+CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y
+CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0xc00000
+CONFIG_DEFAULT_DEVICE_TREE="rk3568-opc-h68k"
+CONFIG_ROCKCHIP_RK3568=y
+CONFIG_SPL_ROCKCHIP_BACK_TO_BROM=y
+CONFIG_SPL_ROCKCHIP_COMMON_BOARD=y
+CONFIG_SPL_BOARD_INIT=y
+CONFIG_SPL_MMC=y
+CONFIG_SPL_SERIAL=y
+CONFIG_SPL_STACK_R_ADDR=0x600000
+CONFIG_TARGET_EVB_RK3568=y
+CONFIG_SPL_STACK=0x400000
+CONFIG_DEBUG_UART_BASE=0xFE660000
+CONFIG_DEBUG_UART_CLOCK=24000000
+CONFIG_SYS_LOAD_ADDR=0xc00800
+CONFIG_DEBUG_UART=y
+CONFIG_FIT=y
+CONFIG_FIT_VERBOSE=y
+CONFIG_SPL_LOAD_FIT=y
+CONFIG_DEFAULT_FDT_FILE="rockchip/rk3568-opc-h68k.dtb"
+# CONFIG_DISPLAY_CPUINFO is not set
+CONFIG_DISPLAY_BOARDINFO_LATE=y
+CONFIG_SPL_MAX_SIZE=0x40000
+CONFIG_SPL_PAD_TO=0x7f8000
+CONFIG_SPL_HAS_BSS_LINKER_SECTION=y
+CONFIG_SPL_BSS_START_ADDR=0x4000000
+CONFIG_SPL_BSS_MAX_SIZE=0x4000
+# CONFIG_SPL_RAW_IMAGE_SUPPORT is not set
+# CONFIG_SPL_SHARES_INIT_SP_ADDR is not set
+CONFIG_SPL_STACK_R=y
+CONFIG_SPL_ADC=y
+CONFIG_SPL_ATF=y
+CONFIG_CMD_ADC=y
+CONFIG_CMD_GPIO=y
+CONFIG_CMD_GPT=y
+CONFIG_CMD_I2C=y
+CONFIG_CMD_MMC=y
+CONFIG_CMD_USB=y
+CONFIG_CMD_REGULATOR=y
+# CONFIG_CMD_SETEXPR is not set
+# CONFIG_SPL_DOS_PARTITION is not set
+CONFIG_SPL_OF_CONTROL=y
+CONFIG_OF_LIVE=y
+CONFIG_NET_RANDOM_ETHADDR=y
+CONFIG_SPL_REGMAP=y
+CONFIG_SPL_SYSCON=y
+CONFIG_SPL_CLK=y
+CONFIG_CLK_SCMI=y
+CONFIG_RESET_SCMI=y
+CONFIG_ROCKCHIP_GPIO=y
+CONFIG_SYS_I2C_ROCKCHIP=y
+CONFIG_MISC=y
+CONFIG_SUPPORT_EMMC_RPMB=y
+CONFIG_MMC_DW=y
+CONFIG_MMC_DW_ROCKCHIP=y
+CONFIG_MMC_SDHCI=y
+CONFIG_MMC_SDHCI_SDMA=y
+CONFIG_MMC_SDHCI_ROCKCHIP=y
+CONFIG_ETH_DESIGNWARE=y
+CONFIG_GMAC_ROCKCHIP=y
+CONFIG_DM_PMIC=y
+CONFIG_PMIC_RK8XX=y
+CONFIG_SPL_PMIC_RK8XX=y
+CONFIG_PHY_ROCKCHIP_INNO_USB2=y
+CONFIG_PHY_ROCKCHIP_NANENG_COMBOPHY=y
+CONFIG_REGULATOR_PWM=y
+CONFIG_DM_REGULATOR_FIXED=y
+CONFIG_SPL_DM_REGULATOR_FIXED=y
+CONFIG_REGULATOR_RK8XX=y
+CONFIG_PWM_ROCKCHIP=y
+CONFIG_SPL_RAM=y
+CONFIG_BAUDRATE=1500000
+CONFIG_DEBUG_UART_SHIFT=2
+CONFIG_SYS_NS16550_MEM32=y
+CONFIG_SYSRESET=y
+CONFIG_USB=y
+CONFIG_USB_XHCI_HCD=y
+CONFIG_USB_XHCI_DWC3=y
+CONFIG_USB_EHCI_HCD=y
+CONFIG_USB_EHCI_GENERIC=y
+CONFIG_USB_DWC3=y
+CONFIG_USB_DWC3_GENERIC=y
+CONFIG_ERRNO_STR=y

View file

@ -1,133 +0,0 @@
--- a/arch/arm/dts/Makefile
+++ b/arch/arm/dts/Makefile
@@ -171,6 +171,7 @@ dtb-$(CONFIG_ROCKCHIP_RK3399) += \
dtb-$(CONFIG_ROCKCHIP_RK3568) += \
rk3568-evb.dtb \
+ rk3568-r66s.dtb \
rk3568-opc-h68k.dtb \
rk3568-mrkaio-m68s.dtb \
rk3568-nanopi-r5s.dtb \
--- /dev/null
+++ b/arch/arm/dts/rk3568-r66s-u-boot.dtsi
@@ -0,0 +1,21 @@
+// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
+
+#include "rk356x-u-boot.dtsi"
+
+/ {
+ chosen {
+ stdout-path = &uart2;
+ u-boot,spl-boot-order = "same-as-spl", &sdmmc0, &sdhci;
+ };
+};
+
+&sdmmc0 {
+ bus-width = <4>;
+ u-boot,spl-fifo-mode;
+};
+
+&uart2 {
+ u-boot,dm-spl;
+ clock-frequency = <24000000>;
+ status = "okay";
+};
--- /dev/null
+++ b/arch/arm/dts/rk3568-r66s.dts
@@ -0,0 +1,2 @@
+// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
+#include "rk3568-evb.dts"
--- /dev/null
+++ b/configs/r66s-rk3568_defconfig
@@ -0,0 +1,91 @@
+CONFIG_ARM=y
+CONFIG_SKIP_LOWLEVEL_INIT=y
+CONFIG_COUNTER_FREQUENCY=24000000
+CONFIG_ARCH_ROCKCHIP=y
+CONFIG_TEXT_BASE=0x00a00000
+CONFIG_SPL_LIBCOMMON_SUPPORT=y
+CONFIG_SPL_LIBGENERIC_SUPPORT=y
+CONFIG_NR_DRAM_BANKS=2
+CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y
+CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0xc00000
+CONFIG_DEFAULT_DEVICE_TREE="rk3568-r66s"
+CONFIG_ROCKCHIP_RK3568=y
+CONFIG_SPL_ROCKCHIP_BACK_TO_BROM=y
+CONFIG_SPL_ROCKCHIP_COMMON_BOARD=y
+CONFIG_SPL_BOARD_INIT=y
+CONFIG_SPL_MMC=y
+CONFIG_SPL_SERIAL=y
+CONFIG_SPL_STACK_R_ADDR=0x600000
+CONFIG_TARGET_EVB_RK3568=y
+CONFIG_SPL_STACK=0x400000
+CONFIG_DEBUG_UART_BASE=0xFE660000
+CONFIG_DEBUG_UART_CLOCK=24000000
+CONFIG_SYS_LOAD_ADDR=0xc00800
+CONFIG_DEBUG_UART=y
+CONFIG_FIT=y
+CONFIG_FIT_VERBOSE=y
+CONFIG_SPL_LOAD_FIT=y
+CONFIG_DEFAULT_FDT_FILE="rockchip/rk3568-r66s.dtb"
+# CONFIG_DISPLAY_CPUINFO is not set
+CONFIG_DISPLAY_BOARDINFO_LATE=y
+CONFIG_SPL_MAX_SIZE=0x40000
+CONFIG_SPL_PAD_TO=0x7f8000
+CONFIG_SPL_HAS_BSS_LINKER_SECTION=y
+CONFIG_SPL_BSS_START_ADDR=0x4000000
+CONFIG_SPL_BSS_MAX_SIZE=0x4000
+# CONFIG_SPL_RAW_IMAGE_SUPPORT is not set
+# CONFIG_SPL_SHARES_INIT_SP_ADDR is not set
+CONFIG_SPL_STACK_R=y
+CONFIG_SPL_ADC=y
+CONFIG_SPL_ATF=y
+CONFIG_CMD_ADC=y
+CONFIG_CMD_GPIO=y
+CONFIG_CMD_GPT=y
+CONFIG_CMD_I2C=y
+CONFIG_CMD_MMC=y
+CONFIG_CMD_USB=y
+CONFIG_CMD_REGULATOR=y
+# CONFIG_CMD_SETEXPR is not set
+# CONFIG_SPL_DOS_PARTITION is not set
+CONFIG_SPL_OF_CONTROL=y
+CONFIG_OF_LIVE=y
+CONFIG_NET_RANDOM_ETHADDR=y
+CONFIG_SPL_REGMAP=y
+CONFIG_SPL_SYSCON=y
+CONFIG_SPL_CLK=y
+CONFIG_CLK_SCMI=y
+CONFIG_RESET_SCMI=y
+CONFIG_ROCKCHIP_GPIO=y
+CONFIG_SYS_I2C_ROCKCHIP=y
+CONFIG_MISC=y
+CONFIG_SUPPORT_EMMC_RPMB=y
+CONFIG_MMC_DW=y
+CONFIG_MMC_DW_ROCKCHIP=y
+CONFIG_MMC_SDHCI=y
+CONFIG_MMC_SDHCI_SDMA=y
+CONFIG_MMC_SDHCI_ROCKCHIP=y
+CONFIG_ETH_DESIGNWARE=y
+CONFIG_GMAC_ROCKCHIP=y
+CONFIG_DM_PMIC=y
+CONFIG_PMIC_RK8XX=y
+CONFIG_SPL_PMIC_RK8XX=y
+CONFIG_PHY_ROCKCHIP_INNO_USB2=y
+CONFIG_PHY_ROCKCHIP_NANENG_COMBOPHY=y
+CONFIG_REGULATOR_PWM=y
+CONFIG_DM_REGULATOR_FIXED=y
+CONFIG_SPL_DM_REGULATOR_FIXED=y
+CONFIG_REGULATOR_RK8XX=y
+CONFIG_PWM_ROCKCHIP=y
+CONFIG_SPL_RAM=y
+CONFIG_BAUDRATE=1500000
+CONFIG_DEBUG_UART_SHIFT=2
+CONFIG_SYS_NS16550_MEM32=y
+CONFIG_SYSRESET=y
+CONFIG_USB=y
+CONFIG_USB_XHCI_HCD=y
+CONFIG_USB_XHCI_DWC3=y
+CONFIG_USB_EHCI_HCD=y
+CONFIG_USB_EHCI_GENERIC=y
+CONFIG_USB_DWC3=y
+CONFIG_USB_DWC3_GENERIC=y
+CONFIG_ERRNO_STR=y

View file

@ -1,100 +0,0 @@
From 18e3719c5d5b1573c29d137c1244ca23277750b2 Mon Sep 17 00:00:00 2001
From: huangjf <hjf@t-chip.com.cn>
Date: Thu, 7 Apr 2022 16:22:56 +0800
Subject: [PATCH] rockchip: rk3568: Add support for Station P2
---
configs/station-p2-rk3568_defconfig | 59 +++++++++++++++++++++++++++++
1 file changed, 59 insertions(+)
create mode 100644 configs/station-p2-rk3568_defconfig
--- /dev/null
+++ b/configs/station-p2-rk3568_defconfig
@@ -0,0 +1,87 @@
+CONFIG_ARM=y
+CONFIG_SKIP_LOWLEVEL_INIT=y
+CONFIG_COUNTER_FREQUENCY=24000000
+CONFIG_ARCH_ROCKCHIP=y
+CONFIG_TEXT_BASE=0x00a00000
+CONFIG_SPL_LIBCOMMON_SUPPORT=y
+CONFIG_SPL_LIBGENERIC_SUPPORT=y
+CONFIG_NR_DRAM_BANKS=2
+CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y
+CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0xc00000
+CONFIG_DEFAULT_DEVICE_TREE="rk3568-evb"
+CONFIG_ROCKCHIP_RK3568=y
+CONFIG_SPL_ROCKCHIP_BACK_TO_BROM=y
+CONFIG_SPL_ROCKCHIP_COMMON_BOARD=y
+CONFIG_SPL_MMC=y
+CONFIG_SPL_SERIAL=y
+CONFIG_SPL_STACK_R_ADDR=0x600000
+CONFIG_TARGET_EVB_RK3568=y
+CONFIG_SPL_STACK=0x400000
+CONFIG_DEBUG_UART_BASE=0xFE660000
+CONFIG_DEBUG_UART_CLOCK=24000000
+CONFIG_SYS_LOAD_ADDR=0xc00800
+CONFIG_DEBUG_UART=y
+CONFIG_FIT=y
+CONFIG_FIT_VERBOSE=y
+CONFIG_SPL_LOAD_FIT=y
+CONFIG_DEFAULT_FDT_FILE="rockchip/rk3568-evb.dtb"
+# CONFIG_DISPLAY_CPUINFO is not set
+CONFIG_DISPLAY_BOARDINFO_LATE=y
+CONFIG_SPL_MAX_SIZE=0x40000
+CONFIG_SPL_PAD_TO=0x7f8000
+CONFIG_SPL_HAS_BSS_LINKER_SECTION=y
+CONFIG_SPL_BSS_START_ADDR=0x4000000
+CONFIG_SPL_BSS_MAX_SIZE=0x4000
+# CONFIG_SPL_RAW_IMAGE_SUPPORT is not set
+# CONFIG_SPL_SHARES_INIT_SP_ADDR is not set
+CONFIG_SPL_STACK_R=y
+CONFIG_SPL_ATF=y
+CONFIG_CMD_GPIO=y
+CONFIG_CMD_GPT=y
+CONFIG_CMD_I2C=y
+CONFIG_CMD_MMC=y
+CONFIG_CMD_USB=y
+CONFIG_CMD_REGULATOR=y
+# CONFIG_CMD_SETEXPR is not set
+# CONFIG_SPL_DOS_PARTITION is not set
+CONFIG_SPL_OF_CONTROL=y
+CONFIG_OF_LIVE=y
+CONFIG_NET_RANDOM_ETHADDR=y
+CONFIG_SPL_REGMAP=y
+CONFIG_SPL_SYSCON=y
+CONFIG_SPL_CLK=y
+CONFIG_CLK_SCMI=y
+CONFIG_RESET_SCMI=y
+CONFIG_ROCKCHIP_GPIO=y
+CONFIG_SYS_I2C_ROCKCHIP=y
+CONFIG_MISC=y
+CONFIG_SUPPORT_EMMC_RPMB=y
+CONFIG_MMC_DW=y
+CONFIG_MMC_DW_ROCKCHIP=y
+CONFIG_MMC_SDHCI=y
+CONFIG_MMC_SDHCI_SDMA=y
+CONFIG_MMC_SDHCI_ROCKCHIP=y
+CONFIG_ETH_DESIGNWARE=y
+CONFIG_GMAC_ROCKCHIP=y
+CONFIG_DM_PMIC=y
+CONFIG_PMIC_RK8XX=y
+CONFIG_SPL_PMIC_RK8XX=y
+CONFIG_PHY_ROCKCHIP_INNO_USB2=y
+CONFIG_PHY_ROCKCHIP_NANENG_COMBOPHY=y
+CONFIG_REGULATOR_PWM=y
+CONFIG_REGULATOR_RK8XX=y
+CONFIG_PWM_ROCKCHIP=y
+CONFIG_SPL_RAM=y
+CONFIG_DM_RESET=y
+CONFIG_BAUDRATE=1500000
+CONFIG_DEBUG_UART_SHIFT=2
+CONFIG_SYS_NS16550_MEM32=y
+CONFIG_SYSRESET=y
+CONFIG_USB=y
+CONFIG_USB_XHCI_HCD=y
+CONFIG_USB_XHCI_DWC3=y
+CONFIG_USB_EHCI_HCD=y
+CONFIG_USB_EHCI_GENERIC=y
+CONFIG_USB_DWC3=y
+CONFIG_USB_DWC3_GENERIC=y
+CONFIG_ERRNO_STR=y

View file

@ -1,200 +0,0 @@
--- a/arch/arm/dts/Makefile
+++ b/arch/arm/dts/Makefile
@@ -175,6 +175,7 @@ dtb-$(CONFIG_ROCKCHIP_RK3399) += \
rk3568-opc-h68k.dtb \
rk3568-mrkaio-m68s.dtb \
rk3568-nanopi-r5s.dtb \
+ rk3568-photonicat.dtb \
rk3566-radxa-cm3-io.dtb \
rk3568-rock-3a.dtb
--- /dev/null
+++ b/arch/arm/dts/rk3568-photonicat-u-boot.dtsi
@@ -0,0 +1,33 @@
+// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
+
+#include "rk356x-u-boot.dtsi"
+
+/ {
+ chosen {
+ stdout-path = &uart2;
+ u-boot,spl-boot-order = "same-as-spl", &sdmmc0, &sdhci;
+ };
+};
+
+&gpio0 {
+ u-boot,dm-spl;
+};
+
+&pinctrl {
+ u-boot,dm-spl;
+};
+
+&sdmmc0 {
+ bus-width = <4>;
+ u-boot,spl-fifo-mode;
+};
+
+&uart2 {
+ u-boot,dm-spl;
+ clock-frequency = <24000000>;
+ status = "okay";
+};
+
+&vcc3v3_sd {
+ u-boot,dm-spl;
+};
--- /dev/null
+++ b/arch/arm/dts/rk3568-photonicat.dts
@@ -0,0 +1,54 @@
+// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
+
+/dts-v1/;
+#include <dt-bindings/gpio/gpio.h>
+#include <dt-bindings/pinctrl/rockchip.h>
+#include "rk3568.dtsi"
+
+/ {
+ model = "Ariaboard Photonicat";
+ compatible = "ariaboard,photonicat", "rockchip,rk3568";
+
+ chosen: chosen {
+ stdout-path = "serial2:1500000n8";
+ };
+
+ vcc3v3_sd: vcc3v3_sd {
+ compatible = "regulator-fixed";
+ gpio = <&gpio0 RK_PB6 GPIO_ACTIVE_LOW>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&vcc_sd_h>;
+ regulator-boot-on;
+ regulator-name = "vcc3v3_sd";
+ regulator-min-microvolt = <3300000>;
+ regulator-max-microvolt = <3300000>;
+ };
+};
+
+&pinctrl {
+ vcc_sd {
+ vcc_sd_h: vcc-sd-h {
+ rockchip,pins = <0 RK_PB6 RK_FUNC_GPIO &pcfg_pull_up>;
+ };
+ };
+};
+
+&sdhci {
+ bus-width = <8>;
+ max-frequency = <200000000>;
+ non-removable;
+ status = "okay";
+};
+
+&sdmmc0 {
+ max-frequency = <52000000>;
+ status = "okay";
+};
+
+&sdmmc1 {
+ status = "okay";
+};
+
+&uart2 {
+ status = "okay";
+};
--- /dev/null
+++ b/configs/photonicat-rk3568_defconfig
@@ -0,0 +1,94 @@
+CONFIG_ARM=y
+CONFIG_SKIP_LOWLEVEL_INIT=y
+CONFIG_COUNTER_FREQUENCY=24000000
+CONFIG_ARCH_ROCKCHIP=y
+CONFIG_TEXT_BASE=0x00a00000
+CONFIG_SPL_LIBCOMMON_SUPPORT=y
+CONFIG_SPL_LIBGENERIC_SUPPORT=y
+CONFIG_NR_DRAM_BANKS=2
+CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y
+CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0xc00000
+CONFIG_DEFAULT_DEVICE_TREE="rk3568-photonicat"
+CONFIG_ROCKCHIP_RK3568=y
+CONFIG_SPL_ROCKCHIP_BACK_TO_BROM=y
+CONFIG_SPL_ROCKCHIP_COMMON_BOARD=y
+CONFIG_SPL_GPIO=y
+CONFIG_SPL_MMC=y
+CONFIG_SPL_SERIAL=y
+CONFIG_SPL_STACK_R_ADDR=0x600000
+CONFIG_TARGET_EVB_RK3568=y
+CONFIG_SPL_STACK=0x400000
+CONFIG_DEBUG_UART_BASE=0xFE660000
+CONFIG_DEBUG_UART_CLOCK=24000000
+CONFIG_SYS_LOAD_ADDR=0xc00800
+CONFIG_DEBUG_UART=y
+CONFIG_FIT=y
+CONFIG_FIT_VERBOSE=y
+CONFIG_SPL_LOAD_FIT=y
+CONFIG_DEFAULT_FDT_FILE="rockchip/rk3568-photonicat.dtb"
+# CONFIG_DISPLAY_CPUINFO is not set
+CONFIG_DISPLAY_BOARDINFO_LATE=y
+CONFIG_SPL_MAX_SIZE=0x40000
+CONFIG_SPL_PAD_TO=0x7f8000
+CONFIG_SPL_HAS_BSS_LINKER_SECTION=y
+CONFIG_SPL_BSS_START_ADDR=0x4000000
+CONFIG_SPL_BSS_MAX_SIZE=0x4000
+# CONFIG_SPL_RAW_IMAGE_SUPPORT is not set
+# CONFIG_SPL_SHARES_INIT_SP_ADDR is not set
+CONFIG_SPL_STACK_R=y
+CONFIG_SPL_ADC=y
+CONFIG_SPL_ATF=y
+CONFIG_SPL_BOARD_INIT=y
+CONFIG_CMD_ADC=y
+CONFIG_CMD_GPIO=y
+CONFIG_CMD_GPT=y
+CONFIG_CMD_I2C=y
+CONFIG_CMD_MMC=y
+CONFIG_CMD_USB=y
+CONFIG_CMD_REGULATOR=y
+# CONFIG_CMD_SETEXPR is not set
+# CONFIG_SPL_DOS_PARTITION is not set
+CONFIG_SPL_OF_CONTROL=y
+CONFIG_OF_LIVE=y
+CONFIG_NET_RANDOM_ETHADDR=y
+CONFIG_SPL_REGMAP=y
+CONFIG_SPL_SYSCON=y
+CONFIG_SPL_CLK=y
+CONFIG_CLK_SCMI=y
+CONFIG_RESET_SCMI=y
+CONFIG_ROCKCHIP_GPIO=y
+CONFIG_SYS_I2C_ROCKCHIP=y
+CONFIG_MISC=y
+CONFIG_MMC_IO_VOLTAGE=y
+CONFIG_SPL_MMC_IO_VOLTAGE=y
+CONFIG_SUPPORT_EMMC_RPMB=y
+CONFIG_MMC_DW=y
+CONFIG_MMC_DW_ROCKCHIP=y
+CONFIG_MMC_SDHCI=y
+CONFIG_MMC_SDHCI_SDMA=y
+CONFIG_MMC_SDHCI_ROCKCHIP=y
+CONFIG_ETH_DESIGNWARE=y
+CONFIG_GMAC_ROCKCHIP=y
+CONFIG_DM_PMIC=y
+CONFIG_PMIC_RK8XX=y
+CONFIG_SPL_PMIC_RK8XX=y
+CONFIG_PHY_ROCKCHIP_INNO_USB2=y
+CONFIG_PHY_ROCKCHIP_NANENG_COMBOPHY=y
+CONFIG_REGULATOR_PWM=y
+CONFIG_DM_REGULATOR_FIXED=y
+CONFIG_SPL_DM_REGULATOR_FIXED=y
+CONFIG_REGULATOR_RK8XX=y
+CONFIG_PWM_ROCKCHIP=y
+CONFIG_SPL_RAM=y
+CONFIG_BAUDRATE=1500000
+CONFIG_DEBUG_UART_SHIFT=2
+CONFIG_SYS_NS16550_MEM32=y
+CONFIG_SYSRESET=y
+CONFIG_USB=y
+CONFIG_USB_XHCI_HCD=y
+CONFIG_USB_XHCI_DWC3=y
+CONFIG_USB_EHCI_HCD=y
+CONFIG_USB_EHCI_GENERIC=y
+CONFIG_USB_DWC3=y
+CONFIG_USB_DWC3_GENERIC=y
+CONFIG_ERRNO_STR=y

View file

@ -1,139 +0,0 @@
--- a/arch/arm/dts/Makefile
+++ b/arch/arm/dts/Makefile
@@ -177,7 +177,8 @@ rk3568-evb.dtb \
rk3568-nanopi-r5s.dtb \
rk3568-photonicat.dtb \
rk3566-radxa-cm3-io.dtb \
- rk3568-rock-3a.dtb
+ rk3568-rock-3a.dtb \
+ rk3568-radxa-e25.dtb
dtb-$(CONFIG_ROCKCHIP_RK3588) += \
rk3588-edgeble-neu6a-io.dtb \
--- /dev/null
+++ b/arch/arm/dts/rk3568-radxa-e25-u-boot.dtsi
@@ -0,0 +1,21 @@
+// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
+
+#include "rk356x-u-boot.dtsi"
+
+/ {
+ chosen {
+ stdout-path = &uart2;
+ u-boot,spl-boot-order = "same-as-spl", &sdmmc0, &sdhci;
+ };
+};
+
+&sdmmc0 {
+ bus-width = <4>;
+ u-boot,spl-fifo-mode;
+};
+
+&uart2 {
+ u-boot,dm-spl;
+ clock-frequency = <24000000>;
+ status = "okay";
+};
--- /dev/null
+++ b/arch/arm/dts/rk3568-radxa-e25.dts
@@ -0,0 +1,8 @@
+// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
+
+#include "rk3568-evb.dts"
+
+/ {
+ model = "Radxa E25";
+ compatible = "radxa,e25", "rockchip,rk3568";
+};
--- /dev/null
+++ b/configs/radxa-e25-rk3568_defconfig
@@ -0,0 +1,89 @@
+CONFIG_ARM=y
+CONFIG_SKIP_LOWLEVEL_INIT=y
+CONFIG_COUNTER_FREQUENCY=24000000
+CONFIG_ARCH_ROCKCHIP=y
+CONFIG_TEXT_BASE=0x00a00000
+CONFIG_SPL_LIBCOMMON_SUPPORT=y
+CONFIG_SPL_LIBGENERIC_SUPPORT=y
+CONFIG_NR_DRAM_BANKS=2
+CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y
+CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0xc00000
+CONFIG_DEFAULT_DEVICE_TREE="rk3568-radxa-e25"
+CONFIG_ROCKCHIP_RK3568=y
+CONFIG_SPL_ROCKCHIP_BACK_TO_BROM=y
+CONFIG_SPL_ROCKCHIP_COMMON_BOARD=y
+CONFIG_SPL_BOARD_INIT=y
+CONFIG_SPL_MMC=y
+CONFIG_SPL_SERIAL=y
+CONFIG_SPL_STACK_R_ADDR=0x600000
+CONFIG_TARGET_EVB_RK3568=y
+CONFIG_SPL_STACK=0x400000
+CONFIG_DEBUG_UART_BASE=0xFE660000
+CONFIG_DEBUG_UART_CLOCK=24000000
+CONFIG_SYS_LOAD_ADDR=0xc00800
+CONFIG_DEBUG_UART=y
+CONFIG_FIT=y
+CONFIG_FIT_VERBOSE=y
+CONFIG_SPL_LOAD_FIT=y
+CONFIG_DEFAULT_FDT_FILE="rockchip/rk3568-radxa-e25.dtb"
+# CONFIG_DISPLAY_CPUINFO is not set
+CONFIG_DISPLAY_BOARDINFO_LATE=y
+CONFIG_SPL_MAX_SIZE=0x40000
+CONFIG_SPL_PAD_TO=0x7f8000
+CONFIG_SPL_HAS_BSS_LINKER_SECTION=y
+CONFIG_SPL_BSS_START_ADDR=0x4000000
+CONFIG_SPL_BSS_MAX_SIZE=0x4000
+# CONFIG_SPL_RAW_IMAGE_SUPPORT is not set
+# CONFIG_SPL_SHARES_INIT_SP_ADDR is not set
+CONFIG_SPL_STACK_R=y
+CONFIG_SPL_ADC=y
+CONFIG_SPL_ATF=y
+CONFIG_CMD_ADC=y
+CONFIG_CMD_GPIO=y
+CONFIG_CMD_GPT=y
+CONFIG_CMD_I2C=y
+CONFIG_CMD_MMC=y
+CONFIG_CMD_USB=y
+CONFIG_CMD_REGULATOR=y
+# CONFIG_CMD_SETEXPR is not set
+# CONFIG_SPL_DOS_PARTITION is not set
+CONFIG_SPL_OF_CONTROL=y
+CONFIG_OF_LIVE=y
+CONFIG_NET_RANDOM_ETHADDR=y
+CONFIG_SPL_REGMAP=y
+CONFIG_SPL_SYSCON=y
+CONFIG_SPL_CLK=y
+CONFIG_CLK_SCMI=y
+CONFIG_RESET_SCMI=y
+CONFIG_ROCKCHIP_GPIO=y
+CONFIG_SYS_I2C_ROCKCHIP=y
+CONFIG_MISC=y
+CONFIG_SUPPORT_EMMC_RPMB=y
+CONFIG_MMC_DW=y
+CONFIG_MMC_DW_ROCKCHIP=y
+CONFIG_MMC_SDHCI=y
+CONFIG_MMC_SDHCI_SDMA=y
+CONFIG_MMC_SDHCI_ROCKCHIP=y
+CONFIG_ETH_DESIGNWARE=y
+CONFIG_GMAC_ROCKCHIP=y
+CONFIG_DM_PMIC=y
+CONFIG_PMIC_RK8XX=y
+CONFIG_SPL_PMIC_RK8XX=y
+CONFIG_PHY_ROCKCHIP_INNO_USB2=y
+CONFIG_PHY_ROCKCHIP_NANENG_COMBOPHY=y
+CONFIG_REGULATOR_PWM=y
+CONFIG_REGULATOR_RK8XX=y
+CONFIG_PWM_ROCKCHIP=y
+CONFIG_SPL_RAM=y
+CONFIG_BAUDRATE=1500000
+CONFIG_DEBUG_UART_SHIFT=2
+CONFIG_SYS_NS16550_MEM32=y
+CONFIG_SYSRESET=y
+CONFIG_USB=y
+CONFIG_USB_XHCI_HCD=y
+CONFIG_USB_XHCI_DWC3=y
+CONFIG_USB_EHCI_HCD=y
+CONFIG_USB_EHCI_GENERIC=y
+CONFIG_USB_DWC3=y
+CONFIG_USB_DWC3_GENERIC=y
+CONFIG_ERRNO_STR=y

View file

@ -1,486 +0,0 @@
# SPDX-License-Identifier: GPL-2.0-or-later
include $(TOPDIR)/rules.mk
PKG_NAME:=cypress-firmware
PKG_VERSION:=5.10.9-2022_0909
PKG_RELEASE:=1
PKG_SOURCE_PROTO:=git
PKG_SOURCE_URL:=https://github.com/Infineon/ifx-linux-firmware/
PKG_MIRROR_HASH:=944faae3a80013f1a963b6692d7f50a38c97edcf91fd163de521df755e6922b5
PKG_SOURCE_VERSION:=release-v$(PKG_VERSION)
PKG_MAINTAINER:=Álvaro Fernández Rojas <noltari@gmail.com>
PKG_LICENSE_FILES:=LICENCE
include $(INCLUDE_DIR)/package.mk
define Package/cypress-firmware-default
SECTION:=firmware
CATEGORY:=Firmware
URL:=https://community.infineon.com/
endef
define Build/Compile
true
endef
# Cypress 43012 SDIO Firmware
define Package/cypress-firmware-43012-sdio
$(Package/cypress-firmware-default)
TITLE:=CYW43012 FullMac SDIO firmware
endef
define Package/cypress-firmware-43012-sdio/install
$(INSTALL_DIR) $(1)/lib/firmware/cypress
$(INSTALL_DATA) \
$(PKG_BUILD_DIR)/firmware/cyfmac43012-sdio.bin \
$(1)/lib/firmware/cypress/
$(INSTALL_DATA) \
$(PKG_BUILD_DIR)/firmware/cyfmac43012-sdio.clm_blob \
$(1)/lib/firmware/cypress/
$(INSTALL_DIR) $(1)/lib/firmware/brcm
$(LN) \
../cypress/cyfmac43012-sdio.bin \
$(1)/lib/firmware/brcm/brcmfmac43012-sdio.bin
$(LN) \
../cypress/cyfmac43012-sdio.clm_blob \
$(1)/lib/firmware/brcm/brcmfmac43012-sdio.clm_blob
endef
$(eval $(call BuildPackage,cypress-firmware-43012-sdio))
# Cypress 43340 SDIO Firmware
define Package/cypress-firmware-43340-sdio
$(Package/cypress-firmware-default)
TITLE:=CYW43340 FullMac SDIO firmware
endef
define Package/cypress-firmware-43340-sdio/install
$(INSTALL_DIR) $(1)/lib/firmware/cypress
$(INSTALL_DATA) \
$(PKG_BUILD_DIR)/firmware/cyfmac43340-sdio.bin \
$(1)/lib/firmware/cypress/
$(INSTALL_DIR) $(1)/lib/firmware/brcm
$(LN) \
../cypress/cyfmac43340-sdio.bin \
$(1)/lib/firmware/brcm/brcmfmac43340-sdio.bin
endef
$(eval $(call BuildPackage,cypress-firmware-43340-sdio))
# Cypress 43362 SDIO Firmware
define Package/cypress-firmware-43362-sdio
$(Package/cypress-firmware-default)
TITLE:=CYW43362 FullMac SDIO firmware
PROVIDES:=brcmfmac-firmware-43362-sdio
CONFLICTS:=brcmfmac-firmware-43362-sdio
endef
define Package/cypress-firmware-43362-sdio/install
$(INSTALL_DIR) $(1)/lib/firmware/cypress
$(INSTALL_DATA) \
$(PKG_BUILD_DIR)/firmware/cyfmac43362-sdio.bin \
$(1)/lib/firmware/cypress/
$(INSTALL_DIR) $(1)/lib/firmware/brcm
$(LN) \
../cypress/cyfmac43362-sdio.bin \
$(1)/lib/firmware/brcm/brcmfmac43362-sdio.bin
endef
$(eval $(call BuildPackage,cypress-firmware-43362-sdio))
# Cypress 4339 SDIO Firmware
define Package/cypress-firmware-4339-sdio
$(Package/cypress-firmware-default)
TITLE:=CYW4339 FullMac SDIO firmware
PROVIDES:=brcmfmac-firmware-4339-sdio
CONFLICTS:=brcmfmac-firmware-4339-sdio
endef
define Package/cypress-firmware-4339-sdio/install
$(INSTALL_DIR) $(1)/lib/firmware/cypress
$(INSTALL_DATA) \
$(PKG_BUILD_DIR)/firmware/cyfmac4339-sdio.bin \
$(1)/lib/firmware/cypress/
$(INSTALL_DIR) $(1)/lib/firmware/brcm
$(LN) \
../cypress/cyfmac4339-sdio.bin \
$(1)/lib/firmware/brcm/brcmfmac4339-sdio.bin
endef
$(eval $(call BuildPackage,cypress-firmware-4339-sdio))
# Cypress 43430 SDIO Firmware
define Package/cypress-firmware-43430-sdio
$(Package/cypress-firmware-default)
TITLE:=CYW43430 FullMac SDIO firmware
PROVIDES:=brcmfmac-firmware-43430-sdio
CONFLICTS:=brcmfmac-firmware-43430-sdio
endef
define Package/cypress-firmware-43430-sdio/install
$(INSTALL_DIR) $(1)/lib/firmware/cypress
$(INSTALL_DATA) \
$(PKG_BUILD_DIR)/firmware/cyfmac43430-sdio.bin \
$(1)/lib/firmware/cypress/
$(INSTALL_DATA) \
$(PKG_BUILD_DIR)/firmware/cyfmac43430-sdio.clm_blob \
$(1)/lib/firmware/cypress/
$(INSTALL_DIR) $(1)/lib/firmware/brcm
$(LN) \
../cypress/cyfmac43430-sdio.bin \
$(1)/lib/firmware/brcm/brcmfmac43430-sdio.bin
$(LN) \
../cypress/cyfmac43430-sdio.clm_blob \
$(1)/lib/firmware/brcm/brcmfmac43430-sdio.clm_blob
endef
$(eval $(call BuildPackage,cypress-firmware-43430-sdio))
# Cypress 43439 SDIO Firmware
define Package/cypress-firmware-43439-sdio
$(Package/cypress-firmware-default)
TITLE:=CYW43439 FullMac SDIO firmware
endef
define Package/cypress-firmware-43439-sdio/install
$(INSTALL_DIR) $(1)/lib/firmware/cypress
$(INSTALL_DATA) \
$(PKG_BUILD_DIR)/firmware/cyfmac43439-sdio.bin \
$(1)/lib/firmware/cypress/
$(INSTALL_DATA) \
$(PKG_BUILD_DIR)/firmware/cyfmac43439-sdio.clm_blob \
$(1)/lib/firmware/cypress/
$(INSTALL_DIR) $(1)/lib/firmware/brcm
$(LN) \
../cypress/cyfmac43439-sdio.bin \
$(1)/lib/firmware/brcm/brcmfmac43439-sdio.bin
$(LN) \
../cypress/cyfmac43439-sdio.clm_blob \
$(1)/lib/firmware/brcm/brcmfmac43439-sdio.clm_blob
endef
$(eval $(call BuildPackage,cypress-firmware-43439-sdio))
# Cypress 43455 SDIO Firmware
define Package/cypress-firmware-43455-sdio
$(Package/cypress-firmware-default)
TITLE:=CYW43455 FullMac SDIO firmware
PROVIDES:=brcmfmac-firmware-43455-sdio
CONFLICTS:=brcmfmac-firmware-43455-sdio
endef
define Package/cypress-firmware-43455-sdio/install
$(INSTALL_DIR) $(1)/lib/firmware/cypress
$(INSTALL_DATA) \
$(PKG_BUILD_DIR)/firmware/cyfmac43455-sdio.bin \
$(1)/lib/firmware/cypress/
$(INSTALL_DATA) \
$(PKG_BUILD_DIR)/firmware/cyfmac43455-sdio.clm_blob \
$(1)/lib/firmware/cypress/
$(INSTALL_DIR) $(1)/lib/firmware/brcm
$(LN) \
../cypress/cyfmac43455-sdio.bin \
$(1)/lib/firmware/brcm/brcmfmac43455-sdio.bin
$(LN) \
../cypress/cyfmac43455-sdio.clm_blob \
$(1)/lib/firmware/brcm/brcmfmac43455-sdio.clm_blob
endef
$(eval $(call BuildPackage,cypress-firmware-43455-sdio))
# Cypress 4354 SDIO Firmware
define Package/cypress-firmware-4354-sdio
$(Package/cypress-firmware-default)
TITLE:=CYW4354 FullMac SDIO firmware
endef
define Package/cypress-firmware-4354-sdio/install
$(INSTALL_DIR) $(1)/lib/firmware/cypress
$(INSTALL_DATA) \
$(PKG_BUILD_DIR)/firmware/cyfmac4354-sdio.bin \
$(1)/lib/firmware/cypress/
$(INSTALL_DATA) \
$(PKG_BUILD_DIR)/firmware/cyfmac4354-sdio.clm_blob \
$(1)/lib/firmware/cypress/
$(INSTALL_DIR) $(1)/lib/firmware/brcm
$(LN) \
../cypress/cyfmac4354-sdio.bin \
$(1)/lib/firmware/brcm/brcmfmac4354-sdio.bin
$(LN) \
../cypress/cyfmac4354-sdio.clm_blob \
$(1)/lib/firmware/brcm/brcmfmac4354-sdio.clm_blob
endef
$(eval $(call BuildPackage,cypress-firmware-4354-sdio))
# Cypress 4356 PCIe Firmware
define Package/cypress-firmware-4356-pcie
$(Package/cypress-firmware-default)
TITLE:=CYW4356 FullMac PCIe firmware
endef
define Package/cypress-firmware-4356-pcie/install
$(INSTALL_DIR) $(1)/lib/firmware/cypress
$(INSTALL_DATA) \
$(PKG_BUILD_DIR)/firmware/cyfmac4356-pcie.bin \
$(1)/lib/firmware/cypress/
$(INSTALL_DATA) \
$(PKG_BUILD_DIR)/firmware/cyfmac4356-pcie.clm_blob \
$(1)/lib/firmware/cypress/
$(INSTALL_DIR) $(1)/lib/firmware/brcm
$(LN) \
../cypress/cyfmac4356-pcie.bin \
$(1)/lib/firmware/brcm/brcmfmac4356-pcie.bin
$(LN) \
../cypress/cyfmac4356-pcie.clm_blob \
$(1)/lib/firmware/brcm/brcmfmac4356-pcie.clm_blob
endef
$(eval $(call BuildPackage,cypress-firmware-4356-pcie))
# Cypress 4356 SDIO Firmware
define Package/cypress-firmware-4356-sdio
$(Package/cypress-firmware-default)
TITLE:=CYW4356 FullMac SDIO firmware
endef
define Package/cypress-firmware-4356-sdio/install
$(INSTALL_DIR) $(1)/lib/firmware/cypress
$(INSTALL_DATA) \
$(PKG_BUILD_DIR)/firmware/cyfmac4356-sdio.bin \
$(1)/lib/firmware/cypress/
$(INSTALL_DATA) \
$(PKG_BUILD_DIR)/firmware/cyfmac4356-sdio.clm_blob \
$(1)/lib/firmware/cypress/
$(INSTALL_DIR) $(1)/lib/firmware/brcm
$(LN) \
../cypress/cyfmac4356-sdio.bin \
$(1)/lib/firmware/brcm/brcmfmac4356-sdio.bin
$(LN) \
../cypress/cyfmac4356-sdio.clm_blob \
$(1)/lib/firmware/brcm/brcmfmac4356-sdio.clm_blob
endef
$(eval $(call BuildPackage,cypress-firmware-4356-sdio))
# Cypress 43570 PCIe Firmware
define Package/cypress-firmware-43570-pcie
$(Package/cypress-firmware-default)
TITLE:=CYW43570 FullMac PCIe firmware
endef
define Package/cypress-firmware-43570-pcie/install
$(INSTALL_DIR) $(1)/lib/firmware/cypress
$(INSTALL_DATA) \
$(PKG_BUILD_DIR)/firmware/cyfmac43570-pcie.bin \
$(1)/lib/firmware/cypress/
$(INSTALL_DATA) \
$(PKG_BUILD_DIR)/firmware/cyfmac43570-pcie.clm_blob \
$(1)/lib/firmware/cypress/
$(INSTALL_DIR) $(1)/lib/firmware/brcm
$(LN) \
../cypress/cyfmac43570-pcie.bin \
$(1)/lib/firmware/brcm/brcmfmac43570-pcie.bin
$(LN) \
../cypress/cyfmac43570-pcie.clm_blob \
$(1)/lib/firmware/brcm/brcmfmac43570-pcie.clm_blob
endef
$(eval $(call BuildPackage,cypress-firmware-43570-pcie))
# Cypress 4373 PCIe Firmware
define Package/cypress-firmware-4373-pcie
$(Package/cypress-firmware-default)
TITLE:=CYW4373 FullMac PCIe firmware
endef
define Package/cypress-firmware-4373-pcie/install
$(INSTALL_DIR) $(1)/lib/firmware/cypress
$(INSTALL_DATA) \
$(PKG_BUILD_DIR)/firmware/cyfmac4373-pcie.bin \
$(1)/lib/firmware/cypress/
$(INSTALL_DATA) \
$(PKG_BUILD_DIR)/firmware/cyfmac4373-pcie.clm_blob \
$(1)/lib/firmware/cypress/
$(INSTALL_DIR) $(1)/lib/firmware/brcm
$(LN) \
../cypress/cyfmac4373-pcie.bin \
$(1)/lib/firmware/brcm/brcmfmac4373-pcie.bin
$(LN) \
../cypress/cyfmac4373-pcie.clm_blob \
$(1)/lib/firmware/brcm/brcmfmac4373-pcie.clm_blob
endef
$(eval $(call BuildPackage,cypress-firmware-4373-pcie))
# Cypress 4373 SDIO Firmware
define Package/cypress-firmware-4373-sdio
$(Package/cypress-firmware-default)
TITLE:=CYW4373 FullMac SDIO firmware
endef
define Package/cypress-firmware-4373-sdio/install
$(INSTALL_DIR) $(1)/lib/firmware/cypress
$(INSTALL_DATA) \
$(PKG_BUILD_DIR)/firmware/cyfmac4373-sdio.bin \
$(1)/lib/firmware/cypress/
$(INSTALL_DATA) \
$(PKG_BUILD_DIR)/firmware/cyfmac4373-sdio.clm_blob \
$(1)/lib/firmware/cypress/
$(INSTALL_DIR) $(1)/lib/firmware/brcm
$(LN) \
../cypress/cyfmac4373-sdio.bin \
$(1)/lib/firmware/brcm/brcmfmac4373-sdio.bin
$(LN) \
../cypress/cyfmac4373-sdio.clm_blob \
$(1)/lib/firmware/brcm/brcmfmac4373-sdio.clm_blob
endef
$(eval $(call BuildPackage,cypress-firmware-4373-sdio))
# Cypress 4373 USB Firmware
define Package/cypress-firmware-4373-usb
$(Package/cypress-firmware-default)
TITLE:=CYW4373 FullMac USB firmware
endef
define Package/cypress-firmware-4373-usb/install
$(INSTALL_DIR) $(1)/lib/firmware/cypress
$(INSTALL_DATA) \
$(PKG_BUILD_DIR)/firmware/cyfmac4373-usb.bin \
$(1)/lib/firmware/cypress/
$(INSTALL_DATA) \
$(PKG_BUILD_DIR)/firmware/cyfmac4373.clm_blob \
$(1)/lib/firmware/cypress/
$(INSTALL_DIR) $(1)/lib/firmware/brcm
$(LN) \
../cypress/cyfmac4373-usb.bin \
$(1)/lib/firmware/brcm/brcmfmac4373-usb.bin
$(LN) \
../cypress/cyfmac4373.clm_blob \
$(1)/lib/firmware/brcm/brcmfmac4373.clm_blob
endef
$(eval $(call BuildPackage,cypress-firmware-4373-usb))
# Cypress 54591 PCIe Firmware
define Package/cypress-firmware-54591-pcie
$(Package/cypress-firmware-default)
TITLE:=CYW54591 FullMac PCIe firmware
endef
define Package/cypress-firmware-54591-pcie/install
$(INSTALL_DIR) $(1)/lib/firmware/cypress
$(INSTALL_DATA) \
$(PKG_BUILD_DIR)/firmware/cyfmac54591-pcie.bin \
$(1)/lib/firmware/cypress/
$(INSTALL_DATA) \
$(PKG_BUILD_DIR)/firmware/cyfmac54591-pcie.clm_blob \
$(1)/lib/firmware/cypress/
$(INSTALL_DIR) $(1)/lib/firmware/brcm
$(LN) \
../cypress/cyfmac54591-pcie.bin \
$(1)/lib/firmware/brcm/brcmfmac54591-pcie.bin
$(LN) \
../cypress/cyfmac54591-pcie.clm_blob \
$(1)/lib/firmware/brcm/brcmfmac54591-pcie.clm_blob
endef
$(eval $(call BuildPackage,cypress-firmware-54591-pcie))
# Cypress 54591 SDIO Firmware
define Package/cypress-firmware-54591-sdio
$(Package/cypress-firmware-default)
TITLE:=CYW54591 FullMac SDIO firmware
endef
define Package/cypress-firmware-54591-sdio/install
$(INSTALL_DIR) $(1)/lib/firmware/cypress
$(INSTALL_DATA) \
$(PKG_BUILD_DIR)/firmware/cyfmac54591-sdio.bin \
$(1)/lib/firmware/cypress/
$(INSTALL_DATA) \
$(PKG_BUILD_DIR)/firmware/cyfmac54591-sdio.clm_blob \
$(1)/lib/firmware/cypress/
$(INSTALL_DIR) $(1)/lib/firmware/brcm
$(LN) \
../cypress/cyfmac54591-sdio.bin \
$(1)/lib/firmware/brcm/brcmfmac54591-sdio.bin
$(LN) \
../cypress/cyfmac54591-sdio.clm_blob \
$(1)/lib/firmware/brcm/brcmfmac54591-sdio.clm_blob
endef
$(eval $(call BuildPackage,cypress-firmware-54591-sdio))
# Cypress 55560 PCIe Firmware
define Package/cypress-firmware-55560-pcie
$(Package/cypress-firmware-default)
TITLE:=CYW55560 FullMac PCIe firmware
endef
define Package/cypress-firmware-55560-pcie/install
$(INSTALL_DIR) $(1)/lib/firmware/cypress
$(INSTALL_DATA) \
$(PKG_BUILD_DIR)/firmware/cyfmac55560-pcie.trxse \
$(1)/lib/firmware/cypress/
$(INSTALL_DIR) $(1)/lib/firmware/brcm
$(LN) \
../cypress/cyfmac55560-pcie.trxse \
$(1)/lib/firmware/brcm/brcmfmac55560-pcie.trxse
endef
$(eval $(call BuildPackage,cypress-firmware-55560-pcie))
# Cypress 55572 PCIe Firmware
define Package/cypress-firmware-55572-pcie
$(Package/cypress-firmware-default)
TITLE:=CYW55572 FullMac PCIe firmware
endef
define Package/cypress-firmware-55572-pcie/install
$(INSTALL_DIR) $(1)/lib/firmware/cypress
$(INSTALL_DATA) \
$(PKG_BUILD_DIR)/firmware/cyfmac55572-pcie.trxse \
$(1)/lib/firmware/cypress/
$(INSTALL_DATA) \
$(PKG_BUILD_DIR)/firmware/cyfmac55572-pcie.clm_blob \
$(1)/lib/firmware/cypress/
$(INSTALL_DIR) $(1)/lib/firmware/brcm
$(LN) \
../cypress/cyfmac55572-pcie.trxse \
$(1)/lib/firmware/brcm/brcmfmac55572-pcie.trxse
$(LN) \
../cypress/cyfmac55572-pcie.clm_blob \
$(1)/lib/firmware/brcm/brcmfmac55572-pcie.clm_blob
endef
$(eval $(call BuildPackage,cypress-firmware-55572-pcie))
# Cypress 55572 SDIO Firmware
define Package/cypress-firmware-55572-sdio
$(Package/cypress-firmware-default)
TITLE:=CYW55572 FullMac SDIO firmware
endef
define Package/cypress-firmware-55572-sdio/install
$(INSTALL_DIR) $(1)/lib/firmware/cypress
$(INSTALL_DATA) \
$(PKG_BUILD_DIR)/firmware/cyfmac55572-sdio.trxse \
$(1)/lib/firmware/cypress/
$(INSTALL_DATA) \
$(PKG_BUILD_DIR)/firmware/cyfmac55572-sdio.clm_blob \
$(1)/lib/firmware/cypress/
$(INSTALL_DIR) $(1)/lib/firmware/brcm
$(LN) \
../cypress/cyfmac55572-sdio.trxse \
$(1)/lib/firmware/brcm/brcmfmac55572-sdio.trxse
$(LN) \
../cypress/cyfmac55572-sdio.clm_blob \
$(1)/lib/firmware/brcm/brcmfmac55572-sdio.clm_blob
endef
$(eval $(call BuildPackage,cypress-firmware-55572-sdio))

View file

@ -1,185 +0,0 @@
include $(TOPDIR)/rules.mk
include $(INCLUDE_DIR)/kernel.mk
PKG_NAME:=bcm27xx-gpu-fw
PKG_VERSION:=2021-08-19
PKG_RELEASE:=25e2b597ebfb2495eab4816a276758dcc6ea21f1
PKG_BUILD_DIR:=$(KERNEL_BUILD_DIR)/$(PKG_NAME)/rpi-firmware-$(PKG_RELEASE)
PKG_FLAGS:=nonshared
include $(INCLUDE_DIR)/package.mk
RPI_FIRMWARE_URL:=@GITHUB/raspberrypi/firmware/$(PKG_RELEASE)/boot/
RPI_FIRMWARE_FILE:=rpi-firmware-$(PKG_RELEASE)
define Download/LICENCE_broadcom
FILE:=$(RPI_FIRMWARE_FILE)-LICENCE.broadcom
URL:=$(RPI_FIRMWARE_URL)
URL_FILE:=LICENCE.broadcom
HASH:=c7283ff51f863d93a275c66e3b4cb08021a5dd4d8c1e7acc47d872fbe52d3d6b
endef
$(eval $(call Download,LICENCE_broadcom))
define Download/bootcode_bin
FILE:=$(RPI_FIRMWARE_FILE)-bootcode.bin
URL:=$(RPI_FIRMWARE_URL)
URL_FILE:=bootcode.bin
HASH:=36fba28838867f26670a0cd1de340da62e13171cfdec0e7822737e849b3c0681
endef
$(eval $(call Download,bootcode_bin))
define Download/fixup_dat
FILE:=$(RPI_FIRMWARE_FILE)-fixup.dat
URL:=$(RPI_FIRMWARE_URL)
URL_FILE:=fixup.dat
HASH:=b06aa43aa668d6982de66044299d1b0dd6b449ec321dd83742aa1eb68774e15b
endef
$(eval $(call Download,fixup_dat))
define Download/fixup_cd_dat
FILE:=$(RPI_FIRMWARE_FILE)-fixup_cd.dat
URL:=$(RPI_FIRMWARE_URL)
URL_FILE:=fixup_cd.dat
HASH:=fff4fd9fbb691100be46269f554acd866eac8cfef39082e03ac12f70fbfe9d95
endef
$(eval $(call Download,fixup_cd_dat))
define Download/fixup_x_dat
FILE:=$(RPI_FIRMWARE_FILE)-fixup_x.dat
URL:=$(RPI_FIRMWARE_URL)
URL_FILE:=fixup_x.dat
HASH:=d74f97ae37cd476e6d4c8e466c3013be49e891e63b9aabc0c9b7637d85068cd0
endef
$(eval $(call Download,fixup_x_dat))
define Download/fixup4_dat
FILE:=$(RPI_FIRMWARE_FILE)-fixup4.dat
URL:=$(RPI_FIRMWARE_URL)
URL_FILE:=fixup4.dat
HASH:=a607f4dc3000c188f8daaa3417c70a9e5ecc039fae36ba46807c00294f89cd24
endef
$(eval $(call Download,fixup4_dat))
define Download/fixup4cd_dat
FILE:=$(RPI_FIRMWARE_FILE)-fixup4cd.dat
URL:=$(RPI_FIRMWARE_URL)
URL_FILE:=fixup4cd.dat
HASH:=fff4fd9fbb691100be46269f554acd866eac8cfef39082e03ac12f70fbfe9d95
endef
$(eval $(call Download,fixup4cd_dat))
define Download/fixup4x_dat
FILE:=$(RPI_FIRMWARE_FILE)-fixup4x.dat
URL:=$(RPI_FIRMWARE_URL)
URL_FILE:=fixup4x.dat
HASH:=14ba09cba83d82a158481a7267fad06ada73c26c3a27dfd34694955f11ba6e27
endef
$(eval $(call Download,fixup4x_dat))
define Download/start_elf
FILE:=$(RPI_FIRMWARE_FILE)-start.elf
URL:=$(RPI_FIRMWARE_URL)
URL_FILE:=start.elf
HASH:=8bee170c56529bf1666ad4afdd18ae18c7123e7a2fd30e2992cd0d9a01fa63ee
endef
$(eval $(call Download,start_elf))
define Download/start_cd_elf
FILE:=$(RPI_FIRMWARE_FILE)-start_cd.elf
URL:=$(RPI_FIRMWARE_URL)
URL_FILE:=start_cd.elf
HASH:=27d9354ff1af79a521527a288fe736f7337f91bca12bbc177c80e29dbbef0ffd
endef
$(eval $(call Download,start_cd_elf))
define Download/start_x_elf
FILE:=$(RPI_FIRMWARE_FILE)-start_x.elf
URL:=$(RPI_FIRMWARE_URL)
URL_FILE:=start_x.elf
HASH:=499bfdf3deba7bb0a033d2a4487b7f05bce45de2692c7c6dabc4a456237fd438
endef
$(eval $(call Download,start_x_elf))
define Download/start4_elf
FILE:=$(RPI_FIRMWARE_FILE)-start4.elf
URL:=$(RPI_FIRMWARE_URL)
URL_FILE:=start4.elf
HASH:=158bf783090223626cf45794bf679a3fadbf64bba55b76e3349b94e01be34202
endef
$(eval $(call Download,start4_elf))
define Download/start4cd_elf
FILE:=$(RPI_FIRMWARE_FILE)-start4cd.elf
URL:=$(RPI_FIRMWARE_URL)
URL_FILE:=start4cd.elf
HASH:=c4912701f620cdd9e44bbacbfc4adb4be1b6fb7ccf81f6029ce2115511970cc0
endef
$(eval $(call Download,start4cd_elf))
define Download/start4x_elf
FILE:=$(RPI_FIRMWARE_FILE)-start4x.elf
URL:=$(RPI_FIRMWARE_URL)
URL_FILE:=start4x.elf
HASH:=3eb1adb5dfef21da0a16679ef65314a64196a67c6fca3422df8bc721d6b6fa94
endef
$(eval $(call Download,start4x_elf))
define Package/bcm27xx-gpu-fw
SECTION:=boot
CATEGORY:=Boot Loaders
DEPENDS:=@TARGET_bcm27xx
TITLE:=bcm27xx-gpu-fw
DEFAULT:=y if TARGET_bcm27xx
endef
define Package/bcm27xx-gpu-fw/description
GPU and kernel boot firmware for bcm27xx.
endef
define Build/Prepare
rm -rf $(PKG_BUILD_DIR)
mkdir -p $(PKG_BUILD_DIR)
$(CP) $(DL_DIR)/$(RPI_FIRMWARE_FILE)-LICENCE.broadcom $(PKG_BUILD_DIR)/LICENCE.broadcom
$(CP) $(DL_DIR)/$(RPI_FIRMWARE_FILE)-bootcode.bin $(PKG_BUILD_DIR)/bootcode.bin
$(CP) $(DL_DIR)/$(RPI_FIRMWARE_FILE)-fixup.dat $(PKG_BUILD_DIR)/fixup.dat
$(CP) $(DL_DIR)/$(RPI_FIRMWARE_FILE)-fixup_cd.dat $(PKG_BUILD_DIR)/fixup_cd.dat
$(CP) $(DL_DIR)/$(RPI_FIRMWARE_FILE)-fixup_x.dat $(PKG_BUILD_DIR)/fixup_x.dat
$(CP) $(DL_DIR)/$(RPI_FIRMWARE_FILE)-fixup4.dat $(PKG_BUILD_DIR)/fixup4.dat
$(CP) $(DL_DIR)/$(RPI_FIRMWARE_FILE)-fixup4cd.dat $(PKG_BUILD_DIR)/fixup4cd.dat
$(CP) $(DL_DIR)/$(RPI_FIRMWARE_FILE)-fixup4x.dat $(PKG_BUILD_DIR)/fixup4x.dat
$(CP) $(DL_DIR)/$(RPI_FIRMWARE_FILE)-start.elf $(PKG_BUILD_DIR)/start.elf
$(CP) $(DL_DIR)/$(RPI_FIRMWARE_FILE)-start_cd.elf $(PKG_BUILD_DIR)/start_cd.elf
$(CP) $(DL_DIR)/$(RPI_FIRMWARE_FILE)-start_x.elf $(PKG_BUILD_DIR)/start_x.elf
$(CP) $(DL_DIR)/$(RPI_FIRMWARE_FILE)-start4.elf $(PKG_BUILD_DIR)/start4.elf
$(CP) $(DL_DIR)/$(RPI_FIRMWARE_FILE)-start4cd.elf $(PKG_BUILD_DIR)/start4cd.elf
$(CP) $(DL_DIR)/$(RPI_FIRMWARE_FILE)-start4x.elf $(PKG_BUILD_DIR)/start4x.elf
endef
define Build/Compile
true
endef
define Package/bcm27xx-gpu-fw/install
true
endef
define Build/InstallDev
$(CP) $(PKG_BUILD_DIR)/bootcode.bin $(KERNEL_BUILD_DIR)
$(CP) $(PKG_BUILD_DIR)/LICENCE.broadcom $(KERNEL_BUILD_DIR)
$(CP) $(PKG_BUILD_DIR)/start.elf $(KERNEL_BUILD_DIR)
$(CP) $(PKG_BUILD_DIR)/start_cd.elf $(KERNEL_BUILD_DIR)
$(CP) $(PKG_BUILD_DIR)/start_x.elf $(KERNEL_BUILD_DIR)
$(CP) $(PKG_BUILD_DIR)/start4.elf $(KERNEL_BUILD_DIR)
$(CP) $(PKG_BUILD_DIR)/start4cd.elf $(KERNEL_BUILD_DIR)
$(CP) $(PKG_BUILD_DIR)/start4x.elf $(KERNEL_BUILD_DIR)
$(CP) $(PKG_BUILD_DIR)/fixup.dat $(KERNEL_BUILD_DIR)
$(CP) $(PKG_BUILD_DIR)/fixup_cd.dat $(KERNEL_BUILD_DIR)
$(CP) $(PKG_BUILD_DIR)/fixup_x.dat $(KERNEL_BUILD_DIR)
$(CP) $(PKG_BUILD_DIR)/fixup4.dat $(KERNEL_BUILD_DIR)
$(CP) $(PKG_BUILD_DIR)/fixup4cd.dat $(KERNEL_BUILD_DIR)
$(CP) $(PKG_BUILD_DIR)/fixup4x.dat $(KERNEL_BUILD_DIR)
endef
$(eval $(call BuildPackage,bcm27xx-gpu-fw))

View file

@ -1,14 +0,0 @@
--- a/smb1pdu.c
+++ b/smb1pdu.c
@@ -5851,7 +5851,11 @@ static int smb_populate_readdir_entry(struct ksmbd_conn *conn, int info_level,
*
* Return: 0 on success, otherwise -EINVAL
*/
+#if LINUX_VERSION_CODE >= KERNEL_VERSION(6, 1, 0)
+static bool ksmbd_fill_dirent(struct dir_context *ctx, const char *name, int namlen,
+#else
static int ksmbd_fill_dirent(struct dir_context *ctx, const char *name, int namlen,
+#endif
loff_t offset, u64 ino, unsigned int d_type)
{
struct ksmbd_readdir_data *buf =

File diff suppressed because it is too large Load diff

File diff suppressed because it is too large Load diff

View file

@ -1,749 +0,0 @@
#include <linux/module.h>
#include <linux/gpio/driver.h>
#include <linux/interrupt.h>
#include <linux/i2c.h>
#include <linux/delay.h>
#include "io.h"
static const struct i2c_device_id r2ec_id[] = {
{ "stm32v1", NO_OF_GPIOS },
{ }
};
MODULE_DEVICE_TABLE(i2c, r2ec_id);
static const struct of_device_id r2ec_of_table[] = {
{ .compatible = "tlt,stm32v1" },
{ }
};
MODULE_DEVICE_TABLE(of, r2ec_of_table);
static uint8_t g_proto;
struct r2ec {
struct gpio_chip chip;
struct irq_chip irqchip;
struct i2c_client *client;
struct mutex i2c_lock;
struct mutex irq_lock;
int ic_ready;
};
struct r2ec_platform_data {
unsigned gpio_base;
int (*setup)(struct i2c_client *client, int gpio, unsigned ngpio,
void *context);
int (*teardown)(struct i2c_client *client, int gpio, unsigned ngpio,
void *context);
void *context;
};
struct i2c_request {
uint8_t version;
uint16_t length;
uint8_t command;
uint8_t data[1];
// uint8_t checksum; // invisible
} __attribute__((packed));
struct i2c_response {
uint8_t version;
uint8_t length;
uint8_t command;
uint8_t data[7];
uint8_t checksum;
} __attribute__((packed));
static uint8_t calc_crc8(const uint8_t *data, size_t len)
{
uint8_t crc = 0xFF;
int i, j;
for (j = 0; j < len; j++) {
crc ^= data[j];
for (i = 0; i < 8; i++) {
crc = (crc & 0x80) ? (crc ^ 0xD5) << 1 : crc << 1;
}
}
return crc;
}
// generate outcoming mesage checksum and write i2c data
static int stm32_write(struct i2c_client *client, uint8_t ver, uint8_t cmd,
uint8_t *data, size_t len)
{
struct i2c_request *req;
uint8_t tmp[sizeof(struct i2c_request) + len];
const int tmp_len = sizeof(tmp);
int err;
if (!client) {
printk(KERN_ERR "R2EC I2C client is not ready!\n");
return -ENXIO;
}
req = (struct i2c_request *)tmp;
req->version = ver;
req->length = 2 + len; // 2 + data_len
req->command = cmd;
memcpy(req->data, data, len);
req->data[len] = calc_crc8(tmp, tmp_len - 1);
if ((err = i2c_master_send(client, tmp, tmp_len)) < 0) {
return err;
}
return 0;
}
// attempt to read i2c data
static int stm32_read(struct i2c_client *client, uint8_t *data, size_t len)
{
char buffer[64] = { 0 };
uint8_t checksum;
int err;
unsigned i, cnt = 0;
if (!client) {
printk(KERN_ERR "R2EC I2C client is not ready!\n");
return -ENXIO;
}
retry:
if ((err = i2c_master_recv(client, data, len)) < 0) {
if (err == -ETIMEDOUT && cnt < 10) {
cnt++;
msleep(10);
goto retry;
}
return err;
}
if (len == 1) {
return 0;
}
// ignore checksum on partial i2c response
if (len == sizeof(struct i2c_response) - 1) {
return 0;
}
// 0xFF - no data available
if (*(data + 3) == 0xFF) {
return -ENODATA;
}
// generate checksum and verify
checksum = calc_crc8(data, len - 1);
if (checksum != *(data + len - 1)) {
for (i = 0; i < len; i++) {
snprintf(buffer + strlen(buffer), sizeof(buffer),
"%02X ", *(data + i));
}
dev_err(&client->dev, "Checksum of incoming message "
"does not match!\n"
"Received: %s\n", buffer);
// for some reason checksum might appear as 1st byte in the
// data buffer, and actual checksum byte is zero
// apply quirk - discard first byte, skip checksum checking
if (!*(data + len - 1)) {
dev_err(&client->dev,
"Applying wrong-checksum quirk...\n");
memmove(data, data + 1, len - 1);
return 0;
}
return -EBADE;
}
return 0;
}
// attempt to retrieve supported protocol version, then retrieve device state
// and boot into application state
// this is done without interrupt, so there should be delay after writing
// request and before reading response for protocol versions up until v2
static int stm32_prepare(struct r2ec *gpio, struct i2c_client *client)
{
struct i2c_response rsp;
uint8_t data[1], recv[1];
int ret;
memset(&rsp, 0, sizeof(rsp));
data[0] = PROTO_GET_SUPPORTED;
if ((ret = stm32_write(client, 1, CMD_PROTO, data, 1))) {
dev_err(&client->dev,
"stm32_prepare: proto version write failed (%d)\n",
ret);
return ret;
}
// due compatibility reasons delay is needed between write/read
// operations
msleep(10);
if ((ret = stm32_read(client, (uint8_t *)&rsp, sizeof(rsp)))) {
dev_err(&client->dev,
"stm32_prepare: proto version read failed (%d)\n", ret);
return ret;
}
g_proto = rsp.data[1];
// fallback to version 1
if (g_proto != PROTO_VERSION_1 && g_proto != PROTO_VERSION_2) {
printk("STM32 fallback protocol: %u\n", g_proto);
g_proto = PROTO_VERSION_1;
}
printk("STM32 supported protocol: %u\n", g_proto);
data[0] = BOOT_STATE;
if ((ret = stm32_write(client, g_proto, CMD_BOOT, data, 1))) {
dev_err(&client->dev,
"stm32_prepare: boot state write failed (%d)\n", ret);
return ret;
}
if ((ret = stm32_read(client, recv, 1))) {
dev_err(&client->dev,
"stm32_prepare: boot state read failed (%d)\n", ret);
return ret;
}
// device might be not ready aka in bootloader state
// we might need to ignore gpio_write status value
gpio->ic_ready = 0;
// handle the following possible states reported either from
// bootloader or system:
switch (recv[0]) {
case NO_IMAGE_FOUND:
case APP_STARTED:
// device is ready, no need to ignore gpio_write status value
// note: on no_image_found, user-space flasher will reflash
// firmware and device will be rebooted
gpio->ic_ready = 1;
return 0;
case BOOT_STARTED:
case WATCHDOG_RESET:
case APPLICATION_START_FAIL:
case HARD_FAULT_ERROR:
case NO_DATA_AVAILABLE:
break;
default:
dev_err(&client->dev, "Device did not responded with correct "
"state! Actual response was 0x%02X. "
"Unable to get device state!\n", recv[0]);
break;
}
data[0] = BOOT_START_APP;
if ((ret = stm32_write(client, g_proto, CMD_BOOT, data, 1))) {
dev_err(&client->dev,
"stm32_prepare: boot start write failed (%d)\n", ret);
return ret;
}
if ((ret = stm32_read(client, recv, 1))) {
dev_err(&client->dev,
"stm32_prepare: boot start read failed (%d)\n", ret);
return ret;
}
if (recv[0] != STATUS_ACK && recv[0] != NO_DATA_AVAILABLE) {
dev_err(&client->dev, "Device did not responded with ACK. "
"Actual response was 0x%02X. "
"Unable to set device state!\n", recv[0]);
return -EIO;
}
return 0;
}
static int stm32_gpio_write(struct r2ec *gpio, int pin, int val)
{
struct i2c_request *req;
size_t len = 2;
uint8_t tmp[sizeof(struct i2c_request) + len];
//int err;
if (!gpio->client) {
printk(KERN_ERR "R2EC I2C client is not ready!\n");
return -ENXIO;
}
req = (struct i2c_request *)tmp;
req->version = PROTO_VERSION_2;
req->length = 2 + len; // command + crc + data
req->command = CMD_GPIO;
req->data[0] = pin;
req->data[1] = val;
i2c_master_send(gpio->client, tmp, sizeof(tmp));
// if ((err = i2c_master_send(gpio->client, tmp, sizeof(tmp))) < 0) {
// if (err != -ENXIO) {
// return err;
// }
// we need to ignore errors while device is not ready
// otherwise none of GPIOs/LEDs will be probed by the kernel
// if (!gpio->ic_ready) {
// err = 0;
// }
//
// return err;
// }
return 0;
}
static int stm32_gpio_read(struct r2ec *gpio, int pin, int val)
{
struct i2c_request *req;
size_t len = 2;
uint8_t tmp[sizeof(struct i2c_request) + len];
uint8_t recv[1];
int err;
if (!gpio->client) {
printk(KERN_ERR "R2EC I2C client is not ready!\n");
return -ENXIO;
}
req = (struct i2c_request *)tmp;
req->version = PROTO_VERSION_2;
req->length = 2 + len; // command + crc + data
req->command = CMD_GPIO;
req->data[0] = pin;
req->data[1] = val;
if ((err = i2c_master_send(gpio->client, tmp, sizeof(tmp))) < 0) {
return err;
}
if ((err = i2c_master_recv(gpio->client, recv, sizeof(recv))) < 0) {
return err;
}
switch (recv[0]) {
case GPIO_STATE_HIGH:
return 1;
case GPIO_STATE_LOW:
return 0;
}
return -EIO;
}
static int r2ec_get(struct gpio_chip *chip, unsigned offset)
{
struct r2ec *gpio = gpiochip_get_data(chip);
int value;
mutex_lock(&gpio->i2c_lock);
value = stm32_gpio_read(gpio, offset, GPIO_VALUE_GET);
mutex_unlock(&gpio->i2c_lock);
return value;
}
static void r2ec_set(struct gpio_chip *chip, unsigned offset, int value)
{
struct r2ec *gpio = gpiochip_get_data(chip);
int val = value ? GPIO_VALUE_SET_HIGH : GPIO_VALUE_SET_LOW;
mutex_lock(&gpio->i2c_lock);
stm32_gpio_write(gpio, offset, val);
mutex_unlock(&gpio->i2c_lock);
}
static int r2ec_input(struct gpio_chip *chip, unsigned offset)
{
struct r2ec *gpio = gpiochip_get_data(chip);
int status;
mutex_lock(&gpio->i2c_lock);
status = stm32_gpio_write(gpio, offset, GPIO_MODE_SET_INPUT);
mutex_unlock(&gpio->i2c_lock);
return status;
}
static int r2ec_output(struct gpio_chip *chip, unsigned offset, int value)
{
struct r2ec *gpio = gpiochip_get_data(chip);
int status;
mutex_lock(&gpio->i2c_lock);
status = stm32_gpio_write(gpio, offset, GPIO_MODE_SET_OUTPUT);
mutex_unlock(&gpio->i2c_lock);
r2ec_set(chip, offset, value);
return status;
}
static void noop(struct irq_data *data) { }
static int noop_wake(struct irq_data *data, unsigned on)
{
return 0;
}
static irqreturn_t r2ec_irq(int irq, void *data)
{
struct r2ec *gpio = data;
unsigned i;
for (i = 0; i < gpio->chip.ngpio; i++) {
handle_nested_irq(irq_find_mapping(gpio->chip.irq.domain, i));
}
return IRQ_HANDLED;
}
static void r2ec_irq_bus_lock(struct irq_data *data)
{
struct r2ec *gpio = irq_data_get_irq_chip_data(data);
mutex_lock(&gpio->irq_lock);
}
static void r2ec_irq_bus_sync_unlock(struct irq_data *data)
{
struct r2ec *gpio = irq_data_get_irq_chip_data(data);
mutex_unlock(&gpio->irq_lock);
}
static int chip_label_match(struct gpio_chip *chip, void *data)
{
return !strcmp(chip->label, data);
}
static int get_stm32_version(struct device *dev, uint8_t type, char *buffer)
{
struct gpio_chip *chip;
struct r2ec *gpio;
uint8_t recv[sizeof(struct i2c_response)];
uint8_t data[1];
int ret;
struct pt_fw_get_ver {
unsigned char command_ex;
unsigned char major;
unsigned char middle;
unsigned char minor;
unsigned char rev;
} __attribute__((packed)) *res;
chip = gpiochip_find("stm32v1", chip_label_match);
if (!chip) {
printk(KERN_ERR "Unable to find R2EC gpio chip!\n");
return -ENXIO;
}
gpio = gpiochip_get_data(chip);
if (!gpio->client) {
printk(KERN_ERR "R2EC I2C client is not ready!\n");
return -ENXIO;
}
data[0] = (type == CMD_FW) ? FW_VERSION : BOOT_VERSION;
mutex_lock(&gpio->i2c_lock);
if ((ret = stm32_write(gpio->client, g_proto, type, data, 1))) {
printk("%s: firmware version write failed (%d)\n",
__func__, ret);
goto done;
}
// prevent possible I2C bus lockup when master requests more than 1 byte
// and slave only sends a couple of bytes, but master is still waiting
// and SCL line is down; there is no recovery except power cycle
// first read 1 byte and compare with supported protocol versions
// if they match, then full messsage can be read, otherwise drop
// everything to not introduce bus lockup
if ((ret = stm32_read(gpio->client, data, 1))) {
printk("%s: firmware version read failed (%d)\n",
__func__, ret);
goto done;
}
if (data[0] != PROTO_VERSION_1 && data[0] != PROTO_VERSION_2) {
goto done;
}
recv[0] = data[0];
if ((ret = stm32_read(gpio->client, &recv[1], sizeof(recv) - 1))) {
printk("%s: firmware version read failed (%d)\n",
__func__, ret);
goto done;
}
// device is ready now, running in application-mode
// this is called by autoflasher script first time
if (!gpio->ic_ready) {
gpio->ic_ready = 1;
}
res = (struct pt_fw_get_ver *)(&recv[3]);
sprintf(buffer, "%02d.%02d.%02d rev. %02d\n",
res->major, res->middle, res->minor, res->rev);
done:
mutex_unlock(&gpio->i2c_lock);
return strlen(buffer);
}
static ssize_t app_version_show(struct device *dev,
struct device_attribute *attr, char *buffer)
{
return get_stm32_version(dev, CMD_FW, buffer);
}
static ssize_t boot_version_show(struct device *dev,
struct device_attribute *attr, char *buffer)
{
return get_stm32_version(dev, CMD_BOOT, buffer);
}
static ssize_t reset_store(struct device *dev, struct device_attribute *attr,
const char *buff, size_t count)
{
struct gpio_chip *chip;
struct r2ec *gpio;
uint8_t data[1];
chip = gpiochip_find("stm32v1", chip_label_match);
if (!chip) {
printk(KERN_ERR "Unable to find R2EC gpio chip!\n");
return -ENXIO;
}
gpio = gpiochip_get_data(chip);
if (!gpio->client) {
printk(KERN_ERR "R2EC I2C client is not ready!\n");
return -ENXIO;
}
data[0] = BOOT_START_APP;
mutex_lock(&gpio->i2c_lock);
if (stm32_write(gpio->client, g_proto, CMD_BOOT, data, 1)) {
printk(KERN_ERR "Unable transmit R2EC data!\n");
goto done;
}
done:
mutex_unlock(&gpio->i2c_lock);
return 1;
}
static struct device_attribute g_r2ec_kobj_attr[] = {
__ATTR_RO(app_version),
__ATTR_RO(boot_version),
__ATTR_WO(reset)
};
static struct attribute *g_r2ec_attrs[] = {
&g_r2ec_kobj_attr[0].attr,
&g_r2ec_kobj_attr[1].attr,
&g_r2ec_kobj_attr[2].attr,
NULL,
};
static struct attribute_group g_r2ec_attr_group = { .attrs = g_r2ec_attrs };
static struct kobject *g_r2ec_kobj;
static int r2ec_probe(struct i2c_client *client, const struct i2c_device_id *id)
{
struct r2ec_platform_data *pdata = dev_get_platdata(&client->dev);
struct r2ec *gpio;
int status, i;
gpio = devm_kzalloc(&client->dev, sizeof(*gpio), GFP_KERNEL);
if (!gpio) {
return -ENOMEM;
}
for (i = 0; i < 10; i++) {
if (!(status = stm32_prepare(gpio, client))) {
break;
}
dev_err(&client->dev,
"Unable to initialize device, retrying...\n");
// give some time for next interation...
msleep(500);
}
if (status) {
dev_err(&client->dev, "Unable to initialize device!\n");
devm_kfree(&client->dev, gpio);
return status;
}
mutex_init(&gpio->irq_lock);
mutex_init(&gpio->i2c_lock);
lockdep_set_subclass(&gpio->i2c_lock,
i2c_adapter_depth(client->adapter));
gpio->chip.base = pdata ? pdata->gpio_base : -1;
gpio->chip.can_sleep = true;
gpio->chip.parent = &client->dev;
gpio->chip.owner = THIS_MODULE;
gpio->chip.get = r2ec_get;
gpio->chip.set = r2ec_set;
gpio->chip.direction_input = r2ec_input;
gpio->chip.direction_output = r2ec_output;
gpio->chip.ngpio = id->driver_data;
gpio->chip.label = client->name;
gpio->client = client;
i2c_set_clientdata(client, gpio);
status = devm_gpiochip_add_data(&client->dev, &gpio->chip, gpio);
if (status < 0) {
goto fail;
}
if (client->irq) {
gpio->irqchip.name = "r2ec";
gpio->irqchip.irq_enable = noop,
gpio->irqchip.irq_disable = noop,
gpio->irqchip.irq_ack = noop,
gpio->irqchip.irq_mask = noop,
gpio->irqchip.irq_unmask = noop,
gpio->irqchip.irq_set_wake = noop_wake,
gpio->irqchip.irq_bus_lock = r2ec_irq_bus_lock;
gpio->irqchip.irq_bus_sync_unlock = r2ec_irq_bus_sync_unlock;
status = gpiochip_irqchip_add_nested(&gpio->chip,
&gpio->irqchip,
0, handle_level_irq,
IRQ_TYPE_NONE);
if (status) {
dev_err(&client->dev, "cannot add irqchip\n");
goto fail;
}
status = devm_request_threaded_irq(&client->dev, client->irq,
NULL, r2ec_irq,
IRQF_ONESHOT |
IRQF_TRIGGER_FALLING |
IRQF_SHARED,
dev_name(&client->dev),
gpio);
if (status) {
goto fail;
}
}
if (pdata && pdata->setup) {
status = pdata->setup(client, gpio->chip.base, gpio->chip.ngpio,
pdata->context);
if (status < 0) {
dev_warn(&client->dev, "setup --> %d\n", status);
}
}
dev_info(&client->dev, "probed\n");
return 0;
fail:
devm_kfree(&client->dev, gpio);
dev_dbg(&client->dev, "probe error %d for %s\n", status, client->name);
return status;
}
static int r2ec_remove(struct i2c_client *client)
{
struct r2ec_platform_data *pdata = dev_get_platdata(&client->dev);
struct r2ec *gpio = i2c_get_clientdata(client);
int status = 0;
if (!(pdata && pdata->teardown)) {
return status;
}
status = pdata->teardown(client, gpio->chip.base, gpio->chip.ngpio,
pdata->context);
if (status < 0) {
dev_err(&client->dev, "%s --> %d\n", "teardown", status);
}
return status;
}
static struct i2c_driver r2ec_driver = {
.driver = {
.name = "r2ec",
.of_match_table = of_match_ptr(r2ec_of_table),
},
.probe = r2ec_probe,
.remove = r2ec_remove,
.id_table = r2ec_id,
};
static int __init r2ec_init(void)
{
int ret;
ret = i2c_add_driver(&r2ec_driver);
if (ret) {
printk(KERN_ERR "Unable to initialize `r2ec` driver!\n");
return ret;
}
g_r2ec_kobj = kobject_create_and_add("r2ec", NULL);
if (!g_r2ec_kobj) {
i2c_del_driver(&r2ec_driver);
printk(KERN_ERR "Unable to create `r2ec` kobject!\n");
return -ENOMEM;
}
if (sysfs_create_group(g_r2ec_kobj, &g_r2ec_attr_group)) {
kobject_put(g_r2ec_kobj);
i2c_del_driver(&r2ec_driver);
printk(KERN_ERR "Unable to create `r2ec` sysfs group!\n");
return -ENOMEM;
}
return 0;
}
static void __exit r2ec_exit(void)
{
kobject_put(g_r2ec_kobj);
i2c_del_driver(&r2ec_driver);
}
module_init(r2ec_init);
module_exit(r2ec_exit);
MODULE_AUTHOR("Jokubas Maciulaitis <jokubas.maciulaitis@teltonika.lt>");
MODULE_DESCRIPTION("STM32F0 (R2EC) I2C GPIO Expander driver");
MODULE_LICENSE("GPL v2");

File diff suppressed because it is too large Load diff

File diff suppressed because it is too large Load diff

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@ -1,43 +0,0 @@
From 582774df32849d6638133a675f7502730b46e217 Mon Sep 17 00:00:00 2001
From: Jonathan Bell <jonathan@raspberrypi.com>
Date: Wed, 11 Aug 2021 15:33:57 +0100
Subject: [PATCH] usb: xhci: workaround for bogus SET_DEQ_PENDING endpoint
state
See https://github.com/raspberrypi/linux/issues/3981
An unknown unsafe memory access can result in the ep_state variable
in xhci_virt_ep being trampled with a stuck SET_DEQ_PENDING state
despite successful completion of a Set TR Deq Pointer command.
All URB enqueue/dequeue calls for the endpoint will fail in this state
so no transfers are possible until the device is reconnected.
As a workaround, clear the flag if we see it set and issue a new Set
TR Deq command anyway - this should be harmless, as a prior Set TR Deq
command will only have been issued in the Stopped state, and if the
endpoint is Running then the controller is required to ignore it and
respond with a Context State Error event TRB.
Signed-off-by: Jonathan Bell <jonathan@raspberrypi.com>
---
drivers/usb/host/xhci-ring.c | 6 +++---
1 file changed, 3 insertions(+), 3 deletions(-)
diff --git a/drivers/usb/host/xhci-ring.c b/drivers/usb/host/xhci-ring.c
index 35b246aeb902a..726d8291bd31a 100644
--- a/drivers/usb/host/xhci-ring.c
+++ b/drivers/usb/host/xhci-ring.c
@@ -4223,9 +4223,9 @@ void xhci_queue_new_dequeue_state(struct xhci_hcd *xhci,
}
ep = &xhci->devs[slot_id]->eps[ep_index];
if ((ep->ep_state & SET_DEQ_PENDING)) {
- xhci_warn(xhci, "WARN Cannot submit Set TR Deq Ptr\n");
- xhci_warn(xhci, "A Set TR Deq Ptr command is pending.\n");
- return;
+ xhci_warn(xhci, "WARN A Set TR Deq Ptr command is pending for slot %u ep %u\n",
+ slot_id, ep_index);
+ ep->ep_state &= ~SET_DEQ_PENDING;
}
/* This function gets called from contexts where it cannot sleep */

View file

@ -1,131 +0,0 @@
From 719f0efb5a355adc04653d12d946901c8a051177 Mon Sep 17 00:00:00 2001
From: Vitaly Lavrov <vel21ripn@gmail.com>
Date: Mon, 10 Dec 2018 12:34:10 +0300
Subject: [PATCH] Add NF_CUSTOM
---
include/net/netfilter/nf_conntrack_extend.h | 4 ++-
net/netfilter/Kconfig | 10 +++++++
net/netfilter/nf_conntrack_core.c | 2 +-
net/netfilter/nf_conntrack_extend.c | 45 +++++++++++++++++++++++++++++
4 files changed, 59 insertions(+), 2 deletions(-)
diff --git a/include/net/netfilter/nf_conntrack_extend.h b/include/net/netfilter/nf_conntrack_extend.h
index 112a6f4..6146689 100644
--- a/include/net/netfilter/nf_conntrack_extend.h
+++ b/include/net/netfilter/nf_conntrack_extend.h
@@ -28,7 +28,8 @@ enum nf_ct_ext_id {
#if IS_ENABLED(CONFIG_NETFILTER_SYNPROXY)
NF_CT_EXT_SYNPROXY,
#endif
- NF_CT_EXT_NUM,
+ NF_CT_EXT_CUSTOM,
+ NF_CT_EXT_NUM=NF_CT_EXT_CUSTOM+CONFIG_NF_CONNTRACK_CUSTOM,
};
#define NF_CT_EXT_HELPER_TYPE struct nf_conn_help
@@ -96,5 +97,6 @@ struct nf_ct_ext_type {
};
int nf_ct_extend_register(const struct nf_ct_ext_type *type);
+int nf_ct_extend_custom_register(struct nf_ct_ext_type *type,unsigned long int cid);
void nf_ct_extend_unregister(const struct nf_ct_ext_type *type);
#endif /* _NF_CONNTRACK_EXTEND_H */
diff --git a/net/netfilter/Kconfig b/net/netfilter/Kconfig
index d374a93..2ca93aa 100644
--- a/net/netfilter/Kconfig
+++ b/net/netfilter/Kconfig
@@ -104,6 +104,16 @@ config NF_CONNTRACK_SECMARK
If unsure, say 'N'.
+config NF_CONNTRACK_CUSTOM
+ int "Number of custom extend"
+ range 0 4
+ depends on NETFILTER_ADVANCED
+ default "2"
+ help
+ This parameter specifies how many custom extensions can be registered.
+
+ The default value is 2.
+
config NF_CONNTRACK_ZONES
bool 'Connection tracking zones'
depends on NETFILTER_ADVANCED
diff --git a/net/netfilter/nf_conntrack_core.c b/net/netfilter/nf_conntrack_core.c
index 9a40312..83e9379 100644
--- a/net/netfilter/nf_conntrack_core.c
+++ b/net/netfilter/nf_conntrack_core.c
@@ -2409,7 +2409,7 @@ EXPORT_SYMBOL_GPL(nf_conntrack_set_hashsize);
static __always_inline unsigned int total_extension_size(void)
{
/* remember to add new extensions below */
- BUILD_BUG_ON(NF_CT_EXT_NUM > 9);
+ BUILD_BUG_ON(NF_CT_EXT_NUM > 12);
return sizeof(struct nf_ct_ext) +
sizeof(struct nf_conn_help)
diff --git a/net/netfilter/nf_conntrack_extend.c b/net/netfilter/nf_conntrack_extend.c
index d4ed1e1..00d7fc6 100644
--- a/net/netfilter/nf_conntrack_extend.c
+++ b/net/netfilter/nf_conntrack_extend.c
@@ -106,11 +106,56 @@ int nf_ct_extend_register(const struct nf_ct_ext_type *type)
}
EXPORT_SYMBOL_GPL(nf_ct_extend_register);
+static unsigned long int nf_ct_ext_cust_id[CONFIG_NF_CONNTRACK_CUSTOM];
+static enum nf_ct_ext_id
+nf_ct_extend_get_custom_id(unsigned long int ext_id);
+
+int nf_ct_extend_custom_register(struct nf_ct_ext_type *type,
+ unsigned long int cid)
+{
+ int ret;
+ enum nf_ct_ext_id new_id = nf_ct_extend_get_custom_id(cid);
+ if(!new_id)
+ return -EBUSY;
+ type->id = new_id;
+ ret = nf_ct_extend_register(type);
+ if(ret < 0) {
+ mutex_lock(&nf_ct_ext_type_mutex);
+ nf_ct_ext_cust_id[new_id - NF_CT_EXT_CUSTOM] = 0;
+ mutex_unlock(&nf_ct_ext_type_mutex);
+ }
+ return ret;
+}
+EXPORT_SYMBOL_GPL(nf_ct_extend_custom_register);
+
+static enum nf_ct_ext_id
+nf_ct_extend_get_custom_id(unsigned long int ext_id)
+{
+ enum nf_ct_ext_id ret = 0;
+ int i;
+ mutex_lock(&nf_ct_ext_type_mutex);
+ for(i = 0; i < CONFIG_NF_CONNTRACK_CUSTOM; i++) {
+ if(!nf_ct_ext_cust_id[i]) {
+ nf_ct_ext_cust_id[i] = ext_id;
+ ret = i+NF_CT_EXT_CUSTOM;
+ break;
+ }
+ if(nf_ct_ext_cust_id[i] == ext_id) {
+ ret = i+NF_CT_EXT_CUSTOM;
+ break;
+ }
+ }
+ mutex_unlock(&nf_ct_ext_type_mutex);
+ return ret;
+}
+
/* This MUST be called in process context. */
void nf_ct_extend_unregister(const struct nf_ct_ext_type *type)
{
mutex_lock(&nf_ct_ext_type_mutex);
RCU_INIT_POINTER(nf_ct_ext_types[type->id], NULL);
+ if(type->id >= NF_CT_EXT_CUSTOM && type->id < NF_CT_EXT_NUM)
+ nf_ct_ext_cust_id[type->id-NF_CT_EXT_CUSTOM] = 0;
mutex_unlock(&nf_ct_ext_type_mutex);
synchronize_rcu();
}
--
2.9.0

View file

@ -1,346 +0,0 @@
#!/bin/sh
#
# Copyright (c) 2015 The Linux Foundation. All rights reserved.
# Copyright (c) 2011-2015 OpenWrt.org
#
. /lib/functions/uci-defaults.sh
. /lib/functions/system.sh
CFG=/etc/board.json
# do not run on preinit/early init
[ "$EARLY_INIT" ] && return
strstr() {
[ "${1#*$2*}" = "$1" ] && return 1
return 0
}
print_array() {
json_add_array $1
case "$1" in
5G_NSA)
for element in $2
do
json_add_string "" "$(echo $element)"
done
;;
5G_SA)
for element in $2
do
json_add_string "" "$(echo $element)"
done
;;
4G)
for element in $2
do
json_add_string "" "$(echo $element)"
done
;;
3G)
for element in $2
do
json_add_string "" "wcdma_$(echo $element)"
done
;;
2G)
for element in $2
do
json_add_string "" "$(echo $element)"
done
;;
esac
json_close_array
}
gather_band_capabilities() {
# Same logic as unhandler.c
###################### EG06 #########################
if strstr $revision_from_unhandler "EG06E"; then #EG06E
lte_bands="1 3 5 7 8 20 28 32 38 40 41" #B
trysg_bands="850 900 1800 2100" #MHz
dug_bands=""
elif strstr $revision_from_unhandler "EG06A"; then #EG06A
lte_bands="2 4 5 7 12 13 25 26 29 30 66"
trysg_bands="850 1700 1900"
dug_bands=""
###################### EC25 #########################
elif strstr $revision_from_unhandler "EC25EF"; then #EC25E
lte_bands="1 3 5 7 8 20 38 40 41"
trysg_bands="850 900 2100"
dug_bands="900 1800" #MHz
elif strstr $revision_from_unhandler "EC25EC"; then #EC25EC
lte_bands="1 3 7 8 20 28"
trysg_bands="900 2100"
dug_bands="900 1800"
elif strstr $revision_from_unhandler "EC25AUX"; then #EC25AUX
lte_bands="1 2 3 4 5 7 8 28 40"
trysg_bands="850 900 1700 1900 2100"
dug_bands="850 900 1800 1900"
elif strstr $revision_from_unhandler "EC25AFA"; then #EC25A
lte_bands="2 4 12"
trysg_bands="850 1700 1900"
dug_bands=""
elif strstr $revision_from_unhandler "EC25V"; then #EC25V
lte_bands="4 13"
trysg_bands=""
dug_bands=""
elif strstr $revision_from_unhandler "EC25AFX"; then #EC25AFX
lte_bands="2 4 5 12 13 14 66 71"
trysg_bands="850 1700 1900"
dug_bands=""
elif strstr $revision_from_unhandler "EC25AFF"; then #EC25AF
lte_bands="2 4 5 12 13 14 66 71"
trysg_bands="850 1700 1900"
dug_bands=""
elif strstr $revision_from_unhandler "EC25AUTF"; then #EC25AUT
lte_bands="1 3 5 7 28"
trysg_bands="850 2100"
dug_bands=""
elif strstr $revision_from_unhandler "EC25AUTL"; then #EC25AUTL
lte_bands="3 7 28"
trysg_bands=""
dug_bands=""
elif strstr $revision_from_unhandler "EC25AUF"; then #EC25AU
lte_bands="1 2 3 4 5 7 8 28 40"
trysg_bands="850 900 1900 2100"
dug_bands="850 900 1800 1900"
elif strstr $revision_from_unhandler "EC25J"; then #EC25J
lte_bands="1 3 8 18 19 26 41"
trysg_bands="800 900 2100"
dug_bands=""
elif strstr $revision_from_unhandler "EC25EUX"; then #EC25EUX
lte_bands="1 3 7 8 20 28 38 40 41"
trysg_bands="900 2100"
dug_bands="900 1800"
elif strstr $revision_from_unhandler "EC25EUF"; then #EC25EU
lte_bands="1 3 7 8 20 28 38 40 41"
trysg_bands="900 2100"
dug_bands="900 1800"
elif strstr $revision_from_unhandler "EC25EUG"; then #EC25EU
lte_bands="1 3 7 8 20 28 38 40 41"
trysg_bands="900 2100"
dug_bands="900 1800"
elif strstr $revision_from_unhandler "EC25MX"; then #EC25MX
lte_bands="2 4 5 7 28 66"
trysg_bands="850 1700 1900"
dug_bands=""
###################### EC21 #########################
elif strstr $revision_from_unhandler "EC21EUX"; then #EC21EUX
lte_bands="1 3 7 8 20 28"
trysg_bands="900 2100"
dug_bands="900 1800"
elif strstr $revision_from_unhandler "EC21EU"; then #EC21EU
lte_bands="1 3 7 8 20 28"
trysg_bands="900 2100"
dug_bands="900 1800"
elif strstr $revision_from_unhandler "EC21EC"; then #EC21EC
lte_bands="1 3 7 8 20 28"
trysg_bands="900 2100"
dug_bands="900 1800"
elif strstr $revision_from_unhandler "EC21E"; then #EC21E
lte_bands="1 3 5 7 8 20"
trysg_bands="850 900 2100"
dug_bands="900 1800"
elif strstr $revision_from_unhandler "EC21V"; then #EC21V
lte_bands="4 13"
trysg_bands=""
dug_bands=""
elif strstr $revision_from_unhandler "EC21KL"; then #EC21KL
lte_bands="1 3 5 7 8"
trysg_bands=""
dug_bands=""
elif strstr $revision_from_unhandler "EC21J"; then #EC21J
lte_bands="1 3 8 18 19 26"
trysg_bands=""
dug_bands=""
elif strstr $revision_from_unhandler "EC21AUX"; then #EC21AUX
lte_bands="1 2 3 4 5 7 8 28 40"
trysg_bands="850 900 1700 1900 2100"
dug_bands="850 900 1800 1900"
elif strstr $revision_from_unhandler "EC21AUT"; then #EC21AUT
lte_bands="1 3 5 7 28"
trysg_bands="850 2100"
dug_bands=""
elif strstr $revision_from_unhandler "EC21AU"; then #EC21AU
lte_bands="1 2 3 4 5 7 8 28 40"
trysg_bands="850 900 1900 2100"
dug_bands="850 900 1800 1900"
elif strstr $revision_from_unhandler "EC21A"; then #EC21A
lte_bands="2 4 12"
trysg_bands="850 1700 1900"
dug_bands=""
###################### EG25 #########################
elif strstr $revision_from_unhandler "EG25G"; then #EG25G
lte_bands="1 2 3 4 5 7 8 12 13 18 19 20 25 26 28 38 39 40 41"
trysg_bands="800 850 900 1700 1900 2100"
dug_bands="850 900 1800 1900"
elif strstr $revision_from_unhandler "EG12EA"; then #EG12EA
lte_bands="1 3 5 7 8 20 28 38 40 41"
trysg_bands="850 900 1800 2100"
dug_bands=""
elif strstr $revision_from_unhandler "EG12NA"; then #EG12NA
lte_bands="2 4 5 7 12 13 14 17 25 26 29 30 41 66 71"
trysg_bands="850 1700 1900"
dug_bands=""
elif strstr $revision_from_unhandler "BG96"; then #BG96M
lte_bands="1 2 3 4 5 8 12 13 18 19 20 26 28 39"
trysg_bands=""
dug_bands="850 900 1800 1900"
##################### SLM750 ########################
elif strstr $revision_from_unhandler "750VE"; then #SLM750VE
lte_bands="1 3 5 7 8 20 40"
trysg_bands="850 900 2100"
dug_bands="900 1800"
elif strstr $revision_from_unhandler "750VAU"; then #SLM750VAU
lte_bands="1 3 5 7 8 28 40"
trysg_bands="850 900 2100"
dug_bands="850 900 1800"
elif strstr $revision_from_unhandler "750VA"; then #SLM750VA
lte_bands="2 4 5 12 13 17 18 25 26 41"
trysg_bands="850 1700 1900"
dug_bands="850 1900"
elif strstr $revision_from_unhandler "750VJ"; then #SLM750VJ
lte_bands="1 3 8 18 19 26 41"
trysg_bands="800 900 2100"
dug_bands=""
elif strstr $revision_from_unhandler "750VSA"; then #SLM750VSA
lte_bands="2 4 5 7 8 28 40"
trysg_bands="850 900 1900"
dug_bands="850 900 1900"
###################### UC20 #########################
elif strstr $revision_from_unhandler "UC20E"; then #UC20E
lte_bands=""
trysg_bands="900 2100"
dug_bands="850 900 1800 1900"
elif strstr $revision_from_unhandler "UC20G"; then #UC20G
lte_bands=""
trysg_bands="800 850 900 1900 2100"
dug_bands="850 900 1800 1900"
elif strstr $revision_from_unhandler "UC20A"; then #UC20A
lte_bands=""
trysg_bands="850 1900"
dug_bands=""
###################### EC200A #########################
elif strstr $revision_from_unhandler "EC200AAU"; then #EC200AAU
lte_bands="1 2 3 4 5 7 8 28 40 66"
trysg_bands="850 900 1700 1900 2100"
dug_bands="850 900 1800 1900"
elif strstr $revision_from_unhandler "EC200AEU"; then #EC200AEU
lte_bands="1 3 5 7 8 20 28 38 40 41"
trysg_bands="850 900 2100"
dug_bands="900 1800"
####################### RG501QEU #######################
elif strstr $revision_from_unhandler "RG501QEU"; then #5G module
nsa_nr5g_bands="1 3 5 7 8 20 28 38 40 41 77 78"
sa_nr5g_bands="1 3 5 7 8 20 28 38 40 41 77 78"
lte_bands="1 3 5 7 8 20 28 32 38 40 41 42 43"
trysg_bands="2100 850 900"
dug_bands=""
elif strstr $revision_from_unhandler "RG520NEU"; then #5G module
nsa_nr5g_bands="1 3 5 7 8 20 28 38 40 41 75 76 77 78"
sa_nr5g_bands="1 3 5 7 8 20 28 38 40 41 75 76 77 78"
lte_bands="1 3 5 7 8 20 28 32 38 40 41 42 43"
trysg_bands="2100 850 900"
dug_bands=""
else
lte_bands="1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28"
trysg_bands="700 800 850 900 1500 1700 2600"
dug_bands="1700 1800 1900 2100"
fi
}
validate_service_modes() {
json_get_keys service_modes service_modes
found_modes="$(printf "$service_modes" | awk '!seen[$0]++'| wc -l)"
[ "$found_modes" -eq 0 ] && {
return 0
}
return 1
}
#~ Get model name for RUTX products
setup_modem() {
local key="$1"
local object_num="$2"
local id gps boudrate type desc control product vendor stop_bits
json_select "$object_num"
json_get_vars id product
if [ "$id" = "$id_from_unhandler" ]; then
[ -z "$product" ] || \
{
[ -f "/sys/bus/usb/devices/$id/idVendor" ] && [ -f "/sys/bus/usb/devices/$id/idProduct" ] || {
json_select ..
return 1
}
validate_service_modes && {
gather_band_capabilities
json_select_object service_modes
[ -z "$nsa_nr5g_bands" ] || print_array "5G_NSA" "$nsa_nr5g_bands"
[ -z "$sa_nr5g_bands" ] || print_array "5G_SA" "$sa_nr5g_bands"
[ -z "$lte_bands" ] || print_array "4G" "$lte_bands"
[ -z "$trysg_bands" ] || print_array "3G" "$trysg_bands"
[ -z "$dug_bands" ] || print_array "2G" "$dug_bands"
json_select ..
}
json_select ..
return 1
}
vendor="$(cat "/sys/bus/usb/devices/$id/idVendor")"
product="$(cat "/sys/bus/usb/devices/$id/idProduct")"
[ -f "/lib/network/wwan/$vendor:$product" ] && {
devicename="$id"
gather_band_capabilities
json_set_namespace defaults old_cb
json_load "$(cat /lib/network/wwan/$vendor:$product)"
json_get_vars gps boudrate type desc control stop_bits
json_set_namespace "$old_cb"
[ "${devicename%%:*}" = "$devicename" ] && {
json_add_string vendor "$vendor"
json_add_string product "$product"
json_add_string gps "$gps"
json_add_string stop_bits "$stop_bits"
json_add_string boudrate "$boudrate"
json_add_string type "$type"
json_add_string desc "$desc"
json_add_string control "$control"
json_add_string revision "${revision_from_unhandler::-2}"
json_add_object service_modes
[ -z "$nsa_nr5g_bands" ] || print_array "5G_NSA" "$nsa_nr5g_bands"
[ -z "$sa_nr5g_bands" ] || print_array "5G_SA" "$sa_nr5g_bands"
[ -z "$lte_bands" ] || print_array "4G" "$lte_bands"
[ -z "$trysg_bands" ] || print_array "3G" "$trysg_bands"
[ -z "$dug_bands" ] || print_array "2G" "$dug_bands"
json_close_object
}
}
fi
json_select ..
}
[ -s "${CFG}" ] || exit 1
id_from_unhandler="$1"
revision_from_unhandler="$2"
lock /var/run/board_modem.lock
board_config_update
json_for_each_item setup_modem modems
board_config_flush
lock -u /var/run/board_modem.lock
exit 0

View file

@ -1,824 +0,0 @@
#!/bin/sh
CFG=/etc/board.json
. /usr/share/libubox/jshn.sh
[ -s $CFG ] || /bin/board_detect || exit 1
[ -s /etc/config/network ] && \
[ -s /etc/config/system ] && \
[ -s /etc/config/hwinfo ] && \
[ -s /etc/config/blesem ] && \
[ -s /etc/config/poe ] && \
exit 0
generate_bridge() {
local name=$1
local macaddr=$2
uci -q batch <<-EOF
set network.$name=device
set network.$name.name=$name
set network.$name.type=bridge
EOF
if [ -n "$macaddr" ]; then
uci -q batch <<-EOF
set network.$name.macaddr=$macaddr
EOF
fi
}
generate_static_network() {
uci -q batch <<-EOF
delete network.loopback
set network.loopback='interface'
set network.loopback.device='lo'
set network.loopback.proto='static'
set network.loopback.ipaddr='127.0.0.1'
set network.loopback.netmask='255.0.0.0'
EOF
if json_is_a dsl object; then
json_select dsl
if json_is_a atmbridge object; then
json_select atmbridge
local vpi vci encaps payload nameprefix
json_get_vars vpi vci encaps payload nameprefix
uci -q batch <<-EOF
delete network.atm
set network.atm='atm-bridge'
set network.atm.vpi='$vpi'
set network.atm.vci='$vci'
set network.atm.encaps='$encaps'
set network.atm.payload='$payload'
set network.atm.nameprefix='$nameprefix'
EOF
json_select ..
fi
if json_is_a modem object; then
json_select modem
local type annex firmware tone xfer_mode
json_get_vars type annex firmware tone xfer_mode
uci -q batch <<-EOF
delete network.dsl
set network.dsl='dsl'
set network.dsl.annex='$annex'
set network.dsl.firmware='$firmware'
set network.dsl.tone='$tone'
set network.dsl.xfer_mode='$xfer_mode'
EOF
json_select ..
fi
json_select ..
fi
}
ip6assign=
disable_vlan=
apply_network_options() {
json_select network_options && {
json_get_vars ip6assign ula disable_vlan
json_select ..
}
[ -z "$ip6assign" ] && ip6assign=1
[ -z "$ula" ] && ula=1
[ -e /proc/sys/net/ipv6 ] && [ "$ula" = 1 ] && {
uci -q batch <<-EOF
delete network.globals
set network.globals='globals'
set network.globals.ula_prefix='auto'
EOF
}
}
metric=1
addr_offset=2
generate_network() {
local ports device macaddr proto type ipaddr netmask vlan no_metric
local bridge=$2
uci -q batch <<-EOF
delete "network.$1"
set network.$1='interface'
EOF
json_select network
json_select "$1"
json_get_vars device macaddr proto ipaddr netmask vlan ipv6 guest type
json_get_values ports ports
json_select ..
json_select ..
json_select network_options && {
json_get_vars no_metric
json_select ..
}
# Force bridge for "lan" as it may have other devices (e.g. wireless)
# bridged
[ "$1" = "lan" ] && [ -z "$ports" ] && {
ports="$device"
}
[ -n "$ports" ] && [ -z "$bridge" ] && {
[ -n "$macaddr" ] && {
for port in $ports; do
uci -q batch <<-EOF
add network device
set network.@device[-1].name='$port'
set network.@device[-1].macaddr='$macaddr'
EOF
done
}
uci -q batch <<-EOF
add network device
rename network.@device[-1]='br_$1'
set network.@device[-1].name='br-$1'
set network.@device[-1].type='bridge'
EOF
[ -n "$device" ] && uci add_list network.@device[-1].ports="$device" || {
for port in $ports; do
uci add_list network.@device[-1].ports="$port"
done
}
device=br-$1
type=
macaddr=""
json_select hwinfo
json_get_vars dsa
json_select ..
}
if [ -n "$macaddr" ]; then
uci -q batch <<-EOF
add network device
set network.@device[-1].name='$device'
set network.@device[-1].macaddr='$macaddr'
EOF
fi
uci -q batch <<-EOF
delete network.$1
set network.$1='interface'
set network.$1.type='$type'
set network.$1.device='$device'
set network.$1.proto='none'
EOF
[ "$1" != "lan" ] && metric=$((metric+1))
[ "$guest" = "1" ] && uci set network.$1.guest='1'
case "$proto" in
static)
local ipad metr
case "$1" in
lan)
ipad="192.168.100.1"
metr=1
;;
*)
ipad=${ipaddr:-"192.168.$((addr_offset++)).1"}
metr="$metric"
;;
esac
netm=${netmask:-"255.255.255.0"}
uci -q batch <<-EOF
set network.$1.proto='static'
set network.$1.ipaddr='$ipad'
set network.$1.netmask='$netm'
set network.$1.metric='$metr'
EOF
[ "$ipv6" = "1" ] && uci set network.$1.ipv6="$ipv6"
[ -e /proc/sys/net/ipv6 ] && [ "$ip6assign" = 1 ] && \
uci set network.$1.ip6assign='60'
;;
dhcp)
# fixup IPv6 slave interface if parent is a bridge
[ "$type" = "bridge" ] && device="br-$1"
uci -q batch <<-EOF
set network.$1.proto='dhcp'
set network.$1.metric='$metric'
EOF
[ -e /proc/sys/net/ipv6 ] && {
metric=$((metric+1))
uci -q batch <<-EOF
delete network.${1}6
set network.${1}6='interface'
set network.${1}6.device='$device'
set network.${1}6.proto='dhcpv6'
set network.${1}6.metric='$metric'
EOF
[ "$ip6assign" != 1 ] && uci set network.${1}6.delegate='0'
}
;;
pppoe)
uci -q batch <<-EOF
set network.$1.proto='pppoe'
set network.$1.username='username'
set network.$1.password='password'
EOF
[ -e /proc/sys/net/ipv6 ] && {
uci -q batch <<-EOF
set network.$1.ipv6='1'
delete network.${1}6
set network.${1}6='interface'
set network.${1}6.device='@${1}'
set network.${1}6.proto='dhcpv6'
EOF
}
;;
esac
[ -n "$no_metric" ] && {
uci -q delete network.${1}.metric
[ -e /proc/sys/net/ipv6 ] && uci -q delete network.${1}6.metric
}
}
add_modem_section() {
local id="$1"
local num="$2"
local simcount="$3"
local builtin="$4"
local custom_proto custom_ifname
json_select ..
json_get_vars custom_proto custom_ifname
json_select modems
for count in $(seq "$simcount"); do
interface="mob${num}s${count}a1"
local proto="wwan"
# if needed, use custom proto for rmnet/other devices
[ -n "${custom_proto}" ] && proto="${custom_proto}"
metric=$((metric+1))
uci_remove network "${interface}"
uci_add network interface "${interface}"
uci_set network "${interface}" proto "$proto"
uci_set network "${interface}" modem "$id"
uci_set network "${interface}" metric "$metric"
uci_set network "${interface}" sim "${count}"
uci_set network "${interface}" dhcpv6 "0"
uci_set network "${interface}" pdptype "ip"
uci_set network "${interface}" method "nat"
uci_set network "${interface}" auth "none"
uci_set network "${interface}" auto_apn "1"
# if needed, use custom ifname for rmnet/other devices
[ -n "${custom_ifname}" ] && \
uci_set network "${interface}" device "${custom_ifname}"
uci_commit network
update_firewall_zone "wan" "$interface"
create_multiwan_iface "$interface" "$metric"
add_simcard_config "$id" "${count}" "${count}" "$builtin"
add_sim_switch_config "$id" "${count}"
add_quota_limit_config "$interface"
done
add_sms_storage_config "$id"
}
generate_dynamic_lte() {
[ -f /lib/functions/modem.sh ] || return
. /lib/functions/modem.sh
local interface num id simcount builtin
#creating simcard sections from board.json file
if json_is_a modems array; then
json_get_keys modems modems
json_select modems
num=1
for modem in $modems; do
json_select "$modem"
json_get_vars id simcount builtin
json_select ..
add_modem_section "$id" "$num" "$simcount" "$builtin"
num=$(( num + 1 ))
done
json_select ..
else
## because of RUTX8 have no default modem
# after this script runs out simcard config
# must not be empty due to external modems could appear to config
echo " " >> /etc/config/simcard
fi
#creating simcard sections from conneted via USB
for a in `ls /sys/bus/usb/devices`; do
local vendor product
[ -f "/sys/bus/usb/devices/$a/idVendor" ] && [ -f "/sys/bus/usb/devices/$a/idProduct" ] || continue
vendor=$(cat "/sys/bus/usb/devices/$a/idVendor")
product=$(cat "/sys/bus/usb/devices/$a/idProduct")
[ -f "/lib/network/wwan/${vendor}:${product}" ] && {
add_simcard_config "$a" "1" "0" ""
add_sms_storage_config "$a"
}
done
}
generate_switch_vlans_ports() {
local switch="$1"
local port ports role roles num attr val
#
# autogenerate vlans
#
if json_is_a roles array; then
json_get_keys roles roles
json_select roles
for role in $roles; do
json_select "$role"
json_get_vars ports
json_select ..
uci -q batch <<-EOF
add network switch_vlan
set network.@switch_vlan[-1].device='$switch'
set network.@switch_vlan[-1].vlan='$role'
set network.@switch_vlan[-1].vid='$role'
set network.@switch_vlan[-1].ports='$ports'
EOF
done
json_select ..
fi
#
# write port specific settings
#
if json_is_a ports array; then
json_get_keys ports ports
json_select ports
for port in $ports; do
json_select "$port"
json_get_vars num
if json_is_a attr object; then
json_get_keys attr attr
json_select attr
uci -q batch <<-EOF
add network switch_port
set network.@switch_port[-1].device='$switch'
set network.@switch_port[-1].port=$num
EOF
for attr in $attr; do
json_get_var val "$attr"
uci -q set network.@switch_port[-1].$attr="$val"
done
json_select ..
fi
json_select ..
done
json_select ..
fi
}
generate_switch() {
local key="$1"
local vlans
json_select switch
json_select "$key"
json_get_vars enable reset blinkrate cpu_port \
ar8xxx_mib_type ar8xxx_mib_poll_interval
[ "$disable_vlan" = 1 ] && enable=0
uci -q batch <<-EOF
add network switch
set network.@switch[-1].name='$key'
set network.@switch[-1].reset='$reset'
set network.@switch[-1].enable_vlan='$enable'
set network.@switch[-1].blinkrate='$blinkrate'
set network.@switch[-1].ar8xxx_mib_type='$ar8xxx_mib_type'
set network.@switch[-1].ar8xxx_mib_poll_interval='$ar8xxx_mib_poll_interval'
EOF
generate_switch_vlans_ports "$1"
json_select ..
json_select ..
}
generate_static_system() {
param=$(/sbin/mnf_info "--name")
hostname=${param:0:6}
uci -q batch <<-EOF
delete system.@system[0]
set system.system='system'
set system.@system[-1].hostname='$hostname'
set system.@system[-1].timezone='UTC'
set system.@system[-1].ttylogin='0'
set system.@system[-1].log_buffer_size='128'
set system.@system[-1].log_size='200'
set system.@system[-1].urandom_seed='0'
delete system.ntp
set system.ntp='timeserver'
set system.ntp.zoneName='UTC'
set system.ntp.enabled='0'
set system.ntp.enable_server='0'
add_list system.ntp.server='0.pool.ntp.org'
add_list system.ntp.server='1.pool.ntp.org'
add_list system.ntp.server='2.pool.ntp.org'
add_list system.ntp.server='3.pool.ntp.org'
delete system.debug
set system.debug='debug'
set system.debug.sms_utils_debug_level='4'
EOF
if json_is_a system object; then
json_select system
local hostname
if json_get_var hostname hostname; then
uci -q set "system.@system[-1].hostname=$hostname"
fi
if json_is_a ntpserver array; then
local keys key
json_get_keys keys ntpserver
json_select ntpserver
uci -q delete "system.ntp.server"
for key in $keys; do
local server
if json_get_var server "$key"; then
uci -q add_list "system.ntp.server=$server"
fi
done
json_select ..
fi
json_select ..
fi
}
generate_rssimon() {
local key="$1"
local cfg="rssid_$key"
local refresh threshold
json_select rssimon
json_select "$key"
json_get_vars refresh threshold
json_select ..
json_select ..
uci -q batch <<-EOF
delete system.$cfg
set system.$cfg='rssid'
set system.$cfg.dev='$key'
set system.$cfg.refresh='$refresh'
set system.$cfg.threshold='$threshold'
EOF
}
generate_led() {
local key="$1"
local cfg="led_$key"
json_select led
json_select "$key"
json_get_vars name sysfs type trigger default
uci -q batch <<-EOF
delete system.$cfg
set system.$cfg='led'
set system.$cfg.name='$name'
set system.$cfg.sysfs='$sysfs'
set system.$cfg.trigger='$trigger'
set system.$cfg.default='$default'
EOF
case "$type" in
gpio)
local gpio inverted
json_get_vars gpio inverted
uci -q batch <<-EOF
set system.$cfg.trigger='gpio'
set system.$cfg.gpio='$gpio'
set system.$cfg.inverted='$inverted'
EOF
;;
netdev)
local device mode
json_get_vars device mode
uci -q batch <<-EOF
set system.$cfg.trigger='netdev'
set system.$cfg.mode='$mode'
set system.$cfg.dev='$device'
EOF
;;
usb)
local device
json_get_vars device
uci -q batch <<-EOF
set system.$cfg.trigger='usbdev'
set system.$cfg.interval='50'
set system.$cfg.dev='$device'
EOF
;;
usbport)
local ports port
json_get_values ports ports
uci set system.$cfg.trigger='usbport'
for port in $ports; do
uci add_list system.$cfg.port=$port
done
;;
rssi)
local iface minq maxq offset factor
json_get_vars iface minq maxq offset factor
uci -q batch <<-EOF
set system.$cfg.trigger='rssi'
set system.$cfg.iface='rssid_$iface'
set system.$cfg.minq='$minq'
set system.$cfg.maxq='$maxq'
set system.$cfg.offset='$offset'
set system.$cfg.factor='$factor'
EOF
;;
switch)
local port_mask speed_mask mode
json_get_vars port_mask speed_mask mode
uci -q batch <<-EOF
set system.$cfg.port_mask='$port_mask'
set system.$cfg.speed_mask='$speed_mask'
set system.$cfg.mode='$mode'
EOF
;;
portstate)
local port_state
json_get_vars port_state
uci -q batch <<-EOF
set system.$cfg.port_state='$port_state'
EOF
;;
timer|oneshot)
local delayon delayoff
json_get_vars delayon delayoff
uci -q batch <<-EOF
set system.$cfg.trigger='$type'
set system.$cfg.delayon='$delayon'
set system.$cfg.delayoff='$delayoff'
EOF
;;
esac
json_select ..
json_select ..
}
generate_gpioswitch() {
local cfg="$1"
json_select gpioswitch
json_select "$cfg"
local name pin default
json_get_vars name pin default
uci -q batch <<-EOF
delete system.$cfg
set system.$cfg='gpio_switch'
set system.$cfg.name='$name'
set system.$cfg.gpio_pin='$pin'
set system.$cfg.value='$default'
EOF
json_select ..
json_select ..
}
generate_hwinfo() {
local parameter="$1"
local temp
json_select hwinfo
json_get_var temp "$parameter"
json_select ..
uci -q batch <<-EOF
set hwinfo.hwinfo='hwinfo'
set hwinfo.hwinfo.$parameter='$temp'
EOF
}
set_poe_ports() {
json_select "$1"
json_get_vars name class budget
uci -q batch <<-EOF
set poe.port$1='port$1'
set poe.port$1.name='$name'
set poe.port$1.poe_enable='1'
set poe.port$1.class='$class'
set poe.port$1.budget='$budget'
EOF
json_select ..
}
set_poe_chips(){
local keys key
uci -q set poe.chip$1=chip$1
json_get_keys keys "$1"
json_select "$1"
for key in $keys; do
json_get_var var "$key"
uci -q set poe.chip$1.$key="$var"
done
json_select ..
}
generate_poe_config(){
if json_is_a poe object; then
json_select poe
json_get_vars chip_count budget poe_ports
uci -q batch <<-EOF
set poe.poe='poe'
set poe.poe.chip_count='$chip_count'
set poe.poe.budget='$budget'
set poe.poe.poe_ports='$poe_ports'
EOF
if json_is_a ports array; then
#json_for_each_item "set_poe_ports" ports
json_select ports
idx=1
while json_is_a ${idx} object
do
"set_poe_ports" $idx
idx=$(( idx + 1 ))
done
json_select ..
fi
if json_is_a poe_chips array; then
json_select poe_chips
idx=1
while json_is_a ${idx} object
do
"set_poe_chips" $idx
idx=$(( idx + 1 ))
done
json_select ..
fi
json_select ..
fi
}
generate_bluetooth() {
uci -q batch <<-EOF
set blesem.general='section'
set blesem.general.enabled='0'
set blesem.settings='app'
set blesem.settings.refresh_time='30000'
EOF
}
add_firewall_zone() {
local device
json_select network
json_select "$1"
json_get_vars device
json_select ..
json_select ..
fw3 -q network "$1" || fw3 -q device "$device" && return
uci -q batch <<-EOF
add firewall zone
set firewall.@zone[-1].name='$1'
set firewall.@zone[-1].network='$1'
set firewall.@zone[-1].input='REJECT'
set firewall.@zone[-1].output='ACCEPT'
set firewall.@zone[-1].forward='REJECT'
add firewall forwarding
set firewall.@forwarding[-1].src='$1'
set firewall.@forwarding[-1].dest='wan'
add firewall rule
set firewall.@rule[-1].name='Allow-DNS-$1'
set firewall.@rule[-1].src='$1'
set firewall.@rule[-1].dest_port='53'
set firewall.@rule[-1].proto='tcp udp'
set firewall.@rule[-1].target='ACCEPT'
add firewall rule
set firewall.@rule[-1].name='Allow-DHCP-$1'
set firewall.@rule[-1].src='$1'
set firewall.@rule[-1].dest_port='67'
set firewall.@rule[-1].proto='udp'
set firewall.@rule[-1].family='ipv4'
set firewall.@rule[-1].target='ACCEPT'
EOF
}
add_dhcp() {
json_select network
json_select "$1"
json_get_vars _dhcp
json_select ..
json_select ..
[ "$_dhcp" = "true" ] || return
uci -q batch <<-EOF
set dhcp.$1='dhcp'
set dhcp.$1.interface='$1'
set dhcp.$1.start='100'
set dhcp.$1.limit='150'
set dhcp.$1.leasetime='1h'
EOF
}
json_init
json_load "$(cat ${CFG})"
umask 077
if [ ! -s /etc/config/network ]; then
touch /etc/config/network
generate_static_network
apply_network_options
json_get_keys keys network
for key in $keys; do
generate_network $key
add_dhcp "$key"
done
json_get_keys keys switch
for key in $keys; do generate_switch $key; done
generate_dynamic_lte
fi
if [ ! -s /etc/config/system ]; then
touch /etc/config/system
generate_static_system
json_get_keys keys rssimon
for key in $keys; do generate_rssimon $key; done
json_get_keys keys gpioswitch
for key in $keys; do generate_gpioswitch $key; done
json_get_keys keys led
for key in $keys; do generate_led $key; done
fi
if [ ! -s /etc/config/hwinfo ]; then
touch /etc/config/hwinfo
json_get_keys keys hwinfo
for key in $keys; do generate_hwinfo $key; done
fi
if [ ! -s /etc/config/poe ]; then
touch /etc/config/poe
generate_poe_config
fi
if [ ! -s /etc/config/blesem ]; then
bluetooth=""
json_select hwinfo
json_get_vars bluetooth
[ "$bluetooth" -eq 1 ] && {
touch /etc/config/blesem
touch /etc/config/ble_devices
generate_bluetooth
}
fi
uci commit

View file

@ -1,515 +0,0 @@
#!/bin/sh
#
# Copyright (c) 2015 The Linux Foundation. All rights reserved.
# Copyright (c) 2011-2015 OpenWrt.org
#
. /lib/functions/uci-defaults.sh
. /lib/functions/teltonika-defaults.sh
. /lib/functions/system.sh
[ -f /lib/functions/target-defaults.sh ] && \
. /lib/functions/target-defaults.sh
setup_json() {
local model="$1"
case "$model" in
RUTX08*)
ucidef_set_interfaces_lan_wan "eth0" "eth1"
ucidef_add_switch "switch0" \
"0u@eth0" "2:lan:1" "3:lan:2" "4:lan:3" "0u@eth1" "5:wan"
ucidef_set_usb_jack "/usb1/1-1/"
ucidef_set_hwinfo usb ethernet ios
ucidef_set_network_options "vlans" 128 "readonly_vlans" 2
;;
RUTX09*)
ucidef_set_interfaces_lan_wan "eth0" "eth1"
ucidef_add_switch "switch0" \
"0u@eth0" "2:lan:1" "3:lan:2" "4:lan:3" "0u@eth1" "5:wan"
ucidef_add_static_modem_info "$model" "3-1" "2" "primary" "gps_out"
ucidef_set_usb_jack "/usb1/1-1/"
ucidef_set_hwinfo dual_sim usb gps mobile ethernet ios
ucidef_set_network_options "vlans" 128 "readonly_vlans" 2
;;
RUTX10*)
ucidef_set_interfaces_lan_wan "eth0" "eth1"
ucidef_add_switch "switch0" \
"0u@eth0" "2:lan:1" "3:lan:2" "4:lan:3" "0u@eth1" "5:wan"
ucidef_set_usb_jack "/usb1/1-1/"
ucidef_add_wlan_bssid_limit "wlan0" 16
ucidef_add_wlan_bssid_limit "wlan1" 16
ucidef_set_hwinfo bluetooth usb wifi dual_band_ssid ethernet ios
ucidef_set_network_options "vlans" 128 "readonly_vlans" 2
;;
RUTX11*)
ucidef_set_interfaces_lan_wan "eth0" "eth1"
ucidef_add_switch "switch0" \
"0u@eth0" "2:lan:1" "3:lan:2" "4:lan:3" "0u@eth1" "5:wan"
ucidef_add_wlan_bssid_limit "wlan0" 16
ucidef_add_wlan_bssid_limit "wlan1" 16
ucidef_add_static_modem_info "$model" "3-1" "2" "primary" "gps_out"
ucidef_set_usb_jack "/usb1/1-1/"
ucidef_set_hwinfo dual_sim usb gps mobile wifi dual_band_ssid bluetooth ethernet ios
ucidef_set_network_options "vlans" 128 "readonly_vlans" 2
;;
RUTXR1*)
ucidef_set_interfaces_lan_wan "eth0" "eth1"
ucidef_add_switch "switch0" \
"0u@eth0" "1:lan" "2:lan" "3:lan" "4:lan" "0u@eth1" "5:wan"
ucidef_add_wlan_bssid_limit "wlan0" 16
ucidef_add_wlan_bssid_limit "wlan1" 16
ucidef_add_static_modem_info "$model" "3-1" "2" "primary"
ucidef_set_hwinfo dual_sim usb mobile wifi dual_band_ssid ethernet sfp_port sfp_switch console rs232
ucidef_set_usb_jack "/usb1/1-1/1-1.2/"
ucidef_add_serial_capabilities "rs232" \
"300 600 1200 2400 4800 9600 19200 38400 57600 115200" \
"7 8" \
"rts/cts xon/xoff none" \
"1 2" \
"even odd mark space none" \
"/usb1/1-1/1-1.3/"
ucidef_set_release_version "2.3.1"
ucidef_set_network_options "vlans" 128 "readonly_vlans" 2
;;
RUTX12*)
ucidef_set_interfaces_lan_wan "eth0" "eth1"
ucidef_add_switch "switch0" \
"0u@eth0" "1:lan" "2:lan" "3:lan" "4:lan" "0u@eth1" "5:wan"
ucidef_add_wlan_bssid_limit "wlan0" 16
ucidef_add_wlan_bssid_limit "wlan1" 16
# builtin and primary should be first modem
ucidef_add_static_modem_info "$model" "3-1" "1" "primary" "gps_out"
ucidef_add_static_modem_info "$model" "1-1.2" "1"
ucidef_set_usb_jack "/usb1/1-1/1-1.3/"
ucidef_set_hwinfo usb gps mobile wifi dual_band_ssid bluetooth ethernet ios dual_modem
ucidef_set_release_version "2.3.1"
ucidef_set_network_options "vlans" 128 "readonly_vlans" 2
;;
RUTX14*)
ucidef_set_interfaces_lan_wan "eth0" "eth1"
ucidef_add_switch "switch0" \
"0u@eth0" "1:lan" "2:lan" "3:lan" "4:lan" "0u@eth1" "5:wan"
ucidef_add_wlan_bssid_limit "wlan0" 16
ucidef_add_wlan_bssid_limit "wlan1" 16
ucidef_add_static_modem_info "$model" "1-1" "2" "primary" "gps_out"
ucidef_set_usb_jack "/usb3/3-1/"
ucidef_set_hwinfo usb gps dual_sim mobile wifi dual_band_ssid bluetooth ethernet ios at_sim
ucidef_set_release_version "2.6.1"
ucidef_set_network_options "vlans" 128 "readonly_vlans" 2
;;
RUTX18*)
ucidef_set_interfaces_lan_wan "eth0" "eth1"
ucidef_add_switch "switch0" \
"0u@eth0" "1:lan" "2:lan" "3:lan" "4:lan" "0u@eth1" "5:wan"
ucidef_add_wlan_bssid_limit "wlan0" 16
ucidef_add_wlan_bssid_limit "wlan1" 16
ucidef_add_static_modem_info "$model" "2-1" "2" "primary" "gps_out"
ucidef_set_usb_jack "/usb1/1-1/"
ucidef_set_hwinfo usb gps dual_sim mobile wifi dual_band_ssid bluetooth ethernet ios
ucidef_set_network_options "vlans" 128 "readonly_vlans" 2
;;
RUTX50*)
ucidef_set_interfaces_lan_wan "eth0" "eth1"
ucidef_add_switch "switch0" \
"0u@eth0" "1:lan" "2:lan" "3:lan" "4:lan" "0u@eth1" "5:wan"
ucidef_add_wlan_bssid_limit "wlan0" 16
ucidef_add_wlan_bssid_limit "wlan1" 16
ucidef_add_static_modem_info "$model" "2-1" "2" "primary" "gps_out"
ucidef_set_usb_jack "/usb3/3-1/"
ucidef_set_hwinfo dual_sim usb gps mobile wifi dual_band_ssid ethernet ios at_sim
ucidef_set_release_version "7.2.8"
ucidef_set_network_options "vlans" 128 "readonly_vlans" 2
;;
TRB2*)
ucidef_set_led_switch "lan" "LAN" "eth_led" "switch0" "0x04"
ucidef_set_interface_lan "eth0"
ucidef_add_static_modem_info "$model" "1-1.4" "2" "primary" "gps_out"
ucidef_add_serial_capabilities "rs232" \
"300 600 1200 2400 4800 9600 19200 38400 57600 115200" \
"7 8" \
"rts/cts xon/xoff none" \
"1 2" \
"even odd mark space none" \
"/usb1/1-1/1-1.3/"
ucidef_add_serial_capabilities "rs485" \
"300 600 1200 2400 4800 9600 19200 38400 57600 115200 \
230400 460800 921600 1000000 3000000" \
"7 8" \
"none" \
"1 2" \
"even odd mark space none" \
"/usb1/1-1/1-1.2/"
ucidef_set_hwinfo dual_sim mobile gps ethernet ios rs232 rs485
ucidef_set_network_options "vlans" 16 "readonly_vlans" 1
;;
RUT361* |\
RUT200* |\
RUT241* |\
RUT260*)
ucidef_set_led_switch "lan" "LAN" "eth1_led" "switch0" "0x2"
ucidef_set_led_switch "wan" "WAN" "eth2_led" "switch0" "0x1"
ucidef_add_switch "switch0" "1:lan" "0:wan:2" "6@eth0"
ucidef_add_wlan_bssid_limit "wlan0" 4
ucidef_set_interface_default_macaddr "lan" "$(mtd_get_mac_binary config 0x0)"
ucidef_set_interface_default_macaddr "wan" "$(macaddr_add "$(mtd_get_mac_binary config 0x0)" 1)"
ucidef_add_static_modem_info "$model" "1-1" "1" "primary"
[ "${model:6:1}" = "1" ] && ucidef_set_hwinfo mobile wifi \
ethernet || ucidef_set_hwinfo mobile wifi ethernet ios
[ "${model:4:2}" = "60" ] && ucidef_set_release_version "7.4.2"
ucidef_set_network_options "vlans" 16 "readonly_vlans" 2
;;
RUT2*)
ucidef_set_led_switch "lan" "LAN" "lan_led" "switch0" "0x04"
ucidef_set_led_netdev "wan" "WAN" "wan_led" "eth1"
ucidef_set_interfaces_lan_wan "eth0" "eth1"
ucidef_add_wlan_bssid_limit "wlan0" 8
ucidef_add_static_modem_info "$model" "1-1" "1" "primary"
[ "${model:6:1}" = "1" ] && ucidef_set_hwinfo mobile wifi \
ethernet || ucidef_set_hwinfo mobile wifi ethernet ios
ucidef_set_network_options "vlans" 16 "readonly_vlans" 1
;;
RUT300*)
ucidef_set_led_switch "lan1" "LAN1" "eth1_led" "switch0" "0x02"
ucidef_set_led_switch "lan2" "LAN2" "eth2_led" "switch0" "0x10"
ucidef_set_led_switch "lan3" "LAN3" "eth3_led" "switch0" "0x08"
ucidef_set_led_switch "lan4" "LAN4" "eth4_led" "switch0" "0x04"
ucidef_set_led_netdev "wan" "WAN" "wan_led" "eth1"
ucidef_set_interface_wan "eth1"
ucidef_set_usb_jack "/usb1/1-1/"
ucidef_add_switch "switch0" \
"0@eth0" "1:lan:1" "2:lan:4" "3:lan:3" "4:lan:2"
ucidef_set_hwinfo usb ethernet ios
ucidef_set_network_options "vlans" 16 "readonly_vlans" 1
;;
RUT301*)
ucidef_set_led_switch "lan1" "LAN1" "eth1_led" "switch0" "0x01"
ucidef_set_led_switch "lan2" "LAN2" "eth2_led" "switch0" "0x02"
ucidef_set_led_switch "lan3" "LAN3" "eth3_led" "switch0" "0x04"
ucidef_set_led_switch "lan4" "LAN4" "eth4_led" "switch0" "0x08"
ucidef_set_led_switch "wan" "WAN" "wan_led" "switch0" "0x10"
ucidef_add_switch "switch0" "0:lan:1" "1:lan:2" "2:lan:3" \
"3:lan:4" "4:wan" "6@eth0"
ucidef_set_usb_jack "/usb2/2-1/"
ucidef_set_interface_default_macaddr "wan" "$(macaddr_add "$(mtd_get_mac_binary config 0x0)" 1)"
ucidef_set_hwinfo usb ethernet ios
ucidef_set_network_options "vlans" 16 "readonly_vlans" 2
;;
RUT360*)
ucidef_set_led_switch "lan" "LAN" "eth1_led" "switch0" "0x10"
ucidef_set_led_netdev "wan" "WAN" "eth2_led" "eth1"
ucidef_set_interfaces_lan_wan "eth0" "eth1"
ucidef_add_wlan_bssid_limit "wlan0" 8
ucidef_add_wlan_bssid_limit "wlan1" 8
ucidef_add_static_modem_info "$model" "1-1" "1" "primary"
ucidef_set_hwinfo mobile wifi dual_band_ssid ethernet ios
ucidef_set_network_options "vlans" 16 "readonly_vlans" 1
;;
RUT950*)
ucidef_set_led_switch "lan1" "LAN1" "eth1_led" "switch0" "0x10"
ucidef_set_led_switch "lan2" "LAN2" "eth2_led" "switch0" "0x08"
ucidef_set_led_switch "lan3" "LAN3" "eth3_led" "switch0" "0x04"
ucidef_set_led_netdev "wan" "WAN" "wan_led" "eth1"
ucidef_set_interface_wan "eth1"
ucidef_add_wlan_bssid_limit "wlan0" 8
ucidef_add_switch "switch0" "0@eth0" "2:lan:3" "3:lan:2" "4:lan:1"
ucidef_add_static_modem_info "$model" "1-1" "2" "primary"
[ "${model:7:2}" = "06" ] && ucidef_set_hwinfo dual_sim mobile \
wifi ethernet || ucidef_set_hwinfo dual_sim mobile wifi ethernet ios
ucidef_set_network_options "vlans" 15 "readonly_vlans" 1
;;
RUT955*)
ucidef_set_led_switch "lan1" "LAN1" "eth1_led" "switch0" "0x10"
ucidef_set_led_switch "lan2" "LAN2" "eth2_led" "switch0" "0x08"
ucidef_set_led_switch "lan3" "LAN3" "eth3_led" "switch0" "0x04"
ucidef_set_led_netdev "wan" "WAN" "wan_led" "eth1"
ucidef_set_interface_wan "eth1"
ucidef_add_wlan_bssid_limit "wlan0" 8
ucidef_add_switch "switch0" "0@eth0" "2:lan:3" "3:lan:2" "4:lan:1"
ucidef_set_usb_jack "/usb1/1-1/1-1.1/"
ucidef_add_static_modem_info "$model" "1-1.4" "2" "primary" "gps_out"
[ "${model:7:2}" = "06" ] && ucidef_set_hwinfo dual_sim usb gps sd_card \
mobile wifi ethernet rs232 rs485 || ucidef_set_hwinfo dual_sim usb gps sd_card \
mobile wifi ethernet ios rs232 rs485
ucidef_add_serial_capabilities "rs232" \
"300 600 1200 2400 4800 9600 19200 38400 57600 115200" \
"5 6 7 8" \
"rts/cts xon/xoff none" \
"1 2" \
"even odd mark space none" \
"/usb1/1-1/1-1.3/"
ucidef_add_serial_capabilities "rs485" \
"300 600 1200 2400 4800 9600 19200 38400 57600 115200 \
230400 460800 921600 1000000 3000000" \
"8" \
"none" \
"1 2" \
"even odd none" \
"/tty/ttyATH1"
ucidef_set_network_options "vlans" 15 "readonly_vlans" 1
;;
RUT901* |\
RUT951*)
ucidef_set_led_switch "lan1" "LAN1" "eth1_led" "switch0" "0x01"
ucidef_set_led_switch "lan2" "LAN2" "eth2_led" "switch0" "0x02"
ucidef_set_led_switch "lan3" "LAN3" "eth3_led" "switch0" "0x04"
ucidef_set_led_switch "wan" "WAN" "wan_led" "switch0" "0x10"
ucidef_add_switch "switch0" "0:lan:1" "1:lan:2" "2:lan:3" "4:wan" "6@eth0"
ucidef_set_interface_default_macaddr "lan" "$(mtd_get_mac_binary config 0x0)"
ucidef_set_interface_default_macaddr "wan" "$(macaddr_add "$(mtd_get_mac_binary config 0x0)" 1)"
ucidef_add_wlan_bssid_limit "wlan0" 4
ucidef_add_static_modem_info "$model" "1-1" "2" "primary"
[ "${model:7:1}" = "6" ] && ucidef_set_hwinfo dual_sim mobile \
wifi ethernet || ucidef_set_hwinfo dual_sim mobile wifi ethernet ios
[ "${model:4:2}" = "01" ] && ucidef_set_release_version "7.3.1"
ucidef_set_network_options "vlans" 16 "readonly_vlans" 2
;;
RUT906* |\
RUT956*)
ucidef_set_led_switch "lan1" "LAN1" "eth1_led" "switch0" "0x01"
ucidef_set_led_switch "lan2" "LAN2" "eth2_led" "switch0" "0x02"
ucidef_set_led_switch "lan3" "LAN3" "eth3_led" "switch0" "0x04"
ucidef_set_led_switch "wan" "WAN" "wan_led" "switch0" "0x10"
ucidef_add_switch "switch0" "0:lan:1" "1:lan:2" "2:lan:3" "4:wan" "6@eth0"
ucidef_set_interface_default_macaddr "lan" "$(mtd_get_mac_binary config 0x0)"
ucidef_set_usb_jack "/usb1/1-1/1-1.1/"
ucidef_set_interface_default_macaddr "wan" "$(macaddr_add "$(mtd_get_mac_binary config 0x0)" 1)"
ucidef_add_wlan_bssid_limit "wlan0" 4
ucidef_add_static_modem_info "$model" "1-1.4" "2" "primary" "gps_out"
[ "${model:7:1}" = "6" ] && ucidef_set_hwinfo dual_sim usb gps \
mobile wifi ethernet rs232 rs485 || ucidef_set_hwinfo dual_sim usb gps \
mobile wifi ethernet ios rs232 rs485
[ "${model:4:2}" = "06" ] && ucidef_set_release_version "7.4.2"
ucidef_add_serial_capabilities "rs232" \
"300 600 1200 2400 4800 9600 19200 38400 57600 115200" \
"5 6 7 8" \
"rts/cts xon/xoff none" \
"1 2" \
"even odd mark space none" \
"/usb1/1-1/1-1.3/"
ucidef_add_serial_capabilities "rs485" \
"300 600 1200 2400 4800 9600 19200 38400 57600 115200 230400" \
"5 6 7 8" \
"xon/xoff none" \
"1 2" \
"even odd mark space none" \
"/tty/ttyS1"
ucidef_set_network_options "vlans" 16 "readonly_vlans" 2
;;
TRB140*)
ucidef_set_interface_lan "eth0 rndis0"
[ "${model:7:1}" = "2" ] && ucidef_set_hwinfo mobile ethernet || \
ucidef_set_hwinfo mobile ethernet ios
ucidef_set_network_options "vlans" 4094 "readonly_vlans" 1
[ "${model:6:1}" = "4" ] && \
ucidef_set_release_version "7.4.2"
;;
TRB143*)
ucidef_set_interface_lan "eth0 rndis0"
[ "${model:7:1}" = "2" ] && ucidef_set_hwinfo mobile ethernet || \
ucidef_set_hwinfo mobile ethernet ios
ucidef_add_serial_capabilities "mbus" \
"300 600 1200 2400 4800 9600 19200 38400" \
"5 6 7 8" \
"xon/xoff none" \
"1 2" \
"even odd mark space none" \
"/tty/ttyHS0"
if [ "${model:6:1}" = "4" ]; then
ucidef_set_release_version "7.4.3"
else
ucidef_set_release_version "7.1.7"
fi
ucidef_set_network_options "vlans" 4094 "readonly_vlans" 1
;;
TRB141*)
ucidef_set_interface_lan "rndis0"
ucidef_set_hwinfo mobile ios
ucidef_set_network_options "vlans" 4094 "readonly_vlans" 1
[ "${model:6:1}" = "4" ] && \
ucidef_set_release_version "7.4.3"
;;
TRB142*)
ucidef_set_interface_lan "rndis0"
[ "${model:7:1}" = "2" ] && ucidef_set_hwinfo mobile rs232 || \
ucidef_set_hwinfo mobile ios rs232
ucidef_add_serial_capabilities "rs232" \
"300 600 1200 2400 4800 9600 19200 38400 57600 115200" \
"5 6 7 8" \
"rts/cts xon/xoff none" \
"1 2" \
"even odd mark space none" \
"/tty/ttyHS0"
if [ "${model:6:1}" = "3" ]; then
ucidef_set_release_version "7.1"
elif [ "${model:6:1}" = "4" ]; then
ucidef_set_release_version "7.4.3"
fi
ucidef_set_network_options "vlans" 4094 "readonly_vlans" 1
;;
TRB145*)
ucidef_set_interface_lan "rndis0"
[ "${model:7:1}" = "2" ] && ucidef_set_hwinfo mobile rs485 || \
ucidef_set_hwinfo mobile ios rs485
ucidef_add_serial_capabilities "rs485" \
"300 600 1200 2400 4800 9600 19200 38400 57600 115200 \
230400 460800 921600 1000000 3000000" \
"5 6 7 8" \
"xon/xoff none" \
"1 2" \
"even odd mark space none" \
"/tty/ttyHS0"
if [ "${model:6:1}" = "2" ]; then
ucidef_set_release_version "7.1"
elif [ "${model:6:1}" = "4" ]; then
ucidef_set_release_version "7.4.3"
fi
ucidef_set_network_options "vlans" 4094 "readonly_vlans" 1
;;
TCR100*)
ucidef_set_led_switch "lan" "LAN" "eth1_led" "switch0" "0x10"
ucidef_set_led_netdev "wan" "WAN" "eth2_led" "eth1"
ucidef_set_interfaces_lan_wan "eth0" "eth1"
ucidef_add_wlan_bssid_limit "wlan0" 8
ucidef_add_wlan_bssid_limit "wlan1" 8
ucidef_set_interface guest proto static type bridge \
guest 1 _wireless true _dhcp true
ucidef_add_static_modem_info "$model" "1-1" "1" "primary"
ucidef_set_hwinfo mobile wifi dual_band_ssid wps ethernet
ucidef_set_release_version "7.2.4"
ucidef_set_network_options "vlans" 16 "readonly_vlans" 1
;;
OTD140*)
ucidef_set_led_switch "lan1" "LAN1" "eth1_led" "switch0" "0x10"
ucidef_set_led_switch "lan2" "LAN2" "eth2_led" "switch0" "0x2"
ucidef_add_switch "switch0" "4:lan:1" "1:lan:2" "6@eth0"
ucidef_set_interface_default_macaddr "lan" "$(mtd_get_mac_binary config 0x0)"
ucidef_set_interface "lan" "default_ip" "%%LAN_IP%%"
ucidef_add_static_modem_info "$model" "1-1" "2" "primary"
ucidef_set_hwinfo ethernet mobile dual_sim poe
ucidef_set_network_options "vlans" 16 "readonly_vlans" 1
ucidef_set_poe 2 15400 1 "lan2" "3" 15400
ucidef_set_poe_chip "0X77" "0:lan2"
ucidef_set_poe_chip "0X2F" "1:lan2"
;;
OTD160*)
ucidef_set_led_switch "lan1" "LAN1" "eth1_led" "switch0" "0x04"
ucidef_set_led_switch "lan2" "LAN2" "eth2_led" "switch0" "0x02"
ucidef_set_interface_lan "eth0"
ucidef_add_wlan_bssid_limit "wlan0" 8
ucidef_add_wlan_bssid_limit "wlan1" 8
ucidef_add_static_modem_info "$model" "1-1" "2" "primary"
ucidef_set_hwinfo dual_sim mobile wifi dual_band_ssid ethernet
ucidef_set_network_options "vlans" 16 "readonly_vlans" 1
;;
TAP100*)
ucidef_set_led_switch "lan" "LAN" "eth0_led" "switch0" "0x10"
ucidef_add_wlan_bssid_limit "wlan0" 4
ucidef_set_interface_lan "eth0"
ucidef_set_interface "lan" "ipv6" "1"
ucidef_set_interface_default_macaddr "lan" "$(mtd_get_mac_binary config 0x0)"
ucidef_set_hwinfo wifi ethernet sw_rst_on_init
ucidef_set_network_options "ula" false "disable_vlan" true "ip6assign" false "vlans" 16 "readonly_vlans" 1 "no_metric" true
ucidef_set_interface "dhcp" "device" "@lan" "proto" "dhcp"
;;
TRB500*)
ucidef_set_interface_lan "eth0 ecm0"
ucidef_set_interface_default_macaddr "lan" "$(mtd_get_mac_binary mnf_info 0x0)" \
"$(macaddr_add "$(mtd_get_mac_binary mnf_info 0x0)" 1)"
ucidef_set_hwinfo mobile ethernet ios
ucidef_set_network_options "vlans" 4094 "readonly_vlans" 1
;;
RUTM50*)
ucidef_set_interfaces_lan_wan "lan1 lan2 lan3 lan4" "wan"
ucidef_set_usb_jack "/usb1/1-2/"
ucidef_add_wlan_bssid_limit "wlan0" 4
ucidef_add_wlan_bssid_limit "wlan1" 4
ucidef_add_static_modem_info "$model" "2-1" "2" "primary" "gps_out"
ucidef_set_hwinfo usb ethernet ios gps mobile wifi dual_band_ssid dual_sim at_sim dsa hw_nat
ucidef_set_network_options "vlans" 4094 "readonly_vlans" 1
;;
RUTM51*)
ucidef_set_interfaces_lan_wan "lan1 lan2 lan3 lan4" "wan"
ucidef_set_usb_jack "/usb1/1-2/"
ucidef_add_wlan_bssid_limit "wlan0" 4
ucidef_add_wlan_bssid_limit "wlan1" 4
ucidef_add_static_modem_info "$model" "2-1" "2" "primary"
ucidef_set_hwinfo usb ethernet ios mobile wifi dual_band_ssid dual_sim at_sim dsa hw_nat
ucidef_set_network_options "vlans" 4094 "readonly_vlans" 1
ucidef_set_release_version "7.4.4"
;;
RUTM08*)
ucidef_set_interfaces_lan_wan "lan1 lan2 lan3" "wan"
ucidef_set_usb_jack "/usb1/1-1/"
ucidef_set_hwinfo usb ethernet ios dsa hw_nat
ucidef_set_network_options "vlans" 4094 "readonly_vlans" 1
;;
RUTM09*)
ucidef_set_interfaces_lan_wan "lan1 lan2 lan3" "wan"
ucidef_add_static_modem_info "$model" "1-2" "2" "primary" "gps_out"
ucidef_set_usb_jack "/usb1/1-1/"
ucidef_set_hwinfo usb ethernet ios gps mobile dual_sim dsa hw_nat
ucidef_set_network_options "vlans" 4094 "readonly_vlans" 1
;;
RUTM10*)
ucidef_set_interfaces_lan_wan "lan1 lan2 lan3" "wan"
ucidef_set_usb_jack "/usb1/1-1/"
ucidef_add_wlan_bssid_limit "wlan0" 4
ucidef_add_wlan_bssid_limit "wlan1" 4
ucidef_set_hwinfo usb ethernet ios wifi dual_band_ssid dsa hw_nat
ucidef_set_network_options "vlans" 4094 "readonly_vlans" 1
;;
RUTM11*)
ucidef_set_interfaces_lan_wan "lan1 lan2 lan3" "wan"
ucidef_set_usb_jack "/usb1/1-1/"
ucidef_add_wlan_bssid_limit "wlan0" 4
ucidef_add_wlan_bssid_limit "wlan1" 4
ucidef_add_static_modem_info "$model" "1-2" "2" "primary" "gps_out"
ucidef_set_hwinfo usb ethernet ios gps mobile wifi dual_band_ssid dual_sim dsa hw_nat
ucidef_set_network_options "vlans" 4094 "readonly_vlans" 1
;;
RUTM12*)
ucidef_set_interfaces_lan_wan "lan1 lan2 lan3 lan4" "wan"
ucidef_set_usb_jack "/usb1/1-2/1-2.3/"
ucidef_add_wlan_bssid_limit "wlan0" 4
ucidef_add_wlan_bssid_limit "wlan1" 4
ucidef_add_static_modem_info "$model" "1-1" "1" "primary" "gps_out"
ucidef_add_static_modem_info "$model" "1-2.2" "1"
ucidef_set_hwinfo usb ethernet ios gps mobile wifi dual_band_ssid dual_modem dsa hw_nat
ucidef_set_network_options "vlans" 4094 "readonly_vlans" 1
;;
x86)
ucidef_set_interface_wan "eth0"
ucidef_set_interface_lan "eth1"
ucidef_add_wlan_bssid_limit "wlan0" 4
ucidef_add_wlan_bssid_limit "wlan1" 4
ucidef_set_hwinfo usb wifi dual_band_ssid ethernet
ucidef_set_network_options "vlans" 4094 "readonly_vlans" 1
;;
*)
echo "Unsupported hardware. Network interfaces not intialized"
;;
esac
ucidef_set_interface "lan" "default_ip" "%%LAN_IP%%"
type ucidef_target_defaults &> /dev/null && \
ucidef_target_defaults "$model"
}
#~ Get model name for RUTX products
if ! model="$(mnf_info --name)" 2>/dev/null; then
model="$(mnf_info --prod-code)" 2>/dev/null
fi
platform="$(cat /proc/device-tree/platform)" 2>/dev/null
board_config_update
setup_json "$model"
ucidef_set_board_platform "$platform"
board_config_flush
exit 0

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@ -1,54 +0,0 @@
. /usr/share/libubox/jshn.sh
# when device contains 2 internal modems, this function will return '2' if
# selected modem(inc_id) is builtin and primary.
# And if it's only builtin, then '1'
is_builtin_modem() {
local inc_id="$1"
local modem modems id builtin primary
json_init
json_load_file "/etc/board.json"
json_get_keys modems modems
json_select modems
for modem in $modems; do
json_select "$modem"
json_get_vars id builtin primary
[ "$id" = "$inc_id" ] && {
[ -n "$builtin" ] && {
[ -n "$primary" ] && {
echo 2
return
}
echo 1
return
}
echo 0
return
}
json_select ..
done
echo 0
}
is_dual_modem() {
json_init
json_load_file "/etc/board.json"
json_get_keys hwinfo hwinfo
json_select hwinfo
json_get_vars dual_modem
[ "$dual_modem" = "1" ] && echo 1 || echo 0
json_select ..
}

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@ -1,143 +0,0 @@
#!/bin/ash
. /lib/functions.sh
. /usr/share/libubox/jshn.sh
ucidef_add_static_modem_info() {
#Parameters: model usb_id sim_count other_params
local model usb_id count
local modem_counter=0
local sim_count=1
model="$1"
usb_id="$2"
[ -n "$3" ] && sim_count="$3"
json_get_keys count modems
[ -n "$count" ] && modem_counter="$(echo "$count" | wc -w)"
json_select_array "modems"
json_add_object
json_add_string id "$usb_id"
json_add_string num "$((modem_counter + 1))"
json_add_boolean builtin 1
json_add_int simcount "$sim_count"
for i in "$@"; do
case "$i" in
primary)
json_add_boolean primary 1
;;
gps_out)
json_add_boolean gps_out 1
;;
esac
done
json_close_object
json_select ..
}
ucidef_add_serial_capabilities() {
json_select_array serial
json_add_object
[ -n "$1" ] && {
json_select_array devices
for d in $1; do
json_add_string "" $d
done
json_select ..
}
json_select_array bauds
for b in $2; do
json_add_string "" $b
done
json_select ..
json_select_array data_bits
for n in $3; do
json_add_string "" $n
done
json_select ..
json_select_array flow_control
for n in $4; do
json_add_string "" $n
done
json_select ..
json_select_array stop_bits
for n in $5; do
json_add_string "" $n
done
json_select ..
json_select_array parity_types
for n in $6; do
json_add_string "" $n
done
json_select ..
json_add_string "path" $7
json_close_object
json_select ..
}
ucidef_add_wlan_bssid_limit() {
json_select_object wlan
json_add_object "$1"
json_add_int bssid_limit "$2"
json_close_object
json_select ..
}
ucidef_set_hwinfo() {
local args=" $* "
local options='
dual_sim
at_sim
wifi
dual_band_ssid
wps
mobile
gps
usb
poe
bluetooth
ethernet
sfp_port
ios
sfp_switch
rs232
rs485
console
dual_modem
sd_card
sw_rst_on_init
dsa
hw_nat
'
json_select_object hwinfo
for opt in $options; do
if [[ "$args" =~ " $(echo "$opt" | tr -d '\011\012\015\040') " ]]; then
json_add_boolean "$opt" 1
else
json_add_boolean "$opt" 0
fi
done
json_select ..
}
ucidef_set_release_version() {
json_add_string release_version "$1"
}
ucidef_set_usb_jack() {
json_add_string "usb_jack" "$1"
}

View file

@ -1,68 +0,0 @@
#!/bin/sh
. /usr/share/libubox/jshn.sh
is_ios_enabled() {
local ios
json_load_file "/etc/board.json" &&
json_select hwinfo &&
json_get_var ios ios && [ "$ios" = "1" ]
}
# set_tty_options <device_path> <baudrate> <databits> <parity> <stopbits> <flowcontrol> <duplex> <echo>
set_tty_options() {
local PARITY_TMP=""
local SBITS_TMP=""
local FCTRL_TMP=""
case "$4" in
"odd") PARITY_TMP="parenb parodd -cmspar" ;;
"even") PARITY_TMP="parenb -parodd -cmspar" ;;
"mark") PARITY_TMP="parenb parodd cmspar";;
"space") PARITY_TMP="parenb -parodd cmspar";;
*) PARITY_TMP="-parenb -parodd -cmspar" ;;
esac
case "$5" in
1) SBITS_TMP="-cstopb" ;;
2) SBITS_TMP="cstopb" ;;
*) SBITS_TMP="-cstopb" ;;
esac
case "$6" in
"none") FCTRL_TMP="-crtscts -ixon -ixoff" ;;
"rts/cts") FCTRL_TMP="crtscts -ixon -ixoff" ;;
"xon/xoff") FCTRL_TMP="-crtscts ixon ixoff" ;;
*) FCTRL_TMP="-crtscts -ixon -ixoff" ;;
esac
case "$7" in
0 | 1)
echo "$7" >/sys/class/gpio/rs485_rx_en/value
;;
esac
if [ "$8" == "1" ]; then
FCTRL_TMP="$FCTRL_TMP echo"
else
FCTRL_TMP="$FCTRL_TMP -echo"
fi
local stty_retries=0
while ! stty -F "$1" "$2" cs"$3" $PARITY_TMP "$SBITS_TMP" $FCTRL_TMP; do
if [ $stty_retries -lt 5 ]; then
stty_retries=$((stty_retries + 1))
echo "stty was unable to set all the parameters, retrying in 10 seconds"
sleep 10
else
echo "stty failed, continuing anyway"
break
fi
done
}
to_lower() {
tr '[A-Z]' '[a-z]' <<-EOF
$@
EOF
}

View file

@ -1,23 +0,0 @@
set_state() {
local label="$1"
local disable
[ -e "/sys/class/gpio/${label}_power/value" ] || return
config_get disable ${label} disable
[ "${disable}" -eq 1 ] && \
/sbin/mctl -s -m "${label}" -c || \
/sbin/mctl -p -m "${label}" -c
}
do_power_modem() {
[ -f /etc/board.json ] || return
[ -z "$(uci -q get system.modem.disable)" ] && /sbin/mctl -p -a -c || {
config_load system
config_foreach set_state mctl
}
}
boot_hook_add preinit_main do_power_modem

View file

@ -1,24 +0,0 @@
#include "qcom-ipq4018-rutx-shiftreg.dtsi"
/ {
model = "RUTX08";
soc {
gpio-export {
compatible = "gpio-export";
#size-cells = <0>;
gpio_out_1 {
gpio-export,name = "gpio23";
gpio-export,output = <0>;
gpios = <&shift_io 0 GPIO_ACTIVE_HIGH>;
};
gpio_in_1 {
gpio-export,name = "gpio24";
gpio-export,input = <0>;
gpios = <&tlmm 0 GPIO_ACTIVE_HIGH>;
};
};
};
};

View file

@ -1,26 +0,0 @@
#include "qcom-ipq4018-rutx-STM32.dtsi"
/ {
model = "RUTX08 STM32";
soc {
gpio-export {
compatible = "gpio-export";
#size-cells = <0>;
gpio_out_1 {
gpio-export,name = "gpio23";
gpio-export,output = <0>;
gpio-export,direction_may_change;
gpios = <&stm32_io 23 GPIO_ACTIVE_HIGH>;
};
gpio_in_1 {
gpio-export,name = "gpio24";
gpio-export,input = <0>;
gpio-export,direction_may_change;
gpios = <&stm32_io 24 GPIO_ACTIVE_LOW>;
};
};
};
};

View file

@ -1,106 +0,0 @@
#include "qcom-ipq4018-rutx-shiftreg.dtsi"
/ {
model = "RUTX09";
soc {
gpio-export {
compatible = "gpio-export";
#size-cells = <0>;
gpio_modem_reset {
gpio-export,name = "modem_reset";
gpio-export,output = <0>;
gpios = <&shift_io 1 GPIO_ACTIVE_HIGH>;
};
gpio_modem_power {
gpio-export,name = "modem_power";
gpio-export,output = <0>;
gpios = <&shift_io 2 GPIO_ACTIVE_HIGH>;
};
gpio_sim_select {
gpio-export,name = "sim_sel";
gpio-export,output = <1>;
gpios = <&shift_io 3 GPIO_ACTIVE_LOW>;
};
gpio_out_1 {
gpio-export,name = "gpio23";
gpio-export,output = <0>;
gpios = <&shift_io 0 GPIO_ACTIVE_HIGH>;
};
gpio_in_1 {
gpio-export,name = "gpio24";
gpio-export,input = <0>;
gpios = <&tlmm 0 GPIO_ACTIVE_HIGH>;
};
};
leds {
compatible = "gpio-leds";
led_wan_sim1 {
label = "wan_sim_1";
gpios = <&shift_io 21 GPIO_ACTIVE_HIGH>;
};
led_wan_sim2 {
label = "wan_sim_2";
gpios = <&shift_io 22 GPIO_ACTIVE_HIGH>;
};
led_wan_eth {
label = "wan_eth_3";
gpios = <&shift_io 20 GPIO_ACTIVE_HIGH>;
};
led_gen_2 {
label = "mob_gen_2";
gpios = <&shift_io 7 GPIO_ACTIVE_HIGH>;
};
led_gen_3 {
label = "mob_gen_3";
gpios = <&shift_io 8 GPIO_ACTIVE_HIGH>;
};
led_gen_4 {
label = "mob_gen_4";
gpios = <&shift_io 9 GPIO_ACTIVE_HIGH>;
};
led_ssid_1 {
label = "mob_ssid_1";
gpios = <&shift_io 10 GPIO_ACTIVE_HIGH>;
linux,default-trigger = "timer";
};
led_ssid_2 {
label = "mob_ssid_2";
gpios = <&shift_io 11 GPIO_ACTIVE_HIGH>;
linux,default-trigger = "timer";
};
led_ssid_3 {
label = "mob_ssid_3";
gpios = <&shift_io 12 GPIO_ACTIVE_HIGH>;
linux,default-trigger = "timer";
};
led_ssid_4 {
label = "mob_ssid_4";
gpios = <&shift_io 14 GPIO_ACTIVE_HIGH>;
linux,default-trigger = "timer";
};
led_ssid_5 {
label = "mob_ssid_5";
gpios = <&shift_io 15 GPIO_ACTIVE_HIGH>;
linux,default-trigger = "timer";
};
};
};
};

View file

@ -1,108 +0,0 @@
#include "qcom-ipq4018-rutx-STM32.dtsi"
/ {
model = "RUTX09 STM32";
soc {
gpio-export {
compatible = "gpio-export";
#size-cells = <0>;
gpio_modem_reset {
gpio-export,name = "modem_reset";
gpio-export,output = <0>;
gpios = <&stm32_io 21 GPIO_ACTIVE_HIGH>;
};
gpio_modem_power {
gpio-export,name = "modem_power";
gpio-export,output = <0>;
gpios = <&stm32_io 20 GPIO_ACTIVE_HIGH>;
};
gpio_sim_select {
gpio-export,name = "sim_sel";
gpio-export,output = <1>;
gpios = <&stm32_io 22 GPIO_ACTIVE_LOW>;
};
gpio_out_1 {
gpio-export,name = "gpio23";
gpio-export,output = <0>;
gpio-export,direction_may_change;
gpios = <&stm32_io 23 GPIO_ACTIVE_HIGH>;
};
gpio_in_1 {
gpio-export,name = "gpio24";
gpio-export,input = <0>;
gpio-export,direction_may_change;
gpios = <&stm32_io 24 GPIO_ACTIVE_LOW>;
};
};
leds {
compatible = "gpio-leds";
led_wan_sim1 {
label = "wan_sim_1";
gpios = <&stm32_io 0 GPIO_ACTIVE_HIGH>;
};
led_wan_sim2 {
label = "wan_sim_2";
gpios = <&stm32_io 1 GPIO_ACTIVE_HIGH>;
};
led_wan_eth {
label = "wan_eth_3";
gpios = <&stm32_io 2 GPIO_ACTIVE_HIGH>;
};
led_gen_2 {
label = "mob_gen_2";
gpios = <&stm32_io 4 GPIO_ACTIVE_HIGH>;
};
led_gen_3 {
label = "mob_gen_3";
gpios = <&stm32_io 5 GPIO_ACTIVE_HIGH>;
};
led_gen_4 {
label = "mob_gen_4";
gpios = <&stm32_io 6 GPIO_ACTIVE_HIGH>;
};
led_ssid_1 {
label = "mob_ssid_1";
gpios = <&stm32_io 7 GPIO_ACTIVE_HIGH>;
linux,default-trigger = "timer";
};
led_ssid_2 {
label = "mob_ssid_2";
gpios = <&stm32_io 8 GPIO_ACTIVE_HIGH>;
linux,default-trigger = "timer";
};
led_ssid_3 {
label = "mob_ssid_3";
gpios = <&stm32_io 9 GPIO_ACTIVE_HIGH>;
linux,default-trigger = "timer";
};
led_ssid_4 {
label = "mob_ssid_4";
gpios = <&stm32_io 10 GPIO_ACTIVE_HIGH>;
linux,default-trigger = "timer";
};
led_ssid_5 {
label = "mob_ssid_5";
gpios = <&stm32_io 11 GPIO_ACTIVE_HIGH>;
linux,default-trigger = "timer";
};
};
};
};

View file

@ -1,38 +0,0 @@
#include "qcom-ipq4018-rutx-shiftreg.dtsi"
/ {
model = "RUTX10";
soc {
gpio-export {
compatible = "gpio-export";
#size-cells = <0>;
gpio_out_1 {
gpio-export,name = "gpio23";
gpio-export,output = <0>;
gpios = <&shift_io 0 GPIO_ACTIVE_HIGH>;
};
gpio_in_1 {
gpio-export,name = "gpio24";
gpio-export,input = <0>;
gpios = <&tlmm 0 GPIO_ACTIVE_HIGH>;
};
};
leds {
compatible = "gpio-leds";
led_wifi_24 {
label = "wifi_gen_2";
gpios = <&shift_io 5 GPIO_ACTIVE_HIGH>;
};
led_wifi_50 {
label = "wifi_gen_5";
gpios = <&shift_io 6 GPIO_ACTIVE_HIGH>;
};
};
};
};

View file

@ -1,40 +0,0 @@
#include "qcom-ipq4018-rutx-STM32.dtsi"
/ {
model = "RUTX10 STM32";
soc {
gpio-export {
compatible = "gpio-export";
#size-cells = <0>;
gpio_out_1 {
gpio-export,name = "gpio23";
gpio-export,output = <0>;
gpio-export,direction_may_change;
gpios = <&stm32_io 23 GPIO_ACTIVE_HIGH>;
};
gpio_in_1 {
gpio-export,name = "gpio24";
gpio-export,input = <0>;
gpio-export,direction_may_change;
gpios = <&stm32_io 24 GPIO_ACTIVE_LOW>;
};
};
leds {
compatible = "gpio-leds";
led_wifi_24 {
label = "wifi_gen_2";
gpios = <&stm32_io 19 GPIO_ACTIVE_HIGH>;
};
led_wifi_50 {
label = "wifi_gen_5";
gpios = <&stm32_io 18 GPIO_ACTIVE_HIGH>;
};
};
};
};

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@ -1,121 +0,0 @@
#include "qcom-ipq4018-rutx-shiftreg.dtsi"
/ {
model = "RUTX11";
soc {
gpio-export {
compatible = "gpio-export";
#size-cells = <0>;
gpio_modem_reset {
gpio-export,name = "modem_reset";
gpio-export,output = <0>;
gpios = <&shift_io 1 GPIO_ACTIVE_HIGH>;
};
gpio_modem_power {
gpio-export,name = "modem_power";
gpio-export,output = <0>;
gpios = <&shift_io 2 GPIO_ACTIVE_HIGH>;
};
gpio_sim_select {
gpio-export,name = "sim_sel";
gpio-export,output = <1>;
gpios = <&shift_io 3 GPIO_ACTIVE_LOW>;
};
gpio_out_1 {
gpio-export,name = "gpio23";
gpio-export,output = <0>;
gpios = <&shift_io 0 GPIO_ACTIVE_HIGH>;
};
gpio_in_1 {
gpio-export,name = "gpio24";
gpio-export,input = <0>;
gpios = <&tlmm 0 GPIO_ACTIVE_HIGH>;
};
};
leds {
compatible = "gpio-leds";
led_wan_sim1 {
label = "wan_sim_1";
gpios = <&shift_io 21 GPIO_ACTIVE_HIGH>;
};
led_wan_sim2 {
label = "wan_sim_2";
gpios = <&shift_io 22 GPIO_ACTIVE_HIGH>;
};
led_wan_eth {
label = "wan_eth_3";
gpios = <&shift_io 13 GPIO_ACTIVE_HIGH>;
};
led_wan_wifi {
label = "wan_wifi_4";
gpios = <&shift_io 20 GPIO_ACTIVE_HIGH>;
};
led_gen_2 {
label = "mob_gen_2";
gpios = <&shift_io 7 GPIO_ACTIVE_HIGH>;
};
led_gen_3 {
label = "mob_gen_3";
gpios = <&shift_io 8 GPIO_ACTIVE_HIGH>;
};
led_gen_4 {
label = "mob_gen_4";
gpios = <&shift_io 9 GPIO_ACTIVE_HIGH>;
};
led_ssid_1 {
label = "mob_ssid_1";
gpios = <&shift_io 10 GPIO_ACTIVE_HIGH>;
linux,default-trigger = "timer";
};
led_ssid_2 {
label = "mob_ssid_2";
gpios = <&shift_io 11 GPIO_ACTIVE_HIGH>;
linux,default-trigger = "timer";
};
led_ssid_3 {
label = "mob_ssid_3";
gpios = <&shift_io 12 GPIO_ACTIVE_HIGH>;
linux,default-trigger = "timer";
};
led_ssid_4 {
label = "mob_ssid_4";
gpios = <&shift_io 14 GPIO_ACTIVE_HIGH>;
linux,default-trigger = "timer";
};
led_ssid_5 {
label = "mob_ssid_5";
gpios = <&shift_io 15 GPIO_ACTIVE_HIGH>;
linux,default-trigger = "timer";
};
led_wifi_24 {
label = "wifi_gen_2";
gpios = <&shift_io 5 GPIO_ACTIVE_HIGH>;
};
led_wifi_50 {
label = "wifi_gen_5";
gpios = <&shift_io 6 GPIO_ACTIVE_HIGH>;
};
};
};
};

View file

@ -1,123 +0,0 @@
#include "qcom-ipq4018-rutx-STM32.dtsi"
/ {
model = "RUTX11 STM32";
soc {
gpio-export {
compatible = "gpio-export";
#size-cells = <0>;
gpio_modem_reset {
gpio-export,name = "modem_reset";
gpio-export,output = <0>;
gpios = <&stm32_io 21 GPIO_ACTIVE_HIGH>;
};
gpio_modem_power {
gpio-export,name = "modem_power";
gpio-export,output = <0>;
gpios = <&stm32_io 20 GPIO_ACTIVE_HIGH>;
};
gpio_sim_select {
gpio-export,name = "sim_sel";
gpio-export,output = <1>;
gpios = <&stm32_io 22 GPIO_ACTIVE_LOW>;
};
gpio_out_1 {
gpio-export,name = "gpio23";
gpio-export,output = <0>;
gpio-export,direction_may_change;
gpios = <&stm32_io 23 GPIO_ACTIVE_HIGH>;
};
gpio_in_1 {
gpio-export,name = "gpio24";
gpio-export,input = <0>;
gpio-export,direction_may_change;
gpios = <&stm32_io 24 GPIO_ACTIVE_LOW>;
};
};
leds {
compatible = "gpio-leds";
led_wan_sim1 {
label = "wan_sim_1";
gpios = <&stm32_io 0 GPIO_ACTIVE_HIGH>;
};
led_wan_sim2 {
label = "wan_sim_2";
gpios = <&stm32_io 1 GPIO_ACTIVE_HIGH>;
};
led_wan_eth {
label = "wan_eth_3";
gpios = <&stm32_io 3 GPIO_ACTIVE_HIGH>;
};
led_wan_wifi {
label = "wan_wifi_4";
gpios = <&stm32_io 2 GPIO_ACTIVE_HIGH>;
};
led_gen_2 {
label = "mob_gen_2";
gpios = <&stm32_io 4 GPIO_ACTIVE_HIGH>;
};
led_gen_3 {
label = "mob_gen_3";
gpios = <&stm32_io 5 GPIO_ACTIVE_HIGH>;
};
led_gen_4 {
label = "mob_gen_4";
gpios = <&stm32_io 6 GPIO_ACTIVE_HIGH>;
};
led_ssid_1 {
label = "mob_ssid_1";
gpios = <&stm32_io 7 GPIO_ACTIVE_HIGH>;
linux,default-trigger = "timer";
};
led_ssid_2 {
label = "mob_ssid_2";
gpios = <&stm32_io 8 GPIO_ACTIVE_HIGH>;
linux,default-trigger = "timer";
};
led_ssid_3 {
label = "mob_ssid_3";
gpios = <&stm32_io 9 GPIO_ACTIVE_HIGH>;
linux,default-trigger = "timer";
};
led_ssid_4 {
label = "mob_ssid_4";
gpios = <&stm32_io 10 GPIO_ACTIVE_HIGH>;
linux,default-trigger = "timer";
};
led_ssid_5 {
label = "mob_ssid_5";
gpios = <&stm32_io 11 GPIO_ACTIVE_HIGH>;
linux,default-trigger = "timer";
};
led_wifi_24 {
label = "wifi_gen_2";
gpios = <&stm32_io 19 GPIO_ACTIVE_HIGH>;
};
led_wifi_50 {
label = "wifi_gen_5";
gpios = <&stm32_io 18 GPIO_ACTIVE_HIGH>;
};
};
};
};

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#include "qcom-ipq4018-rutx-STM32.dtsi"
/ {
model = "RUTX12 STM32";
soc {
gpio-export {
compatible = "gpio-export";
#size-cells = <0>;
gpio_modem_reset {
gpio-export,name = "modem_reset";
gpio-export,output = <0>;
gpios = <&stm32_io 21 GPIO_ACTIVE_HIGH>;
};
gpio_modem_power {
gpio-export,name = "modem_power";
gpio-export,output = <0>;
gpios = <&stm32_io 20 GPIO_ACTIVE_HIGH>;
};
gpio_modem2_reset {
gpio-export,name = "modem2_reset";
gpio-export,output = <0>;
gpios = <&stm32_io 13 GPIO_ACTIVE_HIGH>;
};
gpio_modem2_power {
gpio-export,name = "modem2_power";
gpio-export,output = <0>;
gpios = <&stm32_io 14 GPIO_ACTIVE_HIGH>;
};
gpio_out_1 {
gpio-export,name = "gpio23";
gpio-export,output = <0>;
gpio-export,direction_may_change;
gpios = <&stm32_io 23 GPIO_ACTIVE_HIGH>;
};
gpio_in_1 {
gpio-export,name = "gpio24";
gpio-export,input = <0>;
gpio-export,direction_may_change;
gpios = <&stm32_io 24 GPIO_ACTIVE_LOW>;
};
};
leds {
compatible = "gpio-leds";
led_wan_sim1 {
label = "wan_sim_1";
gpios = <&stm32_io 0 GPIO_ACTIVE_HIGH>;
};
led_wan_sim2 {
label = "wan_sim_2";
gpios = <&stm32_io 1 GPIO_ACTIVE_HIGH>;
};
led_wan_eth {
label = "wan_eth_3";
gpios = <&stm32_io 3 GPIO_ACTIVE_HIGH>;
};
led_wan_wifi {
label = "wan_wifi_4";
gpios = <&stm32_io 2 GPIO_ACTIVE_HIGH>;
};
led_gen_2 {
label = "mob_gen_2";
gpios = <&stm32_io 4 GPIO_ACTIVE_HIGH>;
};
led_gen_3 {
label = "mob_gen_3";
gpios = <&stm32_io 5 GPIO_ACTIVE_HIGH>;
};
led_gen_4 {
label = "mob_gen_4";
gpios = <&stm32_io 6 GPIO_ACTIVE_HIGH>;
};
led2_gen_2 {
label = "mob2_gen_2";
gpios = <&stm32_io 32 GPIO_ACTIVE_HIGH>;
};
led2_gen_3 {
label = "mob2_gen_3";
gpios = <&stm32_io 33 GPIO_ACTIVE_HIGH>;
};
led2_gen_4 {
label = "mob2_gen_4";
gpios = <&stm32_io 34 GPIO_ACTIVE_HIGH>;
};
led_ssid_1 {
label = "mob_ssid_1";
gpios = <&stm32_io 7 GPIO_ACTIVE_HIGH>;
linux,default-trigger = "timer";
};
led_ssid_3 {
label = "mob_ssid_3";
gpios = <&stm32_io 9 GPIO_ACTIVE_HIGH>;
linux,default-trigger = "timer";
};
led_ssid_5 {
label = "mob_ssid_5";
gpios = <&stm32_io 11 GPIO_ACTIVE_HIGH>;
linux,default-trigger = "timer";
};
led2_ssid_1 {
label = "mob2_ssid_1";
gpios = <&stm32_io 31 GPIO_ACTIVE_HIGH>;
linux,default-trigger = "timer";
};
led2_ssid_3 {
label = "mob2_ssid_3";
gpios = <&stm32_io 30 GPIO_ACTIVE_HIGH>;
linux,default-trigger = "timer";
};
led2_ssid_5 {
label = "mob2_ssid_5";
gpios = <&stm32_io 29 GPIO_ACTIVE_HIGH>;
linux,default-trigger = "timer";
};
led_wifi_24 {
label = "wifi_gen_2";
gpios = <&stm32_io 19 GPIO_ACTIVE_HIGH>;
};
led_wifi_50 {
label = "wifi_gen_5";
gpios = <&stm32_io 18 GPIO_ACTIVE_HIGH>;
};
};
};
};

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@ -1,98 +0,0 @@
#include "qcom-ipq4018-rutx-shiftreg.dtsi"
/ {
model = "RUTX14";
soc {
gpio-export {
compatible = "gpio-export";
#size-cells = <0>;
gpio_modem_reset {
gpio-export,name = "modem_reset";
gpio-export,output = <0>;
gpios = <&shift_io 8 GPIO_ACTIVE_HIGH>;
};
gpio_modem_power {
gpio-export,name = "modem_power";
gpio-export,output = <0>;
gpios = <&shift_io 9 GPIO_ACTIVE_HIGH>;
};
gpio_out_1 {
gpio-export,name = "gpio23";
gpio-export,output = <0>;
gpios = <&shift_io 10 GPIO_ACTIVE_HIGH>;
};
gpio_in_1 {
gpio-export,name = "gpio24";
gpio-export,input = <0>;
gpios = <&tlmm 0 GPIO_ACTIVE_HIGH>;
};
};
leds {
compatible = "gpio-leds";
led_wan_sim1 {
label = "wan_sim_1";
gpios = <&shift_io 14 GPIO_ACTIVE_HIGH>;
};
led_wan_sim2 {
label = "wan_sim_2";
gpios = <&shift_io 15 GPIO_ACTIVE_HIGH>;
};
led_wan_eth {
label = "wan_eth_3";
gpios = <&shift_io 7 GPIO_ACTIVE_HIGH>;
};
led_wan_wifi {
label = "wan_wifi_4";
gpios = <&shift_io 6 GPIO_ACTIVE_HIGH>;
};
led_gen_3 {
label = "mob_gen_3";
gpios = <&shift_io 5 GPIO_ACTIVE_HIGH>;
};
led_gen_4 {
label = "mob_gen_4";
gpios = <&shift_io 4 GPIO_ACTIVE_HIGH>;
};
led_ssid_1 {
label = "mob_ssid_1";
gpios = <&shift_io 0 GPIO_ACTIVE_HIGH>;
linux,default-trigger = "timer";
};
led_ssid_3 {
label = "mob_ssid_3";
gpios = <&shift_io 1 GPIO_ACTIVE_HIGH>;
linux,default-trigger = "timer";
};
led_ssid_5 {
label = "mob_ssid_5";
gpios = <&shift_io 2 GPIO_ACTIVE_HIGH>;
linux,default-trigger = "timer";
};
led_wifi_24 {
label = "wifi_gen_2";
gpios = <&shift_io 12 GPIO_ACTIVE_HIGH>;
};
led_wifi_50 {
label = "wifi_gen_5";
gpios = <&shift_io 13 GPIO_ACTIVE_HIGH>;
};
};
};
};

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@ -1,100 +0,0 @@
#include "qcom-ipq4018-rutx-STM32.dtsi"
/ {
model = "RUTX14 STM32";
soc {
gpio-export {
compatible = "gpio-export";
#size-cells = <0>;
gpio_modem_reset {
gpio-export,name = "modem_reset";
gpio-export,output = <0>;
gpios = <&stm32_io 21 GPIO_ACTIVE_HIGH>;
};
gpio_modem_power {
gpio-export,name = "modem_power";
gpio-export,output = <0>;
gpios = <&stm32_io 20 GPIO_ACTIVE_HIGH>;
};
gpio_out_1 {
gpio-export,name = "gpio23";
gpio-export,output = <0>;
gpio-export,direction_may_change;
gpios = <&stm32_io 23 GPIO_ACTIVE_HIGH>;
};
gpio_in_1 {
gpio-export,name = "gpio24";
gpio-export,input = <0>;
gpio-export,direction_may_change;
gpios = <&stm32_io 24 GPIO_ACTIVE_LOW>;
};
};
leds {
compatible = "gpio-leds";
led_wan_sim1 {
label = "wan_sim_1";
gpios = <&stm32_io 0 GPIO_ACTIVE_HIGH>;
};
led_wan_sim2 {
label = "wan_sim_2";
gpios = <&stm32_io 1 GPIO_ACTIVE_HIGH>;
};
led_wan_eth {
label = "wan_eth_3";
gpios = <&stm32_io 3 GPIO_ACTIVE_HIGH>;
};
led_wan_wifi {
label = "wan_wifi_4";
gpios = <&stm32_io 2 GPIO_ACTIVE_HIGH>;
};
led_gen_3 {
label = "mob_gen_3";
gpios = <&stm32_io 5 GPIO_ACTIVE_HIGH>;
};
led_gen_4 {
label = "mob_gen_4";
gpios = <&stm32_io 6 GPIO_ACTIVE_HIGH>;
};
led_ssid_1 {
label = "mob_ssid_1";
gpios = <&stm32_io 7 GPIO_ACTIVE_HIGH>;
linux,default-trigger = "timer";
};
led_ssid_3 {
label = "mob_ssid_3";
gpios = <&stm32_io 9 GPIO_ACTIVE_HIGH>;
linux,default-trigger = "timer";
};
led_ssid_5 {
label = "mob_ssid_5";
gpios = <&stm32_io 11 GPIO_ACTIVE_HIGH>;
linux,default-trigger = "timer";
};
led_wifi_24 {
label = "wifi_gen_2";
gpios = <&stm32_io 19 GPIO_ACTIVE_HIGH>;
};
led_wifi_50 {
label = "wifi_gen_5";
gpios = <&stm32_io 18 GPIO_ACTIVE_HIGH>;
};
};
};
};

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@ -1,110 +0,0 @@
#include "qcom-ipq4018-rutx-shiftreg.dtsi"
/ {
model = "RUTX50";
soc {
ext_io {
shift_io: shift_io@0 {
registers-number = <2>;
};
};
gpio-export {
compatible = "gpio-export";
#size-cells = <0>;
gpio_modem_reset {
gpio-export,name = "modem_reset";
gpio-export,output = <0>;
gpios = <&shift_io 8 GPIO_ACTIVE_HIGH>;
};
gpio_modem_power {
gpio-export,name = "modem_power";
gpio-export,output = <0>;
gpios = <&shift_io 9 GPIO_ACTIVE_HIGH>;
};
gpio_out_1 {
gpio-export,name = "gpio23";
gpio-export,output = <0>;
gpios = <&shift_io 10 GPIO_ACTIVE_HIGH>;
};
gpio_in_1 {
gpio-export,name = "gpio24";
gpio-export,input = <0>;
gpios = <&tlmm 0 GPIO_ACTIVE_HIGH>;
};
};
leds {
compatible = "gpio-leds";
led_wan_sim1 {
label = "wan_sim_1";
gpios = <&shift_io 14 GPIO_ACTIVE_HIGH>;
};
led_wan_sim2 {
label = "wan_sim_2";
gpios = <&shift_io 15 GPIO_ACTIVE_HIGH>;
};
led_wan_eth {
label = "wan_eth_3";
gpios = <&shift_io 6 GPIO_ACTIVE_HIGH>;
};
led_wan_wifi {
label = "wan_wifi_4";
gpios = <&shift_io 7 GPIO_ACTIVE_HIGH>;
};
led_gen_3 {
label = "mob_gen_3";
gpios = <&shift_io 5 GPIO_ACTIVE_HIGH>;
};
led_gen_4 {
label = "mob_gen_4";
gpios = <&shift_io 4 GPIO_ACTIVE_HIGH>;
};
led_gen_5 {
label = "mob_gen_5";
gpios = <&shift_io 3 GPIO_ACTIVE_HIGH>;
};
led_ssid_1 {
label = "mob_ssid_1";
gpios = <&shift_io 0 GPIO_ACTIVE_HIGH>;
linux,default-trigger = "timer";
};
led_ssid_3 {
label = "mob_ssid_3";
gpios = <&shift_io 1 GPIO_ACTIVE_HIGH>;
linux,default-trigger = "timer";
};
led_ssid_5 {
label = "mob_ssid_5";
gpios = <&shift_io 2 GPIO_ACTIVE_HIGH>;
linux,default-trigger = "timer";
};
led_wifi_24 {
label = "wifi_gen_2";
gpios = <&shift_io 12 GPIO_ACTIVE_HIGH>;
};
led_wifi_50 {
label = "wifi_gen_5";
gpios = <&shift_io 13 GPIO_ACTIVE_HIGH>;
};
};
};
};

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@ -1,82 +0,0 @@
#include "qcom-ipq4018-rutx-STM32.dtsi"
/ {
model = "RUTXR1 STM32";
soc {
gpio-export {
compatible = "gpio-export";
#size-cells = <0>;
gpio_modem_reset {
gpio-export,name = "modem_reset";
gpio-export,output = <0>;
gpios = <&stm32_io 21 GPIO_ACTIVE_HIGH>;
};
gpio_modem_power {
gpio-export,name = "modem_power";
gpio-export,output = <0>;
gpios = <&stm32_io 20 GPIO_ACTIVE_HIGH>;
};
gpio_sim_select {
gpio-export,name = "sim_sel";
gpio-export,output = <1>;
gpios = <&stm32_io 22 GPIO_ACTIVE_LOW>;
};
};
leds {
compatible = "gpio-leds";
led_wan_sim1 {
label = "wan_sim_1";
gpios = <&stm32_io 0 GPIO_ACTIVE_HIGH>;
};
led_wan_sim2 {
label = "wan_sim_2";
gpios = <&stm32_io 1 GPIO_ACTIVE_HIGH>;
};
led_wan_eth {
label = "wan_eth_3";
gpios = <&stm32_io 3 GPIO_ACTIVE_HIGH>;
};
led_wan_mob {
label = "wan_mob_5";
gpios = <&stm32_io 16 GPIO_ACTIVE_HIGH>;
};
led_gen_3 {
label = "mob_gen_3";
gpios = <&stm32_io 5 GPIO_ACTIVE_HIGH>;
};
led_gen_4 {
label = "mob_gen_4";
gpios = <&stm32_io 6 GPIO_ACTIVE_HIGH>;
};
led_ssid_1 {
label = "mob_ssid_1";
gpios = <&stm32_io 7 GPIO_ACTIVE_HIGH>;
linux,default-trigger = "timer";
};
led_ssid_3 {
label = "mob_ssid_3";
gpios = <&stm32_io 9 GPIO_ACTIVE_HIGH>;
linux,default-trigger = "timer";
};
led_ssid_5 {
label = "mob_ssid_5";
gpios = <&stm32_io 11 GPIO_ACTIVE_HIGH>;
linux,default-trigger = "timer";
};
};
};
};

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@ -1,21 +0,0 @@
#include "qcom-ipq4018-rutx-common.dtsi"
#include "qcom-ipq4018-rutx-i2c.dtsi"
/ {
io_expander = "stm32";
soc {
i2c_0: i2c@78b7000 {
stm32_io: stm32@74 {
#gpio-cells = <2>;
compatible = "tlt,stm32v1";
reg = <0x74>;
gpio-controller;
interrupt-parent = <&tlmm>;
interrupts = <5 2>;
interrupt-controller;
#interrupt-cells = <2>;
};
};
};
};

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@ -1,27 +0,0 @@
#include "qcom-ipq4018-rutx-common.dtsi"
/ {
io_expander = "shiftreg_1";
soc {
ext_io {
compatible = "spi-gpio";
#address-cells = <1>;
#size-cells = <0>;
gpio-sck = <&tlmm 1 GPIO_ACTIVE_HIGH>; // SRCLK
gpio-mosi = <&tlmm 3 GPIO_ACTIVE_HIGH>; // SER
cs-gpios = <&tlmm 2 GPIO_ACTIVE_HIGH>; // RCLK
num-chipselects = <1>;
shift_io: shift_io@0 {
compatible = "fairchild,74hc595";
reg = <0>;
gpio-controller;
#gpio-cells = <2>;
registers-number = <3>;
spi-max-frequency = <10000000>;
};
};
};
};

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@ -1,910 +0,0 @@
DEVICE_VARS += NETGEAR_BOARD_ID NETGEAR_HW_ID
DEVICE_VARS += RAS_BOARD RAS_ROOTFS_SIZE RAS_VERSION
DEVICE_VARS += WRGG_DEVNAME WRGG_SIGNATURE
define Device/FitImage
KERNEL_SUFFIX := -fit-uImage.itb
KERNEL = kernel-bin | gzip | fit gzip $$(DTS_DIR)/$$(DEVICE_DTS).dtb
KERNEL_NAME := Image
endef
define Device/FitImageLzma
KERNEL_SUFFIX := -fit-uImage.itb
KERNEL = kernel-bin | lzma | fit lzma $$(DTS_DIR)/$$(DEVICE_DTS).dtb
KERNEL_NAME := Image
endef
define Device/FitzImage
KERNEL_SUFFIX := -fit-zImage.itb
KERNEL = kernel-bin | fit none $$(DTS_DIR)/$$(DEVICE_DTS).dtb
KERNEL_NAME := zImage
endef
define Device/UbiFit
KERNEL_IN_UBI := 1
IMAGES := nand-factory.ubi nand-sysupgrade.bin
IMAGE/nand-factory.ubi := append-ubi
IMAGE/nand-sysupgrade.bin := sysupgrade-tar | append-metadata
endef
define Device/DniImage
$(call Device/FitzImage)
NETGEAR_BOARD_ID :=
NETGEAR_HW_ID :=
IMAGES += factory.img
IMAGE/factory.img := append-kernel | pad-offset 64k 64 | append-uImage-fakehdr filesystem | append-rootfs | pad-rootfs | netgear-dni
IMAGE/sysupgrade.bin := append-kernel | pad-offset 64k 64 | append-uImage-fakehdr filesystem | \
append-rootfs | pad-rootfs | append-metadata | check-size
endef
define Build/append-rootfshdr
mkimage -A $(LINUX_KARCH) \
-O linux -T filesystem \
-C lzma -a $(KERNEL_LOADADDR) -e $(if $(KERNEL_ENTRY),$(KERNEL_ENTRY),$(KERNEL_LOADADDR)) \
-n root.squashfs -d $(IMAGE_ROOTFS) $@.new
dd if=$@.new bs=64 count=1 >> $(IMAGE_KERNEL)
endef
define Build/append-rutx-metadata
echo \
'{ \
"device_code": [".*"], \
"hwver": [".*"], \
"batch": [".*"], \
"serial": [".*"], \
"supported_devices":["teltonika,rutx"] \
}' | fwtool -I - $@
endef
define Build/fit-rutx
$(TOPDIR)/scripts/mkits-rutx.sh \
-D $(DEVICE_NAME) -o $@.its -k $@ \
$(if $(word 2,$(1)),-d $(word 2,$(1))) -C $(word 1,$(1)) \
-a $(KERNEL_LOADADDR) -e $(if $(KERNEL_ENTRY),$(KERNEL_ENTRY),$(KERNEL_LOADADDR)) \
$(if $(DEVICE_FDT_NUM),-n $(DEVICE_FDT_NUM)) \
-c $(if $(DEVICE_DTS_CONFIG),$(DEVICE_DTS_CONFIG),"config@1") \
-A $(LINUX_KARCH) -v $(LINUX_VERSION)
PATH=$(LINUX_DIR)/scripts/dtc:$(PATH) mkimage -f $@.its $@.new
@mv $@.new $@
endef
define Build/UbootFw
$(CP) ./uboot_fw/ $(STAGING_DIR_HOST)/
if [ -e $(STAGING_DIR_HOST)/uboot_fw/tz.mbn ]; then \
$(SED) 's~file\.ubi~$@~g' $(STAGING_DIR_HOST)/uboot_fw/norplusnand-flash.conf; \
$(SED) 's~file\.elf~$(BIN_DIR)/openwrt-ipq40xx-u-boot-stripped.elf~g' $(STAGING_DIR_HOST)/uboot_fw/norplusnand-flash.conf; \
python $(KDIR)/uboot-1.0/tools/pack.py -t norplusnand -B -F boardconfig_premium_tlt -o $@ $(STAGING_DIR_HOST)/uboot_fw; \
else \
$(SED) 's~file\.ubi~$@~g' $(STAGING_DIR_HOST)/uboot_fw/norplusnand-apps-flash.conf; \
$(SED) 's~file\.elf~$(BIN_DIR)/openwrt-ipq40xx-u-boot-stripped.elf~g' $(STAGING_DIR_HOST)/uboot_fw/norplusnand-apps-flash.conf; \
python $(KDIR)/uboot-1.0/tools/pack.py -t norplusnand -B -F appsboardconfig_premium_tlt -o $@ $(STAGING_DIR_HOST)/uboot_fw; \
fi
endef
define Build/UbootFw-rutx
$(CP) ./uboot_fw/ $(STAGING_DIR_HOST)/
if [ -e $(STAGING_DIR_HOST)/uboot_fw/tz.mbn ]; then \
$(SED) 's~file\.ubi~$@~g' $(STAGING_DIR_HOST)/uboot_fw/norplusnand-flash.conf; \
$(SED) 's~file\.elf~$(BIN_DIR)/openwrt-ipq40xx-u-boot-stripped.elf~g' $(STAGING_DIR_HOST)/uboot_fw/norplusnand-flash.conf; \
python $(TOPDIR)/target/linux/ipq40xx/image/uboot_fw/pack.py -t norplusnand -B -F boardconfig_premium_tlt -o $@ $(STAGING_DIR_HOST)/uboot_fw; \
else \
$(SED) 's~file\.ubi~$@~g' $(STAGING_DIR_HOST)/uboot_fw/norplusnand-apps-flash.conf; \
$(SED) 's~file\.elf~$(BIN_DIR)/openwrt-ipq40xx-u-boot-stripped.elf~g' $(STAGING_DIR_HOST)/uboot_fw/norplusnand-apps-flash.conf; \
python $(TOPDIR)/target/linux/ipq40xx/image/uboot_fw/pack.py -t norplusnand -B -F appsboardconfig_premium_tlt -o $@ $(STAGING_DIR_HOST)/uboot_fw; \
fi
endef
define Build/mkmylofw_32m
$(eval device_id=$(word 1,$(1)))
$(eval revision=$(word 2,$(1)))
let \
size="$$(stat -c%s $@)" \
pad="$(subst k,* 1024,$(BLOCKSIZE))" \
pad="(pad - (size % pad)) % pad" \
newsize='size + pad'; \
$(STAGING_DIR_HOST)/bin/mkmylofw \
-B WPE72 -i 0x11f6:$(device_id):0x11f6:$(device_id) -r $(revision) \
-s 0x2000000 -p0x180000:$$newsize:al:0x80208000:"OpenWrt":$@ \
$@.new
@mv $@.new $@
endef
define Build/qsdk-ipq-factory-nand-askey
$(TOPDIR)/scripts/mkits-qsdk-ipq-image.sh $@.its\
askey_kernel $(IMAGE_KERNEL) \
askey_fs $(IMAGE_ROOTFS) \
ubifs $@
PATH=$(LINUX_DIR)/scripts/dtc:$(PATH) mkimage -f $@.its $@.new
@mv $@.new $@
endef
define Build/SenaoFW
-$(STAGING_DIR_HOST)/bin/mksenaofw \
-n $(BOARD_NAME) -r $(VENDOR_ID) -p $(1) \
-c $(DATECODE) -w $(2) -x $(CW_VER) -t 0 \
-e $@ \
-o $@.new
@cp $@.new $@
endef
define Build/wrgg-image
mkwrggimg -i $@ \
-o $@.new \
-d "$(WRGG_DEVNAME)" \
-s "$(WRGG_SIGNATURE)" \
-v "" -m "" -B ""
mv $@.new $@
endef
define Device/8dev_habanero-dvk
$(call Device/FitImageLzma)
DEVICE_VENDOR := 8devices
DEVICE_MODEL := Habanero DVK
IMAGE_SIZE := 30976k
SOC := qcom-ipq4019
DEVICE_PACKAGES := ipq-wifi-8dev_habanero-dvk
IMAGE/sysupgrade.bin := append-kernel | pad-to 64k | append-rootfs | pad-rootfs | append-metadata | check-size
endef
TARGET_DEVICES += 8dev_habanero-dvk
define Device/8dev_jalapeno-common
$(call Device/FitImage)
$(call Device/UbiFit)
BLOCKSIZE := 128k
PAGESIZE := 2048
SOC := qcom-ipq4018
endef
define Device/8dev_jalapeno
$(call Device/8dev_jalapeno-common)
DEVICE_VENDOR := 8devices
DEVICE_MODEL := Jalapeno
endef
TARGET_DEVICES += 8dev_jalapeno
define Device/alfa-network_ap120c-ac
$(call Device/FitImage)
$(call Device/UbiFit)
DEVICE_VENDOR := ALFA Network
DEVICE_MODEL := AP120C-AC
SOC := qcom-ipq4018
DEVICE_PACKAGES := kmod-usb-acm kmod-tpm-i2c-atmel
BLOCKSIZE := 128k
PAGESIZE := 2048
IMAGE_SIZE := 65536k
IMAGES := nand-factory.bin nand-sysupgrade.bin
IMAGE/nand-factory.bin := append-ubi | qsdk-ipq-factory-nand
endef
TARGET_DEVICES += alfa-network_ap120c-ac
define Device/aruba_glenmorangie
$(call Device/FitImageLzma)
DEVICE_VENDOR := Aruba
SOC := qcom-ipq4029
DEVICE_PACKAGES := ipq-wifi-aruba_ap-303
endef
define Device/aruba_ap-303
$(call Device/aruba_glenmorangie)
DEVICE_MODEL := AP-303
endef
TARGET_DEVICES += aruba_ap-303
define Device/aruba_ap-303h
$(call Device/aruba_glenmorangie)
DEVICE_MODEL := AP-303H
endef
TARGET_DEVICES += aruba_ap-303h
define Device/aruba_ap-365
$(call Device/aruba_glenmorangie)
DEVICE_MODEL := AP-365
DEVICE_PACKAGES += kmod-hwmon-ad7418
endef
TARGET_DEVICES += aruba_ap-365
define Device/asus_map-ac2200
$(call Device/FitImageLzma)
DEVICE_VENDOR := ASUS
DEVICE_MODEL := Lyra (MAP-AC2200)
SOC := qcom-ipq4019
DEVICE_PACKAGES := ath10k-firmware-qca9888-ct kmod-ath3k
endef
TARGET_DEVICES += asus_map-ac2200
define Device/asus_rt-ac58u
$(call Device/FitImageLzma)
DEVICE_VENDOR := ASUS
DEVICE_MODEL := RT-AC58U
SOC := qcom-ipq4018
BLOCKSIZE := 128k
PAGESIZE := 2048
DTB_SIZE := 65536
IMAGE_SIZE := 20439364
FILESYSTEMS := squashfs
# Someone - in their infinite wisdom - decided to put the firmware
# version in front of the image name \03\00\00\04 => Version 3.0.0.4
# Since u-boot works with strings we either need another fixup step
# to add a version... or we are very careful not to add '\0' into that
# string and call it a day.... Yeah, we do the latter!
UIMAGE_NAME:=$(shell echo -e '\03\01\01\01RT-AC58U')
DEVICE_PACKAGES := -kmod-ath10k-ct kmod-ath10k-ct-smallbuffers \
kmod-usb-ledtrig-usbport
endef
TARGET_DEVICES += asus_rt-ac58u
define Device/avm_fritzbox-4040
$(call Device/FitImageLzma)
DEVICE_VENDOR := AVM
DEVICE_MODEL := FRITZ!Box 4040
SOC := qcom-ipq4018
BOARD_NAME := fritz4040
IMAGE_SIZE := 29056k
UBOOT_PATH := $(STAGING_DIR_IMAGE)/uboot-fritz4040.bin
UBOOT_PARTITION_SIZE := 524288
IMAGES += eva.bin
IMAGE/eva.bin := append-uboot | pad-to $$$$(UBOOT_PARTITION_SIZE) | append-kernel | append-rootfs | pad-rootfs
IMAGE/sysupgrade.bin := append-kernel | append-rootfs | pad-rootfs | append-metadata | check-size
DEVICE_PACKAGES := fritz-tffs fritz-caldata
endef
TARGET_DEVICES += avm_fritzbox-4040
define Device/avm_fritzbox-7530
$(call Device/FitImageLzma)
DEVICE_VENDOR := AVM
DEVICE_MODEL := FRITZ!Box 7530
SOC := qcom-ipq4019
DEVICE_PACKAGES := fritz-caldata fritz-tffs-nand
endef
TARGET_DEVICES += avm_fritzbox-7530
define Device/avm_fritzrepeater-1200
$(call Device/FitImageLzma)
DEVICE_VENDOR := AVM
DEVICE_MODEL := FRITZ!Repeater 1200
SOC := qcom-ipq4019
DEVICE_PACKAGES := fritz-caldata fritz-tffs-nand ipq-wifi-avm_fritzrepeater-1200
endef
TARGET_DEVICES += avm_fritzrepeater-1200
define Device/avm_fritzrepeater-3000
$(call Device/FitImageLzma)
DEVICE_VENDOR := AVM
DEVICE_MODEL := FRITZ!Repeater 3000
SOC := qcom-ipq4019
DEVICE_PACKAGES := ath10k-firmware-qca9984-ct fritz-caldata fritz-tffs-nand
endef
TARGET_DEVICES += avm_fritzrepeater-3000
define Device/buffalo_wtr-m2133hp
$(call Device/FitImage)
$(call Device/UbiFit)
DEVICE_VENDOR := Buffalo
DEVICE_MODEL := WTR-M2133HP
SOC := qcom-ipq4019
DEVICE_PACKAGES := ath10k-firmware-qca9984-ct ipq-wifi-buffalo_wtr-m2133hp
BLOCKSIZE := 128k
PAGESIZE := 2048
endef
TARGET_DEVICES += buffalo_wtr-m2133hp
define Device/cellc_rtl30vw
KERNEL_SUFFIX := -fit-uImage.itb
KERNEL_INITRAMFS = kernel-bin | gzip | fit gzip $$(DTS_DIR)/$$(DEVICE_DTS).dtb
KERNEL = kernel-bin | gzip | fit gzip $$(DTS_DIR)/$$(DEVICE_DTS).dtb | uImage lzma | pad-to 2048
KERNEL_NAME := Image
KERNEL_IN_UBI :=
IMAGES := nand-factory.bin nand-sysupgrade.bin
IMAGE/nand-factory.bin := append-rootfshdr | append-ubi | qsdk-ipq-factory-nand-askey
IMAGE/nand-sysupgrade.bin := append-rootfshdr | sysupgrade-tar | append-metadata
DEVICE_VENDOR := Cell C
DEVICE_MODEL := RTL30VW
SOC := qcom-ipq4019
DEVICE_DTS_CONFIG := config@5
KERNEL_INSTALL := 1
KERNEL_SIZE := 4096k
IMAGE_SIZE := 57344k
BLOCKSIZE := 128k
PAGESIZE := 2048
DEVICE_PACKAGES := kmod-usb-net-qmi-wwan kmod-usb-serial-option uqmi ipq-wifi-cellc_rtl30vw
endef
TARGET_DEVICES += cellc_rtl30vw
define Device/cilab_meshpoint-one
$(call Device/8dev_jalapeno-common)
DEVICE_VENDOR := Crisis Innovation Lab
DEVICE_MODEL := MeshPoint.One
DEVICE_PACKAGES := kmod-i2c-gpio kmod-iio-bmp280-i2c kmod-hwmon-ina2xx kmod-rtc-pcf2127
endef
TARGET_DEVICES += cilab_meshpoint-one
define Device/compex_wpj419
$(call Device/FitImage)
$(call Device/UbiFit)
DEVICE_VENDOR := Compex
DEVICE_MODEL := WPJ419
SOC := qcom-ipq4019
DEVICE_DTS_CONFIG := config@12
KERNEL_INSTALL := 1
BLOCKSIZE := 128k
PAGESIZE := 2048
FILESYSTEMS := squashfs
endef
TARGET_DEVICES += compex_wpj419
define Device/compex_wpj428
$(call Device/FitImage)
DEVICE_VENDOR := Compex
DEVICE_MODEL := WPJ428
SOC := qcom-ipq4028
DEVICE_DTS_CONFIG := config@4
BLOCKSIZE := 64k
IMAGE_SIZE := 31232k
KERNEL_SIZE := 4096k
IMAGES += cpximg-6a04.bin
IMAGE/sysupgrade.bin := append-kernel | append-rootfs | pad-rootfs | append-metadata
IMAGE/cpximg-6a04.bin := append-kernel | append-rootfs | pad-rootfs | mkmylofw_32m 0x8A2 3
DEVICE_PACKAGES := kmod-gpio-beeper
endef
TARGET_DEVICES += compex_wpj428
define Device/devolo_magic-2-wifi-next
$(call Device/FitImage)
DEVICE_VENDOR := devolo
DEVICE_MODEL := Magic 2 WiFi next
SOC := qcom-ipq4018
KERNEL_SIZE := 4096k
# If the bootloader sees 0xDEADC0DE and this trailer at the 64k boundary of a TFTP image
# it will bootm it, just like we want for the initramfs.
KERNEL_INITRAMFS := kernel-bin | gzip | fit gzip $$(DTS_DIR)/$$(DEVICE_DTS).dtb | pad-to 64k |\
append-string -e '\xDE\xAD\xC0\xDE{"fl_initramfs":""}\x00'
IMAGE_SIZE := 26624k
IMAGES := sysupgrade.bin
IMAGE/sysupgrade.bin := append-kernel | append-rootfs | pad-rootfs | append-metadata
DEVICE_PACKAGES := ipq-wifi-devolo_magic-2-wifi-next
endef
TARGET_DEVICES += devolo_magic-2-wifi-next
define Device/dlink_dap-2610
$(call Device/FitImageLzma)
DEVICE_VENDOR := D-Link
DEVICE_MODEL := DAP-2610
SOC := qcom-ipq4018
DEVICE_DTS_CONFIG := config@ap.dk01.1-c1
BLOCKSIZE := 64k
WRGG_DEVNAME := /dev/mtdblock/8
WRGG_SIGNATURE := wapac30_dkbs_dap2610
IMAGE_SIZE := 14080k
IMAGES += factory.bin
# Bootloader expects a special 160 byte header which is added by
# wrgg-image.
# Factory image size must be larger than 6MB, and size in wrgg header must
# match actual factory image size to be flashable from D-Link http server.
# Bootloader verifies checksum of wrgg image before booting, thus jffs2
# cannot be part of the wrgg image. This is solved in the factory image by
# having the rootfs at the end of the image (without pad-rootfs). And in
# the sysupgrade image only the kernel is included in the wrgg checksum,
# but this is not flashable from the D-link http server.
# append-rootfs must start on an erase block boundary.
IMAGE/factory.bin := append-kernel | pad-offset 6144k 160 | append-rootfs | wrgg-image | check-size
IMAGE/sysupgrade.bin := append-kernel | wrgg-image | pad-to $$$$(BLOCKSIZE) | append-rootfs | pad-rootfs | check-size | append-metadata
DEVICE_PACKAGES := ipq-wifi-dlink_dap2610
endef
TARGET_DEVICES += dlink_dap-2610
define Device/edgecore_ecw5211
$(call Device/FitImage)
$(call Device/UbiFit)
DEVICE_VENDOR := Edgecore
DEVICE_MODEL := ECW5211
SOC := qcom-ipq4018
BLOCKSIZE := 128k
PAGESIZE := 2048
DEVICE_DTS_CONFIG := config@ap.dk01.1-c2
DEVICE_PACKAGES := kmod-tpm-i2c-atmel kmod-usb-acm
endef
TARGET_DEVICES += edgecore_ecw5211
define Device/edgecore_oap100
$(call Device/FitImage)
$(call Device/UbiFit)
DEVICE_VENDOR := Edgecore
DEVICE_MODEL := OAP100
SOC := qcom-ipq4019
BLOCKSIZE := 128k
PAGESIZE := 2048
IMAGES := nand-sysupgrade.bin
DEVICE_DTS_CONFIG := config@ap.dk07.1-c1
DEVICE_PACKAGES := ipq-wifi-edgecore_oap100 kmod-usb-acm kmod-usb-net kmod-usb-net-cdc-qmi uqmi
endef
TARGET_DEVICES += edgecore_oap100
define Device/engenius_eap1300
$(call Device/FitImage)
DEVICE_VENDOR := EnGenius
DEVICE_MODEL := EAP1300
DEVICE_DTS_CONFIG := config@4
BOARD_NAME := eap1300
SOC := qcom-ipq4018
KERNEL_SIZE := 5120k
IMAGE_SIZE := 25344k
IMAGE/sysupgrade.bin := append-kernel | append-rootfs | pad-rootfs | append-metadata
endef
TARGET_DEVICES += engenius_eap1300
define Device/engenius_eap2200
$(call Device/FitImage)
$(call Device/UbiFit)
DEVICE_VENDOR := EnGenius
DEVICE_MODEL := EAP2200
SOC := qcom-ipq4019
BLOCKSIZE := 128k
PAGESIZE := 2048
DEVICE_PACKAGES := ath10k-firmware-qca9888-ct ipq-wifi-engenius_eap2200 -kmod-ath10k-ct kmod-ath10k-ct-smallbuffers
endef
TARGET_DEVICES += engenius_eap2200
define Device/engenius_emd1
$(call Device/FitImage)
DEVICE_VENDOR := EnGenius
DEVICE_MODEL := EMD1
DEVICE_DTS_CONFIG := config@4
SOC := qcom-ipq4018
IMAGE_SIZE := 30720k
IMAGES += factory.bin
IMAGE/sysupgrade.bin := append-kernel | append-rootfs | pad-rootfs | append-metadata
IMAGE/factory.bin := qsdk-ipq-factory-nor | check-size
DEVICE_PACKAGES := ipq-wifi-engenius_emd1
endef
TARGET_DEVICES += engenius_emd1
define Device/engenius_emr3500
$(call Device/FitImage)
DEVICE_VENDOR := EnGenius
DEVICE_MODEL := EMR3500
DEVICE_DTS_CONFIG := config@4
SOC := qcom-ipq4018
KERNEL_SIZE := 4096k
IMAGE_SIZE := 30720k
IMAGES += factory.bin
IMAGE/sysupgrade.bin := append-kernel | append-rootfs | pad-rootfs | append-metadata
IMAGE/factory.bin := qsdk-ipq-factory-nor | check-size
DEVICE_PACKAGES := ipq-wifi-engenius_emr3500
endef
TARGET_DEVICES += engenius_emr3500
define Device/engenius_ens620ext
$(call Device/FitImage)
DEVICE_VENDOR := EnGenius
DEVICE_MODEL := ENS620EXT
SOC := qcom-ipq4018
DEVICE_DTS_CONFIG := config@4
BLOCKSIZE := 64k
PAGESIZE := 256
BOARD_NAME := ENS620EXT
VENDOR_ID := 0x0101
PRODUCT_ID := 0x79
PRODUCT_ID_NEW := 0xA4
DATECODE := 190507
FW_VER := 3.1.2
FW_VER_NEW := 3.5.6
CW_VER := 1.8.99
IMAGE_SIZE := 21312k
KERNEL_SIZE := 5120k
FILESYSTEMS := squashfs
IMAGES += factory_30.bin factory_35.bin
IMAGE/sysupgrade.bin := append-kernel | append-rootfs | pad-rootfs | check-size | append-metadata
IMAGE/factory_30.bin := append-kernel | pad-to $$$$(KERNEL_SIZE) | append-rootfs | pad-rootfs | check-size | SenaoFW $$$$(PRODUCT_ID) $$$$(FW_VER)
IMAGE/factory_35.bin := qsdk-ipq-factory-nor | check-size | SenaoFW $$$$(PRODUCT_ID_NEW) $$$$(FW_VER_NEW)
endef
TARGET_DEVICES += engenius_ens620ext
define Device/ezviz_cs-w3-wd1200g-eup
$(call Device/FitImage)
DEVICE_VENDOR := EZVIZ
DEVICE_MODEL := CS-W3-WD1200G
DEVICE_VARIANT := EUP
DEVICE_DTS_CONFIG := config@4
IMAGE_SIZE := 14848k
SOC := qcom-ipq4018
IMAGE/sysupgrade.bin := append-kernel | append-rootfs | pad-rootfs | \
append-metadata
DEVICE_PACKAGES := -kmod-ath10k-ct kmod-ath10k-ct-smallbuffers \
ipq-wifi-ezviz_cs-w3-wd1200g-eup
endef
TARGET_DEVICES += ezviz_cs-w3-wd1200g-eup
define Device/glinet_gl-ap1300
$(call Device/FitImage)
$(call Device/UbiFit)
DEVICE_VENDOR := GL.iNet
DEVICE_MODEL := GL-AP1300
SOC := qcom-ipq4018
DEVICE_DTS_CONFIG := config@ap.dk01.1-c2
BLOCKSIZE := 128k
PAGESIZE := 2048
IMAGE_SIZE := 131072k
KERNEL_INSTALL := 1
DEVICE_PACKAGES := ipq-wifi-glinet_gl-ap1300
endef
TARGET_DEVICES += glinet_gl-ap1300
define Device/glinet_gl-b1300
$(call Device/FitImage)
DEVICE_VENDOR := GL.iNet
DEVICE_MODEL := GL-B1300
BOARD_NAME := gl-b1300
SOC := qcom-ipq4029
KERNEL_SIZE := 4096k
IMAGE_SIZE := 26624k
IMAGE/sysupgrade.bin := append-kernel |append-rootfs | pad-rootfs | append-metadata
endef
TARGET_DEVICES += glinet_gl-b1300
define Device/glinet_gl-s1300
$(call Device/FitImage)
DEVICE_VENDOR := GL.iNet
DEVICE_MODEL := GL-S1300
SOC := qcom-ipq4029
KERNEL_SIZE := 4096k
IMAGE_SIZE := 26624k
IMAGES := sysupgrade.bin
IMAGE/sysupgrade.bin := append-kernel | append-rootfs | pad-rootfs | append-metadata
DEVICE_PACKAGES := ipq-wifi-glinet_gl-s1300 kmod-fs-ext4 kmod-mmc kmod-spi-dev
endef
TARGET_DEVICES += glinet_gl-s1300
define Device/linksys_ea6350v3
# The Linksys EA6350v3 has a uboot bootloader that does not
# support either booting lzma kernel images nor booting UBI
# partitions. This uboot, however, supports raw kernel images and
# gzipped images.
#
# As for the time of writing this, the device will boot the kernel
# from a fixed address with a fixed length of 3MiB. Also, the
# device has a hard-coded kernel command line that requieres the
# rootfs and alt_rootfs to be in mtd11 and mtd13 respectively.
# Oh... and the kernel partition overlaps with the rootfs
# partition (the same for alt_kernel and alt_rootfs).
#
# If you are planing re-partitioning the device, you may want to
# keep those details in mind:
# 1. The kernel adresses you should honor are 0x00000000 and
# 0x02800000 respectively.
# 2. The kernel size (plus the dtb) cannot exceed 3.00MiB in size.
# 3. You can use 'zImage', but not a raw 'Image' packed with lzma.
# 4. The kernel command line from uboot is harcoded to boot with
# rootfs either in mtd11 or mtd13.
$(call Device/FitzImage)
DEVICE_VENDOR := Linksys
DEVICE_MODEL := EA6350
DEVICE_VARIANT := v3
SOC := qcom-ipq4018
BLOCKSIZE := 128k
PAGESIZE := 2048
KERNEL_SIZE := 3072k
IMAGE_SIZE := 37888k
UBINIZE_OPTS := -E 5
IMAGES += factory.bin
IMAGE/factory.bin := append-kernel | append-uImage-fakehdr filesystem | pad-to $$$$(KERNEL_SIZE) | append-ubi | linksys-image type=EA6350v3
endef
TARGET_DEVICES += linksys_ea6350v3
define Device/linksys_ea8300
$(call Device/FitzImage)
DEVICE_VENDOR := Linksys
DEVICE_MODEL := EA8300
SOC := qcom-ipq4019
KERNEL_SIZE := 3072k
IMAGE_SIZE := 87040k
BLOCKSIZE := 128k
PAGESIZE := 2048
UBINIZE_OPTS := -E 5 # EOD marks to "hide" factory sig at EOF
IMAGES += factory.bin
IMAGE/factory.bin := append-kernel | pad-to $$$$(KERNEL_SIZE) | append-ubi | linksys-image type=EA8300
DEVICE_PACKAGES := ath10k-firmware-qca9888-ct ipq-wifi-linksys_ea8300 kmod-usb-ledtrig-usbport
endef
TARGET_DEVICES += linksys_ea8300
define Device/linksys_mr8300
$(call Device/FitzImage)
DEVICE_VENDOR := Linksys
DEVICE_MODEL := MR8300
SOC := qcom-ipq4019
KERNEL_SIZE := 3072k
IMAGE_SIZE := 87040k
BLOCKSIZE := 128k
PAGESIZE := 2048
UBINIZE_OPTS := -E 5 # EOD marks to "hide" factory sig at EOF
IMAGES += factory.bin
IMAGE/factory.bin := append-kernel | pad-to $$$$(KERNEL_SIZE) | append-ubi | linksys-image type=MR8300
DEVICE_PACKAGES := ath10k-firmware-qca9888-ct ipq-wifi-linksys_mr8300-v0 kmod-usb-ledtrig-usbport
endef
TARGET_DEVICES += linksys_mr8300
define Device/luma_wrtq-329acn
$(call Device/FitImage)
DEVICE_VENDOR := Luma Home
DEVICE_MODEL := WRTQ-329ACN
SOC := qcom-ipq4018
DEVICE_PACKAGES := ipq-wifi-luma_wrtq-329acn kmod-ath3k kmod-eeprom-at24 kmod-i2c-gpio
IMAGE_SIZE := 76632k
BLOCKSIZE := 128k
PAGESIZE := 2048
endef
TARGET_DEVICES += luma_wrtq-329acn
define Device/meraki_mr33
$(call Device/FitImage)
DEVICE_VENDOR := Cisco Meraki
DEVICE_MODEL := MR33
SOC := qcom-ipq4029
BLOCKSIZE := 128k
PAGESIZE := 2048
DEVICE_PACKAGES := -swconfig ath10k-firmware-qca9887-ct
endef
TARGET_DEVICES += meraki_mr33
define Device/mobipromo_cm520-79f
$(call Device/FitzImage)
$(call Device/UbiFit)
DEVICE_VENDOR := MobiPromo
DEVICE_MODEL := CM520-79F
SOC := qcom-ipq4019
BLOCKSIZE := 128k
PAGESIZE := 2048
DEVICE_PACKAGES := ipq-wifi-mobipromo_cm520-79f kmod-usb-ledtrig-usbport
endef
TARGET_DEVICES += mobipromo_cm520-79f
define Device/netgear_ex61x0v2
$(call Device/DniImage)
DEVICE_VENDOR := NETGEAR
DEVICE_DTS_CONFIG := config@4
NETGEAR_BOARD_ID := EX6150v2series
NETGEAR_HW_ID := 29765285+16+0+128+2x2
IMAGE_SIZE := 14400k
SOC := qcom-ipq4018
endef
define Device/netgear_ex6100v2
$(call Device/netgear_ex61x0v2)
DEVICE_MODEL := EX6100
DEVICE_VARIANT := v2
endef
TARGET_DEVICES += netgear_ex6100v2
define Device/netgear_ex6150v2
$(call Device/netgear_ex61x0v2)
DEVICE_MODEL := EX6150
DEVICE_VARIANT := v2
endef
TARGET_DEVICES += netgear_ex6150v2
define Device/openmesh_a42
$(call Device/FitImageLzma)
DEVICE_VENDOR := OpenMesh
DEVICE_MODEL := A42
SOC := qcom-ipq4018
DEVICE_DTS_CONFIG := config@om.a42
BLOCKSIZE := 64k
KERNEL = kernel-bin | lzma | fit lzma $$(DTS_DIR)/$$(DEVICE_DTS).dtb | pad-to $$(BLOCKSIZE)
IMAGE_SIZE := 15616k
IMAGES += factory.bin
IMAGE/factory.bin := append-rootfs | pad-rootfs | openmesh-image ce_type=A42
IMAGE/sysupgrade.bin/squashfs := append-rootfs | pad-rootfs | sysupgrade-tar rootfs=$$$$@ | append-metadata
endef
TARGET_DEVICES += openmesh_a42
define Device/openmesh_a62
$(call Device/FitImageLzma)
DEVICE_VENDOR := OpenMesh
DEVICE_MODEL := A62
SOC := qcom-ipq4019
DEVICE_DTS_CONFIG := config@om.a62
BLOCKSIZE := 64k
KERNEL = kernel-bin | lzma | fit lzma $$(DTS_DIR)/$$(DEVICE_DTS).dtb | pad-to $$(BLOCKSIZE)
IMAGE_SIZE := 15552k
IMAGES += factory.bin
IMAGE/factory.bin := append-rootfs | pad-rootfs | openmesh-image ce_type=A62
IMAGE/sysupgrade.bin/squashfs := append-rootfs | pad-rootfs | sysupgrade-tar rootfs=$$$$@ | append-metadata
DEVICE_PACKAGES := ath10k-firmware-qca9888-ct
endef
TARGET_DEVICES += openmesh_a62
define Device/plasmacloud_pa1200
$(call Device/FitImageLzma)
DEVICE_VENDOR := Plasma Cloud
DEVICE_MODEL := PA1200
SOC := qcom-ipq4018
DEVICE_DTS_CONFIG := config@pc.pa1200
BLOCKSIZE := 64k
KERNEL = kernel-bin | lzma | fit lzma $$(DTS_DIR)/$$(DEVICE_DTS).dtb | pad-to $$(BLOCKSIZE)
IMAGE_SIZE := 15616k
IMAGES += factory.bin
IMAGE/factory.bin := append-rootfs | pad-rootfs | openmesh-image ce_type=PA1200
IMAGE/sysupgrade.bin/squashfs := append-rootfs | pad-rootfs | sysupgrade-tar rootfs=$$$$@ | append-metadata
DEVICE_PACKAGES := ipq-wifi-plasmacloud_pa1200
endef
TARGET_DEVICES += plasmacloud_pa1200
define Device/plasmacloud_pa2200
$(call Device/FitImageLzma)
DEVICE_VENDOR := Plasma Cloud
DEVICE_MODEL := PA2200
SOC := qcom-ipq4019
DEVICE_DTS_CONFIG := config@pc.pa2200
BLOCKSIZE := 64k
KERNEL = kernel-bin | lzma | fit lzma $$(DTS_DIR)/$$(DEVICE_DTS).dtb | pad-to $$(BLOCKSIZE)
IMAGE_SIZE := 15552k
IMAGES += factory.bin
IMAGE/factory.bin := append-rootfs | pad-rootfs | openmesh-image ce_type=PA2200
IMAGE/sysupgrade.bin/squashfs := append-rootfs | pad-rootfs | sysupgrade-tar rootfs=$$$$@ | append-metadata
DEVICE_PACKAGES := ath10k-firmware-qca9888-ct ipq-wifi-plasmacloud_pa2200
endef
TARGET_DEVICES += plasmacloud_pa2200
define Device/p2w_r619ac
$(call Device/FitzImage)
$(call Device/UbiFit)
DEVICE_VENDOR := P&W
DEVICE_MODEL := R619AC
SOC := qcom-ipq4019
DEVICE_DTS_CONFIG := config@10
BLOCKSIZE := 128k
PAGESIZE := 2048
IMAGES += nand-factory.bin
IMAGE/nand-factory.bin := append-ubi | qsdk-ipq-factory-nand
DEVICE_PACKAGES := ipq-wifi-p2w_r619ac
endef
TARGET_DEVICES += p2w_r619ac
define Device/p2w_r619ac-128m
$(call Device/FitzImage)
$(call Device/UbiFit)
DEVICE_VENDOR := P&W
DEVICE_MODEL := R619AC
DEVICE_VARIANT := 128M
SOC := qcom-ipq4019
DEVICE_DTS_CONFIG := config@10
BLOCKSIZE := 128k
PAGESIZE := 2048
DEVICE_PACKAGES := ipq-wifi-p2w_r619ac
endef
TARGET_DEVICES += p2w_r619ac-128m
define Device/qcom_ap-dk01.1-c1
DEVICE_VENDOR := Qualcomm Atheros
DEVICE_MODEL := AP-DK01.1
DEVICE_VARIANT := C1
BOARD_NAME := ap-dk01.1-c1
SOC := qcom-ipq4019
DEVICE_DTS := qcom-ipq4019-ap.dk01.1-c1
KERNEL_INSTALL := 1
KERNEL_SIZE := 4096k
IMAGE_SIZE := 26624k
$(call Device/FitImage)
IMAGE/sysupgrade.bin := append-kernel | pad-to $$$$(KERNEL_SIZE) | append-rootfs | pad-rootfs | append-metadata
endef
TARGET_DEVICES += qcom_ap-dk01.1-c1
define Device/qcom_ap-dk04.1-c1
$(call Device/FitImage)
$(call Device/UbiFit)
DEVICE_VENDOR := Qualcomm Atheros
DEVICE_MODEL := AP-DK04.1
DEVICE_VARIANT := C1
SOC := qcom-ipq4019
DEVICE_DTS := qcom-ipq4019-ap.dk04.1-c1
KERNEL_INSTALL := 1
KERNEL_SIZE := 4048k
BLOCKSIZE := 128k
PAGESIZE := 2048
BOARD_NAME := ap-dk04.1-c1
endef
TARGET_DEVICES += qcom_ap-dk04.1-c1
define Device/qxwlan_e2600ac-c1
$(call Device/FitImage)
DEVICE_VENDOR := Qxwlan
DEVICE_MODEL := E2600AC
DEVICE_VARIANT := C1
BOARD_NAME := e2600ac-c1
SOC := qcom-ipq4019
KERNEL_SIZE := 4096k
IMAGE_SIZE := 31232k
IMAGE/sysupgrade.bin := append-kernel | append-rootfs | pad-rootfs | append-metadata
DEVICE_PACKAGES := ipq-wifi-qxwlan_e2600ac
endef
TARGET_DEVICES += qxwlan_e2600ac-c1
define Device/qxwlan_e2600ac-c2
$(call Device/FitImage)
$(call Device/UbiFit)
DEVICE_VENDOR := Qxwlan
DEVICE_MODEL := E2600AC
DEVICE_VARIANT := C2
SOC := qcom-ipq4019
KERNEL_INSTALL := 1
BLOCKSIZE := 128k
PAGESIZE := 2048
DEVICE_PACKAGES := ipq-wifi-qxwlan_e2600ac
endef
TARGET_DEVICES += qxwlan_e2600ac-c2
define Device/teltonika_rutx
$(call Device/FitImage)
$(call Device/UbiFit)
DEVICE_VENDOR := Teltonika
DEVICE_MODEL := RUTX
BOARD_NAME := rutx
SOC := qcom-ipq4018
DEVICE_DTS_DIR := ../dts
DEVICE_DTS := $(foreach dts,$(notdir $(wildcard $(PLATFORM_DIR)/dts/*.dts)),$(patsubst %.dts,%,$(dts)))
DEVICE_DTS_CONFIG := config@5
KERNEL = kernel-bin | gzip | fit-rutx gzip "$$(KDIR)/{$$(subst $$(space),$$(comma),$$(addprefix image-,$$(addsuffix .dtb,$$(DEVICE_DTS))))}"
KERNEL_INSTALL := 1
BLOCKSIZE := 128k
PAGESIZE := 2048
FILESYSTEMS := squashfs
KERNEL_IN_UBI := 1
IMAGES := sysupgrade.bin
#IMAGE/sysupgrade.bin := append-ubi | qsdk-ipq-factory-nand | append-rutx-metadata
#IMAGE/sysupgrade.bin := append-ubi | UbootFw-rutx | append-rutx-metadata
IMAGE/sysupgrade.bin := append-ubi | UbootFw-rutx | append-metadata
#DEVICE_PACKAGES := ipq-wifi-teltonika_rutx kmod-bluetooth kmod-r2ec sysupgrade-helper
DEVICE_PACKAGES := uboot-ipq40xx ipq-wifi-teltonika_rutx kmod-bluetooth sysupgrade-helper
HW_SUPPORT := io_expander%stm32:shiftreg_1
endef
TARGET_DEVICES += teltonika_rutx
define Device/unielec_u4019-32m
$(call Device/FitImage)
DEVICE_VENDOR := Unielec
DEVICE_MODEL := U4019
DEVICE_VARIANT := 32M
BOARD_NAME := u4019-32m
SOC := qcom-ipq4019
KERNEL_SIZE := 4096k
IMAGE_SIZE := 31232k
IMAGE/sysupgrade.bin := append-kernel | append-rootfs | pad-rootfs | append-metadata
endef
TARGET_DEVICES += unielec_u4019-32m
define Device/zyxel_nbg6617
$(call Device/FitImageLzma)
DEVICE_VENDOR := ZyXEL
DEVICE_MODEL := NBG6617
SOC := qcom-ipq4018
KERNEL_SIZE := 4096k
ROOTFS_SIZE := 24960k
RAS_BOARD := NBG6617
RAS_ROOTFS_SIZE := 19840k
RAS_VERSION := "$(VERSION_DIST) $(REVISION)"
IMAGE/sysupgrade.bin := append-kernel | append-rootfs | pad-rootfs | append-metadata
IMAGES += factory.bin
# The ZyXEL firmware allows flashing thru the web-gui only when the rootfs is
# at least as large as the one of the initial firmware image (not the current
# one on the device). This only applies to the Web-UI, the bootlaoder ignores
# this minimum-size. However, the larger image can be flashed both ways.
IMAGE/factory.bin := append-rootfs | pad-rootfs | pad-to 64k | check-size $$$$(ROOTFS_SIZE) | zyxel-ras-image separate-kernel
IMAGE/sysupgrade.bin/squashfs := append-rootfs | pad-rootfs | check-size $$$$(ROOTFS_SIZE) | sysupgrade-tar rootfs=$$$$@ | append-metadata
DEVICE_PACKAGES := kmod-usb-ledtrig-usbport
endef
TARGET_DEVICES += zyxel_nbg6617
define Device/zyxel_wre6606
$(call Device/FitImage)
DEVICE_VENDOR := ZyXEL
DEVICE_MODEL := WRE6606
DEVICE_DTS_CONFIG := config@4
SOC := qcom-ipq4018
IMAGE_SIZE := 13184k
IMAGE/sysupgrade.bin := append-kernel | append-rootfs | pad-rootfs | append-metadata | check-size
DEVICE_PACKAGES := -kmod-ath10k-ct kmod-ath10k-ct-smallbuffers
endef
TARGET_DEVICES += zyxel_wre6606

View file

@ -1,80 +0,0 @@
[ipq40xx]
dirname=ipq40xx
nand_available=true
nor_available=true
emmc_available=true
spi_nand_available=true
norplusnand_available=true
norplusemmc_available=false
nand_pagesize=2048
nand_pages_per_block=64
nand_total_blocks=4096
nand_partition=nand-partition.xml
nor_pagesize=256
nor_pages_per_block=256
nor_total_blocks=512
nor_partition=nor-partition.xml
bootconfig=bootconfig.xml
nand_bootconfig=nand_bootconfig.bin
nor_bootconfig=nor_bootconfig.bin
bootconfig1=bootconfig1.xml
nand_bootconfig1=nand_bootconfig1.bin
nor_bootconfig1=nor_bootconfig1.bin
emmc_pagesize=512
emmc_blocksize=512
emmc_total_blocks=7634944
emmc_partition=emmc-partition.xml
smem_info=["smem-ipq40xx.xml"]
cdt_info=["pcddr_40xx.xml"]
cdt_info_default=pcddr_40xx.xml
nand_partition_mbn=nand-system-partition-ipq40xx.bin
nor_partition_mbn=nor-system-partition-ipq40xx.bin
emmc_partition_mbn=gpt_main0.bin
nand_flash_conf=nand-apps-flash.conf
nor_flash_conf=nor-apps-flash.conf
emmc_flash_conf=emmc-apps-flash.conf
machid=0x8010000
norplusnand_partition=nor-plus-nand-parition.xml
norplusnand_flash_conf=norplusnand-apps-flash.conf
norplusnand_partition_mbn=norplusnand-system-partition-ipq40xx.bin
[AP.DK01.1-C2]
dirname=AP.DK01.1-C2
nand_available=false
nor_available=false
emmc_available=false
spi_nand_available=true
norplusnand_available=true
norplusemmc_available=false
nand_pagesize=2048
nand_pages_per_block=64
nand_total_blocks=4096
nand_partition=nand-partition.xml
nor_pagesize=256
nor_pages_per_block=256
nor_total_blocks=512
nor_partition=nor-partition.xml
bootconfig=bootconfig.xml
nand_bootconfig=nand_bootconfig.bin
nor_bootconfig=nor_bootconfig.bin
bootconfig1=bootconfig1.xml
nand_bootconfig1=nand_bootconfig1.bin
nor_bootconfig1=nor_bootconfig1.bin
emmc_pagesize=512
emmc_blocksize=512
emmc_total_blocks=7634944
emmc_partition=emmc-partition.xml
smem_info=["smem-AP.DK01.1-C2.xml"]
cdt_info=["pcddr_AP.DK01.1-C2_64M16.xml", "pcddr_AP.DK01.1-C2_128M16.xml", "pcddr_AP.DK01.1-C2_256M16.xml"]
cdt_info_default=pcddr_AP.DK01.1-C2.xml
nand_partition_mbn=nand-system-partition-ipq40xx.bin
nor_partition_mbn=nor-system-partition-ipq40xx.bin
emmc_partition_mbn=gpt_main0.bin
nand_flash_conf=nand-apps-flash.conf
nor_flash_conf=nor-apps-flash.conf
emmc_flash_conf=emmc-apps-flash.conf
machid=0x8010100
norplusnand_partition=nor-plus-nand-parition.xml
norplusnand_flash_conf=norplusnand-apps-flash.conf
norplusnand_partition_mbn=norplusnand-system-partition-ipq40xx.bin

View file

@ -1,79 +0,0 @@
[ipq40xx]
dirname=ipq40xx
nand_available=true
nor_available=true
emmc_available=true
spi_nand_available=true
norplusnand_available=true
norplusemmc_available=false
nand_pagesize=2048
nand_pages_per_block=64
nand_total_blocks=4096
nand_partition=nand-partition.xml
nor_pagesize=256
nor_pages_per_block=256
nor_total_blocks=512
nor_partition=nor-partition.xml
bootconfig=bootconfig.xml
nand_bootconfig=nand_bootconfig.bin
nor_bootconfig=nor_bootconfig.bin
bootconfig1=bootconfig1.xml
nand_bootconfig1=nand_bootconfig1.bin
nor_bootconfig1=nor_bootconfig1.bin
emmc_pagesize=512
emmc_blocksize=512
emmc_total_blocks=7634944
emmc_partition=emmc-partition.xml
smem_info=["smem-ipq40xx.xml"]
cdt_info=["pcddr_40xx.xml"]
cdt_info_default=pcddr_40xx.xml
nand_partition_mbn=nand-system-partition-ipq40xx.bin
nor_partition_mbn=nor-system-partition-ipq40xx.bin
emmc_partition_mbn=gpt_main0.bin
nand_flash_conf=nand-flash.conf
nor_flash_conf=nor-flash.conf
emmc_flash_conf=emmc-flash.conf
machid=0x8010000
norplusnand_partition=nor-plus-nand-parition.xml
norplusnand_flash_conf=norplusnand-flash.conf
norplusnand_partition_mbn=norplusnand-system-partition-ipq40xx.bin
[AP.DK01.1-C2]
dirname=AP.DK01.1-C2
nand_available=false
nor_available=false
emmc_available=false
spi_nand_available=true
norplusnand_available=true
norplusemmc_available=false
nand_pagesize=2048
nand_pages_per_block=64
nand_total_blocks=4096
nand_partition=nand-partition.xml
nor_pagesize=256
nor_pages_per_block=256
nor_total_blocks=512
nor_partition=nor-partition.xml
bootconfig=bootconfig.xml
nand_bootconfig=nand_bootconfig.bin
nor_bootconfig=nor_bootconfig.bin
bootconfig1=bootconfig1.xml
nand_bootconfig1=nand_bootconfig1.bin
nor_bootconfig1=nor_bootconfig1.bin
emmc_pagesize=512
emmc_blocksize=512
emmc_total_blocks=7634944
emmc_partition=emmc-partition.xml
smem_info=["smem-AP.DK01.1-C2.xml"]
cdt_info=["pcddr_AP.DK01.1-C2_64M16.xml", "pcddr_AP.DK01.1-C2_128M16.xml", "pcddr_AP.DK01.1-C2_256M16.xml"]
cdt_info_default=pcddr_AP.DK01.1-C2.xml
nand_partition_mbn=nand-system-partition-ipq40xx.bin
nor_partition_mbn=nor-system-partition-ipq40xx.bin
emmc_partition_mbn=gpt_main0.bin
nand_flash_conf=nand-flash.conf
nor_flash_conf=nor-flash.conf
emmc_flash_conf=emmc-flash.conf
machid=0x8010100
norplusnand_partition=nor-plus-nand-parition.xml
norplusnand_flash_conf=norplusnand-flash.conf
norplusnand_partition_mbn=norplusnand-system-partition-ipq40xx.bin

View file

@ -1,17 +0,0 @@
[ubi]
partition = rootfs
filename = file.ubi
[ubi_1]
partition = rootfs_1
filename = file.ubi
primary = ubi
[u-boot]
partition = 0:APPSBL
filename = file.elf
[u-boot_1]
partition = 0:APPSBL_1
filename = file.elf
primary = u-boot

View file

@ -1,53 +0,0 @@
[mibib]
partition = 0:MIBIB
filename = norplusnand-system-partition-ipq40xx.bin
[sbl1]
partition = 0:SBL1
filename = sbl1_nor.mbn
[bootconfig]
partition = 0:BOOTCONFIG
filename = nor_bootconfig.bin
[bootconfig_1]
partition = 0:BOOTCONFIG1
filename = nor_bootconfig1.bin
[ddr-teltonika,rutx]
partition = 0:CDT
filename = cdt-AP.DK01.1-C2.bin
if_machid = 0x8010100
[ddr-teltonika,rutx_1]
partition = 0:CDT_1
filename = cdt-AP.DK01.1-C2.bin
if_machid = 0x8010100
primary = ddr-teltonika,rutx
[tz]
partition = 0:QSEE
filename = tz.mbn
[tz_1]
partition = 0:QSEE_1
filename = tz.mbn
primary = tz
[u-boot]
partition = 0:APPSBL
filename = file.elf
[u-boot_1]
partition = 0:APPSBL_1
filename = file.elf
primary = u-boot
[ubi]
partition = rootfs
filename = file.ubi
[ubi_1]
partition = rootfs_1
filename = file.ubi
primary = ubi

File diff suppressed because it is too large Load diff

View file

@ -1,25 +0,0 @@
--- a/drivers/mtd/nand/spi/xtx.c
+++ b/drivers/mtd/nand/spi/xtx.c
@@ -37,8 +37,8 @@
if (section)
return -ERANGE;
- region->offset = 8;
- region->length = 40;
+ region->offset = 48;
+ region->length = 16;
return 0;
}
@@ -49,8 +49,9 @@
if (section)
return -ERANGE;
- region->offset = 1;
- region->length = 7;
+ /* Reserve 2 bytes for the BBM. */
+ region->offset = 2;
+ region->length = 62;
return 0;
}

View file

@ -1,22 +0,0 @@
include $(TOPDIR)/rules.mk
ARCH:=aarch64
BOARD:=ipq60xx
BOARDNAME:=Qualcomm Technologies, Inc IPQ60xx
FEATURES:=ubifs squashfs fpu ramdisk nand pcie usbgadget
CPU_TYPE:=cortex-a53
CPU_SUBTYPE:=neon-vfpv4
MAINTAINER:=John Crispin <blogic@openwrt.org>
SUBTARGETS:=generic ipq60xx_32
KERNELNAME:=zImage Image dtbs
KERNEL_PATCHVER:=5.4
include $(INCLUDE_DIR)/target.mk
DEFAULT_PACKAGES += \
uboot-envtools kmod-leds-gpio kmod-gpio-button-hotplug kmod-button-hotplug \
kmod-ata-core kmod-ata-ahci kmod-ata-ahci-platform kmod-usb2 kmod-usb3 \
swconfig kmod-usb-phy-ipq807x kmod-usb-dwc3-qcom-internal
$(eval $(call BuildTarget))

View file

@ -1,68 +0,0 @@
#!/bin/sh
#
# Copyright (C) 2015 OpenWrt.org
#
. /lib/functions/uci-defaults.sh
board_config_update
board=$(board_name)
boardname="${board##*,}"
case "$board" in
alfa-network,ap120c-ac)
ucidef_set_led_netdev "wan" "WAN" "${boardname}:amber:wan" "eth1"
;;
asus,rt-ac58u)
ucidef_set_led_wlan "wlan2g" "WLAN2G" "${boardname}:blue:wlan2G" "phy0tpt"
ucidef_set_led_wlan "wlan5g" "WLAN5G" "${boardname}:blue:wlan5G" "phy1tpt"
ucidef_set_led_netdev "wan" "WAN" "${boardname}:blue:wan" "eth1"
ucidef_set_led_switch "lan" "LAN" "${boardname}:blue:lan" "switch0" "0x1e"
;;
avm,fritzbox-4040)
ucidef_set_led_wlan "wlan" "WLAN" "fritz4040:green:wlan" "phy0tpt" "phy1tpt"
ucidef_set_led_netdev "wan" "WAN" "fritz4040:green:wan" "eth1"
ucidef_set_led_switch "lan" "LAN" "fritz4040:green:lan" "switch0" "0x1e"
;;
avm,fritzbox-7530 |\
glinet,gl-b1300)
ucidef_set_led_wlan "wlan" "WLAN" "${boardname}:green:wlan" "phy0tpt"
;;
engenius,eap1300)
ucidef_set_led_netdev "lan" "LAN" "${boardname}:blue:lan" "eth0"
ucidef_set_led_wlan "wlan2g" "WLAN2G" "${boardname}:blue:wlan2g" "phy0tpt"
ucidef_set_led_wlan "wlan5g" "WLAN5G" "${boardname}:yellow:wlan5g" "phy1tpt"
ucidef_set_led_default "mesh" "MESH" "${boardname}:blue:mesh" "0"
;;
engenius,ens620ext)
ucidef_set_led_wlan "wlan2g" "WLAN2G" "${boardname}:green:wlan2G" "phy0tpt"
ucidef_set_led_wlan "wlan5g" "WLAN5G" "${boardname}:green:wlan5G" "phy1tpt"
ucidef_set_led_netdev "lan1" "LAN1" "${boardname}:green:lan1" "eth0"
ucidef_set_led_netdev "lan2" "LAN2" "${boardname}:green:lan2" "eth1"
;;
netgear,ex6100v2 |\
netgear,ex6150v2)
ucidef_set_led_wlan "wlan2g" "WLAN2G" "ex61x0v2:green:router" "phy0tpt"
ucidef_set_led_wlan "wlan5g" "WLAN5G" "ex61x0v2:green:client" "phy1tpt"
;;
qxwlan,e2600ac-c1 |\
qxwlan,e2600ac-c2)
ucidef_set_led_wlan "wlan2g" "WLAN0" "e2600ac:green:wlan0" "phy0tpt"
ucidef_set_led_wlan "wlan5g" "WLAN1" "e2600ac:green:wlan1" "phy1tpt"
;;
zyxel,nbg6617)
ucidef_set_led_wlan "wlan2g" "WLAN2G" "${boardname}:green:wlan2G" "phy0tpt"
ucidef_set_led_wlan "wlan5g" "WLAN5G" "${boardname}:green:wlan5G" "phy1tpt"
;;
zyxel,wre6606)
ucidef_set_led_wlan "wlan2g" "WLAN2G" "${boardname}:green:wlan2g" "phy0tpt"
ucidef_set_led_wlan "wlan5g" "WLAN5G" "${boardname}:green:wlan5g" "phy1tpt"
;;
*)
;;
esac
board_config_flush
exit 0

View file

@ -1,46 +0,0 @@
#!/bin/sh
#
# Copyright (c) 2015, 2020 The Linux Foundation. All rights reserved.
# Copyright (C) 2011 OpenWrt.org
#
[ -e /etc/config/network ] && exit 0
CFG=/etc/board.json
. /lib/functions/uci-defaults.sh
ipq60xx_setup_interfaces()
{
local board="$1"
case "$board" in
qcom,ipq6018-ap-cp01-c1 |\
qcom,ipq6018-ap-cp01-c2 |\
qcom,ipq6018-ap-cp01-c3 |\
qcom,ipq6018-ap-cp01-c4 |\
qcom,ipq6018-ap-cp01-c5 |\
qcom,ipq6018-db-cp01)
ucidef_set_interfaces_lan_wan "eth1 eth2 eth3 eth4" "eth0"
;;
pangu,l6018|\
wf,hr6001)
ucidef_set_interfaces_lan_wan "eth0 eth1 eth2 eth3" "eth4"
;;
qcom,ipq6018-ap-cp02-c1 |\
qcom,ipq6018-ap-cp03-c1 |\
qcom,ipq6018-db-cp02)
ucidef_set_interfaces_lan_wan "eth1" "eth0"
;;
*)
echo "Unsupported hardware. Network interfaces not intialized"
;;
esac
}
board_config_update
board=$(board_name)
ipq60xx_setup_interfaces $board
board_config_flush
exit 0

View file

@ -1,17 +0,0 @@
# Copyright (c) 2013, 2020, The Linux Foundation. All rights reserved.
#
# Permission to use, copy, modify, and/or distribute this software for any
# purpose with or without fee is hereby granted, provided that the above
# copyright notice and this permission notice appear in all copies.
#
# THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
# WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
# MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
# ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
# WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
# ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
# OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
::sysinit:/etc/init.d/rcS S boot
::shutdown:/etc/init.d/rcS K shutdown
ttyMSM0::askfirst:/bin/ash --login

View file

@ -1,21 +0,0 @@
PART_NAME=firmware
REQUIRE_IMAGE_METADATA=1
RAMFS_COPY_BIN='fw_printenv fw_setenv'
RAMFS_COPY_DATA='/etc/fw_env.config /var/lock/fw_printenv.lock'
platform_check_image() {
return 0;
}
platform_do_upgrade() {
case "$(board_name)" in
pangu,l6018|\
wf,hr6001)
nand_do_upgrade "$1"
;;
*)
default_do_upgrade "$1"
;;
esac
}

File diff suppressed because it is too large Load diff

View file

@ -1,518 +0,0 @@
// SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause)
/*
* IPQ6018 CP01 board device tree source
*
* Copyright (c) 2019-2021 The Linux Foundation. All rights reserved.
*/
/dts-v1/;
#include "ipq6018.dtsi"
#include "ipq6018-cpr-regulator.dtsi"
/ {
model = "WF HR6001";
compatible = "wf,hr6001", "qcom,ipq6018";
aliases {
led-boot = &power;
led-failsafe = &power;
led-running = &power;
led-upgrade = &power;
serial0 = &blsp1_uart3;
/*
* Aliases as required by u-boot
* to patch MAC addresses
*/
ethernet0 = "/soc/dp1";
ethernet1 = "/soc/dp2";
ethernet2 = "/soc/dp3";
ethernet3 = "/soc/dp4";
ethernet4 = "/soc/dp5";
};
chosen {
stdout-path = "serial0:115200n8";
bootargs-append = " root=/dev/ubiblock0_1 swiotlb=1";
};
};
&blsp1_uart3 {
pinctrl-0 = <&serial_3_pins>;
pinctrl-names = "default";
status = "ok";
};
&spi_0 {
cs-select = <0>;
status = "ok";
m25p80@0 {
#address-cells = <1>;
#size-cells = <1>;
reg = <0>;
compatible = "n25q128a11";
spi-max-frequency = <50000000>;
SBL1@0 {
label = "0:SBL1";
reg = <0x0 0xc0000>;
read-only;
};
MIBIB@c0000 {
label = "0:MIBIB";
reg = <0xc0000 0x10000>;
};
BOOTCONFIG@d0000 {
label = "0:BOOTCONFIG";
reg = <0xd0000 0x20000>;
read-only;
};
BOOTCONFIG1@f0000 {
label = "0:BOOTCONFIG1";
reg = <0xf0000 0x20000>;
read-only;
};
QSEE@110000 {
label = "0:QSEE";
reg = <0x110000 0x1a0000>;
read-only;
};
QSEE_1@2b0000 {
label = "0:QSEE_1";
reg = <0x2b0000 0x1a0000>;
read-only;
};
DEVCFG@450000 {
label = "0:DEVCFG";
reg = <0x450000 0x10000>;
read-only;
};
DEVCFG_1@460000 {
label = "0:DEVCFG_1";
reg = <0x460000 0x10000>;
read-only;
};
RPM@470000 {
label = "0:RPM";
reg = <0x4700000 0x40000>;
};
RPM_1@4b0000 {
label = "0:RPM_1";
reg = <0x4b0000 0x40000>;
read-only;
};
CDT@4f0000 {
label = "0:CDT";
reg = <0x4f0000 0x10000>;
};
CDT_1@500000 {
label = "0:CDT_1";
reg = <0x500000 0x10000>;
};
APPSBLENV@510000 {
label = "0:APPSBLENV";
reg = <0x510000 0x10000>;
};
APPSBL@520000 {
label = "0:APPSBL";
reg = <0x520000 0xa0000>;
};
APPSBL_1@5c0000 {
label = "0:APPSBL_1";
reg = <0x5c0000 0xa0000>;
};
ART: ART@660000 {
label = "0:ART";
reg = <0x660000 0x40000>;
};
};
};
&tlmm {
spi_0_pins: spi-0-pins {
pins = "gpio38", "gpio39", "gpio40", "gpio41";
function = "blsp0_spi";
drive-strength = <8>;
bias-pull-down;
};
sd_pins: sd-pinmux {
pins = "gpio62";
function = "sd_card";
drive-strength = <8>;
bias-pull-up;
};
i2c_1_pins: i2c_1_pins {
mux {
pins = "gpio42", "gpio43";
function = "blsp2_i2c";
drive-strength = <8>;
bias-pull-down;
};
};
mdio_pins: mdio_pinmux {
mux_0 {
pins = "gpio64";
function = "mdc";
drive-strength = <8>;
bias-pull-up;
};
mux_1 {
pins = "gpio65";
function = "mdio";
drive-strength = <8>;
bias-pull-up;
};
mux_2 {
pins = "gpio75";
function = "gpio";
bias-pull-up;
};
mux_3 {
pins = "gpio77";
function = "gpio";
bias-pull-up;
};
};
button_pins: button_pins {
reset_button {
pins = "gpio19";
function = "gpio";
drive-strength = <8>;
bias-pull-up;
};
};
led_pins: leds_pins {
wlan5g {
pins = "gpio35";
function = "gpio";
drive-strength = <8>;
bias-pull-down;
};
wlan2g {
pins = "gpio37";
function = "gpio";
drive-strength = <8>;
bias-pull-down;
};
lan1 {
pins = "gpio51";
function = "gpio";
drive-strength = <8>;
bias-pull-down;
};
lan2 {
pins = "gpio24";
function = "gpio";
drive-strength = <8>;
bias-pull-down;
};
lan3 {
pins = "gpio53";
function = "gpio";
drive-strength = <8>;
bias-pull-down;
};
lan4 {
pins = "gpio25";
function = "gpio";
drive-strength = <8>;
bias-pull-down;
};
wan {
pins = "gpio9";
function = "gpio";
drive-strength = <8>;
bias-pull-down;
};
};
pwm_pins: pwm_pinmux {
pins = "gpio18";
function = "pwm00";
drive-strength = <8>;
};
};
&soc {
mdio: mdio@90000 {
pinctrl-0 = <&mdio_pins>;
pinctrl-names = "default";
phy-reset-gpio = <&tlmm 75 0 &tlmm 77 1>;
status = "ok";
phy0: ethernet-phy@0 {
reg = <0>;
};
phy1: ethernet-phy@1 {
reg = <1>;
};
phy2: ethernet-phy@2 {
reg = <2>;
};
phy3: ethernet-phy@3 {
reg = <3>;
};
phy4: ethernet-phy@4 {
reg = <0x18>;
};
};
dp1 {
device_type = "network";
compatible = "qcom,nss-dp";
qcom,id = <1>;
reg = <0x3a001000 0x200>;
qcom,mactype = <0>;
local-mac-address = [000000000000];
qcom,link-poll = <1>;
qcom,phy-mdio-addr = <0>;
phy-mode = "sgmii";
};
dp2 {
device_type = "network";
compatible = "qcom,nss-dp";
qcom,id = <2>;
reg = <0x3a001200 0x200>;
qcom,mactype = <0>;
local-mac-address = [000000000000];
qcom,link-poll = <1>;
qcom,phy-mdio-addr = <1>;
phy-mode = "sgmii";
};
dp3 {
device_type = "network";
compatible = "qcom,nss-dp";
qcom,id = <3>;
reg = <0x3a001400 0x200>;
qcom,mactype = <0>;
local-mac-address = [000000000000];
qcom,link-poll = <1>;
qcom,phy-mdio-addr = <2>;
phy-mode = "sgmii";
};
dp4 {
device_type = "network";
compatible = "qcom,nss-dp";
qcom,id = <4>;
reg = <0x3a001600 0x200>;
qcom,mactype = <0>;
local-mac-address = [000000000000];
qcom,link-poll = <1>;
qcom,phy-mdio-addr = <3>;
phy-mode = "sgmii";
};
dp5 {
device_type = "network";
compatible = "qcom,nss-dp";
qcom,id = <5>;
reg = <0x3a001800 0x200>;
qcom,mactype = <0>;
local-mac-address = [000000000000];
qcom,link-poll = <1>;
qcom,phy-mdio-addr = <24>;
phy-mode = "sgmii";
};
ess-switch@3a000000 {
switch_cpu_bmp = <0x1>; /* cpu port bitmap */
switch_lan_bmp = <0x1e>; /* lan port bitmap */
switch_wan_bmp = <0x20>; /* wan port bitmap */
switch_inner_bmp = <0xc0>; /*inner port bitmap*/
switch_mac_mode = <0x0>; /* mac mode for uniphy instance0*/
switch_mac_mode1 = <0xf>; /* mac mode for uniphy instance1*/
switch_mac_mode2 = <0xff>; /* mac mode for uniphy instance2*/
qcom,port_phyinfo {
port@0 {
port_id = <1>;
phy_address = <0>;
};
port@1 {
port_id = <2>;
phy_address = <1>;
};
port@2 {
port_id = <3>;
phy_address = <2>;
};
port@3 {
port_id = <4>;
phy_address = <3>;
};
port@4 {
port_id = <5>;
phy_address = <0x18>;
port_mac_sel = "QGMAC_PORT";
};
};
};
nss-macsec0 {
compatible = "qcom,nss-macsec";
phy_addr = <0x18>;
phy_access_mode = <0>;
mdiobus = <&mdio>;
};
pwm {
pinctrl-0 = <&pwm_pins>;
pinctrl-names = "default";
};
gpio_keys {
compatible = "gpio-keys";
pinctrl-0 = <&button_pins>;
pinctrl-names = "default";
button@1 {
label = "wps";
linux,code = <KEY_WPS_BUTTON>;
gpios = <&tlmm 19 GPIO_ACTIVE_LOW>;
linux,input-type = <1>;
debounce-interval = <60>;
};
};
leds {
compatible = "gpio-leds";
pinctrl-0 = <&led_pins>;
pinctrl-names = "default";
led@35 {
label = "green:wlan5g";
gpios = <&tlmm 35 GPIO_ACTIVE_HIGH>;
};
power: led@37 {
label = "green:wlan2g";
gpios = <&tlmm 37 GPIO_ACTIVE_HIGH>;
};
led@51 {
label = "green:lan1";
gpios = <&tlmm 51 GPIO_ACTIVE_HIGH>;
};
led@24 {
label = "green:lan2";
gpios = <&tlmm 24 GPIO_ACTIVE_HIGH>;
};
led@53 {
label = "green:lan3";
gpios = <&tlmm 53 GPIO_ACTIVE_HIGH>;
};
led@25 {
label = "green:lan4";
gpios = <&tlmm 25 GPIO_ACTIVE_HIGH>;
};
led@31 {
label = "green:wan";
gpios = <&tlmm 31 GPIO_ACTIVE_HIGH>;
};
};
};
&qpic_bam {
status = "ok";
};
&qpic_nand {
status = "ok";
nand@0 {
reg = <0>;
#address-cells = <1>;
#size-cells = <1>;
nand-ecc-strength = <4>;
nand-ecc-step-size = <512>;
nand-bus-width = <8>;
};
};
&pcie_phy {
status = "ok";
};
&pcie0 {
status = "ok";
};
&qusb_phy_1 {
status = "ok";
};
&usb2 {
status = "ok";
};
&sdhc_2 {
pinctrl-0 = <&sd_pins>;
pinctrl-names = "default";
cd-gpios = <&tlmm 62 GPIO_ACTIVE_LOW>;
status = "ok";
};
&qusb_phy_0 {
status = "ok";
};
&ssphy_0 {
status = "ok";
};
&usb3 {
status = "ok";
};
&nss_crypto {
status = "ok";
};
&i2c_1 {
pinctrl-0 = <&i2c_1_pins>;
pinctrl-names = "default";
status = "ok";
};
&sdhc_2 {
pinctrl-0 = <&sd_pins>;
pinctrl-names = "default";
cd-gpios = <&tlmm 62 1>;
sd-ldo-gpios = <&tlmm 66 0>;
vqmmc-supply = <&ipq6018_l2>;
status = "ok";
};

View file

@ -1,631 +0,0 @@
// SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause)
/*
* IPQ6018 CP01 board device tree source
*
* Copyright (c) 2019-2021 The Linux Foundation. All rights reserved.
*/
/dts-v1/;
#include "ipq6018.dtsi"
#include "ipq6018-cpr-regulator.dtsi"
/ {
model = "PANGU L6018";
compatible = "pangu,l6018", "qcom,ipq6018";
aliases {
led-boot = &power;
led-failsafe = &power;
led-running = &power;
led-upgrade = &power;
serial0 = &blsp1_uart3;
/*
* Aliases as required by u-boot
* to patch MAC addresses
*/
ethernet0 = "/soc/dp1";
ethernet1 = "/soc/dp2";
ethernet2 = "/soc/dp3";
ethernet3 = "/soc/dp4";
ethernet4 = "/soc/dp5";
};
chosen {
stdout-path = "serial0:115200n8";
bootargs-append = " root=/dev/ubiblock0_1 swiotlb=1";
};
};
&blsp1_uart3 {
pinctrl-0 = <&serial_3_pins>;
pinctrl-names = "default";
status = "ok";
};
&i2c_1 {
pinctrl-0 = <&i2c_1_pins>;
pinctrl-names = "default";
status = "ok";
};
&spi_0 {
cs-select = <0>;
status = "ok";
m25p80@0 {
#address-cells = <1>;
#size-cells = <1>;
reg = <0>;
compatible = "n25q128a11";
spi-max-frequency = <50000000>;
SBL1@0 {
label = "0:SBL1";
reg = <0x0 0xc0000>;
read-only;
};
MIBIB@c0000 {
label = "0:MIBIB";
reg = <0xc0000 0x10000>;
};
BOOTCONFIG@d0000 {
label = "0:BOOTCONFIG";
reg = <0xd0000 0x20000>;
read-only;
};
BOOTCONFIG1@f0000 {
label = "0:BOOTCONFIG1";
reg = <0xf0000 0x20000>;
read-only;
};
QSEE@110000 {
label = "0:QSEE";
reg = <0x110000 0x1a0000>;
read-only;
};
QSEE_1@2b0000 {
label = "0:QSEE_1";
reg = <0x2b0000 0x1a0000>;
read-only;
};
DEVCFG@450000 {
label = "0:DEVCFG";
reg = <0x450000 0x10000>;
read-only;
};
DEVCFG_1@460000 {
label = "0:DEVCFG_1";
reg = <0x460000 0x10000>;
read-only;
};
RPM@470000 {
label = "0:RPM";
reg = <0x4700000 0x40000>;
};
RPM_1@4b0000 {
label = "0:RPM_1";
reg = <0x4b0000 0x40000>;
read-only;
};
CDT@4f0000 {
label = "0:CDT";
reg = <0x4f0000 0x10000>;
};
CDT_1@500000 {
label = "0:CDT_1";
reg = <0x500000 0x10000>;
read-only;
};
APPSBLENV@510000 {
label = "0:APPSBLENV";
reg = <0x510000 0x10000>;
};
APPSBL@520000 {
label = "0:APPSBL";
reg = <0x520000 0xa0000>;
};
APPSBL_1@5c0000 {
label = "0:APPSBL_1";
reg = <0x5c0000 0xa0000>;
};
ART: ART@660000 {
label = "0:ART";
reg = <0x660000 0x40000>;
};
};
};
&tlmm {
spi_0_pins: spi-0-pins {
pins = "gpio38", "gpio39", "gpio40", "gpio41";
function = "blsp0_spi";
drive-strength = <8>;
bias-pull-down;
};
i2c_1_pins: i2c_1_pins {
mux {
pins = "gpio42", "gpio43";
function = "blsp2_i2c";
drive-strength = <8>;
bias-pull-down;
};
};
button_pins: button_pins {
wps_button {
pins = "gpio9";
function = "gpio";
drive-strength = <8>;
bias-pull-up;
};
};
rst_usb_hub_pinmux {
mux {
pins = "gpio66";
function = "gpio";
drive-strength = <8>;
bias-pull-down;
output-high;
};
};
mdio_pins: mdio_pinmux {
mux_0 {
pins = "gpio64";
function = "mdc";
drive-strength = <8>;
bias-pull-up;
};
mux_1 {
pins = "gpio65";
function = "mdio";
drive-strength = <8>;
bias-pull-up;
};
mux_2 {
pins = "gpio75";
function = "gpio";
bias-pull-up;
};
mux_3 {
pins = "gpio77";
function = "gpio";
bias-pull-up;
};
};
pcie0_pins: pcie_pins {
pcie0_rst {
pins = "gpio60";
function = "pcie0_rst";
drive-strength = <8>;
bias-pull-down;
};
pcie0_wake {
pins = "gpio36";
function = "pcie0_wake";
drive-strength = <8>;
bias-pull-down;
};
};
leds_pins: leds_pins {
power {
pins = "gpio25";
function = "gpio";
drive-strength = <8>;
bias-pull-down;
};
wlan5g {
pins = "gpio35";
function = "gpio";
drive-strength = <8>;
bias-pull-down;
};
wlan2g {
pins = "gpio37";
function = "gpio";
drive-strength = <8>;
bias-pull-down;
};
usb1 {
pins = "gpio24";
function = "gpio";
drive-strength = <8>;
bias-pull-down;
};
usb0 {
pins = "gpio50";
function = "gpio";
drive-strength = <8>;
bias-pull-down;
};
lte1 {
pins = "gpio34";
function = "gpio";
drive-strength = <8>;
bias-pull-down;
};
lte2 {
pins = "gpio29";
function = "gpio";
drive-strength = <8>;
bias-pull-down;
};
lte3 {
pins = "gpio30";
function = "gpio";
drive-strength = <8>;
bias-pull-down;
};
lte4 {
pins = "gpio31";
function = "gpio";
drive-strength = <8>;
bias-pull-down;
};
lte5 {
pins = "gpio32";
function = "gpio";
drive-strength = <8>;
bias-pull-down;
};
lte6 {
pins = "gpio23";
function = "gpio";
drive-strength = <8>;
bias-pull-down;
};
lte1pwr {
pins = "gpio0";
function = "gpio";
drive-strength = <8>;
bias-pull-up;
output-high;
};
lte2pwr {
pins = "gpio16";
function = "gpio";
drive-strength = <8>;
bias-pull-up;
output-high;
};
lte3pwr {
pins = "gpio18";
function = "gpio";
drive-strength = <8>;
bias-pull-up;
output-high;
};
lte4pwr {
pins = "gpio2";
function = "gpio";
drive-strength = <8>;
bias-pull-up;
output-high;
};
lte5pwr {
pins = "gpio21";
function = "gpio";
drive-strength = <8>;
bias-pull-up;
output-high;
};
lte6pwr {
pins = "gpio22";
function = "gpio";
drive-strength = <8>;
bias-pull-up;
output-high;
};
};
};
&soc {
mdio: mdio@90000 {
pinctrl-0 = <&mdio_pins>;
pinctrl-names = "default";
phy-reset-gpio = <&tlmm 75 0 &tlmm 77 1>;
status = "ok";
phy0: ethernet-phy@0 {
reg = <0>;
};
phy1: ethernet-phy@1 {
reg = <1>;
};
phy2: ethernet-phy@2 {
reg = <2>;
};
phy3: ethernet-phy@3 {
reg = <3>;
};
phy4: ethernet-phy@4 {
reg = <0x30>;
};
};
dp1 {
device_type = "network";
compatible = "qcom,nss-dp";
qcom,id = <1>;
reg = <0x3a001000 0x200>;
qcom,mactype = <0>;
local-mac-address = [000000000000];
qcom,link-poll = <1>;
qcom,phy-mdio-addr = <0>;
phy-mode = "sgmii";
};
dp2 {
device_type = "network";
compatible = "qcom,nss-dp";
qcom,id = <2>;
reg = <0x3a001200 0x200>;
qcom,mactype = <0>;
local-mac-address = [000000000000];
qcom,link-poll = <1>;
qcom,phy-mdio-addr = <1>;
phy-mode = "sgmii";
};
dp3 {
device_type = "network";
compatible = "qcom,nss-dp";
qcom,id = <3>;
reg = <0x3a001400 0x200>;
qcom,mactype = <0>;
local-mac-address = [000000000000];
qcom,link-poll = <1>;
qcom,phy-mdio-addr = <2>;
phy-mode = "sgmii";
};
dp4 {
device_type = "network";
compatible = "qcom,nss-dp";
qcom,id = <4>;
reg = <0x3a001600 0x200>;
qcom,mactype = <0>;
local-mac-address = [000000000000];
qcom,link-poll = <1>;
qcom,phy-mdio-addr = <3>;
phy-mode = "sgmii";
};
dp5 {
device_type = "network";
compatible = "qcom,nss-dp";
qcom,id = <5>;
reg = <0x3a003000 0x3fff>;
qcom,mactype = <1>;
local-mac-address = [000000000000];
qcom,link-poll = <1>;
qcom,phy-mdio-addr = <30>;
phy-mode = "sgmii";
};
ess-switch@3a000000 {
switch_cpu_bmp = <0x1>; /* cpu port bitmap */
switch_lan_bmp = <0x1e>; /* lan port bitmap */
switch_wan_bmp = <0x20>; /* wan port bitmap */
switch_inner_bmp = <0xc0>; /*inner port bitmap*/
switch_mac_mode = <0x0>; /* mac mode for uniphy instance0*/
switch_mac_mode1 = <0xe>; /* mac mode for uniphy instance1*/
switch_mac_mode2 = <0xff>; /* mac mode for uniphy instance2*/
qcom,port_phyinfo {
port@0 {
port_id = <1>;
phy_address = <0>;
};
port@1 {
port_id = <2>;
phy_address = <1>;
};
port@2 {
port_id = <3>;
phy_address = <2>;
};
port@3 {
port_id = <4>;
phy_address = <3>;
};
port@4 {
port_id = <5>;
phy_address = <30>;
phy_i2c_address = <30>;
phy-i2c-mode; /*i2c access phy */
media-type = "sfp"; /* fiber mode */
};
};
};
gpio_keys {
compatible = "gpio-keys";
pinctrl-0 = <&button_pins>;
pinctrl-names = "default";
button@1 {
label = "wps";
linux,code = <KEY_WPS_BUTTON>;
gpios = <&tlmm 9 GPIO_ACTIVE_LOW>;
linux,input-type = <1>;
debounce-interval = <60>;
};
};
leds {
compatible = "gpio-leds";
pinctrl-0 = <&leds_pins>;
pinctrl-names = "default";
led@24 {
label = "green:usb1";
gpios = <&tlmm 24 GPIO_ACTIVE_HIGH>;
};
led@50 {
label = "green:usb0";
gpios = <&tlmm 50 GPIO_ACTIVE_HIGH>;
};
power: led@25 {
label = "green:power";
gpios = <&tlmm 25 GPIO_ACTIVE_HIGH>;
};
led@35 {
label = "green:wlan5g";
gpios = <&tlmm 35 GPIO_ACTIVE_HIGH>;
};
led@37 {
label = "green:wlan2g";
gpios = <&tlmm 37 GPIO_ACTIVE_HIGH>;
};
led@34 {
label = "green:lte1";
gpios = <&tlmm 34 GPIO_ACTIVE_HIGH>;
};
led@29 {
label = "green:lte2";
gpios = <&tlmm 29 GPIO_ACTIVE_HIGH>;
};
led@30 {
label = "green:lte3";
gpios = <&tlmm 30 GPIO_ACTIVE_HIGH>;
};
led@31 {
label = "green:lte4";
gpios = <&tlmm 31 GPIO_ACTIVE_HIGH>;
};
led@32 {
label = "green:lte5";
gpios = <&tlmm 32 GPIO_ACTIVE_HIGH>;
};
led@23 {
label = "green:lte6";
gpios = <&tlmm 23 GPIO_ACTIVE_HIGH>;
};
led@0 {
label = "green:lte1pwr";
gpios = <&tlmm 0 GPIO_ACTIVE_HIGH>;
};
led@16 {
label = "green:lte2pwr";
gpios = <&tlmm 16 GPIO_ACTIVE_HIGH>;
};
led@18 {
label = "green:lte3pwr";
gpios = <&tlmm 18 GPIO_ACTIVE_HIGH>;
};
led@2 {
label = "green:lte4pwr";
gpios = <&tlmm 2 GPIO_ACTIVE_HIGH>;
};
led@21 {
label = "green:lte5pwr";
gpios = <&tlmm 21 GPIO_ACTIVE_HIGH>;
};
led@22 {
label = "green:lte6pwr";
gpios = <&tlmm 22 GPIO_ACTIVE_HIGH>;
};
};
};
&qpic_bam {
status = "ok";
};
&qpic_nand {
status = "ok";
nand@0 {
reg = <0>;
#address-cells = <1>;
#size-cells = <1>;
nand-ecc-strength = <4>;
nand-ecc-step-size = <512>;
nand-bus-width = <8>;
};
};
&pcie_phy {
status = "ok";
};
&pcie0 {
perst-gpio = <&tlmm 60 1>;
status = "ok";
};
&qusb_phy_1 {
status = "ok";
};
&usb2 {
status = "ok";
};
&qusb_phy_0 {
status = "ok";
};
&ssphy_0 {
status = "ok";
};
&usb3 {
status = "ok";
};
&nss_crypto {
status = "ok";
};

View file

@ -1,70 +0,0 @@
# CONFIG_32BIT is not set
CONFIG_64BIT=y
# CONFIG_ACPI is not set
# CONFIG_ARCH_BCM_IPROC is not set
# CONFIG_ARCH_EXYNOS7 is not set
CONFIG_ARCH_HAS_CACHE_LINE_SIZE=y
CONFIG_ARCH_HAS_HOLES_MEMORYMODEL=y
# CONFIG_ARCH_LAYERSCAPE is not set
CONFIG_ARCH_PHYS_ADDR_T_64BIT=y
# CONFIG_ARCH_SEATTLE is not set
CONFIG_ARCH_SELECT_MEMORY_MODEL=y
CONFIG_ARCH_SPARSEMEM_DEFAULT=y
CONFIG_ARCH_SPARSEMEM_ENABLE=y
# CONFIG_ARCH_SPRD is not set
# CONFIG_ARCH_STRATIX10 is not set
# CONFIG_ARCH_THUNDER is not set
CONFIG_ARCH_WANT_COMPAT_IPC_PARSE_VERSION=y
CONFIG_ARCH_WANT_FRAME_POINTERS=y
CONFIG_ARCH_WANT_HUGE_PMD_SHARE=y
# CONFIG_ARCH_XGENE is not set
# CONFIG_ARCH_ZYNQMP is not set
CONFIG_ARM64=y
# CONFIG_ARM64_16K_PAGES is not set
CONFIG_ARM64_4K_PAGES=y
# CONFIG_ARM64_64K_PAGES is not set
# CONFIG_ARM64_CRYPTO is not set
# CONFIG_ARM64_ERRATUM_819472 is not set
# CONFIG_ARM64_ERRATUM_824069 is not set
# CONFIG_ARM64_ERRATUM_826319 is not set
# CONFIG_ARM64_ERRATUM_827319 is not set
# CONFIG_ARM64_ERRATUM_832075 is not set
# CONFIG_ARM64_ERRATUM_843419 is not set
# CONFIG_ARM64_ERRATUM_845719 is not set
CONFIG_ARM64_HW_AFDBM=y
# CONFIG_ARM64_LSE_ATOMICS is not set
CONFIG_ARM64_PAN=y
# CONFIG_ARM64_PTDUMP is not set
# CONFIG_ARM64_RANDOMIZE_TEXT_OFFSET is not set
CONFIG_ARM64_VA_BITS=39
CONFIG_ARM64_VA_BITS_39=y
# CONFIG_ARM64_VA_BITS_48 is not set
# CONFIG_ARMV8_DEPRECATED is not set
# CONFIG_CAVIUM_ERRATUM_22375 is not set
# CONFIG_CAVIUM_ERRATUM_23154 is not set
# CONFIG_CAVIUM_ERRATUM_27456 is not set
# CONFIG_COMMON_CLK_VERSATILE is not set
CONFIG_COMMON_CLK_XGENE=y
CONFIG_COMPAT=y
CONFIG_COMPAT_BINFMT_ELF=y
# CONFIG_CRYPTO_MANAGER_DISABLE_TESTS is not set
# CONFIG_DEBUG_ALIGN_RODATA is not set
CONFIG_FRAME_WARN=2048
# CONFIG_GPIO_XGENE is not set
# CONFIG_HUGETLBFS is not set
# CONFIG_I2C_CADENCE is not set
# CONFIG_KASAN is not set
# CONFIG_KVM is not set
# CONFIG_NET_VENDOR_CAVIUM is not set
# CONFIG_PCI_HISI is not set
CONFIG_PHYS_ADDR_T_64BIT=y
# CONFIG_PHY_XGENE is not set
# CONFIG_POWER_RESET_XGENE is not set
CONFIG_QCOM_SCM_64=y
# CONFIG_RTC_DRV_EFI is not set
CONFIG_SPARSEMEM=y
CONFIG_SPARSEMEM_EXTREME=y
CONFIG_SPARSEMEM_MANUAL=y
CONFIG_SPARSEMEM_VMEMMAP=y
CONFIG_SPARSEMEM_VMEMMAP_ENABLE=y
CONFIG_VIRTUALIZATION=y

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@ -1,12 +0,0 @@
SUBTARGET:=generic
BOARDNAME:=QTI IPQ60xx(64bit) based boards
CPU_TYPE:=cortex-a53
KERNELNAME:=Image dtbs
DEFAULT_PACKAGES += \
sysupgrade-helper
define Target/Description
Build firmware image for IPQ60xx 64 bit system.
endef

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@ -1,71 +0,0 @@
# Copyright (c) 2014 The Linux Foundation. All rights reserved.
#
include $(TOPDIR)/rules.mk
include $(INCLUDE_DIR)/image.mk
define Device/Default
PROFILES := Default
KERNEL_LOADADDR := 0x41080000
KERNEL_DEPENDS = $$(wildcard $(DTS_DIR)/$$(DEVICE_DTS).dts)
KERNEL_INITRAMFS_PREFIX := $$(IMG_PREFIX)-$(1)-initramfs
KERNEL_PREFIX := $$(IMAGE_PREFIX)
SUPPORTED_DEVICES := $(subst _,$(comma),$(1))
IMAGE/sysupgrade.bin = sysupgrade-tar | append-metadata
IMAGE/sysupgrade.bin/squashfs :=
endef
define Device/LegacyImage
KERNEL_SUFFIX := -uImage
KERNEL = kernel-bin | append-dtb | uImage none
KERNEL_NAME := zImage
endef
define Device/FitImage
KERNEL_SUFFIX := -fit-uImage.itb
KERNEL = kernel-bin | gzip | fit gzip $$(DTS_DIR)/$$(DEVICE_DTS).dtb
KERNEL_NAME := Image
endef
define Device/FitImageLzma
KERNEL_SUFFIX := -fit-uImage.itb
KERNEL = kernel-bin | lzma | fit lzma $$(DTS_DIR)/$$(DEVICE_DTS).dtb
KERNEL_NAME := Image
endef
define Device/UbiFit
KERNEL_IN_UBI := 1
IMAGES := nand-factory.bin nand-sysupgrade.bin
IMAGE/nand-factory.bin := append-ubi
IMAGE/nand-sysupgrade.bin := sysupgrade-tar | append-metadata
endef
define Device/pangu_l6018
$(call Device/FitImage)
$(call Device/UbiFit)
DEVICE_DTS := ipq6018-l6018
DEVICE_DTS_CONFIG := config@cp01-c3
BLOCKSIZE := 128k
PAGESIZE := 2048
BOARD_NAME := ap-cp01-c3
DEVICE_TITLE := PANGU L6018
endef
TARGET_DEVICES += pangu_l6018
define Device/wf_hr6001
$(call Device/FitImage)
$(call Device/UbiFit)
KERNEL_LOADADDR := 0x41080000
DEVICE_DTS := ipq6018-hr6001
DEVICE_DTS_CONFIG := config@cp01-c1
BLOCKSIZE := 128k
PAGESIZE := 2048
BOARD_NAME := ap-cp01-c1
DEVICE_TITLE := WF HR6001
endef
TARGET_DEVICES += wf_hr6001
define Image/Build/squashfs
$(call prepare_generic_squashfs,$(KDIR)/root.squashfs)
endef
$(eval $(call BuildImage))

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@ -1,6 +0,0 @@
CONFIG_ARCH_IPQ6018=y
CONFIG_ARCH_MMAP_RND_BITS=8
CONFIG_PCIE_DW_PLAT=y
# CONFIG_USB_QCOM_DIAG_BRIDGE is not set
CONFIG_VMSPLIT_2G=y
# CONFIG_VMSPLIT_3G is not set

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@ -1,13 +0,0 @@
ARCH:=arm
SUBTARGET:=ipq60xx_32
BOARDNAME:=QTI IPQ60xx(32bit) based boards
CPU_TYPE:=cortex-a7
DEFAULT_PACKAGES += \
uboot-2016-ipq6018 uboot-2016-ipq6018_tiny lk-ipq6018 \
fwupgrade-tools
define Target/Description
Build firmware image for IPQ60xx SoC devices.
endef

View file

@ -1,12 +0,0 @@
diff -uprN a/arch/arm64/boot/dts/qcom/Makefile b/arch/arm64/boot/dts/qcom/Makefile
--- a/arch/arm64/boot/dts/qcom/Makefile 2022-04-05 05:28:39.000000000 -0700
+++ b/arch/arm64/boot/dts/qcom/Makefile 2022-04-05 05:59:32.747237306 -0700
@@ -7,6 +7,8 @@ dtb-$(CONFIG_ARCH_QCOM) += ipq6018-cp01-
dtb-$(CONFIG_ARCH_QCOM) += ipq6018-cp01-c5.dtb
dtb-$(CONFIG_ARCH_QCOM) += ipq6018-cp02-c1.dtb
dtb-$(CONFIG_ARCH_QCOM) += ipq6018-cp03-c1.dtb
+dtb-$(CONFIG_ARCH_QCOM) += ipq6018-hr6001.dtb
+dtb-$(CONFIG_ARCH_QCOM) += ipq6018-l6018.dtb
dtb-$(CONFIG_ARCH_QCOM) += ipq8074-hk01.dtb
dtb-$(CONFIG_ARCH_QCOM) += ipq8074-hk01.c2.dtb
dtb-$(CONFIG_ARCH_QCOM) += ipq8074-hk01.c3.dtb

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@ -1,10 +0,0 @@
define Profile/Default
NAME:=Default Profile (minimum package set)
PACKAGES:=
endef
define Profile/Default/Description
Default package set compatible with most boards.
endef
$(eval $(call Profile,Default))

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@ -1 +0,0 @@
include $(TOPDIR)/qsdk-package/profiles/qsdk.mk

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@ -1,21 +0,0 @@
include $(TOPDIR)/rules.mk
ARCH:=aarch64
BOARD:=ipq807x
BOARDNAME:=Qualcomm Atheros IPQ807x
FEATURES:=squashfs ramdisk fpu nand rtc emmc
KERNELNAME:=Image dtbs
CPU_TYPE:=cortex-a53
SUBTARGETS:=generic
KERNEL_PATCHVER:=5.4
include $(INCLUDE_DIR)/target.mk
DEFAULT_PACKAGES += \
kmod-usb3 kmod-usb-dwc3 kmod-usb-dwc3-qcom \
kmod-leds-gpio kmod-gpio-button-hotplug \
kmod-phy-aquantia kmod-qca-nss-dp \
ath11k-firmware-ipq8074 kmod-ath11k-ahb \
wpad-basic-mbedtls uboot-envtools
$(eval $(call BuildTarget))

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@ -1,28 +0,0 @@
. /lib/functions/uci-defaults.sh
board_config_update
board=$(board_name)
case "$board" in
edgecore,eap102)
ucidef_set_led_netdev "wan" "WAN" "green:wanpoe" "wan"
;;
redmi,ax6|\
xiaomi,ax3600)
ucidef_set_led_netdev "wan" "WAN" "blue:network" "wan"
;;
qnap,301w)
ucidef_set_led_netdev "lan1" "LAN1" "green:lan1" "lan1"
ucidef_set_led_netdev "lan2" "LAN2" "green:lan2" "lan2"
ucidef_set_led_netdev "lan3" "LAN3" "green:lan3" "lan3"
ucidef_set_led_netdev "lan4" "LAN4" "green:lan4" "lan4"
ucidef_set_led_netdev "10G_1" "10G_1" "green:10g_1" "10g-1"
ucidef_set_led_netdev "10G_2" "10G_2" "green:10g_2" "10g-2"
;;
esac
board_config_flush
exit 0

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@ -1,46 +0,0 @@
#
# Copyright (c) 2015 The Linux Foundation. All rights reserved.
# Copyright (c) 2011-2015 OpenWrt.org
#
. /lib/functions/uci-defaults.sh
. /lib/functions/system.sh
ipq807x_setup_interfaces()
{
local board="$1"
case "$board" in
buffalo,wxr-5950ax12|\
dynalink,dl-wrx36|\
xiaomi,ax9000)
ucidef_set_interfaces_lan_wan "lan1 lan2 lan3 lan4" "wan"
;;
edgecore,eap102)
ucidef_set_interfaces_lan_wan "lan" "wan"
;;
edimax,cax1800)
ucidef_set_interfaces_lan_wan "lan"
;;
qnap,301w)
ucidef_set_interfaces_lan_wan "lan1 lan2 lan3 lan4 10g-2" "10g-1"
;;
redmi,ax6|\
xiaomi,ax3600)
ucidef_set_interfaces_lan_wan "lan1 lan2 lan3" "wan"
;;
zyxel,nbg7815)
ucidef_set_interfaces_lan_wan "lan1 lan2 lan3 lan4 10g" "wan"
;;
*)
echo "Unsupported hardware. Network interfaces not initialized"
;;
esac
}
board_config_update
board=$(board_name)
ipq807x_setup_interfaces $board
board_config_flush
exit 0

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@ -1,35 +0,0 @@
#!/bin/sh
[ -e /lib/firmware/$FIRMWARE ] && exit 0
. /lib/functions/caldata.sh
board=$(board_name)
case "$FIRMWARE" in
"ath11k/IPQ8074/hw2.0/cal-ahb-c000000.wifi.bin")
case "$board" in
buffalo,wxr-5950ax12|\
edgecore,eap102|\
edimax,cax1800|\
dynalink,dl-wrx36|\
qnap,301w|\
redmi,ax6|\
xiaomi,ax3600|\
xiaomi,ax9000|\
zyxel,nbg7815)
caldata_extract "0:art" 0x1000 0x20000
;;
esac
;;
"ath11k/QCN9074/hw1.0/cal-pci-0000:01:00.0.bin")
case "$board" in
xiaomi,ax9000)
caldata_extract "0:art" 0x26800 0x20000
;;
esac
;;
*)
exit 1
;;
esac

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@ -1,13 +0,0 @@
#!/bin/sh /etc/rc.common
START=99
boot() {
case $(board_name) in
edgecore,eap102)
fw_setenv upgrade_available 0
# Unset changed flag after sysupgrade complete
fw_setenv changed
;;
esac
}

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@ -1,55 +0,0 @@
. /lib/functions.sh
# Prepare UBI devices for OpenWrt installation
# - rootfs (mtd22)
# - remove "ubi_rootfs" volume (rootfs on stock)
# - remove "fw_hash" volume (firmware hash)
# - user_property (mtd24)
# - remove "user_property_ubi" volume (user configuration)
# - remove "extra_property" volume (gzipped syslog)
buffalo_upgrade_prepare() {
local ubi_rootdev ubi_propdev
if ! ubi_rootdev="$(nand_attach_ubi rootfs)" || \
! ubi_propdev="$(nand_attach_ubi user_property)"; then
echo "failed to attach UBI volume \"rootfs\" or \"user_property\", rebooting..."
reboot -f
fi
ubirmvol /dev/$ubi_rootdev -N ubi_rootfs &> /dev/null || true
ubirmvol /dev/$ubi_rootdev -N fw_hash &> /dev/null || true
ubirmvol /dev/$ubi_propdev -N user_property_ubi &> /dev/null || true
ubirmvol /dev/$ubi_propdev -N extra_property &> /dev/null || true
}
# Re-create small dummy ubi_rootfs volume and update
# fw_hash volume to pass the checking by U-Boot
# - rootfs (mtd22)
# - re-create "ubi_rootfs" volume
# - re-create and update "fw_hash" volume
# - rootfs_recover (mtd23)
# - update "fw_hash" volume
buffalo_upgrade_optvol() {
local ubi_rootdev ubi_rcvrdev
local hashvol_root hashvol_rcvr
if ! ubi_rootdev="$(nand_attach_ubi rootfs)" || \
! ubi_rcvrdev="$(nand_attach_ubi rootfs_recover)"; then
echo "failed to attach UBI volume \"rootfs\" or \"rootfs_recover\", rebooting..."
reboot -f
fi
ubimkvol /dev/$ubi_rootdev -N ubi_rootfs -S 1
ubimkvol /dev/$ubi_rootdev -N fw_hash -S 1 -t static
if ! hashvol_root="$(nand_find_volume $ubi_rootdev fw_hash)" || \
! hashvol_rcvr="$(nand_find_volume $ubi_rcvrdev fw_hash)"; then
echo "\"fw_hash\" volume in \"rootfs\" or \"rootfs_recover\" not found, rebooting..."
reboot -f
fi
echo -n "00000000000000000000000000000000" > /tmp/dummyhash.txt
ubiupdatevol /dev/$hashvol_root /tmp/dummyhash.txt
ubiupdatevol /dev/$hashvol_rcvr /tmp/dummyhash.txt
}

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