#include "qcom-ipq4018-rutx-common.dtsi"

/ {
	io_expander = "shiftreg_1";

	soc {
		ext_io {
			compatible = "spi-gpio";
			#address-cells = <1>;
			#size-cells = <0>;

			gpio-sck = <&tlmm 1 GPIO_ACTIVE_HIGH>;  // SRCLK
			gpio-mosi = <&tlmm 3 GPIO_ACTIVE_HIGH>; // SER
			cs-gpios = <&tlmm 2 GPIO_ACTIVE_HIGH>;  // RCLK
			num-chipselects = <1>;

			shift_io: shift_io@0 {
				compatible = "fairchild,74hc595";
				reg = <0>;
				gpio-controller;
				#gpio-cells = <2>;
				registers-number = <3>;
				spi-max-frequency = <10000000>;
			};
		};
	};
};