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25 lines
944 B
Diff
25 lines
944 B
Diff
From 4129650c1fc888b310077fccbddbf2985ff834a0 Mon Sep 17 00:00:00 2001
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From: Nick Hollinghurst <nick.hollinghurst@raspberrypi.com>
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Date: Fri, 10 May 2024 15:18:44 +0100
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Subject: [PATCH 490/697] dt-bindings: clk: rp1: Add clocks representing MIPI
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DSI byteclock
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Define two new RP1 clocks, representing the MIPI DSI byteclock
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sources for the dividers used to generate MIPI[01] DPI pixel clocks.
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(Previously they were represented by "fake" fixed clocks sources).
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Signed-off-by: Nick Hollinghurst <nick.hollinghurst@raspberrypi.com>
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---
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include/dt-bindings/clock/rp1.h | 4 ++++
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1 file changed, 4 insertions(+)
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--- a/include/dt-bindings/clock/rp1.h
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+++ b/include/dt-bindings/clock/rp1.h
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@@ -54,3 +54,7 @@
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/* Extra PLL output channels - RP1B0 only */
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#define RP1_PLL_VIDEO_PRI_PH 43
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#define RP1_PLL_AUDIO_TERN 44
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+
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+/* MIPI clocks managed by the DSI driver */
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+#define RP1_CLK_MIPI0_DSI_BYTECLOCK 45
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+#define RP1_CLK_MIPI1_DSI_BYTECLOCK 46
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