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60 lines
2.3 KiB
Diff
60 lines
2.3 KiB
Diff
From c82222219729020790111b4dc560a5ef1125b0e9 Mon Sep 17 00:00:00 2001
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From: Dave Stevenson <dave.stevenson@raspberrypi.com>
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Date: Fri, 26 Apr 2024 17:48:06 +0100
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Subject: [PATCH 641/697] drm/vc4: Fixup mode for 7inch panel on DSI0
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The TC358762 bridge and panel decodes the mode differently on
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DSI0 to DSI1 for no obvious reason, and results in a shift off
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the screen.
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Whilst it would be possible to change the compatible used for
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the panel, that then messes up Pi5.
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As it appears to be restricted to vc4 DSI0, fix up the mode
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in vc4_dsi.
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Signed-off-by: Dave Stevenson <dave.stevenson@raspberrypi.com>
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---
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drivers/gpu/drm/vc4/vc4_dsi.c | 22 +++++++++++++++++++---
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1 file changed, 19 insertions(+), 3 deletions(-)
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--- a/drivers/gpu/drm/vc4/vc4_dsi.c
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+++ b/drivers/gpu/drm/vc4/vc4_dsi.c
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@@ -871,6 +871,7 @@ static bool vc4_dsi_bridge_mode_fixup(st
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unsigned long pixel_clock_hz = mode->clock * 1000;
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unsigned long pll_clock = pixel_clock_hz * dsi->divider;
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int divider;
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+ u16 htotal;
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/* Find what divider gets us a faster clock than the requested
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* pixel clock.
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@@ -887,12 +888,27 @@ static bool vc4_dsi_bridge_mode_fixup(st
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pixel_clock_hz = pll_clock / dsi->divider;
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adjusted_mode->clock = pixel_clock_hz / 1000;
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+ htotal = mode->htotal;
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+
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+ if (dsi->variant->port == 0 && mode->clock == 30000 &&
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+ mode->hdisplay == 800 && mode->htotal == (800 + 59 + 2 + 45) &&
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+ mode->vdisplay == 480 && mode->vtotal == (480 + 7 + 2 + 22)) {
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+ /*
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+ * Raspberry Pi 7" panel via TC358762 seems to have an issue on
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+ * DSI0 that it doesn't actually follow the vertical timing that
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+ * is otherwise identical to that produced on DSI1.
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+ * Fixup the mode.
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+ */
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+ htotal = 800 + 59 + 2 + 47;
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+ adjusted_mode->vtotal = 480 + 7 + 2 + 45;
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+ adjusted_mode->crtc_vtotal = 480 + 7 + 2 + 45;
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+ }
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/* Given the new pixel clock, adjust HFP to keep vrefresh the same. */
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- adjusted_mode->htotal = adjusted_mode->clock * mode->htotal /
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+ adjusted_mode->htotal = adjusted_mode->clock * htotal /
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mode->clock;
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- adjusted_mode->hsync_end += adjusted_mode->htotal - mode->htotal;
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- adjusted_mode->hsync_start += adjusted_mode->htotal - mode->htotal;
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+ adjusted_mode->hsync_end += adjusted_mode->htotal - htotal;
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+ adjusted_mode->hsync_start += adjusted_mode->htotal - htotal;
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return true;
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}
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