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https://github.com/Ysurac/openmptcprouter.git
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52 lines
1.7 KiB
Diff
52 lines
1.7 KiB
Diff
From 09d877cf076cbb67c79054e12bbb7c63a91faa71 Mon Sep 17 00:00:00 2001
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From: Peter Geis <pgwipeout@gmail.com>
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Date: Sun, 19 Dec 2021 08:11:56 -0500
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Subject: [PATCH 02/11] rockchip: rk3568: enable automatic power savings
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Enable automatic clock gating, solves the 7c temperature difference on
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SoQuartz.
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Signed-off-by: Peter Geis <pgwipeout@gmail.com>
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---
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arch/arm/mach-rockchip/rk3568/rk3568.c | 23 +++++++++++++++++++++++
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1 file changed, 23 insertions(+)
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--- a/arch/arm/mach-rockchip/rk3568/rk3568.c
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+++ b/arch/arm/mach-rockchip/rk3568/rk3568.c
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@@ -25,6 +25,15 @@
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#define EMMC_HPROT_SECURE_CTRL 0x03
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#define SDMMC0_HPROT_SECURE_CTRL 0x01
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+#define PMU_BASE_ADDR 0xfdd90000
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+#define PMU_NOC_AUTO_CON0 (0x70)
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+#define PMU_NOC_AUTO_CON1 (0x74)
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+#define EDP_PHY_GRF_BASE 0xfdcb0000
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+#define EDP_PHY_GRF_CON0 (EDP_PHY_GRF_BASE + 0x00)
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+#define EDP_PHY_GRF_CON10 (EDP_PHY_GRF_BASE + 0x28)
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+#define CPU_GRF_BASE 0xfdc30000
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+#define GRF_CORE_PVTPLL_CON0 (0x10)
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+
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/* PMU_GRF_GPIO0D_IOMUX_L */
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enum {
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GPIO0D1_SHIFT = 4,
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@@ -99,6 +108,20 @@ void board_debug_uart_init(void)
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int arch_cpu_init(void)
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{
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#ifdef CONFIG_SPL_BUILD
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+ /*
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+ * When perform idle operation, corresponding clock can
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+ * be opened or gated automatically.
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+ */
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+ writel(0xffffffff, PMU_BASE_ADDR + PMU_NOC_AUTO_CON0);
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+ writel(0x000f000f, PMU_BASE_ADDR + PMU_NOC_AUTO_CON1);
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+
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+ /* Disable eDP phy by default */
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+ writel(0x00070007, EDP_PHY_GRF_CON10);
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+ writel(0x0ff10ff1, EDP_PHY_GRF_CON0);
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+
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+ /* Set core pvtpll ring length */
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+ writel(0x00ff002b, CPU_GRF_BASE + GRF_CORE_PVTPLL_CON0);
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+
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/* Set the emmc sdmmc0 to secure */
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rk_clrreg(SGRF_BASE + SGRF_SOC_CON4, (EMMC_HPROT_SECURE_CTRL << 11
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| SDMMC0_HPROT_SECURE_CTRL << 4));
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