mirror of
				https://github.com/Ysurac/openmptcprouter.git
				synced 2025-03-09 15:40:20 +00:00 
			
		
		
		
	
		
			
				
	
	
		
			58 lines
		
	
	
	
		
			2 KiB
		
	
	
	
		
			Diff
		
	
	
	
	
	
			
		
		
	
	
			58 lines
		
	
	
	
		
			2 KiB
		
	
	
	
		
			Diff
		
	
	
	
	
	
| From 2ac94b8b6a664bb66404b595da4789687f13bcc4 Mon Sep 17 00:00:00 2001
 | |
| From: Bibby Hsieh <bibby.hsieh@mediatek.com>
 | |
| Date: Wed, 3 Oct 2018 11:41:50 +0800
 | |
| Subject: [PATCH 36/77] drm/mediatek: implement connection from BLS to DPI0
 | |
| 
 | |
| Modify display driver to support connection from BLS to DPI.
 | |
| 
 | |
| Signed-off-by: Bibby Hsieh <bibby.hsieh@mediatek.com>
 | |
| Reviewed-by: CK Hu <ck.hu@mediatek.com>
 | |
| ---
 | |
|  drivers/gpu/drm/mediatek/mtk_drm_ddp.c | 14 +++++++++++++-
 | |
|  1 file changed, 13 insertions(+), 1 deletion(-)
 | |
| 
 | |
| diff --git a/drivers/gpu/drm/mediatek/mtk_drm_ddp.c b/drivers/gpu/drm/mediatek/mtk_drm_ddp.c
 | |
| index 546b3e3b300b..579ce28d801d 100644
 | |
| --- a/drivers/gpu/drm/mediatek/mtk_drm_ddp.c
 | |
| +++ b/drivers/gpu/drm/mediatek/mtk_drm_ddp.c
 | |
| @@ -39,6 +39,7 @@
 | |
|  #define DISP_REG_CONFIG_DISP_OVL_MOUT_EN	0x030
 | |
|  #define DISP_REG_CONFIG_OUT_SEL			0x04c
 | |
|  #define DISP_REG_CONFIG_DSI_SEL			0x050
 | |
| +#define DISP_REG_CONFIG_DPI_SEL			0x064
 | |
|  
 | |
|  #define DISP_REG_MUTEX_EN(n)	(0x20 + 0x20 * (n))
 | |
|  #define DISP_REG_MUTEX(n)	(0x24 + 0x20 * (n))
 | |
| @@ -136,7 +137,10 @@
 | |
|  
 | |
|  #define OVL_MOUT_EN_RDMA		0x1
 | |
|  #define BLS_TO_DSI_RDMA1_TO_DPI1	0x8
 | |
| +#define BLS_TO_DPI_RDMA1_TO_DSI		0x2
 | |
|  #define DSI_SEL_IN_BLS			0x0
 | |
| +#define DPI_SEL_IN_BLS			0x0
 | |
| +#define DSI_SEL_IN_RDMA			0x1
 | |
|  
 | |
|  struct mtk_disp_mutex {
 | |
|  	int id;
 | |
| @@ -339,9 +343,17 @@ static void mtk_ddp_sout_sel(void __iomem *config_regs,
 | |
|  			     enum mtk_ddp_comp_id cur,
 | |
|  			     enum mtk_ddp_comp_id next)
 | |
|  {
 | |
| -	if (cur == DDP_COMPONENT_BLS && next == DDP_COMPONENT_DSI0)
 | |
| +	if (cur == DDP_COMPONENT_BLS && next == DDP_COMPONENT_DSI0) {
 | |
|  		writel_relaxed(BLS_TO_DSI_RDMA1_TO_DPI1,
 | |
|  			       config_regs + DISP_REG_CONFIG_OUT_SEL);
 | |
| +	} else if (cur == DDP_COMPONENT_BLS && next == DDP_COMPONENT_DPI0) {
 | |
| +		writel_relaxed(BLS_TO_DPI_RDMA1_TO_DSI,
 | |
| +			       config_regs + DISP_REG_CONFIG_OUT_SEL);
 | |
| +		writel_relaxed(DSI_SEL_IN_RDMA,
 | |
| +			       config_regs + DISP_REG_CONFIG_DSI_SEL);
 | |
| +		writel_relaxed(DPI_SEL_IN_BLS,
 | |
| +			       config_regs + DISP_REG_CONFIG_DPI_SEL);
 | |
| +	}
 | |
|  }
 | |
|  
 | |
|  void mtk_ddp_add_comp_to_path(void __iomem *config_regs,
 | |
| -- 
 | |
| 2.19.1
 | |
| 
 |