mirror of
https://github.com/Ysurac/openmptcprouter.git
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193 lines
5.2 KiB
Diff
193 lines
5.2 KiB
Diff
From f3c84bb53107cef0009347d071c1a188ce24b8a3 Mon Sep 17 00:00:00 2001
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From: Maxime Ripard <maxime@cerno.tech>
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Date: Fri, 17 Feb 2023 14:36:28 +0100
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Subject: [PATCH 0943/1016] drm/vc4: hvs: Create hw_init function
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Since the BCM2712 will feature a significantly different HVS, let's move
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the hardware initialisation part of our bind function into a separate
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function.
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That way, it will be easier to extend in the future.
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Signed-off-by: Maxime Ripard <maxime@cerno.tech>
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---
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drivers/gpu/drm/vc4/vc4_hvs.c | 155 ++++++++++++++++++----------------
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1 file changed, 83 insertions(+), 72 deletions(-)
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diff --git a/drivers/gpu/drm/vc4/vc4_hvs.c b/drivers/gpu/drm/vc4/vc4_hvs.c
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index eb635cec2aa8..3bc8608435ae 100644
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--- a/drivers/gpu/drm/vc4/vc4_hvs.c
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+++ b/drivers/gpu/drm/vc4/vc4_hvs.c
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@@ -1291,79 +1291,10 @@ struct vc4_hvs *__vc4_hvs_alloc(struct vc4_dev *vc4, struct platform_device *pde
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return hvs;
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}
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-static int vc4_hvs_bind(struct device *dev, struct device *master, void *data)
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+static int vc4_hvs_hw_init(struct vc4_hvs *hvs)
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{
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- struct platform_device *pdev = to_platform_device(dev);
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- struct drm_device *drm = dev_get_drvdata(master);
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- struct vc4_dev *vc4 = to_vc4_dev(drm);
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- struct vc4_hvs *hvs = NULL;
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- int ret;
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- u32 dispctrl;
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- u32 reg, top;
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-
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- hvs = __vc4_hvs_alloc(vc4, NULL);
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- if (IS_ERR(hvs))
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- return PTR_ERR(hvs);
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-
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- hvs->regs = vc4_ioremap_regs(pdev, 0);
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- if (IS_ERR(hvs->regs))
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- return PTR_ERR(hvs->regs);
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-
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- hvs->regset.base = hvs->regs;
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- hvs->regset.regs = hvs_regs;
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- hvs->regset.nregs = ARRAY_SIZE(hvs_regs);
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-
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- if (vc4->gen == VC4_GEN_5) {
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- struct rpi_firmware *firmware;
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- struct device_node *node;
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- unsigned int max_rate;
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-
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- node = rpi_firmware_find_node();
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- if (!node)
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- return -EINVAL;
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-
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- firmware = rpi_firmware_get(node);
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- of_node_put(node);
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- if (!firmware)
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- return -EPROBE_DEFER;
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-
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- hvs->core_clk = devm_clk_get(&pdev->dev, NULL);
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- if (IS_ERR(hvs->core_clk)) {
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- dev_err(&pdev->dev, "Couldn't get core clock\n");
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- return PTR_ERR(hvs->core_clk);
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- }
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-
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- max_rate = rpi_firmware_clk_get_max_rate(firmware,
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- RPI_FIRMWARE_CORE_CLK_ID);
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- rpi_firmware_put(firmware);
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- if (max_rate >= 550000000)
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- hvs->vc5_hdmi_enable_hdmi_20 = true;
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-
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- if (max_rate >= 600000000)
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- hvs->vc5_hdmi_enable_4096by2160 = true;
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-
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- hvs->max_core_rate = max_rate;
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-
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- ret = clk_prepare_enable(hvs->core_clk);
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- if (ret) {
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- dev_err(&pdev->dev, "Couldn't enable the core clock\n");
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- return ret;
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- }
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- }
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-
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- if (vc4->gen == VC4_GEN_4)
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- hvs->dlist = hvs->regs + SCALER_DLIST_START;
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- else
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- hvs->dlist = hvs->regs + SCALER5_DLIST_START;
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-
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- /* Upload filter kernels. We only have the one for now, so we
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- * keep it around for the lifetime of the driver.
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- */
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- ret = vc4_hvs_upload_linear_kernel(hvs,
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- &hvs->mitchell_netravali_filter,
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- mitchell_netravali_1_3_1_3_kernel);
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- if (ret)
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- return ret;
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+ struct vc4_dev *vc4 = hvs->vc4;
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+ u32 dispctrl, reg;
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reg = HVS_READ(SCALER_DISPECTRL);
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reg &= ~SCALER_DISPECTRL_DSP2_MUX_MASK;
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@@ -1445,6 +1376,86 @@ static int vc4_hvs_bind(struct device *dev, struct device *master, void *data)
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HVS_WRITE(SCALER_DISPCTRL, dispctrl);
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+ return 0;
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+}
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+
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+static int vc4_hvs_bind(struct device *dev, struct device *master, void *data)
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+{
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+ struct platform_device *pdev = to_platform_device(dev);
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+ struct drm_device *drm = dev_get_drvdata(master);
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+ struct vc4_dev *vc4 = to_vc4_dev(drm);
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+ struct vc4_hvs *hvs = NULL;
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+ int ret;
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+ u32 reg, top;
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+
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+ hvs = __vc4_hvs_alloc(vc4, NULL);
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+ if (IS_ERR(hvs))
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+ return PTR_ERR(hvs);
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+
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+ hvs->regs = vc4_ioremap_regs(pdev, 0);
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+ if (IS_ERR(hvs->regs))
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+ return PTR_ERR(hvs->regs);
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+
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+ hvs->regset.base = hvs->regs;
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+ hvs->regset.regs = hvs_regs;
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+ hvs->regset.nregs = ARRAY_SIZE(hvs_regs);
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+
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+ if (vc4->gen == VC4_GEN_5) {
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+ struct rpi_firmware *firmware;
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+ struct device_node *node;
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+ unsigned int max_rate;
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+
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+ node = rpi_firmware_find_node();
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+ if (!node)
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+ return -EINVAL;
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+
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+ firmware = rpi_firmware_get(node);
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+ of_node_put(node);
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+ if (!firmware)
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+ return -EPROBE_DEFER;
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+
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+ hvs->core_clk = devm_clk_get(&pdev->dev, NULL);
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+ if (IS_ERR(hvs->core_clk)) {
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+ dev_err(&pdev->dev, "Couldn't get core clock\n");
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+ return PTR_ERR(hvs->core_clk);
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+ }
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+
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+ max_rate = rpi_firmware_clk_get_max_rate(firmware,
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+ RPI_FIRMWARE_CORE_CLK_ID);
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+ rpi_firmware_put(firmware);
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+ if (max_rate >= 550000000)
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+ hvs->vc5_hdmi_enable_hdmi_20 = true;
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+
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+ if (max_rate >= 600000000)
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+ hvs->vc5_hdmi_enable_4096by2160 = true;
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+
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+ hvs->max_core_rate = max_rate;
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+
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+ ret = clk_prepare_enable(hvs->core_clk);
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+ if (ret) {
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+ dev_err(&pdev->dev, "Couldn't enable the core clock\n");
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+ return ret;
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+ }
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+ }
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+
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+ if (vc4->gen == VC4_GEN_4)
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+ hvs->dlist = hvs->regs + SCALER_DLIST_START;
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+ else
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+ hvs->dlist = hvs->regs + SCALER5_DLIST_START;
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+
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+ /* Upload filter kernels. We only have the one for now, so we
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+ * keep it around for the lifetime of the driver.
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+ */
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+ ret = vc4_hvs_upload_linear_kernel(hvs,
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+ &hvs->mitchell_netravali_filter,
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+ mitchell_netravali_1_3_1_3_kernel);
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+ if (ret)
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+ return ret;
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+
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+ ret = vc4_hvs_hw_init(hvs);
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+ if (ret)
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+ return ret;
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+
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/* Recompute Composite Output Buffer (COB) allocations for the displays
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*/
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if (vc4->gen == VC4_GEN_4) {
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--
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2.42.0
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