mirror of
https://github.com/Ysurac/openmptcprouter.git
synced 2025-02-15 04:42:02 +00:00
79 lines
2.1 KiB
Diff
79 lines
2.1 KiB
Diff
From 72e34f274a63a516f0b7ea5e164f30cdc8b62324 Mon Sep 17 00:00:00 2001
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From: Michael Zoran <mzoran@crowfest.net>
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Date: Sat, 14 Jan 2017 21:43:57 -0800
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Subject: [PATCH 109/277] ARM64: Round-Robin dispatch IRQs between CPUs.
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IRQ-CPU mapping is round robined on ARM64 to increase
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concurrency and allow multiple interrupts to be serviced
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at a time. This reduces the need for FIQ.
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Signed-off-by: Michael Zoran <mzoran@crowfest.net>
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---
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drivers/irqchip/irq-bcm2835.c | 15 ++++++++++++++-
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drivers/irqchip/irq-bcm2836.c | 21 +++++++++++++++++++++
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2 files changed, 35 insertions(+), 1 deletion(-)
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diff --git a/drivers/irqchip/irq-bcm2835.c b/drivers/irqchip/irq-bcm2835.c
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index fee691736c12..2a11c648cb2f 100644
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--- a/drivers/irqchip/irq-bcm2835.c
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+++ b/drivers/irqchip/irq-bcm2835.c
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@@ -168,10 +168,23 @@ static void armctrl_unmask_irq(struct irq_data *d)
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}
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}
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+#ifdef CONFIG_ARM64
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+void bcm2836_arm_irqchip_spin_gpu_irq(void);
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+
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+static void armctrl_ack_irq(struct irq_data *d)
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+{
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+ bcm2836_arm_irqchip_spin_gpu_irq();
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+}
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+
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+#endif
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+
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static struct irq_chip armctrl_chip = {
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.name = "ARMCTRL-level",
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.irq_mask = armctrl_mask_irq,
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- .irq_unmask = armctrl_unmask_irq
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+ .irq_unmask = armctrl_unmask_irq,
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+#ifdef CONFIG_ARM64
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+ .irq_ack = armctrl_ack_irq
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+#endif
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};
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static int armctrl_xlate(struct irq_domain *d, struct device_node *ctrlr,
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diff --git a/drivers/irqchip/irq-bcm2836.c b/drivers/irqchip/irq-bcm2836.c
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index 86b357ae027b..05b17ca993f4 100644
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--- a/drivers/irqchip/irq-bcm2836.c
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+++ b/drivers/irqchip/irq-bcm2836.c
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@@ -145,6 +145,27 @@ static void bcm2836_arm_irqchip_unmask_gpu_irq(struct irq_data *d)
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{
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}
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+#ifdef CONFIG_ARM64
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+
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+void bcm2836_arm_irqchip_spin_gpu_irq(void)
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+{
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+ u32 i;
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+ void __iomem *gpurouting = (intc.base + LOCAL_GPU_ROUTING);
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+ u32 routing_val = readl(gpurouting);
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+
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+ for (i = 1; i <= 3; i++) {
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+ u32 new_routing_val = (routing_val + i) & 3;
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+
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+ if (cpu_active(new_routing_val)) {
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+ writel(new_routing_val, gpurouting);
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+ return;
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+ }
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+ }
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+}
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+EXPORT_SYMBOL(bcm2836_arm_irqchip_spin_gpu_irq);
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+
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+#endif
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+
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static struct irq_chip bcm2836_arm_irqchip_gpu = {
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.name = "bcm2836-gpu",
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.irq_mask = bcm2836_arm_irqchip_mask_gpu_irq,
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--
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2.16.1
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