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https://github.com/Ysurac/openmptcprouter.git
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60 lines
2.2 KiB
Diff
60 lines
2.2 KiB
Diff
From da0d8f99c61c90585fe9a0e087dda2ab719b7838 Mon Sep 17 00:00:00 2001
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From: Maxime Ripard <maxime@cerno.tech>
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Date: Fri, 25 Mar 2022 17:09:41 +0100
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Subject: [PATCH 471/726] drm/vc4: Make sure we don't end up with a core clock
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too high
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Following the clock rate range improvements to the clock framework,
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trying to set a disjoint range on a clock will now result in an error.
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Thus, we can't set a minimum rate higher than the maximum reported by
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the firmware, or clk_set_min_rate() will fail.
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Thus we need to clamp the rate we are about to ask for to the maximum
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rate possible on that clock.
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Reviewed-by: Dave Stevenson <dave.stevenson@raspberrypi.com>
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Signed-off-by: Maxime Ripard <maxime@cerno.tech>
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---
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drivers/gpu/drm/vc4/vc4_kms.c | 13 ++++++++-----
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1 file changed, 8 insertions(+), 5 deletions(-)
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diff --git a/drivers/gpu/drm/vc4/vc4_kms.c b/drivers/gpu/drm/vc4/vc4_kms.c
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index d5b16579fd33..1688659ba1d5 100644
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--- a/drivers/gpu/drm/vc4/vc4_kms.c
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+++ b/drivers/gpu/drm/vc4/vc4_kms.c
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@@ -399,8 +399,8 @@ static void vc4_atomic_commit_tail(struct drm_atomic_state *state)
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if (vc4->is_vc5 && !vc4->firmware_kms) {
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unsigned long state_rate = max(old_hvs_state->core_clock_rate,
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new_hvs_state->core_clock_rate);
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- unsigned long core_rate = max_t(unsigned long,
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- 500000000, state_rate);
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+ unsigned long core_rate = clamp_t(unsigned long, state_rate,
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+ 500000000, hvs->max_core_rate);
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drm_dbg(dev, "Raising the core clock at %lu Hz\n", core_rate);
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@@ -436,14 +436,17 @@ static void vc4_atomic_commit_tail(struct drm_atomic_state *state)
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drm_atomic_helper_cleanup_planes(dev, state);
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if (vc4->is_vc5 && !vc4->firmware_kms) {
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- drm_dbg(dev, "Running the core clock at %lu Hz\n",
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- new_hvs_state->core_clock_rate);
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+ unsigned long core_rate = min_t(unsigned long,
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+ hvs->max_core_rate,
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+ new_hvs_state->core_clock_rate);
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+
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+ drm_dbg(dev, "Running the core clock at %lu Hz\n", core_rate);
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/*
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* Request a clock rate based on the current HVS
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* requirements.
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*/
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- WARN_ON(clk_set_min_rate(hvs->core_clk, new_hvs_state->core_clock_rate));
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+ WARN_ON(clk_set_min_rate(hvs->core_clk, core_rate));
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drm_dbg(dev, "Core clock actual rate: %lu Hz\n",
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clk_get_rate(hvs->core_clk));
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--
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2.33.1
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