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			43 lines
		
	
	
	
		
			1.4 KiB
		
	
	
	
		
			Diff
		
	
	
	
	
	
			
		
		
	
	
			43 lines
		
	
	
	
		
			1.4 KiB
		
	
	
	
		
			Diff
		
	
	
	
	
	
| From 6a5932028a4f3217ed7c9d602f269611d95dd8ca Mon Sep 17 00:00:00 2001
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| From: John Crispin <john@phrozen.org>
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| Date: Wed, 9 Aug 2017 15:13:19 +0200
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| Subject: [PATCH 44/57] net-next: dsa: mediatek: tell GDMA when we are turning
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|  on the special tag
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| 
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| Enabling this bit will make the RX DMA descriptor enable the SP bit for all
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| ingress traffic inside the return descriptor. The PPE needs this to know
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| that a SP is present.
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| 
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| Signed-off-by: John Crispin <john@phrozen.org>
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| ---
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|  drivers/net/dsa/mt7530.c | 5 +++++
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|  drivers/net/dsa/mt7530.h | 4 ++++
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|  2 files changed, 9 insertions(+)
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| 
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| --- a/drivers/net/dsa/mt7530.c
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| +++ b/drivers/net/dsa/mt7530.c
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| @@ -677,6 +677,11 @@ mt7530_cpu_port_enable(struct mt7530_pri
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|  	mt7530_write(priv, MT7530_PVC_P(port),
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|  		     PORT_SPEC_TAG);
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|  
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| +	/* Enable Mediatek header mode on the GMAC that the cpu port
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| +	 * connects to */
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| +	regmap_write_bits(priv->ethernet, MTK_GDMA_FWD_CFG(port),
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| +			  GDMA_SPEC_TAG, GDMA_SPEC_TAG);
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| +
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|  	/* Setup the MAC by default for the cpu port */
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|  	mt7530_write(priv, MT7530_PMCR_P(port), PMCR_CPUP_LINK);
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|  
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| --- a/drivers/net/dsa/mt7530.h
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| +++ b/drivers/net/dsa/mt7530.h
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| @@ -22,6 +22,10 @@
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|  
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|  #define TRGMII_BASE(x)			(0x10000 + (x))
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|  
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| +/* Registers for GDMA configuration access */
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| +#define MTK_GDMA_FWD_CFG(x)		(0x500 + (x * 0x1000))
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| +#define GDMA_SPEC_TAG			BIT(24)
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| +
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|  /* Registers to ethsys access */
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|  #define ETHSYS_CLKCFG0			0x2c
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|  #define  ETHSYS_TRGMII_CLK_SEL362_5	BIT(11)
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