openmptcprouter/root/package/boot/uboot-rockchip/patches/316-uboot-add-NanoPi-R5C-board.patch

--- a/arch/arm/dts/Makefile
+++ b/arch/arm/dts/Makefile
@@ -179,7 +179,8 @@
 	rk3568-photonicat.dtb \
 	rk3566-quartz64-a.dtb \
 	rk3568-rock-3a.dtb \
-	rk3568-radxa-e25.dtb
+	rk3568-radxa-e25.dtb \
+	rk3568-nanopi-r5c.dtb
 
 dtb-$(CONFIG_ROCKCHIP_RV1108) += \
 	rv1108-elgin-r1.dtb \
--- /dev/null
+++ b/arch/arm/dts/rk3568-nanopi-r5c.dts
@@ -0,0 +1,9 @@
+// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
+
+/dts-v1/;
+#include "rk3568-evb.dts"
+
+/ {
+	model = "FriendlyElec NanoPi R5C";
+	compatible = "friendlyelec,nanopi-r5c", "rockchip,rk3568";
+};
--- /dev/null
+++ b/arch/arm/dts/rk3568-nanopi-r5c-u-boot.dtsi
@@ -0,0 +1,25 @@
+// SPDX-License-Identifier: GPL-2.0+
+/*
+ * (C) Copyright 2021 Rockchip Electronics Co., Ltd
+ */
+
+#include "rk3568-u-boot.dtsi"
+
+/ {
+	chosen {
+		stdout-path = &uart2;
+		u-boot,spl-boot-order = "same-as-spl", &sdmmc0, &sdhci;
+	};
+};
+
+&sdmmc0 {
+	bus-width = <4>;
+	u-boot,dm-spl;
+	u-boot,spl-fifo-mode;
+};
+
+&uart2 {
+	clock-frequency = <24000000>;
+	u-boot,dm-spl;
+	status = "okay";
+};
--- a/arch/arm/mach-rockchip/rk3568/Kconfig
+++ b/arch/arm/mach-rockchip/rk3568/Kconfig
@@ -18,6 +18,11 @@
 	help
 	  NanoPi R5S FriendlyElec is a board for Rockchp RK3568.
 
+config TARGET_NANOPI_R5C_RK3568
+	bool "NanoPi R5C board"
+	help
+	  NanoPi R5C FriendlyElec is a board for Rockchp RK3568.
+
 config TARGET_QUARTZ64_A_RK3566
 	bool "Quartz64 Model A RK3566 development board"
 	help
@@ -40,6 +45,7 @@
 source "board/rockchip/bpi-r2-pro-rk3568/Kconfig"
 source "board/rockchip/evb_rk3568/Kconfig"
 source "board/friendlyelec/nanopi-r5s-rk3568/Kconfig"
+source "board/friendlyelec/nanopi-r5c-rk3568/Kconfig"
 source "board/pine64/quartz64-a-rk3566/Kconfig"
 
 endif
--- /dev/null
+++ b/board/friendlyelec/nanopi-r5c-rk3568/Kconfig
@@ -0,0 +1,15 @@
+if TARGET_NANOPI_R5C_RK3568
+
+config SYS_BOARD
+	default "nanopi-r5c-rk3568"
+
+config SYS_VENDOR
+	default "friendlyelec"
+
+config SYS_CONFIG_NAME
+	default "nanopi-r5c-rk3568"
+
+config BOARD_SPECIFIC_OPTIONS # dummy
+	def_bool y
+
+endif
--- /dev/null
+++ b/board/friendlyelec/nanopi-r5c-rk3568/Makefile
@@ -0,0 +1,4 @@
+# SPDX-License-Identifier:     GPL-2.0+
+#
+
+obj-y	+= nanopi-r5c-rk3568.o
--- /dev/null
+++ b/board/friendlyelec/nanopi-r5c-rk3568/nanopi-r5c-rk3568.c
@@ -0,0 +1,4 @@
+ // SPDX-License-Identifier: GPL-2.0+
+/*
+ *
+ */
--- /dev/null
+++ b/configs/nanopi-r5c-rk3568_defconfig
@@ -0,0 +1,98 @@
+CONFIG_ARM=y
+CONFIG_SKIP_LOWLEVEL_INIT=y
+CONFIG_ARCH_ROCKCHIP=y
+CONFIG_SYS_TEXT_BASE=0x00a00000
+CONFIG_SPL_LIBCOMMON_SUPPORT=y
+CONFIG_SPL_LIBGENERIC_SUPPORT=y
+CONFIG_NR_DRAM_BANKS=2
+CONFIG_DEFAULT_DEVICE_TREE="rk3568-nanopi-r5c"
+CONFIG_ROCKCHIP_RK3568=y
+CONFIG_SPL_ROCKCHIP_BACK_TO_BROM=y
+CONFIG_SPL_ROCKCHIP_COMMON_BOARD=y
+CONFIG_SPL_MMC=y
+CONFIG_SPL_SERIAL=y
+CONFIG_SPL_STACK_R_ADDR=0x600000
+CONFIG_TARGET_NANOPI_R5C_RK3568=y
+CONFIG_DEBUG_UART_BASE=0xFE660000
+CONFIG_DEBUG_UART_CLOCK=24000000
+CONFIG_DEBUG_UART=y
+CONFIG_SYS_LOAD_ADDR=0xc00800
+CONFIG_SYS_USB_OHCI_MAX_ROOT_PORTS=2
+CONFIG_API=y
+CONFIG_FIT=y
+CONFIG_FIT_VERBOSE=y
+CONFIG_SPL_LOAD_FIT=y
+CONFIG_OF_SYSTEM_SETUP=y
+CONFIG_DEFAULT_FDT_FILE="rockchip/rk3568-nanopi-r5c.dtb"
+# CONFIG_SYS_DEVICE_NULLDEV is not set
+# CONFIG_DISPLAY_CPUINFO is not set
+CONFIG_DISPLAY_BOARDINFO_LATE=y
+# CONFIG_SPL_RAW_IMAGE_SUPPORT is not set
+CONFIG_SPL_STACK_R=y
+CONFIG_SPL_SEPARATE_BSS=y
+CONFIG_SPL_ATF=y
+CONFIG_SPL_ATF_LOAD_IMAGE_V2=y
+CONFIG_CMD_BIND=y
+CONFIG_CMD_CLK=y
+CONFIG_CMD_GPIO=y
+CONFIG_CMD_GPT=y
+CONFIG_CMD_I2C=y
+CONFIG_CMD_MMC=y
+CONFIG_CMD_USB=y
+# CONFIG_CMD_SETEXPR is not set
+CONFIG_CMD_PMIC=y
+CONFIG_CMD_REGULATOR=y
+# CONFIG_SPL_DOS_PARTITION is not set
+CONFIG_SPL_OF_CONTROL=y
+CONFIG_OF_LIVE=y
+CONFIG_NET_RANDOM_ETHADDR=y
+CONFIG_SPL_DM_WARN=y
+CONFIG_SPL_REGMAP=y
+CONFIG_SPL_SYSCON=y
+CONFIG_SPL_CLK=y
+CONFIG_ROCKCHIP_GPIO=y
+CONFIG_ROCKCHIP_GPIO_V2=y
+CONFIG_SYS_I2C_ROCKCHIP=y
+CONFIG_MISC=y
+CONFIG_MMC_HS200_SUPPORT=y
+CONFIG_SPL_MMC_HS200_SUPPORT=y
+CONFIG_MMC_DW=y
+CONFIG_MMC_DW_ROCKCHIP=y
+CONFIG_MMC_SDHCI=y
+CONFIG_MMC_SDHCI_SDMA=y
+CONFIG_MMC_SDHCI_ROCKCHIP=y
+CONFIG_DM_ETH=y
+CONFIG_ETH_DESIGNWARE=y
+CONFIG_GMAC_ROCKCHIP=y
+CONFIG_POWER_DOMAIN=y
+CONFIG_DM_PMIC=y
+CONFIG_PMIC_RK8XX=y
+CONFIG_SPL_PMIC_RK8XX=y
+CONFIG_REGULATOR_PWM=y
+CONFIG_DM_REGULATOR_FIXED=y
+CONFIG_SPL_DM_REGULATOR_FIXED=y
+CONFIG_DM_REGULATOR_GPIO=y
+CONFIG_REGULATOR_RK8XX=y
+CONFIG_PWM_ROCKCHIP=y
+CONFIG_SPL_RAM=y
+CONFIG_DM_RESET=y
+CONFIG_BAUDRATE=1500000
+CONFIG_DEBUG_UART_SHIFT=2
+CONFIG_SYSRESET=y
+CONFIG_SYSRESET_PSCI=y
+CONFIG_USB=y
+CONFIG_USB_XHCI_HCD=y
+CONFIG_USB_XHCI_DWC3=y
+CONFIG_USB_EHCI_HCD=y
+CONFIG_USB_EHCI_GENERIC=y
+CONFIG_USB_OHCI_HCD=y
+CONFIG_USB_OHCI_GENERIC=y
+CONFIG_USB_DWC3=y
+CONFIG_USB_DWC3_GENERIC=y
+CONFIG_ROCKCHIP_USB2_PHY=y
+CONFIG_USB_KEYBOARD=y
+CONFIG_USB_HOST_ETHER=y
+CONFIG_USB_ETHER_LAN75XX=y
+CONFIG_USB_ETHER_LAN78XX=y
+CONFIG_USB_ETHER_SMSC95XX=y
+CONFIG_ERRNO_STR=y
--- /dev/null
+++ b/include/configs/nanopi-r5c-rk3568.h
@@ -0,0 +1,14 @@
+/* SPDX-License-Identifier: GPL-2.0+ */
+
+#ifndef __NANOPI_R5C_RK3568_H
+#define __NANOPI_R5C_RK3568_H
+
+#include <configs/rk3568_common.h>
+
+#define CONFIG_SUPPORT_EMMC_RPMB
+
+#define ROCKCHIP_DEVICE_SETTINGS \
+			"stdout=serial,vidconsole\0" \
+			"stderr=serial,vidconsole\0"
+
+#endif