mirror of
https://github.com/Ysurac/openmptcprouter.git
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103 lines
3.5 KiB
Diff
103 lines
3.5 KiB
Diff
From 4501501b8f55b277f219eaf7e863d91ddb1d8af7 Mon Sep 17 00:00:00 2001
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From: chunhui dai <chunhui.dai@mediatek.com>
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Date: Wed, 31 Oct 2018 17:59:50 +0800
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Subject: [PATCH 45/77] using different round rate for mt7623
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Change-Id: Ifac315b09d691fe2c056212dd59ae50212417d58
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CR-Id:
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Feature:
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---
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drivers/gpu/drm/mediatek/mtk_hdmi_phy.c | 14 --------------
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drivers/gpu/drm/mediatek/mtk_hdmi_phy.h | 2 --
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drivers/gpu/drm/mediatek/mtk_mt2701_hdmi_phy.c | 11 +++++++++++
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drivers/gpu/drm/mediatek/mtk_mt8173_hdmi_phy.c | 14 ++++++++++++++
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4 files changed, 25 insertions(+), 16 deletions(-)
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diff --git a/drivers/gpu/drm/mediatek/mtk_hdmi_phy.c b/drivers/gpu/drm/mediatek/mtk_hdmi_phy.c
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index 40e08df57f48..f014d65fa5ad 100644
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--- a/drivers/gpu/drm/mediatek/mtk_hdmi_phy.c
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+++ b/drivers/gpu/drm/mediatek/mtk_hdmi_phy.c
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@@ -15,20 +15,6 @@ static const struct phy_ops mtk_hdmi_phy_dev_ops = {
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.owner = THIS_MODULE,
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};
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-long mtk_hdmi_pll_round_rate(struct clk_hw *hw, unsigned long rate,
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- unsigned long *parent_rate)
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-{
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- struct mtk_hdmi_phy *hdmi_phy = to_mtk_hdmi_phy(hw);
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-
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- hdmi_phy->pll_rate = rate;
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- if (rate <= 74250000)
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- *parent_rate = rate;
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- else
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- *parent_rate = rate / 2;
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-
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- return rate;
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-}
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-
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unsigned long mtk_hdmi_pll_recalc_rate(struct clk_hw *hw,
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unsigned long parent_rate)
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{
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diff --git a/drivers/gpu/drm/mediatek/mtk_hdmi_phy.h b/drivers/gpu/drm/mediatek/mtk_hdmi_phy.h
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index a173a27d7a40..76e352d088d0 100644
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--- a/drivers/gpu/drm/mediatek/mtk_hdmi_phy.h
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+++ b/drivers/gpu/drm/mediatek/mtk_hdmi_phy.h
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@@ -49,8 +49,6 @@ void mtk_hdmi_phy_set_bits(struct mtk_hdmi_phy *hdmi_phy, u32 offset,
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void mtk_hdmi_phy_mask(struct mtk_hdmi_phy *hdmi_phy, u32 offset,
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u32 val, u32 mask);
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struct mtk_hdmi_phy *to_mtk_hdmi_phy(struct clk_hw *hw);
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-long mtk_hdmi_pll_round_rate(struct clk_hw *hw, unsigned long rate,
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- unsigned long *parent_rate);
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unsigned long mtk_hdmi_pll_recalc_rate(struct clk_hw *hw,
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unsigned long parent_rate);
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diff --git a/drivers/gpu/drm/mediatek/mtk_mt2701_hdmi_phy.c b/drivers/gpu/drm/mediatek/mtk_mt2701_hdmi_phy.c
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index 534bcbc9f3b7..2f87d0320882 100644
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--- a/drivers/gpu/drm/mediatek/mtk_mt2701_hdmi_phy.c
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+++ b/drivers/gpu/drm/mediatek/mtk_mt2701_hdmi_phy.c
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@@ -154,6 +154,17 @@ static int mtk_hdmi_pll_set_rate(struct clk_hw *hw, unsigned long rate,
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return 0;
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}
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+static long mtk_hdmi_pll_round_rate(struct clk_hw *hw, unsigned long rate,
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+ unsigned long *parent_rate)
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+{
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+ struct mtk_hdmi_phy *hdmi_phy = to_mtk_hdmi_phy(hw);
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+
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+ hdmi_phy->pll_rate = rate;
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+ *parent_rate = rate;
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+
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+ return rate;
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+}
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+
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static const struct clk_ops mtk_hdmi_phy_pll_ops = {
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.prepare = mtk_hdmi_pll_prepare,
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.unprepare = mtk_hdmi_pll_unprepare,
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diff --git a/drivers/gpu/drm/mediatek/mtk_mt8173_hdmi_phy.c b/drivers/gpu/drm/mediatek/mtk_mt8173_hdmi_phy.c
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index ed5916b27658..d8cb252c6781 100644
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--- a/drivers/gpu/drm/mediatek/mtk_mt8173_hdmi_phy.c
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+++ b/drivers/gpu/drm/mediatek/mtk_mt8173_hdmi_phy.c
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@@ -285,6 +285,20 @@ static int mtk_hdmi_pll_set_rate(struct clk_hw *hw, unsigned long rate,
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return 0;
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}
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+static long mtk_hdmi_pll_round_rate(struct clk_hw *hw, unsigned long rate,
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+ unsigned long *parent_rate)
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+{
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+ struct mtk_hdmi_phy *hdmi_phy = to_mtk_hdmi_phy(hw);
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+
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+ hdmi_phy->pll_rate = rate;
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+ if (rate <= 74250000)
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+ *parent_rate = rate;
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+ else
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+ *parent_rate = rate / 2;
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+
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+ return rate;
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+}
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+
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static const struct clk_ops mtk_hdmi_phy_pll_ops = {
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.prepare = mtk_hdmi_pll_prepare,
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.unprepare = mtk_hdmi_pll_unprepare,
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--
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2.19.1
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