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46 lines
1.5 KiB
Diff
46 lines
1.5 KiB
Diff
From 1badca92a80de81d28104d4cc19860b6de0855e7 Mon Sep 17 00:00:00 2001
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From: Maxime Ripard <maxime@cerno.tech>
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Date: Mon, 28 Jun 2021 11:15:13 +0200
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Subject: [PATCH 476/552] drm/vc4: Increase the core clock to a minimum of
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500MHz
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The core clock needs to be raised temporarily during a modeset to
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500MHz. However, the HVS core clock requirement might be higher than
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500MHz. This rate will be enforced at the end of the mode setting,
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meaning that might might end up with a core clock rate lower than
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planned on the first mode set.
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Use the maximum value of 500MHz and the HVS core clock rate for our
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temporary boost to fix this issue.
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Signed-off-by: Maxime Ripard <maxime@cerno.tech>
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---
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drivers/gpu/drm/vc4/vc4_kms.c | 8 +++++++-
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1 file changed, 7 insertions(+), 1 deletion(-)
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diff --git a/drivers/gpu/drm/vc4/vc4_kms.c b/drivers/gpu/drm/vc4/vc4_kms.c
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index 284e5a7ca168..34c4b7ef56cb 100644
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--- a/drivers/gpu/drm/vc4/vc4_kms.c
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+++ b/drivers/gpu/drm/vc4/vc4_kms.c
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@@ -366,11 +366,17 @@ static void vc4_atomic_commit_tail(struct drm_atomic_state *state)
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}
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if (vc4->hvs && vc4->hvs->hvs5) {
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+ unsigned long core_rate = max_t(unsigned long,
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+ 500000000,
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+ new_hvs_state->core_clock_rate);
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+
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+ drm_dbg(dev, "Raising the core clock at %lu Hz\n", core_rate);
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+
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/*
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* Do a temporary request on the core clock during the
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* modeset.
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*/
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- core_req = clk_request_start(hvs->core_clk, 500000000);
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+ core_req = clk_request_start(hvs->core_clk, core_rate);
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/*
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* And remove the previous one based on the HVS
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--
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2.33.0
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