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73 lines
2.7 KiB
Diff
73 lines
2.7 KiB
Diff
From 73cfbe7ed676bd06d5b2ae6b85380aefad9dd57b Mon Sep 17 00:00:00 2001
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From: Maxime Ripard <maxime@cerno.tech>
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Date: Wed, 25 Aug 2021 13:09:01 +0200
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Subject: [PATCH 551/552] drm/vc4: Set a default HSM rate
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When the firmware doesn't setup the HSM rate (such as when booting
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without an HDMI cable plugged in), its rate is 0 and thus any register
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access results in a CPU stall, even though HSM is enabled.
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Let's enforce a minimum rate at boot to avoid this issue.
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Signed-off-by: Maxime Ripard <maxime@cerno.tech>
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---
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drivers/gpu/drm/vc4/vc4_hdmi.c | 29 ++++++++++++++++++++++++++++-
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1 file changed, 28 insertions(+), 1 deletion(-)
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diff --git a/drivers/gpu/drm/vc4/vc4_hdmi.c b/drivers/gpu/drm/vc4/vc4_hdmi.c
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index aeb1e4b23310..207ff08485ed 100644
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--- a/drivers/gpu/drm/vc4/vc4_hdmi.c
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+++ b/drivers/gpu/drm/vc4/vc4_hdmi.c
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@@ -96,6 +96,7 @@
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# define VC4_HD_M_SW_RST BIT(2)
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# define VC4_HD_M_ENABLE BIT(0)
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+#define HSM_MIN_CLOCK_FREQ 120000000
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#define CEC_CLOCK_FREQ 40000
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#define HDMI_14_MAX_TMDS_CLK (340 * 1000 * 1000)
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@@ -1188,7 +1189,7 @@ static u32 vc5_hdmi_calc_hsm_clock(struct vc4_hdmi *vc4_hdmi, unsigned long pixe
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* pixel clock, but HSM ends up being the limiting factor.
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*/
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- return max_t(unsigned long, 120000000, (pixel_rate / 100) * 101);
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+ return max_t(unsigned long, HSM_MIN_CLOCK_FREQ, (pixel_rate / 100) * 101);
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}
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static u32 vc4_hdmi_channel_map(struct vc4_hdmi *vc4_hdmi, u32 channel_mask)
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@@ -2311,6 +2312,32 @@ static int vc4_hdmi_bind(struct device *dev, struct device *master, void *data)
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vc4_hdmi->disable_4kp60 = true;
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}
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+ /*
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+ * If we boot without any cable connected to the HDMI connector,
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+ * the firmware will skip the HSM initialization and leave it
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+ * with a rate of 0, resulting in a bus lockup when we're
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+ * accessing the registers even if it's enabled.
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+ *
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+ * Let's put a sensible default at runtime_resume so that we
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+ * don't end up in this situation.
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+ *
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+ * Strictly speaking we should be using clk_set_min_rate.
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+ * However, the clk-bcm2835 clock driver favors clock rates
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+ * under the expected rate, which in the case where we set the
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+ * minimum clock rate will be rejected by the clock framework.
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+ *
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+ * However, even for the two HDMI controllers found on the
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+ * BCM2711, using clk_set_rate doesn't cause any issue. Indeed,
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+ * the bind callbacks are called in sequence, and before the DRM
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+ * device is registered and therefore a mode is set. As such,
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+ * we're not at risk of having the first controller set a
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+ * different mode and then the second overriding the HSM clock
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+ * frequency in its bind.
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+ */
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+ ret = clk_set_rate(vc4_hdmi->hsm_clock, HSM_MIN_CLOCK_FREQ);
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+ if (ret)
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+ goto err_put_ddc;
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+
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if (vc4_hdmi->variant->reset)
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vc4_hdmi->variant->reset(vc4_hdmi);
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--
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2.33.0
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