mirror of
https://github.com/Ysurac/openmptcprouter.git
synced 2025-02-13 11:51:54 +00:00
126 lines
3.4 KiB
Diff
126 lines
3.4 KiB
Diff
From f9ae6e992d3d9e80357fee7d65ba0fe2dd37ae1f Mon Sep 17 00:00:00 2001
|
|
From: hmz007 <hmz007@gmail.com>
|
|
Date: Tue, 19 Nov 2019 14:21:51 +0800
|
|
Subject: [PATCH] arm64: dts: nanopi-r2: add rk3328-dmc relate node
|
|
|
|
Signed-off-by: hmz007 <hmz007@gmail.com>
|
|
---
|
|
.../rockchip/rk3328-dram-default-timing.dtsi | 311 ++++++++++++++++++
|
|
.../dts/rockchip/rk3328-nanopi-r2-common.dtsi | 85 ++++-
|
|
include/dt-bindings/clock/rockchip-ddr.h | 63 ++++
|
|
include/dt-bindings/memory/rk3328-dram.h | 159 +++++++++
|
|
4 files changed, 617 insertions(+), 1 deletion(-)
|
|
create mode 100644 arch/arm64/boot/dts/rockchip/rk3328-dram-default-timing.dtsi
|
|
create mode 100644 include/dt-bindings/clock/rockchip-ddr.h
|
|
create mode 100644 include/dt-bindings/memory/rk3328-dram.h
|
|
|
|
--- a/arch/arm64/boot/dts/rockchip/rk3328-nanopi-r2s.dts
|
|
+++ b/arch/arm64/boot/dts/rockchip/rk3328-nanopi-r2s.dts
|
|
@@ -7,6 +7,7 @@
|
|
|
|
#include <dt-bindings/input/input.h>
|
|
#include <dt-bindings/gpio/gpio.h>
|
|
+#include "rk3328-dram-default-timing.dtsi"
|
|
#include "rk3328.dtsi"
|
|
|
|
/ {
|
|
@@ -121,6 +122,72 @@
|
|
regulator-boot-on;
|
|
vin-supply = <&vdd_5v>;
|
|
};
|
|
+
|
|
+ dmc: dmc {
|
|
+ compatible = "rockchip,rk3328-dmc";
|
|
+ devfreq-events = <&dfi>;
|
|
+ center-supply = <&vdd_log>;
|
|
+ clocks = <&cru SCLK_DDRCLK>;
|
|
+ clock-names = "dmc_clk";
|
|
+ operating-points-v2 = <&dmc_opp_table>;
|
|
+ ddr_timing = <&ddr_timing>;
|
|
+ upthreshold = <40>;
|
|
+ downdifferential = <20>;
|
|
+ auto-min-freq = <786000>;
|
|
+ auto-freq-en = <0>;
|
|
+ #cooling-cells = <2>;
|
|
+ status = "okay";
|
|
+
|
|
+ ddr_power_model: ddr_power_model {
|
|
+ compatible = "ddr_power_model";
|
|
+ dynamic-power-coefficient = <120>;
|
|
+ static-power-coefficient = <200>;
|
|
+ ts = <32000 4700 (-80) 2>;
|
|
+ thermal-zone = "soc-thermal";
|
|
+ };
|
|
+ };
|
|
+
|
|
+ dmc_opp_table: dmc-opp-table {
|
|
+ compatible = "operating-points-v2";
|
|
+
|
|
+ rockchip,leakage-voltage-sel = <
|
|
+ 1 10 0
|
|
+ 11 254 1
|
|
+ >;
|
|
+ nvmem-cells = <&logic_leakage>;
|
|
+ nvmem-cell-names = "ddr_leakage";
|
|
+
|
|
+ opp-786000000 {
|
|
+ opp-hz = /bits/ 64 <786000000>;
|
|
+ opp-microvolt = <1075000>;
|
|
+ opp-microvolt-L0 = <1075000>;
|
|
+ opp-microvolt-L1 = <1050000>;
|
|
+ };
|
|
+ opp-798000000 {
|
|
+ opp-hz = /bits/ 64 <798000000>;
|
|
+ opp-microvolt = <1075000>;
|
|
+ opp-microvolt-L0 = <1075000>;
|
|
+ opp-microvolt-L1 = <1050000>;
|
|
+ };
|
|
+ opp-840000000 {
|
|
+ opp-hz = /bits/ 64 <840000000>;
|
|
+ opp-microvolt = <1075000>;
|
|
+ opp-microvolt-L0 = <1075000>;
|
|
+ opp-microvolt-L1 = <1050000>;
|
|
+ };
|
|
+ opp-924000000 {
|
|
+ opp-hz = /bits/ 64 <924000000>;
|
|
+ opp-microvolt = <1100000>;
|
|
+ opp-microvolt-L0 = <1100000>;
|
|
+ opp-microvolt-L1 = <1075000>;
|
|
+ };
|
|
+ opp-1056000000 {
|
|
+ opp-hz = /bits/ 64 <1056000000>;
|
|
+ opp-microvolt = <1175000>;
|
|
+ opp-microvolt-L0 = <1175000>;
|
|
+ opp-microvolt-L1 = <1150000>;
|
|
+ };
|
|
+ };
|
|
};
|
|
|
|
&cpu0 {
|
|
@@ -139,6 +206,10 @@
|
|
cpu-supply = <&vdd_arm>;
|
|
};
|
|
|
|
+&dfi {
|
|
+ status = "okay";
|
|
+};
|
|
+
|
|
&display_subsystem {
|
|
status = "disabled";
|
|
};
|
|
@@ -206,6 +277,7 @@
|
|
regulator-name = "vdd_log";
|
|
regulator-always-on;
|
|
regulator-boot-on;
|
|
+ regulator-init-microvolt = <1075000>;
|
|
regulator-min-microvolt = <712500>;
|
|
regulator-max-microvolt = <1450000>;
|
|
regulator-ramp-delay = <12500>;
|
|
@@ -220,6 +292,7 @@
|
|
regulator-name = "vdd_arm";
|
|
regulator-always-on;
|
|
regulator-boot-on;
|
|
+ regulator-init-microvolt = <1225000>;
|
|
regulator-min-microvolt = <712500>;
|
|
regulator-max-microvolt = <1450000>;
|
|
regulator-ramp-delay = <12500>;
|