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23 lines
775 B
Diff
23 lines
775 B
Diff
From dbb9f53907abd8e88b62e23aaa4605e1a15fc0d8 Mon Sep 17 00:00:00 2001
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From: Jonathan Bell <jonathan@raspberrypi.com>
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Date: Tue, 5 Mar 2024 10:05:16 +0000
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Subject: [PATCH 421/697] dt-bindings: add additional RP1 PLL output channels
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PLL_AUDIO has a ternary divider (a copy of the secondary divider) and
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PLL_VIDEO has a primary phased output.
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Signed-off-by: Jonathan Bell <jonathan@raspberrypi.com>
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---
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include/dt-bindings/clock/rp1.h | 4 ++++
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1 file changed, 4 insertions(+)
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--- a/include/dt-bindings/clock/rp1.h
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+++ b/include/dt-bindings/clock/rp1.h
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@@ -50,3 +50,7 @@
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#define RP1_CLK_DPI 40
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#define RP1_CLK_MIPI0_DPI 41
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#define RP1_CLK_MIPI1_DPI 42
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+
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+/* Extra PLL output channels - RP1B0 only */
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+#define RP1_PLL_VIDEO_PRI_PH 43
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+#define RP1_PLL_AUDIO_TERN 44
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