mirror of
https://github.com/Ysurac/openmptcprouter.git
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303 lines
6.4 KiB
Diff
303 lines
6.4 KiB
Diff
From 2f8ba990cfd63b9f37576f71590266e1fd7debf2 Mon Sep 17 00:00:00 2001
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From: Dave Stevenson <dave.stevenson@raspberrypi.com>
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Date: Wed, 4 Dec 2024 11:52:19 +0000
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Subject: [PATCH 628/697] arm64: dts: broadcom: Fixup downstream DT changes due
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to DRM merge
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Now we have a load of the DRM nodes in the base bcm2712.dtsi
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file, remove them from the downstream file.
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Signed-off-by: Dave Stevenson <dave.stevenson@raspberrypi.com>
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---
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arch/arm64/boot/dts/broadcom/bcm2712-ds.dtsi | 205 ++++--------------
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.../boot/dts/broadcom/bcm2712-rpi-5-b.dts | 27 ---
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2 files changed, 44 insertions(+), 188 deletions(-)
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--- a/arch/arm64/boot/dts/broadcom/bcm2712-ds.dtsi
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+++ b/arch/arm64/boot/dts/broadcom/bcm2712-ds.dtsi
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@@ -43,20 +43,6 @@
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clock-output-names = "otg";
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clock-frequency = <480000000>;
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};
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-
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- clk_27MHz: clk-27M {
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- #clock-cells = <0>;
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- compatible = "fixed-clock";
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- clock-frequency = <27000000>;
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- clock-output-names = "27MHz-clock";
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- };
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-
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- clk_108MHz: clk-108M {
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- #clock-cells = <0>;
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- compatible = "fixed-clock";
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- clock-frequency = <108000000>;
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- clock-output-names = "108MHz-clock";
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- };
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};
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thermal-zones {
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@@ -112,53 +98,6 @@
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status = "disabled";
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};
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- pixelvalve0: pixelvalve@7c410000 {
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- compatible = "brcm,bcm2712-pixelvalve0";
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- reg = <0x7c410000 0x100>;
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- interrupts = <GIC_SPI 101 IRQ_TYPE_LEVEL_HIGH>;
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- status = "disabled";
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- };
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-
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- pixelvalve1: pixelvalve@7c411000 {
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- compatible = "brcm,bcm2712-pixelvalve1";
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- reg = <0x7c411000 0x100>;
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- interrupts = <GIC_SPI 110 IRQ_TYPE_LEVEL_HIGH>;
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- status = "disabled";
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- };
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-
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- mop: mop@7c500000 {
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- compatible = "brcm,bcm2712-mop";
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- reg = <0x7c500000 0x28>;
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- interrupt-parent = <&disp_intr>;
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- interrupts = <1>;
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- status = "disabled";
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- };
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-
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- moplet: moplet@7c501000 {
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- compatible = "brcm,bcm2712-moplet";
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- reg = <0x7c501000 0x20>;
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- interrupt-parent = <&disp_intr>;
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- interrupts = <0>;
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- status = "disabled";
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- };
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-
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- disp_intr: interrupt-controller@7c502000 {
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- compatible = "brcm,bcm2711-l2-intc", "brcm,l2-intc";
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- reg = <0x7c502000 0x30>;
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- interrupts = <GIC_SPI 97 IRQ_TYPE_LEVEL_HIGH>;
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- interrupt-controller;
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- #interrupt-cells = <1>;
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- status = "disabled";
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- };
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-
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- dvp: clock@7c700000 {
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- compatible = "brcm,brcm2711-dvp";
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- reg = <0x7c700000 0x10>;
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- clocks = <&clk_108MHz>;
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- #clock-cells = <1>;
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- #reset-cells = <1>;
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- };
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-
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spi10: spi@7d004000 {
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compatible = "brcm,bcm2835-spi";
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reg = <0x7d004000 0x200>;
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@@ -249,28 +188,6 @@
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};
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};
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- ddc0: i2c@7d508200 {
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- compatible = "brcm,brcmstb-i2c";
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- reg = <0x7d508200 0x58>;
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- interrupt-parent = <&bsc_irq>;
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- interrupts = <1>;
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- clock-frequency = <97500>;
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- #address-cells = <1>;
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- #size-cells = <0>;
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- status = "disabled";
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- };
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-
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- ddc1: i2c@7d508280 {
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- compatible = "brcm,brcmstb-i2c";
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- reg = <0x7d508280 0x58>;
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- interrupt-parent = <&bsc_irq>;
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- interrupts = <2>;
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- clock-frequency = <97500>;
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- #address-cells = <1>;
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- #size-cells = <0>;
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- status = "disabled";
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- };
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-
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bsc_irq: intc@7d508380 {
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compatible = "brcm,bcm7271-l2-intc";
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reg = <0x7d508380 0x10>;
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@@ -385,70 +302,6 @@
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#thermal-sensor-cells = <0>;
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};
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};
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-
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- hdmi0: hdmi@7ef00700 {
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- compatible = "brcm,bcm2712-hdmi0";
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- reg = <0x7c701400 0x300>,
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- <0x7c701000 0x200>,
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- <0x7c701d00 0x300>,
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- <0x7c702000 0x80>,
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- <0x7c703800 0x200>,
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- <0x7c704000 0x800>,
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- <0x7c700100 0x80>,
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- <0x7d510800 0x100>,
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- <0x7c720000 0x100>;
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- reg-names = "hdmi",
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- "dvp",
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- "phy",
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- "rm",
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- "packet",
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- "metadata",
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- "csc",
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- "cec",
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- "hd";
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- resets = <&dvp 1>;
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- interrupt-parent = <&aon_intr>;
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- interrupts = <1>, <2>, <3>,
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- <7>, <8>;
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- interrupt-names = "cec-tx", "cec-rx", "cec-low",
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- "hpd-connected", "hpd-removed";
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- ddc = <&ddc0>;
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- dmas = <&dma32 10>;
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- dma-names = "audio-rx";
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- status = "disabled";
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- };
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-
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- hdmi1: hdmi@7ef05700 {
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- compatible = "brcm,bcm2712-hdmi1";
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- reg = <0x7c706400 0x300>,
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- <0x7c706000 0x200>,
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- <0x7c706d00 0x300>,
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- <0x7c707000 0x80>,
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- <0x7c708800 0x200>,
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- <0x7c709000 0x800>,
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- <0x7c700180 0x80>,
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- <0x7d511000 0x100>,
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- <0x7c720000 0x100>;
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- reg-names = "hdmi",
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- "dvp",
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- "phy",
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- "rm",
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- "packet",
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- "metadata",
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- "csc",
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- "cec",
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- "hd";
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- ddc = <&ddc1>;
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- resets = <&dvp 2>;
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- interrupt-parent = <&aon_intr>;
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- interrupts = <11>, <12>, <13>,
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- <14>, <15>;
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- interrupt-names = "cec-tx", "cec-rx", "cec-low",
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- "hpd-connected", "hpd-removed";
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- dmas = <&dma32 17>;
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- dma-names = "audio-rx";
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- status = "disabled";
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- };
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};
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/ {
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@@ -469,11 +322,6 @@
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<0x18 0x00000000 0x18 0x00000000 0x04 0x00000000>,
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<0x1c 0x00000000 0x1c 0x00000000 0x04 0x00000000>;
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- vc4: gpu {
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- compatible = "brcm,bcm2712-vc6";
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- status = "disabled";
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- };
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-
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iommu2: iommu@5100 {
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/* IOMMU2 for PISP-BE, HEVC; and (unused) H264 accelerators */
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compatible = "brcm,bcm2712-iommu";
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@@ -805,18 +653,53 @@
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<GIC_SPI 249 IRQ_TYPE_LEVEL_HIGH>;
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status = "disabled";
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};
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-
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- hvs: hvs@7c580000 {
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- compatible = "brcm,bcm2712-hvs";
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- reg = <0x10 0x7c580000 0x0 0x1a000>;
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- interrupt-parent = <&disp_intr>;
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- interrupts = <2>, <9>, <16>;
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- interrupt-names = "ch0-eof", "ch1-eof", "ch2-eof";
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- status = "disabled";
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- };
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};
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};
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&gio_aon {
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brcm,gpio-direct;
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};
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+
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+&hvs {
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+ status = "disabled";
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+};
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+
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+&hdmi0 {
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+ status = "disabled";
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+};
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+
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+&hdmi1 {
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+ status = "disabled";
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+};
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+
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+&pixelvalve0 {
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+ status = "disabled";
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+};
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+
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+&pixelvalve1 {
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+ status = "disabled";
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+};
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+
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+&mop {
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+ status = "disabled";
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+};
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+
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+&moplet {
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+ status = "disabled";
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+};
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+
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+&ddc0 {
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+ status = "disabled";
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+};
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+
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+&ddc1 {
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+ status = "disabled";
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+};
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+
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+&disp_intr {
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+ status = "disabled";
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+};
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+
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+&vc4 {
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+ status = "disabled";
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+};
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--- a/arch/arm64/boot/dts/broadcom/bcm2712-rpi-5-b.dts
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+++ b/arch/arm64/boot/dts/broadcom/bcm2712-rpi-5-b.dts
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@@ -707,33 +707,6 @@ spi10_cs_pins: &spi10_cs_gpio1 {};
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};
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};
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-&soc {
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- firmware: firmware {
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- compatible = "raspberrypi,bcm2835-firmware", "simple-mfd";
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- #address-cells = <1>;
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- #size-cells = <1>;
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-
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- mboxes = <&mailbox>;
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- dma-ranges;
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-
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- firmware_clocks: clocks {
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- compatible = "raspberrypi,firmware-clocks";
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- #clock-cells = <1>;
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- };
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-
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- reset: reset {
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- compatible = "raspberrypi,firmware-reset";
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- #reset-cells = <1>;
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- };
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- };
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-
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- power: power {
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- compatible = "raspberrypi,bcm2835-power";
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- firmware = <&firmware>;
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- #power-domain-cells = <1>;
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- };
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-};
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-
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&hvs {
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clocks = <&firmware_clocks 4>, <&firmware_clocks 16>;
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clock-names = "core", "disp";
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